1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mm/dma-mapping.c
5 * Copyright (C) 2000-2004 Russell King
7 * DMA uncached mapping support.
9 #include <linux/module.h>
11 #include <linux/genalloc.h>
12 #include <linux/gfp.h>
13 #include <linux/errno.h>
14 #include <linux/list.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/dma-direct.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/dma-noncoherent.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
27 #include <linux/sizes.h>
28 #include <linux/cma.h>
30 #include <asm/memory.h>
31 #include <asm/highmem.h>
32 #include <asm/cacheflush.h>
33 #include <asm/tlbflush.h>
34 #include <asm/mach/arch.h>
35 #include <asm/dma-iommu.h>
36 #include <asm/mach/map.h>
37 #include <asm/system_info.h>
38 #include <asm/dma-contiguous.h>
39 #include <xen/swiotlb-xen.h>
44 struct arm_dma_alloc_args {
54 struct arm_dma_free_args {
65 struct arm_dma_allocator {
66 void *(*alloc)(struct arm_dma_alloc_args *args,
67 struct page **ret_page);
68 void (*free)(struct arm_dma_free_args *args);
71 struct arm_dma_buffer {
72 struct list_head list;
74 struct arm_dma_allocator *allocator;
77 static LIST_HEAD(arm_dma_bufs);
78 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
80 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
82 struct arm_dma_buffer *buf, *found = NULL;
85 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
86 list_for_each_entry(buf, &arm_dma_bufs, list) {
87 if (buf->virt == virt) {
93 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
98 * The DMA API is built upon the notion of "buffer ownership". A buffer
99 * is either exclusively owned by the CPU (and therefore may be accessed
100 * by it) or exclusively owned by the DMA device. These helper functions
101 * represent the transitions between these two ownership states.
103 * Note, however, that on later ARMs, this notion does not work due to
104 * speculative prefetches. We model our approach on the assumption that
105 * the CPU does do speculative prefetches, which means we clean caches
106 * before transfers and delay cache invalidation until transfer completion.
109 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
110 size_t, enum dma_data_direction);
111 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
112 size_t, enum dma_data_direction);
115 * arm_dma_map_page - map a portion of a page for streaming DMA
116 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
117 * @page: page that buffer resides in
118 * @offset: offset into page for start of buffer
119 * @size: size of buffer to map
120 * @dir: DMA transfer direction
122 * Ensure that any data held in the cache is appropriately discarded
125 * The device owns this memory once this call has completed. The CPU
126 * can regain ownership by calling dma_unmap_page().
128 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
129 unsigned long offset, size_t size, enum dma_data_direction dir,
132 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
133 __dma_page_cpu_to_dev(page, offset, size, dir);
134 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
137 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
138 unsigned long offset, size_t size, enum dma_data_direction dir,
141 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
145 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
146 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
147 * @handle: DMA address of buffer
148 * @size: size of buffer (same as passed to dma_map_page)
149 * @dir: DMA transfer direction (same as passed to dma_map_page)
151 * Unmap a page streaming mode DMA translation. The handle and size
152 * must match what was provided in the previous dma_map_page() call.
153 * All other usages are undefined.
155 * After this call, reads by the CPU to the buffer are guaranteed to see
156 * whatever the device wrote there.
158 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
159 size_t size, enum dma_data_direction dir, unsigned long attrs)
161 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
162 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
163 handle & ~PAGE_MASK, size, dir);
166 static void arm_dma_sync_single_for_cpu(struct device *dev,
167 dma_addr_t handle, size_t size, enum dma_data_direction dir)
169 unsigned int offset = handle & (PAGE_SIZE - 1);
170 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
171 __dma_page_dev_to_cpu(page, offset, size, dir);
174 static void arm_dma_sync_single_for_device(struct device *dev,
175 dma_addr_t handle, size_t size, enum dma_data_direction dir)
177 unsigned int offset = handle & (PAGE_SIZE - 1);
178 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
179 __dma_page_cpu_to_dev(page, offset, size, dir);
182 const struct dma_map_ops arm_dma_ops = {
183 .alloc = arm_dma_alloc,
184 .free = arm_dma_free,
185 .mmap = arm_dma_mmap,
186 .get_sgtable = arm_dma_get_sgtable,
187 .map_page = arm_dma_map_page,
188 .unmap_page = arm_dma_unmap_page,
189 .map_sg = arm_dma_map_sg,
190 .unmap_sg = arm_dma_unmap_sg,
191 .map_resource = dma_direct_map_resource,
192 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
193 .sync_single_for_device = arm_dma_sync_single_for_device,
194 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
195 .sync_sg_for_device = arm_dma_sync_sg_for_device,
196 .dma_supported = arm_dma_supported,
197 .get_required_mask = dma_direct_get_required_mask,
199 EXPORT_SYMBOL(arm_dma_ops);
201 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
202 dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
203 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
204 dma_addr_t handle, unsigned long attrs);
205 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
206 void *cpu_addr, dma_addr_t dma_addr, size_t size,
207 unsigned long attrs);
209 const struct dma_map_ops arm_coherent_dma_ops = {
210 .alloc = arm_coherent_dma_alloc,
211 .free = arm_coherent_dma_free,
212 .mmap = arm_coherent_dma_mmap,
213 .get_sgtable = arm_dma_get_sgtable,
214 .map_page = arm_coherent_dma_map_page,
215 .map_sg = arm_dma_map_sg,
216 .map_resource = dma_direct_map_resource,
217 .dma_supported = arm_dma_supported,
218 .get_required_mask = dma_direct_get_required_mask,
220 EXPORT_SYMBOL(arm_coherent_dma_ops);
222 static int __dma_supported(struct device *dev, u64 mask, bool warn)
224 unsigned long max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
227 * Translate the device's DMA mask to a PFN limit. This
228 * PFN number includes the page which we can DMA to.
230 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
232 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
234 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
242 static u64 get_coherent_dma_mask(struct device *dev)
244 u64 mask = (u64)DMA_BIT_MASK(32);
247 mask = dev->coherent_dma_mask;
250 * Sanity check the DMA mask - it must be non-zero, and
251 * must be able to be satisfied by a DMA allocation.
254 dev_warn(dev, "coherent DMA mask is unset\n");
258 if (!__dma_supported(dev, mask, true))
265 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
268 * Ensure that the allocated pages are zeroed, and that any data
269 * lurking in the kernel direct-mapped region is invalidated.
271 if (PageHighMem(page)) {
272 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
273 phys_addr_t end = base + size;
275 void *ptr = kmap_atomic(page);
276 memset(ptr, 0, PAGE_SIZE);
277 if (coherent_flag != COHERENT)
278 dmac_flush_range(ptr, ptr + PAGE_SIZE);
283 if (coherent_flag != COHERENT)
284 outer_flush_range(base, end);
286 void *ptr = page_address(page);
287 memset(ptr, 0, size);
288 if (coherent_flag != COHERENT) {
289 dmac_flush_range(ptr, ptr + size);
290 outer_flush_range(__pa(ptr), __pa(ptr) + size);
296 * Allocate a DMA buffer for 'dev' of size 'size' using the
297 * specified gfp mask. Note that 'size' must be page aligned.
299 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
300 gfp_t gfp, int coherent_flag)
302 unsigned long order = get_order(size);
303 struct page *page, *p, *e;
305 page = alloc_pages(gfp, order);
310 * Now split the huge page and free the excess pages
312 split_page(page, order);
313 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
316 __dma_clear_buffer(page, size, coherent_flag);
322 * Free a DMA buffer. 'size' must be page aligned.
324 static void __dma_free_buffer(struct page *page, size_t size)
326 struct page *e = page + (size >> PAGE_SHIFT);
334 static void *__alloc_from_contiguous(struct device *dev, size_t size,
335 pgprot_t prot, struct page **ret_page,
336 const void *caller, bool want_vaddr,
337 int coherent_flag, gfp_t gfp);
339 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
340 pgprot_t prot, struct page **ret_page,
341 const void *caller, bool want_vaddr);
343 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
344 static struct gen_pool *atomic_pool __ro_after_init;
346 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
348 static int __init early_coherent_pool(char *p)
350 atomic_pool_size = memparse(p, &p);
353 early_param("coherent_pool", early_coherent_pool);
356 * Initialise the coherent pool for atomic allocations.
358 static int __init atomic_pool_init(void)
360 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
361 gfp_t gfp = GFP_KERNEL | GFP_DMA;
365 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
369 * The atomic pool is only used for non-coherent allocations
370 * so we must pass NORMAL for coherent_flag.
372 if (dev_get_cma_area(NULL))
373 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
374 &page, atomic_pool_init, true, NORMAL,
377 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
378 &page, atomic_pool_init, true);
382 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
384 atomic_pool_size, -1);
386 goto destroy_genpool;
388 gen_pool_set_algo(atomic_pool,
389 gen_pool_first_fit_order_align,
391 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
392 atomic_pool_size / 1024);
397 gen_pool_destroy(atomic_pool);
400 pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
401 atomic_pool_size / 1024);
405 * CMA is activated by core_initcall, so we must be called after it.
407 postcore_initcall(atomic_pool_init);
409 struct dma_contig_early_reserve {
414 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
416 static int dma_mmu_remap_num __initdata;
418 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
420 dma_mmu_remap[dma_mmu_remap_num].base = base;
421 dma_mmu_remap[dma_mmu_remap_num].size = size;
425 void __init dma_contiguous_remap(void)
428 for (i = 0; i < dma_mmu_remap_num; i++) {
429 phys_addr_t start = dma_mmu_remap[i].base;
430 phys_addr_t end = start + dma_mmu_remap[i].size;
434 if (end > arm_lowmem_limit)
435 end = arm_lowmem_limit;
439 map.pfn = __phys_to_pfn(start);
440 map.virtual = __phys_to_virt(start);
441 map.length = end - start;
442 map.type = MT_MEMORY_DMA_READY;
445 * Clear previous low-memory mapping to ensure that the
446 * TLB does not see any conflicting entries, then flush
447 * the TLB of the old entries before creating new mappings.
449 * This ensures that any speculatively loaded TLB entries
450 * (even though they may be rare) can not cause any problems,
451 * and ensures that this code is architecturally compliant.
453 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
455 pmd_clear(pmd_off_k(addr));
457 flush_tlb_kernel_range(__phys_to_virt(start),
458 __phys_to_virt(end));
460 iotable_init(&map, 1);
464 static int __dma_update_pte(pte_t *pte, unsigned long addr, void *data)
466 struct page *page = virt_to_page(addr);
467 pgprot_t prot = *(pgprot_t *)data;
469 set_pte_ext(pte, mk_pte(page, prot), 0);
473 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
475 unsigned long start = (unsigned long) page_address(page);
476 unsigned end = start + size;
478 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
479 flush_tlb_kernel_range(start, end);
482 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
483 pgprot_t prot, struct page **ret_page,
484 const void *caller, bool want_vaddr)
489 * __alloc_remap_buffer is only called when the device is
492 page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
498 ptr = dma_common_contiguous_remap(page, size, prot, caller);
500 __dma_free_buffer(page, size);
509 static void *__alloc_from_pool(size_t size, struct page **ret_page)
515 WARN(1, "coherent pool not initialised!\n");
519 val = gen_pool_alloc(atomic_pool, size);
521 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
523 *ret_page = phys_to_page(phys);
530 static bool __in_atomic_pool(void *start, size_t size)
532 return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
535 static int __free_from_pool(void *start, size_t size)
537 if (!__in_atomic_pool(start, size))
540 gen_pool_free(atomic_pool, (unsigned long)start, size);
545 static void *__alloc_from_contiguous(struct device *dev, size_t size,
546 pgprot_t prot, struct page **ret_page,
547 const void *caller, bool want_vaddr,
548 int coherent_flag, gfp_t gfp)
550 unsigned long order = get_order(size);
551 size_t count = size >> PAGE_SHIFT;
555 page = dma_alloc_from_contiguous(dev, count, order, gfp & __GFP_NOWARN);
559 __dma_clear_buffer(page, size, coherent_flag);
564 if (PageHighMem(page)) {
565 ptr = dma_common_contiguous_remap(page, size, prot, caller);
567 dma_release_from_contiguous(dev, page, count);
571 __dma_remap(page, size, prot);
572 ptr = page_address(page);
580 static void __free_from_contiguous(struct device *dev, struct page *page,
581 void *cpu_addr, size_t size, bool want_vaddr)
584 if (PageHighMem(page))
585 dma_common_free_remap(cpu_addr, size);
587 __dma_remap(page, size, PAGE_KERNEL);
589 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
592 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
594 prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
595 pgprot_writecombine(prot) :
596 pgprot_dmacoherent(prot);
600 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
601 struct page **ret_page)
604 /* __alloc_simple_buffer is only called when the device is coherent */
605 page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
610 return page_address(page);
613 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
614 struct page **ret_page)
616 return __alloc_simple_buffer(args->dev, args->size, args->gfp,
620 static void simple_allocator_free(struct arm_dma_free_args *args)
622 __dma_free_buffer(args->page, args->size);
625 static struct arm_dma_allocator simple_allocator = {
626 .alloc = simple_allocator_alloc,
627 .free = simple_allocator_free,
630 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
631 struct page **ret_page)
633 return __alloc_from_contiguous(args->dev, args->size, args->prot,
634 ret_page, args->caller,
635 args->want_vaddr, args->coherent_flag,
639 static void cma_allocator_free(struct arm_dma_free_args *args)
641 __free_from_contiguous(args->dev, args->page, args->cpu_addr,
642 args->size, args->want_vaddr);
645 static struct arm_dma_allocator cma_allocator = {
646 .alloc = cma_allocator_alloc,
647 .free = cma_allocator_free,
650 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
651 struct page **ret_page)
653 return __alloc_from_pool(args->size, ret_page);
656 static void pool_allocator_free(struct arm_dma_free_args *args)
658 __free_from_pool(args->cpu_addr, args->size);
661 static struct arm_dma_allocator pool_allocator = {
662 .alloc = pool_allocator_alloc,
663 .free = pool_allocator_free,
666 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
667 struct page **ret_page)
669 return __alloc_remap_buffer(args->dev, args->size, args->gfp,
670 args->prot, ret_page, args->caller,
674 static void remap_allocator_free(struct arm_dma_free_args *args)
676 if (args->want_vaddr)
677 dma_common_free_remap(args->cpu_addr, args->size);
679 __dma_free_buffer(args->page, args->size);
682 static struct arm_dma_allocator remap_allocator = {
683 .alloc = remap_allocator_alloc,
684 .free = remap_allocator_free,
687 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
688 gfp_t gfp, pgprot_t prot, bool is_coherent,
689 unsigned long attrs, const void *caller)
691 u64 mask = get_coherent_dma_mask(dev);
692 struct page *page = NULL;
694 bool allowblock, cma;
695 struct arm_dma_buffer *buf;
696 struct arm_dma_alloc_args args = {
698 .size = PAGE_ALIGN(size),
702 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
703 .coherent_flag = is_coherent ? COHERENT : NORMAL,
706 #ifdef CONFIG_DMA_API_DEBUG
707 u64 limit = (mask + 1) & ~mask;
708 if (limit && size >= limit) {
709 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
718 buf = kzalloc(sizeof(*buf),
719 gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
723 if (mask < 0xffffffffULL)
727 * Following is a work-around (a.k.a. hack) to prevent pages
728 * with __GFP_COMP being passed to split_page() which cannot
729 * handle them. The real problem is that this flag probably
730 * should be 0 on ARM as it is not supported on this
731 * platform; see CONFIG_HUGETLBFS.
733 gfp &= ~(__GFP_COMP);
736 *handle = DMA_MAPPING_ERROR;
737 allowblock = gfpflags_allow_blocking(gfp);
738 cma = allowblock ? dev_get_cma_area(dev) : false;
741 buf->allocator = &cma_allocator;
742 else if (is_coherent)
743 buf->allocator = &simple_allocator;
745 buf->allocator = &remap_allocator;
747 buf->allocator = &pool_allocator;
749 addr = buf->allocator->alloc(&args, &page);
754 *handle = pfn_to_dma(dev, page_to_pfn(page));
755 buf->virt = args.want_vaddr ? addr : page;
757 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
758 list_add(&buf->list, &arm_dma_bufs);
759 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
764 return args.want_vaddr ? addr : page;
768 * Allocate DMA-coherent memory space and return both the kernel remapped
769 * virtual and bus address for that space.
771 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
772 gfp_t gfp, unsigned long attrs)
774 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
776 return __dma_alloc(dev, size, handle, gfp, prot, false,
777 attrs, __builtin_return_address(0));
780 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
781 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
783 return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
784 attrs, __builtin_return_address(0));
787 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
788 void *cpu_addr, dma_addr_t dma_addr, size_t size,
792 unsigned long nr_vma_pages = vma_pages(vma);
793 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
794 unsigned long pfn = dma_to_pfn(dev, dma_addr);
795 unsigned long off = vma->vm_pgoff;
797 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
800 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
801 ret = remap_pfn_range(vma, vma->vm_start,
803 vma->vm_end - vma->vm_start,
811 * Create userspace mapping for the DMA-coherent memory.
813 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
814 void *cpu_addr, dma_addr_t dma_addr, size_t size,
817 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
820 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
821 void *cpu_addr, dma_addr_t dma_addr, size_t size,
824 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
825 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
829 * Free a buffer as defined by the above mapping.
831 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
832 dma_addr_t handle, unsigned long attrs,
835 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
836 struct arm_dma_buffer *buf;
837 struct arm_dma_free_args args = {
839 .size = PAGE_ALIGN(size),
840 .cpu_addr = cpu_addr,
842 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
845 buf = arm_dma_buffer_find(cpu_addr);
846 if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
849 buf->allocator->free(&args);
853 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
854 dma_addr_t handle, unsigned long attrs)
856 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
859 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
860 dma_addr_t handle, unsigned long attrs)
862 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
865 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
866 void *cpu_addr, dma_addr_t handle, size_t size,
869 unsigned long pfn = dma_to_pfn(dev, handle);
873 /* If the PFN is not valid, we do not have a struct page */
877 page = pfn_to_page(pfn);
879 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
883 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
887 static void dma_cache_maint_page(struct page *page, unsigned long offset,
888 size_t size, enum dma_data_direction dir,
889 void (*op)(const void *, size_t, int))
894 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
898 * A single sg entry may refer to multiple physically contiguous
899 * pages. But we still need to process highmem pages individually.
900 * If highmem is not configured then the bulk of this loop gets
907 page = pfn_to_page(pfn);
909 if (PageHighMem(page)) {
910 if (len + offset > PAGE_SIZE)
911 len = PAGE_SIZE - offset;
913 if (cache_is_vipt_nonaliasing()) {
914 vaddr = kmap_atomic(page);
915 op(vaddr + offset, len, dir);
916 kunmap_atomic(vaddr);
918 vaddr = kmap_high_get(page);
920 op(vaddr + offset, len, dir);
925 vaddr = page_address(page) + offset;
935 * Make an area consistent for devices.
936 * Note: Drivers should NOT use this function directly, as it will break
937 * platforms with CONFIG_DMABOUNCE.
938 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
940 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
941 size_t size, enum dma_data_direction dir)
945 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
947 paddr = page_to_phys(page) + off;
948 if (dir == DMA_FROM_DEVICE) {
949 outer_inv_range(paddr, paddr + size);
951 outer_clean_range(paddr, paddr + size);
953 /* FIXME: non-speculating: flush on bidirectional mappings? */
956 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
957 size_t size, enum dma_data_direction dir)
959 phys_addr_t paddr = page_to_phys(page) + off;
961 /* FIXME: non-speculating: not required */
962 /* in any case, don't bother invalidating if DMA to device */
963 if (dir != DMA_TO_DEVICE) {
964 outer_inv_range(paddr, paddr + size);
966 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
970 * Mark the D-cache clean for these pages to avoid extra flushing.
972 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
976 pfn = page_to_pfn(page) + off / PAGE_SIZE;
980 left -= PAGE_SIZE - off;
982 while (left >= PAGE_SIZE) {
983 page = pfn_to_page(pfn++);
984 set_bit(PG_dcache_clean, &page->flags);
991 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
992 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
993 * @sg: list of buffers
994 * @nents: number of buffers to map
995 * @dir: DMA transfer direction
997 * Map a set of buffers described by scatterlist in streaming mode for DMA.
998 * This is the scatter-gather version of the dma_map_single interface.
999 * Here the scatter gather list elements are each tagged with the
1000 * appropriate dma address and length. They are obtained via
1001 * sg_dma_{address,length}.
1003 * Device ownership issues as mentioned for dma_map_single are the same
1006 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1007 enum dma_data_direction dir, unsigned long attrs)
1009 const struct dma_map_ops *ops = get_dma_ops(dev);
1010 struct scatterlist *s;
1013 for_each_sg(sg, s, nents, i) {
1014 #ifdef CONFIG_NEED_SG_DMA_LENGTH
1015 s->dma_length = s->length;
1017 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
1018 s->length, dir, attrs);
1019 if (dma_mapping_error(dev, s->dma_address))
1025 for_each_sg(sg, s, i, j)
1026 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1031 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1032 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1033 * @sg: list of buffers
1034 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1035 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1037 * Unmap a set of streaming mode DMA translations. Again, CPU access
1038 * rules concerning calls here are the same as for dma_unmap_single().
1040 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1041 enum dma_data_direction dir, unsigned long attrs)
1043 const struct dma_map_ops *ops = get_dma_ops(dev);
1044 struct scatterlist *s;
1048 for_each_sg(sg, s, nents, i)
1049 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1053 * arm_dma_sync_sg_for_cpu
1054 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1055 * @sg: list of buffers
1056 * @nents: number of buffers to map (returned from dma_map_sg)
1057 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1059 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1060 int nents, enum dma_data_direction dir)
1062 const struct dma_map_ops *ops = get_dma_ops(dev);
1063 struct scatterlist *s;
1066 for_each_sg(sg, s, nents, i)
1067 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1072 * arm_dma_sync_sg_for_device
1073 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1074 * @sg: list of buffers
1075 * @nents: number of buffers to map (returned from dma_map_sg)
1076 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1078 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1079 int nents, enum dma_data_direction dir)
1081 const struct dma_map_ops *ops = get_dma_ops(dev);
1082 struct scatterlist *s;
1085 for_each_sg(sg, s, nents, i)
1086 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1091 * Return whether the given device DMA address mask can be supported
1092 * properly. For example, if your device can only drive the low 24-bits
1093 * during bus mastering, then you would pass 0x00ffffff as the mask
1096 int arm_dma_supported(struct device *dev, u64 mask)
1098 return __dma_supported(dev, mask, false);
1101 static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
1104 * When CONFIG_ARM_LPAE is set, physical address can extend above
1105 * 32-bits, which then can't be addressed by devices that only support
1107 * Use the generic dma-direct / swiotlb ops code in that case, as that
1108 * handles bounce buffering for us.
1110 if (IS_ENABLED(CONFIG_ARM_LPAE))
1112 return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
1115 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1117 static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
1121 if (attrs & DMA_ATTR_PRIVILEGED)
1125 case DMA_BIDIRECTIONAL:
1126 return prot | IOMMU_READ | IOMMU_WRITE;
1128 return prot | IOMMU_READ;
1129 case DMA_FROM_DEVICE:
1130 return prot | IOMMU_WRITE;
1138 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1140 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1143 unsigned int order = get_order(size);
1144 unsigned int align = 0;
1145 unsigned int count, start;
1146 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1147 unsigned long flags;
1151 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1152 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1154 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1155 align = (1 << order) - 1;
1157 spin_lock_irqsave(&mapping->lock, flags);
1158 for (i = 0; i < mapping->nr_bitmaps; i++) {
1159 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1160 mapping->bits, 0, count, align);
1162 if (start > mapping->bits)
1165 bitmap_set(mapping->bitmaps[i], start, count);
1170 * No unused range found. Try to extend the existing mapping
1171 * and perform a second attempt to reserve an IO virtual
1172 * address range of size bytes.
1174 if (i == mapping->nr_bitmaps) {
1175 if (extend_iommu_mapping(mapping)) {
1176 spin_unlock_irqrestore(&mapping->lock, flags);
1177 return DMA_MAPPING_ERROR;
1180 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1181 mapping->bits, 0, count, align);
1183 if (start > mapping->bits) {
1184 spin_unlock_irqrestore(&mapping->lock, flags);
1185 return DMA_MAPPING_ERROR;
1188 bitmap_set(mapping->bitmaps[i], start, count);
1190 spin_unlock_irqrestore(&mapping->lock, flags);
1192 iova = mapping->base + (mapping_size * i);
1193 iova += start << PAGE_SHIFT;
1198 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1199 dma_addr_t addr, size_t size)
1201 unsigned int start, count;
1202 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1203 unsigned long flags;
1204 dma_addr_t bitmap_base;
1210 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1211 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1213 bitmap_base = mapping->base + mapping_size * bitmap_index;
1215 start = (addr - bitmap_base) >> PAGE_SHIFT;
1217 if (addr + size > bitmap_base + mapping_size) {
1219 * The address range to be freed reaches into the iova
1220 * range of the next bitmap. This should not happen as
1221 * we don't allow this in __alloc_iova (at the
1226 count = size >> PAGE_SHIFT;
1228 spin_lock_irqsave(&mapping->lock, flags);
1229 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1230 spin_unlock_irqrestore(&mapping->lock, flags);
1233 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1234 static const int iommu_order_array[] = { 9, 8, 4, 0 };
1236 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1237 gfp_t gfp, unsigned long attrs,
1240 struct page **pages;
1241 int count = size >> PAGE_SHIFT;
1242 int array_size = count * sizeof(struct page *);
1246 if (array_size <= PAGE_SIZE)
1247 pages = kzalloc(array_size, GFP_KERNEL);
1249 pages = vzalloc(array_size);
1253 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1255 unsigned long order = get_order(size);
1258 page = dma_alloc_from_contiguous(dev, count, order,
1259 gfp & __GFP_NOWARN);
1263 __dma_clear_buffer(page, size, coherent_flag);
1265 for (i = 0; i < count; i++)
1266 pages[i] = page + i;
1271 /* Go straight to 4K chunks if caller says it's OK. */
1272 if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1273 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1276 * IOMMU can map any pages, so himem can also be used here
1278 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1283 order = iommu_order_array[order_idx];
1285 /* Drop down when we get small */
1286 if (__fls(count) < order) {
1292 /* See if it's easy to allocate a high-order chunk */
1293 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1295 /* Go down a notch at first sign of pressure */
1301 pages[i] = alloc_pages(gfp, 0);
1307 split_page(pages[i], order);
1310 pages[i + j] = pages[i] + j;
1313 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1315 count -= 1 << order;
1322 __free_pages(pages[i], 0);
1327 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1328 size_t size, unsigned long attrs)
1330 int count = size >> PAGE_SHIFT;
1333 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1334 dma_release_from_contiguous(dev, pages[0], count);
1336 for (i = 0; i < count; i++)
1338 __free_pages(pages[i], 0);
1346 * Create a mapping in device IO address space for specified pages
1349 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
1350 unsigned long attrs)
1352 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1353 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1354 dma_addr_t dma_addr, iova;
1357 dma_addr = __alloc_iova(mapping, size);
1358 if (dma_addr == DMA_MAPPING_ERROR)
1362 for (i = 0; i < count; ) {
1365 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1366 phys_addr_t phys = page_to_phys(pages[i]);
1367 unsigned int len, j;
1369 for (j = i + 1; j < count; j++, next_pfn++)
1370 if (page_to_pfn(pages[j]) != next_pfn)
1373 len = (j - i) << PAGE_SHIFT;
1374 ret = iommu_map(mapping->domain, iova, phys, len,
1375 __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
1383 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1384 __free_iova(mapping, dma_addr, size);
1385 return DMA_MAPPING_ERROR;
1388 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1390 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1393 * add optional in-page offset from iova to size and align
1394 * result to page size
1396 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1399 iommu_unmap(mapping->domain, iova, size);
1400 __free_iova(mapping, iova, size);
1404 static struct page **__atomic_get_pages(void *addr)
1409 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1410 page = phys_to_page(phys);
1412 return (struct page **)page;
1415 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1417 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1418 return __atomic_get_pages(cpu_addr);
1420 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1423 return dma_common_find_pages(cpu_addr);
1426 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1427 dma_addr_t *handle, int coherent_flag,
1428 unsigned long attrs)
1433 if (coherent_flag == COHERENT)
1434 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1436 addr = __alloc_from_pool(size, &page);
1440 *handle = __iommu_create_mapping(dev, &page, size, attrs);
1441 if (*handle == DMA_MAPPING_ERROR)
1447 __free_from_pool(addr, size);
1451 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1452 dma_addr_t handle, size_t size, int coherent_flag)
1454 __iommu_remove_mapping(dev, handle, size);
1455 if (coherent_flag == COHERENT)
1456 __dma_free_buffer(virt_to_page(cpu_addr), size);
1458 __free_from_pool(cpu_addr, size);
1461 static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1462 dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1465 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1466 struct page **pages;
1469 *handle = DMA_MAPPING_ERROR;
1470 size = PAGE_ALIGN(size);
1472 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
1473 return __iommu_alloc_simple(dev, size, gfp, handle,
1474 coherent_flag, attrs);
1477 * Following is a work-around (a.k.a. hack) to prevent pages
1478 * with __GFP_COMP being passed to split_page() which cannot
1479 * handle them. The real problem is that this flag probably
1480 * should be 0 on ARM as it is not supported on this
1481 * platform; see CONFIG_HUGETLBFS.
1483 gfp &= ~(__GFP_COMP);
1485 pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1489 *handle = __iommu_create_mapping(dev, pages, size, attrs);
1490 if (*handle == DMA_MAPPING_ERROR)
1493 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1496 addr = dma_common_pages_remap(pages, size, prot,
1497 __builtin_return_address(0));
1504 __iommu_remove_mapping(dev, *handle, size);
1506 __iommu_free_buffer(dev, pages, size, attrs);
1510 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1511 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1513 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1516 static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1517 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1519 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1522 static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1523 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1524 unsigned long attrs)
1526 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1527 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1533 if (vma->vm_pgoff >= nr_pages)
1536 err = vm_map_pages(vma, pages, nr_pages);
1538 pr_err("Remapping memory failed: %d\n", err);
1542 static int arm_iommu_mmap_attrs(struct device *dev,
1543 struct vm_area_struct *vma, void *cpu_addr,
1544 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1546 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1548 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1551 static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1552 struct vm_area_struct *vma, void *cpu_addr,
1553 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1555 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1559 * free a page as defined by the above mapping.
1560 * Must not be called with IRQs disabled.
1562 void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1563 dma_addr_t handle, unsigned long attrs, int coherent_flag)
1565 struct page **pages;
1566 size = PAGE_ALIGN(size);
1568 if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1569 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1573 pages = __iommu_get_pages(cpu_addr, attrs);
1575 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1579 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0)
1580 dma_common_free_remap(cpu_addr, size);
1582 __iommu_remove_mapping(dev, handle, size);
1583 __iommu_free_buffer(dev, pages, size, attrs);
1586 void arm_iommu_free_attrs(struct device *dev, size_t size,
1587 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1589 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1592 void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1593 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1595 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1598 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1599 void *cpu_addr, dma_addr_t dma_addr,
1600 size_t size, unsigned long attrs)
1602 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1603 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1608 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1613 * Map a part of the scatter-gather list into contiguous io address space
1615 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1616 size_t size, dma_addr_t *handle,
1617 enum dma_data_direction dir, unsigned long attrs,
1620 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1621 dma_addr_t iova, iova_base;
1624 struct scatterlist *s;
1627 size = PAGE_ALIGN(size);
1628 *handle = DMA_MAPPING_ERROR;
1630 iova_base = iova = __alloc_iova(mapping, size);
1631 if (iova == DMA_MAPPING_ERROR)
1634 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1635 phys_addr_t phys = page_to_phys(sg_page(s));
1636 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1638 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1639 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1641 prot = __dma_info_to_prot(dir, attrs);
1643 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1646 count += len >> PAGE_SHIFT;
1649 *handle = iova_base;
1653 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1654 __free_iova(mapping, iova_base, size);
1658 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1659 enum dma_data_direction dir, unsigned long attrs,
1662 struct scatterlist *s = sg, *dma = sg, *start = sg;
1664 unsigned int offset = s->offset;
1665 unsigned int size = s->offset + s->length;
1666 unsigned int max = dma_get_max_seg_size(dev);
1668 for (i = 1; i < nents; i++) {
1671 s->dma_address = DMA_MAPPING_ERROR;
1674 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1675 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1676 dir, attrs, is_coherent) < 0)
1679 dma->dma_address += offset;
1680 dma->dma_length = size - offset;
1682 size = offset = s->offset;
1689 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1693 dma->dma_address += offset;
1694 dma->dma_length = size - offset;
1699 for_each_sg(sg, s, count, i)
1700 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1705 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1706 * @dev: valid struct device pointer
1707 * @sg: list of buffers
1708 * @nents: number of buffers to map
1709 * @dir: DMA transfer direction
1711 * Map a set of i/o coherent buffers described by scatterlist in streaming
1712 * mode for DMA. The scatter gather list elements are merged together (if
1713 * possible) and tagged with the appropriate dma address and length. They are
1714 * obtained via sg_dma_{address,length}.
1716 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1717 int nents, enum dma_data_direction dir, unsigned long attrs)
1719 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1723 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1724 * @dev: valid struct device pointer
1725 * @sg: list of buffers
1726 * @nents: number of buffers to map
1727 * @dir: DMA transfer direction
1729 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1730 * The scatter gather list elements are merged together (if possible) and
1731 * tagged with the appropriate dma address and length. They are obtained via
1732 * sg_dma_{address,length}.
1734 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1735 int nents, enum dma_data_direction dir, unsigned long attrs)
1737 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1740 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1741 int nents, enum dma_data_direction dir,
1742 unsigned long attrs, bool is_coherent)
1744 struct scatterlist *s;
1747 for_each_sg(sg, s, nents, i) {
1749 __iommu_remove_mapping(dev, sg_dma_address(s),
1751 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1752 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1758 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1759 * @dev: valid struct device pointer
1760 * @sg: list of buffers
1761 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1762 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1764 * Unmap a set of streaming mode DMA translations. Again, CPU access
1765 * rules concerning calls here are the same as for dma_unmap_single().
1767 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1768 int nents, enum dma_data_direction dir,
1769 unsigned long attrs)
1771 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1775 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1776 * @dev: valid struct device pointer
1777 * @sg: list of buffers
1778 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1779 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1781 * Unmap a set of streaming mode DMA translations. Again, CPU access
1782 * rules concerning calls here are the same as for dma_unmap_single().
1784 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1785 enum dma_data_direction dir,
1786 unsigned long attrs)
1788 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1792 * arm_iommu_sync_sg_for_cpu
1793 * @dev: valid struct device pointer
1794 * @sg: list of buffers
1795 * @nents: number of buffers to map (returned from dma_map_sg)
1796 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1798 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1799 int nents, enum dma_data_direction dir)
1801 struct scatterlist *s;
1804 for_each_sg(sg, s, nents, i)
1805 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1810 * arm_iommu_sync_sg_for_device
1811 * @dev: valid struct device pointer
1812 * @sg: list of buffers
1813 * @nents: number of buffers to map (returned from dma_map_sg)
1814 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1816 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1817 int nents, enum dma_data_direction dir)
1819 struct scatterlist *s;
1822 for_each_sg(sg, s, nents, i)
1823 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1828 * arm_coherent_iommu_map_page
1829 * @dev: valid struct device pointer
1830 * @page: page that buffer resides in
1831 * @offset: offset into page for start of buffer
1832 * @size: size of buffer to map
1833 * @dir: DMA transfer direction
1835 * Coherent IOMMU aware version of arm_dma_map_page()
1837 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1838 unsigned long offset, size_t size, enum dma_data_direction dir,
1839 unsigned long attrs)
1841 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1842 dma_addr_t dma_addr;
1843 int ret, prot, len = PAGE_ALIGN(size + offset);
1845 dma_addr = __alloc_iova(mapping, len);
1846 if (dma_addr == DMA_MAPPING_ERROR)
1849 prot = __dma_info_to_prot(dir, attrs);
1851 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1855 return dma_addr + offset;
1857 __free_iova(mapping, dma_addr, len);
1858 return DMA_MAPPING_ERROR;
1862 * arm_iommu_map_page
1863 * @dev: valid struct device pointer
1864 * @page: page that buffer resides in
1865 * @offset: offset into page for start of buffer
1866 * @size: size of buffer to map
1867 * @dir: DMA transfer direction
1869 * IOMMU aware version of arm_dma_map_page()
1871 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1872 unsigned long offset, size_t size, enum dma_data_direction dir,
1873 unsigned long attrs)
1875 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1876 __dma_page_cpu_to_dev(page, offset, size, dir);
1878 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1882 * arm_coherent_iommu_unmap_page
1883 * @dev: valid struct device pointer
1884 * @handle: DMA address of buffer
1885 * @size: size of buffer (same as passed to dma_map_page)
1886 * @dir: DMA transfer direction (same as passed to dma_map_page)
1888 * Coherent IOMMU aware version of arm_dma_unmap_page()
1890 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1891 size_t size, enum dma_data_direction dir, unsigned long attrs)
1893 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1894 dma_addr_t iova = handle & PAGE_MASK;
1895 int offset = handle & ~PAGE_MASK;
1896 int len = PAGE_ALIGN(size + offset);
1901 iommu_unmap(mapping->domain, iova, len);
1902 __free_iova(mapping, iova, len);
1906 * arm_iommu_unmap_page
1907 * @dev: valid struct device pointer
1908 * @handle: DMA address of buffer
1909 * @size: size of buffer (same as passed to dma_map_page)
1910 * @dir: DMA transfer direction (same as passed to dma_map_page)
1912 * IOMMU aware version of arm_dma_unmap_page()
1914 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1915 size_t size, enum dma_data_direction dir, unsigned long attrs)
1917 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1918 dma_addr_t iova = handle & PAGE_MASK;
1919 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1920 int offset = handle & ~PAGE_MASK;
1921 int len = PAGE_ALIGN(size + offset);
1926 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1927 __dma_page_dev_to_cpu(page, offset, size, dir);
1929 iommu_unmap(mapping->domain, iova, len);
1930 __free_iova(mapping, iova, len);
1934 * arm_iommu_map_resource - map a device resource for DMA
1935 * @dev: valid struct device pointer
1936 * @phys_addr: physical address of resource
1937 * @size: size of resource to map
1938 * @dir: DMA transfer direction
1940 static dma_addr_t arm_iommu_map_resource(struct device *dev,
1941 phys_addr_t phys_addr, size_t size,
1942 enum dma_data_direction dir, unsigned long attrs)
1944 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1945 dma_addr_t dma_addr;
1947 phys_addr_t addr = phys_addr & PAGE_MASK;
1948 unsigned int offset = phys_addr & ~PAGE_MASK;
1949 size_t len = PAGE_ALIGN(size + offset);
1951 dma_addr = __alloc_iova(mapping, len);
1952 if (dma_addr == DMA_MAPPING_ERROR)
1955 prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
1957 ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
1961 return dma_addr + offset;
1963 __free_iova(mapping, dma_addr, len);
1964 return DMA_MAPPING_ERROR;
1968 * arm_iommu_unmap_resource - unmap a device DMA resource
1969 * @dev: valid struct device pointer
1970 * @dma_handle: DMA address to resource
1971 * @size: size of resource to map
1972 * @dir: DMA transfer direction
1974 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
1975 size_t size, enum dma_data_direction dir,
1976 unsigned long attrs)
1978 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1979 dma_addr_t iova = dma_handle & PAGE_MASK;
1980 unsigned int offset = dma_handle & ~PAGE_MASK;
1981 size_t len = PAGE_ALIGN(size + offset);
1986 iommu_unmap(mapping->domain, iova, len);
1987 __free_iova(mapping, iova, len);
1990 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1991 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1993 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1994 dma_addr_t iova = handle & PAGE_MASK;
1995 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1996 unsigned int offset = handle & ~PAGE_MASK;
2001 __dma_page_dev_to_cpu(page, offset, size, dir);
2004 static void arm_iommu_sync_single_for_device(struct device *dev,
2005 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2007 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2008 dma_addr_t iova = handle & PAGE_MASK;
2009 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2010 unsigned int offset = handle & ~PAGE_MASK;
2015 __dma_page_cpu_to_dev(page, offset, size, dir);
2018 const struct dma_map_ops iommu_ops = {
2019 .alloc = arm_iommu_alloc_attrs,
2020 .free = arm_iommu_free_attrs,
2021 .mmap = arm_iommu_mmap_attrs,
2022 .get_sgtable = arm_iommu_get_sgtable,
2024 .map_page = arm_iommu_map_page,
2025 .unmap_page = arm_iommu_unmap_page,
2026 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
2027 .sync_single_for_device = arm_iommu_sync_single_for_device,
2029 .map_sg = arm_iommu_map_sg,
2030 .unmap_sg = arm_iommu_unmap_sg,
2031 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
2032 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
2034 .map_resource = arm_iommu_map_resource,
2035 .unmap_resource = arm_iommu_unmap_resource,
2037 .dma_supported = arm_dma_supported,
2040 const struct dma_map_ops iommu_coherent_ops = {
2041 .alloc = arm_coherent_iommu_alloc_attrs,
2042 .free = arm_coherent_iommu_free_attrs,
2043 .mmap = arm_coherent_iommu_mmap_attrs,
2044 .get_sgtable = arm_iommu_get_sgtable,
2046 .map_page = arm_coherent_iommu_map_page,
2047 .unmap_page = arm_coherent_iommu_unmap_page,
2049 .map_sg = arm_coherent_iommu_map_sg,
2050 .unmap_sg = arm_coherent_iommu_unmap_sg,
2052 .map_resource = arm_iommu_map_resource,
2053 .unmap_resource = arm_iommu_unmap_resource,
2055 .dma_supported = arm_dma_supported,
2059 * arm_iommu_create_mapping
2060 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2061 * @base: start address of the valid IO address space
2062 * @size: maximum size of the valid IO address space
2064 * Creates a mapping structure which holds information about used/unused
2065 * IO address ranges, which is required to perform memory allocation and
2066 * mapping with IOMMU aware functions.
2068 * The client device need to be attached to the mapping with
2069 * arm_iommu_attach_device function.
2071 struct dma_iommu_mapping *
2072 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2074 unsigned int bits = size >> PAGE_SHIFT;
2075 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2076 struct dma_iommu_mapping *mapping;
2080 /* currently only 32-bit DMA address space is supported */
2081 if (size > DMA_BIT_MASK(32) + 1)
2082 return ERR_PTR(-ERANGE);
2085 return ERR_PTR(-EINVAL);
2087 if (bitmap_size > PAGE_SIZE) {
2088 extensions = bitmap_size / PAGE_SIZE;
2089 bitmap_size = PAGE_SIZE;
2092 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2096 mapping->bitmap_size = bitmap_size;
2097 mapping->bitmaps = kcalloc(extensions, sizeof(unsigned long *),
2099 if (!mapping->bitmaps)
2102 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2103 if (!mapping->bitmaps[0])
2106 mapping->nr_bitmaps = 1;
2107 mapping->extensions = extensions;
2108 mapping->base = base;
2109 mapping->bits = BITS_PER_BYTE * bitmap_size;
2111 spin_lock_init(&mapping->lock);
2113 mapping->domain = iommu_domain_alloc(bus);
2114 if (!mapping->domain)
2117 kref_init(&mapping->kref);
2120 kfree(mapping->bitmaps[0]);
2122 kfree(mapping->bitmaps);
2126 return ERR_PTR(err);
2128 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2130 static void release_iommu_mapping(struct kref *kref)
2133 struct dma_iommu_mapping *mapping =
2134 container_of(kref, struct dma_iommu_mapping, kref);
2136 iommu_domain_free(mapping->domain);
2137 for (i = 0; i < mapping->nr_bitmaps; i++)
2138 kfree(mapping->bitmaps[i]);
2139 kfree(mapping->bitmaps);
2143 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2147 if (mapping->nr_bitmaps >= mapping->extensions)
2150 next_bitmap = mapping->nr_bitmaps;
2151 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2153 if (!mapping->bitmaps[next_bitmap])
2156 mapping->nr_bitmaps++;
2161 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2164 kref_put(&mapping->kref, release_iommu_mapping);
2166 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2168 static int __arm_iommu_attach_device(struct device *dev,
2169 struct dma_iommu_mapping *mapping)
2173 err = iommu_attach_device(mapping->domain, dev);
2177 kref_get(&mapping->kref);
2178 to_dma_iommu_mapping(dev) = mapping;
2180 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2185 * arm_iommu_attach_device
2186 * @dev: valid struct device pointer
2187 * @mapping: io address space mapping structure (returned from
2188 * arm_iommu_create_mapping)
2190 * Attaches specified io address space mapping to the provided device.
2191 * This replaces the dma operations (dma_map_ops pointer) with the
2192 * IOMMU aware version.
2194 * More than one client might be attached to the same io address space
2197 int arm_iommu_attach_device(struct device *dev,
2198 struct dma_iommu_mapping *mapping)
2202 err = __arm_iommu_attach_device(dev, mapping);
2206 set_dma_ops(dev, &iommu_ops);
2209 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2212 * arm_iommu_detach_device
2213 * @dev: valid struct device pointer
2215 * Detaches the provided device from a previously attached map.
2216 * This overwrites the dma_ops pointer with appropriate non-IOMMU ops.
2218 void arm_iommu_detach_device(struct device *dev)
2220 struct dma_iommu_mapping *mapping;
2222 mapping = to_dma_iommu_mapping(dev);
2224 dev_warn(dev, "Not attached\n");
2228 iommu_detach_device(mapping->domain, dev);
2229 kref_put(&mapping->kref, release_iommu_mapping);
2230 to_dma_iommu_mapping(dev) = NULL;
2231 set_dma_ops(dev, arm_get_dma_map_ops(dev->archdata.dma_coherent));
2233 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2235 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2237 static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2239 return coherent ? &iommu_coherent_ops : &iommu_ops;
2242 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2243 const struct iommu_ops *iommu)
2245 struct dma_iommu_mapping *mapping;
2250 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2251 if (IS_ERR(mapping)) {
2252 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2253 size, dev_name(dev));
2257 if (__arm_iommu_attach_device(dev, mapping)) {
2258 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2260 arm_iommu_release_mapping(mapping);
2267 static void arm_teardown_iommu_dma_ops(struct device *dev)
2269 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2274 arm_iommu_detach_device(dev);
2275 arm_iommu_release_mapping(mapping);
2280 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2281 const struct iommu_ops *iommu)
2286 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2288 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2290 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2292 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2293 const struct iommu_ops *iommu, bool coherent)
2295 const struct dma_map_ops *dma_ops;
2297 dev->archdata.dma_coherent = coherent;
2298 #ifdef CONFIG_SWIOTLB
2299 dev->dma_coherent = coherent;
2303 * Don't override the dma_ops if they have already been set. Ideally
2304 * this should be the only location where dma_ops are set, remove this
2305 * check when all other callers of set_dma_ops will have disappeared.
2310 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2311 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2313 dma_ops = arm_get_dma_map_ops(coherent);
2315 set_dma_ops(dev, dma_ops);
2318 if (xen_initial_domain())
2319 dev->dma_ops = &xen_swiotlb_dma_ops;
2321 dev->archdata.dma_ops_setup = true;
2324 void arch_teardown_dma_ops(struct device *dev)
2326 if (!dev->archdata.dma_ops_setup)
2329 arm_teardown_iommu_dma_ops(dev);
2330 /* Let arch_setup_dma_ops() start again from scratch upon re-probe */
2331 set_dma_ops(dev, NULL);
2334 #ifdef CONFIG_SWIOTLB
2335 void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
2336 size_t size, enum dma_data_direction dir)
2338 __dma_page_cpu_to_dev(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
2342 void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
2343 size_t size, enum dma_data_direction dir)
2345 __dma_page_dev_to_cpu(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
2349 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
2350 gfp_t gfp, unsigned long attrs)
2352 return __dma_alloc(dev, size, dma_handle, gfp,
2353 __get_dma_pgprot(attrs, PAGE_KERNEL), false,
2354 attrs, __builtin_return_address(0));
2357 void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
2358 dma_addr_t dma_handle, unsigned long attrs)
2360 __arm_dma_free(dev, size, cpu_addr, dma_handle, attrs, false);
2362 #endif /* CONFIG_SWIOTLB */