2 * linux/arch/arm/mach-integrator/integrator_ap.c
4 * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/types.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/list.h>
24 #include <linux/platform_device.h>
25 #include <linux/slab.h>
26 #include <linux/string.h>
27 #include <linux/syscore_ops.h>
28 #include <linux/amba/bus.h>
29 #include <linux/amba/kmi.h>
31 #include <linux/irqchip.h>
32 #include <linux/platform_data/clk-integrator.h>
33 #include <linux/of_irq.h>
34 #include <linux/of_address.h>
35 #include <linux/of_platform.h>
36 #include <linux/stat.h>
37 #include <linux/termios.h>
39 #include <asm/setup.h>
40 #include <asm/param.h> /* HZ */
41 #include <asm/mach-types.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/irq.h>
45 #include <asm/mach/map.h>
46 #include <asm/mach/time.h>
54 /* Base address to the AP system controller */
55 void __iomem *ap_syscon_base;
56 /* Base address to the external bus interface */
57 static void __iomem *ebi_base;
61 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
64 * Setup a VA for the Integrator interrupt controller (for header #0,
67 #define VA_IC_BASE __io_address(INTEGRATOR_IC_BASE)
71 * ef000000 Cache flush
72 * f1100000 11000000 System controller registers
73 * f1300000 13000000 Counter/Timer
74 * f1400000 14000000 Interrupt controller
75 * f1600000 16000000 UART 0
76 * f1700000 17000000 UART 1
77 * f1a00000 1a000000 Debug LEDs
78 * f1b00000 1b000000 GPIO
81 static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
83 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
84 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
88 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
89 .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
93 .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
94 .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
98 .virtual = IO_ADDRESS(INTEGRATOR_AP_GPIO_BASE),
99 .pfn = __phys_to_pfn(INTEGRATOR_AP_GPIO_BASE),
105 static void __init ap_map_io(void)
107 iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
112 static unsigned long ic_irq_enable;
114 static int irq_suspend(void)
116 ic_irq_enable = readl(VA_IC_BASE + IRQ_ENABLE);
120 static void irq_resume(void)
122 /* disable all irq sources */
124 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
125 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
127 writel(ic_irq_enable, VA_IC_BASE + IRQ_ENABLE_SET);
130 #define irq_suspend NULL
131 #define irq_resume NULL
134 static struct syscore_ops irq_syscore_ops = {
135 .suspend = irq_suspend,
136 .resume = irq_resume,
139 static int __init irq_syscore_init(void)
141 register_syscore_ops(&irq_syscore_ops);
146 device_initcall(irq_syscore_init);
149 * For the PL010 found in the Integrator/AP some of the UART control is
150 * implemented in the system controller and accessed using a callback
153 static void integrator_uart_set_mctrl(struct amba_device *dev,
154 void __iomem *base, unsigned int mctrl)
156 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
157 u32 phybase = dev->res.start;
159 if (phybase == INTEGRATOR_UART0_BASE) {
169 if (mctrl & TIOCM_RTS)
174 if (mctrl & TIOCM_DTR)
179 __raw_writel(ctrls, ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);
180 __raw_writel(ctrlc, ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
183 struct amba_pl010_data ap_uart_data = {
184 .set_mctrl = integrator_uart_set_mctrl,
187 void __init ap_init_early(void)
191 static void __init ap_init_irq_of(void)
197 /* For the Device Tree, add in the UART callbacks as AUXDATA */
198 static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
199 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
201 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
202 "uart0", &ap_uart_data),
203 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
204 "uart1", &ap_uart_data),
205 OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
207 OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
212 static const struct of_device_id ap_syscon_match[] = {
213 { .compatible = "arm,integrator-ap-syscon"},
217 static const struct of_device_id ebi_match[] = {
218 { .compatible = "arm,external-bus-interface"},
222 static void __init ap_init_of(void)
224 unsigned long sc_dec;
225 struct device_node *syscon;
226 struct device_node *ebi;
229 syscon = of_find_matching_node(NULL, ap_syscon_match);
232 ebi = of_find_matching_node(NULL, ebi_match);
236 ap_syscon_base = of_iomap(syscon, 0);
239 ebi_base = of_iomap(ebi, 0);
243 of_platform_default_populate(NULL, ap_auxdata_lookup, NULL);
245 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
246 for (i = 0; i < 4; i++) {
247 struct lm_device *lmdev;
249 if ((sc_dec & (16 << i)) == 0)
252 lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
256 lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
257 lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
258 lmdev->resource.flags = IORESOURCE_MEM;
259 lmdev->irq = irq_of_parse_and_map(syscon, i);
262 lm_device_register(lmdev);
266 static const char * ap_dt_board_compat[] = {
271 DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
272 .reserve = integrator_reserve,
274 .init_early = ap_init_early,
275 .init_irq = ap_init_irq_of,
276 .init_machine = ap_init_of,
277 .dt_compat = ap_dt_board_compat,