4 #define ARCH (arch_sparc64)
6 #ifndef __NR_ioprio_set
7 #define __NR_ioprio_set 196
8 #define __NR_ioprio_get 218
11 #ifndef __NR_fadvise64
12 #define __NR_fadvise64 209
15 #ifndef __NR_sys_splice
16 #define __NR_sys_splice 232
17 #define __NR_sys_tee 280
18 #define __NR_sys_vmsplice 25
21 #define nop do { } while (0)
23 #define membar_safe(type) \
24 do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
25 " membar " type "\n" \
30 #define read_barrier() membar_safe("#LoadLoad")
31 #define write_barrier() membar_safe("#StoreStore")
34 volatile unsigned char lock;
37 static inline void spin_lock(spinlock_t *lock)
42 "1: ldstub [%1], %0\n"
43 " membar #StoreLoad | #StoreStore\n"
51 " ba,a,pt %%xcc, 1b\n"
58 static inline void spin_unlock(spinlock_t *lock)
61 " membar #StoreStore | #LoadStore\n"