Merge tag 'fixes-for-v4.1-rc2' of https://github.com/rjarzmik/linux into fixes
[linux-2.6-block.git] / scripts / Makefile.build
... / ...
CommitLineData
1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS :=
22EXTRA_CFLAGS :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS :=
25asflags-y :=
26ccflags-y :=
27cppflags-y :=
28ldflags-y :=
29
30subdir-asflags-y :=
31subdir-ccflags-y :=
32
33# Read auto.conf if it exists, otherwise ignore
34-include include/config/auto.conf
35
36include scripts/Kbuild.include
37
38# For backward compatibility check that these variables do not change
39save-cflags := $(CFLAGS)
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46# If the save-* variables changed error out
47ifeq ($(KBUILD_NOPEDANTIC),)
48 ifneq ("$(save-cflags)","$(CFLAGS)")
49 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
50 endif
51endif
52
53include scripts/Makefile.lib
54
55ifdef host-progs
56ifneq ($(hostprogs-y),$(host-progs))
57$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
58hostprogs-y += $(host-progs)
59endif
60endif
61
62# Do not include host rules unless needed
63ifneq ($(hostprogs-y)$(hostprogs-m),)
64include scripts/Makefile.host
65endif
66
67ifneq ($(KBUILD_SRC),)
68# Create output directory if not already present
69_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
70
71# Create directories for object files if directory does not exist
72# Needed when obj-y := dir/file.o syntax is used
73_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
74endif
75
76ifndef obj
77$(warning kbuild: Makefile.build is included improperly)
78endif
79
80# ===========================================================================
81
82ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
83lib-target := $(obj)/lib.a
84endif
85
86ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
87builtin-target := $(obj)/built-in.o
88endif
89
90modorder-target := $(obj)/modules.order
91
92# We keep a list of all modules in $(MODVERDIR)
93
94__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
95 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
96 $(subdir-ym) $(always)
97 @:
98
99# Linus' kernel sanity checking tool
100ifneq ($(KBUILD_CHECKSRC),0)
101 ifeq ($(KBUILD_CHECKSRC),2)
102 quiet_cmd_force_checksrc = CHECK $<
103 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
104 else
105 quiet_cmd_checksrc = CHECK $<
106 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
107 endif
108endif
109
110# Do section mismatch analysis for each module/built-in.o
111ifdef CONFIG_DEBUG_SECTION_MISMATCH
112 cmd_secanalysis = ; scripts/mod/modpost $@
113endif
114
115# Compile C sources (.c)
116# ---------------------------------------------------------------------------
117
118# Default is built-in, unless we know otherwise
119modkern_cflags = \
120 $(if $(part-of-module), \
121 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
122 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
123quiet_modtag := $(empty) $(empty)
124
125$(real-objs-m) : part-of-module := y
126$(real-objs-m:.o=.i) : part-of-module := y
127$(real-objs-m:.o=.s) : part-of-module := y
128$(real-objs-m:.o=.lst): part-of-module := y
129
130$(real-objs-m) : quiet_modtag := [M]
131$(real-objs-m:.o=.i) : quiet_modtag := [M]
132$(real-objs-m:.o=.s) : quiet_modtag := [M]
133$(real-objs-m:.o=.lst): quiet_modtag := [M]
134
135$(obj-m) : quiet_modtag := [M]
136
137# Default for not multi-part modules
138modname = $(basetarget)
139
140$(multi-objs-m) : modname = $(modname-multi)
141$(multi-objs-m:.o=.i) : modname = $(modname-multi)
142$(multi-objs-m:.o=.s) : modname = $(modname-multi)
143$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
144$(multi-objs-y) : modname = $(modname-multi)
145$(multi-objs-y:.o=.i) : modname = $(modname-multi)
146$(multi-objs-y:.o=.s) : modname = $(modname-multi)
147$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
148
149quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
150cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
151
152$(obj)/%.s: $(src)/%.c FORCE
153 $(call if_changed_dep,cc_s_c)
154
155quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
156cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
157
158$(obj)/%.i: $(src)/%.c FORCE
159 $(call if_changed_dep,cc_i_c)
160
161cmd_gensymtypes = \
162 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
163 $(GENKSYMS) $(if $(1), -T $(2)) \
164 $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
165 $(if $(KBUILD_PRESERVE),-p) \
166 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
167
168quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
169cmd_cc_symtypes_c = \
170 set -e; \
171 $(call cmd_gensymtypes,true,$@) >/dev/null; \
172 test -s $@ || rm -f $@
173
174$(obj)/%.symtypes : $(src)/%.c FORCE
175 $(call cmd,cc_symtypes_c)
176
177# C (.c) files
178# The C file is compiled and updated dependency information is generated.
179# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
180
181quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
182
183ifndef CONFIG_MODVERSIONS
184cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
185
186else
187# When module versioning is enabled the following steps are executed:
188# o compile a .tmp_<file>.o from <file>.c
189# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
190# not export symbols, we just rename .tmp_<file>.o to <file>.o and
191# are done.
192# o otherwise, we calculate symbol versions using the good old
193# genksyms on the preprocessed source and postprocess them in a way
194# that they are usable as a linker script
195# o generate <file>.o from .tmp_<file>.o using the linker to
196# replace the unresolved symbols __crc_exported_symbol with
197# the actual value of the checksum generated by genksyms
198
199cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
200cmd_modversions = \
201 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
202 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
203 > $(@D)/.tmp_$(@F:.o=.ver); \
204 \
205 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
206 -T $(@D)/.tmp_$(@F:.o=.ver); \
207 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
208 else \
209 mv -f $(@D)/.tmp_$(@F) $@; \
210 fi;
211endif
212
213ifdef CONFIG_FTRACE_MCOUNT_RECORD
214ifdef BUILD_C_RECORDMCOUNT
215ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
216 RECORDMCOUNT_FLAGS = -w
217endif
218# Due to recursion, we must skip empty.o.
219# The empty.o file is created in the make process in order to determine
220# the target endianness and word size. It is made before all other C
221# files, including recordmcount.
222sub_cmd_record_mcount = \
223 if [ $(@) != "scripts/mod/empty.o" ]; then \
224 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
225 fi;
226recordmcount_source := $(srctree)/scripts/recordmcount.c \
227 $(srctree)/scripts/recordmcount.h
228else
229sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
230 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
231 "$(if $(CONFIG_64BIT),64,32)" \
232 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
233 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
234 "$(if $(part-of-module),1,0)" "$(@)";
235recordmcount_source := $(srctree)/scripts/recordmcount.pl
236endif
237cmd_record_mcount = \
238 if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
239 "$(CC_FLAGS_FTRACE)" ]; then \
240 $(sub_cmd_record_mcount) \
241 fi;
242endif
243
244define rule_cc_o_c
245 $(call echo-cmd,checksrc) $(cmd_checksrc) \
246 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
247 $(cmd_modversions) \
248 $(call echo-cmd,record_mcount) \
249 $(cmd_record_mcount) \
250 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
251 $(dot-target).tmp; \
252 rm -f $(depfile); \
253 mv -f $(dot-target).tmp $(dot-target).cmd
254endef
255
256# Built-in and composite module parts
257$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
258 $(call cmd,force_checksrc)
259 $(call if_changed_rule,cc_o_c)
260
261# Single-part modules are special since we need to mark them in $(MODVERDIR)
262
263$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
264 $(call cmd,force_checksrc)
265 $(call if_changed_rule,cc_o_c)
266 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
267
268quiet_cmd_cc_lst_c = MKLST $@
269 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
270 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
271 System.map $(OBJDUMP) > $@
272
273$(obj)/%.lst: $(src)/%.c FORCE
274 $(call if_changed_dep,cc_lst_c)
275
276# Compile assembler sources (.S)
277# ---------------------------------------------------------------------------
278
279modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
280
281$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
282$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
283
284quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
285cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
286
287$(obj)/%.s: $(src)/%.S FORCE
288 $(call if_changed_dep,as_s_S)
289
290quiet_cmd_as_o_S = AS $(quiet_modtag) $@
291cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
292
293$(obj)/%.o: $(src)/%.S FORCE
294 $(call if_changed_dep,as_o_S)
295
296targets += $(real-objs-y) $(real-objs-m) $(lib-y)
297targets += $(extra-y) $(MAKECMDGOALS) $(always)
298
299# Linker scripts preprocessor (.lds.S -> .lds)
300# ---------------------------------------------------------------------------
301quiet_cmd_cpp_lds_S = LDS $@
302 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
303 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
304
305$(obj)/%.lds: $(src)/%.lds.S FORCE
306 $(call if_changed_dep,cpp_lds_S)
307
308# ASN.1 grammar
309# ---------------------------------------------------------------------------
310quiet_cmd_asn1_compiler = ASN.1 $@
311 cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
312 $(subst .h,.c,$@) $(subst .c,.h,$@)
313
314.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
315
316$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
317 $(call cmd,asn1_compiler)
318
319# Build the compiled-in targets
320# ---------------------------------------------------------------------------
321
322# To build objects in subdirs, we need to descend into the directories
323$(sort $(subdir-obj-y)): $(subdir-ym) ;
324
325#
326# Rule to compile a set of .o files into one .o file
327#
328ifdef builtin-target
329quiet_cmd_link_o_target = LD $@
330# If the list of objects to link is empty, just create an empty built-in.o
331cmd_link_o_target = $(if $(strip $(obj-y)),\
332 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
333 $(cmd_secanalysis),\
334 rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
335
336$(builtin-target): $(obj-y) FORCE
337 $(call if_changed,link_o_target)
338
339targets += $(builtin-target)
340endif # builtin-target
341
342#
343# Rule to create modules.order file
344#
345# Create commands to either record .ko file or cat modules.order from
346# a subdirectory
347modorder-cmds = \
348 $(foreach m, $(modorder), \
349 $(if $(filter %/modules.order, $m), \
350 cat $m;, echo kernel/$m;))
351
352$(modorder-target): $(subdir-ym) FORCE
353 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
354
355#
356# Rule to compile a set of .o files into one .a file
357#
358ifdef lib-target
359quiet_cmd_link_l_target = AR $@
360cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
361
362$(lib-target): $(lib-y) FORCE
363 $(call if_changed,link_l_target)
364
365targets += $(lib-target)
366endif
367
368#
369# Rule to link composite objects
370#
371# Composite objects are specified in kbuild makefile as follows:
372# <composite-object>-objs := <list of .o files>
373# or
374# <composite-object>-y := <list of .o files>
375link_multi_deps = \
376$(filter $(addprefix $(obj)/, \
377$($(subst $(obj)/,,$(@:.o=-objs))) \
378$($(subst $(obj)/,,$(@:.o=-y)))), $^)
379
380quiet_cmd_link_multi-y = LD $@
381cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
382
383quiet_cmd_link_multi-m = LD [M] $@
384cmd_link_multi-m = $(cmd_link_multi-y)
385
386$(multi-used-y): FORCE
387 $(call if_changed,link_multi-y)
388$(call multi_depend, $(multi-used-y), .o, -objs -y)
389
390$(multi-used-m): FORCE
391 $(call if_changed,link_multi-m)
392 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
393$(call multi_depend, $(multi-used-m), .o, -objs -y)
394
395targets += $(multi-used-y) $(multi-used-m)
396
397
398# Descending
399# ---------------------------------------------------------------------------
400
401PHONY += $(subdir-ym)
402$(subdir-ym):
403 $(Q)$(MAKE) $(build)=$@
404
405# Add FORCE to the prequisites of a target to force it to be always rebuilt.
406# ---------------------------------------------------------------------------
407
408PHONY += FORCE
409
410FORCE:
411
412# Read all saved command lines and dependencies for the $(targets) we
413# may be building above, using $(if_changed{,_dep}). As an
414# optimization, we don't need to read them if the target does not
415# exist, we will rebuild anyway in that case.
416
417targets := $(wildcard $(sort $(targets)))
418cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
419
420ifneq ($(cmd_files),)
421 include $(cmd_files)
422endif
423
424# Declare the contents of the .PHONY variable as phony. We keep that
425# information in a variable se we can use it in if_changed and friends.
426
427.PHONY: $(PHONY)