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caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
90977732 EA |
2 | /* |
3 | * Copyright (C) 2015, 2016 ARM Ltd. | |
90977732 EA |
4 | */ |
5 | ||
6 | #include <linux/uaccess.h> | |
7 | #include <linux/interrupt.h> | |
8 | #include <linux/cpu.h> | |
9 | #include <linux/kvm_host.h> | |
10 | #include <kvm/arm_vgic.h> | |
2e16f3e9 | 11 | #include <asm/kvm_emulate.h> |
90977732 EA |
12 | #include <asm/kvm_mmu.h> |
13 | #include "vgic.h" | |
14 | ||
ad275b8b EA |
15 | /* |
16 | * Initialization rules: there are multiple stages to the vgic | |
966e0149 CD |
17 | * initialization, both for the distributor and the CPU interfaces. The basic |
18 | * idea is that even though the VGIC is not functional or not requested from | |
19 | * user space, the critical path of the run loop can still call VGIC functions | |
20 | * that just won't do anything, without them having to check additional | |
21 | * initialization flags to ensure they don't look at uninitialized data | |
22 | * structures. | |
ad275b8b EA |
23 | * |
24 | * Distributor: | |
25 | * | |
26 | * - kvm_vgic_early_init(): initialization of static data that doesn't | |
27 | * depend on any sizing information or emulation type. No allocation | |
28 | * is allowed there. | |
29 | * | |
30 | * - vgic_init(): allocation and initialization of the generic data | |
31 | * structures that depend on sizing information (number of CPUs, | |
32 | * number of interrupts). Also initializes the vcpu specific data | |
33 | * structures. Can be executed lazily for GICv2. | |
34 | * | |
35 | * CPU Interface: | |
36 | * | |
5ec17fba | 37 | * - kvm_vgic_vcpu_init(): initialization of static data that |
ad275b8b EA |
38 | * doesn't depend on any sizing information or emulation type. No |
39 | * allocation is allowed there. | |
40 | */ | |
41 | ||
42 | /* EARLY INIT */ | |
43 | ||
966e0149 CD |
44 | /** |
45 | * kvm_vgic_early_init() - Initialize static VGIC VCPU data structures | |
46 | * @kvm: The VM whose VGIC districutor should be initialized | |
47 | * | |
48 | * Only do initialization of static structures that don't require any | |
49 | * allocation or sizing information from userspace. vgic_init() called | |
50 | * kvm_vgic_dist_init() which takes care of the rest. | |
ad275b8b EA |
51 | */ |
52 | void kvm_vgic_early_init(struct kvm *kvm) | |
53 | { | |
966e0149 CD |
54 | struct vgic_dist *dist = &kvm->arch.vgic; |
55 | ||
56 | INIT_LIST_HEAD(&dist->lpi_list_head); | |
24cab82c | 57 | INIT_LIST_HEAD(&dist->lpi_translation_cache); |
fc3bc475 | 58 | raw_spin_lock_init(&dist->lpi_list_lock); |
ad275b8b EA |
59 | } |
60 | ||
5e6431da EA |
61 | /* CREATION */ |
62 | ||
63 | /** | |
64 | * kvm_vgic_create: triggered by the instantiation of the VGIC device by | |
65 | * user space, either through the legacy KVM_CREATE_IRQCHIP ioctl (v2 only) | |
66 | * or through the generic KVM_CREATE_DEVICE API ioctl. | |
67 | * irqchip_in_kernel() tells you if this function succeeded or not. | |
ad275b8b EA |
68 | * @kvm: kvm struct pointer |
69 | * @type: KVM_DEV_TYPE_ARM_VGIC_V[23] | |
5e6431da EA |
70 | */ |
71 | int kvm_vgic_create(struct kvm *kvm, u32 type) | |
72 | { | |
73 | int i, vcpu_lock_idx = -1, ret; | |
74 | struct kvm_vcpu *vcpu; | |
75 | ||
a28ebea2 CD |
76 | if (irqchip_in_kernel(kvm)) |
77 | return -EEXIST; | |
5e6431da EA |
78 | |
79 | /* | |
80 | * This function is also called by the KVM_CREATE_IRQCHIP handler, | |
81 | * which had no chance yet to check the availability of the GICv2 | |
82 | * emulation. So check this here again. KVM_CREATE_DEVICE does | |
83 | * the proper checks already. | |
84 | */ | |
85 | if (type == KVM_DEV_TYPE_ARM_VGIC_V2 && | |
a28ebea2 CD |
86 | !kvm_vgic_global_state.can_emulate_gicv2) |
87 | return -ENODEV; | |
5e6431da EA |
88 | |
89 | /* | |
90 | * Any time a vcpu is run, vcpu_load is called which tries to grab the | |
91 | * vcpu->mutex. By grabbing the vcpu->mutex of all VCPUs we ensure | |
92 | * that no other VCPUs are run while we create the vgic. | |
93 | */ | |
94 | ret = -EBUSY; | |
95 | kvm_for_each_vcpu(i, vcpu, kvm) { | |
96 | if (!mutex_trylock(&vcpu->mutex)) | |
97 | goto out_unlock; | |
98 | vcpu_lock_idx = i; | |
99 | } | |
100 | ||
101 | kvm_for_each_vcpu(i, vcpu, kvm) { | |
102 | if (vcpu->arch.has_run_once) | |
103 | goto out_unlock; | |
104 | } | |
105 | ret = 0; | |
106 | ||
107 | if (type == KVM_DEV_TYPE_ARM_VGIC_V2) | |
108 | kvm->arch.max_vcpus = VGIC_V2_MAX_CPUS; | |
109 | else | |
110 | kvm->arch.max_vcpus = VGIC_V3_MAX_CPUS; | |
111 | ||
112 | if (atomic_read(&kvm->online_vcpus) > kvm->arch.max_vcpus) { | |
113 | ret = -E2BIG; | |
114 | goto out_unlock; | |
115 | } | |
116 | ||
117 | kvm->arch.vgic.in_kernel = true; | |
118 | kvm->arch.vgic.vgic_model = type; | |
119 | ||
5e6431da | 120 | kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF; |
dbd9733a EA |
121 | |
122 | if (type == KVM_DEV_TYPE_ARM_VGIC_V2) | |
123 | kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF; | |
124 | else | |
125 | INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions); | |
5e6431da EA |
126 | |
127 | out_unlock: | |
128 | for (; vcpu_lock_idx >= 0; vcpu_lock_idx--) { | |
129 | vcpu = kvm_get_vcpu(kvm, vcpu_lock_idx); | |
130 | mutex_unlock(&vcpu->mutex); | |
131 | } | |
5e6431da EA |
132 | return ret; |
133 | } | |
134 | ||
ad275b8b EA |
135 | /* INIT/DESTROY */ |
136 | ||
137 | /** | |
138 | * kvm_vgic_dist_init: initialize the dist data structures | |
139 | * @kvm: kvm struct pointer | |
140 | * @nr_spis: number of spis, frozen by caller | |
141 | */ | |
142 | static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis) | |
143 | { | |
144 | struct vgic_dist *dist = &kvm->arch.vgic; | |
145 | struct kvm_vcpu *vcpu0 = kvm_get_vcpu(kvm, 0); | |
146 | int i; | |
147 | ||
148 | dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL); | |
149 | if (!dist->spis) | |
150 | return -ENOMEM; | |
151 | ||
152 | /* | |
153 | * In the following code we do not take the irq struct lock since | |
154 | * no other action on irq structs can happen while the VGIC is | |
155 | * not initialized yet: | |
156 | * If someone wants to inject an interrupt or does a MMIO access, we | |
157 | * require prior initialization in case of a virtual GICv3 or trigger | |
158 | * initialization when using a virtual GICv2. | |
159 | */ | |
160 | for (i = 0; i < nr_spis; i++) { | |
161 | struct vgic_irq *irq = &dist->spis[i]; | |
162 | ||
163 | irq->intid = i + VGIC_NR_PRIVATE_IRQS; | |
164 | INIT_LIST_HEAD(&irq->ap_list); | |
8fa3adb8 | 165 | raw_spin_lock_init(&irq->irq_lock); |
ad275b8b EA |
166 | irq->vcpu = NULL; |
167 | irq->target_vcpu = vcpu0; | |
5dd4b924 | 168 | kref_init(&irq->refcount); |
2e16f3e9 AP |
169 | switch (dist->vgic_model) { |
170 | case KVM_DEV_TYPE_ARM_VGIC_V2: | |
ad275b8b | 171 | irq->targets = 0; |
8df3c8f3 | 172 | irq->group = 0; |
2e16f3e9 AP |
173 | break; |
174 | case KVM_DEV_TYPE_ARM_VGIC_V3: | |
ad275b8b | 175 | irq->mpidr = 0; |
8df3c8f3 | 176 | irq->group = 1; |
2e16f3e9 AP |
177 | break; |
178 | default: | |
179 | kfree(dist->spis); | |
180 | return -EINVAL; | |
8df3c8f3 | 181 | } |
ad275b8b EA |
182 | } |
183 | return 0; | |
184 | } | |
185 | ||
186 | /** | |
5ec17fba EA |
187 | * kvm_vgic_vcpu_init() - Initialize static VGIC VCPU data |
188 | * structures and register VCPU-specific KVM iodevs | |
189 | * | |
1aab6f46 | 190 | * @vcpu: pointer to the VCPU being created and initialized |
5ec17fba EA |
191 | * |
192 | * Only do initialization, but do not actually enable the | |
193 | * VGIC CPU interface | |
ad275b8b | 194 | */ |
1aab6f46 CD |
195 | int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu) |
196 | { | |
5ec17fba | 197 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
1aab6f46 | 198 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
5ec17fba EA |
199 | int ret = 0; |
200 | int i; | |
201 | ||
c011f4ea | 202 | vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF; |
c011f4ea | 203 | |
5ec17fba | 204 | INIT_LIST_HEAD(&vgic_cpu->ap_list_head); |
e08d8d29 | 205 | raw_spin_lock_init(&vgic_cpu->ap_list_lock); |
5bd90b09 | 206 | atomic_set(&vgic_cpu->vgic_v3.its_vpe.vlpi_count, 0); |
5ec17fba EA |
207 | |
208 | /* | |
209 | * Enable and configure all SGIs to be edge-triggered and | |
210 | * configure all PPIs as level-triggered. | |
211 | */ | |
212 | for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { | |
213 | struct vgic_irq *irq = &vgic_cpu->private_irqs[i]; | |
214 | ||
215 | INIT_LIST_HEAD(&irq->ap_list); | |
8fa3adb8 | 216 | raw_spin_lock_init(&irq->irq_lock); |
5ec17fba EA |
217 | irq->intid = i; |
218 | irq->vcpu = NULL; | |
219 | irq->target_vcpu = vcpu; | |
5ec17fba EA |
220 | kref_init(&irq->refcount); |
221 | if (vgic_irq_is_sgi(i)) { | |
222 | /* SGIs */ | |
223 | irq->enabled = 1; | |
224 | irq->config = VGIC_CONFIG_EDGE; | |
225 | } else { | |
226 | /* PPIs */ | |
227 | irq->config = VGIC_CONFIG_LEVEL; | |
228 | } | |
229 | } | |
1aab6f46 CD |
230 | |
231 | if (!irqchip_in_kernel(vcpu->kvm)) | |
232 | return 0; | |
233 | ||
234 | /* | |
235 | * If we are creating a VCPU with a GICv3 we must also register the | |
236 | * KVM io device for the redistributor that belongs to this VCPU. | |
237 | */ | |
552c9f47 CD |
238 | if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { |
239 | mutex_lock(&vcpu->kvm->lock); | |
1aab6f46 | 240 | ret = vgic_register_redist_iodev(vcpu); |
552c9f47 CD |
241 | mutex_unlock(&vcpu->kvm->lock); |
242 | } | |
1aab6f46 CD |
243 | return ret; |
244 | } | |
245 | ||
443c3a9e | 246 | static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu) |
ad275b8b | 247 | { |
ad275b8b EA |
248 | if (kvm_vgic_global_state.type == VGIC_V2) |
249 | vgic_v2_enable(vcpu); | |
250 | else | |
251 | vgic_v3_enable(vcpu); | |
252 | } | |
253 | ||
254 | /* | |
255 | * vgic_init: allocates and initializes dist and vcpu data structures | |
256 | * depending on two dimensioning parameters: | |
257 | * - the number of spis | |
258 | * - the number of vcpus | |
259 | * The function is generally called when nr_spis has been explicitly set | |
260 | * by the guest through the KVM DEVICE API. If not nr_spis is set to 256. | |
261 | * vgic_initialized() returns true when this function has succeeded. | |
262 | * Must be called with kvm->lock held! | |
263 | */ | |
264 | int vgic_init(struct kvm *kvm) | |
265 | { | |
266 | struct vgic_dist *dist = &kvm->arch.vgic; | |
267 | struct kvm_vcpu *vcpu; | |
ab2d5eb0 | 268 | int ret = 0, i, idx; |
ad275b8b EA |
269 | |
270 | if (vgic_initialized(kvm)) | |
271 | return 0; | |
272 | ||
1d47191d CD |
273 | /* Are we also in the middle of creating a VCPU? */ |
274 | if (kvm->created_vcpus != atomic_read(&kvm->online_vcpus)) | |
275 | return -EBUSY; | |
276 | ||
ad275b8b EA |
277 | /* freeze the number of spis */ |
278 | if (!dist->nr_spis) | |
279 | dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS; | |
280 | ||
281 | ret = kvm_vgic_dist_init(kvm, dist->nr_spis); | |
282 | if (ret) | |
283 | goto out; | |
284 | ||
ab2d5eb0 CD |
285 | /* Initialize groups on CPUs created before the VGIC type was known */ |
286 | kvm_for_each_vcpu(idx, vcpu, kvm) { | |
287 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
288 | ||
289 | for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { | |
290 | struct vgic_irq *irq = &vgic_cpu->private_irqs[i]; | |
2e16f3e9 AP |
291 | switch (dist->vgic_model) { |
292 | case KVM_DEV_TYPE_ARM_VGIC_V3: | |
ab2d5eb0 | 293 | irq->group = 1; |
2e16f3e9 AP |
294 | irq->mpidr = kvm_vcpu_get_mpidr_aff(vcpu); |
295 | break; | |
296 | case KVM_DEV_TYPE_ARM_VGIC_V2: | |
ab2d5eb0 | 297 | irq->group = 0; |
2e16f3e9 AP |
298 | irq->targets = 1U << idx; |
299 | break; | |
300 | default: | |
301 | ret = -EINVAL; | |
302 | goto out; | |
303 | } | |
ab2d5eb0 CD |
304 | } |
305 | } | |
306 | ||
f8f85dc0 | 307 | if (vgic_has_its(kvm)) { |
24cab82c | 308 | vgic_lpi_translation_cache_init(kvm); |
f8f85dc0 CD |
309 | ret = vgic_v4_init(kvm); |
310 | if (ret) | |
311 | goto out; | |
312 | } | |
74fe55dc | 313 | |
ad275b8b | 314 | kvm_for_each_vcpu(i, vcpu, kvm) |
443c3a9e | 315 | kvm_vgic_vcpu_enable(vcpu); |
ad275b8b | 316 | |
180ae7b1 EA |
317 | ret = kvm_vgic_setup_default_irq_routing(kvm); |
318 | if (ret) | |
319 | goto out; | |
320 | ||
10f92c4c CD |
321 | vgic_debug_init(kvm); |
322 | ||
d53c2c29 | 323 | dist->implementation_rev = 2; |
ad275b8b | 324 | dist->initialized = true; |
328e5664 | 325 | |
ad275b8b EA |
326 | out: |
327 | return ret; | |
328 | } | |
329 | ||
330 | static void kvm_vgic_dist_destroy(struct kvm *kvm) | |
331 | { | |
332 | struct vgic_dist *dist = &kvm->arch.vgic; | |
dbd9733a | 333 | struct vgic_redist_region *rdreg, *next; |
ad275b8b | 334 | |
ad275b8b EA |
335 | dist->ready = false; |
336 | dist->initialized = false; | |
337 | ||
338 | kfree(dist->spis); | |
9153ab72 | 339 | dist->spis = NULL; |
ad275b8b | 340 | dist->nr_spis = 0; |
74fe55dc | 341 | |
dbd9733a EA |
342 | if (kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { |
343 | list_for_each_entry_safe(rdreg, next, &dist->rd_regions, list) { | |
344 | list_del(&rdreg->list); | |
345 | kfree(rdreg); | |
346 | } | |
347 | INIT_LIST_HEAD(&dist->rd_regions); | |
348 | } | |
349 | ||
24cab82c MZ |
350 | if (vgic_has_its(kvm)) |
351 | vgic_lpi_translation_cache_destroy(kvm); | |
352 | ||
74fe55dc MZ |
353 | if (vgic_supports_direct_msis(kvm)) |
354 | vgic_v4_teardown(kvm); | |
ad275b8b EA |
355 | } |
356 | ||
357 | void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu) | |
358 | { | |
359 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
360 | ||
361 | INIT_LIST_HEAD(&vgic_cpu->ap_list_head); | |
362 | } | |
363 | ||
1193e6ae MZ |
364 | /* To be called with kvm->lock held */ |
365 | static void __kvm_vgic_destroy(struct kvm *kvm) | |
ad275b8b EA |
366 | { |
367 | struct kvm_vcpu *vcpu; | |
368 | int i; | |
369 | ||
10f92c4c CD |
370 | vgic_debug_destroy(kvm); |
371 | ||
ad275b8b EA |
372 | kvm_vgic_dist_destroy(kvm); |
373 | ||
374 | kvm_for_each_vcpu(i, vcpu, kvm) | |
375 | kvm_vgic_vcpu_destroy(vcpu); | |
376 | } | |
377 | ||
1193e6ae MZ |
378 | void kvm_vgic_destroy(struct kvm *kvm) |
379 | { | |
380 | mutex_lock(&kvm->lock); | |
381 | __kvm_vgic_destroy(kvm); | |
382 | mutex_unlock(&kvm->lock); | |
383 | } | |
384 | ||
ad275b8b EA |
385 | /** |
386 | * vgic_lazy_init: Lazy init is only allowed if the GIC exposed to the guest | |
387 | * is a GICv2. A GICv3 must be explicitly initialized by the guest using the | |
388 | * KVM_DEV_ARM_VGIC_GRP_CTRL KVM_DEVICE group. | |
389 | * @kvm: kvm struct pointer | |
390 | */ | |
391 | int vgic_lazy_init(struct kvm *kvm) | |
392 | { | |
393 | int ret = 0; | |
394 | ||
395 | if (unlikely(!vgic_initialized(kvm))) { | |
396 | /* | |
397 | * We only provide the automatic initialization of the VGIC | |
398 | * for the legacy case of a GICv2. Any other type must | |
399 | * be explicitly initialized once setup with the respective | |
400 | * KVM device call. | |
401 | */ | |
402 | if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2) | |
403 | return -EBUSY; | |
404 | ||
405 | mutex_lock(&kvm->lock); | |
406 | ret = vgic_init(kvm); | |
407 | mutex_unlock(&kvm->lock); | |
408 | } | |
409 | ||
410 | return ret; | |
411 | } | |
412 | ||
b0442ee2 EA |
413 | /* RESOURCE MAPPING */ |
414 | ||
415 | /** | |
416 | * Map the MMIO regions depending on the VGIC model exposed to the guest | |
417 | * called on the first VCPU run. | |
418 | * Also map the virtual CPU interface into the VM. | |
419 | * v2/v3 derivatives call vgic_init if not already done. | |
420 | * vgic_ready() returns true if this function has succeeded. | |
421 | * @kvm: kvm struct pointer | |
422 | */ | |
423 | int kvm_vgic_map_resources(struct kvm *kvm) | |
424 | { | |
425 | struct vgic_dist *dist = &kvm->arch.vgic; | |
426 | int ret = 0; | |
427 | ||
428 | mutex_lock(&kvm->lock); | |
429 | if (!irqchip_in_kernel(kvm)) | |
430 | goto out; | |
431 | ||
432 | if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) | |
433 | ret = vgic_v2_map_resources(kvm); | |
434 | else | |
435 | ret = vgic_v3_map_resources(kvm); | |
1193e6ae MZ |
436 | |
437 | if (ret) | |
438 | __kvm_vgic_destroy(kvm); | |
439 | ||
b0442ee2 EA |
440 | out: |
441 | mutex_unlock(&kvm->lock); | |
442 | return ret; | |
443 | } | |
444 | ||
90977732 EA |
445 | /* GENERIC PROBE */ |
446 | ||
15d7e3d3 | 447 | static int vgic_init_cpu_starting(unsigned int cpu) |
90977732 EA |
448 | { |
449 | enable_percpu_irq(kvm_vgic_global_state.maint_irq, 0); | |
15d7e3d3 | 450 | return 0; |
90977732 EA |
451 | } |
452 | ||
90977732 | 453 | |
15d7e3d3 AMG |
454 | static int vgic_init_cpu_dying(unsigned int cpu) |
455 | { | |
456 | disable_percpu_irq(kvm_vgic_global_state.maint_irq); | |
457 | return 0; | |
90977732 EA |
458 | } |
459 | ||
90977732 EA |
460 | static irqreturn_t vgic_maintenance_handler(int irq, void *data) |
461 | { | |
462 | /* | |
463 | * We cannot rely on the vgic maintenance interrupt to be | |
464 | * delivered synchronously. This means we can only use it to | |
465 | * exit the VM, and we perform the handling of EOIed | |
c3616a07 | 466 | * interrupts on the exit path (see vgic_fold_lr_state). |
90977732 EA |
467 | */ |
468 | return IRQ_HANDLED; | |
469 | } | |
470 | ||
5b0d2cc2 CD |
471 | /** |
472 | * kvm_vgic_init_cpu_hardware - initialize the GIC VE hardware | |
473 | * | |
474 | * For a specific CPU, initialize the GIC VE hardware. | |
475 | */ | |
476 | void kvm_vgic_init_cpu_hardware(void) | |
477 | { | |
478 | BUG_ON(preemptible()); | |
479 | ||
480 | /* | |
481 | * We want to make sure the list registers start out clear so that we | |
482 | * only have the program the used registers. | |
483 | */ | |
484 | if (kvm_vgic_global_state.type == VGIC_V2) | |
485 | vgic_v2_init_lrs(); | |
486 | else | |
487 | kvm_call_hyp(__vgic_v3_init_lrs); | |
488 | } | |
489 | ||
90977732 EA |
490 | /** |
491 | * kvm_vgic_hyp_init: populates the kvm_vgic_global_state variable | |
492 | * according to the host GIC model. Accordingly calls either | |
493 | * vgic_v2/v3_probe which registers the KVM_DEVICE that can be | |
494 | * instantiated by a guest later on . | |
495 | */ | |
496 | int kvm_vgic_hyp_init(void) | |
497 | { | |
498 | const struct gic_kvm_info *gic_kvm_info; | |
499 | int ret; | |
500 | ||
501 | gic_kvm_info = gic_get_kvm_info(); | |
502 | if (!gic_kvm_info) | |
503 | return -ENODEV; | |
504 | ||
505 | if (!gic_kvm_info->maint_irq) { | |
506 | kvm_err("No vgic maintenance irq\n"); | |
507 | return -ENXIO; | |
508 | } | |
509 | ||
510 | switch (gic_kvm_info->type) { | |
511 | case GIC_V2: | |
512 | ret = vgic_v2_probe(gic_kvm_info); | |
513 | break; | |
514 | case GIC_V3: | |
515 | ret = vgic_v3_probe(gic_kvm_info); | |
5a7a8426 VM |
516 | if (!ret) { |
517 | static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif); | |
518 | kvm_info("GIC system register CPU interface enabled\n"); | |
519 | } | |
90977732 EA |
520 | break; |
521 | default: | |
522 | ret = -ENODEV; | |
926c6156 | 523 | } |
90977732 EA |
524 | |
525 | if (ret) | |
526 | return ret; | |
527 | ||
528 | kvm_vgic_global_state.maint_irq = gic_kvm_info->maint_irq; | |
529 | ret = request_percpu_irq(kvm_vgic_global_state.maint_irq, | |
530 | vgic_maintenance_handler, | |
531 | "vgic", kvm_get_running_vcpus()); | |
532 | if (ret) { | |
533 | kvm_err("Cannot register interrupt %d\n", | |
534 | kvm_vgic_global_state.maint_irq); | |
535 | return ret; | |
536 | } | |
537 | ||
15d7e3d3 | 538 | ret = cpuhp_setup_state(CPUHP_AP_KVM_ARM_VGIC_INIT_STARTING, |
73c1b41e | 539 | "kvm/arm/vgic:starting", |
15d7e3d3 | 540 | vgic_init_cpu_starting, vgic_init_cpu_dying); |
90977732 EA |
541 | if (ret) { |
542 | kvm_err("Cannot register vgic CPU notifier\n"); | |
543 | goto out_free_irq; | |
544 | } | |
545 | ||
90977732 EA |
546 | kvm_info("vgic interrupt IRQ%d\n", kvm_vgic_global_state.maint_irq); |
547 | return 0; | |
548 | ||
549 | out_free_irq: | |
550 | free_percpu_irq(kvm_vgic_global_state.maint_irq, | |
551 | kvm_get_running_vcpus()); | |
552 | return ret; | |
553 | } |