Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski...
[linux-2.6-block.git] / sound / soc / intel / skylake / skl-topology.c
CommitLineData
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1/*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/firmware.h>
22#include <sound/soc.h>
23#include <sound/soc-topology.h>
24#include "skl-sst-dsp.h"
25#include "skl-sst-ipc.h"
26#include "skl-topology.h"
27#include "skl.h"
28#include "skl-tplg-interface.h"
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29#include "../common/sst-dsp.h"
30#include "../common/sst-dsp-priv.h"
e4e2d2f4 31
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32#define SKL_CH_FIXUP_MASK (1 << 0)
33#define SKL_RATE_FIXUP_MASK (1 << 1)
34#define SKL_FMT_FIXUP_MASK (1 << 2)
35
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36/*
37 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
38 * ignore. This helpers checks if the SKL driver handles this widget type
39 */
40static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
41{
42 switch (w->id) {
43 case snd_soc_dapm_dai_link:
44 case snd_soc_dapm_dai_in:
45 case snd_soc_dapm_aif_in:
46 case snd_soc_dapm_aif_out:
47 case snd_soc_dapm_dai_out:
48 case snd_soc_dapm_switch:
49 return false;
50 default:
51 return true;
52 }
53}
54
55/*
56 * Each pipelines needs memory to be allocated. Check if we have free memory
9ba8ffef 57 * from available pool.
e4e2d2f4 58 */
9ba8ffef 59static bool skl_is_pipe_mem_avail(struct skl *skl,
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60 struct skl_module_cfg *mconfig)
61{
62 struct skl_sst *ctx = skl->skl_sst;
63
64 if (skl->resource.mem + mconfig->pipe->memory_pages >
65 skl->resource.max_mem) {
66 dev_err(ctx->dev,
67 "%s: module_id %d instance %d\n", __func__,
68 mconfig->id.module_id,
69 mconfig->id.instance_id);
70 dev_err(ctx->dev,
71 "exceeds ppl memory available %d mem %d\n",
72 skl->resource.max_mem, skl->resource.mem);
73 return false;
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74 } else {
75 return true;
e4e2d2f4 76 }
9ba8ffef 77}
e4e2d2f4 78
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79/*
80 * Add the mem to the mem pool. This is freed when pipe is deleted.
81 * Note: DSP does actual memory management we only keep track for complete
82 * pool
83 */
84static void skl_tplg_alloc_pipe_mem(struct skl *skl,
85 struct skl_module_cfg *mconfig)
86{
e4e2d2f4 87 skl->resource.mem += mconfig->pipe->memory_pages;
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88}
89
90/*
91 * Pipeline needs needs DSP CPU resources for computation, this is
92 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
93 *
94 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
9ba8ffef 95 * pipe.
e4e2d2f4 96 */
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97
98static bool skl_is_pipe_mcps_avail(struct skl *skl,
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99 struct skl_module_cfg *mconfig)
100{
101 struct skl_sst *ctx = skl->skl_sst;
102
103 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
104 dev_err(ctx->dev,
105 "%s: module_id %d instance %d\n", __func__,
106 mconfig->id.module_id, mconfig->id.instance_id);
107 dev_err(ctx->dev,
7ca42f5a 108 "exceeds ppl mcps available %d > mem %d\n",
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109 skl->resource.max_mcps, skl->resource.mcps);
110 return false;
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111 } else {
112 return true;
e4e2d2f4 113 }
9ba8ffef 114}
e4e2d2f4 115
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116static void skl_tplg_alloc_pipe_mcps(struct skl *skl,
117 struct skl_module_cfg *mconfig)
118{
e4e2d2f4 119 skl->resource.mcps += mconfig->mcps;
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120}
121
122/*
123 * Free the mcps when tearing down
124 */
125static void
126skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
127{
128 skl->resource.mcps -= mconfig->mcps;
129}
130
131/*
132 * Free the memory when tearing down
133 */
134static void
135skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
136{
137 skl->resource.mem -= mconfig->pipe->memory_pages;
138}
139
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140
141static void skl_dump_mconfig(struct skl_sst *ctx,
142 struct skl_module_cfg *mcfg)
143{
144 dev_dbg(ctx->dev, "Dumping config\n");
145 dev_dbg(ctx->dev, "Input Format:\n");
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146 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels);
147 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq);
148 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg);
149 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth);
f7590d4f 150 dev_dbg(ctx->dev, "Output Format:\n");
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151 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels);
152 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq);
153 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth);
154 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg);
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155}
156
157static void skl_tplg_update_params(struct skl_module_fmt *fmt,
158 struct skl_pipe_params *params, int fixup)
159{
160 if (fixup & SKL_RATE_FIXUP_MASK)
161 fmt->s_freq = params->s_freq;
162 if (fixup & SKL_CH_FIXUP_MASK)
163 fmt->channels = params->ch;
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164 if (fixup & SKL_FMT_FIXUP_MASK) {
165 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
166
167 /*
168 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
169 * container so update bit depth accordingly
170 */
171 switch (fmt->valid_bit_depth) {
172 case SKL_DEPTH_16BIT:
173 fmt->bit_depth = fmt->valid_bit_depth;
174 break;
175
176 default:
177 fmt->bit_depth = SKL_DEPTH_32BIT;
178 break;
179 }
180 }
181
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182}
183
184/*
185 * A pipeline may have modules which impact the pcm parameters, like SRC,
186 * channel converter, format converter.
187 * We need to calculate the output params by applying the 'fixup'
188 * Topology will tell driver which type of fixup is to be applied by
189 * supplying the fixup mask, so based on that we calculate the output
190 *
191 * Now In FE the pcm hw_params is source/target format. Same is applicable
192 * for BE with its hw_params invoked.
193 * here based on FE, BE pipeline and direction we calculate the input and
194 * outfix and then apply that for a module
195 */
196static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
197 struct skl_pipe_params *params, bool is_fe)
198{
199 int in_fixup, out_fixup;
200 struct skl_module_fmt *in_fmt, *out_fmt;
201
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202 /* Fixups will be applied to pin 0 only */
203 in_fmt = &m_cfg->in_fmt[0];
204 out_fmt = &m_cfg->out_fmt[0];
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205
206 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
207 if (is_fe) {
208 in_fixup = m_cfg->params_fixup;
209 out_fixup = (~m_cfg->converter) &
210 m_cfg->params_fixup;
211 } else {
212 out_fixup = m_cfg->params_fixup;
213 in_fixup = (~m_cfg->converter) &
214 m_cfg->params_fixup;
215 }
216 } else {
217 if (is_fe) {
218 out_fixup = m_cfg->params_fixup;
219 in_fixup = (~m_cfg->converter) &
220 m_cfg->params_fixup;
221 } else {
222 in_fixup = m_cfg->params_fixup;
223 out_fixup = (~m_cfg->converter) &
224 m_cfg->params_fixup;
225 }
226 }
227
228 skl_tplg_update_params(in_fmt, params, in_fixup);
229 skl_tplg_update_params(out_fmt, params, out_fixup);
230}
231
232/*
233 * A module needs input and output buffers, which are dependent upon pcm
234 * params, so once we have calculate params, we need buffer calculation as
235 * well.
236 */
237static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
238 struct skl_module_cfg *mcfg)
239{
240 int multiplier = 1;
4cd9899f 241 struct skl_module_fmt *in_fmt, *out_fmt;
f0c8e1d9 242 int in_rate, out_rate;
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243
244
245 /* Since fixups is applied to pin 0 only, ibs, obs needs
246 * change for pin 0 only
247 */
248 in_fmt = &mcfg->in_fmt[0];
249 out_fmt = &mcfg->out_fmt[0];
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250
251 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
252 multiplier = 5;
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253
254 if (in_fmt->s_freq % 1000)
255 in_rate = (in_fmt->s_freq / 1000) + 1;
256 else
257 in_rate = (in_fmt->s_freq / 1000);
258
259 mcfg->ibs = in_rate * (mcfg->in_fmt->channels) *
260 (mcfg->in_fmt->bit_depth >> 3) *
261 multiplier;
262
263 if (mcfg->out_fmt->s_freq % 1000)
264 out_rate = (mcfg->out_fmt->s_freq / 1000) + 1;
265 else
266 out_rate = (mcfg->out_fmt->s_freq / 1000);
267
268 mcfg->obs = out_rate * (mcfg->out_fmt->channels) *
269 (mcfg->out_fmt->bit_depth >> 3) *
270 multiplier;
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271}
272
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273static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
274 struct skl_sst *ctx)
275{
276 struct skl_module_cfg *m_cfg = w->priv;
277 int link_type, dir;
278 u32 ch, s_freq, s_fmt;
279 struct nhlt_specific_cfg *cfg;
280 struct skl *skl = get_skl_ctx(ctx->dev);
281
282 /* check if we already have blob */
283 if (m_cfg->formats_config.caps_size > 0)
284 return 0;
285
c7c6c736 286 dev_dbg(ctx->dev, "Applying default cfg blob\n");
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287 switch (m_cfg->dev_type) {
288 case SKL_DEVICE_DMIC:
289 link_type = NHLT_LINK_DMIC;
c7c6c736 290 dir = SNDRV_PCM_STREAM_CAPTURE;
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291 s_freq = m_cfg->in_fmt[0].s_freq;
292 s_fmt = m_cfg->in_fmt[0].bit_depth;
293 ch = m_cfg->in_fmt[0].channels;
294 break;
295
296 case SKL_DEVICE_I2S:
297 link_type = NHLT_LINK_SSP;
298 if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) {
c7c6c736 299 dir = SNDRV_PCM_STREAM_PLAYBACK;
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300 s_freq = m_cfg->out_fmt[0].s_freq;
301 s_fmt = m_cfg->out_fmt[0].bit_depth;
302 ch = m_cfg->out_fmt[0].channels;
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303 } else {
304 dir = SNDRV_PCM_STREAM_CAPTURE;
305 s_freq = m_cfg->in_fmt[0].s_freq;
306 s_fmt = m_cfg->in_fmt[0].bit_depth;
307 ch = m_cfg->in_fmt[0].channels;
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308 }
309 break;
310
311 default:
312 return -EINVAL;
313 }
314
315 /* update the blob based on virtual bus_id and default params */
316 cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type,
317 s_fmt, ch, s_freq, dir);
318 if (cfg) {
319 m_cfg->formats_config.caps_size = cfg->size;
320 m_cfg->formats_config.caps = (u32 *) &cfg->caps;
321 } else {
322 dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n",
323 m_cfg->vbus_id, link_type, dir);
324 dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n",
325 ch, s_freq, s_fmt);
326 return -EIO;
327 }
328
329 return 0;
330}
331
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332static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
333 struct skl_sst *ctx)
334{
335 struct skl_module_cfg *m_cfg = w->priv;
336 struct skl_pipe_params *params = m_cfg->pipe->p_params;
337 int p_conn_type = m_cfg->pipe->conn_type;
338 bool is_fe;
339
340 if (!m_cfg->params_fixup)
341 return;
342
343 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
344 w->name);
345
346 skl_dump_mconfig(ctx, m_cfg);
347
348 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
349 is_fe = true;
350 else
351 is_fe = false;
352
353 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
354 skl_tplg_update_buffer_size(ctx, m_cfg);
355
356 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
357 w->name);
358
359 skl_dump_mconfig(ctx, m_cfg);
360}
361
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362/*
363 * A pipe can have multiple modules, each of them will be a DAPM widget as
364 * well. While managing a pipeline we need to get the list of all the
365 * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps
366 * to get the SKL type widgets in that pipeline
367 */
368static int skl_tplg_alloc_pipe_widget(struct device *dev,
369 struct snd_soc_dapm_widget *w, struct skl_pipe *pipe)
370{
371 struct skl_module_cfg *src_module = NULL;
372 struct snd_soc_dapm_path *p = NULL;
373 struct skl_pipe_module *p_module = NULL;
374
375 p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL);
376 if (!p_module)
377 return -ENOMEM;
378
379 p_module->w = w;
380 list_add_tail(&p_module->node, &pipe->w_list);
381
382 snd_soc_dapm_widget_for_each_sink_path(w, p) {
383 if ((p->sink->priv == NULL)
384 && (!is_skl_dsp_widget_type(w)))
385 continue;
386
387 if ((p->sink->priv != NULL) && p->connect
388 && is_skl_dsp_widget_type(p->sink)) {
389
390 src_module = p->sink->priv;
391 if (pipe->ppl_id == src_module->pipe->ppl_id)
392 skl_tplg_alloc_pipe_widget(dev,
393 p->sink, pipe);
394 }
395 }
396 return 0;
397}
398
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399/*
400 * some modules can have multiple params set from user control and
401 * need to be set after module is initialized. If set_param flag is
402 * set module params will be done after module is initialised.
403 */
404static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w,
405 struct skl_sst *ctx)
406{
407 int i, ret;
408 struct skl_module_cfg *mconfig = w->priv;
409 const struct snd_kcontrol_new *k;
410 struct soc_bytes_ext *sb;
411 struct skl_algo_data *bc;
412 struct skl_specific_cfg *sp_cfg;
413
414 if (mconfig->formats_config.caps_size > 0 &&
4ced1827 415 mconfig->formats_config.set_params == SKL_PARAM_SET) {
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416 sp_cfg = &mconfig->formats_config;
417 ret = skl_set_module_params(ctx, sp_cfg->caps,
418 sp_cfg->caps_size,
419 sp_cfg->param_id, mconfig);
420 if (ret < 0)
421 return ret;
422 }
423
424 for (i = 0; i < w->num_kcontrols; i++) {
425 k = &w->kcontrol_news[i];
426 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
427 sb = (void *) k->private_value;
428 bc = (struct skl_algo_data *)sb->dobj.private;
429
4ced1827 430 if (bc->set_params == SKL_PARAM_SET) {
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431 ret = skl_set_module_params(ctx,
432 (u32 *)bc->params, bc->max,
433 bc->param_id, mconfig);
434 if (ret < 0)
435 return ret;
436 }
437 }
438 }
439
440 return 0;
441}
442
443/*
444 * some module param can set from user control and this is required as
445 * when module is initailzed. if module param is required in init it is
446 * identifed by set_param flag. if set_param flag is not set, then this
447 * parameter needs to set as part of module init.
448 */
449static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w)
450{
451 const struct snd_kcontrol_new *k;
452 struct soc_bytes_ext *sb;
453 struct skl_algo_data *bc;
454 struct skl_module_cfg *mconfig = w->priv;
455 int i;
456
457 for (i = 0; i < w->num_kcontrols; i++) {
458 k = &w->kcontrol_news[i];
459 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
460 sb = (struct soc_bytes_ext *)k->private_value;
461 bc = (struct skl_algo_data *)sb->dobj.private;
462
4ced1827 463 if (bc->set_params != SKL_PARAM_INIT)
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464 continue;
465
466 mconfig->formats_config.caps = (u32 *)&bc->params;
467 mconfig->formats_config.caps_size = bc->max;
468
469 break;
470 }
471 }
472
473 return 0;
474}
475
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476/*
477 * Inside a pipe instance, we can have various modules. These modules need
478 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
479 * skl_init_module() routine, so invoke that for all modules in a pipeline
480 */
481static int
482skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
483{
484 struct skl_pipe_module *w_module;
485 struct snd_soc_dapm_widget *w;
486 struct skl_module_cfg *mconfig;
487 struct skl_sst *ctx = skl->skl_sst;
488 int ret = 0;
489
490 list_for_each_entry(w_module, &pipe->w_list, node) {
491 w = w_module->w;
492 mconfig = w->priv;
493
494 /* check resource available */
9ba8ffef 495 if (!skl_is_pipe_mcps_avail(skl, mconfig))
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496 return -ENOMEM;
497
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498 skl_tplg_alloc_pipe_mcps(skl, mconfig);
499
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500 if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {
501 ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
502 mconfig->id.module_id, mconfig->guid);
503 if (ret < 0)
504 return ret;
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505
506 mconfig->m_state = SKL_MODULE_LOADED;
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507 }
508
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509 /* update blob if blob is null for be with default value */
510 skl_tplg_update_be_blob(w, ctx);
511
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512 /*
513 * apply fix/conversion to module params based on
514 * FE/BE params
515 */
516 skl_tplg_update_module_params(w, ctx);
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517
518 skl_tplg_set_module_init_data(w);
9939a9c3 519 ret = skl_init_module(ctx, mconfig);
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520 if (ret < 0)
521 return ret;
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522
523 ret = skl_tplg_set_module_params(w, ctx);
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524 if (ret < 0)
525 return ret;
526 }
527
528 return 0;
529}
d93f8e55 530
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531static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx,
532 struct skl_pipe *pipe)
533{
534 struct skl_pipe_module *w_module = NULL;
535 struct skl_module_cfg *mconfig = NULL;
536
537 list_for_each_entry(w_module, &pipe->w_list, node) {
538 mconfig = w_module->w->priv;
539
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540 if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod &&
541 mconfig->m_state > SKL_MODULE_UNINIT)
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542 return ctx->dsp->fw_ops.unload_mod(ctx->dsp,
543 mconfig->id.module_id);
544 }
545
546 /* no modules to unload in this path, so return */
547 return 0;
548}
549
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550/*
551 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
552 * need create the pipeline. So we do following:
553 * - check the resources
554 * - Create the pipeline
555 * - Initialize the modules in pipeline
556 * - finally bind all modules together
557 */
558static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
559 struct skl *skl)
560{
561 int ret;
562 struct skl_module_cfg *mconfig = w->priv;
563 struct skl_pipe_module *w_module;
564 struct skl_pipe *s_pipe = mconfig->pipe;
565 struct skl_module_cfg *src_module = NULL, *dst_module;
566 struct skl_sst *ctx = skl->skl_sst;
567
568 /* check resource available */
9ba8ffef 569 if (!skl_is_pipe_mcps_avail(skl, mconfig))
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570 return -EBUSY;
571
9ba8ffef 572 if (!skl_is_pipe_mem_avail(skl, mconfig))
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573 return -ENOMEM;
574
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575 skl_tplg_alloc_pipe_mem(skl, mconfig);
576 skl_tplg_alloc_pipe_mcps(skl, mconfig);
577
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578 /*
579 * Create a list of modules for pipe.
580 * This list contains modules from source to sink
581 */
582 ret = skl_create_pipeline(ctx, mconfig->pipe);
583 if (ret < 0)
584 return ret;
585
586 /*
587 * we create a w_list of all widgets in that pipe. This list is not
588 * freed on PMD event as widgets within a pipe are static. This
589 * saves us cycles to get widgets in pipe every time.
590 *
591 * So if we have already initialized all the widgets of a pipeline
592 * we skip, so check for list_empty and create the list if empty
593 */
594 if (list_empty(&s_pipe->w_list)) {
595 ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe);
596 if (ret < 0)
597 return ret;
598 }
599
600 /* Init all pipe modules from source to sink */
601 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
602 if (ret < 0)
603 return ret;
604
605 /* Bind modules from source to sink */
606 list_for_each_entry(w_module, &s_pipe->w_list, node) {
607 dst_module = w_module->w->priv;
608
609 if (src_module == NULL) {
610 src_module = dst_module;
611 continue;
612 }
613
614 ret = skl_bind_modules(ctx, src_module, dst_module);
615 if (ret < 0)
616 return ret;
617
618 src_module = dst_module;
619 }
620
621 return 0;
622}
623
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624/*
625 * Some modules require params to be set after the module is bound to
626 * all pins connected.
627 *
628 * The module provider initializes set_param flag for such modules and we
629 * send params after binding
630 */
631static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w,
632 struct skl_module_cfg *mcfg, struct skl_sst *ctx)
633{
634 int i, ret;
635 struct skl_module_cfg *mconfig = w->priv;
636 const struct snd_kcontrol_new *k;
637 struct soc_bytes_ext *sb;
638 struct skl_algo_data *bc;
639 struct skl_specific_cfg *sp_cfg;
640
641 /*
642 * check all out/in pins are in bind state.
643 * if so set the module param
644 */
645 for (i = 0; i < mcfg->max_out_queue; i++) {
646 if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE)
647 return 0;
648 }
649
650 for (i = 0; i < mcfg->max_in_queue; i++) {
651 if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE)
652 return 0;
653 }
654
655 if (mconfig->formats_config.caps_size > 0 &&
656 mconfig->formats_config.set_params == SKL_PARAM_BIND) {
657 sp_cfg = &mconfig->formats_config;
658 ret = skl_set_module_params(ctx, sp_cfg->caps,
659 sp_cfg->caps_size,
660 sp_cfg->param_id, mconfig);
661 if (ret < 0)
662 return ret;
663 }
664
665 for (i = 0; i < w->num_kcontrols; i++) {
666 k = &w->kcontrol_news[i];
667 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
668 sb = (void *) k->private_value;
669 bc = (struct skl_algo_data *)sb->dobj.private;
670
671 if (bc->set_params == SKL_PARAM_BIND) {
672 ret = skl_set_module_params(ctx,
673 (u32 *)bc->params, bc->max,
674 bc->param_id, mconfig);
675 if (ret < 0)
676 return ret;
677 }
678 }
679 }
680
681 return 0;
682}
683
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684static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
685 struct skl *skl,
6bd4cf85 686 struct snd_soc_dapm_widget *src_w,
8724ff17 687 struct skl_module_cfg *src_mconfig)
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688{
689 struct snd_soc_dapm_path *p;
0ed95d76 690 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
8724ff17 691 struct skl_module_cfg *sink_mconfig;
d93f8e55 692 struct skl_sst *ctx = skl->skl_sst;
8724ff17 693 int ret;
d93f8e55 694
8724ff17 695 snd_soc_dapm_widget_for_each_sink_path(w, p) {
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696 if (!p->connect)
697 continue;
698
699 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
700 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
701
0ed95d76 702 next_sink = p->sink;
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703
704 if (!is_skl_dsp_widget_type(p->sink))
705 return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig);
706
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707 /*
708 * here we will check widgets in sink pipelines, so that
709 * can be any widgets type and we are only interested if
710 * they are ones used for SKL so check that first
711 */
712 if ((p->sink->priv != NULL) &&
713 is_skl_dsp_widget_type(p->sink)) {
714
715 sink = p->sink;
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716 sink_mconfig = sink->priv;
717
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718 if (src_mconfig->m_state == SKL_MODULE_UNINIT ||
719 sink_mconfig->m_state == SKL_MODULE_UNINIT)
720 continue;
721
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722 /* Bind source to sink, mixin is always source */
723 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
724 if (ret)
725 return ret;
726
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727 /* set module params after bind */
728 skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx);
729 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
730
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731 /* Start sinks pipe first */
732 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
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733 if (sink_mconfig->pipe->conn_type !=
734 SKL_PIPE_CONN_TYPE_FE)
735 ret = skl_run_pipe(ctx,
736 sink_mconfig->pipe);
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737 if (ret)
738 return ret;
739 }
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740 }
741 }
742
8724ff17 743 if (!sink)
6bd4cf85 744 return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig);
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745
746 return 0;
747}
748
749/*
750 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
751 * we need to do following:
752 * - Bind to sink pipeline
753 * Since the sink pipes can be running and we don't get mixer event on
754 * connect for already running mixer, we need to find the sink pipes
755 * here and bind to them. This way dynamic connect works.
756 * - Start sink pipeline, if not running
757 * - Then run current pipe
758 */
759static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
760 struct skl *skl)
761{
762 struct skl_module_cfg *src_mconfig;
763 struct skl_sst *ctx = skl->skl_sst;
764 int ret = 0;
765
766 src_mconfig = w->priv;
767
768 /*
769 * find which sink it is connected to, bind with the sink,
770 * if sink is not started, start sink pipe first, then start
771 * this pipe
772 */
6bd4cf85 773 ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig);
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774 if (ret)
775 return ret;
776
d93f8e55 777 /* Start source pipe last after starting all sinks */
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778 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
779 return skl_run_pipe(ctx, src_mconfig->pipe);
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780
781 return 0;
782}
783
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784static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
785 struct snd_soc_dapm_widget *w, struct skl *skl)
786{
787 struct snd_soc_dapm_path *p;
788 struct snd_soc_dapm_widget *src_w = NULL;
789 struct skl_sst *ctx = skl->skl_sst;
790
791 snd_soc_dapm_widget_for_each_source_path(w, p) {
792 src_w = p->source;
793 if (!p->connect)
794 continue;
795
796 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
797 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
798
799 /*
800 * here we will check widgets in sink pipelines, so that can
801 * be any widgets type and we are only interested if they are
802 * ones used for SKL so check that first
803 */
804 if ((p->source->priv != NULL) &&
805 is_skl_dsp_widget_type(p->source)) {
806 return p->source;
807 }
808 }
809
810 if (src_w != NULL)
811 return skl_get_src_dsp_widget(src_w, skl);
812
813 return NULL;
814}
815
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816/*
817 * in the Post-PMU event of mixer we need to do following:
818 * - Check if this pipe is running
819 * - if not, then
820 * - bind this pipeline to its source pipeline
821 * if source pipe is already running, this means it is a dynamic
822 * connection and we need to bind only to that pipe
823 * - start this pipeline
824 */
825static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
826 struct skl *skl)
827{
828 int ret = 0;
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829 struct snd_soc_dapm_widget *source, *sink;
830 struct skl_module_cfg *src_mconfig, *sink_mconfig;
831 struct skl_sst *ctx = skl->skl_sst;
832 int src_pipe_started = 0;
833
834 sink = w;
835 sink_mconfig = sink->priv;
836
837 /*
838 * If source pipe is already started, that means source is driving
839 * one more sink before this sink got connected, Since source is
840 * started, bind this sink to source and start this pipe.
841 */
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842 source = skl_get_src_dsp_widget(w, skl);
843 if (source != NULL) {
844 src_mconfig = source->priv;
845 sink_mconfig = sink->priv;
846 src_pipe_started = 1;
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847
848 /*
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849 * check pipe state, then no need to bind or start the
850 * pipe
d93f8e55 851 */
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852 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
853 src_pipe_started = 0;
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854 }
855
856 if (src_pipe_started) {
857 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
858 if (ret)
859 return ret;
860
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861 /* set module params after bind */
862 skl_tplg_set_module_bind_params(source, src_mconfig, ctx);
863 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
864
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865 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
866 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
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867 }
868
869 return ret;
870}
871
872/*
873 * in the Pre-PMD event of mixer we need to do following:
874 * - Stop the pipe
875 * - find the source connections and remove that from dapm_path_list
876 * - unbind with source pipelines if still connected
877 */
878static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
879 struct skl *skl)
880{
d93f8e55 881 struct skl_module_cfg *src_mconfig, *sink_mconfig;
ce1b5551 882 int ret = 0, i;
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883 struct skl_sst *ctx = skl->skl_sst;
884
ce1b5551 885 sink_mconfig = w->priv;
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886
887 /* Stop the pipe */
888 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
889 if (ret)
890 return ret;
891
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892 for (i = 0; i < sink_mconfig->max_in_queue; i++) {
893 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
894 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
895 if (!src_mconfig)
896 continue;
897 /*
898 * If path_found == 1, that means pmd for source
899 * pipe has not occurred, source is connected to
900 * some other sink. so its responsibility of sink
901 * to unbind itself from source.
902 */
903 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
904 if (ret < 0)
905 return ret;
d93f8e55 906
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907 ret = skl_unbind_modules(ctx,
908 src_mconfig, sink_mconfig);
d93f8e55 909 }
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910 }
911
912 return ret;
913}
914
915/*
916 * in the Post-PMD event of mixer we need to do following:
917 * - Free the mcps used
918 * - Free the mem used
919 * - Unbind the modules within the pipeline
920 * - Delete the pipeline (modules are not required to be explicitly
921 * deleted, pipeline delete is enough here
922 */
923static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
924 struct skl *skl)
925{
926 struct skl_module_cfg *mconfig = w->priv;
927 struct skl_pipe_module *w_module;
928 struct skl_module_cfg *src_module = NULL, *dst_module;
929 struct skl_sst *ctx = skl->skl_sst;
930 struct skl_pipe *s_pipe = mconfig->pipe;
931 int ret = 0;
932
933 skl_tplg_free_pipe_mcps(skl, mconfig);
65976878 934 skl_tplg_free_pipe_mem(skl, mconfig);
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935
936 list_for_each_entry(w_module, &s_pipe->w_list, node) {
937 dst_module = w_module->w->priv;
938
7ae3cb15 939 skl_tplg_free_pipe_mcps(skl, dst_module);
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940 if (src_module == NULL) {
941 src_module = dst_module;
942 continue;
943 }
944
7ca42f5a 945 skl_unbind_modules(ctx, src_module, dst_module);
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946 src_module = dst_module;
947 }
948
949 ret = skl_delete_pipe(ctx, mconfig->pipe);
d93f8e55 950
6c5768b3 951 return skl_tplg_unload_pipe_modules(ctx, s_pipe);
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952}
953
954/*
955 * in the Post-PMD event of PGA we need to do following:
956 * - Free the mcps used
957 * - Stop the pipeline
958 * - In source pipe is connected, unbind with source pipelines
959 */
960static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
961 struct skl *skl)
962{
d93f8e55 963 struct skl_module_cfg *src_mconfig, *sink_mconfig;
ce1b5551 964 int ret = 0, i;
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965 struct skl_sst *ctx = skl->skl_sst;
966
ce1b5551 967 src_mconfig = w->priv;
d93f8e55 968
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969 /* Stop the pipe since this is a mixin module */
970 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
971 if (ret)
972 return ret;
973
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974 for (i = 0; i < src_mconfig->max_out_queue; i++) {
975 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
976 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
977 if (!sink_mconfig)
978 continue;
979 /*
980 * This is a connecter and if path is found that means
981 * unbind between source and sink has not happened yet
982 */
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983 ret = skl_unbind_modules(ctx, src_mconfig,
984 sink_mconfig);
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985 }
986 }
987
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988 return ret;
989}
990
991/*
992 * In modelling, we assume there will be ONLY one mixer in a pipeline. If
993 * mixer is not required then it is treated as static mixer aka vmixer with
994 * a hard path to source module
995 * So we don't need to check if source is started or not as hard path puts
996 * dependency on each other
997 */
998static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
999 struct snd_kcontrol *k, int event)
1000{
1001 struct snd_soc_dapm_context *dapm = w->dapm;
1002 struct skl *skl = get_skl_ctx(dapm->dev);
1003
1004 switch (event) {
1005 case SND_SOC_DAPM_PRE_PMU:
1006 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1007
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1008 case SND_SOC_DAPM_POST_PMU:
1009 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1010
1011 case SND_SOC_DAPM_PRE_PMD:
1012 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1013
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1014 case SND_SOC_DAPM_POST_PMD:
1015 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1016 }
1017
1018 return 0;
1019}
1020
1021/*
1022 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
1023 * second one is required that is created as another pipe entity.
1024 * The mixer is responsible for pipe management and represent a pipeline
1025 * instance
1026 */
1027static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
1028 struct snd_kcontrol *k, int event)
1029{
1030 struct snd_soc_dapm_context *dapm = w->dapm;
1031 struct skl *skl = get_skl_ctx(dapm->dev);
1032
1033 switch (event) {
1034 case SND_SOC_DAPM_PRE_PMU:
1035 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1036
1037 case SND_SOC_DAPM_POST_PMU:
1038 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1039
1040 case SND_SOC_DAPM_PRE_PMD:
1041 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1042
1043 case SND_SOC_DAPM_POST_PMD:
1044 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1045 }
1046
1047 return 0;
1048}
1049
1050/*
1051 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
1052 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
1053 * the sink when it is running (two FE to one BE or one FE to two BE)
1054 * scenarios
1055 */
1056static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
1057 struct snd_kcontrol *k, int event)
1058
1059{
1060 struct snd_soc_dapm_context *dapm = w->dapm;
1061 struct skl *skl = get_skl_ctx(dapm->dev);
1062
1063 switch (event) {
1064 case SND_SOC_DAPM_PRE_PMU:
1065 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
1066
1067 case SND_SOC_DAPM_POST_PMD:
1068 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
1069 }
1070
1071 return 0;
1072}
cfb0a873 1073
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1074static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
1075 unsigned int __user *data, unsigned int size)
1076{
1077 struct soc_bytes_ext *sb =
1078 (struct soc_bytes_ext *)kcontrol->private_value;
1079 struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private;
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1080 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1081 struct skl_module_cfg *mconfig = w->priv;
1082 struct skl *skl = get_skl_ctx(w->dapm->dev);
1083
1084 if (w->power)
1085 skl_get_module_params(skl->skl_sst, (u32 *)bc->params,
1086 bc->max, bc->param_id, mconfig);
140adfba 1087
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1088 /* decrement size for TLV header */
1089 size -= 2 * sizeof(u32);
1090
1091 /* check size as we don't want to send kernel data */
1092 if (size > bc->max)
1093 size = bc->max;
1094
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1095 if (bc->params) {
1096 if (copy_to_user(data, &bc->param_id, sizeof(u32)))
1097 return -EFAULT;
e8bc3c99 1098 if (copy_to_user(data + 1, &size, sizeof(u32)))
140adfba 1099 return -EFAULT;
e8bc3c99 1100 if (copy_to_user(data + 2, bc->params, size))
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1101 return -EFAULT;
1102 }
1103
1104 return 0;
1105}
1106
1107#define SKL_PARAM_VENDOR_ID 0xff
1108
1109static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
1110 const unsigned int __user *data, unsigned int size)
1111{
1112 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1113 struct skl_module_cfg *mconfig = w->priv;
1114 struct soc_bytes_ext *sb =
1115 (struct soc_bytes_ext *)kcontrol->private_value;
1116 struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private;
1117 struct skl *skl = get_skl_ctx(w->dapm->dev);
1118
1119 if (ac->params) {
1120 /*
1121 * if the param_is is of type Vendor, firmware expects actual
1122 * parameter id and size from the control.
1123 */
1124 if (ac->param_id == SKL_PARAM_VENDOR_ID) {
1125 if (copy_from_user(ac->params, data, size))
1126 return -EFAULT;
1127 } else {
1128 if (copy_from_user(ac->params,
65b4bcb8 1129 data + 2, size))
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1130 return -EFAULT;
1131 }
1132
1133 if (w->power)
1134 return skl_set_module_params(skl->skl_sst,
1135 (u32 *)ac->params, ac->max,
1136 ac->param_id, mconfig);
1137 }
1138
1139 return 0;
1140}
1141
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1142/*
1143 * The FE params are passed by hw_params of the DAI.
1144 * On hw_params, the params are stored in Gateway module of the FE and we
1145 * need to calculate the format in DSP module configuration, that
1146 * conversion is done here
1147 */
1148int skl_tplg_update_pipe_params(struct device *dev,
1149 struct skl_module_cfg *mconfig,
1150 struct skl_pipe_params *params)
1151{
1152 struct skl_pipe *pipe = mconfig->pipe;
1153 struct skl_module_fmt *format = NULL;
1154
1155 memcpy(pipe->p_params, params, sizeof(*params));
1156
1157 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
4cd9899f 1158 format = &mconfig->in_fmt[0];
cfb0a873 1159 else
4cd9899f 1160 format = &mconfig->out_fmt[0];
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1161
1162 /* set the hw_params */
1163 format->s_freq = params->s_freq;
1164 format->channels = params->ch;
1165 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
1166
1167 /*
1168 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
1169 * container so update bit depth accordingly
1170 */
1171 switch (format->valid_bit_depth) {
1172 case SKL_DEPTH_16BIT:
1173 format->bit_depth = format->valid_bit_depth;
1174 break;
1175
1176 case SKL_DEPTH_24BIT:
6654f39e 1177 case SKL_DEPTH_32BIT:
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1178 format->bit_depth = SKL_DEPTH_32BIT;
1179 break;
1180
1181 default:
1182 dev_err(dev, "Invalid bit depth %x for pipe\n",
1183 format->valid_bit_depth);
1184 return -EINVAL;
1185 }
1186
1187 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1188 mconfig->ibs = (format->s_freq / 1000) *
1189 (format->channels) *
1190 (format->bit_depth >> 3);
1191 } else {
1192 mconfig->obs = (format->s_freq / 1000) *
1193 (format->channels) *
1194 (format->bit_depth >> 3);
1195 }
1196
1197 return 0;
1198}
1199
1200/*
1201 * Query the module config for the FE DAI
1202 * This is used to find the hw_params set for that DAI and apply to FE
1203 * pipeline
1204 */
1205struct skl_module_cfg *
1206skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
1207{
1208 struct snd_soc_dapm_widget *w;
1209 struct snd_soc_dapm_path *p = NULL;
1210
1211 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1212 w = dai->playback_widget;
f0900eb2 1213 snd_soc_dapm_widget_for_each_sink_path(w, p) {
cfb0a873 1214 if (p->connect && p->sink->power &&
a28f51db 1215 !is_skl_dsp_widget_type(p->sink))
cfb0a873
VK
1216 continue;
1217
1218 if (p->sink->priv) {
1219 dev_dbg(dai->dev, "set params for %s\n",
1220 p->sink->name);
1221 return p->sink->priv;
1222 }
1223 }
1224 } else {
1225 w = dai->capture_widget;
f0900eb2 1226 snd_soc_dapm_widget_for_each_source_path(w, p) {
cfb0a873 1227 if (p->connect && p->source->power &&
a28f51db 1228 !is_skl_dsp_widget_type(p->source))
cfb0a873
VK
1229 continue;
1230
1231 if (p->source->priv) {
1232 dev_dbg(dai->dev, "set params for %s\n",
1233 p->source->name);
1234 return p->source->priv;
1235 }
1236 }
1237 }
1238
1239 return NULL;
1240}
1241
718a42b5
D
1242static struct skl_module_cfg *skl_get_mconfig_pb_cpr(
1243 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1244{
1245 struct snd_soc_dapm_path *p;
1246 struct skl_module_cfg *mconfig = NULL;
1247
1248 snd_soc_dapm_widget_for_each_source_path(w, p) {
1249 if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) {
1250 if (p->connect &&
1251 (p->sink->id == snd_soc_dapm_aif_out) &&
1252 p->source->priv) {
1253 mconfig = p->source->priv;
1254 return mconfig;
1255 }
1256 mconfig = skl_get_mconfig_pb_cpr(dai, p->source);
1257 if (mconfig)
1258 return mconfig;
1259 }
1260 }
1261 return mconfig;
1262}
1263
1264static struct skl_module_cfg *skl_get_mconfig_cap_cpr(
1265 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1266{
1267 struct snd_soc_dapm_path *p;
1268 struct skl_module_cfg *mconfig = NULL;
1269
1270 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1271 if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) {
1272 if (p->connect &&
1273 (p->source->id == snd_soc_dapm_aif_in) &&
1274 p->sink->priv) {
1275 mconfig = p->sink->priv;
1276 return mconfig;
1277 }
1278 mconfig = skl_get_mconfig_cap_cpr(dai, p->sink);
1279 if (mconfig)
1280 return mconfig;
1281 }
1282 }
1283 return mconfig;
1284}
1285
1286struct skl_module_cfg *
1287skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream)
1288{
1289 struct snd_soc_dapm_widget *w;
1290 struct skl_module_cfg *mconfig;
1291
1292 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1293 w = dai->playback_widget;
1294 mconfig = skl_get_mconfig_pb_cpr(dai, w);
1295 } else {
1296 w = dai->capture_widget;
1297 mconfig = skl_get_mconfig_cap_cpr(dai, w);
1298 }
1299 return mconfig;
1300}
1301
cfb0a873
VK
1302static u8 skl_tplg_be_link_type(int dev_type)
1303{
1304 int ret;
1305
1306 switch (dev_type) {
1307 case SKL_DEVICE_BT:
1308 ret = NHLT_LINK_SSP;
1309 break;
1310
1311 case SKL_DEVICE_DMIC:
1312 ret = NHLT_LINK_DMIC;
1313 break;
1314
1315 case SKL_DEVICE_I2S:
1316 ret = NHLT_LINK_SSP;
1317 break;
1318
1319 case SKL_DEVICE_HDALINK:
1320 ret = NHLT_LINK_HDA;
1321 break;
1322
1323 default:
1324 ret = NHLT_LINK_INVALID;
1325 break;
1326 }
1327
1328 return ret;
1329}
1330
1331/*
1332 * Fill the BE gateway parameters
1333 * The BE gateway expects a blob of parameters which are kept in the ACPI
1334 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
1335 * The port can have multiple settings so pick based on the PCM
1336 * parameters
1337 */
1338static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
1339 struct skl_module_cfg *mconfig,
1340 struct skl_pipe_params *params)
1341{
1342 struct skl_pipe *pipe = mconfig->pipe;
1343 struct nhlt_specific_cfg *cfg;
1344 struct skl *skl = get_skl_ctx(dai->dev);
1345 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
1346
1347 memcpy(pipe->p_params, params, sizeof(*params));
1348
b30c275e
JK
1349 if (link_type == NHLT_LINK_HDA)
1350 return 0;
1351
cfb0a873
VK
1352 /* update the blob based on virtual bus_id*/
1353 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
1354 params->s_fmt, params->ch,
1355 params->s_freq, params->stream);
1356 if (cfg) {
1357 mconfig->formats_config.caps_size = cfg->size;
bc03281a 1358 mconfig->formats_config.caps = (u32 *) &cfg->caps;
cfb0a873
VK
1359 } else {
1360 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
1361 mconfig->vbus_id, link_type,
1362 params->stream);
1363 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
1364 params->ch, params->s_freq, params->s_fmt);
1365 return -EINVAL;
1366 }
1367
1368 return 0;
1369}
1370
1371static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
1372 struct snd_soc_dapm_widget *w,
1373 struct skl_pipe_params *params)
1374{
1375 struct snd_soc_dapm_path *p;
4d8adccb 1376 int ret = -EIO;
cfb0a873 1377
f0900eb2 1378 snd_soc_dapm_widget_for_each_source_path(w, p) {
cfb0a873
VK
1379 if (p->connect && is_skl_dsp_widget_type(p->source) &&
1380 p->source->priv) {
1381
9a03cb49
JK
1382 ret = skl_tplg_be_fill_pipe_params(dai,
1383 p->source->priv, params);
1384 if (ret < 0)
1385 return ret;
cfb0a873 1386 } else {
9a03cb49
JK
1387 ret = skl_tplg_be_set_src_pipe_params(dai,
1388 p->source, params);
4d8adccb
SP
1389 if (ret < 0)
1390 return ret;
cfb0a873
VK
1391 }
1392 }
1393
4d8adccb 1394 return ret;
cfb0a873
VK
1395}
1396
1397static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
1398 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
1399{
1400 struct snd_soc_dapm_path *p = NULL;
4d8adccb 1401 int ret = -EIO;
cfb0a873 1402
f0900eb2 1403 snd_soc_dapm_widget_for_each_sink_path(w, p) {
cfb0a873
VK
1404 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
1405 p->sink->priv) {
1406
9a03cb49
JK
1407 ret = skl_tplg_be_fill_pipe_params(dai,
1408 p->sink->priv, params);
1409 if (ret < 0)
1410 return ret;
cfb0a873 1411 } else {
4d8adccb 1412 ret = skl_tplg_be_set_sink_pipe_params(
cfb0a873 1413 dai, p->sink, params);
4d8adccb
SP
1414 if (ret < 0)
1415 return ret;
cfb0a873
VK
1416 }
1417 }
1418
4d8adccb 1419 return ret;
cfb0a873
VK
1420}
1421
1422/*
1423 * BE hw_params can be a source parameters (capture) or sink parameters
1424 * (playback). Based on sink and source we need to either find the source
1425 * list or the sink list and set the pipeline parameters
1426 */
1427int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1428 struct skl_pipe_params *params)
1429{
1430 struct snd_soc_dapm_widget *w;
1431
1432 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1433 w = dai->playback_widget;
1434
1435 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1436
1437 } else {
1438 w = dai->capture_widget;
1439
1440 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1441 }
1442
1443 return 0;
1444}
3af36706
VK
1445
1446static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1447 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1448 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
1449 {SKL_PGA_EVENT, skl_tplg_pga_event},
1450};
1451
140adfba
JK
1452static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = {
1453 {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get,
1454 skl_tplg_tlv_control_set},
1455};
1456
3af36706
VK
1457/*
1458 * The topology binary passes the pin info for a module so initialize the pin
1459 * info passed into module instance
1460 */
6abca1d7
JK
1461static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin,
1462 struct skl_module_pin *m_pin,
1463 bool is_dynamic, int max_pin)
3af36706
VK
1464{
1465 int i;
1466
1467 for (i = 0; i < max_pin; i++) {
6abca1d7
JK
1468 m_pin[i].id.module_id = dfw_pin[i].module_id;
1469 m_pin[i].id.instance_id = dfw_pin[i].instance_id;
3af36706 1470 m_pin[i].in_use = false;
6abca1d7 1471 m_pin[i].is_dynamic = is_dynamic;
4f745708 1472 m_pin[i].pin_state = SKL_PIN_UNBIND;
3af36706
VK
1473 }
1474}
1475
1476/*
1477 * Add pipeline from topology binary into driver pipeline list
1478 *
1479 * If already added we return that instance
1480 * Otherwise we create a new instance and add into driver list
1481 */
1482static struct skl_pipe *skl_tplg_add_pipe(struct device *dev,
1483 struct skl *skl, struct skl_dfw_pipe *dfw_pipe)
1484{
1485 struct skl_pipeline *ppl;
1486 struct skl_pipe *pipe;
1487 struct skl_pipe_params *params;
1488
1489 list_for_each_entry(ppl, &skl->ppl_list, node) {
1490 if (ppl->pipe->ppl_id == dfw_pipe->pipe_id)
1491 return ppl->pipe;
1492 }
1493
1494 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
1495 if (!ppl)
1496 return NULL;
1497
1498 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
1499 if (!pipe)
1500 return NULL;
1501
1502 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
1503 if (!params)
1504 return NULL;
1505
1506 pipe->ppl_id = dfw_pipe->pipe_id;
1507 pipe->memory_pages = dfw_pipe->memory_pages;
1508 pipe->pipe_priority = dfw_pipe->pipe_priority;
1509 pipe->conn_type = dfw_pipe->conn_type;
1510 pipe->state = SKL_PIPE_INVALID;
1511 pipe->p_params = params;
1512 INIT_LIST_HEAD(&pipe->w_list);
1513
1514 ppl->pipe = pipe;
1515 list_add(&ppl->node, &skl->ppl_list);
1516
1517 return ppl->pipe;
1518}
1519
4cd9899f
HS
1520static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt,
1521 struct skl_dfw_module_fmt *src_fmt,
1522 int pins)
1523{
1524 int i;
1525
1526 for (i = 0; i < pins; i++) {
1527 dst_fmt[i].channels = src_fmt[i].channels;
1528 dst_fmt[i].s_freq = src_fmt[i].freq;
1529 dst_fmt[i].bit_depth = src_fmt[i].bit_depth;
1530 dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth;
1531 dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg;
1532 dst_fmt[i].ch_map = src_fmt[i].ch_map;
1533 dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style;
1534 dst_fmt[i].sample_type = src_fmt[i].sample_type;
1535 }
1536}
1537
3af36706
VK
1538/*
1539 * Topology core widget load callback
1540 *
1541 * This is used to save the private data for each widget which gives
1542 * information to the driver about module and pipeline parameters which DSP
1543 * FW expects like ids, resource values, formats etc
1544 */
1545static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
b663a8c5
JK
1546 struct snd_soc_dapm_widget *w,
1547 struct snd_soc_tplg_dapm_widget *tplg_w)
3af36706
VK
1548{
1549 int ret;
1550 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1551 struct skl *skl = ebus_to_skl(ebus);
1552 struct hdac_bus *bus = ebus_to_hbus(ebus);
1553 struct skl_module_cfg *mconfig;
1554 struct skl_pipe *pipe;
b663a8c5
JK
1555 struct skl_dfw_module *dfw_config =
1556 (struct skl_dfw_module *)tplg_w->priv.data;
3af36706
VK
1557
1558 if (!tplg_w->priv.size)
1559 goto bind_event;
1560
1561 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
1562
1563 if (!mconfig)
1564 return -ENOMEM;
1565
1566 w->priv = mconfig;
1567 mconfig->id.module_id = dfw_config->module_id;
1568 mconfig->id.instance_id = dfw_config->instance_id;
1569 mconfig->mcps = dfw_config->max_mcps;
1570 mconfig->ibs = dfw_config->ibs;
1571 mconfig->obs = dfw_config->obs;
1572 mconfig->core_id = dfw_config->core_id;
1573 mconfig->max_in_queue = dfw_config->max_in_queue;
1574 mconfig->max_out_queue = dfw_config->max_out_queue;
1575 mconfig->is_loadable = dfw_config->is_loadable;
4cd9899f
HS
1576 skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt,
1577 MODULE_MAX_IN_PINS);
1578 skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt,
1579 MODULE_MAX_OUT_PINS);
1580
3af36706
VK
1581 mconfig->params_fixup = dfw_config->params_fixup;
1582 mconfig->converter = dfw_config->converter;
1583 mconfig->m_type = dfw_config->module_type;
1584 mconfig->vbus_id = dfw_config->vbus_id;
b18c458d 1585 mconfig->mem_pages = dfw_config->mem_pages;
3af36706
VK
1586
1587 pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe);
1588 if (pipe)
1589 mconfig->pipe = pipe;
1590
1591 mconfig->dev_type = dfw_config->dev_type;
1592 mconfig->hw_conn_type = dfw_config->hw_conn_type;
1593 mconfig->time_slot = dfw_config->time_slot;
1594 mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
1595
65aecfa8
HS
1596 if (dfw_config->is_loadable)
1597 memcpy(mconfig->guid, dfw_config->uuid,
1598 ARRAY_SIZE(dfw_config->uuid));
1599
4cd9899f
HS
1600 mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) *
1601 sizeof(*mconfig->m_in_pin),
1602 GFP_KERNEL);
3af36706
VK
1603 if (!mconfig->m_in_pin)
1604 return -ENOMEM;
1605
6abca1d7
JK
1606 mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) *
1607 sizeof(*mconfig->m_out_pin),
1608 GFP_KERNEL);
3af36706
VK
1609 if (!mconfig->m_out_pin)
1610 return -ENOMEM;
1611
6abca1d7
JK
1612 skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin,
1613 dfw_config->is_dynamic_in_pin,
1614 mconfig->max_in_queue);
1615
1616 skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin,
1617 dfw_config->is_dynamic_out_pin,
1618 mconfig->max_out_queue);
1619
3af36706
VK
1620
1621 if (mconfig->formats_config.caps_size == 0)
1622 goto bind_event;
1623
1624 mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev,
b663a8c5 1625 mconfig->formats_config.caps_size, GFP_KERNEL);
3af36706
VK
1626
1627 if (mconfig->formats_config.caps == NULL)
1628 return -ENOMEM;
1629
1630 memcpy(mconfig->formats_config.caps, dfw_config->caps.caps,
abb74003
JK
1631 dfw_config->caps.caps_size);
1632 mconfig->formats_config.param_id = dfw_config->caps.param_id;
1633 mconfig->formats_config.set_params = dfw_config->caps.set_params;
3af36706
VK
1634
1635bind_event:
1636 if (tplg_w->event_type == 0) {
3373f716 1637 dev_dbg(bus->dev, "ASoC: No event handler required\n");
3af36706
VK
1638 return 0;
1639 }
1640
1641 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
b663a8c5
JK
1642 ARRAY_SIZE(skl_tplg_widget_ops),
1643 tplg_w->event_type);
3af36706
VK
1644
1645 if (ret) {
1646 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
1647 __func__, tplg_w->event_type);
1648 return -EINVAL;
1649 }
1650
1651 return 0;
1652}
1653
140adfba
JK
1654static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be,
1655 struct snd_soc_tplg_bytes_control *bc)
1656{
1657 struct skl_algo_data *ac;
1658 struct skl_dfw_algo_data *dfw_ac =
1659 (struct skl_dfw_algo_data *)bc->priv.data;
1660
1661 ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL);
1662 if (!ac)
1663 return -ENOMEM;
1664
1665 /* Fill private data */
1666 ac->max = dfw_ac->max;
1667 ac->param_id = dfw_ac->param_id;
1668 ac->set_params = dfw_ac->set_params;
1669
1670 if (ac->max) {
1671 ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL);
1672 if (!ac->params)
1673 return -ENOMEM;
1674
edd7ea2d 1675 memcpy(ac->params, dfw_ac->params, ac->max);
140adfba
JK
1676 }
1677
1678 be->dobj.private = ac;
1679 return 0;
1680}
1681
1682static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
1683 struct snd_kcontrol_new *kctl,
1684 struct snd_soc_tplg_ctl_hdr *hdr)
1685{
1686 struct soc_bytes_ext *sb;
1687 struct snd_soc_tplg_bytes_control *tplg_bc;
1688 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1689 struct hdac_bus *bus = ebus_to_hbus(ebus);
1690
1691 switch (hdr->ops.info) {
1692 case SND_SOC_TPLG_CTL_BYTES:
1693 tplg_bc = container_of(hdr,
1694 struct snd_soc_tplg_bytes_control, hdr);
1695 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
1696 sb = (struct soc_bytes_ext *)kctl->private_value;
1697 if (tplg_bc->priv.size)
1698 return skl_init_algo_data(
1699 bus->dev, sb, tplg_bc);
1700 }
1701 break;
1702
1703 default:
1704 dev_warn(bus->dev, "Control load not supported %d:%d:%d\n",
1705 hdr->ops.get, hdr->ops.put, hdr->ops.info);
1706 break;
1707 }
1708
1709 return 0;
1710}
1711
3af36706
VK
1712static struct snd_soc_tplg_ops skl_tplg_ops = {
1713 .widget_load = skl_tplg_widget_load,
140adfba
JK
1714 .control_load = skl_tplg_control_load,
1715 .bytes_ext_ops = skl_tlv_ops,
1716 .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops),
3af36706
VK
1717};
1718
1719/* This will be read from topology manifest, currently defined here */
1720#define SKL_MAX_MCPS 30000000
1721#define SKL_FW_MAX_MEM 1000000
1722
1723/*
1724 * SKL topology init routine
1725 */
1726int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
1727{
1728 int ret;
1729 const struct firmware *fw;
1730 struct hdac_bus *bus = ebus_to_hbus(ebus);
1731 struct skl *skl = ebus_to_skl(ebus);
1732
4b235c43 1733 ret = request_firmware(&fw, skl->tplg_name, bus->dev);
3af36706 1734 if (ret < 0) {
b663a8c5 1735 dev_err(bus->dev, "tplg fw %s load failed with %d\n",
4b235c43
VK
1736 skl->tplg_name, ret);
1737 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
1738 if (ret < 0) {
1739 dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n",
1740 "dfw_sst.bin", ret);
1741 return ret;
1742 }
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1743 }
1744
1745 /*
1746 * The complete tplg for SKL is loaded as index 0, we don't use
1747 * any other index
1748 */
b663a8c5
JK
1749 ret = snd_soc_tplg_component_load(&platform->component,
1750 &skl_tplg_ops, fw, 0);
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1751 if (ret < 0) {
1752 dev_err(bus->dev, "tplg component load failed%d\n", ret);
c14a82c7 1753 release_firmware(fw);
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1754 return -EINVAL;
1755 }
1756
1757 skl->resource.max_mcps = SKL_MAX_MCPS;
1758 skl->resource.max_mem = SKL_FW_MAX_MEM;
1759
d8018361
VK
1760 skl->tplg = fw;
1761
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1762 return 0;
1763}