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Merge branches 'topic/rt5640', 'topic/rt5645' and 'topic/rt5651' of git://git.kernel...
[linux-2.6-block.git] / sound / soc / codecs / rt5645.c
CommitLineData
1319b2f6
OC		 1/*
2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
3 *
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
19#include <linux/spi/spi.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/jack.h>
24#include <sound/soc.h>
25#include <sound/soc-dapm.h>
26#include <sound/initval.h>
27#include <sound/tlv.h>
28
29#include "rt5645.h"
30
31#define RT5645_DEVICE_ID 0x6308
32
33#define RT5645_PR_RANGE_BASE (0xff + 1)
34#define RT5645_PR_SPACING 0x100
35
36#define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
37
38static const struct regmap_range_cfg rt5645_ranges[] = {
39 {
40 .name = "PR",
41 .range_min = RT5645_PR_BASE,
42 .range_max = RT5645_PR_BASE + 0xf8,
43 .selector_reg = RT5645_PRIV_INDEX,
44 .selector_mask = 0xff,
45 .selector_shift = 0x0,
46 .window_start = RT5645_PRIV_DATA,
47 .window_len = 0x1,
48 },
49};
50
51static const struct reg_default init_list[] = {
52 {RT5645_PR_BASE + 0x3d, 0x3600},
4809b96e
OC		 53 {RT5645_PR_BASE + 0x1c, 0xfd20},
54 {RT5645_PR_BASE + 0x20, 0x611f},
55 {RT5645_PR_BASE + 0x21, 0x4040},
56 {RT5645_PR_BASE + 0x23, 0x0004},
1319b2f6
OC		 57};
58#define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
59
60static const struct reg_default rt5645_reg[] = {
61 { 0x00, 0x0000 },
62 { 0x01, 0xc8c8 },
63 { 0x02, 0xc8c8 },
64 { 0x03, 0xc8c8 },
65 { 0x0a, 0x0002 },
66 { 0x0b, 0x2827 },
67 { 0x0c, 0xe000 },
68 { 0x0d, 0x0000 },
69 { 0x0e, 0x0000 },
70 { 0x0f, 0x0808 },
71 { 0x14, 0x3333 },
72 { 0x16, 0x4b00 },
73 { 0x18, 0x018b },
74 { 0x19, 0xafaf },
75 { 0x1a, 0xafaf },
76 { 0x1b, 0x0001 },
77 { 0x1c, 0x2f2f },
78 { 0x1d, 0x2f2f },
79 { 0x1e, 0x0000 },
80 { 0x20, 0x0000 },
81 { 0x27, 0x7060 },
82 { 0x28, 0x7070 },
83 { 0x29, 0x8080 },
84 { 0x2a, 0x5656 },
85 { 0x2b, 0x5454 },
86 { 0x2c, 0xaaa0 },
87 { 0x2f, 0x1002 },
88 { 0x31, 0x5000 },
89 { 0x32, 0x0000 },
90 { 0x33, 0x0000 },
91 { 0x34, 0x0000 },
92 { 0x35, 0x0000 },
93 { 0x3b, 0x0000 },
94 { 0x3c, 0x007f },
95 { 0x3d, 0x0000 },
96 { 0x3e, 0x007f },
97 { 0x3f, 0x0000 },
98 { 0x40, 0x001f },
99 { 0x41, 0x0000 },
100 { 0x42, 0x001f },
101 { 0x45, 0x6000 },
102 { 0x46, 0x003e },
103 { 0x47, 0x003e },
104 { 0x48, 0xf807 },
105 { 0x4a, 0x0004 },
106 { 0x4d, 0x0000 },
107 { 0x4e, 0x0000 },
108 { 0x4f, 0x01ff },
109 { 0x50, 0x0000 },
110 { 0x51, 0x0000 },
111 { 0x52, 0x01ff },
112 { 0x53, 0xf000 },
113 { 0x56, 0x0111 },
114 { 0x57, 0x0064 },
115 { 0x58, 0xef0e },
116 { 0x59, 0xf0f0 },
117 { 0x5a, 0xef0e },
118 { 0x5b, 0xf0f0 },
119 { 0x5c, 0xef0e },
120 { 0x5d, 0xf0f0 },
121 { 0x5e, 0xf000 },
122 { 0x5f, 0x0000 },
123 { 0x61, 0x0300 },
124 { 0x62, 0x0000 },
125 { 0x63, 0x00c2 },
126 { 0x64, 0x0000 },
127 { 0x65, 0x0000 },
128 { 0x66, 0x0000 },
129 { 0x6a, 0x0000 },
130 { 0x6c, 0x0aaa },
131 { 0x70, 0x8000 },
132 { 0x71, 0x8000 },
133 { 0x72, 0x8000 },
134 { 0x73, 0x7770 },
135 { 0x74, 0x3e00 },
136 { 0x75, 0x2409 },
137 { 0x76, 0x000a },
138 { 0x77, 0x0c00 },
139 { 0x78, 0x0000 },
140 { 0x80, 0x0000 },
141 { 0x81, 0x0000 },
142 { 0x82, 0x0000 },
143 { 0x83, 0x0000 },
144 { 0x84, 0x0000 },
145 { 0x85, 0x0000 },
146 { 0x8a, 0x0000 },
147 { 0x8e, 0x0004 },
148 { 0x8f, 0x1100 },
149 { 0x90, 0x0646 },
150 { 0x91, 0x0c06 },
151 { 0x93, 0x0000 },
152 { 0x94, 0x0200 },
153 { 0x95, 0x0000 },
154 { 0x9a, 0x2184 },
155 { 0x9b, 0x010a },
156 { 0x9c, 0x0aea },
157 { 0x9d, 0x000c },
158 { 0x9e, 0x0400 },
159 { 0xa0, 0xa0a8 },
160 { 0xa1, 0x0059 },
161 { 0xa2, 0x0001 },
162 { 0xae, 0x6000 },
163 { 0xaf, 0x0000 },
164 { 0xb0, 0x6000 },
165 { 0xb1, 0x0000 },
166 { 0xb2, 0x0000 },
167 { 0xb3, 0x001f },
168 { 0xb4, 0x020c },
169 { 0xb5, 0x1f00 },
170 { 0xb6, 0x0000 },
171 { 0xbb, 0x0000 },
172 { 0xbc, 0x0000 },
173 { 0xbd, 0x0000 },
174 { 0xbe, 0x0000 },
175 { 0xbf, 0x3100 },
176 { 0xc0, 0x0000 },
177 { 0xc1, 0x0000 },
178 { 0xc2, 0x0000 },
179 { 0xc3, 0x2000 },
180 { 0xcd, 0x0000 },
181 { 0xce, 0x0000 },
182 { 0xcf, 0x1813 },
183 { 0xd0, 0x0690 },
184 { 0xd1, 0x1c17 },
185 { 0xd3, 0xb320 },
186 { 0xd4, 0x0000 },
187 { 0xd6, 0x0400 },
188 { 0xd9, 0x0809 },
189 { 0xda, 0x0000 },
190 { 0xdb, 0x0003 },
191 { 0xdc, 0x0049 },
192 { 0xdd, 0x001b },
193 { 0xe6, 0x8000 },
194 { 0xe7, 0x0200 },
195 { 0xec, 0xb300 },
196 { 0xed, 0x0000 },
197 { 0xf0, 0x001f },
198 { 0xf1, 0x020c },
199 { 0xf2, 0x1f00 },
200 { 0xf3, 0x0000 },
201 { 0xf4, 0x4000 },
202 { 0xf8, 0x0000 },
203 { 0xf9, 0x0000 },
204 { 0xfa, 0x2060 },
205 { 0xfb, 0x4040 },
206 { 0xfc, 0x0000 },
207 { 0xfd, 0x0002 },
208 { 0xfe, 0x10ec },
209 { 0xff, 0x6308 },
210};
211
212static int rt5645_reset(struct snd_soc_codec *codec)
213{
214 return snd_soc_write(codec, RT5645_RESET, 0);
215}
216
217static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
218{
219 int i;
220
221 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
222 if (reg >= rt5645_ranges[i].range_min &&
223 reg <= rt5645_ranges[i].range_max) {
224 return true;
225 }
226 }
227
228 switch (reg) {
229 case RT5645_RESET:
230 case RT5645_PRIV_DATA:
231 case RT5645_IN1_CTRL1:
232 case RT5645_IN1_CTRL2:
233 case RT5645_IN1_CTRL3:
234 case RT5645_A_JD_CTRL1:
235 case RT5645_ADC_EQ_CTRL1:
236 case RT5645_EQ_CTRL1:
237 case RT5645_ALC_CTRL_1:
238 case RT5645_IRQ_CTRL2:
239 case RT5645_IRQ_CTRL3:
240 case RT5645_INT_IRQ_ST:
241 case RT5645_IL_CMD:
242 case RT5645_VENDOR_ID:
243 case RT5645_VENDOR_ID1:
244 case RT5645_VENDOR_ID2:
71bfa9b4 245 return true;
1319b2f6 246 default:
71bfa9b4 247 return false;
1319b2f6
OC		 248 }
249}
250
251static bool rt5645_readable_register(struct device *dev, unsigned int reg)
252{
253 int i;
254
255 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
256 if (reg >= rt5645_ranges[i].range_min &&
257 reg <= rt5645_ranges[i].range_max) {
258 return true;
259 }
260 }
261
262 switch (reg) {
263 case RT5645_RESET:
264 case RT5645_SPK_VOL:
265 case RT5645_HP_VOL:
266 case RT5645_LOUT1:
267 case RT5645_IN1_CTRL1:
268 case RT5645_IN1_CTRL2:
269 case RT5645_IN1_CTRL3:
270 case RT5645_IN2_CTRL:
271 case RT5645_INL1_INR1_VOL:
272 case RT5645_SPK_FUNC_LIM:
273 case RT5645_ADJ_HPF_CTRL:
274 case RT5645_DAC1_DIG_VOL:
275 case RT5645_DAC2_DIG_VOL:
276 case RT5645_DAC_CTRL:
277 case RT5645_STO1_ADC_DIG_VOL:
278 case RT5645_MONO_ADC_DIG_VOL:
279 case RT5645_ADC_BST_VOL1:
280 case RT5645_ADC_BST_VOL2:
281 case RT5645_STO1_ADC_MIXER:
282 case RT5645_MONO_ADC_MIXER:
283 case RT5645_AD_DA_MIXER:
284 case RT5645_STO_DAC_MIXER:
285 case RT5645_MONO_DAC_MIXER:
286 case RT5645_DIG_MIXER:
287 case RT5645_DIG_INF1_DATA:
288 case RT5645_PDM_OUT_CTRL:
289 case RT5645_REC_L1_MIXER:
290 case RT5645_REC_L2_MIXER:
291 case RT5645_REC_R1_MIXER:
292 case RT5645_REC_R2_MIXER:
293 case RT5645_HPMIXL_CTRL:
294 case RT5645_HPOMIXL_CTRL:
295 case RT5645_HPMIXR_CTRL:
296 case RT5645_HPOMIXR_CTRL:
297 case RT5645_HPO_MIXER:
298 case RT5645_SPK_L_MIXER:
299 case RT5645_SPK_R_MIXER:
300 case RT5645_SPO_MIXER:
301 case RT5645_SPO_CLSD_RATIO:
302 case RT5645_OUT_L1_MIXER:
303 case RT5645_OUT_R1_MIXER:
304 case RT5645_OUT_L_GAIN1:
305 case RT5645_OUT_L_GAIN2:
306 case RT5645_OUT_R_GAIN1:
307 case RT5645_OUT_R_GAIN2:
308 case RT5645_LOUT_MIXER:
309 case RT5645_HAPTIC_CTRL1:
310 case RT5645_HAPTIC_CTRL2:
311 case RT5645_HAPTIC_CTRL3:
312 case RT5645_HAPTIC_CTRL4:
313 case RT5645_HAPTIC_CTRL5:
314 case RT5645_HAPTIC_CTRL6:
315 case RT5645_HAPTIC_CTRL7:
316 case RT5645_HAPTIC_CTRL8:
317 case RT5645_HAPTIC_CTRL9:
318 case RT5645_HAPTIC_CTRL10:
319 case RT5645_PWR_DIG1:
320 case RT5645_PWR_DIG2:
321 case RT5645_PWR_ANLG1:
322 case RT5645_PWR_ANLG2:
323 case RT5645_PWR_MIXER:
324 case RT5645_PWR_VOL:
325 case RT5645_PRIV_INDEX:
326 case RT5645_PRIV_DATA:
327 case RT5645_I2S1_SDP:
328 case RT5645_I2S2_SDP:
329 case RT5645_ADDA_CLK1:
330 case RT5645_ADDA_CLK2:
331 case RT5645_DMIC_CTRL1:
332 case RT5645_DMIC_CTRL2:
333 case RT5645_TDM_CTRL_1:
334 case RT5645_TDM_CTRL_2:
335 case RT5645_GLB_CLK:
336 case RT5645_PLL_CTRL1:
337 case RT5645_PLL_CTRL2:
338 case RT5645_ASRC_1:
339 case RT5645_ASRC_2:
340 case RT5645_ASRC_3:
341 case RT5645_ASRC_4:
342 case RT5645_DEPOP_M1:
343 case RT5645_DEPOP_M2:
344 case RT5645_DEPOP_M3:
345 case RT5645_MICBIAS:
346 case RT5645_A_JD_CTRL1:
347 case RT5645_VAD_CTRL4:
348 case RT5645_CLSD_OUT_CTRL:
349 case RT5645_ADC_EQ_CTRL1:
350 case RT5645_ADC_EQ_CTRL2:
351 case RT5645_EQ_CTRL1:
352 case RT5645_EQ_CTRL2:
353 case RT5645_ALC_CTRL_1:
354 case RT5645_ALC_CTRL_2:
355 case RT5645_ALC_CTRL_3:
356 case RT5645_ALC_CTRL_4:
357 case RT5645_ALC_CTRL_5:
358 case RT5645_JD_CTRL:
359 case RT5645_IRQ_CTRL1:
360 case RT5645_IRQ_CTRL2:
361 case RT5645_IRQ_CTRL3:
362 case RT5645_INT_IRQ_ST:
363 case RT5645_GPIO_CTRL1:
364 case RT5645_GPIO_CTRL2:
365 case RT5645_GPIO_CTRL3:
366 case RT5645_BASS_BACK:
367 case RT5645_MP3_PLUS1:
368 case RT5645_MP3_PLUS2:
369 case RT5645_ADJ_HPF1:
370 case RT5645_ADJ_HPF2:
371 case RT5645_HP_CALIB_AMP_DET:
372 case RT5645_SV_ZCD1:
373 case RT5645_SV_ZCD2:
374 case RT5645_IL_CMD:
375 case RT5645_IL_CMD2:
376 case RT5645_IL_CMD3:
377 case RT5645_DRC1_HL_CTRL1:
378 case RT5645_DRC2_HL_CTRL1:
379 case RT5645_ADC_MONO_HP_CTRL1:
380 case RT5645_ADC_MONO_HP_CTRL2:
381 case RT5645_DRC2_CTRL1:
382 case RT5645_DRC2_CTRL2:
383 case RT5645_DRC2_CTRL3:
384 case RT5645_DRC2_CTRL4:
385 case RT5645_DRC2_CTRL5:
386 case RT5645_JD_CTRL3:
387 case RT5645_JD_CTRL4:
388 case RT5645_GEN_CTRL1:
389 case RT5645_GEN_CTRL2:
390 case RT5645_GEN_CTRL3:
391 case RT5645_VENDOR_ID:
392 case RT5645_VENDOR_ID1:
393 case RT5645_VENDOR_ID2:
71bfa9b4 394 return true;
1319b2f6 395 default:
71bfa9b4 396 return false;
1319b2f6
OC		 397 }
398}
399
400static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
401static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
402static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
403static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
404static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
405
406/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
407static unsigned int bst_tlv[] = {
408 TLV_DB_RANGE_HEAD(7),
409 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
410 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
411 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
412 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
413 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
414 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
415 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
416};
417
418static const char * const rt5645_tdm_data_swap_select[] = {
419 "L/R", "R/L", "L/L", "R/R"
420};
421
422static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
423 RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
424
425static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
426 RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
427
428static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
429 RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
430
431static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
432 RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
433
434static const char * const rt5645_tdm_adc_data_select[] = {
435 "1/2/R", "2/1/R", "R/1/2", "R/2/1"
436};
437
438static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
439 RT5645_TDM_CTRL_1, 8,
440 rt5645_tdm_adc_data_select);
441
442static const struct snd_kcontrol_new rt5645_snd_controls[] = {
443 /* Speaker Output Volume */
444 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
445 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
446 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
447 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
448
449 /* Headphone Output Volume */
450 SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
451 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
452 SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
453 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
454
455 /* OUTPUT Control */
456 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
457 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
458 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
459 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
460 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
461 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
462
463 /* DAC Digital Volume */
464 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
465 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
466 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
467 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
468 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
469 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
470
471 /* IN1/IN2 Control */
472 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
473 RT5645_BST_SFT1, 8, 0, bst_tlv),
474 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
475 RT5645_BST_SFT2, 8, 0, bst_tlv),
476
477 /* INL/INR Volume Control */
478 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
479 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
480
481 /* ADC Digital Volume Control */
482 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
483 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
484 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
485 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
486 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
487 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
488 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
489 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
490
491 /* ADC Boost Volume Control */
492 SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
493 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
494 adc_bst_tlv),
495 SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
496 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
497 adc_bst_tlv),
498
499 /* I2S2 function select */
500 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
501 1, 1),
502
503 /* TDM */
504 SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
505 SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
506 SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
507 SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
508 SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
509 SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
510 SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
511 SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
512 SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
513};
514
515/**
516 * set_dmic_clk - Set parameter of dmic.
517 *
518 * @w: DAPM widget.
519 * @kcontrol: The kcontrol of this widget.
520 * @event: Event id.
521 *
522 * Choose dmic clock between 1MHz and 3MHz.
523 * It is better for clock to approximate 3MHz.
524 */
525static int set_dmic_clk(struct snd_soc_dapm_widget *w,
526 struct snd_kcontrol *kcontrol, int event)
527{
528 struct snd_soc_codec *codec = w->codec;
529 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
530 int div[] = {2, 3, 4, 6, 8, 12};
531 int idx = -EINVAL, i;
532 int rate, red, bound, temp;
533
534 rate = rt5645->sysclk;
535 red = 3000000 * 12;
536 for (i = 0; i < ARRAY_SIZE(div); i++) {
537 bound = div[i] * 3000000;
538 if (rate > bound)
539 continue;
540 temp = bound - rate;
541 if (temp < red) {
542 red = temp;
543 idx = i;
544 }
545 }
546
547 if (idx < 0)
548 dev_err(codec->dev, "Failed to set DMIC clock\n");
549 else
550 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
551 RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
552 return idx;
553}
554
555static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
556 struct snd_soc_dapm_widget *sink)
557{
558 unsigned int val;
559
560 val = snd_soc_read(source->codec, RT5645_GLB_CLK);
561 val &= RT5645_SCLK_SRC_MASK;
562 if (val == RT5645_SCLK_SRC_PLL1)
563 return 1;
564 else
565 return 0;
566}
567
568/* Digital Mixer */
569static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
570 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
571 RT5645_M_ADC_L1_SFT, 1, 1),
572 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
573 RT5645_M_ADC_L2_SFT, 1, 1),
574};
575
576static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
577 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
578 RT5645_M_ADC_R1_SFT, 1, 1),
579 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
580 RT5645_M_ADC_R2_SFT, 1, 1),
581};
582
583static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
584 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
585 RT5645_M_MONO_ADC_L1_SFT, 1, 1),
586 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
587 RT5645_M_MONO_ADC_L2_SFT, 1, 1),
588};
589
590static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
591 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
592 RT5645_M_MONO_ADC_R1_SFT, 1, 1),
593 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
594 RT5645_M_MONO_ADC_R2_SFT, 1, 1),
595};
596
597static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
598 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
599 RT5645_M_ADCMIX_L_SFT, 1, 1),
600 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
601 RT5645_M_DAC1_L_SFT, 1, 1),
602};
603
604static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
605 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
606 RT5645_M_ADCMIX_R_SFT, 1, 1),
607 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
608 RT5645_M_DAC1_R_SFT, 1, 1),
609};
610
611static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
612 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
613 RT5645_M_DAC_L1_SFT, 1, 1),
614 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
615 RT5645_M_DAC_L2_SFT, 1, 1),
616 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
617 RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
618};
619
620static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
621 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
622 RT5645_M_DAC_R1_SFT, 1, 1),
623 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
624 RT5645_M_DAC_R2_SFT, 1, 1),
625 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
626 RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
627};
628
629static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
630 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
631 RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
632 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
633 RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
634 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
635 RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
636};
637
638static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
639 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
640 RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
641 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
642 RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
643 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
644 RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
645};
646
647static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
648 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
649 RT5645_M_STO_L_DAC_L_SFT, 1, 1),
650 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
651 RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
652 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
653 RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
654};
655
656static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
657 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
658 RT5645_M_STO_R_DAC_R_SFT, 1, 1),
659 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
660 RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
661 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
662 RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
663};
664
665/* Analog Input Mixer */
666static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
667 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
668 RT5645_M_HP_L_RM_L_SFT, 1, 1),
669 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
670 RT5645_M_IN_L_RM_L_SFT, 1, 1),
671 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
672 RT5645_M_BST2_RM_L_SFT, 1, 1),
673 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
674 RT5645_M_BST1_RM_L_SFT, 1, 1),
675 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
676 RT5645_M_OM_L_RM_L_SFT, 1, 1),
677};
678
679static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
680 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
681 RT5645_M_HP_R_RM_R_SFT, 1, 1),
682 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
683 RT5645_M_IN_R_RM_R_SFT, 1, 1),
684 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
685 RT5645_M_BST2_RM_R_SFT, 1, 1),
686 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
687 RT5645_M_BST1_RM_R_SFT, 1, 1),
688 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
689 RT5645_M_OM_R_RM_R_SFT, 1, 1),
690};
691
692static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
693 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
694 RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
695 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
696 RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
697 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
698 RT5645_M_IN_L_SM_L_SFT, 1, 1),
699 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
700 RT5645_M_BST1_L_SM_L_SFT, 1, 1),
701};
702
703static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
704 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
705 RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
706 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
707 RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
708 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
709 RT5645_M_IN_R_SM_R_SFT, 1, 1),
710 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
711 RT5645_M_BST2_R_SM_R_SFT, 1, 1),
712};
713
714static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
715 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
716 RT5645_M_BST1_OM_L_SFT, 1, 1),
717 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
718 RT5645_M_IN_L_OM_L_SFT, 1, 1),
719 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
720 RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
721 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
722 RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
723};
724
725static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
726 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
727 RT5645_M_BST2_OM_R_SFT, 1, 1),
728 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
729 RT5645_M_IN_R_OM_R_SFT, 1, 1),
730 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
731 RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
732 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
733 RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
734};
735
736static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
737 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
738 RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
739 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
740 RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
741 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
742 RT5645_M_SV_R_SPM_L_SFT, 1, 1),
743 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
744 RT5645_M_SV_L_SPM_L_SFT, 1, 1),
745};
746
747static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
748 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
749 RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
750 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
751 RT5645_M_SV_R_SPM_R_SFT, 1, 1),
752};
753
754static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
755 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
756 RT5645_M_DAC1_HM_SFT, 1, 1),
757 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
758 RT5645_M_HPVOL_HM_SFT, 1, 1),
759};
760
761static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
762 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
763 RT5645_M_DAC1_HV_SFT, 1, 1),
764 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
765 RT5645_M_DAC2_HV_SFT, 1, 1),
766 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
767 RT5645_M_IN_HV_SFT, 1, 1),
768 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
769 RT5645_M_BST1_HV_SFT, 1, 1),
770};
771
772static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
773 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
774 RT5645_M_DAC1_HV_SFT, 1, 1),
775 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
776 RT5645_M_DAC2_HV_SFT, 1, 1),
777 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
778 RT5645_M_IN_HV_SFT, 1, 1),
779 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
780 RT5645_M_BST2_HV_SFT, 1, 1),
781};
782
783static const struct snd_kcontrol_new rt5645_lout_mix[] = {
784 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
785 RT5645_M_DAC_L1_LM_SFT, 1, 1),
786 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
787 RT5645_M_DAC_R1_LM_SFT, 1, 1),
788 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
789 RT5645_M_OV_L_LM_SFT, 1, 1),
790 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
791 RT5645_M_OV_R_LM_SFT, 1, 1),
792};
793
794/*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
795static const char * const rt5645_dac1_src[] = {
796 "IF1 DAC", "IF2 DAC", "IF3 DAC"
797};
798
799static SOC_ENUM_SINGLE_DECL(
800 rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
801 RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
802
803static const struct snd_kcontrol_new rt5645_dac1l_mux =
804 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
805
806static SOC_ENUM_SINGLE_DECL(
807 rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
808 RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
809
810static const struct snd_kcontrol_new rt5645_dac1r_mux =
811 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
812
813/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
814static const char * const rt5645_dac12_src[] = {
815 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
816};
817
818static SOC_ENUM_SINGLE_DECL(
819 rt5645_dac2l_enum, RT5645_DAC_CTRL,
820 RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
821
822static const struct snd_kcontrol_new rt5645_dac_l2_mux =
823 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
824
825static const char * const rt5645_dacr2_src[] = {
826 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
827};
828
829static SOC_ENUM_SINGLE_DECL(
830 rt5645_dac2r_enum, RT5645_DAC_CTRL,
831 RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
832
833static const struct snd_kcontrol_new rt5645_dac_r2_mux =
834 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
835
836
837/* INL/R source */
838static const char * const rt5645_inl_src[] = {
839 "IN2P", "MonoP"
840};
841
842static SOC_ENUM_SINGLE_DECL(
843 rt5645_inl_enum, RT5645_INL1_INR1_VOL,
844 RT5645_INL_SEL_SFT, rt5645_inl_src);
845
846static const struct snd_kcontrol_new rt5645_inl_mux =
847 SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
848
849static const char * const rt5645_inr_src[] = {
850 "IN2N", "MonoN"
851};
852
853static SOC_ENUM_SINGLE_DECL(
854 rt5645_inr_enum, RT5645_INL1_INR1_VOL,
855 RT5645_INR_SEL_SFT, rt5645_inr_src);
856
857static const struct snd_kcontrol_new rt5645_inr_mux =
858 SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
859
860/* Stereo1 ADC source */
861/* MX-27 [12] */
862static const char * const rt5645_stereo_adc1_src[] = {
863 "DAC MIX", "ADC"
864};
865
866static SOC_ENUM_SINGLE_DECL(
867 rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
868 RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
869
870static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
871 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
872
873/* MX-27 [11] */
874static const char * const rt5645_stereo_adc2_src[] = {
875 "DAC MIX", "DMIC"
876};
877
878static SOC_ENUM_SINGLE_DECL(
879 rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
880 RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
881
882static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
883 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
884
885/* MX-27 [8] */
886static const char * const rt5645_stereo_dmic_src[] = {
887 "DMIC1", "DMIC2"
888};
889
890static SOC_ENUM_SINGLE_DECL(
891 rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
892 RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
893
894static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
895 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
896
897/* Mono ADC source */
898/* MX-28 [12] */
899static const char * const rt5645_mono_adc_l1_src[] = {
900 "Mono DAC MIXL", "ADC"
901};
902
903static SOC_ENUM_SINGLE_DECL(
904 rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
905 RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
906
907static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
908 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
909/* MX-28 [11] */
910static const char * const rt5645_mono_adc_l2_src[] = {
911 "Mono DAC MIXL", "DMIC"
912};
913
914static SOC_ENUM_SINGLE_DECL(
915 rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
916 RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
917
918static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
919 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
920
921/* MX-28 [8] */
922static const char * const rt5645_mono_dmic_src[] = {
923 "DMIC1", "DMIC2"
924};
925
926static SOC_ENUM_SINGLE_DECL(
927 rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
928 RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
929
930static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
931 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
932/* MX-28 [1:0] */
933static SOC_ENUM_SINGLE_DECL(
934 rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
935 RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
936
937static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
938 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
939/* MX-28 [4] */
940static const char * const rt5645_mono_adc_r1_src[] = {
941 "Mono DAC MIXR", "ADC"
942};
943
944static SOC_ENUM_SINGLE_DECL(
945 rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
946 RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
947
948static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
949 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
950/* MX-28 [3] */
951static const char * const rt5645_mono_adc_r2_src[] = {
952 "Mono DAC MIXR", "DMIC"
953};
954
955static SOC_ENUM_SINGLE_DECL(
956 rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
957 RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
958
959static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
960 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
961
962/* MX-77 [9:8] */
963static const char * const rt5645_if1_adc_in_src[] = {
964 "IF_ADC1", "IF_ADC2", "VAD_ADC"
965};
966
967static SOC_ENUM_SINGLE_DECL(
968 rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
969 RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
970
971static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
972 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
973
974/* MX-2F [13:12] */
975static const char * const rt5645_if2_adc_in_src[] = {
976 "IF_ADC1", "IF_ADC2", "VAD_ADC"
977};
978
979static SOC_ENUM_SINGLE_DECL(
980 rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
981 RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
982
983static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
984 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
985
986/* MX-2F [1:0] */
987static const char * const rt5645_if3_adc_in_src[] = {
988 "IF_ADC1", "IF_ADC2", "VAD_ADC"
989};
990
991static SOC_ENUM_SINGLE_DECL(
992 rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
993 RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
994
995static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
996 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
997
998/* MX-31 [15] [13] [11] [9] */
999static const char * const rt5645_pdm_src[] = {
1000 "Mono DAC", "Stereo DAC"
1001};
1002
1003static SOC_ENUM_SINGLE_DECL(
1004 rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1005 RT5645_PDM1_L_SFT, rt5645_pdm_src);
1006
1007static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1008 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1009
1010static SOC_ENUM_SINGLE_DECL(
1011 rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1012 RT5645_PDM1_R_SFT, rt5645_pdm_src);
1013
1014static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1015 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1016
1017/* MX-9D [9:8] */
1018static const char * const rt5645_vad_adc_src[] = {
1019 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1020};
1021
1022static SOC_ENUM_SINGLE_DECL(
1023 rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1024 RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1025
1026static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1027 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1028
1029static const struct snd_kcontrol_new spk_l_vol_control =
1030 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1031 RT5645_L_MUTE_SFT, 1, 1);
1032
1033static const struct snd_kcontrol_new spk_r_vol_control =
1034 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1035 RT5645_R_MUTE_SFT, 1, 1);
1036
1037static const struct snd_kcontrol_new hp_l_vol_control =
1038 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1039 RT5645_L_MUTE_SFT, 1, 1);
1040
1041static const struct snd_kcontrol_new hp_r_vol_control =
1042 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1043 RT5645_R_MUTE_SFT, 1, 1);
1044
1045static const struct snd_kcontrol_new pdm1_l_vol_control =
1046 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1047 RT5645_M_PDM1_L, 1, 1);
1048
1049static const struct snd_kcontrol_new pdm1_r_vol_control =
1050 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1051 RT5645_M_PDM1_R, 1, 1);
1052
1053static void hp_amp_power(struct snd_soc_codec *codec, int on)
1054{
1055 static int hp_amp_power_count;
1056 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1057
1058 if (on) {
1059 if (hp_amp_power_count <= 0) {
1060 /* depop parameters */
1061 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1062 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1063 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1064 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1065 RT5645_HP_DCC_INT1, 0x9f01);
1066 mdelay(150);
1067 /* headphone amp power on */
1068 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1069 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1070 snd_soc_update_bits(codec, RT5645_PWR_VOL,
1071 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1072 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1073 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1074 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1075 RT5645_PWR_HA,
1076 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1077 RT5645_PWR_HA);
1078 mdelay(5);
1079 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1080 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1081 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1082
1083 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1084 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1085 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1086 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1087 0x14, 0x1aaa);
1088 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1089 0x24, 0x0430);
1090 }
1091 hp_amp_power_count++;
1092 } else {
1093 hp_amp_power_count--;
1094 if (hp_amp_power_count <= 0) {
1095 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1096 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1097 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1098 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1099 /* headphone amp power down */
1100 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1101 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1102 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1103 RT5645_PWR_HA, 0);
1104 }
1105 }
1106}
1107
1108static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1109 struct snd_kcontrol *kcontrol, int event)
1110{
1111 struct snd_soc_codec *codec = w->codec;
1112 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1113
1114 switch (event) {
1115 case SND_SOC_DAPM_POST_PMU:
1116 hp_amp_power(codec, 1);
1117 /* headphone unmute sequence */
1118 snd_soc_update_bits(codec, RT5645_DEPOP_M3, RT5645_CP_FQ1_MASK |
1119 RT5645_CP_FQ2_MASK | RT5645_CP_FQ3_MASK,
1120 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1121 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1122 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1123 regmap_write(rt5645->regmap,
1124 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1125 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1126 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1127 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1128 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1129 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1130 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1131 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1132 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1133 msleep(40);
1134 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1135 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1136 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1137 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1138 break;
1139
1140 case SND_SOC_DAPM_PRE_PMD:
1141 /* headphone mute sequence */
1142 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1143 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1144 RT5645_CP_FQ3_MASK,
1145 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1146 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1147 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1148 regmap_write(rt5645->regmap,
1149 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1150 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1151 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1152 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1153 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1154 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1155 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1156 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1157 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1158 msleep(30);
1159 hp_amp_power(codec, 0);
1160 break;
1161
1162 default:
1163 return 0;
1164 }
1165
1166 return 0;
1167}
1168
1169static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1170 struct snd_kcontrol *kcontrol, int event)
1171{
1172 struct snd_soc_codec *codec = w->codec;
1319b2f6
OC		 1173
1174 switch (event) {
1175 case SND_SOC_DAPM_POST_PMU:
1176 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1177 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1178 RT5645_PWR_CLS_D_L,
1179 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1180 RT5645_PWR_CLS_D_L);
1181 break;
1182
1183 case SND_SOC_DAPM_PRE_PMD:
1184 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1185 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1186 RT5645_PWR_CLS_D_L, 0);
1187 break;
1188
1189 default:
1190 return 0;
1191 }
1192
1193 return 0;
1194}
1195
1196static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1197 struct snd_kcontrol *kcontrol, int event)
1198{
1199 struct snd_soc_codec *codec = w->codec;
1200
1201 switch (event) {
1202 case SND_SOC_DAPM_POST_PMU:
1203 hp_amp_power(codec, 1);
1204 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1205 RT5645_PWR_LM, RT5645_PWR_LM);
1206 snd_soc_update_bits(codec, RT5645_LOUT1,
1207 RT5645_L_MUTE | RT5645_R_MUTE, 0);
1208 break;
1209
1210 case SND_SOC_DAPM_PRE_PMD:
1211 snd_soc_update_bits(codec, RT5645_LOUT1,
1212 RT5645_L_MUTE | RT5645_R_MUTE,
1213 RT5645_L_MUTE | RT5645_R_MUTE);
1214 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1215 RT5645_PWR_LM, 0);
1216 hp_amp_power(codec, 0);
1217 break;
1218
1219 default:
1220 return 0;
1221 }
1222
1223 return 0;
1224}
1225
1226static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1227 struct snd_kcontrol *kcontrol, int event)
1228{
1229 struct snd_soc_codec *codec = w->codec;
1230
1231 switch (event) {
1232 case SND_SOC_DAPM_POST_PMU:
1233 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1234 RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1235 break;
1236
1237 case SND_SOC_DAPM_PRE_PMD:
1238 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1239 RT5645_PWR_BST2_P, 0);
1240 break;
1241
1242 default:
1243 return 0;
1244 }
1245
1246 return 0;
1247}
1248
1249static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1250 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1251 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1252 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1253 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1254
1255 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1256 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1257 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1258 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1259
1260 /* Input Side */
1261 /* micbias */
1262 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1263 RT5645_PWR_MB1_BIT, 0),
1264 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1265 RT5645_PWR_MB2_BIT, 0),
1266 /* Input Lines */
1267 SND_SOC_DAPM_INPUT("DMIC L1"),
1268 SND_SOC_DAPM_INPUT("DMIC R1"),
1269 SND_SOC_DAPM_INPUT("DMIC L2"),
1270 SND_SOC_DAPM_INPUT("DMIC R2"),
1271
1272 SND_SOC_DAPM_INPUT("IN1P"),
1273 SND_SOC_DAPM_INPUT("IN1N"),
1274 SND_SOC_DAPM_INPUT("IN2P"),
1275 SND_SOC_DAPM_INPUT("IN2N"),
1276
1277 SND_SOC_DAPM_INPUT("Haptic Generator"),
1278
1279 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1280 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1281 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1282 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1283 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1284 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1285 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1286 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1287 /* Boost */
1288 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1289 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1290 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1291 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1292 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1293 /* Input Volume */
1294 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1295 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1296 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1297 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1298 /* REC Mixer */
1299 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1300 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1301 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1302 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1303 /* ADCs */
1304 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1305 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1306
1307 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1308 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1309 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1310 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1311
1312 /* ADC Mux */
1313 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1314 &rt5645_sto1_dmic_mux),
1315 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1316 &rt5645_sto_adc2_mux),
1317 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1318 &rt5645_sto_adc2_mux),
1319 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1320 &rt5645_sto_adc1_mux),
1321 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1322 &rt5645_sto_adc1_mux),
1323 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1324 &rt5645_mono_dmic_l_mux),
1325 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1326 &rt5645_mono_dmic_r_mux),
1327 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1328 &rt5645_mono_adc_l2_mux),
1329 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1330 &rt5645_mono_adc_l1_mux),
1331 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1332 &rt5645_mono_adc_r1_mux),
1333 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1334 &rt5645_mono_adc_r2_mux),
1335 /* ADC Mixer */
1336
1337 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1338 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1339 SND_SOC_DAPM_SUPPLY_S("adc stereo2 filter", 1, RT5645_PWR_DIG2,
1340 RT5645_PWR_ADC_S2F_BIT, 0, NULL, 0),
1341 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1342 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1343 NULL, 0),
1344 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1345 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1346 NULL, 0),
1347 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1348 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1349 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1350 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1351 NULL, 0),
1352 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1353 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1354 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1355 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1356 NULL, 0),
1357
1358 /* ADC PGA */
1359 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1360 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1361 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1362 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1363 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1364 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1365 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1366 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1367 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1368 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1369
1370 /* IF1 2 Mux */
1371 SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1372 0, 0, &rt5645_if1_adc_in_mux),
1373 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1374 0, 0, &rt5645_if2_adc_in_mux),
1375
1376 /* Digital Interface */
1377 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1378 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1379 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1380 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1381 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1382 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1383 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1384 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1385 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1386 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1387 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1388 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1389 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1390 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1391 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1392 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1393 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1394
1395 /* Digital Interface Select */
1396 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1397 0, 0, &rt5645_vad_adc_mux),
1398
1399 /* Audio Interface */
1400 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1401 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1402 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1403 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1404
1405 /* Output Side */
1406 /* DAC mixer before sound effect */
1407 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1408 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1409 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1410 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1411
1412 /* DAC2 channel Mux */
1413 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1414 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1415 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1416 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1417 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1418 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1419
1420 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1421 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1422
1423 /* DAC Mixer */
1424 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1425 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1426 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1427 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1428 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1429 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1430 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1431 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1432 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1433 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1434 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1435 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1436 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1437 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1438 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1439 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1440 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1441 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1442
1443 /* DACs */
1444 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1445 0),
1446 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1447 0),
1448 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1449 0),
1450 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1451 0),
1452 /* OUT Mixer */
1453 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1454 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1455 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1456 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1457 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1458 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1459 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1460 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1461 /* Ouput Volume */
1462 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1463 &spk_l_vol_control),
1464 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1465 &spk_r_vol_control),
1466 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1467 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1468 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1469 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1470 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1471 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1472 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1473 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1474 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1475 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1476 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1477 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1478 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1479
1480 /* HPO/LOUT/Mono Mixer */
1481 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1482 ARRAY_SIZE(rt5645_spo_l_mix)),
1483 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1484 ARRAY_SIZE(rt5645_spo_r_mix)),
1485 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1486 ARRAY_SIZE(rt5645_hpo_mix)),
1487 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1488 ARRAY_SIZE(rt5645_lout_mix)),
1489
1490 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1491 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1492 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1493 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1494 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1495 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1496
1497 /* PDM */
1498 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1499 0, NULL, 0),
1500 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1501 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1502
1503 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1504 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1505
1506 /* Output Lines */
1507 SND_SOC_DAPM_OUTPUT("HPOL"),
1508 SND_SOC_DAPM_OUTPUT("HPOR"),
1509 SND_SOC_DAPM_OUTPUT("LOUTL"),
1510 SND_SOC_DAPM_OUTPUT("LOUTR"),
1511 SND_SOC_DAPM_OUTPUT("PDM1L"),
1512 SND_SOC_DAPM_OUTPUT("PDM1R"),
1513 SND_SOC_DAPM_OUTPUT("SPOL"),
1514 SND_SOC_DAPM_OUTPUT("SPOR"),
1515};
1516
1517static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1518 { "IN1P", NULL, "LDO2" },
1519 { "IN2P", NULL, "LDO2" },
1520
1521 { "DMIC1", NULL, "DMIC L1" },
1522 { "DMIC1", NULL, "DMIC R1" },
1523 { "DMIC2", NULL, "DMIC L2" },
1524 { "DMIC2", NULL, "DMIC R2" },
1525
1526 { "BST1", NULL, "IN1P" },
1527 { "BST1", NULL, "IN1N" },
1528 { "BST1", NULL, "JD Power" },
1529 { "BST1", NULL, "Mic Det Power" },
1530 { "BST2", NULL, "IN2P" },
1531 { "BST2", NULL, "IN2N" },
1532
1533 { "INL VOL", NULL, "IN2P" },
1534 { "INR VOL", NULL, "IN2N" },
1535
1536 { "RECMIXL", "HPOL Switch", "HPOL" },
1537 { "RECMIXL", "INL Switch", "INL VOL" },
1538 { "RECMIXL", "BST2 Switch", "BST2" },
1539 { "RECMIXL", "BST1 Switch", "BST1" },
1540 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1541
1542 { "RECMIXR", "HPOR Switch", "HPOR" },
1543 { "RECMIXR", "INR Switch", "INR VOL" },
1544 { "RECMIXR", "BST2 Switch", "BST2" },
1545 { "RECMIXR", "BST1 Switch", "BST1" },
1546 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1547
1548 { "ADC L", NULL, "RECMIXL" },
1549 { "ADC L", NULL, "ADC L power" },
1550 { "ADC R", NULL, "RECMIXR" },
1551 { "ADC R", NULL, "ADC R power" },
1552
1553 {"DMIC L1", NULL, "DMIC CLK"},
1554 {"DMIC L1", NULL, "DMIC1 Power"},
1555 {"DMIC R1", NULL, "DMIC CLK"},
1556 {"DMIC R1", NULL, "DMIC1 Power"},
1557 {"DMIC L2", NULL, "DMIC CLK"},
1558 {"DMIC L2", NULL, "DMIC2 Power"},
1559 {"DMIC R2", NULL, "DMIC CLK"},
1560 {"DMIC R2", NULL, "DMIC2 Power"},
1561
1562 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1563 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1564
1565 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1566 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1567
1568 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1569 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1570
1571 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1572 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1573 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1574 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1575
1576 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1577 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1578 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1579 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1580
1581 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1582 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1583 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1584 { "Mono ADC L1 Mux", "ADC", "ADC L" },
1585
1586 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1587 { "Mono ADC R1 Mux", "ADC", "ADC R" },
1588 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1589 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1590
1591 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1592 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1593 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1594 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1595
1596 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1597 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1598 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1599
1600 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1601 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1602 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1603
1604 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1605 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1606 { "Mono ADC MIXL", NULL, "adc mono left filter" },
1607 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1608
1609 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1610 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1611 { "Mono ADC MIXR", NULL, "adc mono right filter" },
1612 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1613
1614 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1615 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1616 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1617
1618 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1619 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1620 { "IF_ADC2", NULL, "Mono ADC MIXL" },
1621 { "IF_ADC2", NULL, "Mono ADC MIXR" },
1622 { "VAD_ADC", NULL, "VAD ADC Mux" },
1623
1624 { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1625 { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1626 { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1627
1628 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1629 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1630 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1631
1632 { "IF1 ADC", NULL, "I2S1" },
1633 { "IF1 ADC", NULL, "IF1 ADC Mux" },
1634 { "IF2 ADC", NULL, "I2S2" },
1635 { "IF2 ADC", NULL, "IF2 ADC Mux" },
1636
1637 { "AIF1TX", NULL, "IF1 ADC" },
1638 { "AIF1TX", NULL, "IF2 ADC" },
1639 { "AIF2TX", NULL, "IF2 ADC" },
1640
1641 { "IF1 DAC1", NULL, "AIF1RX" },
1642 { "IF1 DAC2", NULL, "AIF1RX" },
1643 { "IF2 DAC", NULL, "AIF2RX" },
1644
1645 { "IF1 DAC1", NULL, "I2S1" },
1646 { "IF1 DAC2", NULL, "I2S1" },
1647 { "IF2 DAC", NULL, "I2S2" },
1648
1649 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1650 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1651 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1652 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1653 { "IF2 DAC L", NULL, "IF2 DAC" },
1654 { "IF2 DAC R", NULL, "IF2 DAC" },
1655
1656 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1657 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1658
1659 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1660 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1661
1662 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1663 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1664 { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1665 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1666 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1667 { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1668
1669 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1670 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1671 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1672 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1673 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1674 { "DAC L2 Volume", NULL, "dac mono left filter" },
1675
1676 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1677 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1678 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1679 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1680 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1681 { "DAC R2 Volume", NULL, "dac mono right filter" },
1682
1683 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1684 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1685 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1686 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1687 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1688 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1689 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1690 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1691
1692 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1693 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1694 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1695 { "Mono DAC MIXL", NULL, "dac mono left filter" },
1696 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1697 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1698 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1699 { "Mono DAC MIXR", NULL, "dac mono right filter" },
1700
1701 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1702 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1703 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1704 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1705 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1706 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1707
1708 { "DAC L1", NULL, "Stereo DAC MIXL" },
1709 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1710 { "DAC R1", NULL, "Stereo DAC MIXR" },
1711 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1712 { "DAC L2", NULL, "Mono DAC MIXL" },
1713 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1714 { "DAC R2", NULL, "Mono DAC MIXR" },
1715 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1716
1717 { "SPK MIXL", "BST1 Switch", "BST1" },
1718 { "SPK MIXL", "INL Switch", "INL VOL" },
1719 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1720 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1721 { "SPK MIXR", "BST2 Switch", "BST2" },
1722 { "SPK MIXR", "INR Switch", "INR VOL" },
1723 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1724 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1725
1726 { "OUT MIXL", "BST1 Switch", "BST1" },
1727 { "OUT MIXL", "INL Switch", "INL VOL" },
1728 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1729 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1730
1731 { "OUT MIXR", "BST2 Switch", "BST2" },
1732 { "OUT MIXR", "INR Switch", "INR VOL" },
1733 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1734 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1735
1736 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1737 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1738 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1739 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1740 { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1741 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1742 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1743 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1744 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1745 { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1746
1747 { "DAC 2", NULL, "DAC L2" },
1748 { "DAC 2", NULL, "DAC R2" },
1749 { "DAC 1", NULL, "DAC L1" },
1750 { "DAC 1", NULL, "DAC R1" },
1751 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1752 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1753 { "HPOVOL", NULL, "HPOVOL L" },
1754 { "HPOVOL", NULL, "HPOVOL R" },
1755 { "HPO MIX", "DAC1 Switch", "DAC 1" },
1756 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1757
1758 { "SPKVOL L", "Switch", "SPK MIXL" },
1759 { "SPKVOL R", "Switch", "SPK MIXR" },
1760
1761 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1762 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1763 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1764 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1765 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1766 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1767
1768 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1769 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1770 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1771 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1772
1773 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1774 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1775 { "PDM1 L Mux", NULL, "PDM1 Power" },
1776 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1777 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1778 { "PDM1 R Mux", NULL, "PDM1 Power" },
1779
1780 { "HP amp", NULL, "HPO MIX" },
1781 { "HP amp", NULL, "JD Power" },
1782 { "HP amp", NULL, "Mic Det Power" },
1783 { "HP amp", NULL, "LDO2" },
1784 { "HPOL", NULL, "HP amp" },
1785 { "HPOR", NULL, "HP amp" },
1786
1787 { "LOUT amp", NULL, "LOUT MIX" },
1788 { "LOUTL", NULL, "LOUT amp" },
1789 { "LOUTR", NULL, "LOUT amp" },
1790
1791 { "PDM1 L", "Switch", "PDM1 L Mux" },
1792 { "PDM1 R", "Switch", "PDM1 R Mux" },
1793
1794 { "PDM1L", NULL, "PDM1 L" },
1795 { "PDM1R", NULL, "PDM1 R" },
1796
1797 { "SPK amp", NULL, "SPOL MIX" },
1798 { "SPK amp", NULL, "SPOR MIX" },
1799 { "SPOL", NULL, "SPK amp" },
1800 { "SPOR", NULL, "SPK amp" },
1801};
1802
1803static int get_clk_info(int sclk, int rate)
1804{
1805 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1806
1807 if (sclk <= 0 || rate <= 0)
1808 return -EINVAL;
1809
1810 rate = rate << 8;
1811 for (i = 0; i < ARRAY_SIZE(pd); i++)
1812 if (sclk == rate * pd[i])
1813 return i;
1814
1815 return -EINVAL;
1816}
1817
1818static int rt5645_hw_params(struct snd_pcm_substream *substream,
1819 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1820{
1821 struct snd_soc_codec *codec = dai->codec;
1822 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1823 unsigned int val_len = 0, val_clk, mask_clk;
1824 int pre_div, bclk_ms, frame_size;
1825
1826 rt5645->lrck[dai->id] = params_rate(params);
1827 pre_div = get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
1828 if (pre_div < 0) {
1829 dev_err(codec->dev, "Unsupported clock setting\n");
1830 return -EINVAL;
1831 }
1832 frame_size = snd_soc_params_to_frame_size(params);
1833 if (frame_size < 0) {
1834 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1835 return -EINVAL;
1836 }
1837 bclk_ms = frame_size > 32;
1838 rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
1839
1840 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1841 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
1842 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1843 bclk_ms, pre_div, dai->id);
1844
1845 switch (params_width(params)) {
1846 case 16:
1847 break;
1848 case 20:
1849 val_len |= RT5645_I2S_DL_20;
1850 break;
1851 case 24:
1852 val_len |= RT5645_I2S_DL_24;
1853 break;
1854 case 8:
1855 val_len |= RT5645_I2S_DL_8;
1856 break;
1857 default:
1858 return -EINVAL;
1859 }
1860
1861 switch (dai->id) {
1862 case RT5645_AIF1:
1863 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
1864 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
1865 pre_div << RT5645_I2S_PD1_SFT;
1866 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1867 RT5645_I2S_DL_MASK, val_len);
1868 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1869 break;
1870 case RT5645_AIF2:
1871 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
1872 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
1873 pre_div << RT5645_I2S_PD2_SFT;
1874 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1875 RT5645_I2S_DL_MASK, val_len);
1876 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1877 break;
1878 default:
1879 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1880 return -EINVAL;
1881 }
1882
1883 return 0;
1884}
1885
1886static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1887{
1888 struct snd_soc_codec *codec = dai->codec;
1889 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1890 unsigned int reg_val = 0;
1891
1892 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1893 case SND_SOC_DAIFMT_CBM_CFM:
1894 rt5645->master[dai->id] = 1;
1895 break;
1896 case SND_SOC_DAIFMT_CBS_CFS:
1897 reg_val |= RT5645_I2S_MS_S;
1898 rt5645->master[dai->id] = 0;
1899 break;
1900 default:
1901 return -EINVAL;
1902 }
1903
1904 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1905 case SND_SOC_DAIFMT_NB_NF:
1906 break;
1907 case SND_SOC_DAIFMT_IB_NF:
1908 reg_val |= RT5645_I2S_BP_INV;
1909 break;
1910 default:
1911 return -EINVAL;
1912 }
1913
1914 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1915 case SND_SOC_DAIFMT_I2S:
1916 break;
1917 case SND_SOC_DAIFMT_LEFT_J:
1918 reg_val |= RT5645_I2S_DF_LEFT;
1919 break;
1920 case SND_SOC_DAIFMT_DSP_A:
1921 reg_val |= RT5645_I2S_DF_PCM_A;
1922 break;
1923 case SND_SOC_DAIFMT_DSP_B:
1924 reg_val |= RT5645_I2S_DF_PCM_B;
1925 break;
1926 default:
1927 return -EINVAL;
1928 }
1929 switch (dai->id) {
1930 case RT5645_AIF1:
1931 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1932 RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1933 RT5645_I2S_DF_MASK, reg_val);
1934 break;
8c325704
AL		 1935 case RT5645_AIF2:
1936 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1319b2f6
OC		 1937 RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1938 RT5645_I2S_DF_MASK, reg_val);
1939 break;
1940 default:
1941 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1942 return -EINVAL;
1943 }
1944 return 0;
1945}
1946
1947static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
1948 int clk_id, unsigned int freq, int dir)
1949{
1950 struct snd_soc_codec *codec = dai->codec;
1951 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1952 unsigned int reg_val = 0;
1953
1954 if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
1955 return 0;
1956
1957 switch (clk_id) {
1958 case RT5645_SCLK_S_MCLK:
1959 reg_val |= RT5645_SCLK_SRC_MCLK;
1960 break;
1961 case RT5645_SCLK_S_PLL1:
1962 reg_val |= RT5645_SCLK_SRC_PLL1;
1963 break;
1964 case RT5645_SCLK_S_RCCLK:
1965 reg_val |= RT5645_SCLK_SRC_RCCLK;
1966 break;
1967 default:
1968 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1969 return -EINVAL;
1970 }
1971 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1972 RT5645_SCLK_SRC_MASK, reg_val);
1973 rt5645->sysclk = freq;
1974 rt5645->sysclk_src = clk_id;
1975
1976 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1977
1978 return 0;
1979}
1980
1981/**
1982 * rt5645_pll_calc - Calcualte PLL M/N/K code.
1983 * @freq_in: external clock provided to codec.
1984 * @freq_out: target clock which codec works on.
1985 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1986 *
1987 * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
1988 * which make calculation more efficiently.
1989 *
1990 * Returns 0 for success or negative error code.
1991 */
1992static int rt5645_pll_calc(const unsigned int freq_in,
1993 const unsigned int freq_out, struct rt5645_pll_code *pll_code)
1994{
1995 int max_n = RT5645_PLL_N_MAX, max_m = RT5645_PLL_M_MAX;
1996 int k, n = 0, m = 0, red, n_t, m_t, pll_out, in_t, out_t;
1997 int red_t = abs(freq_out - freq_in);
1998 bool bypass = false;
1999
2000 if (RT5645_PLL_INP_MAX < freq_in || RT5645_PLL_INP_MIN > freq_in)
2001 return -EINVAL;
2002
2003 k = 100000000 / freq_out - 2;
2004 if (k > RT5645_PLL_K_MAX)
2005 k = RT5645_PLL_K_MAX;
2006 for (n_t = 0; n_t <= max_n; n_t++) {
2007 in_t = freq_in / (k + 2);
2008 pll_out = freq_out / (n_t + 2);
2009 if (in_t < 0)
2010 continue;
2011 if (in_t == pll_out) {
2012 bypass = true;
2013 n = n_t;
2014 goto code_find;
2015 }
2016 red = abs(in_t - pll_out);
2017 if (red < red_t) {
2018 bypass = true;
2019 n = n_t;
2020 m = m_t;
2021 if (red == 0)
2022 goto code_find;
2023 red_t = red;
2024 }
2025 for (m_t = 0; m_t <= max_m; m_t++) {
2026 out_t = in_t / (m_t + 2);
2027 red = abs(out_t - pll_out);
2028 if (red < red_t) {
2029 bypass = false;
2030 n = n_t;
2031 m = m_t;
2032 if (red == 0)
2033 goto code_find;
2034 red_t = red;
2035 }
2036 }
2037 }
2038 pr_debug("Only get approximation about PLL\n");
2039
2040code_find:
2041
2042 pll_code->m_bp = bypass;
2043 pll_code->m_code = m;
2044 pll_code->n_code = n;
2045 pll_code->k_code = k;
2046 return 0;
2047}
2048
2049static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2050 unsigned int freq_in, unsigned int freq_out)
2051{
2052 struct snd_soc_codec *codec = dai->codec;
2053 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2054 struct rt5645_pll_code pll_code;
2055 int ret;
2056
2057 if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2058 freq_out == rt5645->pll_out)
2059 return 0;
2060
2061 if (!freq_in || !freq_out) {
2062 dev_dbg(codec->dev, "PLL disabled\n");
2063
2064 rt5645->pll_in = 0;
2065 rt5645->pll_out = 0;
2066 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2067 RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2068 return 0;
2069 }
2070
2071 switch (source) {
2072 case RT5645_PLL1_S_MCLK:
2073 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2074 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2075 break;
2076 case RT5645_PLL1_S_BCLK1:
2077 case RT5645_PLL1_S_BCLK2:
2078 switch (dai->id) {
2079 case RT5645_AIF1:
2080 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2081 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2082 break;
2083 case RT5645_AIF2:
2084 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2085 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2086 break;
2087 default:
2088 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2089 return -EINVAL;
2090 }
2091 break;
2092 default:
2093 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2094 return -EINVAL;
2095 }
2096
2097 ret = rt5645_pll_calc(freq_in, freq_out, &pll_code);
2098 if (ret < 0) {
2099 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2100 return ret;
2101 }
2102
2103 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2104 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2105 pll_code.n_code, pll_code.k_code);
2106
2107 snd_soc_write(codec, RT5645_PLL_CTRL1,
2108 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2109 snd_soc_write(codec, RT5645_PLL_CTRL2,
2110 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2111 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2112
2113 rt5645->pll_in = freq_in;
2114 rt5645->pll_out = freq_out;
2115 rt5645->pll_src = source;
2116
2117 return 0;
2118}
2119
2120static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2121 unsigned int rx_mask, int slots, int slot_width)
2122{
2123 struct snd_soc_codec *codec = dai->codec;
2124 unsigned int val = 0;
2125
2126 if (rx_mask || tx_mask)
2127 val |= (1 << 14);
2128
2129 switch (slots) {
2130 case 4:
2131 val |= (1 << 12);
2132 break;
2133 case 6:
2134 val |= (2 << 12);
2135 break;
2136 case 8:
2137 val |= (3 << 12);
2138 break;
2139 case 2:
2140 default:
2141 break;
2142 }
2143
2144 switch (slot_width) {
2145 case 20:
2146 val |= (1 << 10);
2147 break;
2148 case 24:
2149 val |= (2 << 10);
2150 break;
2151 case 32:
2152 val |= (3 << 10);
2153 break;
2154 case 16:
2155 default:
2156 break;
2157 }
2158
2159 snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, 0x7c00, val);
2160
2161 return 0;
2162}
2163
2164static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2165 enum snd_soc_bias_level level)
2166{
2167 switch (level) {
2168 case SND_SOC_BIAS_STANDBY:
2169 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2170 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2171 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2172 RT5645_PWR_BG | RT5645_PWR_VREF2,
2173 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2174 RT5645_PWR_BG | RT5645_PWR_VREF2);
2175 mdelay(10);
2176 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2177 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2178 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2179 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2180 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2181 }
2182 break;
2183
2184 case SND_SOC_BIAS_OFF:
2185 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2186 snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128);
2187 snd_soc_write(codec, RT5645_PWR_DIG1, 0x0000);
2188 snd_soc_write(codec, RT5645_PWR_DIG2, 0x0000);
2189 snd_soc_write(codec, RT5645_PWR_VOL, 0x0000);
2190 snd_soc_write(codec, RT5645_PWR_MIXER, 0x0000);
2191 snd_soc_write(codec, RT5645_PWR_ANLG1, 0x0000);
2192 snd_soc_write(codec, RT5645_PWR_ANLG2, 0x0000);
2193 break;
2194
2195 default:
2196 break;
2197 }
2198 codec->dapm.bias_level = level;
2199
2200 return 0;
2201}
2202
2203static int rt5645_probe(struct snd_soc_codec *codec)
2204{
2205 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2206
2207 rt5645->codec = codec;
2208
2209 rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2210
2211 snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
1319b2f6
OC		 2212
2213 return 0;
2214}
2215
2216static int rt5645_remove(struct snd_soc_codec *codec)
2217{
2218 rt5645_reset(codec);
2219 return 0;
2220}
2221
2222#ifdef CONFIG_PM
2223static int rt5645_suspend(struct snd_soc_codec *codec)
2224{
2225 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2226
2227 regcache_cache_only(rt5645->regmap, true);
2228 regcache_mark_dirty(rt5645->regmap);
2229
2230 return 0;
2231}
2232
2233static int rt5645_resume(struct snd_soc_codec *codec)
2234{
2235 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2236
2237 regcache_cache_only(rt5645->regmap, false);
0f776efd 2238 regcache_sync(rt5645->regmap);
1319b2f6
OC		 2239
2240 return 0;
2241}
2242#else
2243#define rt5645_suspend NULL
2244#define rt5645_resume NULL
2245#endif
2246
2247#define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2248#define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2249 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2250
9e22f782 2251static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
1319b2f6
OC		 2252 .hw_params = rt5645_hw_params,
2253 .set_fmt = rt5645_set_dai_fmt,
2254 .set_sysclk = rt5645_set_dai_sysclk,
2255 .set_tdm_slot = rt5645_set_tdm_slot,
2256 .set_pll = rt5645_set_dai_pll,
2257};
2258
9e22f782 2259static struct snd_soc_dai_driver rt5645_dai[] = {
1319b2f6
OC		 2260 {
2261 .name = "rt5645-aif1",
2262 .id = RT5645_AIF1,
2263 .playback = {
2264 .stream_name = "AIF1 Playback",
2265 .channels_min = 1,
2266 .channels_max = 2,
2267 .rates = RT5645_STEREO_RATES,
2268 .formats = RT5645_FORMATS,
2269 },
2270 .capture = {
2271 .stream_name = "AIF1 Capture",
2272 .channels_min = 1,
2273 .channels_max = 2,
2274 .rates = RT5645_STEREO_RATES,
2275 .formats = RT5645_FORMATS,
2276 },
2277 .ops = &rt5645_aif_dai_ops,
2278 },
2279 {
2280 .name = "rt5645-aif2",
2281 .id = RT5645_AIF2,
2282 .playback = {
2283 .stream_name = "AIF2 Playback",
2284 .channels_min = 1,
2285 .channels_max = 2,
2286 .rates = RT5645_STEREO_RATES,
2287 .formats = RT5645_FORMATS,
2288 },
2289 .capture = {
2290 .stream_name = "AIF2 Capture",
2291 .channels_min = 1,
2292 .channels_max = 2,
2293 .rates = RT5645_STEREO_RATES,
2294 .formats = RT5645_FORMATS,
2295 },
2296 .ops = &rt5645_aif_dai_ops,
2297 },
2298};
2299
2300static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2301 .probe = rt5645_probe,
2302 .remove = rt5645_remove,
2303 .suspend = rt5645_suspend,
2304 .resume = rt5645_resume,
2305 .set_bias_level = rt5645_set_bias_level,
2306 .idle_bias_off = true,
2307 .controls = rt5645_snd_controls,
2308 .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2309 .dapm_widgets = rt5645_dapm_widgets,
2310 .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2311 .dapm_routes = rt5645_dapm_routes,
2312 .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2313};
2314
2315static const struct regmap_config rt5645_regmap = {
2316 .reg_bits = 8,
2317 .val_bits = 16,
2318
2319 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2320 RT5645_PR_SPACING),
2321 .volatile_reg = rt5645_volatile_register,
2322 .readable_reg = rt5645_readable_register,
2323
2324 .cache_type = REGCACHE_RBTREE,
2325 .reg_defaults = rt5645_reg,
2326 .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2327 .ranges = rt5645_ranges,
2328 .num_ranges = ARRAY_SIZE(rt5645_ranges),
2329};
2330
2331static const struct i2c_device_id rt5645_i2c_id[] = {
2332 { "rt5645", 0 },
2333 { }
2334};
2335MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2336
2337static int rt5645_i2c_probe(struct i2c_client *i2c,
2338 const struct i2c_device_id *id)
2339{
2340 struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2341 struct rt5645_priv *rt5645;
2342 int ret;
2343 unsigned int val;
2344
2345 rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2346 GFP_KERNEL);
2347 if (rt5645 == NULL)
2348 return -ENOMEM;
2349
2350 i2c_set_clientdata(i2c, rt5645);
2351
2352 if (pdata)
2353 rt5645->pdata = *pdata;
2354
2355 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2356 if (IS_ERR(rt5645->regmap)) {
2357 ret = PTR_ERR(rt5645->regmap);
2358 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2359 ret);
2360 return ret;
2361 }
2362
2363 regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2364 if (val != RT5645_DEVICE_ID) {
2365 dev_err(&i2c->dev,
2366 "Device with ID register %x is not rt5645\n", val);
2367 return -ENODEV;
2368 }
2369
2370 regmap_write(rt5645->regmap, RT5645_RESET, 0);
2371
2372 ret = regmap_register_patch(rt5645->regmap, init_list,
2373 ARRAY_SIZE(init_list));
2374 if (ret != 0)
2375 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2376
2377 if (rt5645->pdata.in2_diff)
2378 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2379 RT5645_IN_DF2, RT5645_IN_DF2);
2380
2381 if (rt5645->pdata.dmic_en) {
2382 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2383 RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2384
2385 switch (rt5645->pdata.dmic1_data_pin) {
2386 case RT5645_DMIC_DATA_IN2N:
2387 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2388 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2389 break;
2390
2391 case RT5645_DMIC_DATA_GPIO5:
2392 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2393 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2394 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2395 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2396 break;
2397
2398 case RT5645_DMIC_DATA_GPIO11:
2399 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2400 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2401 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2402 RT5645_GP11_PIN_MASK,
2403 RT5645_GP11_PIN_DMIC1_SDA);
2404 break;
2405
2406 default:
2407 break;
2408 }
2409
2410 switch (rt5645->pdata.dmic2_data_pin) {
2411 case RT5645_DMIC_DATA_IN2P:
2412 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2413 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2414 break;
2415
2416 case RT5645_DMIC_DATA_GPIO6:
2417 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2418 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2419 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2420 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2421 break;
2422
2423 case RT5645_DMIC_DATA_GPIO10:
2424 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2425 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2426 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2427 RT5645_GP10_PIN_MASK,
2428 RT5645_GP10_PIN_DMIC2_SDA);
2429 break;
2430
2431 case RT5645_DMIC_DATA_GPIO12:
2432 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2433 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2434 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2435 RT5645_GP12_PIN_MASK,
2436 RT5645_GP12_PIN_DMIC2_SDA);
2437 break;
2438
2439 default:
2440 break;
2441 }
2442
2443 }
2444
2445 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2446 rt5645_dai, ARRAY_SIZE(rt5645_dai));
2447 if (ret < 0)
2448 goto err;
2449
2450 return 0;
2451err:
2452 return ret;
2453}
2454
2455static int rt5645_i2c_remove(struct i2c_client *i2c)
2456{
2457 snd_soc_unregister_codec(&i2c->dev);
2458
2459 return 0;
2460}
2461
9e22f782 2462static struct i2c_driver rt5645_i2c_driver = {
1319b2f6
OC		 2463 .driver = {
2464 .name = "rt5645",
2465 .owner = THIS_MODULE,
2466 },
2467 .probe = rt5645_i2c_probe,
2468 .remove = rt5645_i2c_remove,
2469 .id_table = rt5645_i2c_id,
2470};
2471module_i2c_driver(rt5645_i2c_driver);
2472
2473MODULE_DESCRIPTION("ASoC RT5645 driver");
2474MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2475MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)