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[ALSA] snd-emu10k1:Implement SPDIF/ADAT status.
[linux-2.6-block.git] / sound / pci / emu10k1 / emu10k1_main.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
9f4bd5dd 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
1da177e4 7 * Added support for Audigy 2 Value.
9f4bd5dd
JCD		 8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
1da177e4
LT		 10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
42f53226
JCD		 34#include <linux/sched.h>
35#include <linux/kthread.h>
1da177e4
LT		 36#include <sound/driver.h>
37#include <linux/delay.h>
38#include <linux/init.h>
39#include <linux/interrupt.h>
40#include <linux/pci.h>
41#include <linux/slab.h>
42#include <linux/vmalloc.h>
62932df8
IM		 43#include <linux/mutex.h>
44
1da177e4
LT		 45
46#include <sound/core.h>
47#include <sound/emu10k1.h>
9f4bd5dd 48#include <linux/firmware.h>
1da177e4 49#include "p16v.h"
e2b15f8f 50#include "tina2.h"
184c1e2c 51#include "p17v.h"
1da177e4 52
19b99fba 53
7e0af29d
CL		 54#define HANA_FILENAME "emu/hana.fw"
55#define DOCK_FILENAME "emu/audio_dock.fw"
3663d845
JCD		 56#define EMU1010B_FILENAME "emu/emu1010b.fw"
57#define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
d9e8a552 58#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
7e0af29d
CL		 59
60MODULE_FIRMWARE(HANA_FILENAME);
61MODULE_FIRMWARE(DOCK_FILENAME);
3663d845
JCD		 62MODULE_FIRMWARE(EMU1010B_FILENAME);
63MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
d9e8a552 64MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
7e0af29d
CL		 65
66
1da177e4
LT		 67/*************************************************************************
68 * EMU10K1 init / done
69 *************************************************************************/
70
eb4698f3 71void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
1da177e4
LT		 72{
73 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
74 snd_emu10k1_ptr_write(emu, IP, ch, 0);
75 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
76 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
77 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
78 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
79 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
80
81 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
82 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
83 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
84 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
85 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
86 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
87
88 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
89 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
90 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
91 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
92 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
93 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
94 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
95 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
96
97 /*** these are last so OFF prevents writing ***/
98 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
99 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
100 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
101 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
102 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
103
104 /* Audigy extra stuffs */
105 if (emu->audigy) {
106 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
107 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
108 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
111 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
112 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
113 }
114}
115
18f3c59f
JCD		 116static unsigned int spi_dac_init[] = {
117 0x00ff,
118 0x02ff,
119 0x0400,
120 0x0520,
121 0x0600,
122 0x08ff,
123 0x0aff,
124 0x0cff,
125 0x0eff,
126 0x10ff,
127 0x1200,
128 0x1400,
129 0x1480,
130 0x1800,
131 0x1aff,
132 0x1cff,
133 0x1e00,
134 0x0530,
135 0x0602,
136 0x0622,
137 0x1400,
138};
184c1e2c
JCD		 139
140static unsigned int i2c_adc_init[][2] = {
141 { 0x17, 0x00 }, /* Reset */
142 { 0x07, 0x00 }, /* Timeout */
143 { 0x0b, 0x22 }, /* Interface control */
144 { 0x0c, 0x22 }, /* Master mode control */
145 { 0x0d, 0x08 }, /* Powerdown control */
146 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
147 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
148 { 0x10, 0x7b }, /* ALC Control 1 */
149 { 0x11, 0x00 }, /* ALC Control 2 */
150 { 0x12, 0x32 }, /* ALC Control 3 */
151 { 0x13, 0x00 }, /* Noise gate control */
152 { 0x14, 0xa6 }, /* Limiter control */
153 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
154};
18f3c59f 155
09668b44 156static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
1da177e4 157{
1da177e4 158 unsigned int silent_page;
09668b44 159 int ch;
184c1e2c 160 u32 tmp;
1da177e4
LT		 161
162 /* disable audio and lock cache */
09668b44
TI		 163 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
164 emu->port + HCFG);
1da177e4
LT		 165
166 /* reset recording buffers */
167 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
168 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
169 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
170 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
171 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
172 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
173
174 /* disable channel interrupt */
175 outl(0, emu->port + INTE);
176 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
177 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
178 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
179 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
180
181 if (emu->audigy){
182 /* set SPDIF bypass mode */
183 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
184 /* enable rear left + rear right AC97 slots */
09668b44
TI		 185 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
186 AC97SLOT_REAR_LEFT);
1da177e4
LT		 187 }
188
189 /* init envelope engine */
09668b44 190 for (ch = 0; ch < NUM_G; ch++)
1da177e4 191 snd_emu10k1_voice_init(emu, ch);
1da177e4 192
09668b44
TI		 193 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
194 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
195 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
1da177e4 196
2b637da5 197 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4 198 /* Hacks for Alice3 to work independent of haP16V driver */
1da177e4
LT		 199 //Setup SRCMulti_I2S SamplingRate
200 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
201 tmp &= 0xfffff1ff;
202 tmp |= (0x2<<9);
203 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
204
205 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
206 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
207 /* Setup SRCMulti Input Audio Enable */
208 /* Use 0xFFFFFFFF to enable P16V sounds. */
209 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
210
211 /* Enabled Phased (8-channel) P16V playback */
212 outl(0x0201, emu->port + HCFG2);
213 /* Set playback routing. */
fd9a98ec 214 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
1da177e4 215 }
e0474e53 216 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
1da177e4 217 /* Hacks for Alice3 to work independent of haP16V driver */
09668b44 218 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
1da177e4
LT		 219 //Setup SRCMulti_I2S SamplingRate
220 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
221 tmp &= 0xfffff1ff;
222 tmp |= (0x2<<9);
223 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
224
225 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
226 outl(0x600000, emu->port + 0x20);
227 outl(0x14, emu->port + 0x24);
228
229 /* Setup SRCMulti Input Audio Enable */
230 outl(0x7b0000, emu->port + 0x20);
231 outl(0xFF000000, emu->port + 0x24);
232
233 /* Setup SPDIF Out Audio Enable */
234 /* The Audigy 2 Value has a separate SPDIF out,
235 * so no need for a mixer switch
236 */
237 outl(0x7a0000, emu->port + 0x20);
238 outl(0xFF000000, emu->port + 0x24);
239 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
240 outl(tmp, emu->port + A_IOCFG);
241 }
27fe864e 242 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
18f3c59f
JCD		 243 int size, n;
244
245 size = ARRAY_SIZE(spi_dac_init);
9f4bd5dd 246 for (n = 0; n < size; n++)
18f3c59f
JCD		 247 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
248
27fe864e 249 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
ccadc3e3
JCD		 250 /* Enable GPIOs
251 * GPIO0: Unknown
252 * GPIO1: Speakers-enabled.
253 * GPIO2: Unknown
254 * GPIO3: Unknown
255 * GPIO4: IEC958 Output on.
256 * GPIO5: Unknown
257 * GPIO6: Unknown
258 * GPIO7: Unknown
259 */
260 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
261
27fe864e 262 }
184c1e2c
JCD		 263 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
264 int size, n;
265
266 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
267 tmp = inl(emu->port + A_IOCFG);
268 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
269 tmp = inl(emu->port + A_IOCFG);
270 size = ARRAY_SIZE(i2c_adc_init);
271 for (n = 0; n < size; n++)
272 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
273 for (n=0; n < 4; n++) {
274 emu->i2c_capture_volume[n][0]= 0xcf;
275 emu->i2c_capture_volume[n][1]= 0xcf;
276 }
277
278 }
279
27fe864e 280
1da177e4
LT		 281 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
282 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
283 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
284
285 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
286 for (ch = 0; ch < NUM_G; ch++) {
287 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
288 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
289 }
290
9f4bd5dd
JCD		 291 if (emu->card_capabilities->emu1010) {
292 outl(HCFG_AUTOMUTE_ASYNC |
293 HCFG_EMU32_SLAVE |
294 HCFG_AUDIOENABLE, emu->port + HCFG);
1da177e4
LT		 295 /*
296 * Hokay, setup HCFG
297 * Mute Disable Audio = 0
298 * Lock Tank Memory = 1
299 * Lock Sound Memory = 0
300 * Auto Mute = 1
301 */
9f4bd5dd 302 } else if (emu->audigy) {
1da177e4
LT		 303 if (emu->revision == 4) /* audigy2 */
304 outl(HCFG_AUDIOENABLE |
305 HCFG_AC3ENABLE_CDSPDIF |
306 HCFG_AC3ENABLE_GPSPDIF |
307 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308 else
309 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
e0474e53
JCD		 310 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311 * e.g. card_capabilities->joystick */
1da177e4
LT		 312 } else if (emu->model == 0x20 ||
313 emu->model == 0xc400 ||
314 (emu->model == 0x21 && emu->revision < 6))
315 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316 else
317 // With on-chip joystick
318 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319
320 if (enable_ir) { /* enable IR for SB Live */
9f4bd5dd
JCD		 321 if (emu->card_capabilities->emu1010) {
322 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 323 } else if (emu->card_capabilities->i2c_adc) {
324 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 325 } else if (emu->audigy) {
1da177e4
LT		 326 unsigned int reg = inl(emu->port + A_IOCFG);
327 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328 udelay(500);
329 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 udelay(100);
331 outl(reg, emu->port + A_IOCFG);
332 } else {
333 unsigned int reg = inl(emu->port + HCFG);
334 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335 udelay(500);
336 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337 udelay(100);
338 outl(reg, emu->port + HCFG);
339 }
340 }
341
9f4bd5dd
JCD		 342 if (emu->card_capabilities->emu1010) {
343 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 344 } else if (emu->card_capabilities->i2c_adc) {
345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 346 } else if (emu->audigy) { /* enable analog output */
1da177e4
LT		 347 unsigned int reg = inl(emu->port + A_IOCFG);
348 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
349 }
350
09668b44
TI		 351 return 0;
352}
1da177e4 353
09668b44
TI		 354static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
355{
1da177e4
LT		 356 /*
357 * Enable the audio bit
358 */
359 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
360
361 /* Enable analog/digital outs on audigy */
9f4bd5dd
JCD		 362 if (emu->card_capabilities->emu1010) {
363 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 364 } else if (emu->card_capabilities->i2c_adc) {
365 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 366 } else if (emu->audigy) {
1da177e4
LT		 367 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
368
e0474e53 369 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4
LT		 370 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
371 * This has to be done after init ALice3 I2SOut beyond 48KHz.
372 * So, sequence is important. */
373 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
e0474e53 374 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
1da177e4
LT		 375 /* Unmute Analog now. */
376 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
377 } else {
378 /* Disable routing from AC97 line out to Front speakers */
379 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
380 }
381 }
382
383#if 0
384 {
385 unsigned int tmp;
386 /* FIXME: the following routine disables LiveDrive-II !! */
387 // TOSLink detection
388 emu->tos_link = 0;
389 tmp = inl(emu->port + HCFG);
390 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
391 outl(tmp|0x800, emu->port + HCFG);
392 udelay(50);
393 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
394 emu->tos_link = 1;
395 outl(tmp, emu->port + HCFG);
396 }
397 }
398 }
399#endif
400
401 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
1da177e4
LT		 402}
403
09668b44 404int snd_emu10k1_done(struct snd_emu10k1 * emu)
1da177e4
LT		 405{
406 int ch;
407
408 outl(0, emu->port + INTE);
409
410 /*
411 * Shutdown the chip
412 */
413 for (ch = 0; ch < NUM_G; ch++)
414 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
415 for (ch = 0; ch < NUM_G; ch++) {
416 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
417 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
418 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
419 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
420 }
421
422 /* reset recording buffers */
423 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
424 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
427 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
428 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
429 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
430 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
431 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
432 if (emu->audigy)
433 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
434 else
435 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
436
437 /* disable channel interrupt */
438 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
439 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
441 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
442
1da177e4
LT		 443 /* disable audio and lock cache */
444 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
445 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
446
1da177e4
LT		 447 return 0;
448}
449
450/*************************************************************************
451 * ECARD functional implementation
452 *************************************************************************/
453
454/* In A1 Silicon, these bits are in the HC register */
455#define HOOKN_BIT (1L << 12)
456#define HANDN_BIT (1L << 11)
457#define PULSEN_BIT (1L << 10)
458
459#define EC_GDI1 (1 << 13)
460#define EC_GDI0 (1 << 14)
461
462#define EC_NUM_CONTROL_BITS 20
463
464#define EC_AC3_DATA_SELN 0x0001L
465#define EC_EE_DATA_SEL 0x0002L
466#define EC_EE_CNTRL_SELN 0x0004L
467#define EC_EECLK 0x0008L
468#define EC_EECS 0x0010L
469#define EC_EESDO 0x0020L
470#define EC_TRIM_CSN 0x0040L
471#define EC_TRIM_SCLK 0x0080L
472#define EC_TRIM_SDATA 0x0100L
473#define EC_TRIM_MUTEN 0x0200L
474#define EC_ADCCAL 0x0400L
475#define EC_ADCRSTN 0x0800L
476#define EC_DACCAL 0x1000L
477#define EC_DACMUTEN 0x2000L
478#define EC_LEDN 0x4000L
479
480#define EC_SPDIF0_SEL_SHIFT 15
481#define EC_SPDIF1_SEL_SHIFT 17
482#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
483#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
484#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
485#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
486#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
487 * be incremented any time the EEPROM's
488 * format is changed. */
489
490#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
491
492/* Addresses for special values stored in to EEPROM */
493#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
494#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
495#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
496
497#define EC_LAST_PROMFILE_ADDR 0x2f
498
499#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
500 * can be up to 30 characters in length
501 * and is stored as a NULL-terminated
502 * ASCII string. Any unused bytes must be
503 * filled with zeros */
504#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
505
506
507/* Most of this stuff is pretty self-evident. According to the hardware
508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
509 * offset problem. Weird.
510 */
511#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
512 EC_TRIM_CSN)
513
514
515#define EC_DEFAULT_ADC_GAIN 0xC4C4
516#define EC_DEFAULT_SPDIF0_SEL 0x0
517#define EC_DEFAULT_SPDIF1_SEL 0x4
518
519/**************************************************************************
520 * @func Clock bits into the Ecard's control latch. The Ecard uses a
521 * control latch will is loaded bit-serially by toggling the Modem control
522 * lines from function 2 on the E8010. This function hides these details
523 * and presents the illusion that we are actually writing to a distinct
524 * register.
525 */
526
eb4698f3 527static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
1da177e4
LT		 528{
529 unsigned short count;
530 unsigned int data;
531 unsigned long hc_port;
532 unsigned int hc_value;
533
534 hc_port = emu->port + HCFG;
535 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
536 outl(hc_value, hc_port);
537
538 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
539
540 /* Set up the value */
541 data = ((value & 0x1) ? PULSEN_BIT : 0);
542 value >>= 1;
543
544 outl(hc_value | data, hc_port);
545
546 /* Clock the shift register */
547 outl(hc_value | data | HANDN_BIT, hc_port);
548 outl(hc_value | data, hc_port);
549 }
550
551 /* Latch the bits */
552 outl(hc_value | HOOKN_BIT, hc_port);
553 outl(hc_value, hc_port);
554}
555
556/**************************************************************************
557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
558 * trim value consists of a 16bit value which is composed of two
559 * 8 bit gain/trim values, one for the left channel and one for the
560 * right channel. The following table maps from the Gain/Attenuation
561 * value in decibels into the corresponding bit pattern for a single
562 * channel.
563 */
564
eb4698f3 565static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
1da177e4
LT		 566 unsigned short gain)
567{
568 unsigned int bit;
569
570 /* Enable writing to the TRIM registers */
571 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572
573 /* Do it again to insure that we meet hold time requirements */
574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
575
576 for (bit = (1 << 15); bit; bit >>= 1) {
577 unsigned int value;
578
579 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
580
581 if (gain & bit)
582 value |= EC_TRIM_SDATA;
583
584 /* Clock the bit */
585 snd_emu10k1_ecard_write(emu, value);
586 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
587 snd_emu10k1_ecard_write(emu, value);
588 }
589
590 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
591}
592
f40b6890 593static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
1da177e4
LT		 594{
595 unsigned int hc_value;
596
597 /* Set up the initial settings */
598 emu->ecard_ctrl = EC_RAW_RUN_MODE |
599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
601
602 /* Step 0: Set the codec type in the hardware control register
603 * and enable audio output */
604 hc_value = inl(emu->port + HCFG);
605 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
606 inl(emu->port + HCFG);
607
608 /* Step 1: Turn off the led and deassert TRIM_CS */
609 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
610
611 /* Step 2: Calibrate the ADC and DAC */
612 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
613
614 /* Step 3: Wait for awhile; XXX We can't get away with this
615 * under a real operating system; we'll need to block and wait that
616 * way. */
617 snd_emu10k1_wait(emu, 48000);
618
619 /* Step 4: Switch off the DAC and ADC calibration. Note
620 * That ADC_CAL is actually an inverted signal, so we assert
621 * it here to stop calibration. */
622 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
623
624 /* Step 4: Switch into run mode */
625 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
626
627 /* Step 5: Set the analog input gain */
628 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
629
630 return 0;
631}
632
f40b6890 633static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
d83c671f
JCD		 634{
635 unsigned long special_port;
636 unsigned int value;
637
638 /* Special initialisation routine
639 * before the rest of the IO-Ports become active.
640 */
641 special_port = emu->port + 0x38;
642 value = inl(special_port);
643 outl(0x00d00000, special_port);
644 value = inl(special_port);
645 outl(0x00d00001, special_port);
646 value = inl(special_port);
647 outl(0x00d0005f, special_port);
648 value = inl(special_port);
649 outl(0x00d0007f, special_port);
650 value = inl(special_port);
651 outl(0x0090007f, special_port);
652 value = inl(special_port);
653
e2b15f8f 654 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
d83c671f
JCD		 655 return 0;
656}
657
9f4bd5dd 658static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
19b99fba 659{
9f4bd5dd
JCD		 660 int err;
661 int n, i;
662 int reg;
663 int value;
664 const struct firmware *fw_entry;
665
666 if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
667 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
668 return err;
669 }
bbb53551 670 snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
3663d845 671#if 0
9f4bd5dd
JCD		 672 if (fw_entry->size != 0x133a4) {
673 snd_printk(KERN_ERR "firmware: %s wrong size.\n",filename);
674 return -EINVAL;
675 }
3663d845 676#endif
19b99fba 677
9f4bd5dd
JCD		 678 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
679 /* GPIO7 -> FPGA PGMN
680 * GPIO6 -> FPGA CCLK
681 * GPIO5 -> FPGA DIN
682 * FPGA CONFIG OFF -> FPGA PGMN
683 */
684 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
685 udelay(1);
686 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
687 udelay(100); /* Allow FPGA memory to clean */
688 for(n = 0; n < fw_entry->size; n++) {
689 value=fw_entry->data[n];
690 for(i = 0; i < 8; i++) {
691 reg = 0x80;
692 if (value & 0x1)
693 reg = reg | 0x20;
694 value = value >> 1;
695 outl(reg, emu->port + A_IOCFG);
696 outl(reg | 0x40, emu->port + A_IOCFG);
697 }
698 }
699 /* After programming, set GPIO bit 4 high again. */
700 outl(0x10, emu->port + A_IOCFG);
701
19b99fba 702
9f4bd5dd 703 release_firmware(fw_entry);
19b99fba
JCD		 704 return 0;
705}
706
42f53226
JCD		 707int emu1010_firmware_thread(void *data) {
708 struct snd_emu10k1 * emu = data;
709 int tmp,tmp2;
710 int reg;
711 int err;
712
713 for (;;) {
714 /* Delay to allow Audio Dock to settle */
715 msleep(1000);
716 if (kthread_should_stop())
717 break;
718 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
719 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg ); /* OPTIONS: Which cards are attached to the EMU */
720 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
721 /* Audio Dock attached */
722 /* Return to Audio Dock programming mode */
723 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
724 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
725 if (emu->card_capabilities->emu1010 == 1) {
726 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
727 return err;
728 }
729 } else if (emu->card_capabilities->emu1010 == 2) {
730 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
731 return err;
732 }
733 } else if (emu->card_capabilities->emu1010 == 3) {
734 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
735 return err;
736 }
737 }
738
739 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0 );
740 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg );
741 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
742 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
743 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
744 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
745 if ((reg & 0x1f) != 0x15) {
746 /* FPGA failed to be programmed */
747 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
748 return 0;
749 return -ENODEV;
750 }
751 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
752 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
753 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
754 snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
755 }
756 }
757 return 0;
758}
759
13d45709
PH		 760/*
761 * EMU-1010 - details found out from this driver, official MS Win drivers,
762 * testing the card:
763 *
764 * Audigy2 (aka Alice2):
765 * ---------------------
766 * * communication over PCI
767 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
768 * to 2 x 16-bit, using internal DSP instructions
769 * * slave mode, clock supplied by HANA
770 * * linked to HANA using:
771 * 32 x 32-bit serial EMU32 output channels
772 * 16 x EMU32 input channels
773 * (?) x I2S I/O channels (?)
774 *
775 * FPGA (aka HANA):
776 * ---------------
777 * * provides all (?) physical inputs and outputs of the card
778 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
779 * * provides clock signal for the card and Alice2
780 * * two crystals - for 44.1kHz and 48kHz multiples
781 * * provides internal routing of signal sources to signal destinations
782 * * inputs/outputs to Alice2 - see above
783 *
784 * Current status of the driver:
785 * ----------------------------
786 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
787 * * PCM device nb. 2:
788 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
789 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
790 */
9f4bd5dd 791static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
19b99fba
JCD		 792{
793 unsigned int i;
9f4bd5dd
JCD		 794 int tmp,tmp2;
795 int reg;
796 int err;
9f4bd5dd
JCD		 797
798 snd_printk(KERN_INFO "emu1010: Special config.\n");
799 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
800 * Lock Sound Memory Cache, Lock Tank Memory Cache,
801 * Mute all codecs.
802 */
19b99fba 803 outl(0x0005a00c, emu->port + HCFG);
9f4bd5dd
JCD		 804 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
805 * Lock Tank Memory Cache,
806 * Mute all codecs.
807 */
808 outl(0x0005a004, emu->port + HCFG);
809 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
810 * Mute all codecs.
811 */
19b99fba 812 outl(0x0005a000, emu->port + HCFG);
9f4bd5dd
JCD		 813 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
814 * Mute all codecs.
815 */
19b99fba
JCD		 816 outl(0x0005a000, emu->port + HCFG);
817
9f4bd5dd
JCD		 818 /* Disable 48Volt power to Audio Dock */
819 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
820
821 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
822 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
823 snd_printdd("reg1=0x%x\n",reg);
d9e8a552 824 if ((reg & 0x3f) == 0x15) {
9f4bd5dd
JCD		 825 /* FPGA netlist already present so clear it */
826 /* Return to programming mode */
827
828 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02 );
19b99fba 829 }
9f4bd5dd
JCD		 830 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
831 snd_printdd("reg2=0x%x\n",reg);
d9e8a552 832 if ((reg & 0x3f) == 0x15) {
9f4bd5dd 833 /* FPGA failed to return to programming mode */
d9e8a552 834 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
9f4bd5dd 835 return -ENODEV;
19b99fba 836 }
9f4bd5dd 837 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
3663d845
JCD		 838 if (emu->card_capabilities->emu1010 == 1) {
839 if ((err = snd_emu1010_load_firmware(emu, HANA_FILENAME)) != 0) {
840 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file %s failed\n", HANA_FILENAME);
841 return err;
842 }
843 } else if (emu->card_capabilities->emu1010 == 2) {
844 if ((err = snd_emu1010_load_firmware(emu, EMU1010B_FILENAME)) != 0) {
845 snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", EMU1010B_FILENAME);
846 return err;
847 }
d9e8a552
JCD		 848 } else if (emu->card_capabilities->emu1010 == 3) {
849 if ((err = snd_emu1010_load_firmware(emu, EMU1010_NOTEBOOK_FILENAME)) != 0) {
850 snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", EMU1010_NOTEBOOK_FILENAME);
851 return err;
852 }
19b99fba 853 }
9f4bd5dd
JCD		 854
855 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
856 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
d9e8a552 857 if ((reg & 0x3f) != 0x15) {
9f4bd5dd
JCD		 858 /* FPGA failed to be programmed */
859 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
860 return -ENODEV;
19b99fba 861 }
19b99fba 862
9f4bd5dd
JCD		 863 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
864 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
865 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
866 snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
867 /* Enable 48Volt power to Audio Dock */
868 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON );
869
870 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
871 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
872 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
873 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
874 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
edec7bbb 875 /* Optical -> ADAT I/O */
f93abe51
JCD		 876 /* 0 : SPDIF
877 * 1 : ADAT
878 */
879 emu->emu1010.optical_in = 1; /* IN_ADAT */
880 emu->emu1010.optical_out = 1; /* IN_ADAT */
881 tmp = 0;
882 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
883 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
884 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp );
9148cc50 885 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
9f4bd5dd 886 /* Set no attenuation on Audio Dock pads. */
9148cc50
JCD		 887 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
888 emu->emu1010.adc_pads = 0x00;
9f4bd5dd
JCD		 889 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
890 /* Unmute Audio dock DACs, Headphone source DAC-4. */
891 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
892 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
9148cc50
JCD		 893 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
894 /* DAC PADs. */
895 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
896 emu->emu1010.dac_pads = 0x0f;
9f4bd5dd
JCD		 897 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
898 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
899 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
900 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
901 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
902 /* MIDI routing */
9148cc50 903 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
9f4bd5dd 904 /* Unknown. */
9148cc50 905 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
9f4bd5dd
JCD		 906 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
907 /* IRQ Enable: All off */
908 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
909
910 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
911 snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
912 /* Default WCLK set to 48kHz. */
913 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
914 /* Word Clock source, Internal 48kHz x1 */
915 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
916 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
917 /* Audio Dock LEDs. */
918 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
19b99fba 919
9f4bd5dd
JCD		 920#if 0
921 /* For 96kHz */
922 snd_emu1010_fpga_link_dst_src_write(emu,
923 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
924 snd_emu1010_fpga_link_dst_src_write(emu,
925 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
926 snd_emu1010_fpga_link_dst_src_write(emu,
927 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
928 snd_emu1010_fpga_link_dst_src_write(emu,
929 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
930#endif
931#if 0
932 /* For 192kHz */
933 snd_emu1010_fpga_link_dst_src_write(emu,
934 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
935 snd_emu1010_fpga_link_dst_src_write(emu,
936 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
937 snd_emu1010_fpga_link_dst_src_write(emu,
938 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
939 snd_emu1010_fpga_link_dst_src_write(emu,
940 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
941 snd_emu1010_fpga_link_dst_src_write(emu,
942 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
943 snd_emu1010_fpga_link_dst_src_write(emu,
944 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
945 snd_emu1010_fpga_link_dst_src_write(emu,
946 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
947 snd_emu1010_fpga_link_dst_src_write(emu,
948 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
949#endif
950#if 1
951 /* For 48kHz */
952 snd_emu1010_fpga_link_dst_src_write(emu,
953 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
954 snd_emu1010_fpga_link_dst_src_write(emu,
955 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
956 snd_emu1010_fpga_link_dst_src_write(emu,
957 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
958 snd_emu1010_fpga_link_dst_src_write(emu,
959 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
960 snd_emu1010_fpga_link_dst_src_write(emu,
961 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
962 snd_emu1010_fpga_link_dst_src_write(emu,
963 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
964 snd_emu1010_fpga_link_dst_src_write(emu,
965 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
966 snd_emu1010_fpga_link_dst_src_write(emu,
967 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
13d45709
PH		 968 /* Pavel Hofman - setting defaults for 8 more capture channels
969 * Defaults only, users will set their own values anyways, let's
970 * just copy/paste.
971 */
972
973 snd_emu1010_fpga_link_dst_src_write(emu,
974 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
975 snd_emu1010_fpga_link_dst_src_write(emu,
976 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
977 snd_emu1010_fpga_link_dst_src_write(emu,
978 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
979 snd_emu1010_fpga_link_dst_src_write(emu,
980 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
981 snd_emu1010_fpga_link_dst_src_write(emu,
982 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
983 snd_emu1010_fpga_link_dst_src_write(emu,
984 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
985 snd_emu1010_fpga_link_dst_src_write(emu,
986 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
987 snd_emu1010_fpga_link_dst_src_write(emu,
988 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
9f4bd5dd
JCD		 989#endif
990#if 0
991 /* Original */
992 snd_emu1010_fpga_link_dst_src_write(emu,
993 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
994 snd_emu1010_fpga_link_dst_src_write(emu,
995 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
996 snd_emu1010_fpga_link_dst_src_write(emu,
997 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
998 snd_emu1010_fpga_link_dst_src_write(emu,
999 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1000 snd_emu1010_fpga_link_dst_src_write(emu,
1001 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1002 snd_emu1010_fpga_link_dst_src_write(emu,
1003 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1004 snd_emu1010_fpga_link_dst_src_write(emu,
1005 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1006 snd_emu1010_fpga_link_dst_src_write(emu,
1007 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1008 snd_emu1010_fpga_link_dst_src_write(emu,
1009 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1010 snd_emu1010_fpga_link_dst_src_write(emu,
1011 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1012 snd_emu1010_fpga_link_dst_src_write(emu,
1013 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1014 snd_emu1010_fpga_link_dst_src_write(emu,
1015 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1016#endif
1017 for (i = 0;i < 0x20; i++ ) {
1018 /* AudioDock Elink <- Silence */
1019 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1020 }
1021 for (i = 0;i < 4; i++) {
1022 /* Hana SPDIF Out <- Silence */
1023 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1024 }
1025 for (i = 0;i < 7; i++) {
1026 /* Hamoa DAC <- Silence */
1027 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1028 }
1029 for (i = 0;i < 7; i++) {
1030 /* Hana ADAT Out <- Silence */
1031 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1032 }
1033 snd_emu1010_fpga_link_dst_src_write(emu,
1034 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1035 snd_emu1010_fpga_link_dst_src_write(emu,
1036 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1037 snd_emu1010_fpga_link_dst_src_write(emu,
1038 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1039 snd_emu1010_fpga_link_dst_src_write(emu,
1040 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1041 snd_emu1010_fpga_link_dst_src_write(emu,
1042 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1043 snd_emu1010_fpga_link_dst_src_write(emu,
1044 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1045 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1046
1047 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1048
1049 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1050 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1051 * Mute all codecs.
1052 */
1053 outl(0x0000a000, emu->port + HCFG);
1054 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1055 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1056 * Un-Mute all codecs.
1057 */
19b99fba 1058 outl(0x0000a001, emu->port + HCFG);
9f4bd5dd 1059
19b99fba
JCD		 1060 /* Initial boot complete. Now patches */
1061
9f4bd5dd 1062 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
9148cc50
JCD		 1063 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1064 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1065 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1066 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
9f4bd5dd
JCD		 1067 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1068 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1069
42f53226
JCD		 1070 /* Start Micro/Audio Dock firmware loader thread */
1071 emu->emu1010.firmware_thread = kthread_create(&emu1010_firmware_thread,
1072 emu,
1073 "emu1010_firmware");
1074 wake_up_process(emu->emu1010.firmware_thread);
3663d845 1075
9f4bd5dd
JCD		 1076#if 0
1077 snd_emu1010_fpga_link_dst_src_write(emu,
1078 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1079 snd_emu1010_fpga_link_dst_src_write(emu,
1080 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1081 snd_emu1010_fpga_link_dst_src_write(emu,
1082 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1083 snd_emu1010_fpga_link_dst_src_write(emu,
1084 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1085#endif
1086 /* Default outputs */
1087 snd_emu1010_fpga_link_dst_src_write(emu,
1088 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1089 emu->emu1010.output_source[0] = 21;
1090 snd_emu1010_fpga_link_dst_src_write(emu,
1091 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1092 emu->emu1010.output_source[1] = 22;
1093 snd_emu1010_fpga_link_dst_src_write(emu,
1094 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1095 emu->emu1010.output_source[2] = 23;
1096 snd_emu1010_fpga_link_dst_src_write(emu,
1097 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1098 emu->emu1010.output_source[3] = 24;
1099 snd_emu1010_fpga_link_dst_src_write(emu,
1100 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1101 emu->emu1010.output_source[4] = 25;
1102 snd_emu1010_fpga_link_dst_src_write(emu,
1103 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1104 emu->emu1010.output_source[5] = 26;
1105 snd_emu1010_fpga_link_dst_src_write(emu,
1106 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1107 emu->emu1010.output_source[6] = 27;
1108 snd_emu1010_fpga_link_dst_src_write(emu,
1109 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1110 emu->emu1010.output_source[7] = 28;
1111 snd_emu1010_fpga_link_dst_src_write(emu,
1112 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1113 emu->emu1010.output_source[8] = 21;
1114 snd_emu1010_fpga_link_dst_src_write(emu,
1115 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1116 emu->emu1010.output_source[9] = 22;
1117 snd_emu1010_fpga_link_dst_src_write(emu,
1118 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1119 emu->emu1010.output_source[10] = 21;
1120 snd_emu1010_fpga_link_dst_src_write(emu,
1121 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1122 emu->emu1010.output_source[11] = 22;
1123 snd_emu1010_fpga_link_dst_src_write(emu,
1124 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1125 emu->emu1010.output_source[12] = 21;
1126 snd_emu1010_fpga_link_dst_src_write(emu,
1127 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1128 emu->emu1010.output_source[13] = 22;
1129 snd_emu1010_fpga_link_dst_src_write(emu,
1130 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1131 emu->emu1010.output_source[14] = 21;
1132 snd_emu1010_fpga_link_dst_src_write(emu,
1133 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1134 emu->emu1010.output_source[15] = 22;
1135 snd_emu1010_fpga_link_dst_src_write(emu,
1136 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1137 emu->emu1010.output_source[16] = 21;
1138 snd_emu1010_fpga_link_dst_src_write(emu,
1139 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1140 emu->emu1010.output_source[17] = 22;
1141 snd_emu1010_fpga_link_dst_src_write(emu,
1142 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1143 emu->emu1010.output_source[18] = 23;
1144 snd_emu1010_fpga_link_dst_src_write(emu,
1145 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1146 emu->emu1010.output_source[19] = 24;
1147 snd_emu1010_fpga_link_dst_src_write(emu,
1148 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1149 emu->emu1010.output_source[20] = 25;
1150 snd_emu1010_fpga_link_dst_src_write(emu,
1151 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1152 emu->emu1010.output_source[21] = 26;
1153 snd_emu1010_fpga_link_dst_src_write(emu,
1154 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1155 emu->emu1010.output_source[22] = 27;
1156 snd_emu1010_fpga_link_dst_src_write(emu,
1157 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1158 emu->emu1010.output_source[23] = 28;
1159
1160 /* TEMP: Select SPDIF in/out */
edec7bbb 1161 //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
9f4bd5dd
JCD		 1162
1163 /* TEMP: Select 48kHz SPDIF out */
1164 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1165 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1166 /* Word Clock source, Internal 48kHz x1 */
1167 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1168 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
b0dbdaea 1169 emu->emu1010.internal_clock = 1; /* 48000 */
9f4bd5dd
JCD		 1170 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1171 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1172 //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1173 //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1174 //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
19b99fba
JCD		 1175
1176 return 0;
1177}
1da177e4
LT		 1178/*
1179 * Create the EMU10K1 instance
1180 */
1181
09668b44
TI		 1182#ifdef CONFIG_PM
1183static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1184static void free_pm_buffer(struct snd_emu10k1 *emu);
1185#endif
1186
eb4698f3 1187static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1da177e4
LT		 1188{
1189 if (emu->port) { /* avoid access to already used hardware */
1190 snd_emu10k1_fx8010_tram_setup(emu, 0);
1191 snd_emu10k1_done(emu);
09668b44
TI		 1192 /* remove reserved page */
1193 if (emu->reserved_page) {
1194 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
1195 emu->reserved_page = NULL;
1196 }
1197 snd_emu10k1_free_efx(emu);
1da177e4 1198 }
9f4bd5dd
JCD		 1199 if (emu->card_capabilities->emu1010) {
1200 /* Disable 48Volt power to Audio Dock */
1201 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
42f53226 1202 kthread_stop(emu->emu1010.firmware_thread);
9f4bd5dd 1203 }
1da177e4
LT		 1204 if (emu->memhdr)
1205 snd_util_memhdr_free(emu->memhdr);
1206 if (emu->silent_page.area)
1207 snd_dma_free_pages(&emu->silent_page);
1208 if (emu->ptb_pages.area)
1209 snd_dma_free_pages(&emu->ptb_pages);
1210 vfree(emu->page_ptr_table);
1211 vfree(emu->page_addr_table);
09668b44
TI		 1212#ifdef CONFIG_PM
1213 free_pm_buffer(emu);
1214#endif
1da177e4 1215 if (emu->irq >= 0)
437a5a46 1216 free_irq(emu->irq, emu);
1da177e4
LT		 1217 if (emu->port)
1218 pci_release_regions(emu->pci);
2b637da5 1219 if (emu->card_capabilities->ca0151_chip) /* P16V */
1da177e4 1220 snd_p16v_free(emu);
09668b44 1221 pci_disable_device(emu->pci);
1da177e4
LT		 1222 kfree(emu);
1223 return 0;
1224}
1225
eb4698f3 1226static int snd_emu10k1_dev_free(struct snd_device *device)
1da177e4 1227{
eb4698f3 1228 struct snd_emu10k1 *emu = device->device_data;
1da177e4
LT		 1229 return snd_emu10k1_free(emu);
1230}
1231
eb4698f3 1232static struct snd_emu_chip_details emu_chip_details[] = {
1da177e4 1233 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
88dc0e5d 1234 /* Tested by James@superbug.co.uk 3rd July 2005 */
54efc96d
JCD		 1235 /* DSP: CA0108-IAT
1236 * DAC: CS4382-KQ
1237 * ADC: Philips 1361T
1238 * AC97: STAC9750
1239 * CA0151: None
1240 */
1da177e4
LT		 1241 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1242 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
aec72e0a 1243 .id = "Audigy2",
1da177e4
LT		 1244 .emu10k2_chip = 1,
1245 .ca0108_chip = 1,
2668907a
PZ		 1246 .spk71 = 1,
1247 .ac97_chip = 1} ,
21fdddea
JCD		 1248 /* Audigy4 (Not PRO) SB0610 */
1249 /* Tested by James@superbug.co.uk 4th April 2006 */
1250 /* A_IOCFG bits
1251 * Output
1252 * 0: ?
1253 * 1: ?
1254 * 2: ?
1255 * 3: 0 - Digital Out, 1 - Line in
1256 * 4: ?
1257 * 5: ?
1258 * 6: ?
1259 * 7: ?
1260 * Input
1261 * 8: ?
1262 * 9: ?
1263 * A: Green jack sense (Front)
1264 * B: ?
1265 * C: Black jack sense (Rear/Side Right)
1266 * D: Yellow jack sense (Center/LFE/Side Left)
1267 * E: ?
1268 * F: ?
1269 *
1270 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1271 * 0 - Digital Out
1272 * 1 - Line in
1273 */
1274 /* Mic input not tested.
1275 * Analog CD input not tested
1276 * Digital Out not tested.
1277 * Line in working.
1278 * Audio output 5.1 working. Side outputs not working.
1279 */
1280 /* DSP: CA10300-IAT LF
1281 * DAC: Cirrus Logic CS4382-KQZ
1282 * ADC: Philips 1361T
1283 * AC97: Sigmatel STAC9750
1284 * CA0151: None
1285 */
1286 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1287 .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1288 .id = "Audigy2",
1289 .emu10k2_chip = 1,
1290 .ca0108_chip = 1,
1291 .spk71 = 1,
1292 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1293 .ac97_chip = 1} ,
d83c671f 1294 /* Audigy 2 ZS Notebook Cardbus card.*/
184c1e2c 1295 /* Tested by James@superbug.co.uk 6th November 2006 */
f951fd3c
JCD		 1296 /* Audio output 7.1/Headphones working.
1297 * Digital output working. (AC3 not checked, only PCM)
184c1e2c
JCD		 1298 * Audio Mic/Line inputs working.
1299 * Digital input not tested.
f951fd3c 1300 */
21fdddea 1301 /* DSP: Tina2
f951fd3c
JCD		 1302 * DAC: Wolfson WM8768/WM8568
1303 * ADC: Wolfson WM8775
1304 * AC97: None
1305 * CA0151: None
1306 */
184c1e2c
JCD		 1307 /* Tested by James@superbug.co.uk 4th April 2006 */
1308 /* A_IOCFG bits
1309 * Output
1310 * 0: Not Used
1311 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1312 * 2: Analog input 0 = line in, 1 = mic in
1313 * 3: Not Used
1314 * 4: Digital output 0 = off, 1 = on.
1315 * 5: Not Used
1316 * 6: Not Used
1317 * 7: Not Used
1318 * Input
1319 * All bits 1 (0x3fxx) means nothing plugged in.
1320 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1321 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1322 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1323 * E-F: Always 0
1324 *
1325 */
d83c671f
JCD		 1326 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1327 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1328 .id = "Audigy2",
1329 .emu10k2_chip = 1,
1330 .ca0108_chip = 1,
1331 .ca_cardbus_chip = 1,
27fe864e 1332 .spi_dac = 1,
184c1e2c 1333 .i2c_adc = 1,
d83c671f 1334 .spk71 = 1} ,
82c8c741
JCD		 1335 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1336 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1337 .id = "EMU1010",
1338 .emu10k2_chip = 1,
1339 .ca0108_chip = 1,
1340 .ca_cardbus_chip = 1,
d9e8a552
JCD		 1341 .spk71 = 1 ,
1342 .emu1010 = 3} ,
3663d845
JCD		 1343 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1344 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1345 .id = "EMU1010",
1346 .emu10k2_chip = 1,
1347 .ca0108_chip = 1,
1348 .spk71 = 1 ,
1349 .emu1010 = 2} ,
1da177e4
LT		 1350 {.vendor = 0x1102, .device = 0x0008,
1351 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
aec72e0a 1352 .id = "Audigy2",
1da177e4 1353 .emu10k2_chip = 1,
2668907a
PZ		 1354 .ca0108_chip = 1,
1355 .ac97_chip = 1} ,
7c1d549a
JCD		 1356 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
1357 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
9f4bd5dd
JCD		 1358 .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1359 .id = "EMU1010",
7c1d549a
JCD		 1360 .emu10k2_chip = 1,
1361 .ca0102_chip = 1,
9f4bd5dd
JCD		 1362 .spk71 = 1,
1363 .emu1010 = 1} ,
88dc0e5d 1364 /* Tested by James@superbug.co.uk 3rd July 2005 */
1da177e4
LT		 1365 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1366 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
aec72e0a 1367 .id = "Audigy2",
1da177e4
LT		 1368 .emu10k2_chip = 1,
1369 .ca0102_chip = 1,
1370 .ca0151_chip = 1,
1371 .spk71 = 1,
1372 .spdif_bug = 1,
1373 .ac97_chip = 1} ,
f6f8bb64 1374 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
5b0e4985
JCD		 1375 /* The 0x20061102 does have SB0350 written on it
1376 * Just like 0x20021102
1377 */
f6f8bb64 1378 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
5b0e4985 1379 .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
f6f8bb64
LR		 1380 .id = "Audigy2",
1381 .emu10k2_chip = 1,
1382 .ca0102_chip = 1,
1383 .ca0151_chip = 1,
1384 .spk71 = 1,
1385 .spdif_bug = 1,
1386 .ac97_chip = 1} ,
1da177e4
LT		 1387 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1388 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
aec72e0a 1389 .id = "Audigy2",
1da177e4
LT		 1390 .emu10k2_chip = 1,
1391 .ca0102_chip = 1,
1392 .ca0151_chip = 1,
1393 .spk71 = 1,
1394 .spdif_bug = 1,
1395 .ac97_chip = 1} ,
1396 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1397 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
aec72e0a 1398 .id = "Audigy2",
1da177e4
LT		 1399 .emu10k2_chip = 1,
1400 .ca0102_chip = 1,
1401 .ca0151_chip = 1,
1402 .spk71 = 1,
1403 .spdif_bug = 1,
1404 .ac97_chip = 1} ,
54efc96d
JCD		 1405 /* Audigy 2 */
1406 /* Tested by James@superbug.co.uk 3rd July 2005 */
1407 /* DSP: CA0102-IAT
1408 * DAC: CS4382-KQ
1409 * ADC: Philips 1361T
1410 * AC97: STAC9721
1411 * CA0151: Yes
1412 */
1da177e4
LT		 1413 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1414 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
aec72e0a 1415 .id = "Audigy2",
1da177e4
LT		 1416 .emu10k2_chip = 1,
1417 .ca0102_chip = 1,
1418 .ca0151_chip = 1,
1419 .spk71 = 1,
1420 .spdif_bug = 1,
11b3a755 1421 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1da177e4
LT		 1422 .ac97_chip = 1} ,
1423 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1424 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
aec72e0a 1425 .id = "Audigy2",
1da177e4
LT		 1426 .emu10k2_chip = 1,
1427 .ca0102_chip = 1,
1428 .ca0151_chip = 1,
2f020aa7 1429 .spk71 = 1,
1da177e4 1430 .spdif_bug = 1} ,
264f9577
JCD		 1431 /* Dell OEM/Creative Labs Audigy 2 ZS */
1432 /* See ALSA bug#1365 */
1433 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1434 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1435 .id = "Audigy2",
1436 .emu10k2_chip = 1,
1437 .ca0102_chip = 1,
1438 .ca0151_chip = 1,
1439 .spk71 = 1,
1440 .spdif_bug = 1,
1441 .ac97_chip = 1} ,
1da177e4
LT		 1442 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1443 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
aec72e0a 1444 .id = "Audigy2",
1da177e4
LT		 1445 .emu10k2_chip = 1,
1446 .ca0102_chip = 1,
1447 .ca0151_chip = 1,
1448 .spk71 = 1,
1449 .spdif_bug = 1,
3271b7b2 1450 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1da177e4 1451 .ac97_chip = 1} ,
bdaed502
TI		 1452 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1453 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1454 .id = "Audigy2",
1455 .emu10k2_chip = 1,
1456 .ca0102_chip = 1,
1457 .ca0151_chip = 1,
1458 .spdif_bug = 1,
1459 .ac97_chip = 1} ,
ae3a72d8
JCD		 1460 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1461 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
aec72e0a 1462 .id = "Audigy",
56f5ceed
JCD		 1463 .emu10k2_chip = 1,
1464 .ca0102_chip = 1,
2668907a 1465 .ac97_chip = 1} ,
ae3a72d8
JCD		 1466 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1467 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
2668907a
PZ		 1468 .id = "Audigy",
1469 .emu10k2_chip = 1,
1470 .ca0102_chip = 1,
ae3a72d8 1471 .spdif_bug = 1,
2668907a 1472 .ac97_chip = 1} ,
a6c17ec8
AP		 1473 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1474 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1475 .id = "Audigy",
1476 .emu10k2_chip = 1,
1477 .ca0102_chip = 1,
1478 .ac97_chip = 1} ,
1da177e4 1479 {.vendor = 0x1102, .device = 0x0004,
bdaed502 1480 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
aec72e0a 1481 .id = "Audigy",
1da177e4
LT		 1482 .emu10k2_chip = 1,
1483 .ca0102_chip = 1,
2668907a 1484 .ac97_chip = 1} ,
a6f6192b
JCD		 1485 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1486 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
f7de9cfd
MM		 1487 .id = "Live",
1488 .emu10k1_chip = 1,
1489 .ac97_chip = 1,
1490 .sblive51 = 1} ,
a6f6192b
JCD		 1491 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1492 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
aec72e0a 1493 .id = "Live",
1da177e4 1494 .emu10k1_chip = 1,
2b637da5
LR		 1495 .ac97_chip = 1,
1496 .sblive51 = 1} ,
a6f6192b
JCD		 1497 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1498 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
2b6b22f3
JCD		 1499 .id = "Live",
1500 .emu10k1_chip = 1,
1501 .ac97_chip = 1,
1502 .sblive51 = 1} ,
0ba656d0
JCD		 1503 /* Tested by ALSA bug#1680 26th December 2005 */
1504 /* note: It really has SB0220 written on the card. */
1505 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1506 .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1507 .id = "Live",
1508 .emu10k1_chip = 1,
1509 .ac97_chip = 1,
1510 .sblive51 = 1} ,
c6c0b841
LR		 1511 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1512 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1513 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1514 .id = "Live",
1515 .emu10k1_chip = 1,
1516 .ac97_chip = 1,
1517 .sblive51 = 1} ,
a8ee7295
GT		 1518 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1519 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1520 .id = "Live",
1521 .emu10k1_chip = 1,
1522 .ac97_chip = 1,
1523 .sblive51 = 1} ,
a6f6192b
JCD		 1524 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1525 .driver = "EMU10K1", .name = "SB Live 5.1",
2b6b22f3
JCD		 1526 .id = "Live",
1527 .emu10k1_chip = 1,
1528 .ac97_chip = 1,
1529 .sblive51 = 1} ,
afe0f1f6 1530 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
a6f6192b 1531 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
f12aa40c 1532 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
2b6b22f3
JCD		 1533 .id = "Live",
1534 .emu10k1_chip = 1,
f12aa40c
TI		 1535 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1536 * share the same IDs!
1537 */
2b6b22f3 1538 .sblive51 = 1} ,
a6f6192b
JCD		 1539 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1540 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
2b6b22f3
JCD		 1541 .id = "Live",
1542 .emu10k1_chip = 1,
1543 .ac97_chip = 1,
1544 .sblive51 = 1} ,
a6f6192b
JCD		 1545 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1546 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1547 .id = "Live",
1548 .emu10k1_chip = 1,
1549 .ac97_chip = 1} ,
1550 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1551 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
2b6b22f3
JCD		 1552 .id = "Live",
1553 .emu10k1_chip = 1,
1554 .ac97_chip = 1,
1555 .sblive51 = 1} ,
1556 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1557 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1558 .id = "Live",
1559 .emu10k1_chip = 1,
1560 .ac97_chip = 1,
1561 .sblive51 = 1} ,
a6f6192b
JCD		 1562 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1563 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
aec72e0a 1564 .id = "Live",
2b637da5
LR		 1565 .emu10k1_chip = 1,
1566 .ac97_chip = 1,
1567 .sblive51 = 1} ,
88dc0e5d 1568 /* Tested by James@superbug.co.uk 3rd July 2005 */
a6f6192b
JCD		 1569 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1570 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
2b6b22f3
JCD		 1571 .id = "Live",
1572 .emu10k1_chip = 1,
1573 .ac97_chip = 1,
1574 .sblive51 = 1} ,
a6f6192b
JCD		 1575 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1576 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
2b6b22f3
JCD		 1577 .id = "Live",
1578 .emu10k1_chip = 1,
1579 .ac97_chip = 1,
1580 .sblive51 = 1} ,
a6f6192b
JCD		 1581 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1582 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
2b6b22f3
JCD		 1583 .id = "Live",
1584 .emu10k1_chip = 1,
1585 .ac97_chip = 1,
1586 .sblive51 = 1} ,
a6f6192b
JCD		 1587 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1588 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
2b6b22f3
JCD		 1589 .id = "Live",
1590 .emu10k1_chip = 1,
1591 .ac97_chip = 1,
1592 .sblive51 = 1} ,
a6f6192b
JCD		 1593 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1594 .driver = "EMU10K1", .name = "E-mu APS [4001]",
1595 .id = "APS",
2b6b22f3 1596 .emu10k1_chip = 1,
a6f6192b
JCD		 1597 .ecard = 1} ,
1598 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1599 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
2b6b22f3
JCD		 1600 .id = "Live",
1601 .emu10k1_chip = 1,
1602 .ac97_chip = 1,
1603 .sblive51 = 1} ,
a6f6192b
JCD		 1604 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1605 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
2b6b22f3
JCD		 1606 .id = "Live",
1607 .emu10k1_chip = 1,
1608 .ac97_chip = 1,
1609 .sblive51 = 1} ,
1da177e4
LT		 1610 {.vendor = 0x1102, .device = 0x0002,
1611 .driver = "EMU10K1", .name = "SB Live [Unknown]",
aec72e0a 1612 .id = "Live",
1da177e4 1613 .emu10k1_chip = 1,
2b637da5
LR		 1614 .ac97_chip = 1,
1615 .sblive51 = 1} ,
1da177e4
LT		 1616 { } /* terminator */
1617};
1618
eb4698f3 1619int __devinit snd_emu10k1_create(struct snd_card *card,
1da177e4
LT		 1620 struct pci_dev * pci,
1621 unsigned short extin_mask,
1622 unsigned short extout_mask,
1623 long max_cache_bytes,
1624 int enable_ir,
e66bc8b2 1625 uint subsystem,
eb4698f3 1626 struct snd_emu10k1 ** remu)
1da177e4 1627{
eb4698f3 1628 struct snd_emu10k1 *emu;
09668b44 1629 int idx, err;
1da177e4 1630 int is_audigy;
09668b44 1631 unsigned int silent_page;
eb4698f3
TI		 1632 const struct snd_emu_chip_details *c;
1633 static struct snd_device_ops ops = {
1da177e4
LT		 1634 .dev_free = snd_emu10k1_dev_free,
1635 };
1636
1637 *remu = NULL;
1638
1639 /* enable PCI device */
1640 if ((err = pci_enable_device(pci)) < 0)
1641 return err;
1642
e560d8d8 1643 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1da177e4
LT		 1644 if (emu == NULL) {
1645 pci_disable_device(pci);
1646 return -ENOMEM;
1647 }
1648 emu->card = card;
1649 spin_lock_init(&emu->reg_lock);
1650 spin_lock_init(&emu->emu_lock);
1651 spin_lock_init(&emu->voice_lock);
1652 spin_lock_init(&emu->synth_lock);
1653 spin_lock_init(&emu->memblk_lock);
62932df8 1654 mutex_init(&emu->fx8010.lock);
1da177e4
LT		 1655 INIT_LIST_HEAD(&emu->mapped_link_head);
1656 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1657 emu->pci = pci;
1658 emu->irq = -1;
1659 emu->synth = NULL;
1660 emu->get_synth_voice = NULL;
1661 /* read revision & serial */
44c10138 1662 emu->revision = pci->revision;
1da177e4
LT		 1663 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1664 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1da177e4
LT		 1665 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1666
1667 for (c = emu_chip_details; c->vendor; c++) {
1668 if (c->vendor == pci->vendor && c->device == pci->device) {
e66bc8b2
JCD		 1669 if (subsystem) {
1670 if (c->subsystem && (c->subsystem == subsystem) ) {
1671 break;
1672 } else continue;
1673 } else {
1674 if (c->subsystem && (c->subsystem != emu->serial) )
1675 continue;
1676 if (c->revision && c->revision != emu->revision)
1677 continue;
1678 }
bdaed502 1679 break;
1da177e4
LT		 1680 }
1681 }
1682 if (c->vendor == 0) {
1683 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1684 kfree(emu);
1685 pci_disable_device(pci);
1686 return -ENOENT;
1687 }
1688 emu->card_capabilities = c;
e66bc8b2 1689 if (c->subsystem && !subsystem)
1da177e4 1690 snd_printdd("Sound card name=%s\n", c->name);
e66bc8b2
JCD		 1691 else if (subsystem)
1692 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1693 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1694 else
1695 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1696 c->name, pci->vendor, pci->device, emu->serial);
1da177e4 1697
85a655d6
TI		 1698 if (!*card->id && c->id) {
1699 int i, n = 0;
aec72e0a 1700 strlcpy(card->id, c->id, sizeof(card->id));
85a655d6
TI		 1701 for (;;) {
1702 for (i = 0; i < snd_ecards_limit; i++) {
1703 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1704 break;
1705 }
1706 if (i >= snd_ecards_limit)
1707 break;
1708 n++;
1709 if (n >= SNDRV_CARDS)
1710 break;
1711 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1712 }
1713 }
aec72e0a 1714
1da177e4
LT		 1715 is_audigy = emu->audigy = c->emu10k2_chip;
1716
1717 /* set the DMA transfer mask */
1718 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1719 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1720 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1721 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1722 kfree(emu);
1723 pci_disable_device(pci);
1724 return -ENXIO;
1725 }
1726 if (is_audigy)
1727 emu->gpr_base = A_FXGPREGBASE;
1728 else
1729 emu->gpr_base = FXGPREGBASE;
1730
1731 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1732 kfree(emu);
1733 pci_disable_device(pci);
1734 return err;
1735 }
1736 emu->port = pci_resource_start(pci, 0);
1737
437a5a46
TI		 1738 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1739 "EMU10K1", emu)) {
09668b44
TI		 1740 err = -EBUSY;
1741 goto error;
1da177e4
LT		 1742 }
1743 emu->irq = pci->irq;
1744
1745 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1746 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1747 32 * 1024, &emu->ptb_pages) < 0) {
09668b44
TI		 1748 err = -ENOMEM;
1749 goto error;
1da177e4
LT		 1750 }
1751
1752 emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
1753 emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
1754 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
09668b44
TI		 1755 err = -ENOMEM;
1756 goto error;
1da177e4
LT		 1757 }
1758
1759 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1760 EMUPAGESIZE, &emu->silent_page) < 0) {
09668b44
TI		 1761 err = -ENOMEM;
1762 goto error;
1da177e4
LT		 1763 }
1764 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1765 if (emu->memhdr == NULL) {
09668b44
TI		 1766 err = -ENOMEM;
1767 goto error;
1da177e4 1768 }
eb4698f3
TI		 1769 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1770 sizeof(struct snd_util_memblk);
1da177e4
LT		 1771
1772 pci_set_master(pci);
1773
1da177e4
LT		 1774 emu->fx8010.fxbus_mask = 0x303f;
1775 if (extin_mask == 0)
1776 extin_mask = 0x3fcf;
1777 if (extout_mask == 0)
1778 extout_mask = 0x7fff;
1779 emu->fx8010.extin_mask = extin_mask;
1780 emu->fx8010.extout_mask = extout_mask;
09668b44 1781 emu->enable_ir = enable_ir;
1da177e4 1782
d9e8a552
JCD		 1783 if (emu->card_capabilities->ca_cardbus_chip) {
1784 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1785 goto error;
1786 }
2b637da5 1787 if (emu->card_capabilities->ecard) {
09668b44
TI		 1788 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1789 goto error;
9f4bd5dd
JCD		 1790 } else if (emu->card_capabilities->emu1010) {
1791 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
19b99fba
JCD		 1792 snd_emu10k1_free(emu);
1793 return err;
1794 }
1da177e4
LT		 1795 } else {
1796 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1797 does not support this, it shouldn't do any harm */
1798 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1799 }
1800
09668b44
TI		 1801 /* initialize TRAM setup */
1802 emu->fx8010.itram_size = (16 * 1024)/2;
1803 emu->fx8010.etram_pages.area = NULL;
1804 emu->fx8010.etram_pages.bytes = 0;
1da177e4 1805
09668b44
TI		 1806 /*
1807 * Init to 0x02109204 :
1808 * Clock accuracy = 0 (1000ppm)
1809 * Sample Rate = 2 (48kHz)
1810 * Audio Channel = 1 (Left of 2)
1811 * Source Number = 0 (Unspecified)
1812 * Generation Status = 1 (Original for Cat Code 12)
1813 * Cat Code = 12 (Digital Signal Mixer)
1814 * Mode = 0 (Mode 0)
1815 * Emphasis = 0 (None)
1816 * CP = 1 (Copyright unasserted)
1817 * AN = 0 (Audio data)
1818 * P = 0 (Consumer)
1819 */
1820 emu->spdif_bits[0] = emu->spdif_bits[1] =
1821 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1822 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1823 SPCS_GENERATIONSTATUS | 0x00001200 |
1824 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1825
1826 emu->reserved_page = (struct snd_emu10k1_memblk *)
1827 snd_emu10k1_synth_alloc(emu, 4096);
1828 if (emu->reserved_page)
1829 emu->reserved_page->map_locked = 1;
1830
1831 /* Clear silent pages and set up pointers */
1832 memset(emu->silent_page.area, 0, PAGE_SIZE);
1833 silent_page = emu->silent_page.addr << 1;
1834 for (idx = 0; idx < MAXPAGES; idx++)
1835 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1836
1837 /* set up voice indices */
1838 for (idx = 0; idx < NUM_G; idx++) {
1839 emu->voices[idx].emu = emu;
1840 emu->voices[idx].number = idx;
1da177e4
LT		 1841 }
1842
09668b44
TI		 1843 if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1844 goto error;
1845#ifdef CONFIG_PM
1846 if ((err = alloc_pm_buffer(emu)) < 0)
1847 goto error;
1848#endif
1849
1850 /* Initialize the effect engine */
1851 if ((err = snd_emu10k1_init_efx(emu)) < 0)
1852 goto error;
1853 snd_emu10k1_audio_enable(emu);
1854
1855 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1856 goto error;
1857
adf1b3d2 1858#ifdef CONFIG_PROC_FS
1da177e4 1859 snd_emu10k1_proc_init(emu);
adf1b3d2 1860#endif
1da177e4
LT		 1861
1862 snd_card_set_dev(card, &pci->dev);
1863 *remu = emu;
1864 return 0;
09668b44
TI		 1865
1866 error:
1867 snd_emu10k1_free(emu);
1868 return err;
1da177e4
LT		 1869}
1870
09668b44
TI		 1871#ifdef CONFIG_PM
1872static unsigned char saved_regs[] = {
1873 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1874 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1875 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1876 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1877 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1878 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1879 0xff /* end */
1880};
1881static unsigned char saved_regs_audigy[] = {
1882 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1883 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1884 0xff /* end */
1885};
1886
1887static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1888{
1889 int size;
1890
1891 size = ARRAY_SIZE(saved_regs);
1892 if (emu->audigy)
1893 size += ARRAY_SIZE(saved_regs_audigy);
1894 emu->saved_ptr = vmalloc(4 * NUM_G * size);
1895 if (! emu->saved_ptr)
1896 return -ENOMEM;
1897 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1898 return -ENOMEM;
1899 if (emu->card_capabilities->ca0151_chip &&
1900 snd_p16v_alloc_pm_buffer(emu) < 0)
1901 return -ENOMEM;
1902 return 0;
1903}
1904
1905static void free_pm_buffer(struct snd_emu10k1 *emu)
1906{
1907 vfree(emu->saved_ptr);
1908 snd_emu10k1_efx_free_pm_buffer(emu);
1909 if (emu->card_capabilities->ca0151_chip)
1910 snd_p16v_free_pm_buffer(emu);
1911}
1912
1913void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1914{
1915 int i;
1916 unsigned char *reg;
1917 unsigned int *val;
1918
1919 val = emu->saved_ptr;
1920 for (reg = saved_regs; *reg != 0xff; reg++)
1921 for (i = 0; i < NUM_G; i++, val++)
1922 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1923 if (emu->audigy) {
1924 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1925 for (i = 0; i < NUM_G; i++, val++)
1926 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1927 }
1928 if (emu->audigy)
1929 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
1930 emu->saved_hcfg = inl(emu->port + HCFG);
1931}
1932
1933void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1934{
d9e8a552
JCD		 1935 if (emu->card_capabilities->ca_cardbus_chip)
1936 snd_emu10k1_cardbus_init(emu);
09668b44
TI		 1937 if (emu->card_capabilities->ecard)
1938 snd_emu10k1_ecard_init(emu);
9f4bd5dd
JCD		 1939 else if (emu->card_capabilities->emu1010)
1940 snd_emu10k1_emu1010_init(emu);
09668b44
TI		 1941 else
1942 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1943 snd_emu10k1_init(emu, emu->enable_ir, 1);
1944}
1945
1946void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1947{
1948 int i;
1949 unsigned char *reg;
1950 unsigned int *val;
1951
1952 snd_emu10k1_audio_enable(emu);
1953
1954 /* resore for spdif */
1955 if (emu->audigy)
4130d59b
AP		 1956 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
1957 outl(emu->saved_hcfg, emu->port + HCFG);
09668b44
TI		 1958
1959 val = emu->saved_ptr;
1960 for (reg = saved_regs; *reg != 0xff; reg++)
1961 for (i = 0; i < NUM_G; i++, val++)
1962 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1963 if (emu->audigy) {
1964 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1965 for (i = 0; i < NUM_G; i++, val++)
1966 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1967 }
1968}
1969#endif
Linux 6.x block layer and io_uring tree(s)