[ALSA] emu10k1: General cleanup, add new locks, fix alsa bug#3501, kernel bug#9304.
[linux-2.6-block.git] / sound / pci / emu10k1 / emu10k1_main.c
CommitLineData
1da177e4 1/*
c1017a4c 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4
LT
3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
9f4bd5dd 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
1da177e4 7 * Added support for Audigy 2 Value.
9f4bd5dd
JCD
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
1da177e4
LT
10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
42f53226
JCD
34#include <linux/sched.h>
35#include <linux/kthread.h>
1da177e4
LT
36#include <linux/delay.h>
37#include <linux/init.h>
38#include <linux/interrupt.h>
39#include <linux/pci.h>
40#include <linux/slab.h>
41#include <linux/vmalloc.h>
62932df8
IM
42#include <linux/mutex.h>
43
1da177e4
LT
44
45#include <sound/core.h>
46#include <sound/emu10k1.h>
9f4bd5dd 47#include <linux/firmware.h>
1da177e4 48#include "p16v.h"
e2b15f8f 49#include "tina2.h"
184c1e2c 50#include "p17v.h"
1da177e4 51
19b99fba 52
7e0af29d
CL
53#define HANA_FILENAME "emu/hana.fw"
54#define DOCK_FILENAME "emu/audio_dock.fw"
3663d845
JCD
55#define EMU1010B_FILENAME "emu/emu1010b.fw"
56#define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
190d2c46 57#define EMU0404_FILENAME "emu/emu0404.fw"
d9e8a552 58#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
7e0af29d
CL
59
60MODULE_FIRMWARE(HANA_FILENAME);
61MODULE_FIRMWARE(DOCK_FILENAME);
3663d845
JCD
62MODULE_FIRMWARE(EMU1010B_FILENAME);
63MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
190d2c46 64MODULE_FIRMWARE(EMU0404_FILENAME);
d9e8a552 65MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
7e0af29d
CL
66
67
1da177e4
LT
68/*************************************************************************
69 * EMU10K1 init / done
70 *************************************************************************/
71
eb4698f3 72void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
1da177e4
LT
73{
74 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
75 snd_emu10k1_ptr_write(emu, IP, ch, 0);
76 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
77 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
79 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
80 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
81
82 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
83 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
84 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
85 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
87 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
88
89 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
90 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
91 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
92 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
93 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
94 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
95 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
97
98 /*** these are last so OFF prevents writing ***/
99 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
100 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
101 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
102 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
104
105 /* Audigy extra stuffs */
106 if (emu->audigy) {
107 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
108 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
112 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
113 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
114 }
115}
116
18f3c59f
JCD
117static unsigned int spi_dac_init[] = {
118 0x00ff,
119 0x02ff,
120 0x0400,
121 0x0520,
122 0x0600,
123 0x08ff,
124 0x0aff,
125 0x0cff,
126 0x0eff,
127 0x10ff,
128 0x1200,
129 0x1400,
130 0x1480,
131 0x1800,
132 0x1aff,
133 0x1cff,
134 0x1e00,
135 0x0530,
136 0x0602,
137 0x0622,
138 0x1400,
139};
184c1e2c
JCD
140
141static unsigned int i2c_adc_init[][2] = {
142 { 0x17, 0x00 }, /* Reset */
143 { 0x07, 0x00 }, /* Timeout */
144 { 0x0b, 0x22 }, /* Interface control */
145 { 0x0c, 0x22 }, /* Master mode control */
146 { 0x0d, 0x08 }, /* Powerdown control */
147 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
148 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
149 { 0x10, 0x7b }, /* ALC Control 1 */
150 { 0x11, 0x00 }, /* ALC Control 2 */
151 { 0x12, 0x32 }, /* ALC Control 3 */
152 { 0x13, 0x00 }, /* Noise gate control */
153 { 0x14, 0xa6 }, /* Limiter control */
154 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
155};
18f3c59f 156
09668b44 157static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
1da177e4 158{
1da177e4 159 unsigned int silent_page;
09668b44 160 int ch;
184c1e2c 161 u32 tmp;
1da177e4
LT
162
163 /* disable audio and lock cache */
09668b44
TI
164 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
165 emu->port + HCFG);
1da177e4
LT
166
167 /* reset recording buffers */
168 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
169 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
170 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
171 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
172 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
173 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
174
175 /* disable channel interrupt */
176 outl(0, emu->port + INTE);
177 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
178 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
179 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
181
182 if (emu->audigy){
183 /* set SPDIF bypass mode */
184 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
185 /* enable rear left + rear right AC97 slots */
09668b44
TI
186 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
187 AC97SLOT_REAR_LEFT);
1da177e4
LT
188 }
189
190 /* init envelope engine */
09668b44 191 for (ch = 0; ch < NUM_G; ch++)
1da177e4 192 snd_emu10k1_voice_init(emu, ch);
1da177e4 193
09668b44
TI
194 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
195 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
196 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
1da177e4 197
2b637da5 198 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4 199 /* Hacks for Alice3 to work independent of haP16V driver */
1da177e4
LT
200 //Setup SRCMulti_I2S SamplingRate
201 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
202 tmp &= 0xfffff1ff;
203 tmp |= (0x2<<9);
204 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
205
206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
207 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
208 /* Setup SRCMulti Input Audio Enable */
209 /* Use 0xFFFFFFFF to enable P16V sounds. */
210 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
211
212 /* Enabled Phased (8-channel) P16V playback */
213 outl(0x0201, emu->port + HCFG2);
214 /* Set playback routing. */
fd9a98ec 215 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
1da177e4 216 }
e0474e53 217 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
1da177e4 218 /* Hacks for Alice3 to work independent of haP16V driver */
09668b44 219 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
1da177e4
LT
220 //Setup SRCMulti_I2S SamplingRate
221 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
222 tmp &= 0xfffff1ff;
223 tmp |= (0x2<<9);
224 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
225
226 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
227 outl(0x600000, emu->port + 0x20);
228 outl(0x14, emu->port + 0x24);
229
230 /* Setup SRCMulti Input Audio Enable */
231 outl(0x7b0000, emu->port + 0x20);
232 outl(0xFF000000, emu->port + 0x24);
233
234 /* Setup SPDIF Out Audio Enable */
235 /* The Audigy 2 Value has a separate SPDIF out,
236 * so no need for a mixer switch
237 */
238 outl(0x7a0000, emu->port + 0x20);
239 outl(0xFF000000, emu->port + 0x24);
240 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
241 outl(tmp, emu->port + A_IOCFG);
242 }
27fe864e 243 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
18f3c59f
JCD
244 int size, n;
245
246 size = ARRAY_SIZE(spi_dac_init);
9f4bd5dd 247 for (n = 0; n < size; n++)
18f3c59f
JCD
248 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
249
27fe864e 250 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
ccadc3e3
JCD
251 /* Enable GPIOs
252 * GPIO0: Unknown
253 * GPIO1: Speakers-enabled.
254 * GPIO2: Unknown
255 * GPIO3: Unknown
256 * GPIO4: IEC958 Output on.
257 * GPIO5: Unknown
258 * GPIO6: Unknown
259 * GPIO7: Unknown
260 */
261 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
27fe864e 262 }
184c1e2c
JCD
263 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
264 int size, n;
265
266 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
267 tmp = inl(emu->port + A_IOCFG);
268 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
269 tmp = inl(emu->port + A_IOCFG);
270 size = ARRAY_SIZE(i2c_adc_init);
271 for (n = 0; n < size; n++)
272 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
273 for (n=0; n < 4; n++) {
274 emu->i2c_capture_volume[n][0]= 0xcf;
275 emu->i2c_capture_volume[n][1]= 0xcf;
276 }
184c1e2c
JCD
277 }
278
27fe864e 279
1da177e4
LT
280 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
281 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
282 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
283
284 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
285 for (ch = 0; ch < NUM_G; ch++) {
286 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
287 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
288 }
289
190d2c46 290 if (emu->card_capabilities->emu_model) {
9f4bd5dd
JCD
291 outl(HCFG_AUTOMUTE_ASYNC |
292 HCFG_EMU32_SLAVE |
293 HCFG_AUDIOENABLE, emu->port + HCFG);
1da177e4
LT
294 /*
295 * Hokay, setup HCFG
296 * Mute Disable Audio = 0
297 * Lock Tank Memory = 1
298 * Lock Sound Memory = 0
299 * Auto Mute = 1
300 */
9f4bd5dd 301 } else if (emu->audigy) {
1da177e4
LT
302 if (emu->revision == 4) /* audigy2 */
303 outl(HCFG_AUDIOENABLE |
304 HCFG_AC3ENABLE_CDSPDIF |
305 HCFG_AC3ENABLE_GPSPDIF |
306 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
307 else
308 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
e0474e53
JCD
309 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
310 * e.g. card_capabilities->joystick */
1da177e4
LT
311 } else if (emu->model == 0x20 ||
312 emu->model == 0xc400 ||
313 (emu->model == 0x21 && emu->revision < 6))
314 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
315 else
316 // With on-chip joystick
317 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
318
319 if (enable_ir) { /* enable IR for SB Live */
190d2c46 320 if (emu->card_capabilities->emu_model) {
9f4bd5dd 321 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD
322 } else if (emu->card_capabilities->i2c_adc) {
323 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 324 } else if (emu->audigy) {
1da177e4
LT
325 unsigned int reg = inl(emu->port + A_IOCFG);
326 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
327 udelay(500);
328 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
329 udelay(100);
330 outl(reg, emu->port + A_IOCFG);
331 } else {
332 unsigned int reg = inl(emu->port + HCFG);
333 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
334 udelay(500);
335 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
336 udelay(100);
337 outl(reg, emu->port + HCFG);
338 }
339 }
340
190d2c46 341 if (emu->card_capabilities->emu_model) {
9f4bd5dd 342 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD
343 } else if (emu->card_capabilities->i2c_adc) {
344 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 345 } else if (emu->audigy) { /* enable analog output */
1da177e4
LT
346 unsigned int reg = inl(emu->port + A_IOCFG);
347 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
348 }
349
09668b44
TI
350 return 0;
351}
1da177e4 352
09668b44
TI
353static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
354{
1da177e4
LT
355 /*
356 * Enable the audio bit
357 */
358 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
359
360 /* Enable analog/digital outs on audigy */
190d2c46 361 if (emu->card_capabilities->emu_model) {
9f4bd5dd 362 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD
363 } else if (emu->card_capabilities->i2c_adc) {
364 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 365 } else if (emu->audigy) {
1da177e4
LT
366 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
367
e0474e53 368 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4
LT
369 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
370 * This has to be done after init ALice3 I2SOut beyond 48KHz.
371 * So, sequence is important. */
372 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
e0474e53 373 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
1da177e4
LT
374 /* Unmute Analog now. */
375 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
376 } else {
377 /* Disable routing from AC97 line out to Front speakers */
378 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
379 }
380 }
381
382#if 0
383 {
384 unsigned int tmp;
385 /* FIXME: the following routine disables LiveDrive-II !! */
386 // TOSLink detection
387 emu->tos_link = 0;
388 tmp = inl(emu->port + HCFG);
389 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
390 outl(tmp|0x800, emu->port + HCFG);
391 udelay(50);
392 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
393 emu->tos_link = 1;
394 outl(tmp, emu->port + HCFG);
395 }
396 }
397 }
398#endif
399
400 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
1da177e4
LT
401}
402
09668b44 403int snd_emu10k1_done(struct snd_emu10k1 * emu)
1da177e4
LT
404{
405 int ch;
406
407 outl(0, emu->port + INTE);
408
409 /*
410 * Shutdown the chip
411 */
412 for (ch = 0; ch < NUM_G; ch++)
413 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
414 for (ch = 0; ch < NUM_G; ch++) {
415 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
416 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
417 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
418 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
419 }
420
421 /* reset recording buffers */
422 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
423 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
424 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
427 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
428 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
429 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
430 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
431 if (emu->audigy)
432 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
433 else
434 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
435
436 /* disable channel interrupt */
437 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
438 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
439 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
441
1da177e4
LT
442 /* disable audio and lock cache */
443 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
444 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
445
1da177e4
LT
446 return 0;
447}
448
449/*************************************************************************
450 * ECARD functional implementation
451 *************************************************************************/
452
453/* In A1 Silicon, these bits are in the HC register */
454#define HOOKN_BIT (1L << 12)
455#define HANDN_BIT (1L << 11)
456#define PULSEN_BIT (1L << 10)
457
458#define EC_GDI1 (1 << 13)
459#define EC_GDI0 (1 << 14)
460
461#define EC_NUM_CONTROL_BITS 20
462
463#define EC_AC3_DATA_SELN 0x0001L
464#define EC_EE_DATA_SEL 0x0002L
465#define EC_EE_CNTRL_SELN 0x0004L
466#define EC_EECLK 0x0008L
467#define EC_EECS 0x0010L
468#define EC_EESDO 0x0020L
469#define EC_TRIM_CSN 0x0040L
470#define EC_TRIM_SCLK 0x0080L
471#define EC_TRIM_SDATA 0x0100L
472#define EC_TRIM_MUTEN 0x0200L
473#define EC_ADCCAL 0x0400L
474#define EC_ADCRSTN 0x0800L
475#define EC_DACCAL 0x1000L
476#define EC_DACMUTEN 0x2000L
477#define EC_LEDN 0x4000L
478
479#define EC_SPDIF0_SEL_SHIFT 15
480#define EC_SPDIF1_SEL_SHIFT 17
481#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
482#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
483#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
484#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
485#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
486 * be incremented any time the EEPROM's
487 * format is changed. */
488
489#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
490
491/* Addresses for special values stored in to EEPROM */
492#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
493#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
494#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
495
496#define EC_LAST_PROMFILE_ADDR 0x2f
497
498#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
499 * can be up to 30 characters in length
500 * and is stored as a NULL-terminated
501 * ASCII string. Any unused bytes must be
502 * filled with zeros */
503#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
504
505
506/* Most of this stuff is pretty self-evident. According to the hardware
507 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
508 * offset problem. Weird.
509 */
510#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
511 EC_TRIM_CSN)
512
513
514#define EC_DEFAULT_ADC_GAIN 0xC4C4
515#define EC_DEFAULT_SPDIF0_SEL 0x0
516#define EC_DEFAULT_SPDIF1_SEL 0x4
517
518/**************************************************************************
519 * @func Clock bits into the Ecard's control latch. The Ecard uses a
520 * control latch will is loaded bit-serially by toggling the Modem control
521 * lines from function 2 on the E8010. This function hides these details
522 * and presents the illusion that we are actually writing to a distinct
523 * register.
524 */
525
eb4698f3 526static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
1da177e4
LT
527{
528 unsigned short count;
529 unsigned int data;
530 unsigned long hc_port;
531 unsigned int hc_value;
532
533 hc_port = emu->port + HCFG;
534 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
535 outl(hc_value, hc_port);
536
537 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
538
539 /* Set up the value */
540 data = ((value & 0x1) ? PULSEN_BIT : 0);
541 value >>= 1;
542
543 outl(hc_value | data, hc_port);
544
545 /* Clock the shift register */
546 outl(hc_value | data | HANDN_BIT, hc_port);
547 outl(hc_value | data, hc_port);
548 }
549
550 /* Latch the bits */
551 outl(hc_value | HOOKN_BIT, hc_port);
552 outl(hc_value, hc_port);
553}
554
555/**************************************************************************
556 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
557 * trim value consists of a 16bit value which is composed of two
558 * 8 bit gain/trim values, one for the left channel and one for the
559 * right channel. The following table maps from the Gain/Attenuation
560 * value in decibels into the corresponding bit pattern for a single
561 * channel.
562 */
563
eb4698f3 564static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
1da177e4
LT
565 unsigned short gain)
566{
567 unsigned int bit;
568
569 /* Enable writing to the TRIM registers */
570 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
571
572 /* Do it again to insure that we meet hold time requirements */
573 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
574
575 for (bit = (1 << 15); bit; bit >>= 1) {
576 unsigned int value;
577
578 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
579
580 if (gain & bit)
581 value |= EC_TRIM_SDATA;
582
583 /* Clock the bit */
584 snd_emu10k1_ecard_write(emu, value);
585 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
586 snd_emu10k1_ecard_write(emu, value);
587 }
588
589 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
590}
591
f40b6890 592static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
1da177e4
LT
593{
594 unsigned int hc_value;
595
596 /* Set up the initial settings */
597 emu->ecard_ctrl = EC_RAW_RUN_MODE |
598 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
599 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
600
601 /* Step 0: Set the codec type in the hardware control register
602 * and enable audio output */
603 hc_value = inl(emu->port + HCFG);
604 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
605 inl(emu->port + HCFG);
606
607 /* Step 1: Turn off the led and deassert TRIM_CS */
608 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
609
610 /* Step 2: Calibrate the ADC and DAC */
611 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
612
613 /* Step 3: Wait for awhile; XXX We can't get away with this
614 * under a real operating system; we'll need to block and wait that
615 * way. */
616 snd_emu10k1_wait(emu, 48000);
617
618 /* Step 4: Switch off the DAC and ADC calibration. Note
619 * That ADC_CAL is actually an inverted signal, so we assert
620 * it here to stop calibration. */
621 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
622
623 /* Step 4: Switch into run mode */
624 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
625
626 /* Step 5: Set the analog input gain */
627 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
628
629 return 0;
630}
631
f40b6890 632static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
d83c671f
JCD
633{
634 unsigned long special_port;
635 unsigned int value;
636
637 /* Special initialisation routine
638 * before the rest of the IO-Ports become active.
639 */
640 special_port = emu->port + 0x38;
641 value = inl(special_port);
642 outl(0x00d00000, special_port);
643 value = inl(special_port);
644 outl(0x00d00001, special_port);
645 value = inl(special_port);
646 outl(0x00d0005f, special_port);
647 value = inl(special_port);
648 outl(0x00d0007f, special_port);
649 value = inl(special_port);
650 outl(0x0090007f, special_port);
651 value = inl(special_port);
652
e2b15f8f 653 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
c94fa4c9
JCD
654 /* Delay to give time for ADC chip to switch on. It needs 113ms */
655 msleep(200);
d83c671f
JCD
656 return 0;
657}
658
9f4bd5dd 659static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
19b99fba 660{
9f4bd5dd
JCD
661 int err;
662 int n, i;
663 int reg;
664 int value;
190d2c46
JCD
665 unsigned int write_post;
666 unsigned long flags;
9f4bd5dd
JCD
667 const struct firmware *fw_entry;
668
669 if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
670 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
671 return err;
672 }
bbb53551 673 snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
19b99fba 674
9f4bd5dd
JCD
675 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
676 /* GPIO7 -> FPGA PGMN
677 * GPIO6 -> FPGA CCLK
678 * GPIO5 -> FPGA DIN
679 * FPGA CONFIG OFF -> FPGA PGMN
680 */
190d2c46 681 spin_lock_irqsave(&emu->emu_lock, flags);
9f4bd5dd 682 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
190d2c46
JCD
683 write_post = inl(emu->port + A_IOCFG);
684 udelay(100);
9f4bd5dd 685 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
190d2c46 686 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd
JCD
687 udelay(100); /* Allow FPGA memory to clean */
688 for(n = 0; n < fw_entry->size; n++) {
689 value=fw_entry->data[n];
690 for(i = 0; i < 8; i++) {
691 reg = 0x80;
692 if (value & 0x1)
693 reg = reg | 0x20;
694 value = value >> 1;
695 outl(reg, emu->port + A_IOCFG);
190d2c46 696 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd 697 outl(reg | 0x40, emu->port + A_IOCFG);
190d2c46 698 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd
JCD
699 }
700 }
701 /* After programming, set GPIO bit 4 high again. */
702 outl(0x10, emu->port + A_IOCFG);
190d2c46
JCD
703 write_post = inl(emu->port + A_IOCFG);
704 spin_unlock_irqrestore(&emu->emu_lock, flags);
19b99fba 705
9f4bd5dd 706 release_firmware(fw_entry);
19b99fba
JCD
707 return 0;
708}
709
42f53226
JCD
710int emu1010_firmware_thread(void *data) {
711 struct snd_emu10k1 * emu = data;
712 int tmp,tmp2;
713 int reg;
714 int err;
715
716 for (;;) {
717 /* Delay to allow Audio Dock to settle */
190d2c46 718 msleep_interruptible(1000);
42f53226
JCD
719 if (kthread_should_stop())
720 break;
721 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
722 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg ); /* OPTIONS: Which cards are attached to the EMU */
723 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
724 /* Audio Dock attached */
725 /* Return to Audio Dock programming mode */
726 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
727 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
3839e4f1
TI
728 if (emu->card_capabilities->emu_model ==
729 EMU_MODEL_EMU1010) {
42f53226 730 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
190d2c46 731 continue;
42f53226 732 }
3839e4f1
TI
733 } else if (emu->card_capabilities->emu_model ==
734 EMU_MODEL_EMU1010B) {
42f53226 735 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
190d2c46 736 continue;
42f53226 737 }
3839e4f1
TI
738 } else if (emu->card_capabilities->emu_model ==
739 EMU_MODEL_EMU1616) {
42f53226 740 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
190d2c46 741 continue;
42f53226
JCD
742 }
743 }
744
745 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0 );
746 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg );
747 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
748 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
749 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
750 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
751 if ((reg & 0x1f) != 0x15) {
752 /* FPGA failed to be programmed */
753 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
190d2c46 754 continue;
42f53226
JCD
755 }
756 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
757 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
758 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
759 snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
c93d1c25
JCD
760 /* Sync clocking between 1010 and Dock */
761 /* Allow DLL to settle */
762 msleep(10);
763 /* Unmute all. Default is muted after a firmware load */
764 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
42f53226
JCD
765 }
766 }
190d2c46 767 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
42f53226
JCD
768 return 0;
769}
770
13d45709
PH
771/*
772 * EMU-1010 - details found out from this driver, official MS Win drivers,
773 * testing the card:
774 *
775 * Audigy2 (aka Alice2):
776 * ---------------------
777 * * communication over PCI
778 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
779 * to 2 x 16-bit, using internal DSP instructions
780 * * slave mode, clock supplied by HANA
781 * * linked to HANA using:
782 * 32 x 32-bit serial EMU32 output channels
783 * 16 x EMU32 input channels
784 * (?) x I2S I/O channels (?)
785 *
786 * FPGA (aka HANA):
787 * ---------------
788 * * provides all (?) physical inputs and outputs of the card
789 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
790 * * provides clock signal for the card and Alice2
791 * * two crystals - for 44.1kHz and 48kHz multiples
792 * * provides internal routing of signal sources to signal destinations
793 * * inputs/outputs to Alice2 - see above
794 *
795 * Current status of the driver:
796 * ----------------------------
797 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
798 * * PCM device nb. 2:
799 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
800 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
801 */
9f4bd5dd 802static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
19b99fba
JCD
803{
804 unsigned int i;
9f4bd5dd
JCD
805 int tmp,tmp2;
806 int reg;
807 int err;
190d2c46 808 const char *filename = NULL;
9f4bd5dd
JCD
809
810 snd_printk(KERN_INFO "emu1010: Special config.\n");
811 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
812 * Lock Sound Memory Cache, Lock Tank Memory Cache,
813 * Mute all codecs.
814 */
19b99fba 815 outl(0x0005a00c, emu->port + HCFG);
9f4bd5dd
JCD
816 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
817 * Lock Tank Memory Cache,
818 * Mute all codecs.
819 */
820 outl(0x0005a004, emu->port + HCFG);
821 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
822 * Mute all codecs.
823 */
19b99fba 824 outl(0x0005a000, emu->port + HCFG);
9f4bd5dd
JCD
825 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
826 * Mute all codecs.
827 */
19b99fba
JCD
828 outl(0x0005a000, emu->port + HCFG);
829
9f4bd5dd
JCD
830 /* Disable 48Volt power to Audio Dock */
831 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
832
833 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
834 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
835 snd_printdd("reg1=0x%x\n",reg);
d9e8a552 836 if ((reg & 0x3f) == 0x15) {
9f4bd5dd
JCD
837 /* FPGA netlist already present so clear it */
838 /* Return to programming mode */
839
840 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02 );
19b99fba 841 }
9f4bd5dd
JCD
842 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
843 snd_printdd("reg2=0x%x\n",reg);
d9e8a552 844 if ((reg & 0x3f) == 0x15) {
9f4bd5dd 845 /* FPGA failed to return to programming mode */
d9e8a552 846 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
9f4bd5dd 847 return -ENODEV;
19b99fba 848 }
9f4bd5dd 849 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
190d2c46 850 switch (emu->card_capabilities->emu_model) {
3839e4f1 851 case EMU_MODEL_EMU1010:
190d2c46
JCD
852 filename = HANA_FILENAME;
853 break;
3839e4f1 854 case EMU_MODEL_EMU1010B:
190d2c46
JCD
855 filename = EMU1010B_FILENAME;
856 break;
3839e4f1 857 case EMU_MODEL_EMU1616:
190d2c46
JCD
858 filename = EMU1010_NOTEBOOK_FILENAME;
859 break;
3839e4f1 860 case EMU_MODEL_EMU0404:
190d2c46
JCD
861 filename = EMU0404_FILENAME;
862 break;
863 default:
864 filename = NULL;
865 return -ENODEV;
866 break;
867 }
868 snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
869 err = snd_emu1010_load_firmware(emu, filename);
870 if (err != 0) {
871 snd_printk(
872 KERN_INFO "emu1010: Loading Firmware file %s failed\n",
873 filename);
874 return err;
19b99fba 875 }
9f4bd5dd
JCD
876
877 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
878 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
d9e8a552 879 if ((reg & 0x3f) != 0x15) {
9f4bd5dd
JCD
880 /* FPGA failed to be programmed */
881 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
882 return -ENODEV;
19b99fba 883 }
19b99fba 884
9f4bd5dd
JCD
885 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
886 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
887 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
888 snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
889 /* Enable 48Volt power to Audio Dock */
890 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON );
891
892 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
893 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
894 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
895 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
896 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
edec7bbb 897 /* Optical -> ADAT I/O */
f93abe51
JCD
898 /* 0 : SPDIF
899 * 1 : ADAT
900 */
901 emu->emu1010.optical_in = 1; /* IN_ADAT */
902 emu->emu1010.optical_out = 1; /* IN_ADAT */
903 tmp = 0;
904 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
905 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
906 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp );
9148cc50 907 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
9f4bd5dd 908 /* Set no attenuation on Audio Dock pads. */
9148cc50
JCD
909 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
910 emu->emu1010.adc_pads = 0x00;
9f4bd5dd
JCD
911 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
912 /* Unmute Audio dock DACs, Headphone source DAC-4. */
913 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
914 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
9148cc50
JCD
915 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
916 /* DAC PADs. */
917 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
918 emu->emu1010.dac_pads = 0x0f;
9f4bd5dd
JCD
919 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
920 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
921 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
922 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
923 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
924 /* MIDI routing */
9148cc50 925 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
9f4bd5dd 926 /* Unknown. */
9148cc50 927 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
9f4bd5dd
JCD
928 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
929 /* IRQ Enable: All off */
930 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
931
932 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
933 snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
934 /* Default WCLK set to 48kHz. */
935 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
936 /* Word Clock source, Internal 48kHz x1 */
937 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
938 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
939 /* Audio Dock LEDs. */
940 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
19b99fba 941
9f4bd5dd
JCD
942#if 0
943 /* For 96kHz */
944 snd_emu1010_fpga_link_dst_src_write(emu,
945 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
946 snd_emu1010_fpga_link_dst_src_write(emu,
947 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
948 snd_emu1010_fpga_link_dst_src_write(emu,
949 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
950 snd_emu1010_fpga_link_dst_src_write(emu,
951 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
952#endif
953#if 0
954 /* For 192kHz */
955 snd_emu1010_fpga_link_dst_src_write(emu,
956 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
957 snd_emu1010_fpga_link_dst_src_write(emu,
958 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
959 snd_emu1010_fpga_link_dst_src_write(emu,
960 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
961 snd_emu1010_fpga_link_dst_src_write(emu,
962 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
963 snd_emu1010_fpga_link_dst_src_write(emu,
964 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
965 snd_emu1010_fpga_link_dst_src_write(emu,
966 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
967 snd_emu1010_fpga_link_dst_src_write(emu,
968 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
969 snd_emu1010_fpga_link_dst_src_write(emu,
970 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
971#endif
972#if 1
973 /* For 48kHz */
974 snd_emu1010_fpga_link_dst_src_write(emu,
975 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
976 snd_emu1010_fpga_link_dst_src_write(emu,
977 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
978 snd_emu1010_fpga_link_dst_src_write(emu,
979 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
980 snd_emu1010_fpga_link_dst_src_write(emu,
981 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
982 snd_emu1010_fpga_link_dst_src_write(emu,
983 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
984 snd_emu1010_fpga_link_dst_src_write(emu,
985 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
986 snd_emu1010_fpga_link_dst_src_write(emu,
987 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
988 snd_emu1010_fpga_link_dst_src_write(emu,
989 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
13d45709
PH
990 /* Pavel Hofman - setting defaults for 8 more capture channels
991 * Defaults only, users will set their own values anyways, let's
992 * just copy/paste.
993 */
994
995 snd_emu1010_fpga_link_dst_src_write(emu,
996 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
997 snd_emu1010_fpga_link_dst_src_write(emu,
998 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
999 snd_emu1010_fpga_link_dst_src_write(emu,
1000 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1001 snd_emu1010_fpga_link_dst_src_write(emu,
1002 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1003 snd_emu1010_fpga_link_dst_src_write(emu,
1004 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1005 snd_emu1010_fpga_link_dst_src_write(emu,
1006 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1007 snd_emu1010_fpga_link_dst_src_write(emu,
1008 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1009 snd_emu1010_fpga_link_dst_src_write(emu,
1010 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
9f4bd5dd
JCD
1011#endif
1012#if 0
1013 /* Original */
1014 snd_emu1010_fpga_link_dst_src_write(emu,
1015 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1016 snd_emu1010_fpga_link_dst_src_write(emu,
1017 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1018 snd_emu1010_fpga_link_dst_src_write(emu,
1019 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1020 snd_emu1010_fpga_link_dst_src_write(emu,
1021 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1022 snd_emu1010_fpga_link_dst_src_write(emu,
1023 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1024 snd_emu1010_fpga_link_dst_src_write(emu,
1025 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1026 snd_emu1010_fpga_link_dst_src_write(emu,
1027 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1028 snd_emu1010_fpga_link_dst_src_write(emu,
1029 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1030 snd_emu1010_fpga_link_dst_src_write(emu,
1031 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1032 snd_emu1010_fpga_link_dst_src_write(emu,
1033 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1034 snd_emu1010_fpga_link_dst_src_write(emu,
1035 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1036 snd_emu1010_fpga_link_dst_src_write(emu,
1037 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1038#endif
1039 for (i = 0;i < 0x20; i++ ) {
1040 /* AudioDock Elink <- Silence */
1041 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1042 }
1043 for (i = 0;i < 4; i++) {
1044 /* Hana SPDIF Out <- Silence */
1045 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1046 }
1047 for (i = 0;i < 7; i++) {
1048 /* Hamoa DAC <- Silence */
1049 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1050 }
1051 for (i = 0;i < 7; i++) {
1052 /* Hana ADAT Out <- Silence */
1053 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1054 }
1055 snd_emu1010_fpga_link_dst_src_write(emu,
1056 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1057 snd_emu1010_fpga_link_dst_src_write(emu,
1058 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1059 snd_emu1010_fpga_link_dst_src_write(emu,
1060 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1061 snd_emu1010_fpga_link_dst_src_write(emu,
1062 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1063 snd_emu1010_fpga_link_dst_src_write(emu,
1064 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1065 snd_emu1010_fpga_link_dst_src_write(emu,
1066 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1067 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1068
1069 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1070
1071 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1072 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1073 * Mute all codecs.
1074 */
1075 outl(0x0000a000, emu->port + HCFG);
1076 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1077 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1078 * Un-Mute all codecs.
1079 */
19b99fba 1080 outl(0x0000a001, emu->port + HCFG);
9f4bd5dd 1081
19b99fba
JCD
1082 /* Initial boot complete. Now patches */
1083
9f4bd5dd 1084 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
9148cc50
JCD
1085 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1086 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1087 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1088 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
9f4bd5dd
JCD
1089 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1090 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1091
42f53226
JCD
1092 /* Start Micro/Audio Dock firmware loader thread */
1093 emu->emu1010.firmware_thread = kthread_create(&emu1010_firmware_thread,
1094 emu,
1095 "emu1010_firmware");
1096 wake_up_process(emu->emu1010.firmware_thread);
3663d845 1097
9f4bd5dd
JCD
1098#if 0
1099 snd_emu1010_fpga_link_dst_src_write(emu,
1100 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1101 snd_emu1010_fpga_link_dst_src_write(emu,
1102 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1103 snd_emu1010_fpga_link_dst_src_write(emu,
1104 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1105 snd_emu1010_fpga_link_dst_src_write(emu,
1106 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1107#endif
1108 /* Default outputs */
3839e4f1 1109 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1c02e366
CF
1110 /* 1616(M) cardbus default outputs */
1111 /* ALICE2 bus 0xa0 */
1112 snd_emu1010_fpga_link_dst_src_write(emu,
1113 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1114 emu->emu1010.output_source[0] = 17;
1115 snd_emu1010_fpga_link_dst_src_write(emu,
1116 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1117 emu->emu1010.output_source[1] = 18;
1118 snd_emu1010_fpga_link_dst_src_write(emu,
1119 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1120 emu->emu1010.output_source[2] = 19;
1121 snd_emu1010_fpga_link_dst_src_write(emu,
1122 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1123 emu->emu1010.output_source[3] = 20;
1124 snd_emu1010_fpga_link_dst_src_write(emu,
1125 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1126 emu->emu1010.output_source[4] = 21;
1127 snd_emu1010_fpga_link_dst_src_write(emu,
1128 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1129 emu->emu1010.output_source[5] = 22;
1130 /* ALICE2 bus 0xa0 */
1131 snd_emu1010_fpga_link_dst_src_write(emu,
1132 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1133 emu->emu1010.output_source[16] = 17;
1134 snd_emu1010_fpga_link_dst_src_write(emu,
1135 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1136 emu->emu1010.output_source[17] = 18;
1137 } else {
1138 /* ALICE2 bus 0xa0 */
1139 snd_emu1010_fpga_link_dst_src_write(emu,
1140 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1141 emu->emu1010.output_source[0] = 21;
1142 snd_emu1010_fpga_link_dst_src_write(emu,
1143 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1144 emu->emu1010.output_source[1] = 22;
1145 snd_emu1010_fpga_link_dst_src_write(emu,
1146 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1147 emu->emu1010.output_source[2] = 23;
1148 snd_emu1010_fpga_link_dst_src_write(emu,
1149 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1150 emu->emu1010.output_source[3] = 24;
1151 snd_emu1010_fpga_link_dst_src_write(emu,
1152 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1153 emu->emu1010.output_source[4] = 25;
1154 snd_emu1010_fpga_link_dst_src_write(emu,
1155 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1156 emu->emu1010.output_source[5] = 26;
1157 snd_emu1010_fpga_link_dst_src_write(emu,
1158 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1159 emu->emu1010.output_source[6] = 27;
1160 snd_emu1010_fpga_link_dst_src_write(emu,
1161 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1162 emu->emu1010.output_source[7] = 28;
1163 /* ALICE2 bus 0xa0 */
1164 snd_emu1010_fpga_link_dst_src_write(emu,
1165 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1166 emu->emu1010.output_source[8] = 21;
1167 snd_emu1010_fpga_link_dst_src_write(emu,
1168 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1169 emu->emu1010.output_source[9] = 22;
1170 /* ALICE2 bus 0xa0 */
1171 snd_emu1010_fpga_link_dst_src_write(emu,
1172 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1173 emu->emu1010.output_source[10] = 21;
1174 snd_emu1010_fpga_link_dst_src_write(emu,
1175 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1176 emu->emu1010.output_source[11] = 22;
1177 /* ALICE2 bus 0xa0 */
1178 snd_emu1010_fpga_link_dst_src_write(emu,
1179 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1180 emu->emu1010.output_source[12] = 21;
1181 snd_emu1010_fpga_link_dst_src_write(emu,
1182 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1183 emu->emu1010.output_source[13] = 22;
1184 /* ALICE2 bus 0xa0 */
1185 snd_emu1010_fpga_link_dst_src_write(emu,
1186 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1187 emu->emu1010.output_source[14] = 21;
1188 snd_emu1010_fpga_link_dst_src_write(emu,
1189 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1190 emu->emu1010.output_source[15] = 22;
1191 /* ALICE2 bus 0xa0 */
1192 snd_emu1010_fpga_link_dst_src_write(emu,
1193 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1194 emu->emu1010.output_source[16] = 21;
1195 snd_emu1010_fpga_link_dst_src_write(emu,
1196 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1197 emu->emu1010.output_source[17] = 22;
1198 snd_emu1010_fpga_link_dst_src_write(emu,
1199 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1200 emu->emu1010.output_source[18] = 23;
1201 snd_emu1010_fpga_link_dst_src_write(emu,
1202 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1203 emu->emu1010.output_source[19] = 24;
1204 snd_emu1010_fpga_link_dst_src_write(emu,
1205 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1206 emu->emu1010.output_source[20] = 25;
1207 snd_emu1010_fpga_link_dst_src_write(emu,
1208 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1209 emu->emu1010.output_source[21] = 26;
1210 snd_emu1010_fpga_link_dst_src_write(emu,
1211 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1212 emu->emu1010.output_source[22] = 27;
1213 snd_emu1010_fpga_link_dst_src_write(emu,
1214 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1215 emu->emu1010.output_source[23] = 28;
1216 }
9f4bd5dd 1217 /* TEMP: Select SPDIF in/out */
edec7bbb 1218 //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
9f4bd5dd
JCD
1219
1220 /* TEMP: Select 48kHz SPDIF out */
1221 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1222 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1223 /* Word Clock source, Internal 48kHz x1 */
1224 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1225 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
b0dbdaea 1226 emu->emu1010.internal_clock = 1; /* 48000 */
9f4bd5dd
JCD
1227 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1228 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1229 //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1230 //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1231 //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
19b99fba
JCD
1232
1233 return 0;
1234}
1da177e4
LT
1235/*
1236 * Create the EMU10K1 instance
1237 */
1238
09668b44
TI
1239#ifdef CONFIG_PM
1240static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1241static void free_pm_buffer(struct snd_emu10k1 *emu);
1242#endif
1243
eb4698f3 1244static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1da177e4
LT
1245{
1246 if (emu->port) { /* avoid access to already used hardware */
1247 snd_emu10k1_fx8010_tram_setup(emu, 0);
1248 snd_emu10k1_done(emu);
09668b44
TI
1249 /* remove reserved page */
1250 if (emu->reserved_page) {
1251 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
1252 emu->reserved_page = NULL;
1253 }
1254 snd_emu10k1_free_efx(emu);
1da177e4 1255 }
3839e4f1 1256 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
9f4bd5dd
JCD
1257 /* Disable 48Volt power to Audio Dock */
1258 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
1259 }
190d2c46
JCD
1260 if (emu->card_capabilities->emu_model)
1261 kthread_stop(emu->emu1010.firmware_thread);
1da177e4
LT
1262 if (emu->memhdr)
1263 snd_util_memhdr_free(emu->memhdr);
1264 if (emu->silent_page.area)
1265 snd_dma_free_pages(&emu->silent_page);
1266 if (emu->ptb_pages.area)
1267 snd_dma_free_pages(&emu->ptb_pages);
1268 vfree(emu->page_ptr_table);
1269 vfree(emu->page_addr_table);
09668b44
TI
1270#ifdef CONFIG_PM
1271 free_pm_buffer(emu);
1272#endif
1da177e4 1273 if (emu->irq >= 0)
437a5a46 1274 free_irq(emu->irq, emu);
1da177e4
LT
1275 if (emu->port)
1276 pci_release_regions(emu->pci);
2b637da5 1277 if (emu->card_capabilities->ca0151_chip) /* P16V */
1da177e4 1278 snd_p16v_free(emu);
09668b44 1279 pci_disable_device(emu->pci);
1da177e4
LT
1280 kfree(emu);
1281 return 0;
1282}
1283
eb4698f3 1284static int snd_emu10k1_dev_free(struct snd_device *device)
1da177e4 1285{
eb4698f3 1286 struct snd_emu10k1 *emu = device->device_data;
1da177e4
LT
1287 return snd_emu10k1_free(emu);
1288}
1289
eb4698f3 1290static struct snd_emu_chip_details emu_chip_details[] = {
1da177e4 1291 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
88dc0e5d 1292 /* Tested by James@superbug.co.uk 3rd July 2005 */
54efc96d
JCD
1293 /* DSP: CA0108-IAT
1294 * DAC: CS4382-KQ
1295 * ADC: Philips 1361T
1296 * AC97: STAC9750
1297 * CA0151: None
1298 */
1da177e4
LT
1299 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1300 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
aec72e0a 1301 .id = "Audigy2",
1da177e4
LT
1302 .emu10k2_chip = 1,
1303 .ca0108_chip = 1,
2668907a
PZ
1304 .spk71 = 1,
1305 .ac97_chip = 1} ,
21fdddea
JCD
1306 /* Audigy4 (Not PRO) SB0610 */
1307 /* Tested by James@superbug.co.uk 4th April 2006 */
1308 /* A_IOCFG bits
1309 * Output
1310 * 0: ?
1311 * 1: ?
1312 * 2: ?
1313 * 3: 0 - Digital Out, 1 - Line in
1314 * 4: ?
1315 * 5: ?
1316 * 6: ?
1317 * 7: ?
1318 * Input
1319 * 8: ?
1320 * 9: ?
1321 * A: Green jack sense (Front)
1322 * B: ?
1323 * C: Black jack sense (Rear/Side Right)
1324 * D: Yellow jack sense (Center/LFE/Side Left)
1325 * E: ?
1326 * F: ?
1327 *
1328 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1329 * 0 - Digital Out
1330 * 1 - Line in
1331 */
1332 /* Mic input not tested.
1333 * Analog CD input not tested
1334 * Digital Out not tested.
1335 * Line in working.
1336 * Audio output 5.1 working. Side outputs not working.
1337 */
1338 /* DSP: CA10300-IAT LF
1339 * DAC: Cirrus Logic CS4382-KQZ
1340 * ADC: Philips 1361T
1341 * AC97: Sigmatel STAC9750
1342 * CA0151: None
1343 */
1344 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1345 .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1346 .id = "Audigy2",
1347 .emu10k2_chip = 1,
1348 .ca0108_chip = 1,
1349 .spk71 = 1,
1350 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1351 .ac97_chip = 1} ,
d83c671f 1352 /* Audigy 2 ZS Notebook Cardbus card.*/
184c1e2c 1353 /* Tested by James@superbug.co.uk 6th November 2006 */
f951fd3c
JCD
1354 /* Audio output 7.1/Headphones working.
1355 * Digital output working. (AC3 not checked, only PCM)
184c1e2c
JCD
1356 * Audio Mic/Line inputs working.
1357 * Digital input not tested.
f951fd3c 1358 */
21fdddea 1359 /* DSP: Tina2
f951fd3c
JCD
1360 * DAC: Wolfson WM8768/WM8568
1361 * ADC: Wolfson WM8775
1362 * AC97: None
1363 * CA0151: None
1364 */
184c1e2c
JCD
1365 /* Tested by James@superbug.co.uk 4th April 2006 */
1366 /* A_IOCFG bits
1367 * Output
1368 * 0: Not Used
1369 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1370 * 2: Analog input 0 = line in, 1 = mic in
1371 * 3: Not Used
1372 * 4: Digital output 0 = off, 1 = on.
1373 * 5: Not Used
1374 * 6: Not Used
1375 * 7: Not Used
1376 * Input
1377 * All bits 1 (0x3fxx) means nothing plugged in.
1378 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1379 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1380 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1381 * E-F: Always 0
1382 *
1383 */
d83c671f
JCD
1384 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1385 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1386 .id = "Audigy2",
1387 .emu10k2_chip = 1,
1388 .ca0108_chip = 1,
1389 .ca_cardbus_chip = 1,
27fe864e 1390 .spi_dac = 1,
184c1e2c 1391 .i2c_adc = 1,
d83c671f 1392 .spk71 = 1} ,
190d2c46
JCD
1393 /* Tested by James@superbug.co.uk 20-3-2007. */
1394 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1395 .driver = "Audigy2", .name = "E-mu 0404 [4002]",
1396 .id = "EMU0404",
1397 .emu10k2_chip = 1,
1398 .ca0102_chip = 1,
1399 .spk71 = 1,
3839e4f1 1400 .emu_model = EMU_MODEL_EMU0404} , /* EMU 0404 */
190d2c46 1401 /* Tested by James@superbug.co.uk 4th Nov 2007. */
82c8c741
JCD
1402 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1403 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1404 .id = "EMU1010",
1405 .emu10k2_chip = 1,
1406 .ca0108_chip = 1,
1407 .ca_cardbus_chip = 1,
d9e8a552 1408 .spk71 = 1 ,
3839e4f1 1409 .emu_model = EMU_MODEL_EMU1616},
190d2c46 1410 /* Tested by James@superbug.co.uk 4th Nov 2007. */
3663d845
JCD
1411 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1412 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1413 .id = "EMU1010",
1414 .emu10k2_chip = 1,
1415 .ca0108_chip = 1,
190d2c46 1416 .spk71 = 1,
3839e4f1 1417 .emu_model = EMU_MODEL_EMU1010B},
190d2c46
JCD
1418 /* Tested by James@superbug.co.uk 8th July 2005. */
1419 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1420 .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1421 .id = "EMU1010",
1422 .emu10k2_chip = 1,
1423 .ca0102_chip = 1,
1424 .spk71 = 1,
3839e4f1 1425 .emu_model = EMU_MODEL_EMU1010} , /* Emu 1010 */
190d2c46 1426 /* Audigy4 (Not PRO) SB0610 */
1da177e4
LT
1427 {.vendor = 0x1102, .device = 0x0008,
1428 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
aec72e0a 1429 .id = "Audigy2",
1da177e4 1430 .emu10k2_chip = 1,
2668907a
PZ
1431 .ca0108_chip = 1,
1432 .ac97_chip = 1} ,
88dc0e5d 1433 /* Tested by James@superbug.co.uk 3rd July 2005 */
1da177e4
LT
1434 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1435 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
aec72e0a 1436 .id = "Audigy2",
1da177e4
LT
1437 .emu10k2_chip = 1,
1438 .ca0102_chip = 1,
1439 .ca0151_chip = 1,
1440 .spk71 = 1,
1441 .spdif_bug = 1,
1442 .ac97_chip = 1} ,
f6f8bb64 1443 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
5b0e4985
JCD
1444 /* The 0x20061102 does have SB0350 written on it
1445 * Just like 0x20021102
1446 */
f6f8bb64 1447 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
5b0e4985 1448 .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
f6f8bb64
LR
1449 .id = "Audigy2",
1450 .emu10k2_chip = 1,
1451 .ca0102_chip = 1,
1452 .ca0151_chip = 1,
1453 .spk71 = 1,
1454 .spdif_bug = 1,
1455 .ac97_chip = 1} ,
1da177e4
LT
1456 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1457 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
aec72e0a 1458 .id = "Audigy2",
1da177e4
LT
1459 .emu10k2_chip = 1,
1460 .ca0102_chip = 1,
1461 .ca0151_chip = 1,
1462 .spk71 = 1,
1463 .spdif_bug = 1,
1464 .ac97_chip = 1} ,
1465 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1466 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
aec72e0a 1467 .id = "Audigy2",
1da177e4
LT
1468 .emu10k2_chip = 1,
1469 .ca0102_chip = 1,
1470 .ca0151_chip = 1,
1471 .spk71 = 1,
1472 .spdif_bug = 1,
1473 .ac97_chip = 1} ,
54efc96d
JCD
1474 /* Audigy 2 */
1475 /* Tested by James@superbug.co.uk 3rd July 2005 */
1476 /* DSP: CA0102-IAT
1477 * DAC: CS4382-KQ
1478 * ADC: Philips 1361T
1479 * AC97: STAC9721
1480 * CA0151: Yes
1481 */
1da177e4
LT
1482 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1483 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
aec72e0a 1484 .id = "Audigy2",
1da177e4
LT
1485 .emu10k2_chip = 1,
1486 .ca0102_chip = 1,
1487 .ca0151_chip = 1,
1488 .spk71 = 1,
1489 .spdif_bug = 1,
11b3a755 1490 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1da177e4
LT
1491 .ac97_chip = 1} ,
1492 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1493 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
aec72e0a 1494 .id = "Audigy2",
1da177e4
LT
1495 .emu10k2_chip = 1,
1496 .ca0102_chip = 1,
1497 .ca0151_chip = 1,
2f020aa7 1498 .spk71 = 1,
1da177e4 1499 .spdif_bug = 1} ,
264f9577
JCD
1500 /* Dell OEM/Creative Labs Audigy 2 ZS */
1501 /* See ALSA bug#1365 */
1502 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1503 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1504 .id = "Audigy2",
1505 .emu10k2_chip = 1,
1506 .ca0102_chip = 1,
1507 .ca0151_chip = 1,
1508 .spk71 = 1,
1509 .spdif_bug = 1,
1510 .ac97_chip = 1} ,
1da177e4
LT
1511 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1512 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
aec72e0a 1513 .id = "Audigy2",
1da177e4
LT
1514 .emu10k2_chip = 1,
1515 .ca0102_chip = 1,
1516 .ca0151_chip = 1,
1517 .spk71 = 1,
1518 .spdif_bug = 1,
3271b7b2 1519 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1da177e4 1520 .ac97_chip = 1} ,
bdaed502
TI
1521 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1522 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1523 .id = "Audigy2",
1524 .emu10k2_chip = 1,
1525 .ca0102_chip = 1,
1526 .ca0151_chip = 1,
1527 .spdif_bug = 1,
1528 .ac97_chip = 1} ,
ae3a72d8
JCD
1529 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1530 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
aec72e0a 1531 .id = "Audigy",
56f5ceed
JCD
1532 .emu10k2_chip = 1,
1533 .ca0102_chip = 1,
2668907a 1534 .ac97_chip = 1} ,
ae3a72d8
JCD
1535 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1536 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
2668907a
PZ
1537 .id = "Audigy",
1538 .emu10k2_chip = 1,
1539 .ca0102_chip = 1,
ae3a72d8 1540 .spdif_bug = 1,
2668907a 1541 .ac97_chip = 1} ,
a6c17ec8
AP
1542 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1543 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1544 .id = "Audigy",
1545 .emu10k2_chip = 1,
1546 .ca0102_chip = 1,
1547 .ac97_chip = 1} ,
1da177e4 1548 {.vendor = 0x1102, .device = 0x0004,
bdaed502 1549 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
aec72e0a 1550 .id = "Audigy",
1da177e4
LT
1551 .emu10k2_chip = 1,
1552 .ca0102_chip = 1,
2668907a 1553 .ac97_chip = 1} ,
a6f6192b
JCD
1554 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1555 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
f7de9cfd
MM
1556 .id = "Live",
1557 .emu10k1_chip = 1,
1558 .ac97_chip = 1,
1559 .sblive51 = 1} ,
a6f6192b
JCD
1560 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1561 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
aec72e0a 1562 .id = "Live",
1da177e4 1563 .emu10k1_chip = 1,
2b637da5
LR
1564 .ac97_chip = 1,
1565 .sblive51 = 1} ,
a6f6192b
JCD
1566 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1567 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
2b6b22f3
JCD
1568 .id = "Live",
1569 .emu10k1_chip = 1,
1570 .ac97_chip = 1,
1571 .sblive51 = 1} ,
0ba656d0
JCD
1572 /* Tested by ALSA bug#1680 26th December 2005 */
1573 /* note: It really has SB0220 written on the card. */
1574 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1575 .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1576 .id = "Live",
1577 .emu10k1_chip = 1,
1578 .ac97_chip = 1,
1579 .sblive51 = 1} ,
c6c0b841
LR
1580 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1581 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1582 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1583 .id = "Live",
1584 .emu10k1_chip = 1,
1585 .ac97_chip = 1,
1586 .sblive51 = 1} ,
a8ee7295
GT
1587 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1588 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1589 .id = "Live",
1590 .emu10k1_chip = 1,
1591 .ac97_chip = 1,
1592 .sblive51 = 1} ,
a6f6192b
JCD
1593 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1594 .driver = "EMU10K1", .name = "SB Live 5.1",
2b6b22f3
JCD
1595 .id = "Live",
1596 .emu10k1_chip = 1,
1597 .ac97_chip = 1,
1598 .sblive51 = 1} ,
afe0f1f6 1599 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
a6f6192b 1600 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
f12aa40c 1601 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
2b6b22f3
JCD
1602 .id = "Live",
1603 .emu10k1_chip = 1,
f12aa40c
TI
1604 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1605 * share the same IDs!
1606 */
2b6b22f3 1607 .sblive51 = 1} ,
a6f6192b
JCD
1608 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1609 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
2b6b22f3
JCD
1610 .id = "Live",
1611 .emu10k1_chip = 1,
1612 .ac97_chip = 1,
1613 .sblive51 = 1} ,
a6f6192b
JCD
1614 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1615 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1616 .id = "Live",
1617 .emu10k1_chip = 1,
1618 .ac97_chip = 1} ,
1619 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1620 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
2b6b22f3
JCD
1621 .id = "Live",
1622 .emu10k1_chip = 1,
1623 .ac97_chip = 1,
1624 .sblive51 = 1} ,
1625 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1626 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1627 .id = "Live",
1628 .emu10k1_chip = 1,
1629 .ac97_chip = 1,
1630 .sblive51 = 1} ,
a6f6192b
JCD
1631 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1632 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
aec72e0a 1633 .id = "Live",
2b637da5
LR
1634 .emu10k1_chip = 1,
1635 .ac97_chip = 1,
1636 .sblive51 = 1} ,
88dc0e5d 1637 /* Tested by James@superbug.co.uk 3rd July 2005 */
a6f6192b
JCD
1638 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1639 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
2b6b22f3
JCD
1640 .id = "Live",
1641 .emu10k1_chip = 1,
1642 .ac97_chip = 1,
1643 .sblive51 = 1} ,
a6f6192b
JCD
1644 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1645 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
2b6b22f3
JCD
1646 .id = "Live",
1647 .emu10k1_chip = 1,
1648 .ac97_chip = 1,
1649 .sblive51 = 1} ,
a6f6192b
JCD
1650 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1651 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
2b6b22f3
JCD
1652 .id = "Live",
1653 .emu10k1_chip = 1,
1654 .ac97_chip = 1,
1655 .sblive51 = 1} ,
a6f6192b
JCD
1656 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1657 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
2b6b22f3
JCD
1658 .id = "Live",
1659 .emu10k1_chip = 1,
1660 .ac97_chip = 1,
1661 .sblive51 = 1} ,
a6f6192b
JCD
1662 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1663 .driver = "EMU10K1", .name = "E-mu APS [4001]",
1664 .id = "APS",
2b6b22f3 1665 .emu10k1_chip = 1,
a6f6192b
JCD
1666 .ecard = 1} ,
1667 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1668 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
2b6b22f3
JCD
1669 .id = "Live",
1670 .emu10k1_chip = 1,
1671 .ac97_chip = 1,
1672 .sblive51 = 1} ,
a6f6192b
JCD
1673 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1674 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
2b6b22f3
JCD
1675 .id = "Live",
1676 .emu10k1_chip = 1,
1677 .ac97_chip = 1,
1678 .sblive51 = 1} ,
1da177e4
LT
1679 {.vendor = 0x1102, .device = 0x0002,
1680 .driver = "EMU10K1", .name = "SB Live [Unknown]",
aec72e0a 1681 .id = "Live",
1da177e4 1682 .emu10k1_chip = 1,
2b637da5
LR
1683 .ac97_chip = 1,
1684 .sblive51 = 1} ,
1da177e4
LT
1685 { } /* terminator */
1686};
1687
eb4698f3 1688int __devinit snd_emu10k1_create(struct snd_card *card,
1da177e4
LT
1689 struct pci_dev * pci,
1690 unsigned short extin_mask,
1691 unsigned short extout_mask,
1692 long max_cache_bytes,
1693 int enable_ir,
e66bc8b2 1694 uint subsystem,
eb4698f3 1695 struct snd_emu10k1 ** remu)
1da177e4 1696{
eb4698f3 1697 struct snd_emu10k1 *emu;
09668b44 1698 int idx, err;
1da177e4 1699 int is_audigy;
09668b44 1700 unsigned int silent_page;
eb4698f3
TI
1701 const struct snd_emu_chip_details *c;
1702 static struct snd_device_ops ops = {
1da177e4
LT
1703 .dev_free = snd_emu10k1_dev_free,
1704 };
1705
1706 *remu = NULL;
1707
1708 /* enable PCI device */
1709 if ((err = pci_enable_device(pci)) < 0)
1710 return err;
1711
e560d8d8 1712 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1da177e4
LT
1713 if (emu == NULL) {
1714 pci_disable_device(pci);
1715 return -ENOMEM;
1716 }
1717 emu->card = card;
1718 spin_lock_init(&emu->reg_lock);
1719 spin_lock_init(&emu->emu_lock);
c94fa4c9
JCD
1720 spin_lock_init(&emu->spi_lock);
1721 spin_lock_init(&emu->i2c_lock);
1da177e4
LT
1722 spin_lock_init(&emu->voice_lock);
1723 spin_lock_init(&emu->synth_lock);
1724 spin_lock_init(&emu->memblk_lock);
62932df8 1725 mutex_init(&emu->fx8010.lock);
1da177e4
LT
1726 INIT_LIST_HEAD(&emu->mapped_link_head);
1727 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1728 emu->pci = pci;
1729 emu->irq = -1;
1730 emu->synth = NULL;
1731 emu->get_synth_voice = NULL;
1732 /* read revision & serial */
44c10138 1733 emu->revision = pci->revision;
1da177e4
LT
1734 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1735 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1da177e4
LT
1736 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1737
1738 for (c = emu_chip_details; c->vendor; c++) {
1739 if (c->vendor == pci->vendor && c->device == pci->device) {
e66bc8b2
JCD
1740 if (subsystem) {
1741 if (c->subsystem && (c->subsystem == subsystem) ) {
1742 break;
1743 } else continue;
1744 } else {
1745 if (c->subsystem && (c->subsystem != emu->serial) )
1746 continue;
1747 if (c->revision && c->revision != emu->revision)
1748 continue;
1749 }
bdaed502 1750 break;
1da177e4
LT
1751 }
1752 }
1753 if (c->vendor == 0) {
1754 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1755 kfree(emu);
1756 pci_disable_device(pci);
1757 return -ENOENT;
1758 }
1759 emu->card_capabilities = c;
e66bc8b2 1760 if (c->subsystem && !subsystem)
1da177e4 1761 snd_printdd("Sound card name=%s\n", c->name);
e66bc8b2
JCD
1762 else if (subsystem)
1763 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1764 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1765 else
1766 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1767 c->name, pci->vendor, pci->device, emu->serial);
1da177e4 1768
85a655d6
TI
1769 if (!*card->id && c->id) {
1770 int i, n = 0;
aec72e0a 1771 strlcpy(card->id, c->id, sizeof(card->id));
85a655d6
TI
1772 for (;;) {
1773 for (i = 0; i < snd_ecards_limit; i++) {
1774 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1775 break;
1776 }
1777 if (i >= snd_ecards_limit)
1778 break;
1779 n++;
1780 if (n >= SNDRV_CARDS)
1781 break;
1782 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1783 }
1784 }
aec72e0a 1785
1da177e4
LT
1786 is_audigy = emu->audigy = c->emu10k2_chip;
1787
1788 /* set the DMA transfer mask */
1789 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1790 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1791 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1792 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1793 kfree(emu);
1794 pci_disable_device(pci);
1795 return -ENXIO;
1796 }
1797 if (is_audigy)
1798 emu->gpr_base = A_FXGPREGBASE;
1799 else
1800 emu->gpr_base = FXGPREGBASE;
1801
1802 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1803 kfree(emu);
1804 pci_disable_device(pci);
1805 return err;
1806 }
1807 emu->port = pci_resource_start(pci, 0);
1808
437a5a46
TI
1809 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1810 "EMU10K1", emu)) {
09668b44
TI
1811 err = -EBUSY;
1812 goto error;
1da177e4
LT
1813 }
1814 emu->irq = pci->irq;
1815
1816 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1817 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1818 32 * 1024, &emu->ptb_pages) < 0) {
09668b44
TI
1819 err = -ENOMEM;
1820 goto error;
1da177e4
LT
1821 }
1822
36726d9d
JJ
1823 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1824 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1825 sizeof(unsigned long));
1da177e4 1826 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
09668b44
TI
1827 err = -ENOMEM;
1828 goto error;
1da177e4
LT
1829 }
1830
1831 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1832 EMUPAGESIZE, &emu->silent_page) < 0) {
09668b44
TI
1833 err = -ENOMEM;
1834 goto error;
1da177e4
LT
1835 }
1836 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1837 if (emu->memhdr == NULL) {
09668b44
TI
1838 err = -ENOMEM;
1839 goto error;
1da177e4 1840 }
eb4698f3
TI
1841 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1842 sizeof(struct snd_util_memblk);
1da177e4
LT
1843
1844 pci_set_master(pci);
1845
1da177e4
LT
1846 emu->fx8010.fxbus_mask = 0x303f;
1847 if (extin_mask == 0)
1848 extin_mask = 0x3fcf;
1849 if (extout_mask == 0)
1850 extout_mask = 0x7fff;
1851 emu->fx8010.extin_mask = extin_mask;
1852 emu->fx8010.extout_mask = extout_mask;
09668b44 1853 emu->enable_ir = enable_ir;
1da177e4 1854
d9e8a552
JCD
1855 if (emu->card_capabilities->ca_cardbus_chip) {
1856 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1857 goto error;
1858 }
2b637da5 1859 if (emu->card_capabilities->ecard) {
09668b44
TI
1860 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1861 goto error;
190d2c46 1862 } else if (emu->card_capabilities->emu_model) {
9f4bd5dd 1863 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
19b99fba
JCD
1864 snd_emu10k1_free(emu);
1865 return err;
1866 }
1da177e4
LT
1867 } else {
1868 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1869 does not support this, it shouldn't do any harm */
1870 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1871 }
1872
09668b44
TI
1873 /* initialize TRAM setup */
1874 emu->fx8010.itram_size = (16 * 1024)/2;
1875 emu->fx8010.etram_pages.area = NULL;
1876 emu->fx8010.etram_pages.bytes = 0;
1da177e4 1877
09668b44
TI
1878 /*
1879 * Init to 0x02109204 :
1880 * Clock accuracy = 0 (1000ppm)
1881 * Sample Rate = 2 (48kHz)
1882 * Audio Channel = 1 (Left of 2)
1883 * Source Number = 0 (Unspecified)
1884 * Generation Status = 1 (Original for Cat Code 12)
1885 * Cat Code = 12 (Digital Signal Mixer)
1886 * Mode = 0 (Mode 0)
1887 * Emphasis = 0 (None)
1888 * CP = 1 (Copyright unasserted)
1889 * AN = 0 (Audio data)
1890 * P = 0 (Consumer)
1891 */
1892 emu->spdif_bits[0] = emu->spdif_bits[1] =
1893 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1894 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1895 SPCS_GENERATIONSTATUS | 0x00001200 |
1896 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1897
1898 emu->reserved_page = (struct snd_emu10k1_memblk *)
1899 snd_emu10k1_synth_alloc(emu, 4096);
1900 if (emu->reserved_page)
1901 emu->reserved_page->map_locked = 1;
1902
1903 /* Clear silent pages and set up pointers */
1904 memset(emu->silent_page.area, 0, PAGE_SIZE);
1905 silent_page = emu->silent_page.addr << 1;
1906 for (idx = 0; idx < MAXPAGES; idx++)
1907 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1908
1909 /* set up voice indices */
1910 for (idx = 0; idx < NUM_G; idx++) {
1911 emu->voices[idx].emu = emu;
1912 emu->voices[idx].number = idx;
1da177e4
LT
1913 }
1914
09668b44
TI
1915 if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1916 goto error;
1917#ifdef CONFIG_PM
1918 if ((err = alloc_pm_buffer(emu)) < 0)
1919 goto error;
1920#endif
1921
1922 /* Initialize the effect engine */
1923 if ((err = snd_emu10k1_init_efx(emu)) < 0)
1924 goto error;
1925 snd_emu10k1_audio_enable(emu);
1926
1927 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1928 goto error;
1929
adf1b3d2 1930#ifdef CONFIG_PROC_FS
1da177e4 1931 snd_emu10k1_proc_init(emu);
adf1b3d2 1932#endif
1da177e4
LT
1933
1934 snd_card_set_dev(card, &pci->dev);
1935 *remu = emu;
1936 return 0;
09668b44
TI
1937
1938 error:
1939 snd_emu10k1_free(emu);
1940 return err;
1da177e4
LT
1941}
1942
09668b44
TI
1943#ifdef CONFIG_PM
1944static unsigned char saved_regs[] = {
1945 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1946 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1947 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1948 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1949 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1950 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1951 0xff /* end */
1952};
1953static unsigned char saved_regs_audigy[] = {
1954 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1955 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1956 0xff /* end */
1957};
1958
1959static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1960{
1961 int size;
1962
1963 size = ARRAY_SIZE(saved_regs);
1964 if (emu->audigy)
1965 size += ARRAY_SIZE(saved_regs_audigy);
1966 emu->saved_ptr = vmalloc(4 * NUM_G * size);
1967 if (! emu->saved_ptr)
1968 return -ENOMEM;
1969 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1970 return -ENOMEM;
1971 if (emu->card_capabilities->ca0151_chip &&
1972 snd_p16v_alloc_pm_buffer(emu) < 0)
1973 return -ENOMEM;
1974 return 0;
1975}
1976
1977static void free_pm_buffer(struct snd_emu10k1 *emu)
1978{
1979 vfree(emu->saved_ptr);
1980 snd_emu10k1_efx_free_pm_buffer(emu);
1981 if (emu->card_capabilities->ca0151_chip)
1982 snd_p16v_free_pm_buffer(emu);
1983}
1984
1985void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1986{
1987 int i;
1988 unsigned char *reg;
1989 unsigned int *val;
1990
1991 val = emu->saved_ptr;
1992 for (reg = saved_regs; *reg != 0xff; reg++)
1993 for (i = 0; i < NUM_G; i++, val++)
1994 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1995 if (emu->audigy) {
1996 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1997 for (i = 0; i < NUM_G; i++, val++)
1998 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1999 }
2000 if (emu->audigy)
2001 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2002 emu->saved_hcfg = inl(emu->port + HCFG);
2003}
2004
2005void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2006{
d9e8a552
JCD
2007 if (emu->card_capabilities->ca_cardbus_chip)
2008 snd_emu10k1_cardbus_init(emu);
09668b44
TI
2009 if (emu->card_capabilities->ecard)
2010 snd_emu10k1_ecard_init(emu);
190d2c46 2011 else if (emu->card_capabilities->emu_model)
9f4bd5dd 2012 snd_emu10k1_emu1010_init(emu);
09668b44
TI
2013 else
2014 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2015 snd_emu10k1_init(emu, emu->enable_ir, 1);
2016}
2017
2018void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2019{
2020 int i;
2021 unsigned char *reg;
2022 unsigned int *val;
2023
2024 snd_emu10k1_audio_enable(emu);
2025
2026 /* resore for spdif */
2027 if (emu->audigy)
4130d59b
AP
2028 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2029 outl(emu->saved_hcfg, emu->port + HCFG);
09668b44
TI
2030
2031 val = emu->saved_ptr;
2032 for (reg = saved_regs; *reg != 0xff; reg++)
2033 for (i = 0; i < NUM_G; i++, val++)
2034 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2035 if (emu->audigy) {
2036 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2037 for (i = 0; i < NUM_G; i++, val++)
2038 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2039 }
2040}
2041#endif