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Merge branch 'for-2.6.28' of git://linux-nfs.org/~bfields/linux
[linux-2.6-block.git] / sound / pci / atiixp.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
1da177e4
LT		 22#include <asm/io.h>
23#include <linux/delay.h>
24#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/pci.h>
27#include <linux/slab.h>
28#include <linux/moduleparam.h>
62932df8 29#include <linux/mutex.h>
1da177e4
LT		 30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/info.h>
34#include <sound/ac97_codec.h>
35#include <sound/initval.h>
36
37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38MODULE_DESCRIPTION("ATI IXP AC97 controller");
39MODULE_LICENSE("GPL");
f4446ea0 40MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400/600}}");
1da177e4 41
b7fe4622
CL		 42static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
43static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44static int ac97_clock = 48000;
45static char *ac97_quirk;
46static int spdif_aclink = 1;
14e1d357 47static int ac97_codec = -1;
b7fe4622
CL		 48
49module_param(index, int, 0444);
1da177e4 50MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
b7fe4622 51module_param(id, charp, 0444);
1da177e4 52MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
b7fe4622 53module_param(ac97_clock, int, 0444);
1da177e4 54MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 55module_param(ac97_quirk, charp, 0444);
1da177e4 56MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
14e1d357
DC		 57module_param(ac97_codec, int, 0444);
58MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
b7fe4622 59module_param(spdif_aclink, bool, 0444);
1da177e4
LT		 60MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
61
2b3e584b
TI		 62/* just for backward compatibility */
63static int enable;
698444f3 64module_param(enable, bool, 0444);
2b3e584b 65
1da177e4
LT		 66
67/*
68 */
69
70#define ATI_REG_ISR 0x00 /* interrupt source */
71#define ATI_REG_ISR_IN_XRUN (1U<<0)
72#define ATI_REG_ISR_IN_STATUS (1U<<1)
73#define ATI_REG_ISR_OUT_XRUN (1U<<2)
74#define ATI_REG_ISR_OUT_STATUS (1U<<3)
75#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
76#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
77#define ATI_REG_ISR_PHYS_INTR (1U<<8)
78#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
79#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
80#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
81#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
82#define ATI_REG_ISR_NEW_FRAME (1U<<13)
83
84#define ATI_REG_IER 0x04 /* interrupt enable */
85#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
86#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
87#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
88#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
89#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
90#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
91#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
92#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
93#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
94#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
95#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
96#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
97#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
98
99#define ATI_REG_CMD 0x08 /* command */
100#define ATI_REG_CMD_POWERDOWN (1U<<0)
101#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
102#define ATI_REG_CMD_SEND_EN (1U<<2)
103#define ATI_REG_CMD_STATUS_MEM (1U<<3)
104#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
105#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
106#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
107#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
108#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
109#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
110#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
111#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
112#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
113#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
114#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
115#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
116#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
117#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
118#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
119#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
120#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
121#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
122#define ATI_REG_CMD_PACKED_DIS (1U<<24)
123#define ATI_REG_CMD_BURST_EN (1U<<25)
124#define ATI_REG_CMD_PANIC_EN (1U<<26)
125#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
126#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
127#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
128#define ATI_REG_CMD_AC_SYNC (1U<<30)
129#define ATI_REG_CMD_AC_RESET (1U<<31)
130
131#define ATI_REG_PHYS_OUT_ADDR 0x0c
132#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
133#define ATI_REG_PHYS_OUT_RW (1U<<2)
134#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
135#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
136#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
137
138#define ATI_REG_PHYS_IN_ADDR 0x10
139#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
140#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
141#define ATI_REG_PHYS_IN_DATA_SHIFT 16
142
143#define ATI_REG_SLOTREQ 0x14
144
145#define ATI_REG_COUNTER 0x18
146#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
147#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
148
149#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
150
151#define ATI_REG_IN_DMA_LINKPTR 0x20
152#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
153#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
154#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
155#define ATI_REG_IN_DMA_DT_SIZE 0x30
156
157#define ATI_REG_OUT_DMA_SLOT 0x34
158#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
159#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
160#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
161#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
162
163#define ATI_REG_OUT_DMA_LINKPTR 0x38
164#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
165#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
166#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
167#define ATI_REG_OUT_DMA_DT_SIZE 0x48
168
169#define ATI_REG_SPDF_CMD 0x4c
170#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
171#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
172#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
173
174#define ATI_REG_SPDF_DMA_LINKPTR 0x50
175#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
176#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
177#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
178#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
179
180#define ATI_REG_MODEM_MIRROR 0x7c
181#define ATI_REG_AUDIO_MIRROR 0x80
182
183#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
184#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
185
186#define ATI_REG_FIFO_FLUSH 0x88
187#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
188#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
189
190/* LINKPTR */
191#define ATI_REG_LINKPTR_EN (1U<<0)
192
193/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
194#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
195#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
196#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
197#define ATI_REG_DMA_STATE (7U<<26)
198
199
200#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
201
202
74ee4ff1 203struct atiixp;
1da177e4
LT		 204
205/*
206 * DMA packate descriptor
207 */
208
74ee4ff1 209struct atiixp_dma_desc {
1da177e4
LT		 210 u32 addr; /* DMA buffer address */
211 u16 status; /* status bits */
212 u16 size; /* size of the packet in dwords */
213 u32 next; /* address of the next packet descriptor */
74ee4ff1 214};
1da177e4
LT		 215
216/*
217 * stream enum
218 */
219enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
220enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
221enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
222
223#define NUM_ATI_CODECS 3
224
225
226/*
227 * constants and callbacks for each DMA type
228 */
74ee4ff1 229struct atiixp_dma_ops {
1da177e4
LT		 230 int type; /* ATI_DMA_XXX */
231 unsigned int llp_offset; /* LINKPTR offset */
232 unsigned int dt_cur; /* DT_CUR offset */
74ee4ff1
TI		 233 /* called from open callback */
234 void (*enable_dma)(struct atiixp *chip, int on);
235 /* called from trigger (START/STOP) */
236 void (*enable_transfer)(struct atiixp *chip, int on);
237 /* called from trigger (STOP only) */
238 void (*flush_dma)(struct atiixp *chip);
1da177e4
LT		 239};
240
241/*
242 * DMA stream
243 */
74ee4ff1
TI		 244struct atiixp_dma {
245 const struct atiixp_dma_ops *ops;
1da177e4 246 struct snd_dma_buffer desc_buf;
74ee4ff1 247 struct snd_pcm_substream *substream; /* assigned PCM substream */
1da177e4
LT		 248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
249 unsigned int period_bytes, periods;
250 int opened;
251 int running;
41e4845c 252 int suspended;
1da177e4
LT		 253 int pcm_open_flag;
254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
255 unsigned int saved_curptr;
256};
257
258/*
259 * ATI IXP chip
260 */
74ee4ff1
TI		 261struct atiixp {
262 struct snd_card *card;
1da177e4
LT		 263 struct pci_dev *pci;
264
265 unsigned long addr;
266 void __iomem *remap_addr;
267 int irq;
268
74ee4ff1
TI		 269 struct snd_ac97_bus *ac97_bus;
270 struct snd_ac97 *ac97[NUM_ATI_CODECS];
1da177e4
LT		 271
272 spinlock_t reg_lock;
273
74ee4ff1 274 struct atiixp_dma dmas[NUM_ATI_DMAS];
1da177e4 275 struct ac97_pcm *pcms[NUM_ATI_PCMS];
74ee4ff1 276 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
1da177e4
LT		 277
278 int max_channels; /* max. channels for PCM out */
279
280 unsigned int codec_not_ready_bits; /* for codec detection */
281
282 int spdif_over_aclink; /* passed from the module option */
62932df8 283 struct mutex open_mutex; /* playback open mutex */
1da177e4
LT		 284};
285
286
287/*
288 */
f40b6890 289static struct pci_device_id snd_atiixp_ids[] = {
1da177e4
LT		 290 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
291 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
292 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
f4446ea0 293 { 0x1002, 0x4382, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB600 */
1da177e4
LT		 294 { 0, }
295};
296
297MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
298
f41bea84
TI		 299static struct snd_pci_quirk atiixp_quirks[] __devinitdata = {
300 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
301 { } /* terminator */
14e1d357 302};
1da177e4
LT		 303
304/*
305 * lowlevel functions
306 */
307
308/*
309 * update the bits of the given register.
310 * return 1 if the bits changed.
311 */
74ee4ff1 312static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
1da177e4
LT		 313 unsigned int mask, unsigned int value)
314{
315 void __iomem *addr = chip->remap_addr + reg;
316 unsigned int data, old_data;
317 old_data = data = readl(addr);
318 data &= ~mask;
319 data |= value;
320 if (old_data == data)
321 return 0;
322 writel(data, addr);
323 return 1;
324}
325
326/*
327 * macros for easy use
328 */
329#define atiixp_write(chip,reg,value) \
330 writel(value, chip->remap_addr + ATI_REG_##reg)
331#define atiixp_read(chip,reg) \
332 readl(chip->remap_addr + ATI_REG_##reg)
333#define atiixp_update(chip,reg,mask,val) \
334 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
335
1da177e4
LT		 336/*
337 * handling DMA packets
338 *
339 * we allocate a linear buffer for the DMA, and split it to each packet.
340 * in a future version, a scatter-gather buffer should be implemented.
341 */
342
343#define ATI_DESC_LIST_SIZE \
74ee4ff1 344 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
1da177e4
LT		 345
346/*
347 * build packets ring for the given buffer size.
348 *
349 * IXP handles the buffer descriptors, which are connected as a linked
350 * list. although we can change the list dynamically, in this version,
351 * a static RING of buffer descriptors is used.
352 *
353 * the ring is built in this function, and is set up to the hardware.
354 */
74ee4ff1
TI		 355static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
356 struct snd_pcm_substream *substream,
357 unsigned int periods,
358 unsigned int period_bytes)
1da177e4
LT		 359{
360 unsigned int i;
361 u32 addr, desc_addr;
362 unsigned long flags;
363
364 if (periods > ATI_MAX_DESCRIPTORS)
365 return -ENOMEM;
366
367 if (dma->desc_buf.area == NULL) {
74ee4ff1
TI		 368 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
369 snd_dma_pci_data(chip->pci),
370 ATI_DESC_LIST_SIZE,
371 &dma->desc_buf) < 0)
1da177e4
LT		 372 return -ENOMEM;
373 dma->period_bytes = dma->periods = 0; /* clear */
374 }
375
376 if (dma->periods == periods && dma->period_bytes == period_bytes)
377 return 0;
378
379 /* reset DMA before changing the descriptor table */
380 spin_lock_irqsave(&chip->reg_lock, flags);
381 writel(0, chip->remap_addr + dma->ops->llp_offset);
382 dma->ops->enable_dma(chip, 0);
383 dma->ops->enable_dma(chip, 1);
384 spin_unlock_irqrestore(&chip->reg_lock, flags);
385
386 /* fill the entries */
387 addr = (u32)substream->runtime->dma_addr;
388 desc_addr = (u32)dma->desc_buf.addr;
389 for (i = 0; i < periods; i++) {
74ee4ff1
TI		 390 struct atiixp_dma_desc *desc;
391 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
1da177e4
LT		 392 desc->addr = cpu_to_le32(addr);
393 desc->status = 0;
394 desc->size = period_bytes >> 2; /* in dwords */
74ee4ff1 395 desc_addr += sizeof(struct atiixp_dma_desc);
1da177e4
LT		 396 if (i == periods - 1)
397 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
398 else
399 desc->next = cpu_to_le32(desc_addr);
400 addr += period_bytes;
401 }
402
403 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
404 chip->remap_addr + dma->ops->llp_offset);
405
406 dma->period_bytes = period_bytes;
407 dma->periods = periods;
408
409 return 0;
410}
411
412/*
413 * remove the ring buffer and release it if assigned
414 */
74ee4ff1
TI		 415static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
416 struct snd_pcm_substream *substream)
1da177e4
LT		 417{
418 if (dma->desc_buf.area) {
419 writel(0, chip->remap_addr + dma->ops->llp_offset);
420 snd_dma_free_pages(&dma->desc_buf);
421 dma->desc_buf.area = NULL;
422 }
423}
424
425/*
426 * AC97 interface
427 */
74ee4ff1 428static int snd_atiixp_acquire_codec(struct atiixp *chip)
1da177e4
LT		 429{
430 int timeout = 1000;
431
432 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
433 if (! timeout--) {
434 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
435 return -EBUSY;
436 }
437 udelay(1);
438 }
439 return 0;
440}
441
74ee4ff1 442static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
1da177e4
LT		 443{
444 unsigned int data;
445 int timeout;
446
447 if (snd_atiixp_acquire_codec(chip) < 0)
448 return 0xffff;
449 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
450 ATI_REG_PHYS_OUT_ADDR_EN |
451 ATI_REG_PHYS_OUT_RW |
452 codec;
453 atiixp_write(chip, PHYS_OUT_ADDR, data);
454 if (snd_atiixp_acquire_codec(chip) < 0)
455 return 0xffff;
456 timeout = 1000;
457 do {
458 data = atiixp_read(chip, PHYS_IN_ADDR);
459 if (data & ATI_REG_PHYS_IN_READ_FLAG)
460 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
461 udelay(1);
462 } while (--timeout);
463 /* time out may happen during reset */
464 if (reg < 0x7c)
465 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
466 return 0xffff;
467}
468
469
74ee4ff1
TI		 470static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
471 unsigned short reg, unsigned short val)
1da177e4
LT		 472{
473 unsigned int data;
474
475 if (snd_atiixp_acquire_codec(chip) < 0)
476 return;
477 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
478 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
479 ATI_REG_PHYS_OUT_ADDR_EN | codec;
480 atiixp_write(chip, PHYS_OUT_ADDR, data);
481}
482
483
74ee4ff1
TI		 484static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
485 unsigned short reg)
1da177e4 486{
74ee4ff1 487 struct atiixp *chip = ac97->private_data;
1da177e4
LT		 488 return snd_atiixp_codec_read(chip, ac97->num, reg);
489
490}
491
74ee4ff1
TI		 492static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
493 unsigned short val)
1da177e4 494{
74ee4ff1 495 struct atiixp *chip = ac97->private_data;
1da177e4
LT		 496 snd_atiixp_codec_write(chip, ac97->num, reg, val);
497}
498
499/*
500 * reset AC link
501 */
74ee4ff1 502static int snd_atiixp_aclink_reset(struct atiixp *chip)
1da177e4
LT		 503{
504 int timeout;
505
506 /* reset powerdoewn */
507 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
508 udelay(10);
509
510 /* perform a software reset */
511 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
512 atiixp_read(chip, CMD);
513 udelay(10);
514 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
515
516 timeout = 10;
517 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
518 /* do a hard reset */
519 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
520 ATI_REG_CMD_AC_SYNC);
521 atiixp_read(chip, CMD);
74ee4ff1 522 mdelay(1);
1da177e4
LT		 523 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
524 if (--timeout) {
525 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
526 break;
527 }
528 }
529
530 /* deassert RESET and assert SYNC to make sure */
531 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
532 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
533
534 return 0;
535}
536
537#ifdef CONFIG_PM
74ee4ff1 538static int snd_atiixp_aclink_down(struct atiixp *chip)
1da177e4
LT		 539{
540 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
541 // return -EBUSY;
542 atiixp_update(chip, CMD,
543 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
544 ATI_REG_CMD_POWERDOWN);
545 return 0;
546}
547#endif
548
549/*
550 * auto-detection of codecs
551 *
552 * the IXP chip can generate interrupts for the non-existing codecs.
553 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
554 * even if all three codecs are connected.
555 */
556
557#define ALL_CODEC_NOT_READY \
558 (ATI_REG_ISR_CODEC0_NOT_READY |\
559 ATI_REG_ISR_CODEC1_NOT_READY |\
560 ATI_REG_ISR_CODEC2_NOT_READY)
561#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
562
32a41b02 563static int __devinit ac97_probing_bugs(struct pci_dev *pci)
14e1d357 564{
f41bea84
TI		 565 const struct snd_pci_quirk *q;
566
567 q = snd_pci_quirk_lookup(pci, atiixp_quirks);
568 if (q) {
569 snd_printdd(KERN_INFO "Atiixp quirk for %s. "
570 "Forcing codec %d\n", q->name, q->value);
571 return q->value;
14e1d357
DC		 572 }
573 /* this hardware doesn't need workarounds. Probe for codec */
574 return -1;
575}
576
32a41b02 577static int __devinit snd_atiixp_codec_detect(struct atiixp *chip)
1da177e4
LT		 578{
579 int timeout;
580
581 chip->codec_not_ready_bits = 0;
14e1d357
DC		 582 if (ac97_codec == -1)
583 ac97_codec = ac97_probing_bugs(chip->pci);
584 if (ac97_codec >= 0) {
585 chip->codec_not_ready_bits |=
586 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
587 return 0;
588 }
589
1da177e4
LT		 590 atiixp_write(chip, IER, CODEC_CHECK_BITS);
591 /* wait for the interrupts */
bfdcbace 592 timeout = 50;
1da177e4 593 while (timeout-- > 0) {
74ee4ff1 594 mdelay(1);
1da177e4
LT		 595 if (chip->codec_not_ready_bits)
596 break;
597 }
598 atiixp_write(chip, IER, 0); /* disable irqs */
599
600 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
601 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
602 return -ENXIO;
603 }
604 return 0;
605}
606
607
608/*
609 * enable DMA and irqs
610 */
74ee4ff1 611static int snd_atiixp_chip_start(struct atiixp *chip)
1da177e4
LT		 612{
613 unsigned int reg;
614
615 /* set up spdif, enable burst mode */
616 reg = atiixp_read(chip, CMD);
617 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
618 reg |= ATI_REG_CMD_BURST_EN;
619 atiixp_write(chip, CMD, reg);
620
621 reg = atiixp_read(chip, SPDF_CMD);
622 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
623 atiixp_write(chip, SPDF_CMD, reg);
624
625 /* clear all interrupt source */
626 atiixp_write(chip, ISR, 0xffffffff);
627 /* enable irqs */
628 atiixp_write(chip, IER,
629 ATI_REG_IER_IO_STATUS_EN |
630 ATI_REG_IER_IN_XRUN_EN |
631 ATI_REG_IER_OUT_XRUN_EN |
632 ATI_REG_IER_SPDF_XRUN_EN |
633 ATI_REG_IER_SPDF_STATUS_EN);
634 return 0;
635}
636
637
638/*
639 * disable DMA and IRQs
640 */
74ee4ff1 641static int snd_atiixp_chip_stop(struct atiixp *chip)
1da177e4
LT		 642{
643 /* clear interrupt source */
644 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
645 /* disable irqs */
646 atiixp_write(chip, IER, 0);
647 return 0;
648}
649
650
651/*
652 * PCM section
653 */
654
655/*
656 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
657 * position. when SG-buffer is implemented, the offset must be calculated
658 * correctly...
659 */
74ee4ff1 660static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 661{
74ee4ff1
TI		 662 struct atiixp *chip = snd_pcm_substream_chip(substream);
663 struct snd_pcm_runtime *runtime = substream->runtime;
664 struct atiixp_dma *dma = runtime->private_data;
1da177e4
LT		 665 unsigned int curptr;
666 int timeout = 1000;
667
668 while (timeout--) {
669 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
670 if (curptr < dma->buf_addr)
671 continue;
672 curptr -= dma->buf_addr;
673 if (curptr >= dma->buf_bytes)
674 continue;
675 return bytes_to_frames(runtime, curptr);
676 }
677 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
678 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
679 return 0;
680}
681
682/*
683 * XRUN detected, and stop the PCM substream
684 */
74ee4ff1 685static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
1da177e4
LT		 686{
687 if (! dma->substream || ! dma->running)
688 return;
689 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
690 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
691}
692
693/*
694 * the period ack. update the substream.
695 */
74ee4ff1 696static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
1da177e4
LT		 697{
698 if (! dma->substream || ! dma->running)
699 return;
700 snd_pcm_period_elapsed(dma->substream);
701}
702
703/* set BUS_BUSY interrupt bit if any DMA is running */
704/* call with spinlock held */
74ee4ff1 705static void snd_atiixp_check_bus_busy(struct atiixp *chip)
1da177e4
LT		 706{
707 unsigned int bus_busy;
708 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
709 ATI_REG_CMD_RECEIVE_EN |
710 ATI_REG_CMD_SPDF_OUT_EN))
711 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
712 else
713 bus_busy = 0;
714 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
715}
716
717/* common trigger callback
718 * calling the lowlevel callbacks in it
719 */
74ee4ff1 720static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 721{
74ee4ff1
TI		 722 struct atiixp *chip = snd_pcm_substream_chip(substream);
723 struct atiixp_dma *dma = substream->runtime->private_data;
1da177e4
LT		 724 int err = 0;
725
da3cec35
TI		 726 if (snd_BUG_ON(!dma->ops->enable_transfer ||
727 !dma->ops->flush_dma))
728 return -EINVAL;
1da177e4
LT		 729
730 spin_lock(&chip->reg_lock);
731 switch (cmd) {
732 case SNDRV_PCM_TRIGGER_START:
41e4845c
JK		 733 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
734 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 735 dma->ops->enable_transfer(chip, 1);
736 dma->running = 1;
41e4845c 737 dma->suspended = 0;
1da177e4
LT		 738 break;
739 case SNDRV_PCM_TRIGGER_STOP:
41e4845c
JK		 740 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
741 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 742 dma->ops->enable_transfer(chip, 0);
743 dma->running = 0;
41e4845c 744 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
1da177e4
LT		 745 break;
746 default:
747 err = -EINVAL;
748 break;
749 }
750 if (! err) {
751 snd_atiixp_check_bus_busy(chip);
752 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
753 dma->ops->flush_dma(chip);
754 snd_atiixp_check_bus_busy(chip);
755 }
756 }
757 spin_unlock(&chip->reg_lock);
758 return err;
759}
760
761
762/*
763 * lowlevel callbacks for each DMA type
764 *
765 * every callback is supposed to be called in chip->reg_lock spinlock
766 */
767
768/* flush FIFO of analog OUT DMA */
74ee4ff1 769static void atiixp_out_flush_dma(struct atiixp *chip)
1da177e4
LT		 770{
771 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
772}
773
774/* enable/disable analog OUT DMA */
74ee4ff1 775static void atiixp_out_enable_dma(struct atiixp *chip, int on)
1da177e4
LT		 776{
777 unsigned int data;
778 data = atiixp_read(chip, CMD);
779 if (on) {
780 if (data & ATI_REG_CMD_OUT_DMA_EN)
781 return;
782 atiixp_out_flush_dma(chip);
783 data |= ATI_REG_CMD_OUT_DMA_EN;
784 } else
785 data &= ~ATI_REG_CMD_OUT_DMA_EN;
786 atiixp_write(chip, CMD, data);
787}
788
789/* start/stop transfer over OUT DMA */
74ee4ff1 790static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
1da177e4
LT		 791{
792 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
793 on ? ATI_REG_CMD_SEND_EN : 0);
794}
795
796/* enable/disable analog IN DMA */
74ee4ff1 797static void atiixp_in_enable_dma(struct atiixp *chip, int on)
1da177e4
LT		 798{
799 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
800 on ? ATI_REG_CMD_IN_DMA_EN : 0);
801}
802
803/* start/stop analog IN DMA */
74ee4ff1 804static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
1da177e4
LT		 805{
806 if (on) {
807 unsigned int data = atiixp_read(chip, CMD);
808 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
809 data |= ATI_REG_CMD_RECEIVE_EN;
810#if 0 /* FIXME: this causes the endless loop */
811 /* wait until slot 3/4 are finished */
812 while ((atiixp_read(chip, COUNTER) &
813 ATI_REG_COUNTER_SLOT) != 5)
814 ;
815#endif
816 atiixp_write(chip, CMD, data);
817 }
818 } else
819 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
820}
821
822/* flush FIFO of analog IN DMA */
74ee4ff1 823static void atiixp_in_flush_dma(struct atiixp *chip)
1da177e4
LT		 824{
825 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
826}
827
828/* enable/disable SPDIF OUT DMA */
74ee4ff1 829static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
1da177e4
LT		 830{
831 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
832 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
833}
834
835/* start/stop SPDIF OUT DMA */
74ee4ff1 836static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
1da177e4
LT		 837{
838 unsigned int data;
839 data = atiixp_read(chip, CMD);
840 if (on)
841 data |= ATI_REG_CMD_SPDF_OUT_EN;
842 else
843 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
844 atiixp_write(chip, CMD, data);
845}
846
847/* flush FIFO of SPDIF OUT DMA */
74ee4ff1 848static void atiixp_spdif_flush_dma(struct atiixp *chip)
1da177e4
LT		 849{
850 int timeout;
851
852 /* DMA off, transfer on */
853 atiixp_spdif_enable_dma(chip, 0);
854 atiixp_spdif_enable_transfer(chip, 1);
855
856 timeout = 100;
857 do {
858 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
859 break;
860 udelay(1);
861 } while (timeout-- > 0);
862
863 atiixp_spdif_enable_transfer(chip, 0);
864}
865
866/* set up slots and formats for SPDIF OUT */
74ee4ff1 867static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
1da177e4 868{
74ee4ff1 869 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 870
871 spin_lock_irq(&chip->reg_lock);
872 if (chip->spdif_over_aclink) {
873 unsigned int data;
874 /* enable slots 10/11 */
875 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
876 ATI_REG_CMD_SPDF_CONFIG_01);
877 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
878 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
879 ATI_REG_OUT_DMA_SLOT_BIT(11);
880 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
881 atiixp_write(chip, OUT_DMA_SLOT, data);
882 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
883 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
884 ATI_REG_CMD_INTERLEAVE_OUT : 0);
885 } else {
886 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
887 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
888 }
889 spin_unlock_irq(&chip->reg_lock);
890 return 0;
891}
892
893/* set up slots and formats for analog OUT */
74ee4ff1 894static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 895{
74ee4ff1 896 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 897 unsigned int data;
898
899 spin_lock_irq(&chip->reg_lock);
900 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
901 switch (substream->runtime->channels) {
902 case 8:
903 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
904 ATI_REG_OUT_DMA_SLOT_BIT(11);
905 /* fallthru */
906 case 6:
907 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
908 ATI_REG_OUT_DMA_SLOT_BIT(8);
909 /* fallthru */
910 case 4:
911 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
912 ATI_REG_OUT_DMA_SLOT_BIT(9);
913 /* fallthru */
914 default:
915 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
916 ATI_REG_OUT_DMA_SLOT_BIT(4);
917 break;
918 }
919
920 /* set output threshold */
921 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
922 atiixp_write(chip, OUT_DMA_SLOT, data);
923
924 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
925 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
926 ATI_REG_CMD_INTERLEAVE_OUT : 0);
927
928 /*
929 * enable 6 channel re-ordering bit if needed
930 */
931 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
932 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
933
934 spin_unlock_irq(&chip->reg_lock);
935 return 0;
936}
937
938/* set up slots and formats for analog IN */
74ee4ff1 939static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 940{
74ee4ff1 941 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 942
943 spin_lock_irq(&chip->reg_lock);
944 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
945 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
946 ATI_REG_CMD_INTERLEAVE_IN : 0);
947 spin_unlock_irq(&chip->reg_lock);
948 return 0;
949}
950
951/*
952 * hw_params - allocate the buffer and set up buffer descriptors
953 */
74ee4ff1
TI		 954static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
955 struct snd_pcm_hw_params *hw_params)
1da177e4 956{
74ee4ff1
TI		 957 struct atiixp *chip = snd_pcm_substream_chip(substream);
958 struct atiixp_dma *dma = substream->runtime->private_data;
1da177e4
LT		 959 int err;
960
961 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
962 if (err < 0)
963 return err;
964 dma->buf_addr = substream->runtime->dma_addr;
965 dma->buf_bytes = params_buffer_bytes(hw_params);
966
967 err = atiixp_build_dma_packets(chip, dma, substream,
968 params_periods(hw_params),
969 params_period_bytes(hw_params));
970 if (err < 0)
971 return err;
972
973 if (dma->ac97_pcm_type >= 0) {
974 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
975 /* PCM is bound to AC97 codec(s)
976 * set up the AC97 codecs
977 */
978 if (dma->pcm_open_flag) {
979 snd_ac97_pcm_close(pcm);
980 dma->pcm_open_flag = 0;
981 }
982 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
983 params_channels(hw_params),
984 pcm->r[0].slots);
985 if (err >= 0)
986 dma->pcm_open_flag = 1;
987 }
988
989 return err;
990}
991
74ee4ff1 992static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 993{
74ee4ff1
TI		 994 struct atiixp *chip = snd_pcm_substream_chip(substream);
995 struct atiixp_dma *dma = substream->runtime->private_data;
1da177e4
LT		 996
997 if (dma->pcm_open_flag) {
998 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
999 snd_ac97_pcm_close(pcm);
1000 dma->pcm_open_flag = 0;
1001 }
1002 atiixp_clear_dma_packets(chip, dma, substream);
1003 snd_pcm_lib_free_pages(substream);
1004 return 0;
1005}
1006
1007
1008/*
1009 * pcm hardware definition, identical for all DMA types
1010 */
74ee4ff1 1011static struct snd_pcm_hardware snd_atiixp_pcm_hw =
1da177e4
LT		 1012{
1013 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1014 SNDRV_PCM_INFO_BLOCK_TRANSFER |
41e4845c 1015 SNDRV_PCM_INFO_PAUSE |
1da177e4
LT		 1016 SNDRV_PCM_INFO_RESUME |
1017 SNDRV_PCM_INFO_MMAP_VALID),
1018 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1019 .rates = SNDRV_PCM_RATE_48000,
1020 .rate_min = 48000,
1021 .rate_max = 48000,
1022 .channels_min = 2,
1023 .channels_max = 2,
1024 .buffer_bytes_max = 256 * 1024,
1025 .period_bytes_min = 32,
1026 .period_bytes_max = 128 * 1024,
1027 .periods_min = 2,
1028 .periods_max = ATI_MAX_DESCRIPTORS,
1029};
1030
74ee4ff1
TI		 1031static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1032 struct atiixp_dma *dma, int pcm_type)
1da177e4 1033{
74ee4ff1
TI		 1034 struct atiixp *chip = snd_pcm_substream_chip(substream);
1035 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1036 int err;
1037
da3cec35
TI		 1038 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1039 return -EINVAL;
1da177e4
LT		 1040
1041 if (dma->opened)
1042 return -EBUSY;
1043 dma->substream = substream;
1044 runtime->hw = snd_atiixp_pcm_hw;
1045 dma->ac97_pcm_type = pcm_type;
1046 if (pcm_type >= 0) {
1047 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1048 snd_pcm_limit_hw_rates(runtime);
1049 } else {
1050 /* direct SPDIF */
1051 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1052 }
1053 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1054 return err;
1055 runtime->private_data = dma;
1056
1057 /* enable DMA bits */
1058 spin_lock_irq(&chip->reg_lock);
1059 dma->ops->enable_dma(chip, 1);
1060 spin_unlock_irq(&chip->reg_lock);
1061 dma->opened = 1;
1062
1063 return 0;
1064}
1065
74ee4ff1
TI		 1066static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1067 struct atiixp_dma *dma)
1da177e4 1068{
74ee4ff1 1069 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4 1070 /* disable DMA bits */
da3cec35
TI		 1071 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1072 return -EINVAL;
1da177e4
LT		 1073 spin_lock_irq(&chip->reg_lock);
1074 dma->ops->enable_dma(chip, 0);
1075 spin_unlock_irq(&chip->reg_lock);
1076 dma->substream = NULL;
1077 dma->opened = 0;
1078 return 0;
1079}
1080
1081/*
1082 */
74ee4ff1 1083static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1da177e4 1084{
74ee4ff1 1085 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1086 int err;
1087
62932df8 1088 mutex_lock(&chip->open_mutex);
1da177e4 1089 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
62932df8 1090 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 1091 if (err < 0)
1092 return err;
1093 substream->runtime->hw.channels_max = chip->max_channels;
1094 if (chip->max_channels > 2)
1095 /* channels must be even */
1096 snd_pcm_hw_constraint_step(substream->runtime, 0,
1097 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1098 return 0;
1099}
1100
74ee4ff1 1101static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1da177e4 1102{
74ee4ff1 1103 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4 1104 int err;
62932df8 1105 mutex_lock(&chip->open_mutex);
1da177e4 1106 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
62932df8 1107 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 1108 return err;
1109}
1110
74ee4ff1 1111static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1da177e4 1112{
74ee4ff1 1113 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1114 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1115}
1116
74ee4ff1 1117static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1da177e4 1118{
74ee4ff1 1119 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1120 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1121}
1122
74ee4ff1 1123static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1da177e4 1124{
74ee4ff1 1125 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4 1126 int err;
62932df8 1127 mutex_lock(&chip->open_mutex);
1da177e4
LT		 1128 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1129 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1130 else
1131 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
62932df8 1132 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 1133 return err;
1134}
1135
74ee4ff1 1136static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1137{
74ee4ff1 1138 struct atiixp *chip = snd_pcm_substream_chip(substream);
1da177e4 1139 int err;
62932df8 1140 mutex_lock(&chip->open_mutex);
1da177e4
LT		 1141 if (chip->spdif_over_aclink)
1142 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1143 else
1144 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
62932df8 1145 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 1146 return err;
1147}
1148
1149/* AC97 playback */
74ee4ff1 1150static struct snd_pcm_ops snd_atiixp_playback_ops = {
1da177e4
LT		 1151 .open = snd_atiixp_playback_open,
1152 .close = snd_atiixp_playback_close,
1153 .ioctl = snd_pcm_lib_ioctl,
1154 .hw_params = snd_atiixp_pcm_hw_params,
1155 .hw_free = snd_atiixp_pcm_hw_free,
1156 .prepare = snd_atiixp_playback_prepare,
1157 .trigger = snd_atiixp_pcm_trigger,
1158 .pointer = snd_atiixp_pcm_pointer,
1159};
1160
1161/* AC97 capture */
74ee4ff1 1162static struct snd_pcm_ops snd_atiixp_capture_ops = {
1da177e4
LT		 1163 .open = snd_atiixp_capture_open,
1164 .close = snd_atiixp_capture_close,
1165 .ioctl = snd_pcm_lib_ioctl,
1166 .hw_params = snd_atiixp_pcm_hw_params,
1167 .hw_free = snd_atiixp_pcm_hw_free,
1168 .prepare = snd_atiixp_capture_prepare,
1169 .trigger = snd_atiixp_pcm_trigger,
1170 .pointer = snd_atiixp_pcm_pointer,
1171};
1172
1173/* SPDIF playback */
74ee4ff1 1174static struct snd_pcm_ops snd_atiixp_spdif_ops = {
1da177e4
LT		 1175 .open = snd_atiixp_spdif_open,
1176 .close = snd_atiixp_spdif_close,
1177 .ioctl = snd_pcm_lib_ioctl,
1178 .hw_params = snd_atiixp_pcm_hw_params,
1179 .hw_free = snd_atiixp_pcm_hw_free,
1180 .prepare = snd_atiixp_spdif_prepare,
1181 .trigger = snd_atiixp_pcm_trigger,
1182 .pointer = snd_atiixp_pcm_pointer,
1183};
1184
1185static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1186 /* front PCM */
1187 {
1188 .exclusive = 1,
1189 .r = { {
1190 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1191 (1 << AC97_SLOT_PCM_RIGHT) |
1192 (1 << AC97_SLOT_PCM_CENTER) |
1193 (1 << AC97_SLOT_PCM_SLEFT) |
1194 (1 << AC97_SLOT_PCM_SRIGHT) |
1195 (1 << AC97_SLOT_LFE)
1196 }
1197 }
1198 },
1199 /* PCM IN #1 */
1200 {
1201 .stream = 1,
1202 .exclusive = 1,
1203 .r = { {
1204 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1205 (1 << AC97_SLOT_PCM_RIGHT)
1206 }
1207 }
1208 },
1209 /* S/PDIF OUT (optional) */
1210 {
1211 .exclusive = 1,
1212 .spdif = 1,
1213 .r = { {
1214 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1215 (1 << AC97_SLOT_SPDIF_RIGHT2)
1216 }
1217 }
1218 },
1219};
1220
74ee4ff1 1221static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1da177e4
LT		 1222 .type = ATI_DMA_PLAYBACK,
1223 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1224 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1225 .enable_dma = atiixp_out_enable_dma,
1226 .enable_transfer = atiixp_out_enable_transfer,
1227 .flush_dma = atiixp_out_flush_dma,
1228};
1229
74ee4ff1 1230static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1da177e4
LT		 1231 .type = ATI_DMA_CAPTURE,
1232 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1233 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1234 .enable_dma = atiixp_in_enable_dma,
1235 .enable_transfer = atiixp_in_enable_transfer,
1236 .flush_dma = atiixp_in_flush_dma,
1237};
1238
74ee4ff1 1239static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1da177e4
LT		 1240 .type = ATI_DMA_SPDIF,
1241 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1242 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1243 .enable_dma = atiixp_spdif_enable_dma,
1244 .enable_transfer = atiixp_spdif_enable_transfer,
1245 .flush_dma = atiixp_spdif_flush_dma,
1246};
1247
1248
74ee4ff1 1249static int __devinit snd_atiixp_pcm_new(struct atiixp *chip)
1da177e4 1250{
74ee4ff1
TI		 1251 struct snd_pcm *pcm;
1252 struct snd_ac97_bus *pbus = chip->ac97_bus;
1da177e4
LT		 1253 int err, i, num_pcms;
1254
1255 /* initialize constants */
1256 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1257 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1258 if (! chip->spdif_over_aclink)
1259 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1260
1261 /* assign AC97 pcm */
1262 if (chip->spdif_over_aclink)
1263 num_pcms = 3;
1264 else
1265 num_pcms = 2;
1266 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1267 if (err < 0)
1268 return err;
1269 for (i = 0; i < num_pcms; i++)
1270 chip->pcms[i] = &pbus->pcms[i];
1271
1272 chip->max_channels = 2;
1273 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1274 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1275 chip->max_channels = 6;
1276 else
1277 chip->max_channels = 4;
1278 }
1279
1280 /* PCM #0: analog I/O */
74ee4ff1
TI		 1281 err = snd_pcm_new(chip->card, "ATI IXP AC97",
1282 ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1da177e4
LT		 1283 if (err < 0)
1284 return err;
1285 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1286 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1287 pcm->private_data = chip;
1288 strcpy(pcm->name, "ATI IXP AC97");
1289 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1290
1291 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
74ee4ff1
TI		 1292 snd_dma_pci_data(chip->pci),
1293 64*1024, 128*1024);
1da177e4
LT		 1294
1295 /* no SPDIF support on codec? */
1296 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1297 return 0;
1298
1299 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1300 if (chip->pcms[ATI_PCM_SPDIF])
1301 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1302
1303 /* PCM #1: spdif playback */
74ee4ff1
TI		 1304 err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1305 ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1da177e4
LT		 1306 if (err < 0)
1307 return err;
1308 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1309 pcm->private_data = chip;
1310 if (chip->spdif_over_aclink)
1311 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1312 else
1313 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1314 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1315
1316 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
74ee4ff1
TI		 1317 snd_dma_pci_data(chip->pci),
1318 64*1024, 128*1024);
1da177e4
LT		 1319
1320 /* pre-select AC97 SPDIF slots 10/11 */
1321 for (i = 0; i < NUM_ATI_CODECS; i++) {
1322 if (chip->ac97[i])
74ee4ff1
TI		 1323 snd_ac97_update_bits(chip->ac97[i],
1324 AC97_EXTENDED_STATUS,
1325 0x03 << 4, 0x03 << 4);
1da177e4
LT		 1326 }
1327
1328 return 0;
1329}
1330
1331
1332
1333/*
1334 * interrupt handler
1335 */
7d12e780 1336static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
1da177e4 1337{
74ee4ff1 1338 struct atiixp *chip = dev_id;
1da177e4
LT		 1339 unsigned int status;
1340
1341 status = atiixp_read(chip, ISR);
1342
1343 if (! status)
1344 return IRQ_NONE;
1345
1346 /* process audio DMA */
1347 if (status & ATI_REG_ISR_OUT_XRUN)
1348 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1349 else if (status & ATI_REG_ISR_OUT_STATUS)
1350 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1351 if (status & ATI_REG_ISR_IN_XRUN)
1352 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1353 else if (status & ATI_REG_ISR_IN_STATUS)
1354 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1355 if (! chip->spdif_over_aclink) {
1356 if (status & ATI_REG_ISR_SPDF_XRUN)
1357 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1358 else if (status & ATI_REG_ISR_SPDF_STATUS)
1359 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1360 }
1361
1362 /* for codec detection */
1363 if (status & CODEC_CHECK_BITS) {
1364 unsigned int detected;
1365 detected = status & CODEC_CHECK_BITS;
1366 spin_lock(&chip->reg_lock);
1367 chip->codec_not_ready_bits |= detected;
1368 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1369 spin_unlock(&chip->reg_lock);
1370 }
1371
1372 /* ack */
1373 atiixp_write(chip, ISR, status);
1374
1375 return IRQ_HANDLED;
1376}
1377
1378
1379/*
1380 * ac97 mixer section
1381 */
1382
1383static struct ac97_quirk ac97_quirks[] __devinitdata = {
1384 {
69ad07cf
JK		 1385 .subvendor = 0x103c,
1386 .subdevice = 0x006b,
1da177e4
LT		 1387 .name = "HP Pavilion ZV5030US",
1388 .type = AC97_TUNE_MUTE_LED
1389 },
a0faefed
MG		 1390 {
1391 .subvendor = 0x103c,
1392 .subdevice = 0x308b,
1393 .name = "HP nx6125",
1394 .type = AC97_TUNE_MUTE_LED
1395 },
1da177e4
LT		 1396 { } /* terminator */
1397};
1398
74ee4ff1
TI		 1399static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1400 const char *quirk_override)
1da177e4 1401{
74ee4ff1
TI		 1402 struct snd_ac97_bus *pbus;
1403 struct snd_ac97_template ac97;
1da177e4
LT		 1404 int i, err;
1405 int codec_count;
74ee4ff1 1406 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1407 .write = snd_atiixp_ac97_write,
1408 .read = snd_atiixp_ac97_read,
1409 };
1410 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1411 ATI_REG_ISR_CODEC0_NOT_READY,
1412 ATI_REG_ISR_CODEC1_NOT_READY,
1413 ATI_REG_ISR_CODEC2_NOT_READY,
1414 };
1415
1416 if (snd_atiixp_codec_detect(chip) < 0)
1417 return -ENXIO;
1418
1419 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1420 return err;
1421 pbus->clock = clock;
1da177e4
LT		 1422 chip->ac97_bus = pbus;
1423
1424 codec_count = 0;
1425 for (i = 0; i < NUM_ATI_CODECS; i++) {
1426 if (chip->codec_not_ready_bits & codec_skip[i])
1427 continue;
1428 memset(&ac97, 0, sizeof(ac97));
1429 ac97.private_data = chip;
1430 ac97.pci = chip->pci;
1431 ac97.num = i;
f1a63a38 1432 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1da177e4
LT		 1433 if (! chip->spdif_over_aclink)
1434 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1435 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1436 chip->ac97[i] = NULL; /* to be sure */
1437 snd_printdd("atiixp: codec %d not available for audio\n", i);
1438 continue;
1439 }
1440 codec_count++;
1441 }
1442
1443 if (! codec_count) {
1444 snd_printk(KERN_ERR "atiixp: no codec available\n");
1445 return -ENODEV;
1446 }
1447
1448 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1449
1450 return 0;
1451}
1452
1453
1454#ifdef CONFIG_PM
1455/*
1456 * power management
1457 */
92304cc7 1458static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 1459{
92304cc7
TI		 1460 struct snd_card *card = pci_get_drvdata(pci);
1461 struct atiixp *chip = card->private_data;
1da177e4
LT		 1462 int i;
1463
92304cc7 1464 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1465 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1466 if (chip->pcmdevs[i]) {
74ee4ff1 1467 struct atiixp_dma *dma = &chip->dmas[i];
1da177e4 1468 if (dma->substream && dma->running)
74ee4ff1
TI		 1469 dma->saved_curptr = readl(chip->remap_addr +
1470 dma->ops->dt_cur);
1da177e4
LT		 1471 snd_pcm_suspend_all(chip->pcmdevs[i]);
1472 }
1473 for (i = 0; i < NUM_ATI_CODECS; i++)
92304cc7 1474 snd_ac97_suspend(chip->ac97[i]);
1da177e4
LT		 1475 snd_atiixp_aclink_down(chip);
1476 snd_atiixp_chip_stop(chip);
1477
92304cc7
TI		 1478 pci_disable_device(pci);
1479 pci_save_state(pci);
30b35399 1480 pci_set_power_state(pci, pci_choose_state(pci, state));
1da177e4
LT		 1481 return 0;
1482}
1483
92304cc7 1484static int snd_atiixp_resume(struct pci_dev *pci)
1da177e4 1485{
92304cc7
TI		 1486 struct snd_card *card = pci_get_drvdata(pci);
1487 struct atiixp *chip = card->private_data;
1da177e4
LT		 1488 int i;
1489
92304cc7 1490 pci_set_power_state(pci, PCI_D0);
30b35399
TI		 1491 pci_restore_state(pci);
1492 if (pci_enable_device(pci) < 0) {
1493 printk(KERN_ERR "atiixp: pci_enable_device failed, "
1494 "disabling device\n");
1495 snd_card_disconnect(card);
1496 return -EIO;
1497 }
92304cc7 1498 pci_set_master(pci);
1da177e4
LT		 1499
1500 snd_atiixp_aclink_reset(chip);
1501 snd_atiixp_chip_start(chip);
1502
1503 for (i = 0; i < NUM_ATI_CODECS; i++)
92304cc7 1504 snd_ac97_resume(chip->ac97[i]);
1da177e4
LT		 1505
1506 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1507 if (chip->pcmdevs[i]) {
74ee4ff1 1508 struct atiixp_dma *dma = &chip->dmas[i];
41e4845c 1509 if (dma->substream && dma->suspended) {
1da177e4 1510 dma->ops->enable_dma(chip, 1);
8e3d759d 1511 dma->substream->ops->prepare(dma->substream);
1da177e4
LT		 1512 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1513 chip->remap_addr + dma->ops->llp_offset);
74ee4ff1
TI		 1514 writel(dma->saved_curptr, chip->remap_addr +
1515 dma->ops->dt_cur);
1da177e4
LT		 1516 }
1517 }
1518
92304cc7 1519 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 1520 return 0;
1521}
1522#endif /* CONFIG_PM */
1523
1524
adf1b3d2 1525#ifdef CONFIG_PROC_FS
1da177e4
LT		 1526/*
1527 * proc interface for register dump
1528 */
1529
74ee4ff1
TI		 1530static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1531 struct snd_info_buffer *buffer)
1da177e4 1532{
74ee4ff1 1533 struct atiixp *chip = entry->private_data;
1da177e4
LT		 1534 int i;
1535
1536 for (i = 0; i < 256; i += 4)
1537 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1538}
1539
74ee4ff1 1540static void __devinit snd_atiixp_proc_init(struct atiixp *chip)
1da177e4 1541{
74ee4ff1 1542 struct snd_info_entry *entry;
1da177e4
LT		 1543
1544 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
bf850204 1545 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read);
1da177e4 1546}
adf1b3d2
TI		 1547#else /* !CONFIG_PROC_FS */
1548#define snd_atiixp_proc_init(chip)
1549#endif
1da177e4
LT		 1550
1551
1552/*
1553 * destructor
1554 */
1555
74ee4ff1 1556static int snd_atiixp_free(struct atiixp *chip)
1da177e4
LT		 1557{
1558 if (chip->irq < 0)
1559 goto __hw_end;
1560 snd_atiixp_chip_stop(chip);
f000fd80 1561
1da177e4
LT		 1562 __hw_end:
1563 if (chip->irq >= 0)
74ee4ff1 1564 free_irq(chip->irq, chip);
1da177e4
LT		 1565 if (chip->remap_addr)
1566 iounmap(chip->remap_addr);
1567 pci_release_regions(chip->pci);
1568 pci_disable_device(chip->pci);
1569 kfree(chip);
1570 return 0;
1571}
1572
74ee4ff1 1573static int snd_atiixp_dev_free(struct snd_device *device)
1da177e4 1574{
74ee4ff1 1575 struct atiixp *chip = device->device_data;
1da177e4
LT		 1576 return snd_atiixp_free(chip);
1577}
1578
1579/*
1580 * constructor for chip instance
1581 */
74ee4ff1 1582static int __devinit snd_atiixp_create(struct snd_card *card,
1da177e4 1583 struct pci_dev *pci,
74ee4ff1 1584 struct atiixp **r_chip)
1da177e4 1585{
74ee4ff1 1586 static struct snd_device_ops ops = {
1da177e4
LT		 1587 .dev_free = snd_atiixp_dev_free,
1588 };
74ee4ff1 1589 struct atiixp *chip;
1da177e4
LT		 1590 int err;
1591
1592 if ((err = pci_enable_device(pci)) < 0)
1593 return err;
1594
e560d8d8 1595 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1596 if (chip == NULL) {
1597 pci_disable_device(pci);
1598 return -ENOMEM;
1599 }
1600
1601 spin_lock_init(&chip->reg_lock);
62932df8 1602 mutex_init(&chip->open_mutex);
1da177e4
LT		 1603 chip->card = card;
1604 chip->pci = pci;
1605 chip->irq = -1;
1606 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1607 pci_disable_device(pci);
1608 kfree(chip);
1609 return err;
1610 }
1611 chip->addr = pci_resource_start(pci, 0);
2f5ad54e 1612 chip->remap_addr = pci_ioremap_bar(pci, 0);
1da177e4
LT		 1613 if (chip->remap_addr == NULL) {
1614 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1615 snd_atiixp_free(chip);
1616 return -EIO;
1617 }
1618
437a5a46 1619 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
74ee4ff1 1620 card->shortname, chip)) {
1da177e4
LT		 1621 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1622 snd_atiixp_free(chip);
1623 return -EBUSY;
1624 }
1625 chip->irq = pci->irq;
1626 pci_set_master(pci);
1627 synchronize_irq(chip->irq);
1628
1629 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1630 snd_atiixp_free(chip);
1631 return err;
1632 }
1633
1634 snd_card_set_dev(card, &pci->dev);
1635
1636 *r_chip = chip;
1637 return 0;
1638}
1639
1640
1641static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1642 const struct pci_device_id *pci_id)
1643{
74ee4ff1
TI		 1644 struct snd_card *card;
1645 struct atiixp *chip;
1da177e4
LT		 1646 int err;
1647
b7fe4622 1648 card = snd_card_new(index, id, THIS_MODULE, 0);
1da177e4
LT		 1649 if (card == NULL)
1650 return -ENOMEM;
1651
b7fe4622 1652 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1da177e4
LT		 1653 strcpy(card->shortname, "ATI IXP");
1654 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1655 goto __error;
92304cc7 1656 card->private_data = chip;
1da177e4
LT		 1657
1658 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1659 goto __error;
1660
b7fe4622 1661 chip->spdif_over_aclink = spdif_aclink;
1da177e4 1662
b7fe4622 1663 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1da177e4
LT		 1664 goto __error;
1665
1666 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1667 goto __error;
1668
1669 snd_atiixp_proc_init(chip);
1670
1671 snd_atiixp_chip_start(chip);
1672
1673 snprintf(card->longname, sizeof(card->longname),
44c10138
AK		 1674 "%s rev %x with %s at %#lx, irq %i", card->shortname,
1675 pci->revision,
1da177e4
LT		 1676 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1677 chip->addr, chip->irq);
1678
1da177e4
LT		 1679 if ((err = snd_card_register(card)) < 0)
1680 goto __error;
1681
1682 pci_set_drvdata(pci, card);
1da177e4
LT		 1683 return 0;
1684
1685 __error:
1686 snd_card_free(card);
1687 return err;
1688}
1689
1690static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1691{
1692 snd_card_free(pci_get_drvdata(pci));
1693 pci_set_drvdata(pci, NULL);
1694}
1695
1696static struct pci_driver driver = {
1697 .name = "ATI IXP AC97 controller",
1698 .id_table = snd_atiixp_ids,
1699 .probe = snd_atiixp_probe,
1700 .remove = __devexit_p(snd_atiixp_remove),
92304cc7
TI		 1701#ifdef CONFIG_PM
1702 .suspend = snd_atiixp_suspend,
1703 .resume = snd_atiixp_resume,
1704#endif
1da177e4
LT		 1705};
1706
1707
1708static int __init alsa_card_atiixp_init(void)
1709{
01d25d46 1710 return pci_register_driver(&driver);
1da177e4
LT		 1711}
1712
1713static void __exit alsa_card_atiixp_exit(void)
1714{
1715 pci_unregister_driver(&driver);
1716}
1717
1718module_init(alsa_card_atiixp_init)
1719module_exit(alsa_card_atiixp_exit)
Linux 6.x block layer and io_uring tree(s)