sunrpc: add sv_maxconn field to svc_serv (try #3)
[linux-2.6-block.git] / lib / swiotlb.c
CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4 23#include <linux/spinlock.h>
8c5df16b 24#include <linux/swiotlb.h>
1da177e4
LT
25#include <linux/string.h>
26#include <linux/types.h>
27#include <linux/ctype.h>
ef9b1893 28#include <linux/highmem.h>
1da177e4
LT
29
30#include <asm/io.h>
1da177e4 31#include <asm/dma.h>
17e5ad6c 32#include <asm/scatterlist.h>
1da177e4
LT
33
34#include <linux/init.h>
35#include <linux/bootmem.h>
a8522509 36#include <linux/iommu-helper.h>
1da177e4
LT
37
38#define OFFSET(val,align) ((unsigned long) \
39 ( (val) & ( (align) - 1)))
40
0b9afede
AW
41#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
42
43/*
44 * Minimum IO TLB size to bother booting with. Systems with mainly
45 * 64bit capable cards will only lightly use the swiotlb. If we can't
46 * allocate a contiguous 1MB, we're probably in trouble anyway.
47 */
48#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
49
de69e0f0
JL
50/*
51 * Enumeration for sync targets
52 */
53enum dma_sync_target {
54 SYNC_FOR_CPU = 0,
55 SYNC_FOR_DEVICE = 1,
56};
57
1da177e4
LT
58int swiotlb_force;
59
60/*
61 * Used to do a quick range check in swiotlb_unmap_single and
62 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
63 * API.
64 */
65static char *io_tlb_start, *io_tlb_end;
66
67/*
68 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
69 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
70 */
71static unsigned long io_tlb_nslabs;
72
73/*
74 * When the IOMMU overflows we return a fallback buffer. This sets the size.
75 */
76static unsigned long io_tlb_overflow = 32*1024;
77
78void *io_tlb_overflow_buffer;
79
80/*
81 * This is a free list describing the number of free entries available from
82 * each index
83 */
84static unsigned int *io_tlb_list;
85static unsigned int io_tlb_index;
86
87/*
88 * We need to save away the original address corresponding to a mapped entry
89 * for the sync operations.
90 */
ef9b1893
JF
91static struct swiotlb_phys_addr {
92 struct page *page;
93 unsigned int offset;
94} *io_tlb_orig_addr;
1da177e4
LT
95
96/*
97 * Protect the above data structures in the map and unmap calls
98 */
99static DEFINE_SPINLOCK(io_tlb_lock);
100
101static int __init
102setup_io_tlb_npages(char *str)
103{
104 if (isdigit(*str)) {
e8579e72 105 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
106 /* avoid tail segment of size < IO_TLB_SEGSIZE */
107 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
108 }
109 if (*str == ',')
110 ++str;
111 if (!strcmp(str, "force"))
112 swiotlb_force = 1;
113 return 1;
114}
115__setup("swiotlb=", setup_io_tlb_npages);
116/* make io_tlb_overflow tunable too? */
117
79ff56eb 118void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
8c5df16b
JF
119{
120 return alloc_bootmem_low_pages(size);
121}
122
123void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
124{
125 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
126}
127
e08e1f7a
IC
128dma_addr_t __weak swiotlb_phys_to_bus(phys_addr_t paddr)
129{
130 return paddr;
131}
132
133phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
134{
135 return baddr;
136}
137
138static dma_addr_t swiotlb_virt_to_bus(volatile void *address)
139{
140 return swiotlb_phys_to_bus(virt_to_phys(address));
141}
142
143static void *swiotlb_bus_to_virt(dma_addr_t address)
144{
145 return phys_to_virt(swiotlb_bus_to_phys(address));
146}
147
b81ea27b
IC
148int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
149{
150 return 0;
151}
152
ef9b1893
JF
153static dma_addr_t swiotlb_sg_to_bus(struct scatterlist *sg)
154{
155 return swiotlb_phys_to_bus(page_to_phys(sg_page(sg)) + sg->offset);
156}
157
2e5b2b86
IC
158static void swiotlb_print_info(unsigned long bytes)
159{
160 phys_addr_t pstart, pend;
161 dma_addr_t bstart, bend;
162
163 pstart = virt_to_phys(io_tlb_start);
164 pend = virt_to_phys(io_tlb_end);
165
166 bstart = swiotlb_phys_to_bus(pstart);
167 bend = swiotlb_phys_to_bus(pend);
168
169 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
170 bytes >> 20, io_tlb_start, io_tlb_end);
171 if (pstart != bstart || pend != bend)
172 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx"
173 " bus %#llx - %#llx\n",
174 (unsigned long long)pstart,
175 (unsigned long long)pend,
176 (unsigned long long)bstart,
177 (unsigned long long)bend);
178 else
179 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
180 (unsigned long long)pstart,
181 (unsigned long long)pend);
182}
183
1da177e4
LT
184/*
185 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 186 * structures for the software IO TLB used to implement the DMA API.
1da177e4 187 */
563aaf06
JB
188void __init
189swiotlb_init_with_default_size(size_t default_size)
1da177e4 190{
563aaf06 191 unsigned long i, bytes;
1da177e4
LT
192
193 if (!io_tlb_nslabs) {
e8579e72 194 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
195 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
196 }
197
563aaf06
JB
198 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
199
1da177e4
LT
200 /*
201 * Get IO TLB memory from the low pages
202 */
8c5df16b 203 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
1da177e4
LT
204 if (!io_tlb_start)
205 panic("Cannot allocate SWIOTLB buffer");
563aaf06 206 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
207
208 /*
209 * Allocate and initialize the free list array. This array is used
210 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
211 * between io_tlb_start and io_tlb_end.
212 */
213 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 214 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
215 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
216 io_tlb_index = 0;
ef9b1893 217 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
1da177e4
LT
218
219 /*
220 * Get the overflow emergency buffer
221 */
222 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
223 if (!io_tlb_overflow_buffer)
224 panic("Cannot allocate SWIOTLB overflow buffer!\n");
225
2e5b2b86 226 swiotlb_print_info(bytes);
1da177e4
LT
227}
228
563aaf06
JB
229void __init
230swiotlb_init(void)
1da177e4 231{
25667d67 232 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
233}
234
0b9afede
AW
235/*
236 * Systems with larger DMA zones (those that don't support ISA) can
237 * initialize the swiotlb later using the slab allocator if needed.
238 * This should be just like above, but with some error catching.
239 */
240int
563aaf06 241swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 242{
563aaf06 243 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
244 unsigned int order;
245
246 if (!io_tlb_nslabs) {
247 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
248 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
249 }
250
251 /*
252 * Get IO TLB memory from the low pages
253 */
563aaf06 254 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 255 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 256 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
257
258 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
8c5df16b 259 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
0b9afede
AW
260 if (io_tlb_start)
261 break;
262 order--;
263 }
264
265 if (!io_tlb_start)
266 goto cleanup1;
267
563aaf06 268 if (order != get_order(bytes)) {
0b9afede
AW
269 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
270 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
271 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 272 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 273 }
563aaf06
JB
274 io_tlb_end = io_tlb_start + bytes;
275 memset(io_tlb_start, 0, bytes);
0b9afede
AW
276
277 /*
278 * Allocate and initialize the free list array. This array is used
279 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
280 * between io_tlb_start and io_tlb_end.
281 */
282 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
283 get_order(io_tlb_nslabs * sizeof(int)));
284 if (!io_tlb_list)
285 goto cleanup2;
286
287 for (i = 0; i < io_tlb_nslabs; i++)
288 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
289 io_tlb_index = 0;
290
ef9b1893
JF
291 io_tlb_orig_addr = (struct swiotlb_phys_addr *)__get_free_pages(GFP_KERNEL,
292 get_order(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr)));
0b9afede
AW
293 if (!io_tlb_orig_addr)
294 goto cleanup3;
295
ef9b1893 296 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
0b9afede
AW
297
298 /*
299 * Get the overflow emergency buffer
300 */
301 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
302 get_order(io_tlb_overflow));
303 if (!io_tlb_overflow_buffer)
304 goto cleanup4;
305
2e5b2b86 306 swiotlb_print_info(bytes);
0b9afede
AW
307
308 return 0;
309
310cleanup4:
25667d67
TL
311 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
312 sizeof(char *)));
0b9afede
AW
313 io_tlb_orig_addr = NULL;
314cleanup3:
25667d67
TL
315 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
316 sizeof(int)));
0b9afede 317 io_tlb_list = NULL;
0b9afede 318cleanup2:
563aaf06 319 io_tlb_end = NULL;
0b9afede
AW
320 free_pages((unsigned long)io_tlb_start, order);
321 io_tlb_start = NULL;
322cleanup1:
323 io_tlb_nslabs = req_nslabs;
324 return -ENOMEM;
325}
326
be6b0267 327static int
2797982e 328address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
1da177e4 329{
07a2c01a 330 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
1da177e4
LT
331}
332
b81ea27b
IC
333static inline int range_needs_mapping(void *ptr, size_t size)
334{
335 return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
336}
337
640aebfe
FT
338static int is_swiotlb_buffer(char *addr)
339{
340 return addr >= io_tlb_start && addr < io_tlb_end;
341}
342
ef9b1893 343static struct swiotlb_phys_addr swiotlb_bus_to_phys_addr(char *dma_addr)
1b548f66 344{
ef9b1893
JF
345 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
346 struct swiotlb_phys_addr buffer = io_tlb_orig_addr[index];
347 buffer.offset += (long)dma_addr & ((1 << IO_TLB_SHIFT) - 1);
348 buffer.page += buffer.offset >> PAGE_SHIFT;
349 buffer.offset &= PAGE_SIZE - 1;
350 return buffer;
351}
352
353static void
354__sync_single(struct swiotlb_phys_addr buffer, char *dma_addr, size_t size, int dir)
355{
356 if (PageHighMem(buffer.page)) {
357 size_t len, bytes;
358 char *dev, *host, *kmp;
359
360 len = size;
361 while (len != 0) {
362 unsigned long flags;
363
364 bytes = len;
365 if ((bytes + buffer.offset) > PAGE_SIZE)
366 bytes = PAGE_SIZE - buffer.offset;
367 local_irq_save(flags); /* protects KM_BOUNCE_READ */
368 kmp = kmap_atomic(buffer.page, KM_BOUNCE_READ);
369 dev = dma_addr + size - len;
370 host = kmp + buffer.offset;
371 if (dir == DMA_FROM_DEVICE)
372 memcpy(host, dev, bytes);
373 else
374 memcpy(dev, host, bytes);
375 kunmap_atomic(kmp, KM_BOUNCE_READ);
376 local_irq_restore(flags);
377 len -= bytes;
378 buffer.page++;
379 buffer.offset = 0;
380 }
381 } else {
382 void *v = page_address(buffer.page) + buffer.offset;
383
384 if (dir == DMA_TO_DEVICE)
385 memcpy(dma_addr, v, size);
386 else
387 memcpy(v, dma_addr, size);
388 }
1b548f66
JF
389}
390
1da177e4
LT
391/*
392 * Allocates bounce buffer and returns its kernel virtual address.
393 */
394static void *
ef9b1893 395map_single(struct device *hwdev, struct swiotlb_phys_addr buffer, size_t size, int dir)
1da177e4
LT
396{
397 unsigned long flags;
398 char *dma_addr;
399 unsigned int nslots, stride, index, wrap;
400 int i;
681cc5cd
FT
401 unsigned long start_dma_addr;
402 unsigned long mask;
403 unsigned long offset_slots;
404 unsigned long max_slots;
ef9b1893 405 struct swiotlb_phys_addr slot_buf;
681cc5cd
FT
406
407 mask = dma_get_seg_boundary(hwdev);
e08e1f7a 408 start_dma_addr = swiotlb_virt_to_bus(io_tlb_start) & mask;
681cc5cd
FT
409
410 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
a5ddde4a
IC
411
412 /*
413 * Carefully handle integer overflow which can occur when mask == ~0UL.
414 */
b15a3891
JB
415 max_slots = mask + 1
416 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
417 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
418
419 /*
420 * For mappings greater than a page, we limit the stride (and
421 * hence alignment) to a page size.
422 */
423 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
424 if (size > PAGE_SIZE)
425 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
426 else
427 stride = 1;
428
34814545 429 BUG_ON(!nslots);
1da177e4
LT
430
431 /*
432 * Find suitable number of IO TLB entries size that will fit this
433 * request and allocate a buffer from that IO TLB pool.
434 */
435 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
436 index = ALIGN(io_tlb_index, stride);
437 if (index >= io_tlb_nslabs)
438 index = 0;
439 wrap = index;
440
441 do {
a8522509
FT
442 while (iommu_is_span_boundary(index, nslots, offset_slots,
443 max_slots)) {
b15a3891
JB
444 index += stride;
445 if (index >= io_tlb_nslabs)
446 index = 0;
a7133a15
AM
447 if (index == wrap)
448 goto not_found;
449 }
450
451 /*
452 * If we find a slot that indicates we have 'nslots' number of
453 * contiguous buffers, we allocate the buffers from that slot
454 * and mark the entries as '0' indicating unavailable.
455 */
456 if (io_tlb_list[index] >= nslots) {
457 int count = 0;
458
459 for (i = index; i < (int) (index + nslots); i++)
460 io_tlb_list[i] = 0;
461 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
462 io_tlb_list[i] = ++count;
463 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 464
a7133a15
AM
465 /*
466 * Update the indices to avoid searching in the next
467 * round.
468 */
469 io_tlb_index = ((index + nslots) < io_tlb_nslabs
470 ? (index + nslots) : 0);
471
472 goto found;
473 }
474 index += stride;
475 if (index >= io_tlb_nslabs)
476 index = 0;
477 } while (index != wrap);
478
479not_found:
480 spin_unlock_irqrestore(&io_tlb_lock, flags);
481 return NULL;
482found:
1da177e4
LT
483 spin_unlock_irqrestore(&io_tlb_lock, flags);
484
485 /*
486 * Save away the mapping from the original address to the DMA address.
487 * This is needed when we sync the memory. Then we sync the buffer if
488 * needed.
489 */
ef9b1893
JF
490 slot_buf = buffer;
491 for (i = 0; i < nslots; i++) {
492 slot_buf.page += slot_buf.offset >> PAGE_SHIFT;
493 slot_buf.offset &= PAGE_SIZE - 1;
494 io_tlb_orig_addr[index+i] = slot_buf;
495 slot_buf.offset += 1 << IO_TLB_SHIFT;
496 }
1da177e4 497 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
1b548f66 498 __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
1da177e4
LT
499
500 return dma_addr;
501}
502
503/*
504 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
505 */
506static void
507unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
508{
509 unsigned long flags;
510 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
511 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
ef9b1893 512 struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
1da177e4
LT
513
514 /*
515 * First, sync the memory before unmapping the entry
516 */
ef9b1893 517 if ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))
1da177e4
LT
518 /*
519 * bounce... copy the data back into the original buffer * and
520 * delete the bounce buffer.
521 */
1b548f66 522 __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
1da177e4
LT
523
524 /*
525 * Return the buffer to the free list by setting the corresponding
526 * entries to indicate the number of contigous entries available.
527 * While returning the entries to the free list, we merge the entries
528 * with slots below and above the pool being returned.
529 */
530 spin_lock_irqsave(&io_tlb_lock, flags);
531 {
532 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
533 io_tlb_list[index + nslots] : 0);
534 /*
535 * Step 1: return the slots to the free list, merging the
536 * slots with superceeding slots
537 */
538 for (i = index + nslots - 1; i >= index; i--)
539 io_tlb_list[i] = ++count;
540 /*
541 * Step 2: merge the returned slots with the preceding slots,
542 * if available (non zero)
543 */
544 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
545 io_tlb_list[i] = ++count;
546 }
547 spin_unlock_irqrestore(&io_tlb_lock, flags);
548}
549
550static void
de69e0f0
JL
551sync_single(struct device *hwdev, char *dma_addr, size_t size,
552 int dir, int target)
1da177e4 553{
ef9b1893 554 struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
df336d1c 555
de69e0f0
JL
556 switch (target) {
557 case SYNC_FOR_CPU:
558 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
1b548f66 559 __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
34814545
ES
560 else
561 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
562 break;
563 case SYNC_FOR_DEVICE:
564 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
1b548f66 565 __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
34814545
ES
566 else
567 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
568 break;
569 default:
1da177e4 570 BUG();
de69e0f0 571 }
1da177e4
LT
572}
573
574void *
575swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 576 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 577{
563aaf06 578 dma_addr_t dev_addr;
1da177e4
LT
579 void *ret;
580 int order = get_order(size);
1e74f300
FT
581 u64 dma_mask = DMA_32BIT_MASK;
582
583 if (hwdev && hwdev->coherent_dma_mask)
584 dma_mask = hwdev->coherent_dma_mask;
1da177e4 585
25667d67 586 ret = (void *)__get_free_pages(flags, order);
e08e1f7a 587 if (ret && !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(ret), size)) {
1da177e4
LT
588 /*
589 * The allocated memory isn't reachable by the device.
590 * Fall back on swiotlb_map_single().
591 */
592 free_pages((unsigned long) ret, order);
593 ret = NULL;
594 }
595 if (!ret) {
596 /*
597 * We are either out of memory or the device can't DMA
598 * to GFP_DMA memory; fall back on
599 * swiotlb_map_single(), which will grab memory from
600 * the lowest available address range.
601 */
ef9b1893
JF
602 struct swiotlb_phys_addr buffer;
603 buffer.page = virt_to_page(NULL);
604 buffer.offset = 0;
605 ret = map_single(hwdev, buffer, size, DMA_FROM_DEVICE);
9dfda12b 606 if (!ret)
1da177e4 607 return NULL;
1da177e4
LT
608 }
609
610 memset(ret, 0, size);
e08e1f7a 611 dev_addr = swiotlb_virt_to_bus(ret);
1da177e4
LT
612
613 /* Confirm address can be DMA'd by device */
1e74f300 614 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
563aaf06 615 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
1e74f300 616 (unsigned long long)dma_mask,
563aaf06 617 (unsigned long long)dev_addr);
a2b89b59
FT
618
619 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
620 unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
621 return NULL;
1da177e4
LT
622 }
623 *dma_handle = dev_addr;
624 return ret;
625}
626
627void
628swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
629 dma_addr_t dma_handle)
630{
aa24886e 631 WARN_ON(irqs_disabled());
640aebfe 632 if (!is_swiotlb_buffer(vaddr))
1da177e4
LT
633 free_pages((unsigned long) vaddr, get_order(size));
634 else
635 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
21f6c4de 636 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
1da177e4
LT
637}
638
639static void
640swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
641{
642 /*
643 * Ran out of IOMMU space for this operation. This is very bad.
644 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 645 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
646 * When the mapping is small enough return a static buffer to limit
647 * the damage, or panic when the transfer is too big.
648 */
563aaf06 649 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
1da177e4
LT
650 "device %s\n", size, dev ? dev->bus_id : "?");
651
652 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
653 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
654 panic("DMA: Memory would be corrupted\n");
655 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
656 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
657 }
658}
659
660/*
661 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 662 * physical address to use is returned.
1da177e4
LT
663 *
664 * Once the device is given the dma address, the device owns this memory until
665 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
666 */
667dma_addr_t
309df0c5
AK
668swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
669 int dir, struct dma_attrs *attrs)
1da177e4 670{
e08e1f7a 671 dma_addr_t dev_addr = swiotlb_virt_to_bus(ptr);
1da177e4 672 void *map;
ef9b1893 673 struct swiotlb_phys_addr buffer;
1da177e4 674
34814545 675 BUG_ON(dir == DMA_NONE);
1da177e4
LT
676 /*
677 * If the pointer passed in happens to be in the device's DMA window,
678 * we can safely return the device addr and not worry about bounce
679 * buffering it.
680 */
b81ea27b
IC
681 if (!address_needs_mapping(hwdev, dev_addr, size) &&
682 !range_needs_mapping(ptr, size))
1da177e4
LT
683 return dev_addr;
684
685 /*
686 * Oh well, have to allocate and map a bounce buffer.
687 */
ef9b1893
JF
688 buffer.page = virt_to_page(ptr);
689 buffer.offset = (unsigned long)ptr & ~PAGE_MASK;
690 map = map_single(hwdev, buffer, size, dir);
1da177e4
LT
691 if (!map) {
692 swiotlb_full(hwdev, size, dir, 1);
693 map = io_tlb_overflow_buffer;
694 }
695
e08e1f7a 696 dev_addr = swiotlb_virt_to_bus(map);
1da177e4
LT
697
698 /*
699 * Ensure that the address returned is DMA'ble
700 */
2797982e 701 if (address_needs_mapping(hwdev, dev_addr, size))
1da177e4
LT
702 panic("map_single: bounce buffer is not DMA'ble");
703
704 return dev_addr;
705}
309df0c5
AK
706EXPORT_SYMBOL(swiotlb_map_single_attrs);
707
708dma_addr_t
709swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
710{
711 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
712}
1da177e4 713
1da177e4
LT
714/*
715 * Unmap a single streaming mode DMA translation. The dma_addr and size must
716 * match what was provided for in a previous swiotlb_map_single call. All
717 * other usages are undefined.
718 *
719 * After this call, reads by the cpu to the buffer are guaranteed to see
720 * whatever the device wrote there.
721 */
722void
309df0c5
AK
723swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
724 size_t size, int dir, struct dma_attrs *attrs)
1da177e4 725{
e08e1f7a 726 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 727
34814545 728 BUG_ON(dir == DMA_NONE);
640aebfe 729 if (is_swiotlb_buffer(dma_addr))
1da177e4
LT
730 unmap_single(hwdev, dma_addr, size, dir);
731 else if (dir == DMA_FROM_DEVICE)
cde14bbf 732 dma_mark_clean(dma_addr, size);
1da177e4 733}
309df0c5 734EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
1da177e4 735
309df0c5
AK
736void
737swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
738 int dir)
739{
740 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
741}
1da177e4
LT
742/*
743 * Make physical memory consistent for a single streaming mode DMA translation
744 * after a transfer.
745 *
746 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
747 * using the cpu, yet do not wish to teardown the dma mapping, you must
748 * call this function before doing so. At the next point you give the dma
1da177e4
LT
749 * address back to the card, you must first perform a
750 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
751 */
be6b0267 752static void
8270f3f1 753swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 754 size_t size, int dir, int target)
1da177e4 755{
e08e1f7a 756 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 757
34814545 758 BUG_ON(dir == DMA_NONE);
640aebfe 759 if (is_swiotlb_buffer(dma_addr))
de69e0f0 760 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 761 else if (dir == DMA_FROM_DEVICE)
cde14bbf 762 dma_mark_clean(dma_addr, size);
1da177e4
LT
763}
764
8270f3f1
JL
765void
766swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
767 size_t size, int dir)
768{
de69e0f0 769 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1
JL
770}
771
1da177e4
LT
772void
773swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
774 size_t size, int dir)
775{
de69e0f0 776 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4
LT
777}
778
878a97cf
JL
779/*
780 * Same as above, but for a sub-range of the mapping.
781 */
be6b0267 782static void
878a97cf 783swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
784 unsigned long offset, size_t size,
785 int dir, int target)
878a97cf 786{
e08e1f7a 787 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
878a97cf 788
34814545 789 BUG_ON(dir == DMA_NONE);
640aebfe 790 if (is_swiotlb_buffer(dma_addr))
de69e0f0 791 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 792 else if (dir == DMA_FROM_DEVICE)
cde14bbf 793 dma_mark_clean(dma_addr, size);
878a97cf
JL
794}
795
796void
797swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
798 unsigned long offset, size_t size, int dir)
799{
de69e0f0
JL
800 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
801 SYNC_FOR_CPU);
878a97cf
JL
802}
803
804void
805swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
806 unsigned long offset, size_t size, int dir)
807{
de69e0f0
JL
808 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
809 SYNC_FOR_DEVICE);
878a97cf
JL
810}
811
309df0c5
AK
812void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
813 struct dma_attrs *);
1da177e4
LT
814/*
815 * Map a set of buffers described by scatterlist in streaming mode for DMA.
816 * This is the scatter-gather version of the above swiotlb_map_single
817 * interface. Here the scatter gather list elements are each tagged with the
818 * appropriate dma address and length. They are obtained via
819 * sg_dma_{address,length}(SG).
820 *
821 * NOTE: An implementation may be able to use a smaller number of
822 * DMA address/length pairs than there are SG table elements.
823 * (for example via virtual mapping capabilities)
824 * The routine returns the number of addr/length pairs actually
825 * used, at most nents.
826 *
827 * Device ownership issues as mentioned above for swiotlb_map_single are the
828 * same here.
829 */
830int
309df0c5
AK
831swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
832 int dir, struct dma_attrs *attrs)
1da177e4 833{
dbfd49fe 834 struct scatterlist *sg;
ef9b1893 835 struct swiotlb_phys_addr buffer;
563aaf06 836 dma_addr_t dev_addr;
1da177e4
LT
837 int i;
838
34814545 839 BUG_ON(dir == DMA_NONE);
1da177e4 840
dbfd49fe 841 for_each_sg(sgl, sg, nelems, i) {
ef9b1893 842 dev_addr = swiotlb_sg_to_bus(sg);
b81ea27b 843 if (range_needs_mapping(sg_virt(sg), sg->length) ||
2797982e 844 address_needs_mapping(hwdev, dev_addr, sg->length)) {
ef9b1893
JF
845 void *map;
846 buffer.page = sg_page(sg);
847 buffer.offset = sg->offset;
848 map = map_single(hwdev, buffer, sg->length, dir);
7e870233 849 if (!map) {
1da177e4
LT
850 /* Don't panic here, we expect map_sg users
851 to do proper error handling. */
852 swiotlb_full(hwdev, sg->length, dir, 0);
309df0c5
AK
853 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
854 attrs);
dbfd49fe 855 sgl[0].dma_length = 0;
1da177e4
LT
856 return 0;
857 }
e08e1f7a 858 sg->dma_address = swiotlb_virt_to_bus(map);
1da177e4
LT
859 } else
860 sg->dma_address = dev_addr;
861 sg->dma_length = sg->length;
862 }
863 return nelems;
864}
309df0c5
AK
865EXPORT_SYMBOL(swiotlb_map_sg_attrs);
866
867int
868swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
869 int dir)
870{
871 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
872}
1da177e4
LT
873
874/*
875 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
876 * concerning calls here are the same as for swiotlb_unmap_single() above.
877 */
878void
309df0c5
AK
879swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
880 int nelems, int dir, struct dma_attrs *attrs)
1da177e4 881{
dbfd49fe 882 struct scatterlist *sg;
1da177e4
LT
883 int i;
884
34814545 885 BUG_ON(dir == DMA_NONE);
1da177e4 886
dbfd49fe 887 for_each_sg(sgl, sg, nelems, i) {
ef9b1893 888 if (sg->dma_address != swiotlb_sg_to_bus(sg))
e08e1f7a 889 unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
93fbff63 890 sg->dma_length, dir);
1da177e4 891 else if (dir == DMA_FROM_DEVICE)
ef9b1893 892 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 893 }
1da177e4 894}
309df0c5
AK
895EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
896
897void
898swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
899 int dir)
900{
901 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
902}
1da177e4
LT
903
904/*
905 * Make physical memory consistent for a set of streaming mode DMA translations
906 * after a transfer.
907 *
908 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
909 * and usage.
910 */
be6b0267 911static void
dbfd49fe 912swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 913 int nelems, int dir, int target)
1da177e4 914{
dbfd49fe 915 struct scatterlist *sg;
1da177e4
LT
916 int i;
917
34814545 918 BUG_ON(dir == DMA_NONE);
1da177e4 919
dbfd49fe 920 for_each_sg(sgl, sg, nelems, i) {
ef9b1893 921 if (sg->dma_address != swiotlb_sg_to_bus(sg))
e08e1f7a 922 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
de69e0f0 923 sg->dma_length, dir, target);
cde14bbf 924 else if (dir == DMA_FROM_DEVICE)
ef9b1893 925 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 926 }
1da177e4
LT
927}
928
8270f3f1
JL
929void
930swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
931 int nelems, int dir)
932{
de69e0f0 933 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1
JL
934}
935
1da177e4
LT
936void
937swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
938 int nelems, int dir)
939{
de69e0f0 940 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4
LT
941}
942
943int
8d8bb39b 944swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1da177e4 945{
e08e1f7a 946 return (dma_addr == swiotlb_virt_to_bus(io_tlb_overflow_buffer));
1da177e4
LT
947}
948
949/*
17e5ad6c 950 * Return whether the given device DMA address mask can be supported
1da177e4 951 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 952 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
953 * this function.
954 */
955int
563aaf06 956swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 957{
e08e1f7a 958 return swiotlb_virt_to_bus(io_tlb_end - 1) <= mask;
1da177e4
LT
959}
960
1da177e4
LT
961EXPORT_SYMBOL(swiotlb_map_single);
962EXPORT_SYMBOL(swiotlb_unmap_single);
963EXPORT_SYMBOL(swiotlb_map_sg);
964EXPORT_SYMBOL(swiotlb_unmap_sg);
965EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
966EXPORT_SYMBOL(swiotlb_sync_single_for_device);
878a97cf
JL
967EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
968EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
1da177e4
LT
969EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
970EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
971EXPORT_SYMBOL(swiotlb_dma_mapping_error);
25667d67
TL
972EXPORT_SYMBOL(swiotlb_alloc_coherent);
973EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4 974EXPORT_SYMBOL(swiotlb_dma_supported);