[linux-2.6-block.git] / lib / iomap.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Implement the default iomap interfaces
 *
 * (C) Copyright 2004 Linus Torvalds
 */
#include <linux/pci.h>
#include <linux/io.h>

#include <linux/export.h>

/*
 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
 * access or a MMIO access, these functions don't care. The info is
 * encoded in the hardware mapping set up by the mapping functions
 * (or the cookie itself, depending on implementation and hw).
 *
 * The generic routines don't assume any hardware mappings, and just
 * encode the PIO/MMIO as part of the cookie. They coldly assume that
 * the MMIO IO mappings are not in the low address range.
 *
 * Architectures for which this is not true can't use this generic
 * implementation and should do their own copy.
 */

#ifndef HAVE_ARCH_PIO_SIZE
/*
 * We encode the physical PIO addresses (0-0xffff) into the
 * pointer by offsetting them with a constant (0x10000) and
 * assuming that all the low addresses are always PIO. That means
 * we can do some sanity checks on the low bits, and don't
 * need to just take things for granted.
 */
#define PIO_OFFSET	0x10000UL
#define PIO_MASK	0x0ffffUL
#define PIO_RESERVED	0x40000UL
#endif

static void bad_io_access(unsigned long port, const char *access)
{
	static int count = 10;
	if (count) {
		count--;
		WARN(1, KERN_ERR "Bad IO access at port %#lx (%s)\n", port, access);
	}
}

/*
 * Ugly macros are a way of life.
 */
#define IO_COND(addr, is_pio, is_mmio) do {			\
	unsigned long port = (unsigned long __force)addr;	\
	if (port >= PIO_RESERVED) {				\
		is_mmio;					\
	} else if (port > PIO_OFFSET) {				\
		port &= PIO_MASK;				\
		is_pio;						\
	} else							\
		bad_io_access(port, #is_pio );			\
} while (0)

#ifndef pio_read16be
#define pio_read16be(port) swab16(inw(port))
#define pio_read32be(port) swab32(inl(port))
#endif

#ifndef mmio_read16be
#define mmio_read16be(addr) swab16(readw(addr))
#define mmio_read32be(addr) swab32(readl(addr))
#define mmio_read64be(addr) swab64(readq(addr))
#endif

unsigned int ioread8(void __iomem *addr)
{
	IO_COND(addr, return inb(port), return readb(addr));
	return 0xff;
}
unsigned int ioread16(void __iomem *addr)
{
	IO_COND(addr, return inw(port), return readw(addr));
	return 0xffff;
}
unsigned int ioread16be(void __iomem *addr)
{
	IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr));
	return 0xffff;
}
unsigned int ioread32(void __iomem *addr)
{
	IO_COND(addr, return inl(port), return readl(addr));
	return 0xffffffff;
}
unsigned int ioread32be(void __iomem *addr)
{
	IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr));
	return 0xffffffff;
}
EXPORT_SYMBOL(ioread8);
EXPORT_SYMBOL(ioread16);
EXPORT_SYMBOL(ioread16be);
EXPORT_SYMBOL(ioread32);
EXPORT_SYMBOL(ioread32be);

#ifdef readq
static u64 pio_read64_lo_hi(unsigned long port)
{
	u64 lo, hi;

	lo = inl(port);
	hi = inl(port + sizeof(u32));

	return lo | (hi << 32);
}

static u64 pio_read64_hi_lo(unsigned long port)
{
	u64 lo, hi;

	hi = inl(port + sizeof(u32));
	lo = inl(port);

	return lo | (hi << 32);
}

static u64 pio_read64be_lo_hi(unsigned long port)
{
	u64 lo, hi;

	lo = pio_read32be(port + sizeof(u32));
	hi = pio_read32be(port);

	return lo | (hi << 32);
}

static u64 pio_read64be_hi_lo(unsigned long port)
{
	u64 lo, hi;

	hi = pio_read32be(port);
	lo = pio_read32be(port + sizeof(u32));

	return lo | (hi << 32);
}

u64 ioread64_lo_hi(void __iomem *addr)
{
	IO_COND(addr, return pio_read64_lo_hi(port), return readq(addr));
	return 0xffffffffffffffffULL;
}

u64 ioread64_hi_lo(void __iomem *addr)
{
	IO_COND(addr, return pio_read64_hi_lo(port), return readq(addr));
	return 0xffffffffffffffffULL;
}

u64 ioread64be_lo_hi(void __iomem *addr)
{
	IO_COND(addr, return pio_read64be_lo_hi(port),
		return mmio_read64be(addr));
	return 0xffffffffffffffffULL;
}

u64 ioread64be_hi_lo(void __iomem *addr)
{
	IO_COND(addr, return pio_read64be_hi_lo(port),
		return mmio_read64be(addr));
	return 0xffffffffffffffffULL;
}

EXPORT_SYMBOL(ioread64_lo_hi);
EXPORT_SYMBOL(ioread64_hi_lo);
EXPORT_SYMBOL(ioread64be_lo_hi);
EXPORT_SYMBOL(ioread64be_hi_lo);

#endif /* readq */

#ifndef pio_write16be
#define pio_write16be(val,port) outw(swab16(val),port)
#define pio_write32be(val,port) outl(swab32(val),port)
#endif

#ifndef mmio_write16be
#define mmio_write16be(val,port) writew(swab16(val),port)
#define mmio_write32be(val,port) writel(swab32(val),port)
#define mmio_write64be(val,port) writeq(swab64(val),port)
#endif

void iowrite8(u8 val, void __iomem *addr)
{
	IO_COND(addr, outb(val,port), writeb(val, addr));
}
void iowrite16(u16 val, void __iomem *addr)
{
	IO_COND(addr, outw(val,port), writew(val, addr));
}
void iowrite16be(u16 val, void __iomem *addr)
{
	IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr));
}
void iowrite32(u32 val, void __iomem *addr)
{
	IO_COND(addr, outl(val,port), writel(val, addr));
}
void iowrite32be(u32 val, void __iomem *addr)
{
	IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr));
}
EXPORT_SYMBOL(iowrite8);
EXPORT_SYMBOL(iowrite16);
EXPORT_SYMBOL(iowrite16be);
EXPORT_SYMBOL(iowrite32);
EXPORT_SYMBOL(iowrite32be);

#ifdef writeq
static void pio_write64_lo_hi(u64 val, unsigned long port)
{
	outl(val, port);
	outl(val >> 32, port + sizeof(u32));
}

static void pio_write64_hi_lo(u64 val, unsigned long port)
{
	outl(val >> 32, port + sizeof(u32));
	outl(val, port);
}

static void pio_write64be_lo_hi(u64 val, unsigned long port)
{
	pio_write32be(val, port + sizeof(u32));
	pio_write32be(val >> 32, port);
}

static void pio_write64be_hi_lo(u64 val, unsigned long port)
{
	pio_write32be(val >> 32, port);
	pio_write32be(val, port + sizeof(u32));
}

void iowrite64_lo_hi(u64 val, void __iomem *addr)
{
	IO_COND(addr, pio_write64_lo_hi(val, port),
		writeq(val, addr));
}

void iowrite64_hi_lo(u64 val, void __iomem *addr)
{
	IO_COND(addr, pio_write64_hi_lo(val, port),
		writeq(val, addr));
}

void iowrite64be_lo_hi(u64 val, void __iomem *addr)
{
	IO_COND(addr, pio_write64be_lo_hi(val, port),
		mmio_write64be(val, addr));
}

void iowrite64be_hi_lo(u64 val, void __iomem *addr)
{
	IO_COND(addr, pio_write64be_hi_lo(val, port),
		mmio_write64be(val, addr));
}

EXPORT_SYMBOL(iowrite64_lo_hi);
EXPORT_SYMBOL(iowrite64_hi_lo);
EXPORT_SYMBOL(iowrite64be_lo_hi);
EXPORT_SYMBOL(iowrite64be_hi_lo);

#endif /* readq */

/*
 * These are the "repeat MMIO read/write" functions.
 * Note the "__raw" accesses, since we don't want to
 * convert to CPU byte order. We write in "IO byte
 * order" (we also don't have IO barriers).
 */
#ifndef mmio_insb
static inline void mmio_insb(void __iomem *addr, u8 *dst, int count)
{
	while (--count >= 0) {
		u8 data = __raw_readb(addr);
		*dst = data;
		dst++;
	}
}
static inline void mmio_insw(void __iomem *addr, u16 *dst, int count)
{
	while (--count >= 0) {
		u16 data = __raw_readw(addr);
		*dst = data;
		dst++;
	}
}
static inline void mmio_insl(void __iomem *addr, u32 *dst, int count)
{
	while (--count >= 0) {
		u32 data = __raw_readl(addr);
		*dst = data;
		dst++;
	}
}
#endif

#ifndef mmio_outsb
static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
{
	while (--count >= 0) {
		__raw_writeb(*src, addr);
		src++;
	}
}
static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
{
	while (--count >= 0) {
		__raw_writew(*src, addr);
		src++;
	}
}
static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
{
	while (--count >= 0) {
		__raw_writel(*src, addr);
		src++;
	}
}
#endif

void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
{
	IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
}
void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
{
	IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count));
}
void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
{
	IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count));
}
EXPORT_SYMBOL(ioread8_rep);
EXPORT_SYMBOL(ioread16_rep);
EXPORT_SYMBOL(ioread32_rep);

void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
{
	IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count));
}
void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
{
	IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count));
}
void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
{
	IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count));
}
EXPORT_SYMBOL(iowrite8_rep);
EXPORT_SYMBOL(iowrite16_rep);
EXPORT_SYMBOL(iowrite32_rep);

#ifdef CONFIG_HAS_IOPORT_MAP
/* Create a virtual mapping cookie for an IO port range */
void __iomem *ioport_map(unsigned long port, unsigned int nr)
{
	if (port > PIO_MASK)
		return NULL;
	return (void __iomem *) (unsigned long) (port + PIO_OFFSET);
}

void ioport_unmap(void __iomem *addr)
{
	/* Nothing to do */
}
EXPORT_SYMBOL(ioport_map);
EXPORT_SYMBOL(ioport_unmap);
#endif /* CONFIG_HAS_IOPORT_MAP */

#ifdef CONFIG_PCI
/* Hide the details if this is a MMIO or PIO address space and just do what
 * you expect in the correct way. */
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
{
	IO_COND(addr, /* nothing */, iounmap(addr));
}
EXPORT_SYMBOL(pci_iounmap);
#endif /* CONFIG_PCI */
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1da177e4 LT	2	/*
	3	* Implement the default iomap interfaces
	4	*
	5	* (C) Copyright 2004 Linus Torvalds
	6	*/
	7	#include <linux/pci.h>
9ac7849e TH	8	#include <linux/io.h>
9ac7849e TH	9
8bc3bcc9	10	#include <linux/export.h>
1da177e4 LT	11
	12	/*
	13	* Read/write from/to an (offsettable) iomem cookie. It might be a PIO
	14	* access or a MMIO access, these functions don't care. The info is
	15	* encoded in the hardware mapping set up by the mapping functions
	16	* (or the cookie itself, depending on implementation and hw).
	17	*
	18	* The generic routines don't assume any hardware mappings, and just
	19	* encode the PIO/MMIO as part of the cookie. They coldly assume that
	20	* the MMIO IO mappings are not in the low address range.
	21	*
	22	* Architectures for which this is not true can't use this generic
	23	* implementation and should do their own copy.
	24	*/
	25
	26	#ifndef HAVE_ARCH_PIO_SIZE
	27	/*
	28	* We encode the physical PIO addresses (0-0xffff) into the
	29	* pointer by offsetting them with a constant (0x10000) and
	30	* assuming that all the low addresses are always PIO. That means
	31	* we can do some sanity checks on the low bits, and don't
	32	* need to just take things for granted.
	33	*/
	34	#define PIO_OFFSET 0x10000UL
	35	#define PIO_MASK 0x0ffffUL
	36	#define PIO_RESERVED 0x40000UL
	37	#endif
	38
6cbf0c70 LT	39	static void bad_io_access(unsigned long port, const char *access)
	40	{
	41	static int count = 10;
	42	if (count) {
	43	count--;
5cd2b459	44	WARN(1, KERN_ERR "Bad IO access at port %#lx (%s)\n", port, access);
6cbf0c70 LT	45	}
	46	}
	47
1da177e4 LT	48	/*
	49	* Ugly macros are a way of life.
	50	*/
1da177e4 LT	51	#define IO_COND(addr, is_pio, is_mmio) do { \
1da177e4 LT	52	unsigned long port = (unsigned long __force)addr; \
6cbf0c70 LT	53	if (port >= PIO_RESERVED) { \
	54	is_mmio; \
	55	} else if (port > PIO_OFFSET) { \
1da177e4 LT	56	port &= PIO_MASK; \
1da177e4 LT	57	is_pio; \
6cbf0c70 LT	58	} else \
6cbf0c70 LT	59	bad_io_access(port, #is_pio ); \
1da177e4 LT	60	} while (0)
1da177e4 LT	61
34ba8a5c LT	62	#ifndef pio_read16be
	63	#define pio_read16be(port) swab16(inw(port))
	64	#define pio_read32be(port) swab32(inl(port))
	65	#endif
	66
	67	#ifndef mmio_read16be
aecc787c LG	68	#define mmio_read16be(addr) swab16(readw(addr))
aecc787c LG	69	#define mmio_read32be(addr) swab32(readl(addr))
79bf0cbd	70	#define mmio_read64be(addr) swab64(readq(addr))
34ba8a5c LT	71	#endif
34ba8a5c LT	72
9f741cb8	73	unsigned int ioread8(void __iomem *addr)
1da177e4 LT	74	{
1da177e4 LT	75	IO_COND(addr, return inb(port), return readb(addr));
6cbf0c70	76	return 0xff;
1da177e4	77	}
9f741cb8	78	unsigned int ioread16(void __iomem *addr)
1da177e4 LT	79	{
1da177e4 LT	80	IO_COND(addr, return inw(port), return readw(addr));
6cbf0c70	81	return 0xffff;
1da177e4	82	}
9f741cb8	83	unsigned int ioread16be(void __iomem *addr)
dae409a2	84	{
34ba8a5c	85	IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr));
6cbf0c70	86	return 0xffff;
dae409a2	87	}
9f741cb8	88	unsigned int ioread32(void __iomem *addr)
1da177e4 LT	89	{
1da177e4 LT	90	IO_COND(addr, return inl(port), return readl(addr));
6cbf0c70	91	return 0xffffffff;
1da177e4	92	}
9f741cb8	93	unsigned int ioread32be(void __iomem *addr)
dae409a2	94	{
34ba8a5c	95	IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr));
6cbf0c70	96	return 0xffffffff;
dae409a2	97	}
1da177e4 LT	98	EXPORT_SYMBOL(ioread8);
1da177e4 LT	99	EXPORT_SYMBOL(ioread16);
dae409a2	100	EXPORT_SYMBOL(ioread16be);
1da177e4	101	EXPORT_SYMBOL(ioread32);
dae409a2	102	EXPORT_SYMBOL(ioread32be);
1da177e4	103
79bf0cbd LG	104	#ifdef readq
	105	static u64 pio_read64_lo_hi(unsigned long port)
	106	{
	107	u64 lo, hi;
	108
	109	lo = inl(port);
	110	hi = inl(port + sizeof(u32));
	111
	112	return lo \| (hi << 32);
	113	}
	114
	115	static u64 pio_read64_hi_lo(unsigned long port)
	116	{
	117	u64 lo, hi;
	118
	119	hi = inl(port + sizeof(u32));
	120	lo = inl(port);
	121
	122	return lo \| (hi << 32);
	123	}
	124
	125	static u64 pio_read64be_lo_hi(unsigned long port)
	126	{
	127	u64 lo, hi;
	128
	129	lo = pio_read32be(port + sizeof(u32));
	130	hi = pio_read32be(port);
	131
	132	return lo \| (hi << 32);
	133	}
	134
	135	static u64 pio_read64be_hi_lo(unsigned long port)
	136	{
	137	u64 lo, hi;
	138
	139	hi = pio_read32be(port);
	140	lo = pio_read32be(port + sizeof(u32));
	141
	142	return lo \| (hi << 32);
	143	}
	144
	145	u64 ioread64_lo_hi(void __iomem *addr)
	146	{
	147	IO_COND(addr, return pio_read64_lo_hi(port), return readq(addr));
	148	return 0xffffffffffffffffULL;
	149	}
	150
	151	u64 ioread64_hi_lo(void __iomem *addr)
	152	{
	153	IO_COND(addr, return pio_read64_hi_lo(port), return readq(addr));
	154	return 0xffffffffffffffffULL;
	155	}
	156
	157	u64 ioread64be_lo_hi(void __iomem *addr)
	158	{
	159	IO_COND(addr, return pio_read64be_lo_hi(port),
	160	return mmio_read64be(addr));
	161	return 0xffffffffffffffffULL;
	162	}
	163
	164	u64 ioread64be_hi_lo(void __iomem *addr)
	165	{
	166	IO_COND(addr, return pio_read64be_hi_lo(port),
	167	return mmio_read64be(addr));
168	return 0xffffffffffffffffULL;
169	}
170
171	EXPORT_SYMBOL(ioread64_lo_hi);
172	EXPORT_SYMBOL(ioread64_hi_lo);
173	EXPORT_SYMBOL(ioread64be_lo_hi);
174	EXPORT_SYMBOL(ioread64be_hi_lo);
175
176	#endif /* readq */
177
34ba8a5c LT	178	#ifndef pio_write16be
	179	#define pio_write16be(val,port) outw(swab16(val),port)
	180	#define pio_write32be(val,port) outl(swab32(val),port)
	181	#endif
	182
	183	#ifndef mmio_write16be
aecc787c LG	184	#define mmio_write16be(val,port) writew(swab16(val),port)
aecc787c LG	185	#define mmio_write32be(val,port) writel(swab32(val),port)
79bf0cbd	186	#define mmio_write64be(val,port) writeq(swab64(val),port)
34ba8a5c LT	187	#endif
34ba8a5c LT	188
9f741cb8	189	void iowrite8(u8 val, void __iomem *addr)
1da177e4 LT	190	{
	191	IO_COND(addr, outb(val,port), writeb(val, addr));
	192	}
9f741cb8	193	void iowrite16(u16 val, void __iomem *addr)
1da177e4 LT	194	{
	195	IO_COND(addr, outw(val,port), writew(val, addr));
	196	}
9f741cb8	197	void iowrite16be(u16 val, void __iomem *addr)
dae409a2	198	{
34ba8a5c	199	IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr));
dae409a2	200	}
9f741cb8	201	void iowrite32(u32 val, void __iomem *addr)
1da177e4 LT	202	{
	203	IO_COND(addr, outl(val,port), writel(val, addr));
	204	}
9f741cb8	205	void iowrite32be(u32 val, void __iomem *addr)
dae409a2	206	{
34ba8a5c	207	IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr));
dae409a2	208	}
1da177e4 LT	209	EXPORT_SYMBOL(iowrite8);
1da177e4 LT	210	EXPORT_SYMBOL(iowrite16);
dae409a2	211	EXPORT_SYMBOL(iowrite16be);
1da177e4	212	EXPORT_SYMBOL(iowrite32);
dae409a2	213	EXPORT_SYMBOL(iowrite32be);
1da177e4	214
79bf0cbd LG	215	#ifdef writeq
	216	static void pio_write64_lo_hi(u64 val, unsigned long port)
	217	{
	218	outl(val, port);
	219	outl(val >> 32, port + sizeof(u32));
	220	}
	221
	222	static void pio_write64_hi_lo(u64 val, unsigned long port)
	223	{
	224	outl(val >> 32, port + sizeof(u32));
	225	outl(val, port);
	226	}
	227
	228	static void pio_write64be_lo_hi(u64 val, unsigned long port)
	229	{
	230	pio_write32be(val, port + sizeof(u32));
	231	pio_write32be(val >> 32, port);
	232	}
	233
	234	static void pio_write64be_hi_lo(u64 val, unsigned long port)
	235	{
	236	pio_write32be(val >> 32, port);
	237	pio_write32be(val, port + sizeof(u32));
	238	}
	239
	240	void iowrite64_lo_hi(u64 val, void __iomem *addr)
	241	{
	242	IO_COND(addr, pio_write64_lo_hi(val, port),
	243	writeq(val, addr));
	244	}
	245
	246	void iowrite64_hi_lo(u64 val, void __iomem *addr)
	247	{
	248	IO_COND(addr, pio_write64_hi_lo(val, port),
	249	writeq(val, addr));
	250	}
	251
	252	void iowrite64be_lo_hi(u64 val, void __iomem *addr)
	253	{
	254	IO_COND(addr, pio_write64be_lo_hi(val, port),
	255	mmio_write64be(val, addr));
	256	}
	257
	258	void iowrite64be_hi_lo(u64 val, void __iomem *addr)
	259	{
	260	IO_COND(addr, pio_write64be_hi_lo(val, port),
	261	mmio_write64be(val, addr));
	262	}
	263
	264	EXPORT_SYMBOL(iowrite64_lo_hi);
	265	EXPORT_SYMBOL(iowrite64_hi_lo);
	266	EXPORT_SYMBOL(iowrite64be_lo_hi);
	267	EXPORT_SYMBOL(iowrite64be_hi_lo);
	268
	269	#endif /* readq */
	270
1da177e4 LT	271	/*
	272	* These are the "repeat MMIO read/write" functions.
	273	* Note the "__raw" accesses, since we don't want to
	274	* convert to CPU byte order. We write in "IO byte
	275	* order" (we also don't have IO barriers).
	276	*/
34ba8a5c	277	#ifndef mmio_insb
1da177e4 LT	278	static inline void mmio_insb(void __iomem addr, u8 dst, int count)
	279	{
	280	while (--count >= 0) {
	281	u8 data = __raw_readb(addr);
	282	*dst = data;
	283	dst++;
	284	}
	285	}
	286	static inline void mmio_insw(void __iomem addr, u16 dst, int count)
	287	{
	288	while (--count >= 0) {
	289	u16 data = __raw_readw(addr);
	290	*dst = data;
	291	dst++;
	292	}
	293	}
	294	static inline void mmio_insl(void __iomem addr, u32 dst, int count)
	295	{
	296	while (--count >= 0) {
	297	u32 data = __raw_readl(addr);
	298	*dst = data;
	299	dst++;
	300	}
	301	}
34ba8a5c	302	#endif
1da177e4	303
34ba8a5c	304	#ifndef mmio_outsb
1da177e4 LT	305	static inline void mmio_outsb(void __iomem addr, const u8 src, int count)
	306	{
	307	while (--count >= 0) {
	308	__raw_writeb(*src, addr);
	309	src++;
	310	}
	311	}
	312	static inline void mmio_outsw(void __iomem addr, const u16 src, int count)
	313	{
	314	while (--count >= 0) {
	315	__raw_writew(*src, addr);
	316	src++;
	317	}
	318	}
	319	static inline void mmio_outsl(void __iomem addr, const u32 src, int count)
	320	{
	321	while (--count >= 0) {
	322	__raw_writel(*src, addr);
	323	src++;
	324	}
	325	}
34ba8a5c	326	#endif
1da177e4	327
9f741cb8	328	void ioread8_rep(void __iomem addr, void dst, unsigned long count)
1da177e4 LT	329	{
	330	IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
	331	}
9f741cb8	332	void ioread16_rep(void __iomem addr, void dst, unsigned long count)
1da177e4 LT	333	{
	334	IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count));
	335	}
9f741cb8	336	void ioread32_rep(void __iomem addr, void dst, unsigned long count)
1da177e4 LT	337	{
	338	IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count));
	339	}
	340	EXPORT_SYMBOL(ioread8_rep);
	341	EXPORT_SYMBOL(ioread16_rep);
	342	EXPORT_SYMBOL(ioread32_rep);
	343
9f741cb8	344	void iowrite8_rep(void __iomem addr, const void src, unsigned long count)
1da177e4 LT	345	{
	346	IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count));
	347	}
9f741cb8	348	void iowrite16_rep(void __iomem addr, const void src, unsigned long count)
1da177e4 LT	349	{
	350	IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count));
	351	}
9f741cb8	352	void iowrite32_rep(void __iomem addr, const void src, unsigned long count)
1da177e4 LT	353	{
	354	IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count));
	355	}
	356	EXPORT_SYMBOL(iowrite8_rep);
	357	EXPORT_SYMBOL(iowrite16_rep);
	358	EXPORT_SYMBOL(iowrite32_rep);
	359
ce816fa8	360	#ifdef CONFIG_HAS_IOPORT_MAP
1da177e4 LT	361	/* Create a virtual mapping cookie for an IO port range */
	362	void __iomem *ioport_map(unsigned long port, unsigned int nr)
	363	{
	364	if (port > PIO_MASK)
	365	return NULL;
	366	return (void __iomem *) (unsigned long) (port + PIO_OFFSET);
	367	}
	368
	369	void ioport_unmap(void __iomem *addr)
	370	{
	371	/* Nothing to do */
	372	}
	373	EXPORT_SYMBOL(ioport_map);
	374	EXPORT_SYMBOL(ioport_unmap);
ce816fa8	375	#endif /* CONFIG_HAS_IOPORT_MAP */
1da177e4	376
82ed223c	377	#ifdef CONFIG_PCI
66eab4df MT	378	/* Hide the details if this is a MMIO or PIO address space and just do what
66eab4df MT	379	* you expect in the correct way. */
1da177e4 LT	380	void pci_iounmap(struct pci_dev dev, void __iomem addr)
	381	{
	382	IO_COND(addr, /* nothing */, iounmap(addr));
	383	}
1da177e4	384	EXPORT_SYMBOL(pci_iounmap);
82ed223c	385	#endif /* CONFIG_PCI */