Commit | Line | Data |
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f2f45e5f JR |
1 | /* |
2 | * Copyright (C) 2008 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Author: Joerg Roedel <joerg.roedel@amd.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published | |
8 | * by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
68db0cf1 | 20 | #include <linux/sched/task_stack.h> |
972aa45c | 21 | #include <linux/scatterlist.h> |
2d62ece1 | 22 | #include <linux/dma-mapping.h> |
29930025 | 23 | #include <linux/sched/task.h> |
6c132d1b | 24 | #include <linux/stacktrace.h> |
f2f45e5f | 25 | #include <linux/dma-debug.h> |
30dfa90c | 26 | #include <linux/spinlock.h> |
b4a0f533 | 27 | #include <linux/vmalloc.h> |
788dcfa6 | 28 | #include <linux/debugfs.h> |
8a6fc708 | 29 | #include <linux/uaccess.h> |
23a7bfae | 30 | #include <linux/export.h> |
2d62ece1 | 31 | #include <linux/device.h> |
f2f45e5f | 32 | #include <linux/types.h> |
2d62ece1 | 33 | #include <linux/sched.h> |
8a6fc708 | 34 | #include <linux/ctype.h> |
f2f45e5f | 35 | #include <linux/list.h> |
6bf07871 | 36 | #include <linux/slab.h> |
f2f45e5f | 37 | |
2e34bde1 JR |
38 | #include <asm/sections.h> |
39 | ||
30dfa90c JR |
40 | #define HASH_SIZE 1024ULL |
41 | #define HASH_FN_SHIFT 13 | |
42 | #define HASH_FN_MASK (HASH_SIZE - 1) | |
43 | ||
15b28bbc CH |
44 | /* allow architectures to override this if absolutely required */ |
45 | #ifndef PREALLOC_DMA_DEBUG_ENTRIES | |
46 | #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16) | |
47 | #endif | |
48 | ||
f2f45e5f JR |
49 | enum { |
50 | dma_debug_single, | |
51 | dma_debug_page, | |
52 | dma_debug_sg, | |
53 | dma_debug_coherent, | |
0e74b34d | 54 | dma_debug_resource, |
f2f45e5f JR |
55 | }; |
56 | ||
6c9c6d63 SK |
57 | enum map_err_types { |
58 | MAP_ERR_CHECK_NOT_APPLICABLE, | |
59 | MAP_ERR_NOT_CHECKED, | |
60 | MAP_ERR_CHECKED, | |
61 | }; | |
62 | ||
6c132d1b DW |
63 | #define DMA_DEBUG_STACKTRACE_ENTRIES 5 |
64 | ||
0abdd7a8 DW |
65 | /** |
66 | * struct dma_debug_entry - track a dma_map* or dma_alloc_coherent mapping | |
67 | * @list: node on pre-allocated free_entries list | |
68 | * @dev: 'dev' argument to dma_map_{page|single|sg} or dma_alloc_coherent | |
69 | * @type: single, page, sg, coherent | |
70 | * @pfn: page frame of the start address | |
71 | * @offset: offset of mapping relative to pfn | |
72 | * @size: length of the mapping | |
73 | * @direction: enum dma_data_direction | |
74 | * @sg_call_ents: 'nents' from dma_map_sg | |
75 | * @sg_mapped_ents: 'mapped_ents' from dma_map_sg | |
76 | * @map_err_type: track whether dma_mapping_error() was checked | |
77 | * @stacktrace: support backtraces when a violation is detected | |
78 | */ | |
f2f45e5f JR |
79 | struct dma_debug_entry { |
80 | struct list_head list; | |
81 | struct device *dev; | |
82 | int type; | |
0abdd7a8 DW |
83 | unsigned long pfn; |
84 | size_t offset; | |
f2f45e5f JR |
85 | u64 dev_addr; |
86 | u64 size; | |
87 | int direction; | |
88 | int sg_call_ents; | |
89 | int sg_mapped_ents; | |
6c9c6d63 | 90 | enum map_err_types map_err_type; |
6c132d1b DW |
91 | #ifdef CONFIG_STACKTRACE |
92 | struct stack_trace stacktrace; | |
93 | unsigned long st_entries[DMA_DEBUG_STACKTRACE_ENTRIES]; | |
94 | #endif | |
f2f45e5f JR |
95 | }; |
96 | ||
c6a21d0b NH |
97 | typedef bool (*match_fn)(struct dma_debug_entry *, struct dma_debug_entry *); |
98 | ||
30dfa90c JR |
99 | struct hash_bucket { |
100 | struct list_head list; | |
101 | spinlock_t lock; | |
2d62ece1 | 102 | } ____cacheline_aligned_in_smp; |
30dfa90c JR |
103 | |
104 | /* Hash list to save the allocated dma addresses */ | |
105 | static struct hash_bucket dma_entry_hash[HASH_SIZE]; | |
3b1e79ed JR |
106 | /* List of pre-allocated dma_debug_entry's */ |
107 | static LIST_HEAD(free_entries); | |
108 | /* Lock for the list above */ | |
109 | static DEFINE_SPINLOCK(free_entries_lock); | |
110 | ||
111 | /* Global disable flag - will be set in case of an error */ | |
621a5f7a | 112 | static bool global_disable __read_mostly; |
3b1e79ed | 113 | |
2ce8e7ed FF |
114 | /* Early initialization disable flag, set at the end of dma_debug_init */ |
115 | static bool dma_debug_initialized __read_mostly; | |
116 | ||
01ce18b3 FF |
117 | static inline bool dma_debug_disabled(void) |
118 | { | |
2ce8e7ed | 119 | return global_disable || !dma_debug_initialized; |
01ce18b3 FF |
120 | } |
121 | ||
788dcfa6 JR |
122 | /* Global error count */ |
123 | static u32 error_count; | |
124 | ||
125 | /* Global error show enable*/ | |
126 | static u32 show_all_errors __read_mostly; | |
127 | /* Number of errors to show */ | |
128 | static u32 show_num_errors = 1; | |
129 | ||
3b1e79ed JR |
130 | static u32 num_free_entries; |
131 | static u32 min_free_entries; | |
e6a1a89d | 132 | static u32 nr_total_entries; |
30dfa90c | 133 | |
59d3daaf | 134 | /* number of preallocated entries requested by kernel cmdline */ |
bcebe324 | 135 | static u32 nr_prealloc_entries = PREALLOC_DMA_DEBUG_ENTRIES; |
59d3daaf | 136 | |
788dcfa6 JR |
137 | /* debugfs dentry's for the stuff above */ |
138 | static struct dentry *dma_debug_dent __read_mostly; | |
139 | static struct dentry *global_disable_dent __read_mostly; | |
140 | static struct dentry *error_count_dent __read_mostly; | |
141 | static struct dentry *show_all_errors_dent __read_mostly; | |
142 | static struct dentry *show_num_errors_dent __read_mostly; | |
143 | static struct dentry *num_free_entries_dent __read_mostly; | |
144 | static struct dentry *min_free_entries_dent __read_mostly; | |
8a6fc708 | 145 | static struct dentry *filter_dent __read_mostly; |
788dcfa6 | 146 | |
2e507d84 JR |
147 | /* per-driver filter related state */ |
148 | ||
149 | #define NAME_MAX_LEN 64 | |
150 | ||
151 | static char current_driver_name[NAME_MAX_LEN] __read_mostly; | |
152 | static struct device_driver *current_driver __read_mostly; | |
153 | ||
154 | static DEFINE_RWLOCK(driver_name_lock); | |
788dcfa6 | 155 | |
6c9c6d63 SK |
156 | static const char *const maperr2str[] = { |
157 | [MAP_ERR_CHECK_NOT_APPLICABLE] = "dma map error check not applicable", | |
158 | [MAP_ERR_NOT_CHECKED] = "dma map error not checked", | |
159 | [MAP_ERR_CHECKED] = "dma map error checked", | |
160 | }; | |
161 | ||
0e74b34d NS |
162 | static const char *type2name[5] = { "single", "page", |
163 | "scather-gather", "coherent", | |
164 | "resource" }; | |
2d62ece1 JR |
165 | |
166 | static const char *dir2name[4] = { "DMA_BIDIRECTIONAL", "DMA_TO_DEVICE", | |
167 | "DMA_FROM_DEVICE", "DMA_NONE" }; | |
168 | ||
169 | /* | |
170 | * The access to some variables in this macro is racy. We can't use atomic_t | |
171 | * here because all these variables are exported to debugfs. Some of them even | |
172 | * writeable. This is also the reason why a lock won't help much. But anyway, | |
173 | * the races are no big deal. Here is why: | |
174 | * | |
175 | * error_count: the addition is racy, but the worst thing that can happen is | |
176 | * that we don't count some errors | |
177 | * show_num_errors: the subtraction is racy. Also no big deal because in | |
178 | * worst case this will result in one warning more in the | |
179 | * system log than the user configured. This variable is | |
180 | * writeable via debugfs. | |
181 | */ | |
6c132d1b DW |
182 | static inline void dump_entry_trace(struct dma_debug_entry *entry) |
183 | { | |
184 | #ifdef CONFIG_STACKTRACE | |
185 | if (entry) { | |
e7ed70ee | 186 | pr_warning("Mapped at:\n"); |
6c132d1b DW |
187 | print_stack_trace(&entry->stacktrace, 0); |
188 | } | |
189 | #endif | |
190 | } | |
191 | ||
2e507d84 JR |
192 | static bool driver_filter(struct device *dev) |
193 | { | |
0bf84128 JR |
194 | struct device_driver *drv; |
195 | unsigned long flags; | |
196 | bool ret; | |
197 | ||
2e507d84 JR |
198 | /* driver filter off */ |
199 | if (likely(!current_driver_name[0])) | |
200 | return true; | |
201 | ||
202 | /* driver filter on and initialized */ | |
ec9c96ef | 203 | if (current_driver && dev && dev->driver == current_driver) |
2e507d84 JR |
204 | return true; |
205 | ||
ec9c96ef KM |
206 | /* driver filter on, but we can't filter on a NULL device... */ |
207 | if (!dev) | |
208 | return false; | |
209 | ||
0bf84128 JR |
210 | if (current_driver || !current_driver_name[0]) |
211 | return false; | |
2e507d84 | 212 | |
0bf84128 | 213 | /* driver filter on but not yet initialized */ |
f3ff9247 | 214 | drv = dev->driver; |
0bf84128 JR |
215 | if (!drv) |
216 | return false; | |
217 | ||
218 | /* lock to protect against change of current_driver_name */ | |
219 | read_lock_irqsave(&driver_name_lock, flags); | |
220 | ||
221 | ret = false; | |
222 | if (drv->name && | |
223 | strncmp(current_driver_name, drv->name, NAME_MAX_LEN - 1) == 0) { | |
224 | current_driver = drv; | |
225 | ret = true; | |
2e507d84 JR |
226 | } |
227 | ||
0bf84128 | 228 | read_unlock_irqrestore(&driver_name_lock, flags); |
0bf84128 JR |
229 | |
230 | return ret; | |
2e507d84 JR |
231 | } |
232 | ||
ec9c96ef KM |
233 | #define err_printk(dev, entry, format, arg...) do { \ |
234 | error_count += 1; \ | |
235 | if (driver_filter(dev) && \ | |
236 | (show_all_errors || show_num_errors > 0)) { \ | |
237 | WARN(1, "%s %s: " format, \ | |
238 | dev ? dev_driver_string(dev) : "NULL", \ | |
239 | dev ? dev_name(dev) : "NULL", ## arg); \ | |
240 | dump_entry_trace(entry); \ | |
241 | } \ | |
242 | if (!show_all_errors && show_num_errors > 0) \ | |
243 | show_num_errors -= 1; \ | |
2d62ece1 JR |
244 | } while (0); |
245 | ||
30dfa90c JR |
246 | /* |
247 | * Hash related functions | |
248 | * | |
249 | * Every DMA-API request is saved into a struct dma_debug_entry. To | |
250 | * have quick access to these structs they are stored into a hash. | |
251 | */ | |
252 | static int hash_fn(struct dma_debug_entry *entry) | |
253 | { | |
254 | /* | |
255 | * Hash function is based on the dma address. | |
256 | * We use bits 20-27 here as the index into the hash | |
257 | */ | |
258 | return (entry->dev_addr >> HASH_FN_SHIFT) & HASH_FN_MASK; | |
259 | } | |
260 | ||
261 | /* | |
262 | * Request exclusive access to a hash bucket for a given dma_debug_entry. | |
263 | */ | |
264 | static struct hash_bucket *get_hash_bucket(struct dma_debug_entry *entry, | |
265 | unsigned long *flags) | |
d5dfc80f | 266 | __acquires(&dma_entry_hash[idx].lock) |
30dfa90c JR |
267 | { |
268 | int idx = hash_fn(entry); | |
269 | unsigned long __flags; | |
270 | ||
271 | spin_lock_irqsave(&dma_entry_hash[idx].lock, __flags); | |
272 | *flags = __flags; | |
273 | return &dma_entry_hash[idx]; | |
274 | } | |
275 | ||
276 | /* | |
277 | * Give up exclusive access to the hash bucket | |
278 | */ | |
279 | static void put_hash_bucket(struct hash_bucket *bucket, | |
280 | unsigned long *flags) | |
d5dfc80f | 281 | __releases(&bucket->lock) |
30dfa90c JR |
282 | { |
283 | unsigned long __flags = *flags; | |
284 | ||
285 | spin_unlock_irqrestore(&bucket->lock, __flags); | |
286 | } | |
287 | ||
c6a21d0b NH |
288 | static bool exact_match(struct dma_debug_entry *a, struct dma_debug_entry *b) |
289 | { | |
91ec37cc | 290 | return ((a->dev_addr == b->dev_addr) && |
c6a21d0b NH |
291 | (a->dev == b->dev)) ? true : false; |
292 | } | |
293 | ||
294 | static bool containing_match(struct dma_debug_entry *a, | |
295 | struct dma_debug_entry *b) | |
296 | { | |
297 | if (a->dev != b->dev) | |
298 | return false; | |
299 | ||
300 | if ((b->dev_addr <= a->dev_addr) && | |
301 | ((b->dev_addr + b->size) >= (a->dev_addr + a->size))) | |
302 | return true; | |
303 | ||
304 | return false; | |
305 | } | |
306 | ||
30dfa90c JR |
307 | /* |
308 | * Search a given entry in the hash bucket list | |
309 | */ | |
c6a21d0b NH |
310 | static struct dma_debug_entry *__hash_bucket_find(struct hash_bucket *bucket, |
311 | struct dma_debug_entry *ref, | |
312 | match_fn match) | |
30dfa90c | 313 | { |
7caf6a49 | 314 | struct dma_debug_entry *entry, *ret = NULL; |
fe73fbe1 | 315 | int matches = 0, match_lvl, last_lvl = -1; |
30dfa90c JR |
316 | |
317 | list_for_each_entry(entry, &bucket->list, list) { | |
c6a21d0b | 318 | if (!match(ref, entry)) |
7caf6a49 JR |
319 | continue; |
320 | ||
321 | /* | |
322 | * Some drivers map the same physical address multiple | |
323 | * times. Without a hardware IOMMU this results in the | |
324 | * same device addresses being put into the dma-debug | |
325 | * hash multiple times too. This can result in false | |
af901ca1 | 326 | * positives being reported. Therefore we implement a |
7caf6a49 JR |
327 | * best-fit algorithm here which returns the entry from |
328 | * the hash which fits best to the reference value | |
329 | * instead of the first-fit. | |
330 | */ | |
331 | matches += 1; | |
332 | match_lvl = 0; | |
e5e8c5b9 JR |
333 | entry->size == ref->size ? ++match_lvl : 0; |
334 | entry->type == ref->type ? ++match_lvl : 0; | |
335 | entry->direction == ref->direction ? ++match_lvl : 0; | |
336 | entry->sg_call_ents == ref->sg_call_ents ? ++match_lvl : 0; | |
7caf6a49 | 337 | |
e5e8c5b9 | 338 | if (match_lvl == 4) { |
7caf6a49 | 339 | /* perfect-fit - return the result */ |
30dfa90c | 340 | return entry; |
7caf6a49 JR |
341 | } else if (match_lvl > last_lvl) { |
342 | /* | |
343 | * We found an entry that fits better then the | |
fe73fbe1 | 344 | * previous one or it is the 1st match. |
7caf6a49 JR |
345 | */ |
346 | last_lvl = match_lvl; | |
347 | ret = entry; | |
348 | } | |
30dfa90c JR |
349 | } |
350 | ||
7caf6a49 JR |
351 | /* |
352 | * If we have multiple matches but no perfect-fit, just return | |
353 | * NULL. | |
354 | */ | |
355 | ret = (matches == 1) ? ret : NULL; | |
356 | ||
357 | return ret; | |
30dfa90c JR |
358 | } |
359 | ||
c6a21d0b NH |
360 | static struct dma_debug_entry *bucket_find_exact(struct hash_bucket *bucket, |
361 | struct dma_debug_entry *ref) | |
362 | { | |
363 | return __hash_bucket_find(bucket, ref, exact_match); | |
364 | } | |
365 | ||
366 | static struct dma_debug_entry *bucket_find_contain(struct hash_bucket **bucket, | |
367 | struct dma_debug_entry *ref, | |
368 | unsigned long *flags) | |
369 | { | |
370 | ||
371 | unsigned int max_range = dma_get_max_seg_size(ref->dev); | |
372 | struct dma_debug_entry *entry, index = *ref; | |
373 | unsigned int range = 0; | |
374 | ||
375 | while (range <= max_range) { | |
a7a2c02a | 376 | entry = __hash_bucket_find(*bucket, ref, containing_match); |
c6a21d0b NH |
377 | |
378 | if (entry) | |
379 | return entry; | |
380 | ||
381 | /* | |
382 | * Nothing found, go back a hash bucket | |
383 | */ | |
384 | put_hash_bucket(*bucket, flags); | |
385 | range += (1 << HASH_FN_SHIFT); | |
386 | index.dev_addr -= (1 << HASH_FN_SHIFT); | |
387 | *bucket = get_hash_bucket(&index, flags); | |
388 | } | |
389 | ||
390 | return NULL; | |
391 | } | |
392 | ||
30dfa90c JR |
393 | /* |
394 | * Add an entry to a hash bucket | |
395 | */ | |
396 | static void hash_bucket_add(struct hash_bucket *bucket, | |
397 | struct dma_debug_entry *entry) | |
398 | { | |
399 | list_add_tail(&entry->list, &bucket->list); | |
400 | } | |
401 | ||
402 | /* | |
403 | * Remove entry from a hash bucket list | |
404 | */ | |
405 | static void hash_bucket_del(struct dma_debug_entry *entry) | |
406 | { | |
407 | list_del(&entry->list); | |
408 | } | |
409 | ||
0abdd7a8 DW |
410 | static unsigned long long phys_addr(struct dma_debug_entry *entry) |
411 | { | |
0e74b34d NS |
412 | if (entry->type == dma_debug_resource) |
413 | return __pfn_to_phys(entry->pfn) + entry->offset; | |
414 | ||
0abdd7a8 DW |
415 | return page_to_phys(pfn_to_page(entry->pfn)) + entry->offset; |
416 | } | |
417 | ||
ac26c18b DW |
418 | /* |
419 | * Dump mapping entries for debugging purposes | |
420 | */ | |
421 | void debug_dma_dump_mappings(struct device *dev) | |
422 | { | |
423 | int idx; | |
424 | ||
425 | for (idx = 0; idx < HASH_SIZE; idx++) { | |
426 | struct hash_bucket *bucket = &dma_entry_hash[idx]; | |
427 | struct dma_debug_entry *entry; | |
428 | unsigned long flags; | |
429 | ||
430 | spin_lock_irqsave(&bucket->lock, flags); | |
431 | ||
432 | list_for_each_entry(entry, &bucket->list, list) { | |
433 | if (!dev || dev == entry->dev) { | |
434 | dev_info(entry->dev, | |
0abdd7a8 | 435 | "%s idx %d P=%Lx N=%lx D=%Lx L=%Lx %s %s\n", |
ac26c18b | 436 | type2name[entry->type], idx, |
0abdd7a8 | 437 | phys_addr(entry), entry->pfn, |
ac26c18b | 438 | entry->dev_addr, entry->size, |
6c9c6d63 SK |
439 | dir2name[entry->direction], |
440 | maperr2str[entry->map_err_type]); | |
ac26c18b DW |
441 | } |
442 | } | |
443 | ||
444 | spin_unlock_irqrestore(&bucket->lock, flags); | |
445 | } | |
446 | } | |
ac26c18b | 447 | |
0abdd7a8 | 448 | /* |
3b7a6418 DW |
449 | * For each mapping (initial cacheline in the case of |
450 | * dma_alloc_coherent/dma_map_page, initial cacheline in each page of a | |
451 | * scatterlist, or the cacheline specified in dma_map_single) insert | |
452 | * into this tree using the cacheline as the key. At | |
0abdd7a8 | 453 | * dma_unmap_{single|sg|page} or dma_free_coherent delete the entry. If |
3b7a6418 | 454 | * the entry already exists at insertion time add a tag as a reference |
0abdd7a8 | 455 | * count for the overlapping mappings. For now, the overlap tracking |
3b7a6418 DW |
456 | * just ensures that 'unmaps' balance 'maps' before marking the |
457 | * cacheline idle, but we should also be flagging overlaps as an API | |
458 | * violation. | |
0abdd7a8 DW |
459 | * |
460 | * Memory usage is mostly constrained by the maximum number of available | |
461 | * dma-debug entries in that we need a free dma_debug_entry before | |
3b7a6418 DW |
462 | * inserting into the tree. In the case of dma_map_page and |
463 | * dma_alloc_coherent there is only one dma_debug_entry and one | |
464 | * dma_active_cacheline entry to track per event. dma_map_sg(), on the | |
465 | * other hand, consumes a single dma_debug_entry, but inserts 'nents' | |
466 | * entries into the tree. | |
0abdd7a8 DW |
467 | * |
468 | * At any time debug_dma_assert_idle() can be called to trigger a | |
3b7a6418 | 469 | * warning if any cachelines in the given page are in the active set. |
0abdd7a8 | 470 | */ |
3b7a6418 | 471 | static RADIX_TREE(dma_active_cacheline, GFP_NOWAIT); |
0abdd7a8 | 472 | static DEFINE_SPINLOCK(radix_lock); |
3b7a6418 DW |
473 | #define ACTIVE_CACHELINE_MAX_OVERLAP ((1 << RADIX_TREE_MAX_TAGS) - 1) |
474 | #define CACHELINE_PER_PAGE_SHIFT (PAGE_SHIFT - L1_CACHE_SHIFT) | |
475 | #define CACHELINES_PER_PAGE (1 << CACHELINE_PER_PAGE_SHIFT) | |
0abdd7a8 | 476 | |
3b7a6418 DW |
477 | static phys_addr_t to_cacheline_number(struct dma_debug_entry *entry) |
478 | { | |
479 | return (entry->pfn << CACHELINE_PER_PAGE_SHIFT) + | |
480 | (entry->offset >> L1_CACHE_SHIFT); | |
481 | } | |
482 | ||
483 | static int active_cacheline_read_overlap(phys_addr_t cln) | |
0abdd7a8 DW |
484 | { |
485 | int overlap = 0, i; | |
486 | ||
487 | for (i = RADIX_TREE_MAX_TAGS - 1; i >= 0; i--) | |
3b7a6418 | 488 | if (radix_tree_tag_get(&dma_active_cacheline, cln, i)) |
0abdd7a8 DW |
489 | overlap |= 1 << i; |
490 | return overlap; | |
491 | } | |
492 | ||
3b7a6418 | 493 | static int active_cacheline_set_overlap(phys_addr_t cln, int overlap) |
0abdd7a8 DW |
494 | { |
495 | int i; | |
496 | ||
3b7a6418 | 497 | if (overlap > ACTIVE_CACHELINE_MAX_OVERLAP || overlap < 0) |
59f2e7df | 498 | return overlap; |
0abdd7a8 DW |
499 | |
500 | for (i = RADIX_TREE_MAX_TAGS - 1; i >= 0; i--) | |
501 | if (overlap & 1 << i) | |
3b7a6418 | 502 | radix_tree_tag_set(&dma_active_cacheline, cln, i); |
0abdd7a8 | 503 | else |
3b7a6418 | 504 | radix_tree_tag_clear(&dma_active_cacheline, cln, i); |
0abdd7a8 DW |
505 | |
506 | return overlap; | |
507 | } | |
508 | ||
3b7a6418 | 509 | static void active_cacheline_inc_overlap(phys_addr_t cln) |
0abdd7a8 | 510 | { |
3b7a6418 | 511 | int overlap = active_cacheline_read_overlap(cln); |
0abdd7a8 | 512 | |
3b7a6418 | 513 | overlap = active_cacheline_set_overlap(cln, ++overlap); |
0abdd7a8 DW |
514 | |
515 | /* If we overflowed the overlap counter then we're potentially | |
516 | * leaking dma-mappings. Otherwise, if maps and unmaps are | |
517 | * balanced then this overflow may cause false negatives in | |
3b7a6418 | 518 | * debug_dma_assert_idle() as the cacheline may be marked idle |
0abdd7a8 DW |
519 | * prematurely. |
520 | */ | |
3b7a6418 DW |
521 | WARN_ONCE(overlap > ACTIVE_CACHELINE_MAX_OVERLAP, |
522 | "DMA-API: exceeded %d overlapping mappings of cacheline %pa\n", | |
523 | ACTIVE_CACHELINE_MAX_OVERLAP, &cln); | |
0abdd7a8 DW |
524 | } |
525 | ||
3b7a6418 | 526 | static int active_cacheline_dec_overlap(phys_addr_t cln) |
0abdd7a8 | 527 | { |
3b7a6418 | 528 | int overlap = active_cacheline_read_overlap(cln); |
0abdd7a8 | 529 | |
3b7a6418 | 530 | return active_cacheline_set_overlap(cln, --overlap); |
0abdd7a8 DW |
531 | } |
532 | ||
3b7a6418 | 533 | static int active_cacheline_insert(struct dma_debug_entry *entry) |
0abdd7a8 | 534 | { |
3b7a6418 | 535 | phys_addr_t cln = to_cacheline_number(entry); |
0abdd7a8 DW |
536 | unsigned long flags; |
537 | int rc; | |
538 | ||
3b7a6418 DW |
539 | /* If the device is not writing memory then we don't have any |
540 | * concerns about the cpu consuming stale data. This mitigates | |
541 | * legitimate usages of overlapping mappings. | |
542 | */ | |
543 | if (entry->direction == DMA_TO_DEVICE) | |
544 | return 0; | |
545 | ||
0abdd7a8 | 546 | spin_lock_irqsave(&radix_lock, flags); |
3b7a6418 | 547 | rc = radix_tree_insert(&dma_active_cacheline, cln, entry); |
0abdd7a8 | 548 | if (rc == -EEXIST) |
3b7a6418 | 549 | active_cacheline_inc_overlap(cln); |
0abdd7a8 DW |
550 | spin_unlock_irqrestore(&radix_lock, flags); |
551 | ||
552 | return rc; | |
553 | } | |
554 | ||
3b7a6418 | 555 | static void active_cacheline_remove(struct dma_debug_entry *entry) |
0abdd7a8 | 556 | { |
3b7a6418 | 557 | phys_addr_t cln = to_cacheline_number(entry); |
0abdd7a8 DW |
558 | unsigned long flags; |
559 | ||
3b7a6418 DW |
560 | /* ...mirror the insert case */ |
561 | if (entry->direction == DMA_TO_DEVICE) | |
562 | return; | |
563 | ||
0abdd7a8 | 564 | spin_lock_irqsave(&radix_lock, flags); |
59f2e7df | 565 | /* since we are counting overlaps the final put of the |
3b7a6418 DW |
566 | * cacheline will occur when the overlap count is 0. |
567 | * active_cacheline_dec_overlap() returns -1 in that case | |
59f2e7df | 568 | */ |
3b7a6418 DW |
569 | if (active_cacheline_dec_overlap(cln) < 0) |
570 | radix_tree_delete(&dma_active_cacheline, cln); | |
0abdd7a8 DW |
571 | spin_unlock_irqrestore(&radix_lock, flags); |
572 | } | |
573 | ||
574 | /** | |
575 | * debug_dma_assert_idle() - assert that a page is not undergoing dma | |
3b7a6418 | 576 | * @page: page to lookup in the dma_active_cacheline tree |
0abdd7a8 DW |
577 | * |
578 | * Place a call to this routine in cases where the cpu touching the page | |
579 | * before the dma completes (page is dma_unmapped) will lead to data | |
580 | * corruption. | |
581 | */ | |
582 | void debug_dma_assert_idle(struct page *page) | |
583 | { | |
3b7a6418 DW |
584 | static struct dma_debug_entry *ents[CACHELINES_PER_PAGE]; |
585 | struct dma_debug_entry *entry = NULL; | |
586 | void **results = (void **) &ents; | |
587 | unsigned int nents, i; | |
0abdd7a8 | 588 | unsigned long flags; |
3b7a6418 | 589 | phys_addr_t cln; |
0abdd7a8 | 590 | |
c9d120b0 HE |
591 | if (dma_debug_disabled()) |
592 | return; | |
593 | ||
0abdd7a8 DW |
594 | if (!page) |
595 | return; | |
596 | ||
3b7a6418 | 597 | cln = (phys_addr_t) page_to_pfn(page) << CACHELINE_PER_PAGE_SHIFT; |
0abdd7a8 | 598 | spin_lock_irqsave(&radix_lock, flags); |
3b7a6418 DW |
599 | nents = radix_tree_gang_lookup(&dma_active_cacheline, results, cln, |
600 | CACHELINES_PER_PAGE); | |
601 | for (i = 0; i < nents; i++) { | |
602 | phys_addr_t ent_cln = to_cacheline_number(ents[i]); | |
603 | ||
604 | if (ent_cln == cln) { | |
605 | entry = ents[i]; | |
606 | break; | |
607 | } else if (ent_cln >= cln + CACHELINES_PER_PAGE) | |
608 | break; | |
609 | } | |
0abdd7a8 DW |
610 | spin_unlock_irqrestore(&radix_lock, flags); |
611 | ||
612 | if (!entry) | |
613 | return; | |
614 | ||
3b7a6418 | 615 | cln = to_cacheline_number(entry); |
0abdd7a8 | 616 | err_printk(entry->dev, entry, |
3b7a6418 DW |
617 | "DMA-API: cpu touching an active dma mapped cacheline [cln=%pa]\n", |
618 | &cln); | |
0abdd7a8 DW |
619 | } |
620 | ||
30dfa90c JR |
621 | /* |
622 | * Wrapper function for adding an entry to the hash. | |
623 | * This function takes care of locking itself. | |
624 | */ | |
625 | static void add_dma_entry(struct dma_debug_entry *entry) | |
626 | { | |
627 | struct hash_bucket *bucket; | |
628 | unsigned long flags; | |
0abdd7a8 | 629 | int rc; |
30dfa90c JR |
630 | |
631 | bucket = get_hash_bucket(entry, &flags); | |
632 | hash_bucket_add(bucket, entry); | |
633 | put_hash_bucket(bucket, &flags); | |
0abdd7a8 | 634 | |
3b7a6418 | 635 | rc = active_cacheline_insert(entry); |
0abdd7a8 | 636 | if (rc == -ENOMEM) { |
3b7a6418 | 637 | pr_err("DMA-API: cacheline tracking ENOMEM, dma-debug disabled\n"); |
0abdd7a8 DW |
638 | global_disable = true; |
639 | } | |
640 | ||
641 | /* TODO: report -EEXIST errors here as overlapping mappings are | |
642 | * not supported by the DMA API | |
643 | */ | |
30dfa90c JR |
644 | } |
645 | ||
e6a1a89d FT |
646 | static struct dma_debug_entry *__dma_entry_alloc(void) |
647 | { | |
648 | struct dma_debug_entry *entry; | |
649 | ||
650 | entry = list_entry(free_entries.next, struct dma_debug_entry, list); | |
651 | list_del(&entry->list); | |
652 | memset(entry, 0, sizeof(*entry)); | |
653 | ||
654 | num_free_entries -= 1; | |
655 | if (num_free_entries < min_free_entries) | |
656 | min_free_entries = num_free_entries; | |
657 | ||
658 | return entry; | |
659 | } | |
660 | ||
3b1e79ed JR |
661 | /* struct dma_entry allocator |
662 | * | |
663 | * The next two functions implement the allocator for | |
664 | * struct dma_debug_entries. | |
665 | */ | |
666 | static struct dma_debug_entry *dma_entry_alloc(void) | |
667 | { | |
29cdd4e4 | 668 | struct dma_debug_entry *entry; |
3b1e79ed JR |
669 | unsigned long flags; |
670 | ||
671 | spin_lock_irqsave(&free_entries_lock, flags); | |
672 | ||
673 | if (list_empty(&free_entries)) { | |
3b1e79ed | 674 | global_disable = true; |
29cdd4e4 | 675 | spin_unlock_irqrestore(&free_entries_lock, flags); |
3017cd63 | 676 | pr_err("DMA-API: debugging out of memory - disabling\n"); |
29cdd4e4 | 677 | return NULL; |
3b1e79ed JR |
678 | } |
679 | ||
e6a1a89d | 680 | entry = __dma_entry_alloc(); |
3b1e79ed | 681 | |
29cdd4e4 JK |
682 | spin_unlock_irqrestore(&free_entries_lock, flags); |
683 | ||
6c132d1b DW |
684 | #ifdef CONFIG_STACKTRACE |
685 | entry->stacktrace.max_entries = DMA_DEBUG_STACKTRACE_ENTRIES; | |
686 | entry->stacktrace.entries = entry->st_entries; | |
687 | entry->stacktrace.skip = 2; | |
688 | save_stack_trace(&entry->stacktrace); | |
689 | #endif | |
3b1e79ed | 690 | |
3b1e79ed JR |
691 | return entry; |
692 | } | |
693 | ||
694 | static void dma_entry_free(struct dma_debug_entry *entry) | |
695 | { | |
696 | unsigned long flags; | |
697 | ||
3b7a6418 | 698 | active_cacheline_remove(entry); |
0abdd7a8 | 699 | |
3b1e79ed JR |
700 | /* |
701 | * add to beginning of the list - this way the entries are | |
702 | * more likely cache hot when they are reallocated. | |
703 | */ | |
704 | spin_lock_irqsave(&free_entries_lock, flags); | |
705 | list_add(&entry->list, &free_entries); | |
706 | num_free_entries += 1; | |
707 | spin_unlock_irqrestore(&free_entries_lock, flags); | |
708 | } | |
709 | ||
e6a1a89d FT |
710 | int dma_debug_resize_entries(u32 num_entries) |
711 | { | |
712 | int i, delta, ret = 0; | |
713 | unsigned long flags; | |
714 | struct dma_debug_entry *entry; | |
715 | LIST_HEAD(tmp); | |
716 | ||
717 | spin_lock_irqsave(&free_entries_lock, flags); | |
718 | ||
719 | if (nr_total_entries < num_entries) { | |
720 | delta = num_entries - nr_total_entries; | |
721 | ||
722 | spin_unlock_irqrestore(&free_entries_lock, flags); | |
723 | ||
724 | for (i = 0; i < delta; i++) { | |
725 | entry = kzalloc(sizeof(*entry), GFP_KERNEL); | |
726 | if (!entry) | |
727 | break; | |
728 | ||
729 | list_add_tail(&entry->list, &tmp); | |
730 | } | |
731 | ||
732 | spin_lock_irqsave(&free_entries_lock, flags); | |
733 | ||
734 | list_splice(&tmp, &free_entries); | |
735 | nr_total_entries += i; | |
736 | num_free_entries += i; | |
737 | } else { | |
738 | delta = nr_total_entries - num_entries; | |
739 | ||
740 | for (i = 0; i < delta && !list_empty(&free_entries); i++) { | |
741 | entry = __dma_entry_alloc(); | |
742 | kfree(entry); | |
743 | } | |
744 | ||
745 | nr_total_entries -= i; | |
746 | } | |
747 | ||
748 | if (nr_total_entries != num_entries) | |
749 | ret = 1; | |
750 | ||
751 | spin_unlock_irqrestore(&free_entries_lock, flags); | |
752 | ||
753 | return ret; | |
754 | } | |
e6a1a89d | 755 | |
6bf07871 JR |
756 | /* |
757 | * DMA-API debugging init code | |
758 | * | |
759 | * The init code does two things: | |
760 | * 1. Initialize core data structures | |
761 | * 2. Preallocate a given number of dma_debug_entry structs | |
762 | */ | |
763 | ||
764 | static int prealloc_memory(u32 num_entries) | |
765 | { | |
766 | struct dma_debug_entry *entry, *next_entry; | |
767 | int i; | |
768 | ||
769 | for (i = 0; i < num_entries; ++i) { | |
770 | entry = kzalloc(sizeof(*entry), GFP_KERNEL); | |
771 | if (!entry) | |
772 | goto out_err; | |
773 | ||
774 | list_add_tail(&entry->list, &free_entries); | |
775 | } | |
776 | ||
777 | num_free_entries = num_entries; | |
778 | min_free_entries = num_entries; | |
779 | ||
e7ed70ee | 780 | pr_info("DMA-API: preallocated %d debug entries\n", num_entries); |
6bf07871 JR |
781 | |
782 | return 0; | |
783 | ||
784 | out_err: | |
785 | ||
786 | list_for_each_entry_safe(entry, next_entry, &free_entries, list) { | |
787 | list_del(&entry->list); | |
788 | kfree(entry); | |
789 | } | |
790 | ||
791 | return -ENOMEM; | |
792 | } | |
793 | ||
8a6fc708 JR |
794 | static ssize_t filter_read(struct file *file, char __user *user_buf, |
795 | size_t count, loff_t *ppos) | |
796 | { | |
8a6fc708 | 797 | char buf[NAME_MAX_LEN + 1]; |
c17e2cf7 | 798 | unsigned long flags; |
8a6fc708 JR |
799 | int len; |
800 | ||
801 | if (!current_driver_name[0]) | |
802 | return 0; | |
803 | ||
804 | /* | |
805 | * We can't copy to userspace directly because current_driver_name can | |
806 | * only be read under the driver_name_lock with irqs disabled. So | |
807 | * create a temporary copy first. | |
808 | */ | |
809 | read_lock_irqsave(&driver_name_lock, flags); | |
810 | len = scnprintf(buf, NAME_MAX_LEN + 1, "%s\n", current_driver_name); | |
811 | read_unlock_irqrestore(&driver_name_lock, flags); | |
812 | ||
813 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | |
814 | } | |
815 | ||
816 | static ssize_t filter_write(struct file *file, const char __user *userbuf, | |
817 | size_t count, loff_t *ppos) | |
818 | { | |
8a6fc708 | 819 | char buf[NAME_MAX_LEN]; |
c17e2cf7 JR |
820 | unsigned long flags; |
821 | size_t len; | |
8a6fc708 JR |
822 | int i; |
823 | ||
824 | /* | |
825 | * We can't copy from userspace directly. Access to | |
826 | * current_driver_name is protected with a write_lock with irqs | |
827 | * disabled. Since copy_from_user can fault and may sleep we | |
828 | * need to copy to temporary buffer first | |
829 | */ | |
e7ed70ee | 830 | len = min(count, (size_t)(NAME_MAX_LEN - 1)); |
8a6fc708 JR |
831 | if (copy_from_user(buf, userbuf, len)) |
832 | return -EFAULT; | |
833 | ||
834 | buf[len] = 0; | |
835 | ||
836 | write_lock_irqsave(&driver_name_lock, flags); | |
837 | ||
31232509 JR |
838 | /* |
839 | * Now handle the string we got from userspace very carefully. | |
8a6fc708 JR |
840 | * The rules are: |
841 | * - only use the first token we got | |
842 | * - token delimiter is everything looking like a space | |
843 | * character (' ', '\n', '\t' ...) | |
844 | * | |
845 | */ | |
846 | if (!isalnum(buf[0])) { | |
847 | /* | |
31232509 | 848 | * If the first character userspace gave us is not |
8a6fc708 JR |
849 | * alphanumerical then assume the filter should be |
850 | * switched off. | |
851 | */ | |
852 | if (current_driver_name[0]) | |
e7ed70ee | 853 | pr_info("DMA-API: switching off dma-debug driver filter\n"); |
8a6fc708 JR |
854 | current_driver_name[0] = 0; |
855 | current_driver = NULL; | |
856 | goto out_unlock; | |
857 | } | |
858 | ||
859 | /* | |
860 | * Now parse out the first token and use it as the name for the | |
861 | * driver to filter for. | |
862 | */ | |
39a37ce1 | 863 | for (i = 0; i < NAME_MAX_LEN - 1; ++i) { |
8a6fc708 JR |
864 | current_driver_name[i] = buf[i]; |
865 | if (isspace(buf[i]) || buf[i] == ' ' || buf[i] == 0) | |
866 | break; | |
867 | } | |
868 | current_driver_name[i] = 0; | |
869 | current_driver = NULL; | |
870 | ||
e7ed70ee JR |
871 | pr_info("DMA-API: enable driver filter for driver [%s]\n", |
872 | current_driver_name); | |
8a6fc708 JR |
873 | |
874 | out_unlock: | |
875 | write_unlock_irqrestore(&driver_name_lock, flags); | |
876 | ||
877 | return count; | |
878 | } | |
879 | ||
aeb583d0 | 880 | static const struct file_operations filter_fops = { |
8a6fc708 JR |
881 | .read = filter_read, |
882 | .write = filter_write, | |
6038f373 | 883 | .llseek = default_llseek, |
8a6fc708 JR |
884 | }; |
885 | ||
788dcfa6 JR |
886 | static int dma_debug_fs_init(void) |
887 | { | |
888 | dma_debug_dent = debugfs_create_dir("dma-api", NULL); | |
889 | if (!dma_debug_dent) { | |
e7ed70ee | 890 | pr_err("DMA-API: can not create debugfs directory\n"); |
788dcfa6 JR |
891 | return -ENOMEM; |
892 | } | |
893 | ||
894 | global_disable_dent = debugfs_create_bool("disabled", 0444, | |
895 | dma_debug_dent, | |
68ee6d22 | 896 | &global_disable); |
788dcfa6 JR |
897 | if (!global_disable_dent) |
898 | goto out_err; | |
899 | ||
900 | error_count_dent = debugfs_create_u32("error_count", 0444, | |
901 | dma_debug_dent, &error_count); | |
902 | if (!error_count_dent) | |
903 | goto out_err; | |
904 | ||
905 | show_all_errors_dent = debugfs_create_u32("all_errors", 0644, | |
906 | dma_debug_dent, | |
907 | &show_all_errors); | |
908 | if (!show_all_errors_dent) | |
909 | goto out_err; | |
910 | ||
911 | show_num_errors_dent = debugfs_create_u32("num_errors", 0644, | |
912 | dma_debug_dent, | |
913 | &show_num_errors); | |
914 | if (!show_num_errors_dent) | |
915 | goto out_err; | |
916 | ||
917 | num_free_entries_dent = debugfs_create_u32("num_free_entries", 0444, | |
918 | dma_debug_dent, | |
919 | &num_free_entries); | |
920 | if (!num_free_entries_dent) | |
921 | goto out_err; | |
922 | ||
923 | min_free_entries_dent = debugfs_create_u32("min_free_entries", 0444, | |
924 | dma_debug_dent, | |
925 | &min_free_entries); | |
926 | if (!min_free_entries_dent) | |
927 | goto out_err; | |
928 | ||
8a6fc708 JR |
929 | filter_dent = debugfs_create_file("driver_filter", 0644, |
930 | dma_debug_dent, NULL, &filter_fops); | |
931 | if (!filter_dent) | |
932 | goto out_err; | |
933 | ||
788dcfa6 JR |
934 | return 0; |
935 | ||
936 | out_err: | |
937 | debugfs_remove_recursive(dma_debug_dent); | |
938 | ||
939 | return -ENOMEM; | |
940 | } | |
941 | ||
ba4b87ad | 942 | static int device_dma_allocations(struct device *dev, struct dma_debug_entry **out_entry) |
ed888aef JR |
943 | { |
944 | struct dma_debug_entry *entry; | |
945 | unsigned long flags; | |
946 | int count = 0, i; | |
947 | ||
948 | for (i = 0; i < HASH_SIZE; ++i) { | |
6a5cd60b | 949 | spin_lock_irqsave(&dma_entry_hash[i].lock, flags); |
ed888aef | 950 | list_for_each_entry(entry, &dma_entry_hash[i].list, list) { |
ba4b87ad | 951 | if (entry->dev == dev) { |
ed888aef | 952 | count += 1; |
ba4b87ad SG |
953 | *out_entry = entry; |
954 | } | |
ed888aef | 955 | } |
6a5cd60b | 956 | spin_unlock_irqrestore(&dma_entry_hash[i].lock, flags); |
ed888aef JR |
957 | } |
958 | ||
959 | return count; | |
960 | } | |
961 | ||
a8fe9ea2 | 962 | static int dma_debug_device_change(struct notifier_block *nb, unsigned long action, void *data) |
ed888aef JR |
963 | { |
964 | struct device *dev = data; | |
ba4b87ad | 965 | struct dma_debug_entry *uninitialized_var(entry); |
ed888aef JR |
966 | int count; |
967 | ||
01ce18b3 | 968 | if (dma_debug_disabled()) |
a8fe9ea2 | 969 | return 0; |
ed888aef JR |
970 | |
971 | switch (action) { | |
972 | case BUS_NOTIFY_UNBOUND_DRIVER: | |
ba4b87ad | 973 | count = device_dma_allocations(dev, &entry); |
ed888aef JR |
974 | if (count == 0) |
975 | break; | |
ba4b87ad | 976 | err_printk(dev, entry, "DMA-API: device driver has pending " |
ed888aef | 977 | "DMA allocations while released from device " |
ba4b87ad SG |
978 | "[count=%d]\n" |
979 | "One of leaked entries details: " | |
980 | "[device address=0x%016llx] [size=%llu bytes] " | |
981 | "[mapped with %s] [mapped as %s]\n", | |
982 | count, entry->dev_addr, entry->size, | |
983 | dir2name[entry->direction], type2name[entry->type]); | |
ed888aef JR |
984 | break; |
985 | default: | |
986 | break; | |
987 | } | |
988 | ||
989 | return 0; | |
990 | } | |
991 | ||
41531c8f JR |
992 | void dma_debug_add_bus(struct bus_type *bus) |
993 | { | |
ed888aef JR |
994 | struct notifier_block *nb; |
995 | ||
01ce18b3 | 996 | if (dma_debug_disabled()) |
f797d988 SR |
997 | return; |
998 | ||
ed888aef JR |
999 | nb = kzalloc(sizeof(struct notifier_block), GFP_KERNEL); |
1000 | if (nb == NULL) { | |
e7ed70ee | 1001 | pr_err("dma_debug_add_bus: out of memory\n"); |
ed888aef JR |
1002 | return; |
1003 | } | |
1004 | ||
1005 | nb->notifier_call = dma_debug_device_change; | |
1006 | ||
1007 | bus_register_notifier(bus, nb); | |
41531c8f | 1008 | } |
788dcfa6 | 1009 | |
15b28bbc | 1010 | static int dma_debug_init(void) |
6bf07871 JR |
1011 | { |
1012 | int i; | |
1013 | ||
2ce8e7ed FF |
1014 | /* Do not use dma_debug_initialized here, since we really want to be |
1015 | * called to set dma_debug_initialized | |
1016 | */ | |
1017 | if (global_disable) | |
15b28bbc | 1018 | return 0; |
6bf07871 JR |
1019 | |
1020 | for (i = 0; i < HASH_SIZE; ++i) { | |
1021 | INIT_LIST_HEAD(&dma_entry_hash[i].list); | |
b0a5b83e | 1022 | spin_lock_init(&dma_entry_hash[i].lock); |
6bf07871 JR |
1023 | } |
1024 | ||
788dcfa6 | 1025 | if (dma_debug_fs_init() != 0) { |
e7ed70ee | 1026 | pr_err("DMA-API: error creating debugfs entries - disabling\n"); |
788dcfa6 JR |
1027 | global_disable = true; |
1028 | ||
15b28bbc | 1029 | return 0; |
788dcfa6 JR |
1030 | } |
1031 | ||
bcebe324 | 1032 | if (prealloc_memory(nr_prealloc_entries) != 0) { |
e7ed70ee | 1033 | pr_err("DMA-API: debugging out of memory error - disabled\n"); |
6bf07871 JR |
1034 | global_disable = true; |
1035 | ||
15b28bbc | 1036 | return 0; |
6bf07871 JR |
1037 | } |
1038 | ||
e6a1a89d FT |
1039 | nr_total_entries = num_free_entries; |
1040 | ||
2ce8e7ed FF |
1041 | dma_debug_initialized = true; |
1042 | ||
e7ed70ee | 1043 | pr_info("DMA-API: debugging enabled by kernel config\n"); |
15b28bbc | 1044 | return 0; |
6bf07871 | 1045 | } |
15b28bbc | 1046 | core_initcall(dma_debug_init); |
6bf07871 | 1047 | |
59d3daaf JR |
1048 | static __init int dma_debug_cmdline(char *str) |
1049 | { | |
1050 | if (!str) | |
1051 | return -EINVAL; | |
1052 | ||
1053 | if (strncmp(str, "off", 3) == 0) { | |
e7ed70ee | 1054 | pr_info("DMA-API: debugging disabled on kernel command line\n"); |
59d3daaf JR |
1055 | global_disable = true; |
1056 | } | |
1057 | ||
1058 | return 0; | |
1059 | } | |
1060 | ||
1061 | static __init int dma_debug_entries_cmdline(char *str) | |
1062 | { | |
59d3daaf JR |
1063 | if (!str) |
1064 | return -EINVAL; | |
bcebe324 CH |
1065 | if (!get_option(&str, &nr_prealloc_entries)) |
1066 | nr_prealloc_entries = PREALLOC_DMA_DEBUG_ENTRIES; | |
59d3daaf JR |
1067 | return 0; |
1068 | } | |
1069 | ||
1070 | __setup("dma_debug=", dma_debug_cmdline); | |
1071 | __setup("dma_debug_entries=", dma_debug_entries_cmdline); | |
1072 | ||
2d62ece1 JR |
1073 | static void check_unmap(struct dma_debug_entry *ref) |
1074 | { | |
1075 | struct dma_debug_entry *entry; | |
1076 | struct hash_bucket *bucket; | |
1077 | unsigned long flags; | |
1078 | ||
2d62ece1 | 1079 | bucket = get_hash_bucket(ref, &flags); |
c6a21d0b | 1080 | entry = bucket_find_exact(bucket, ref); |
2d62ece1 JR |
1081 | |
1082 | if (!entry) { | |
8d640a51 AD |
1083 | /* must drop lock before calling dma_mapping_error */ |
1084 | put_hash_bucket(bucket, &flags); | |
1085 | ||
bfe0fb0f SK |
1086 | if (dma_mapping_error(ref->dev, ref->dev_addr)) { |
1087 | err_printk(ref->dev, NULL, | |
8d640a51 AD |
1088 | "DMA-API: device driver tries to free an " |
1089 | "invalid DMA memory address\n"); | |
1090 | } else { | |
1091 | err_printk(ref->dev, NULL, | |
1092 | "DMA-API: device driver tries to free DMA " | |
1093 | "memory it has not allocated [device " | |
1094 | "address=0x%016llx] [size=%llu bytes]\n", | |
1095 | ref->dev_addr, ref->size); | |
bfe0fb0f | 1096 | } |
8d640a51 | 1097 | return; |
2d62ece1 JR |
1098 | } |
1099 | ||
1100 | if (ref->size != entry->size) { | |
6c132d1b | 1101 | err_printk(ref->dev, entry, "DMA-API: device driver frees " |
2d62ece1 JR |
1102 | "DMA memory with different size " |
1103 | "[device address=0x%016llx] [map size=%llu bytes] " | |
1104 | "[unmap size=%llu bytes]\n", | |
1105 | ref->dev_addr, entry->size, ref->size); | |
1106 | } | |
1107 | ||
1108 | if (ref->type != entry->type) { | |
6c132d1b | 1109 | err_printk(ref->dev, entry, "DMA-API: device driver frees " |
2d62ece1 JR |
1110 | "DMA memory with wrong function " |
1111 | "[device address=0x%016llx] [size=%llu bytes] " | |
1112 | "[mapped as %s] [unmapped as %s]\n", | |
1113 | ref->dev_addr, ref->size, | |
1114 | type2name[entry->type], type2name[ref->type]); | |
1115 | } else if ((entry->type == dma_debug_coherent) && | |
0abdd7a8 | 1116 | (phys_addr(ref) != phys_addr(entry))) { |
6c132d1b | 1117 | err_printk(ref->dev, entry, "DMA-API: device driver frees " |
2d62ece1 JR |
1118 | "DMA memory with different CPU address " |
1119 | "[device address=0x%016llx] [size=%llu bytes] " | |
59a40e70 JR |
1120 | "[cpu alloc address=0x%016llx] " |
1121 | "[cpu free address=0x%016llx]", | |
2d62ece1 | 1122 | ref->dev_addr, ref->size, |
0abdd7a8 DW |
1123 | phys_addr(entry), |
1124 | phys_addr(ref)); | |
2d62ece1 JR |
1125 | } |
1126 | ||
1127 | if (ref->sg_call_ents && ref->type == dma_debug_sg && | |
1128 | ref->sg_call_ents != entry->sg_call_ents) { | |
6c132d1b | 1129 | err_printk(ref->dev, entry, "DMA-API: device driver frees " |
2d62ece1 JR |
1130 | "DMA sg list with different entry count " |
1131 | "[map count=%d] [unmap count=%d]\n", | |
1132 | entry->sg_call_ents, ref->sg_call_ents); | |
1133 | } | |
1134 | ||
1135 | /* | |
1136 | * This may be no bug in reality - but most implementations of the | |
1137 | * DMA API don't handle this properly, so check for it here | |
1138 | */ | |
1139 | if (ref->direction != entry->direction) { | |
6c132d1b | 1140 | err_printk(ref->dev, entry, "DMA-API: device driver frees " |
2d62ece1 JR |
1141 | "DMA memory with different direction " |
1142 | "[device address=0x%016llx] [size=%llu bytes] " | |
1143 | "[mapped with %s] [unmapped with %s]\n", | |
1144 | ref->dev_addr, ref->size, | |
1145 | dir2name[entry->direction], | |
1146 | dir2name[ref->direction]); | |
1147 | } | |
1148 | ||
a5759b2b MC |
1149 | /* |
1150 | * Drivers should use dma_mapping_error() to check the returned | |
1151 | * addresses of dma_map_single() and dma_map_page(). | |
1152 | * If not, print this warning message. See Documentation/DMA-API.txt. | |
1153 | */ | |
6c9c6d63 SK |
1154 | if (entry->map_err_type == MAP_ERR_NOT_CHECKED) { |
1155 | err_printk(ref->dev, entry, | |
1156 | "DMA-API: device driver failed to check map error" | |
1157 | "[device address=0x%016llx] [size=%llu bytes] " | |
1158 | "[mapped as %s]", | |
1159 | ref->dev_addr, ref->size, | |
1160 | type2name[entry->type]); | |
1161 | } | |
1162 | ||
2d62ece1 JR |
1163 | hash_bucket_del(entry); |
1164 | dma_entry_free(entry); | |
1165 | ||
2d62ece1 JR |
1166 | put_hash_bucket(bucket, &flags); |
1167 | } | |
1168 | ||
b4a0f533 AL |
1169 | static void check_for_stack(struct device *dev, |
1170 | struct page *page, size_t offset) | |
2d62ece1 | 1171 | { |
b4a0f533 AL |
1172 | void *addr; |
1173 | struct vm_struct *stack_vm_area = task_stack_vm_area(current); | |
1174 | ||
1175 | if (!stack_vm_area) { | |
1176 | /* Stack is direct-mapped. */ | |
1177 | if (PageHighMem(page)) | |
1178 | return; | |
1179 | addr = page_address(page) + offset; | |
1180 | if (object_is_on_stack(addr)) | |
1181 | err_printk(dev, NULL, "DMA-API: device driver maps memory from stack [addr=%p]\n", addr); | |
1182 | } else { | |
1183 | /* Stack is vmalloced. */ | |
1184 | int i; | |
1185 | ||
1186 | for (i = 0; i < stack_vm_area->nr_pages; i++) { | |
1187 | if (page != stack_vm_area->pages[i]) | |
1188 | continue; | |
1189 | ||
1190 | addr = (u8 *)current->stack + i * PAGE_SIZE + offset; | |
1191 | err_printk(dev, NULL, "DMA-API: device driver maps memory from stack [probable addr=%p]\n", addr); | |
1192 | break; | |
1193 | } | |
1194 | } | |
2d62ece1 JR |
1195 | } |
1196 | ||
f39d1b97 | 1197 | static inline bool overlap(void *addr, unsigned long len, void *start, void *end) |
2e34bde1 | 1198 | { |
f39d1b97 IM |
1199 | unsigned long a1 = (unsigned long)addr; |
1200 | unsigned long b1 = a1 + len; | |
1201 | unsigned long a2 = (unsigned long)start; | |
1202 | unsigned long b2 = (unsigned long)end; | |
2e34bde1 | 1203 | |
f39d1b97 | 1204 | return !(b1 <= a2 || a1 >= b2); |
2e34bde1 JR |
1205 | } |
1206 | ||
f39d1b97 | 1207 | static void check_for_illegal_area(struct device *dev, void *addr, unsigned long len) |
2e34bde1 | 1208 | { |
ea535e41 | 1209 | if (overlap(addr, len, _stext, _etext) || |
f39d1b97 IM |
1210 | overlap(addr, len, __start_rodata, __end_rodata)) |
1211 | err_printk(dev, NULL, "DMA-API: device driver maps memory from kernel text or rodata [addr=%p] [len=%lu]\n", addr, len); | |
2e34bde1 JR |
1212 | } |
1213 | ||
aa010efb JR |
1214 | static void check_sync(struct device *dev, |
1215 | struct dma_debug_entry *ref, | |
1216 | bool to_cpu) | |
2d62ece1 | 1217 | { |
2d62ece1 JR |
1218 | struct dma_debug_entry *entry; |
1219 | struct hash_bucket *bucket; | |
1220 | unsigned long flags; | |
1221 | ||
aa010efb | 1222 | bucket = get_hash_bucket(ref, &flags); |
2d62ece1 | 1223 | |
c6a21d0b | 1224 | entry = bucket_find_contain(&bucket, ref, &flags); |
2d62ece1 JR |
1225 | |
1226 | if (!entry) { | |
6c132d1b | 1227 | err_printk(dev, NULL, "DMA-API: device driver tries " |
2d62ece1 JR |
1228 | "to sync DMA memory it has not allocated " |
1229 | "[device address=0x%016llx] [size=%llu bytes]\n", | |
aa010efb | 1230 | (unsigned long long)ref->dev_addr, ref->size); |
2d62ece1 JR |
1231 | goto out; |
1232 | } | |
1233 | ||
aa010efb | 1234 | if (ref->size > entry->size) { |
6c132d1b | 1235 | err_printk(dev, entry, "DMA-API: device driver syncs" |
2d62ece1 JR |
1236 | " DMA memory outside allocated range " |
1237 | "[device address=0x%016llx] " | |
aa010efb JR |
1238 | "[allocation size=%llu bytes] " |
1239 | "[sync offset+size=%llu]\n", | |
1240 | entry->dev_addr, entry->size, | |
1241 | ref->size); | |
2d62ece1 JR |
1242 | } |
1243 | ||
42d53b4f KH |
1244 | if (entry->direction == DMA_BIDIRECTIONAL) |
1245 | goto out; | |
1246 | ||
aa010efb | 1247 | if (ref->direction != entry->direction) { |
6c132d1b | 1248 | err_printk(dev, entry, "DMA-API: device driver syncs " |
2d62ece1 JR |
1249 | "DMA memory with different direction " |
1250 | "[device address=0x%016llx] [size=%llu bytes] " | |
1251 | "[mapped with %s] [synced with %s]\n", | |
aa010efb | 1252 | (unsigned long long)ref->dev_addr, entry->size, |
2d62ece1 | 1253 | dir2name[entry->direction], |
aa010efb | 1254 | dir2name[ref->direction]); |
2d62ece1 JR |
1255 | } |
1256 | ||
2d62ece1 | 1257 | if (to_cpu && !(entry->direction == DMA_FROM_DEVICE) && |
aa010efb | 1258 | !(ref->direction == DMA_TO_DEVICE)) |
6c132d1b | 1259 | err_printk(dev, entry, "DMA-API: device driver syncs " |
2d62ece1 JR |
1260 | "device read-only DMA memory for cpu " |
1261 | "[device address=0x%016llx] [size=%llu bytes] " | |
1262 | "[mapped with %s] [synced with %s]\n", | |
aa010efb | 1263 | (unsigned long long)ref->dev_addr, entry->size, |
2d62ece1 | 1264 | dir2name[entry->direction], |
aa010efb | 1265 | dir2name[ref->direction]); |
2d62ece1 JR |
1266 | |
1267 | if (!to_cpu && !(entry->direction == DMA_TO_DEVICE) && | |
aa010efb | 1268 | !(ref->direction == DMA_FROM_DEVICE)) |
6c132d1b | 1269 | err_printk(dev, entry, "DMA-API: device driver syncs " |
2d62ece1 JR |
1270 | "device write-only DMA memory to device " |
1271 | "[device address=0x%016llx] [size=%llu bytes] " | |
1272 | "[mapped with %s] [synced with %s]\n", | |
aa010efb | 1273 | (unsigned long long)ref->dev_addr, entry->size, |
2d62ece1 | 1274 | dir2name[entry->direction], |
aa010efb | 1275 | dir2name[ref->direction]); |
2d62ece1 | 1276 | |
7f830642 RM |
1277 | if (ref->sg_call_ents && ref->type == dma_debug_sg && |
1278 | ref->sg_call_ents != entry->sg_call_ents) { | |
1279 | err_printk(ref->dev, entry, "DMA-API: device driver syncs " | |
1280 | "DMA sg list with different entry count " | |
1281 | "[map count=%d] [sync count=%d]\n", | |
1282 | entry->sg_call_ents, ref->sg_call_ents); | |
1283 | } | |
1284 | ||
2d62ece1 JR |
1285 | out: |
1286 | put_hash_bucket(bucket, &flags); | |
2d62ece1 JR |
1287 | } |
1288 | ||
78c47830 RM |
1289 | static void check_sg_segment(struct device *dev, struct scatterlist *sg) |
1290 | { | |
1291 | #ifdef CONFIG_DMA_API_DEBUG_SG | |
1292 | unsigned int max_seg = dma_get_max_seg_size(dev); | |
1293 | u64 start, end, boundary = dma_get_seg_boundary(dev); | |
1294 | ||
1295 | /* | |
1296 | * Either the driver forgot to set dma_parms appropriately, or | |
1297 | * whoever generated the list forgot to check them. | |
1298 | */ | |
1299 | if (sg->length > max_seg) | |
1300 | err_printk(dev, NULL, "DMA-API: mapping sg segment longer than device claims to support [len=%u] [max=%u]\n", | |
1301 | sg->length, max_seg); | |
1302 | /* | |
1303 | * In some cases this could potentially be the DMA API | |
1304 | * implementation's fault, but it would usually imply that | |
1305 | * the scatterlist was built inappropriately to begin with. | |
1306 | */ | |
1307 | start = sg_dma_address(sg); | |
1308 | end = start + sg_dma_len(sg) - 1; | |
1309 | if ((start ^ end) & ~boundary) | |
1310 | err_printk(dev, NULL, "DMA-API: mapping sg segment across boundary [start=0x%016llx] [end=0x%016llx] [boundary=0x%016llx]\n", | |
1311 | start, end, boundary); | |
1312 | #endif | |
1313 | } | |
1314 | ||
f62bc980 JR |
1315 | void debug_dma_map_page(struct device *dev, struct page *page, size_t offset, |
1316 | size_t size, int direction, dma_addr_t dma_addr, | |
1317 | bool map_single) | |
1318 | { | |
1319 | struct dma_debug_entry *entry; | |
1320 | ||
01ce18b3 | 1321 | if (unlikely(dma_debug_disabled())) |
f62bc980 JR |
1322 | return; |
1323 | ||
bfe0fb0f | 1324 | if (dma_mapping_error(dev, dma_addr)) |
f62bc980 JR |
1325 | return; |
1326 | ||
1327 | entry = dma_entry_alloc(); | |
1328 | if (!entry) | |
1329 | return; | |
1330 | ||
1331 | entry->dev = dev; | |
1332 | entry->type = dma_debug_page; | |
0abdd7a8 DW |
1333 | entry->pfn = page_to_pfn(page); |
1334 | entry->offset = offset, | |
f62bc980 JR |
1335 | entry->dev_addr = dma_addr; |
1336 | entry->size = size; | |
1337 | entry->direction = direction; | |
6c9c6d63 | 1338 | entry->map_err_type = MAP_ERR_NOT_CHECKED; |
f62bc980 | 1339 | |
9537a48e | 1340 | if (map_single) |
f62bc980 | 1341 | entry->type = dma_debug_single; |
9537a48e | 1342 | |
b4a0f533 AL |
1343 | check_for_stack(dev, page, offset); |
1344 | ||
9537a48e | 1345 | if (!PageHighMem(page)) { |
f39d1b97 IM |
1346 | void *addr = page_address(page) + offset; |
1347 | ||
2e34bde1 | 1348 | check_for_illegal_area(dev, addr, size); |
f62bc980 JR |
1349 | } |
1350 | ||
1351 | add_dma_entry(entry); | |
1352 | } | |
1353 | EXPORT_SYMBOL(debug_dma_map_page); | |
1354 | ||
6c9c6d63 SK |
1355 | void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
1356 | { | |
1357 | struct dma_debug_entry ref; | |
1358 | struct dma_debug_entry *entry; | |
1359 | struct hash_bucket *bucket; | |
1360 | unsigned long flags; | |
1361 | ||
01ce18b3 | 1362 | if (unlikely(dma_debug_disabled())) |
6c9c6d63 SK |
1363 | return; |
1364 | ||
1365 | ref.dev = dev; | |
1366 | ref.dev_addr = dma_addr; | |
1367 | bucket = get_hash_bucket(&ref, &flags); | |
6c9c6d63 | 1368 | |
96e7d7a1 AD |
1369 | list_for_each_entry(entry, &bucket->list, list) { |
1370 | if (!exact_match(&ref, entry)) | |
1371 | continue; | |
1372 | ||
1373 | /* | |
1374 | * The same physical address can be mapped multiple | |
1375 | * times. Without a hardware IOMMU this results in the | |
1376 | * same device addresses being put into the dma-debug | |
1377 | * hash multiple times too. This can result in false | |
1378 | * positives being reported. Therefore we implement a | |
1379 | * best-fit algorithm here which updates the first entry | |
1380 | * from the hash which fits the reference value and is | |
1381 | * not currently listed as being checked. | |
1382 | */ | |
1383 | if (entry->map_err_type == MAP_ERR_NOT_CHECKED) { | |
1384 | entry->map_err_type = MAP_ERR_CHECKED; | |
1385 | break; | |
1386 | } | |
1387 | } | |
6c9c6d63 | 1388 | |
6c9c6d63 SK |
1389 | put_hash_bucket(bucket, &flags); |
1390 | } | |
1391 | EXPORT_SYMBOL(debug_dma_mapping_error); | |
1392 | ||
f62bc980 JR |
1393 | void debug_dma_unmap_page(struct device *dev, dma_addr_t addr, |
1394 | size_t size, int direction, bool map_single) | |
1395 | { | |
1396 | struct dma_debug_entry ref = { | |
1397 | .type = dma_debug_page, | |
1398 | .dev = dev, | |
1399 | .dev_addr = addr, | |
1400 | .size = size, | |
1401 | .direction = direction, | |
1402 | }; | |
1403 | ||
01ce18b3 | 1404 | if (unlikely(dma_debug_disabled())) |
f62bc980 JR |
1405 | return; |
1406 | ||
1407 | if (map_single) | |
1408 | ref.type = dma_debug_single; | |
1409 | ||
1410 | check_unmap(&ref); | |
1411 | } | |
1412 | EXPORT_SYMBOL(debug_dma_unmap_page); | |
1413 | ||
972aa45c JR |
1414 | void debug_dma_map_sg(struct device *dev, struct scatterlist *sg, |
1415 | int nents, int mapped_ents, int direction) | |
1416 | { | |
1417 | struct dma_debug_entry *entry; | |
1418 | struct scatterlist *s; | |
1419 | int i; | |
1420 | ||
01ce18b3 | 1421 | if (unlikely(dma_debug_disabled())) |
972aa45c JR |
1422 | return; |
1423 | ||
1424 | for_each_sg(sg, s, mapped_ents, i) { | |
1425 | entry = dma_entry_alloc(); | |
1426 | if (!entry) | |
1427 | return; | |
1428 | ||
1429 | entry->type = dma_debug_sg; | |
1430 | entry->dev = dev; | |
0abdd7a8 DW |
1431 | entry->pfn = page_to_pfn(sg_page(s)); |
1432 | entry->offset = s->offset, | |
884d0597 | 1433 | entry->size = sg_dma_len(s); |
15aedea4 | 1434 | entry->dev_addr = sg_dma_address(s); |
972aa45c JR |
1435 | entry->direction = direction; |
1436 | entry->sg_call_ents = nents; | |
1437 | entry->sg_mapped_ents = mapped_ents; | |
1438 | ||
b4a0f533 AL |
1439 | check_for_stack(dev, sg_page(s), s->offset); |
1440 | ||
9537a48e | 1441 | if (!PageHighMem(sg_page(s))) { |
884d0597 | 1442 | check_for_illegal_area(dev, sg_virt(s), sg_dma_len(s)); |
9537a48e | 1443 | } |
972aa45c | 1444 | |
78c47830 RM |
1445 | check_sg_segment(dev, s); |
1446 | ||
972aa45c JR |
1447 | add_dma_entry(entry); |
1448 | } | |
1449 | } | |
1450 | EXPORT_SYMBOL(debug_dma_map_sg); | |
1451 | ||
aa010efb JR |
1452 | static int get_nr_mapped_entries(struct device *dev, |
1453 | struct dma_debug_entry *ref) | |
88f3907f | 1454 | { |
aa010efb | 1455 | struct dma_debug_entry *entry; |
88f3907f FT |
1456 | struct hash_bucket *bucket; |
1457 | unsigned long flags; | |
c17e2cf7 | 1458 | int mapped_ents; |
88f3907f | 1459 | |
aa010efb | 1460 | bucket = get_hash_bucket(ref, &flags); |
c6a21d0b | 1461 | entry = bucket_find_exact(bucket, ref); |
c17e2cf7 | 1462 | mapped_ents = 0; |
88f3907f | 1463 | |
88f3907f FT |
1464 | if (entry) |
1465 | mapped_ents = entry->sg_mapped_ents; | |
1466 | put_hash_bucket(bucket, &flags); | |
1467 | ||
1468 | return mapped_ents; | |
1469 | } | |
1470 | ||
972aa45c JR |
1471 | void debug_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, |
1472 | int nelems, int dir) | |
1473 | { | |
972aa45c JR |
1474 | struct scatterlist *s; |
1475 | int mapped_ents = 0, i; | |
972aa45c | 1476 | |
01ce18b3 | 1477 | if (unlikely(dma_debug_disabled())) |
972aa45c JR |
1478 | return; |
1479 | ||
1480 | for_each_sg(sglist, s, nelems, i) { | |
1481 | ||
1482 | struct dma_debug_entry ref = { | |
1483 | .type = dma_debug_sg, | |
1484 | .dev = dev, | |
0abdd7a8 DW |
1485 | .pfn = page_to_pfn(sg_page(s)), |
1486 | .offset = s->offset, | |
15aedea4 | 1487 | .dev_addr = sg_dma_address(s), |
884d0597 | 1488 | .size = sg_dma_len(s), |
972aa45c | 1489 | .direction = dir, |
e5e8c5b9 | 1490 | .sg_call_ents = nelems, |
972aa45c JR |
1491 | }; |
1492 | ||
1493 | if (mapped_ents && i >= mapped_ents) | |
1494 | break; | |
1495 | ||
e5e8c5b9 | 1496 | if (!i) |
aa010efb | 1497 | mapped_ents = get_nr_mapped_entries(dev, &ref); |
972aa45c JR |
1498 | |
1499 | check_unmap(&ref); | |
1500 | } | |
1501 | } | |
1502 | EXPORT_SYMBOL(debug_dma_unmap_sg); | |
1503 | ||
6bfd4498 JR |
1504 | void debug_dma_alloc_coherent(struct device *dev, size_t size, |
1505 | dma_addr_t dma_addr, void *virt) | |
1506 | { | |
1507 | struct dma_debug_entry *entry; | |
1508 | ||
01ce18b3 | 1509 | if (unlikely(dma_debug_disabled())) |
6bfd4498 JR |
1510 | return; |
1511 | ||
1512 | if (unlikely(virt == NULL)) | |
1513 | return; | |
1514 | ||
af1da686 MC |
1515 | /* handle vmalloc and linear addresses */ |
1516 | if (!is_vmalloc_addr(virt) && !virt_addr_valid(virt)) | |
6bfd4498 JR |
1517 | return; |
1518 | ||
af1da686 MC |
1519 | entry = dma_entry_alloc(); |
1520 | if (!entry) | |
3aaabbf1 MC |
1521 | return; |
1522 | ||
6bfd4498 JR |
1523 | entry->type = dma_debug_coherent; |
1524 | entry->dev = dev; | |
e57d0552 | 1525 | entry->offset = offset_in_page(virt); |
6bfd4498 JR |
1526 | entry->size = size; |
1527 | entry->dev_addr = dma_addr; | |
1528 | entry->direction = DMA_BIDIRECTIONAL; | |
1529 | ||
3aaabbf1 MC |
1530 | if (is_vmalloc_addr(virt)) |
1531 | entry->pfn = vmalloc_to_pfn(virt); | |
1532 | else | |
1533 | entry->pfn = page_to_pfn(virt_to_page(virt)); | |
1534 | ||
6bfd4498 JR |
1535 | add_dma_entry(entry); |
1536 | } | |
1537 | EXPORT_SYMBOL(debug_dma_alloc_coherent); | |
1538 | ||
1539 | void debug_dma_free_coherent(struct device *dev, size_t size, | |
1540 | void *virt, dma_addr_t addr) | |
1541 | { | |
1542 | struct dma_debug_entry ref = { | |
1543 | .type = dma_debug_coherent, | |
1544 | .dev = dev, | |
e57d0552 | 1545 | .offset = offset_in_page(virt), |
6bfd4498 JR |
1546 | .dev_addr = addr, |
1547 | .size = size, | |
1548 | .direction = DMA_BIDIRECTIONAL, | |
1549 | }; | |
1550 | ||
3aaabbf1 | 1551 | /* handle vmalloc and linear addresses */ |
af1da686 | 1552 | if (!is_vmalloc_addr(virt) && !virt_addr_valid(virt)) |
3aaabbf1 MC |
1553 | return; |
1554 | ||
1555 | if (is_vmalloc_addr(virt)) | |
1556 | ref.pfn = vmalloc_to_pfn(virt); | |
1557 | else | |
1558 | ref.pfn = page_to_pfn(virt_to_page(virt)); | |
1559 | ||
01ce18b3 | 1560 | if (unlikely(dma_debug_disabled())) |
6bfd4498 JR |
1561 | return; |
1562 | ||
1563 | check_unmap(&ref); | |
1564 | } | |
1565 | EXPORT_SYMBOL(debug_dma_free_coherent); | |
1566 | ||
0e74b34d NS |
1567 | void debug_dma_map_resource(struct device *dev, phys_addr_t addr, size_t size, |
1568 | int direction, dma_addr_t dma_addr) | |
1569 | { | |
1570 | struct dma_debug_entry *entry; | |
1571 | ||
1572 | if (unlikely(dma_debug_disabled())) | |
1573 | return; | |
1574 | ||
1575 | entry = dma_entry_alloc(); | |
1576 | if (!entry) | |
1577 | return; | |
1578 | ||
1579 | entry->type = dma_debug_resource; | |
1580 | entry->dev = dev; | |
2e0cc304 | 1581 | entry->pfn = PHYS_PFN(addr); |
0e74b34d NS |
1582 | entry->offset = offset_in_page(addr); |
1583 | entry->size = size; | |
1584 | entry->dev_addr = dma_addr; | |
1585 | entry->direction = direction; | |
1586 | entry->map_err_type = MAP_ERR_NOT_CHECKED; | |
1587 | ||
1588 | add_dma_entry(entry); | |
1589 | } | |
1590 | EXPORT_SYMBOL(debug_dma_map_resource); | |
1591 | ||
1592 | void debug_dma_unmap_resource(struct device *dev, dma_addr_t dma_addr, | |
1593 | size_t size, int direction) | |
1594 | { | |
1595 | struct dma_debug_entry ref = { | |
1596 | .type = dma_debug_resource, | |
1597 | .dev = dev, | |
1598 | .dev_addr = dma_addr, | |
1599 | .size = size, | |
1600 | .direction = direction, | |
1601 | }; | |
1602 | ||
1603 | if (unlikely(dma_debug_disabled())) | |
1604 | return; | |
1605 | ||
1606 | check_unmap(&ref); | |
1607 | } | |
1608 | EXPORT_SYMBOL(debug_dma_unmap_resource); | |
1609 | ||
b9d2317e JR |
1610 | void debug_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, |
1611 | size_t size, int direction) | |
1612 | { | |
aa010efb JR |
1613 | struct dma_debug_entry ref; |
1614 | ||
01ce18b3 | 1615 | if (unlikely(dma_debug_disabled())) |
b9d2317e JR |
1616 | return; |
1617 | ||
aa010efb JR |
1618 | ref.type = dma_debug_single; |
1619 | ref.dev = dev; | |
1620 | ref.dev_addr = dma_handle; | |
1621 | ref.size = size; | |
1622 | ref.direction = direction; | |
1623 | ref.sg_call_ents = 0; | |
1624 | ||
1625 | check_sync(dev, &ref, true); | |
b9d2317e JR |
1626 | } |
1627 | EXPORT_SYMBOL(debug_dma_sync_single_for_cpu); | |
1628 | ||
1629 | void debug_dma_sync_single_for_device(struct device *dev, | |
1630 | dma_addr_t dma_handle, size_t size, | |
1631 | int direction) | |
1632 | { | |
aa010efb JR |
1633 | struct dma_debug_entry ref; |
1634 | ||
01ce18b3 | 1635 | if (unlikely(dma_debug_disabled())) |
b9d2317e JR |
1636 | return; |
1637 | ||
aa010efb JR |
1638 | ref.type = dma_debug_single; |
1639 | ref.dev = dev; | |
1640 | ref.dev_addr = dma_handle; | |
1641 | ref.size = size; | |
1642 | ref.direction = direction; | |
1643 | ref.sg_call_ents = 0; | |
1644 | ||
1645 | check_sync(dev, &ref, false); | |
b9d2317e JR |
1646 | } |
1647 | EXPORT_SYMBOL(debug_dma_sync_single_for_device); | |
1648 | ||
948408ba JR |
1649 | void debug_dma_sync_single_range_for_cpu(struct device *dev, |
1650 | dma_addr_t dma_handle, | |
1651 | unsigned long offset, size_t size, | |
1652 | int direction) | |
1653 | { | |
aa010efb JR |
1654 | struct dma_debug_entry ref; |
1655 | ||
01ce18b3 | 1656 | if (unlikely(dma_debug_disabled())) |
948408ba JR |
1657 | return; |
1658 | ||
aa010efb JR |
1659 | ref.type = dma_debug_single; |
1660 | ref.dev = dev; | |
1661 | ref.dev_addr = dma_handle; | |
1662 | ref.size = offset + size; | |
1663 | ref.direction = direction; | |
1664 | ref.sg_call_ents = 0; | |
1665 | ||
1666 | check_sync(dev, &ref, true); | |
948408ba JR |
1667 | } |
1668 | EXPORT_SYMBOL(debug_dma_sync_single_range_for_cpu); | |
1669 | ||
1670 | void debug_dma_sync_single_range_for_device(struct device *dev, | |
1671 | dma_addr_t dma_handle, | |
1672 | unsigned long offset, | |
1673 | size_t size, int direction) | |
1674 | { | |
aa010efb JR |
1675 | struct dma_debug_entry ref; |
1676 | ||
01ce18b3 | 1677 | if (unlikely(dma_debug_disabled())) |
948408ba JR |
1678 | return; |
1679 | ||
aa010efb JR |
1680 | ref.type = dma_debug_single; |
1681 | ref.dev = dev; | |
1682 | ref.dev_addr = dma_handle; | |
1683 | ref.size = offset + size; | |
1684 | ref.direction = direction; | |
1685 | ref.sg_call_ents = 0; | |
1686 | ||
1687 | check_sync(dev, &ref, false); | |
948408ba JR |
1688 | } |
1689 | EXPORT_SYMBOL(debug_dma_sync_single_range_for_device); | |
1690 | ||
a31fba5d JR |
1691 | void debug_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
1692 | int nelems, int direction) | |
1693 | { | |
1694 | struct scatterlist *s; | |
88f3907f | 1695 | int mapped_ents = 0, i; |
a31fba5d | 1696 | |
01ce18b3 | 1697 | if (unlikely(dma_debug_disabled())) |
a31fba5d JR |
1698 | return; |
1699 | ||
1700 | for_each_sg(sg, s, nelems, i) { | |
aa010efb JR |
1701 | |
1702 | struct dma_debug_entry ref = { | |
1703 | .type = dma_debug_sg, | |
1704 | .dev = dev, | |
0abdd7a8 DW |
1705 | .pfn = page_to_pfn(sg_page(s)), |
1706 | .offset = s->offset, | |
aa010efb JR |
1707 | .dev_addr = sg_dma_address(s), |
1708 | .size = sg_dma_len(s), | |
1709 | .direction = direction, | |
1710 | .sg_call_ents = nelems, | |
1711 | }; | |
1712 | ||
88f3907f | 1713 | if (!i) |
aa010efb | 1714 | mapped_ents = get_nr_mapped_entries(dev, &ref); |
88f3907f FT |
1715 | |
1716 | if (i >= mapped_ents) | |
1717 | break; | |
1718 | ||
aa010efb | 1719 | check_sync(dev, &ref, true); |
a31fba5d JR |
1720 | } |
1721 | } | |
1722 | EXPORT_SYMBOL(debug_dma_sync_sg_for_cpu); | |
1723 | ||
1724 | void debug_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, | |
1725 | int nelems, int direction) | |
1726 | { | |
1727 | struct scatterlist *s; | |
88f3907f | 1728 | int mapped_ents = 0, i; |
a31fba5d | 1729 | |
01ce18b3 | 1730 | if (unlikely(dma_debug_disabled())) |
a31fba5d JR |
1731 | return; |
1732 | ||
1733 | for_each_sg(sg, s, nelems, i) { | |
aa010efb JR |
1734 | |
1735 | struct dma_debug_entry ref = { | |
1736 | .type = dma_debug_sg, | |
1737 | .dev = dev, | |
0abdd7a8 DW |
1738 | .pfn = page_to_pfn(sg_page(s)), |
1739 | .offset = s->offset, | |
aa010efb JR |
1740 | .dev_addr = sg_dma_address(s), |
1741 | .size = sg_dma_len(s), | |
1742 | .direction = direction, | |
1743 | .sg_call_ents = nelems, | |
1744 | }; | |
88f3907f | 1745 | if (!i) |
aa010efb | 1746 | mapped_ents = get_nr_mapped_entries(dev, &ref); |
88f3907f FT |
1747 | |
1748 | if (i >= mapped_ents) | |
1749 | break; | |
1750 | ||
aa010efb | 1751 | check_sync(dev, &ref, false); |
a31fba5d JR |
1752 | } |
1753 | } | |
1754 | EXPORT_SYMBOL(debug_dma_sync_sg_for_device); | |
1755 | ||
1745de5e JR |
1756 | static int __init dma_debug_driver_setup(char *str) |
1757 | { | |
1758 | int i; | |
1759 | ||
1760 | for (i = 0; i < NAME_MAX_LEN - 1; ++i, ++str) { | |
1761 | current_driver_name[i] = *str; | |
1762 | if (*str == 0) | |
1763 | break; | |
1764 | } | |
1765 | ||
1766 | if (current_driver_name[0]) | |
e7ed70ee JR |
1767 | pr_info("DMA-API: enable driver filter for driver [%s]\n", |
1768 | current_driver_name); | |
1745de5e JR |
1769 | |
1770 | ||
1771 | return 1; | |
1772 | } | |
1773 | __setup("dma_debug_driver=", dma_debug_driver_setup); |