nvme: fix Kconfig description for BLK_DEV_NVME_SCSI
[linux-2.6-block.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
4d1d61a6 20#include <linux/task_work.h>
1da177e4
LT
21
22#include "internals.h"
23
8d32a307
TG
24#ifdef CONFIG_IRQ_FORCED_THREADING
25__read_mostly bool force_irqthreads;
26
27static int __init setup_forced_irqthreads(char *arg)
28{
29 force_irqthreads = true;
30 return 0;
31}
32early_param("threadirqs", setup_forced_irqthreads);
33#endif
34
18258f72 35static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 36{
32f4125e 37 bool inprogress;
1da177e4 38
a98ce5c6
HX
39 do {
40 unsigned long flags;
41
42 /*
43 * Wait until we're out of the critical section. This might
44 * give the wrong answer due to the lack of memory barriers.
45 */
32f4125e 46 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
47 cpu_relax();
48
49 /* Ok, that indicated we're done: double-check carefully. */
239007b8 50 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 51 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 52 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
53
54 /* Oops, that failed? */
32f4125e 55 } while (inprogress);
18258f72
TG
56}
57
58/**
59 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
60 * @irq: interrupt number to wait for
61 *
62 * This function waits for any pending hard IRQ handlers for this
63 * interrupt to complete before returning. If you use this
64 * function while holding a resource the IRQ handler may need you
65 * will deadlock. It does not take associated threaded handlers
66 * into account.
67 *
68 * Do not use this for shutdown scenarios where you must be sure
69 * that all parts (hardirq and threaded handler) have completed.
70 *
02cea395
PZ
71 * Returns: false if a threaded handler is active.
72 *
18258f72
TG
73 * This function may be called - with care - from IRQ context.
74 */
02cea395 75bool synchronize_hardirq(unsigned int irq)
18258f72
TG
76{
77 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 78
02cea395 79 if (desc) {
18258f72 80 __synchronize_hardirq(desc);
02cea395
PZ
81 return !atomic_read(&desc->threads_active);
82 }
83
84 return true;
18258f72
TG
85}
86EXPORT_SYMBOL(synchronize_hardirq);
87
88/**
89 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
90 * @irq: interrupt number to wait for
91 *
92 * This function waits for any pending IRQ handlers for this interrupt
93 * to complete before returning. If you use this function while
94 * holding a resource the IRQ handler may need you will deadlock.
95 *
96 * This function may be called - with care - from IRQ context.
97 */
98void synchronize_irq(unsigned int irq)
99{
100 struct irq_desc *desc = irq_to_desc(irq);
101
102 if (desc) {
103 __synchronize_hardirq(desc);
104 /*
105 * We made sure that no hardirq handler is
106 * running. Now verify that no threaded handlers are
107 * active.
108 */
109 wait_event(desc->wait_for_threads,
110 !atomic_read(&desc->threads_active));
111 }
1da177e4 112}
1da177e4
LT
113EXPORT_SYMBOL(synchronize_irq);
114
3aa551c9
TG
115#ifdef CONFIG_SMP
116cpumask_var_t irq_default_affinity;
117
e019c249
JL
118static int __irq_can_set_affinity(struct irq_desc *desc)
119{
120 if (!desc || !irqd_can_balance(&desc->irq_data) ||
121 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
122 return 0;
123 return 1;
124}
125
771ee3b0
TG
126/**
127 * irq_can_set_affinity - Check if the affinity of a given irq can be set
128 * @irq: Interrupt to check
129 *
130 */
131int irq_can_set_affinity(unsigned int irq)
132{
e019c249 133 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
134}
135
591d2fb0
TG
136/**
137 * irq_set_thread_affinity - Notify irq threads to adjust affinity
138 * @desc: irq descriptor which has affitnity changed
139 *
140 * We just set IRQTF_AFFINITY and delegate the affinity setting
141 * to the interrupt thread itself. We can not call
142 * set_cpus_allowed_ptr() here as we hold desc->lock and this
143 * code can be called from hard interrupt context.
144 */
145void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
146{
147 struct irqaction *action = desc->action;
148
149 while (action) {
150 if (action->thread)
591d2fb0 151 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
152 action = action->next;
153 }
154}
155
1fa46f1f 156#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 157static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 158{
0ef5ca1e 159 return irqd_can_move_in_process_context(data);
1fa46f1f 160}
0ef5ca1e 161static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 162{
0ef5ca1e 163 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
164}
165static inline void
166irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
167{
168 cpumask_copy(desc->pending_mask, mask);
169}
170static inline void
171irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
172{
173 cpumask_copy(mask, desc->pending_mask);
174}
175#else
0ef5ca1e 176static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 177static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
178static inline void
179irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
180static inline void
181irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
182#endif
183
818b0f3b
JL
184int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
185 bool force)
186{
187 struct irq_desc *desc = irq_data_to_desc(data);
188 struct irq_chip *chip = irq_data_get_irq_chip(data);
189 int ret;
190
01f8fa4f 191 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
192 switch (ret) {
193 case IRQ_SET_MASK_OK:
2cb62547 194 case IRQ_SET_MASK_OK_DONE:
9df872fa 195 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b
JL
196 case IRQ_SET_MASK_OK_NOCOPY:
197 irq_set_thread_affinity(desc);
198 ret = 0;
199 }
200
201 return ret;
202}
203
01f8fa4f
TG
204int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
205 bool force)
771ee3b0 206{
c2d0c555
DD
207 struct irq_chip *chip = irq_data_get_irq_chip(data);
208 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 209 int ret = 0;
771ee3b0 210
c2d0c555 211 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
212 return -EINVAL;
213
0ef5ca1e 214 if (irq_can_move_pcntxt(data)) {
01f8fa4f 215 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 216 } else {
c2d0c555 217 irqd_set_move_pending(data);
1fa46f1f 218 irq_copy_pending(desc, mask);
57b150cc 219 }
1fa46f1f 220
cd7eab44
BH
221 if (desc->affinity_notify) {
222 kref_get(&desc->affinity_notify->kref);
223 schedule_work(&desc->affinity_notify->work);
224 }
c2d0c555
DD
225 irqd_set(data, IRQD_AFFINITY_SET);
226
227 return ret;
228}
229
01f8fa4f 230int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
231{
232 struct irq_desc *desc = irq_to_desc(irq);
233 unsigned long flags;
234 int ret;
235
236 if (!desc)
237 return -EINVAL;
238
239 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 240 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 241 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 242 return ret;
771ee3b0
TG
243}
244
e7a297b0
PWJ
245int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
246{
e7a297b0 247 unsigned long flags;
31d9d9b6 248 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
249
250 if (!desc)
251 return -EINVAL;
e7a297b0 252 desc->affinity_hint = m;
02725e74 253 irq_put_desc_unlock(desc, flags);
e2e64a93 254 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
255 if (m)
256 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
257 return 0;
258}
259EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
260
cd7eab44
BH
261static void irq_affinity_notify(struct work_struct *work)
262{
263 struct irq_affinity_notify *notify =
264 container_of(work, struct irq_affinity_notify, work);
265 struct irq_desc *desc = irq_to_desc(notify->irq);
266 cpumask_var_t cpumask;
267 unsigned long flags;
268
1fa46f1f 269 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
270 goto out;
271
272 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 273 if (irq_move_pending(&desc->irq_data))
1fa46f1f 274 irq_get_pending(cpumask, desc);
cd7eab44 275 else
9df872fa 276 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
277 raw_spin_unlock_irqrestore(&desc->lock, flags);
278
279 notify->notify(notify, cpumask);
280
281 free_cpumask_var(cpumask);
282out:
283 kref_put(&notify->kref, notify->release);
284}
285
286/**
287 * irq_set_affinity_notifier - control notification of IRQ affinity changes
288 * @irq: Interrupt for which to enable/disable notification
289 * @notify: Context for notification, or %NULL to disable
290 * notification. Function pointers must be initialised;
291 * the other fields will be initialised by this function.
292 *
293 * Must be called in process context. Notification may only be enabled
294 * after the IRQ is allocated and must be disabled before the IRQ is
295 * freed using free_irq().
296 */
297int
298irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
299{
300 struct irq_desc *desc = irq_to_desc(irq);
301 struct irq_affinity_notify *old_notify;
302 unsigned long flags;
303
304 /* The release function is promised process context */
305 might_sleep();
306
307 if (!desc)
308 return -EINVAL;
309
310 /* Complete initialisation of *notify */
311 if (notify) {
312 notify->irq = irq;
313 kref_init(&notify->kref);
314 INIT_WORK(&notify->work, irq_affinity_notify);
315 }
316
317 raw_spin_lock_irqsave(&desc->lock, flags);
318 old_notify = desc->affinity_notify;
319 desc->affinity_notify = notify;
320 raw_spin_unlock_irqrestore(&desc->lock, flags);
321
322 if (old_notify)
323 kref_put(&old_notify->kref, old_notify->release);
324
325 return 0;
326}
327EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
328
18404756
MK
329#ifndef CONFIG_AUTO_IRQ_AFFINITY
330/*
331 * Generic version of the affinity autoselector.
332 */
a8a98eac 333static int setup_affinity(struct irq_desc *desc, struct cpumask *mask)
18404756 334{
569bda8d 335 struct cpumask *set = irq_default_affinity;
6783011b 336 int node = irq_desc_get_node(desc);
569bda8d 337
b008207c 338 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 339 if (!__irq_can_set_affinity(desc))
18404756
MK
340 return 0;
341
f6d87f4b
TG
342 /*
343 * Preserve an userspace affinity setup, but make sure that
344 * one of the targets is online.
345 */
2bdd1055 346 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 347 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 348 cpu_online_mask))
9df872fa 349 set = desc->irq_common_data.affinity;
0c6f8a8b 350 else
2bdd1055 351 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 352 }
18404756 353
3b8249e7 354 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
355 if (node != NUMA_NO_NODE) {
356 const struct cpumask *nodemask = cpumask_of_node(node);
357
358 /* make sure at least one of the cpus in nodemask is online */
359 if (cpumask_intersects(mask, nodemask))
360 cpumask_and(mask, mask, nodemask);
361 }
818b0f3b 362 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
363 return 0;
364}
f6d87f4b 365#else
a8a98eac
JL
366/* Wrapper for ALPHA specific affinity selector magic */
367static inline int setup_affinity(struct irq_desc *d, struct cpumask *mask)
f6d87f4b 368{
a8a98eac 369 return irq_select_affinity(irq_desc_get_irq(d));
f6d87f4b 370}
18404756
MK
371#endif
372
f6d87f4b
TG
373/*
374 * Called when affinity is set via /proc/irq
375 */
3b8249e7 376int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
377{
378 struct irq_desc *desc = irq_to_desc(irq);
379 unsigned long flags;
380 int ret;
381
239007b8 382 raw_spin_lock_irqsave(&desc->lock, flags);
a8a98eac 383 ret = setup_affinity(desc, mask);
239007b8 384 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
385 return ret;
386}
387
388#else
3b8249e7 389static inline int
a8a98eac 390setup_affinity(struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
391{
392 return 0;
393}
1da177e4
LT
394#endif
395
fcf1ae2f
FW
396/**
397 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
398 * @irq: interrupt number to set affinity
399 * @vcpu_info: vCPU specific data
400 *
401 * This function uses the vCPU specific data to set the vCPU
402 * affinity for an irq. The vCPU specific data is passed from
403 * outside, such as KVM. One example code path is as below:
404 * KVM -> IOMMU -> irq_set_vcpu_affinity().
405 */
406int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
407{
408 unsigned long flags;
409 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
410 struct irq_data *data;
411 struct irq_chip *chip;
412 int ret = -ENOSYS;
413
414 if (!desc)
415 return -EINVAL;
416
417 data = irq_desc_get_irq_data(desc);
418 chip = irq_data_get_irq_chip(data);
419 if (chip && chip->irq_set_vcpu_affinity)
420 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
421 irq_put_desc_unlock(desc, flags);
422
423 return ret;
424}
425EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
426
79ff1cda 427void __disable_irq(struct irq_desc *desc)
0a0c5168 428{
3aae994f 429 if (!desc->depth++)
87923470 430 irq_disable(desc);
0a0c5168
RW
431}
432
02725e74
TG
433static int __disable_irq_nosync(unsigned int irq)
434{
435 unsigned long flags;
31d9d9b6 436 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
437
438 if (!desc)
439 return -EINVAL;
79ff1cda 440 __disable_irq(desc);
02725e74
TG
441 irq_put_desc_busunlock(desc, flags);
442 return 0;
443}
444
1da177e4
LT
445/**
446 * disable_irq_nosync - disable an irq without waiting
447 * @irq: Interrupt to disable
448 *
449 * Disable the selected interrupt line. Disables and Enables are
450 * nested.
451 * Unlike disable_irq(), this function does not ensure existing
452 * instances of the IRQ handler have completed before returning.
453 *
454 * This function may be called from IRQ context.
455 */
456void disable_irq_nosync(unsigned int irq)
457{
02725e74 458 __disable_irq_nosync(irq);
1da177e4 459}
1da177e4
LT
460EXPORT_SYMBOL(disable_irq_nosync);
461
462/**
463 * disable_irq - disable an irq and wait for completion
464 * @irq: Interrupt to disable
465 *
466 * Disable the selected interrupt line. Enables and Disables are
467 * nested.
468 * This function waits for any pending IRQ handlers for this interrupt
469 * to complete before returning. If you use this function while
470 * holding a resource the IRQ handler may need you will deadlock.
471 *
472 * This function may be called - with care - from IRQ context.
473 */
474void disable_irq(unsigned int irq)
475{
02725e74 476 if (!__disable_irq_nosync(irq))
1da177e4
LT
477 synchronize_irq(irq);
478}
1da177e4
LT
479EXPORT_SYMBOL(disable_irq);
480
02cea395
PZ
481/**
482 * disable_hardirq - disables an irq and waits for hardirq completion
483 * @irq: Interrupt to disable
484 *
485 * Disable the selected interrupt line. Enables and Disables are
486 * nested.
487 * This function waits for any pending hard IRQ handlers for this
488 * interrupt to complete before returning. If you use this function while
489 * holding a resource the hard IRQ handler may need you will deadlock.
490 *
491 * When used to optimistically disable an interrupt from atomic context
492 * the return value must be checked.
493 *
494 * Returns: false if a threaded handler is active.
495 *
496 * This function may be called - with care - from IRQ context.
497 */
498bool disable_hardirq(unsigned int irq)
499{
500 if (!__disable_irq_nosync(irq))
501 return synchronize_hardirq(irq);
502
503 return false;
504}
505EXPORT_SYMBOL_GPL(disable_hardirq);
506
79ff1cda 507void __enable_irq(struct irq_desc *desc)
1adb0850
TG
508{
509 switch (desc->depth) {
510 case 0:
0a0c5168 511 err_out:
79ff1cda
JL
512 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
513 irq_desc_get_irq(desc));
1adb0850
TG
514 break;
515 case 1: {
c531e836 516 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 517 goto err_out;
1adb0850 518 /* Prevent probing on this irq: */
1ccb4e61 519 irq_settings_set_noprobe(desc);
3aae994f 520 irq_enable(desc);
0798abeb 521 check_irq_resend(desc);
1adb0850
TG
522 /* fall-through */
523 }
524 default:
525 desc->depth--;
526 }
527}
528
1da177e4
LT
529/**
530 * enable_irq - enable handling of an irq
531 * @irq: Interrupt to enable
532 *
533 * Undoes the effect of one call to disable_irq(). If this
534 * matches the last disable, processing of interrupts on this
535 * IRQ line is re-enabled.
536 *
70aedd24 537 * This function may be called from IRQ context only when
6b8ff312 538 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
539 */
540void enable_irq(unsigned int irq)
541{
1da177e4 542 unsigned long flags;
31d9d9b6 543 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 544
7d94f7ca 545 if (!desc)
c2b5a251 546 return;
50f7c032
TG
547 if (WARN(!desc->irq_data.chip,
548 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 549 goto out;
2656c366 550
79ff1cda 551 __enable_irq(desc);
02725e74
TG
552out:
553 irq_put_desc_busunlock(desc, flags);
1da177e4 554}
1da177e4
LT
555EXPORT_SYMBOL(enable_irq);
556
0c5d1eb7 557static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 558{
08678b08 559 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
560 int ret = -ENXIO;
561
60f96b41
SS
562 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
563 return 0;
564
2f7e99bb
TG
565 if (desc->irq_data.chip->irq_set_wake)
566 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
567
568 return ret;
569}
570
ba9a2331 571/**
a0cd9ca2 572 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
573 * @irq: interrupt to control
574 * @on: enable/disable power management wakeup
575 *
15a647eb
DB
576 * Enable/disable power management wakeup mode, which is
577 * disabled by default. Enables and disables must match,
578 * just as they match for non-wakeup mode support.
579 *
580 * Wakeup mode lets this IRQ wake the system from sleep
581 * states like "suspend to RAM".
ba9a2331 582 */
a0cd9ca2 583int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 584{
ba9a2331 585 unsigned long flags;
31d9d9b6 586 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 587 int ret = 0;
ba9a2331 588
13863a66
JJ
589 if (!desc)
590 return -EINVAL;
591
15a647eb
DB
592 /* wakeup-capable irqs can be shared between drivers that
593 * don't need to have the same sleep mode behaviors.
594 */
15a647eb 595 if (on) {
2db87321
UKK
596 if (desc->wake_depth++ == 0) {
597 ret = set_irq_wake_real(irq, on);
598 if (ret)
599 desc->wake_depth = 0;
600 else
7f94226f 601 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 602 }
15a647eb
DB
603 } else {
604 if (desc->wake_depth == 0) {
7a2c4770 605 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
606 } else if (--desc->wake_depth == 0) {
607 ret = set_irq_wake_real(irq, on);
608 if (ret)
609 desc->wake_depth = 1;
610 else
7f94226f 611 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 612 }
15a647eb 613 }
02725e74 614 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
615 return ret;
616}
a0cd9ca2 617EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 618
1da177e4
LT
619/*
620 * Internal function that tells the architecture code whether a
621 * particular irq has been exclusively allocated or is available
622 * for driver use.
623 */
624int can_request_irq(unsigned int irq, unsigned long irqflags)
625{
cc8c3b78 626 unsigned long flags;
31d9d9b6 627 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 628 int canrequest = 0;
1da177e4 629
7d94f7ca
YL
630 if (!desc)
631 return 0;
632
02725e74 633 if (irq_settings_can_request(desc)) {
2779db8d
BH
634 if (!desc->action ||
635 irqflags & desc->action->flags & IRQF_SHARED)
636 canrequest = 1;
02725e74
TG
637 }
638 irq_put_desc_unlock(desc, flags);
639 return canrequest;
1da177e4
LT
640}
641
a1ff541a 642int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 643{
6b8ff312 644 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 645 int ret, unmask = 0;
82736f4d 646
b2ba2c30 647 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
648 /*
649 * IRQF_TRIGGER_* but the PIC does not support multiple
650 * flow-types?
651 */
a1ff541a
JL
652 pr_debug("No set_type function for IRQ %d (%s)\n",
653 irq_desc_get_irq(desc),
f5d89470 654 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
655 return 0;
656 }
657
876dbd4c 658 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
659
660 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 661 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 662 mask_irq(desc);
32f4125e 663 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
664 unmask = 1;
665 }
666
f2b662da 667 /* caller masked out all except trigger mode flags */
b2ba2c30 668 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 669
876dbd4c
TG
670 switch (ret) {
671 case IRQ_SET_MASK_OK:
2cb62547 672 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
673 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
674 irqd_set(&desc->irq_data, flags);
675
676 case IRQ_SET_MASK_OK_NOCOPY:
677 flags = irqd_get_trigger_type(&desc->irq_data);
678 irq_settings_set_trigger_mask(desc, flags);
679 irqd_clear(&desc->irq_data, IRQD_LEVEL);
680 irq_settings_clr_level(desc);
681 if (flags & IRQ_TYPE_LEVEL_MASK) {
682 irq_settings_set_level(desc);
683 irqd_set(&desc->irq_data, IRQD_LEVEL);
684 }
46732475 685
d4d5e089 686 ret = 0;
8fff39e0 687 break;
876dbd4c 688 default:
97fd75b7 689 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 690 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 691 }
d4d5e089
TG
692 if (unmask)
693 unmask_irq(desc);
82736f4d
UKK
694 return ret;
695}
696
293a7a0a
TG
697#ifdef CONFIG_HARDIRQS_SW_RESEND
698int irq_set_parent(int irq, int parent_irq)
699{
700 unsigned long flags;
701 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
702
703 if (!desc)
704 return -EINVAL;
705
706 desc->parent_irq = parent_irq;
707
708 irq_put_desc_unlock(desc, flags);
709 return 0;
710}
711#endif
712
b25c340c
TG
713/*
714 * Default primary interrupt handler for threaded interrupts. Is
715 * assigned as primary handler when request_threaded_irq is called
716 * with handler == NULL. Useful for oneshot interrupts.
717 */
718static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
719{
720 return IRQ_WAKE_THREAD;
721}
722
399b5da2
TG
723/*
724 * Primary handler for nested threaded interrupts. Should never be
725 * called.
726 */
727static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
728{
729 WARN(1, "Primary handler called for nested irq %d\n", irq);
730 return IRQ_NONE;
731}
732
2a1d3ab8
TG
733static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
734{
735 WARN(1, "Secondary action handler called for irq %d\n", irq);
736 return IRQ_NONE;
737}
738
3aa551c9
TG
739static int irq_wait_for_interrupt(struct irqaction *action)
740{
550acb19
IY
741 set_current_state(TASK_INTERRUPTIBLE);
742
3aa551c9 743 while (!kthread_should_stop()) {
f48fe81e
TG
744
745 if (test_and_clear_bit(IRQTF_RUNTHREAD,
746 &action->thread_flags)) {
3aa551c9
TG
747 __set_current_state(TASK_RUNNING);
748 return 0;
f48fe81e
TG
749 }
750 schedule();
550acb19 751 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 752 }
550acb19 753 __set_current_state(TASK_RUNNING);
3aa551c9
TG
754 return -1;
755}
756
b25c340c
TG
757/*
758 * Oneshot interrupts keep the irq line masked until the threaded
759 * handler finished. unmask if the interrupt has not been disabled and
760 * is marked MASKED.
761 */
b5faba21 762static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 763 struct irqaction *action)
b25c340c 764{
2a1d3ab8
TG
765 if (!(desc->istate & IRQS_ONESHOT) ||
766 action->handler == irq_forced_secondary_handler)
b5faba21 767 return;
0b1adaa0 768again:
3876ec9e 769 chip_bus_lock(desc);
239007b8 770 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
771
772 /*
773 * Implausible though it may be we need to protect us against
774 * the following scenario:
775 *
776 * The thread is faster done than the hard interrupt handler
777 * on the other CPU. If we unmask the irq line then the
778 * interrupt can come in again and masks the line, leaves due
009b4c3b 779 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
780 *
781 * This also serializes the state of shared oneshot handlers
782 * versus "desc->threads_onehsot |= action->thread_mask;" in
783 * irq_wake_thread(). See the comment there which explains the
784 * serialization.
0b1adaa0 785 */
32f4125e 786 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 787 raw_spin_unlock_irq(&desc->lock);
3876ec9e 788 chip_bus_sync_unlock(desc);
0b1adaa0
TG
789 cpu_relax();
790 goto again;
791 }
792
b5faba21
TG
793 /*
794 * Now check again, whether the thread should run. Otherwise
795 * we would clear the threads_oneshot bit of this thread which
796 * was just set.
797 */
f3f79e38 798 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
799 goto out_unlock;
800
801 desc->threads_oneshot &= ~action->thread_mask;
802
32f4125e
TG
803 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
804 irqd_irq_masked(&desc->irq_data))
328a4978 805 unmask_threaded_irq(desc);
32f4125e 806
b5faba21 807out_unlock:
239007b8 808 raw_spin_unlock_irq(&desc->lock);
3876ec9e 809 chip_bus_sync_unlock(desc);
b25c340c
TG
810}
811
61f38261 812#ifdef CONFIG_SMP
591d2fb0 813/*
b04c644e 814 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
815 */
816static void
817irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
818{
819 cpumask_var_t mask;
04aa530e 820 bool valid = true;
591d2fb0
TG
821
822 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
823 return;
824
825 /*
826 * In case we are out of memory we set IRQTF_AFFINITY again and
827 * try again next time
828 */
829 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
830 set_bit(IRQTF_AFFINITY, &action->thread_flags);
831 return;
832 }
833
239007b8 834 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
835 /*
836 * This code is triggered unconditionally. Check the affinity
837 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
838 */
9df872fa
JL
839 if (desc->irq_common_data.affinity)
840 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
841 else
842 valid = false;
239007b8 843 raw_spin_unlock_irq(&desc->lock);
591d2fb0 844
04aa530e
TG
845 if (valid)
846 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
847 free_cpumask_var(mask);
848}
61f38261
BP
849#else
850static inline void
851irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
852#endif
591d2fb0 853
8d32a307
TG
854/*
855 * Interrupts which are not explicitely requested as threaded
856 * interrupts rely on the implicit bh/preempt disable of the hard irq
857 * context. So we need to disable bh here to avoid deadlocks and other
858 * side effects.
859 */
3a43e05f 860static irqreturn_t
8d32a307
TG
861irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
862{
3a43e05f
SAS
863 irqreturn_t ret;
864
8d32a307 865 local_bh_disable();
3a43e05f 866 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 867 irq_finalize_oneshot(desc, action);
8d32a307 868 local_bh_enable();
3a43e05f 869 return ret;
8d32a307
TG
870}
871
872/*
f788e7bf 873 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
874 * preemtible - many of them need to sleep and wait for slow busses to
875 * complete.
876 */
3a43e05f
SAS
877static irqreturn_t irq_thread_fn(struct irq_desc *desc,
878 struct irqaction *action)
8d32a307 879{
3a43e05f
SAS
880 irqreturn_t ret;
881
882 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 883 irq_finalize_oneshot(desc, action);
3a43e05f 884 return ret;
8d32a307
TG
885}
886
7140ea19
IY
887static void wake_threads_waitq(struct irq_desc *desc)
888{
c685689f 889 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
890 wake_up(&desc->wait_for_threads);
891}
892
67d12145 893static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
894{
895 struct task_struct *tsk = current;
896 struct irq_desc *desc;
897 struct irqaction *action;
898
899 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
900 return;
901
902 action = kthread_data(tsk);
903
fb21affa 904 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 905 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
906
907
908 desc = irq_to_desc(action->irq);
909 /*
910 * If IRQTF_RUNTHREAD is set, we need to decrement
911 * desc->threads_active and wake possible waiters.
912 */
913 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
914 wake_threads_waitq(desc);
915
916 /* Prevent a stale desc->threads_oneshot */
917 irq_finalize_oneshot(desc, action);
918}
919
2a1d3ab8
TG
920static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
921{
922 struct irqaction *secondary = action->secondary;
923
924 if (WARN_ON_ONCE(!secondary))
925 return;
926
927 raw_spin_lock_irq(&desc->lock);
928 __irq_wake_thread(desc, secondary);
929 raw_spin_unlock_irq(&desc->lock);
930}
931
3aa551c9
TG
932/*
933 * Interrupt handler thread
934 */
935static int irq_thread(void *data)
936{
67d12145 937 struct callback_head on_exit_work;
3aa551c9
TG
938 struct irqaction *action = data;
939 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
940 irqreturn_t (*handler_fn)(struct irq_desc *desc,
941 struct irqaction *action);
3aa551c9 942
540b60e2 943 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
944 &action->thread_flags))
945 handler_fn = irq_forced_thread_fn;
946 else
947 handler_fn = irq_thread_fn;
948
41f9d29f 949 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 950 task_work_add(current, &on_exit_work, false);
3aa551c9 951
f3de44ed
SM
952 irq_thread_check_affinity(desc, action);
953
3aa551c9 954 while (!irq_wait_for_interrupt(action)) {
7140ea19 955 irqreturn_t action_ret;
3aa551c9 956
591d2fb0
TG
957 irq_thread_check_affinity(desc, action);
958
7140ea19 959 action_ret = handler_fn(desc, action);
1e77d0a1
TG
960 if (action_ret == IRQ_HANDLED)
961 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
962 if (action_ret == IRQ_WAKE_THREAD)
963 irq_wake_secondary(desc, action);
3aa551c9 964
7140ea19 965 wake_threads_waitq(desc);
3aa551c9
TG
966 }
967
7140ea19
IY
968 /*
969 * This is the regular exit path. __free_irq() is stopping the
970 * thread via kthread_stop() after calling
971 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
972 * oneshot mask bit can be set. We cannot verify that as we
973 * cannot touch the oneshot mask at this point anymore as
974 * __setup_irq() might have given out currents thread_mask
975 * again.
3aa551c9 976 */
4d1d61a6 977 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
978 return 0;
979}
980
a92444c6
TG
981/**
982 * irq_wake_thread - wake the irq thread for the action identified by dev_id
983 * @irq: Interrupt line
984 * @dev_id: Device identity for which the thread should be woken
985 *
986 */
987void irq_wake_thread(unsigned int irq, void *dev_id)
988{
989 struct irq_desc *desc = irq_to_desc(irq);
990 struct irqaction *action;
991 unsigned long flags;
992
993 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
994 return;
995
996 raw_spin_lock_irqsave(&desc->lock, flags);
997 for (action = desc->action; action; action = action->next) {
998 if (action->dev_id == dev_id) {
999 if (action->thread)
1000 __irq_wake_thread(desc, action);
1001 break;
1002 }
1003 }
1004 raw_spin_unlock_irqrestore(&desc->lock, flags);
1005}
1006EXPORT_SYMBOL_GPL(irq_wake_thread);
1007
2a1d3ab8 1008static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1009{
1010 if (!force_irqthreads)
2a1d3ab8 1011 return 0;
8d32a307 1012 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1013 return 0;
8d32a307
TG
1014
1015 new->flags |= IRQF_ONESHOT;
1016
2a1d3ab8
TG
1017 /*
1018 * Handle the case where we have a real primary handler and a
1019 * thread handler. We force thread them as well by creating a
1020 * secondary action.
1021 */
1022 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1023 /* Allocate the secondary action */
1024 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1025 if (!new->secondary)
1026 return -ENOMEM;
1027 new->secondary->handler = irq_forced_secondary_handler;
1028 new->secondary->thread_fn = new->thread_fn;
1029 new->secondary->dev_id = new->dev_id;
1030 new->secondary->irq = new->irq;
1031 new->secondary->name = new->name;
8d32a307 1032 }
2a1d3ab8
TG
1033 /* Deal with the primary handler */
1034 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1035 new->thread_fn = new->handler;
1036 new->handler = irq_default_primary_handler;
1037 return 0;
8d32a307
TG
1038}
1039
c1bacbae
TG
1040static int irq_request_resources(struct irq_desc *desc)
1041{
1042 struct irq_data *d = &desc->irq_data;
1043 struct irq_chip *c = d->chip;
1044
1045 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1046}
1047
1048static void irq_release_resources(struct irq_desc *desc)
1049{
1050 struct irq_data *d = &desc->irq_data;
1051 struct irq_chip *c = d->chip;
1052
1053 if (c->irq_release_resources)
1054 c->irq_release_resources(d);
1055}
1056
2a1d3ab8
TG
1057static int
1058setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1059{
1060 struct task_struct *t;
1061 struct sched_param param = {
1062 .sched_priority = MAX_USER_RT_PRIO/2,
1063 };
1064
1065 if (!secondary) {
1066 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1067 new->name);
1068 } else {
1069 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1070 new->name);
1071 param.sched_priority -= 1;
1072 }
1073
1074 if (IS_ERR(t))
1075 return PTR_ERR(t);
1076
1077 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1078
1079 /*
1080 * We keep the reference to the task struct even if
1081 * the thread dies to avoid that the interrupt code
1082 * references an already freed task_struct.
1083 */
1084 get_task_struct(t);
1085 new->thread = t;
1086 /*
1087 * Tell the thread to set its affinity. This is
1088 * important for shared interrupt handlers as we do
1089 * not invoke setup_affinity() for the secondary
1090 * handlers as everything is already set up. Even for
1091 * interrupts marked with IRQF_NO_BALANCE this is
1092 * correct as we want the thread to move to the cpu(s)
1093 * on which the requesting code placed the interrupt.
1094 */
1095 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1096 return 0;
1097}
1098
1da177e4
LT
1099/*
1100 * Internal function to register an irqaction - typically used to
1101 * allocate special interrupts that are part of the architecture.
1102 */
d3c60047 1103static int
327ec569 1104__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1105{
f17c7545 1106 struct irqaction *old, **old_ptr;
b5faba21 1107 unsigned long flags, thread_mask = 0;
3b8249e7
TG
1108 int ret, nested, shared = 0;
1109 cpumask_var_t mask;
1da177e4 1110
7d94f7ca 1111 if (!desc)
c2b5a251
MW
1112 return -EINVAL;
1113
6b8ff312 1114 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1115 return -ENOSYS;
b6873807
SAS
1116 if (!try_module_get(desc->owner))
1117 return -ENODEV;
1da177e4 1118
2a1d3ab8
TG
1119 new->irq = irq;
1120
3aa551c9 1121 /*
399b5da2
TG
1122 * Check whether the interrupt nests into another interrupt
1123 * thread.
1124 */
1ccb4e61 1125 nested = irq_settings_is_nested_thread(desc);
399b5da2 1126 if (nested) {
b6873807
SAS
1127 if (!new->thread_fn) {
1128 ret = -EINVAL;
1129 goto out_mput;
1130 }
399b5da2
TG
1131 /*
1132 * Replace the primary handler which was provided from
1133 * the driver for non nested interrupt handling by the
1134 * dummy function which warns when called.
1135 */
1136 new->handler = irq_nested_primary_handler;
8d32a307 1137 } else {
2a1d3ab8
TG
1138 if (irq_settings_can_thread(desc)) {
1139 ret = irq_setup_forced_threading(new);
1140 if (ret)
1141 goto out_mput;
1142 }
399b5da2
TG
1143 }
1144
3aa551c9 1145 /*
399b5da2
TG
1146 * Create a handler thread when a thread function is supplied
1147 * and the interrupt does not nest into another interrupt
1148 * thread.
3aa551c9 1149 */
399b5da2 1150 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1151 ret = setup_irq_thread(new, irq, false);
1152 if (ret)
b6873807 1153 goto out_mput;
2a1d3ab8
TG
1154 if (new->secondary) {
1155 ret = setup_irq_thread(new->secondary, irq, true);
1156 if (ret)
1157 goto out_thread;
b6873807 1158 }
3aa551c9
TG
1159 }
1160
3b8249e7
TG
1161 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1162 ret = -ENOMEM;
1163 goto out_thread;
1164 }
1165
dc9b229a
TG
1166 /*
1167 * Drivers are often written to work w/o knowledge about the
1168 * underlying irq chip implementation, so a request for a
1169 * threaded irq without a primary hard irq context handler
1170 * requires the ONESHOT flag to be set. Some irq chips like
1171 * MSI based interrupts are per se one shot safe. Check the
1172 * chip flags, so we can avoid the unmask dance at the end of
1173 * the threaded handler for those.
1174 */
1175 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1176 new->flags &= ~IRQF_ONESHOT;
1177
1da177e4
LT
1178 /*
1179 * The following block of code has to be executed atomically
1180 */
239007b8 1181 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1182 old_ptr = &desc->action;
1183 old = *old_ptr;
06fcb0c6 1184 if (old) {
e76de9f8
TG
1185 /*
1186 * Can't share interrupts unless both agree to and are
1187 * the same type (level, edge, polarity). So both flag
3cca53b0 1188 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1189 * set the trigger type must match. Also all must
1190 * agree on ONESHOT.
e76de9f8 1191 */
3cca53b0 1192 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 1193 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 1194 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1195 goto mismatch;
1196
f5163427 1197 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1198 if ((old->flags & IRQF_PERCPU) !=
1199 (new->flags & IRQF_PERCPU))
f5163427 1200 goto mismatch;
1da177e4
LT
1201
1202 /* add new interrupt at end of irq queue */
1203 do {
52abb700
TG
1204 /*
1205 * Or all existing action->thread_mask bits,
1206 * so we can find the next zero bit for this
1207 * new action.
1208 */
b5faba21 1209 thread_mask |= old->thread_mask;
f17c7545
IM
1210 old_ptr = &old->next;
1211 old = *old_ptr;
1da177e4
LT
1212 } while (old);
1213 shared = 1;
1214 }
1215
b5faba21 1216 /*
52abb700
TG
1217 * Setup the thread mask for this irqaction for ONESHOT. For
1218 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1219 * conditional in irq_wake_thread().
b5faba21 1220 */
52abb700
TG
1221 if (new->flags & IRQF_ONESHOT) {
1222 /*
1223 * Unlikely to have 32 resp 64 irqs sharing one line,
1224 * but who knows.
1225 */
1226 if (thread_mask == ~0UL) {
1227 ret = -EBUSY;
1228 goto out_mask;
1229 }
1230 /*
1231 * The thread_mask for the action is or'ed to
1232 * desc->thread_active to indicate that the
1233 * IRQF_ONESHOT thread handler has been woken, but not
1234 * yet finished. The bit is cleared when a thread
1235 * completes. When all threads of a shared interrupt
1236 * line have completed desc->threads_active becomes
1237 * zero and the interrupt line is unmasked. See
1238 * handle.c:irq_wake_thread() for further information.
1239 *
1240 * If no thread is woken by primary (hard irq context)
1241 * interrupt handlers, then desc->threads_active is
1242 * also checked for zero to unmask the irq line in the
1243 * affected hard irq flow handlers
1244 * (handle_[fasteoi|level]_irq).
1245 *
1246 * The new action gets the first zero bit of
1247 * thread_mask assigned. See the loop above which or's
1248 * all existing action->thread_mask bits.
1249 */
1250 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1251
dc9b229a
TG
1252 } else if (new->handler == irq_default_primary_handler &&
1253 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1254 /*
1255 * The interrupt was requested with handler = NULL, so
1256 * we use the default primary handler for it. But it
1257 * does not have the oneshot flag set. In combination
1258 * with level interrupts this is deadly, because the
1259 * default primary handler just wakes the thread, then
1260 * the irq lines is reenabled, but the device still
1261 * has the level irq asserted. Rinse and repeat....
1262 *
1263 * While this works for edge type interrupts, we play
1264 * it safe and reject unconditionally because we can't
1265 * say for sure which type this interrupt really
1266 * has. The type flags are unreliable as the
1267 * underlying chip implementation can override them.
1268 */
97fd75b7 1269 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1270 irq);
1271 ret = -EINVAL;
1272 goto out_mask;
b5faba21 1273 }
b5faba21 1274
1da177e4 1275 if (!shared) {
c1bacbae
TG
1276 ret = irq_request_resources(desc);
1277 if (ret) {
1278 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1279 new->name, irq, desc->irq_data.chip->name);
1280 goto out_mask;
1281 }
1282
3aa551c9
TG
1283 init_waitqueue_head(&desc->wait_for_threads);
1284
e76de9f8 1285 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1286 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1287 ret = __irq_set_trigger(desc,
1288 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1289
3aa551c9 1290 if (ret)
3b8249e7 1291 goto out_mask;
091738a2 1292 }
6a6de9ef 1293
009b4c3b 1294 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1295 IRQS_ONESHOT | IRQS_WAITING);
1296 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1297
a005677b
TG
1298 if (new->flags & IRQF_PERCPU) {
1299 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1300 irq_settings_set_per_cpu(desc);
1301 }
6a58fb3b 1302
b25c340c 1303 if (new->flags & IRQF_ONESHOT)
3d67baec 1304 desc->istate |= IRQS_ONESHOT;
b25c340c 1305
1ccb4e61 1306 if (irq_settings_can_autoenable(desc))
b4bc724e 1307 irq_startup(desc, true);
46999238 1308 else
e76de9f8
TG
1309 /* Undo nested disables: */
1310 desc->depth = 1;
18404756 1311
612e3684 1312 /* Exclude IRQ from balancing if requested */
a005677b
TG
1313 if (new->flags & IRQF_NOBALANCING) {
1314 irq_settings_set_no_balancing(desc);
1315 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1316 }
612e3684 1317
18404756 1318 /* Set default affinity mask once everything is setup */
a8a98eac 1319 setup_affinity(desc, mask);
0c5d1eb7 1320
876dbd4c
TG
1321 } else if (new->flags & IRQF_TRIGGER_MASK) {
1322 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1323 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1324
1325 if (nmsk != omsk)
1326 /* hope the handler works with current trigger mode */
97fd75b7 1327 pr_warning("irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1328 irq, nmsk, omsk);
1da177e4 1329 }
82736f4d 1330
f17c7545 1331 *old_ptr = new;
82736f4d 1332
cab303be
TG
1333 irq_pm_install_action(desc, new);
1334
8528b0f1
LT
1335 /* Reset broken irq detection when installing new handler */
1336 desc->irq_count = 0;
1337 desc->irqs_unhandled = 0;
1adb0850
TG
1338
1339 /*
1340 * Check whether we disabled the irq via the spurious handler
1341 * before. Reenable it and give it another chance.
1342 */
7acdd53e
TG
1343 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1344 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1345 __enable_irq(desc);
1adb0850
TG
1346 }
1347
239007b8 1348 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1349
69ab8494
TG
1350 /*
1351 * Strictly no need to wake it up, but hung_task complains
1352 * when no hard interrupt wakes the thread up.
1353 */
1354 if (new->thread)
1355 wake_up_process(new->thread);
2a1d3ab8
TG
1356 if (new->secondary)
1357 wake_up_process(new->secondary->thread);
69ab8494 1358
2c6927a3 1359 register_irq_proc(irq, desc);
1da177e4
LT
1360 new->dir = NULL;
1361 register_handler_proc(irq, new);
4f5058c3 1362 free_cpumask_var(mask);
1da177e4
LT
1363
1364 return 0;
f5163427
DS
1365
1366mismatch:
3cca53b0 1367 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1368 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1369 irq, new->flags, new->name, old->flags, old->name);
1370#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1371 dump_stack();
3f050447 1372#endif
f5d89470 1373 }
3aa551c9
TG
1374 ret = -EBUSY;
1375
3b8249e7 1376out_mask:
1c389795 1377 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1378 free_cpumask_var(mask);
1379
3aa551c9 1380out_thread:
3aa551c9
TG
1381 if (new->thread) {
1382 struct task_struct *t = new->thread;
1383
1384 new->thread = NULL;
05d74efa 1385 kthread_stop(t);
3aa551c9
TG
1386 put_task_struct(t);
1387 }
2a1d3ab8
TG
1388 if (new->secondary && new->secondary->thread) {
1389 struct task_struct *t = new->secondary->thread;
1390
1391 new->secondary->thread = NULL;
1392 kthread_stop(t);
1393 put_task_struct(t);
1394 }
b6873807
SAS
1395out_mput:
1396 module_put(desc->owner);
3aa551c9 1397 return ret;
1da177e4
LT
1398}
1399
d3c60047
TG
1400/**
1401 * setup_irq - setup an interrupt
1402 * @irq: Interrupt line to setup
1403 * @act: irqaction for the interrupt
1404 *
1405 * Used to statically setup interrupts in the early boot process.
1406 */
1407int setup_irq(unsigned int irq, struct irqaction *act)
1408{
986c011d 1409 int retval;
d3c60047
TG
1410 struct irq_desc *desc = irq_to_desc(irq);
1411
31d9d9b6
MZ
1412 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1413 return -EINVAL;
986c011d
DD
1414 chip_bus_lock(desc);
1415 retval = __setup_irq(irq, desc, act);
1416 chip_bus_sync_unlock(desc);
1417
1418 return retval;
d3c60047 1419}
eb53b4e8 1420EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1421
31d9d9b6 1422/*
cbf94f06
MD
1423 * Internal function to unregister an irqaction - used to free
1424 * regular and special interrupts that are part of the architecture.
1da177e4 1425 */
cbf94f06 1426static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1427{
d3c60047 1428 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1429 struct irqaction *action, **action_ptr;
1da177e4
LT
1430 unsigned long flags;
1431
ae88a23b 1432 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1433
7d94f7ca 1434 if (!desc)
f21cfb25 1435 return NULL;
1da177e4 1436
abc7e40c 1437 chip_bus_lock(desc);
239007b8 1438 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1439
1440 /*
1441 * There can be multiple actions per IRQ descriptor, find the right
1442 * one based on the dev_id:
1443 */
f17c7545 1444 action_ptr = &desc->action;
1da177e4 1445 for (;;) {
f17c7545 1446 action = *action_ptr;
1da177e4 1447
ae88a23b
IM
1448 if (!action) {
1449 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1450 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1451 chip_bus_sync_unlock(desc);
f21cfb25 1452 return NULL;
ae88a23b 1453 }
1da177e4 1454
8316e381
IM
1455 if (action->dev_id == dev_id)
1456 break;
f17c7545 1457 action_ptr = &action->next;
ae88a23b 1458 }
dbce706e 1459
ae88a23b 1460 /* Found it - now remove it from the list of entries: */
f17c7545 1461 *action_ptr = action->next;
ae88a23b 1462
cab303be
TG
1463 irq_pm_remove_action(desc, action);
1464
ae88a23b 1465 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1466 if (!desc->action) {
e9849777 1467 irq_settings_clr_disable_unlazy(desc);
46999238 1468 irq_shutdown(desc);
c1bacbae
TG
1469 irq_release_resources(desc);
1470 }
3aa551c9 1471
e7a297b0
PWJ
1472#ifdef CONFIG_SMP
1473 /* make sure affinity_hint is cleaned up */
1474 if (WARN_ON_ONCE(desc->affinity_hint))
1475 desc->affinity_hint = NULL;
1476#endif
1477
239007b8 1478 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1479 chip_bus_sync_unlock(desc);
ae88a23b
IM
1480
1481 unregister_handler_proc(irq, action);
1482
1483 /* Make sure it's not being used on another CPU: */
1484 synchronize_irq(irq);
1da177e4 1485
70edcd77 1486#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1487 /*
1488 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1489 * event to happen even now it's being freed, so let's make sure that
1490 * is so by doing an extra call to the handler ....
1491 *
1492 * ( We do this after actually deregistering it, to make sure that a
1493 * 'real' IRQ doesn't run in * parallel with our fake. )
1494 */
1495 if (action->flags & IRQF_SHARED) {
1496 local_irq_save(flags);
1497 action->handler(irq, dev_id);
1498 local_irq_restore(flags);
1da177e4 1499 }
ae88a23b 1500#endif
2d860ad7
LT
1501
1502 if (action->thread) {
05d74efa 1503 kthread_stop(action->thread);
2d860ad7 1504 put_task_struct(action->thread);
2a1d3ab8
TG
1505 if (action->secondary && action->secondary->thread) {
1506 kthread_stop(action->secondary->thread);
1507 put_task_struct(action->secondary->thread);
1508 }
2d860ad7
LT
1509 }
1510
b6873807 1511 module_put(desc->owner);
2a1d3ab8 1512 kfree(action->secondary);
f21cfb25
MD
1513 return action;
1514}
1515
cbf94f06
MD
1516/**
1517 * remove_irq - free an interrupt
1518 * @irq: Interrupt line to free
1519 * @act: irqaction for the interrupt
1520 *
1521 * Used to remove interrupts statically setup by the early boot process.
1522 */
1523void remove_irq(unsigned int irq, struct irqaction *act)
1524{
31d9d9b6
MZ
1525 struct irq_desc *desc = irq_to_desc(irq);
1526
1527 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1528 __free_irq(irq, act->dev_id);
cbf94f06 1529}
eb53b4e8 1530EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1531
f21cfb25
MD
1532/**
1533 * free_irq - free an interrupt allocated with request_irq
1534 * @irq: Interrupt line to free
1535 * @dev_id: Device identity to free
1536 *
1537 * Remove an interrupt handler. The handler is removed and if the
1538 * interrupt line is no longer in use by any driver it is disabled.
1539 * On a shared IRQ the caller must ensure the interrupt is disabled
1540 * on the card it drives before calling this function. The function
1541 * does not return until any executing interrupts for this IRQ
1542 * have completed.
1543 *
1544 * This function must not be called from interrupt context.
1545 */
1546void free_irq(unsigned int irq, void *dev_id)
1547{
70aedd24
TG
1548 struct irq_desc *desc = irq_to_desc(irq);
1549
31d9d9b6 1550 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1551 return;
1552
cd7eab44
BH
1553#ifdef CONFIG_SMP
1554 if (WARN_ON(desc->affinity_notify))
1555 desc->affinity_notify = NULL;
1556#endif
1557
cbf94f06 1558 kfree(__free_irq(irq, dev_id));
1da177e4 1559}
1da177e4
LT
1560EXPORT_SYMBOL(free_irq);
1561
1562/**
3aa551c9 1563 * request_threaded_irq - allocate an interrupt line
1da177e4 1564 * @irq: Interrupt line to allocate
3aa551c9
TG
1565 * @handler: Function to be called when the IRQ occurs.
1566 * Primary handler for threaded interrupts
b25c340c
TG
1567 * If NULL and thread_fn != NULL the default
1568 * primary handler is installed
f48fe81e
TG
1569 * @thread_fn: Function called from the irq handler thread
1570 * If NULL, no irq thread is created
1da177e4
LT
1571 * @irqflags: Interrupt type flags
1572 * @devname: An ascii name for the claiming device
1573 * @dev_id: A cookie passed back to the handler function
1574 *
1575 * This call allocates interrupt resources and enables the
1576 * interrupt line and IRQ handling. From the point this
1577 * call is made your handler function may be invoked. Since
1578 * your handler function must clear any interrupt the board
1579 * raises, you must take care both to initialise your hardware
1580 * and to set up the interrupt handler in the right order.
1581 *
3aa551c9 1582 * If you want to set up a threaded irq handler for your device
6d21af4f 1583 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1584 * still called in hard interrupt context and has to check
1585 * whether the interrupt originates from the device. If yes it
1586 * needs to disable the interrupt on the device and return
39a2eddb 1587 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1588 * @thread_fn. This split handler design is necessary to support
1589 * shared interrupts.
1590 *
1da177e4
LT
1591 * Dev_id must be globally unique. Normally the address of the
1592 * device data structure is used as the cookie. Since the handler
1593 * receives this value it makes sense to use it.
1594 *
1595 * If your interrupt is shared you must pass a non NULL dev_id
1596 * as this is required when freeing the interrupt.
1597 *
1598 * Flags:
1599 *
3cca53b0 1600 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1601 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1602 *
1603 */
3aa551c9
TG
1604int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1605 irq_handler_t thread_fn, unsigned long irqflags,
1606 const char *devname, void *dev_id)
1da177e4 1607{
06fcb0c6 1608 struct irqaction *action;
08678b08 1609 struct irq_desc *desc;
d3c60047 1610 int retval;
1da177e4
LT
1611
1612 /*
1613 * Sanity-check: shared interrupts must pass in a real dev-ID,
1614 * otherwise we'll have trouble later trying to figure out
1615 * which interrupt is which (messes up the interrupt freeing
1616 * logic etc).
17f48034
RW
1617 *
1618 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1619 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1620 */
17f48034
RW
1621 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1622 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1623 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1624 return -EINVAL;
7d94f7ca 1625
cb5bc832 1626 desc = irq_to_desc(irq);
7d94f7ca 1627 if (!desc)
1da177e4 1628 return -EINVAL;
7d94f7ca 1629
31d9d9b6
MZ
1630 if (!irq_settings_can_request(desc) ||
1631 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1632 return -EINVAL;
b25c340c
TG
1633
1634 if (!handler) {
1635 if (!thread_fn)
1636 return -EINVAL;
1637 handler = irq_default_primary_handler;
1638 }
1da177e4 1639
45535732 1640 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1641 if (!action)
1642 return -ENOMEM;
1643
1644 action->handler = handler;
3aa551c9 1645 action->thread_fn = thread_fn;
1da177e4 1646 action->flags = irqflags;
1da177e4 1647 action->name = devname;
1da177e4
LT
1648 action->dev_id = dev_id;
1649
3876ec9e 1650 chip_bus_lock(desc);
d3c60047 1651 retval = __setup_irq(irq, desc, action);
3876ec9e 1652 chip_bus_sync_unlock(desc);
70aedd24 1653
2a1d3ab8
TG
1654 if (retval) {
1655 kfree(action->secondary);
377bf1e4 1656 kfree(action);
2a1d3ab8 1657 }
377bf1e4 1658
6d83f94d 1659#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1660 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1661 /*
1662 * It's a shared IRQ -- the driver ought to be prepared for it
1663 * to happen immediately, so let's make sure....
377bf1e4
AV
1664 * We disable the irq to make sure that a 'real' IRQ doesn't
1665 * run in parallel with our fake.
a304e1b8 1666 */
59845b1f 1667 unsigned long flags;
a304e1b8 1668
377bf1e4 1669 disable_irq(irq);
59845b1f 1670 local_irq_save(flags);
377bf1e4 1671
59845b1f 1672 handler(irq, dev_id);
377bf1e4 1673
59845b1f 1674 local_irq_restore(flags);
377bf1e4 1675 enable_irq(irq);
a304e1b8
DW
1676 }
1677#endif
1da177e4
LT
1678 return retval;
1679}
3aa551c9 1680EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1681
1682/**
1683 * request_any_context_irq - allocate an interrupt line
1684 * @irq: Interrupt line to allocate
1685 * @handler: Function to be called when the IRQ occurs.
1686 * Threaded handler for threaded interrupts.
1687 * @flags: Interrupt type flags
1688 * @name: An ascii name for the claiming device
1689 * @dev_id: A cookie passed back to the handler function
1690 *
1691 * This call allocates interrupt resources and enables the
1692 * interrupt line and IRQ handling. It selects either a
1693 * hardirq or threaded handling method depending on the
1694 * context.
1695 *
1696 * On failure, it returns a negative value. On success,
1697 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1698 */
1699int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1700 unsigned long flags, const char *name, void *dev_id)
1701{
1702 struct irq_desc *desc = irq_to_desc(irq);
1703 int ret;
1704
1705 if (!desc)
1706 return -EINVAL;
1707
1ccb4e61 1708 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1709 ret = request_threaded_irq(irq, NULL, handler,
1710 flags, name, dev_id);
1711 return !ret ? IRQC_IS_NESTED : ret;
1712 }
1713
1714 ret = request_irq(irq, handler, flags, name, dev_id);
1715 return !ret ? IRQC_IS_HARDIRQ : ret;
1716}
1717EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1718
1e7c5fd2 1719void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1720{
1721 unsigned int cpu = smp_processor_id();
1722 unsigned long flags;
1723 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1724
1725 if (!desc)
1726 return;
1727
1e7c5fd2
MZ
1728 type &= IRQ_TYPE_SENSE_MASK;
1729 if (type != IRQ_TYPE_NONE) {
1730 int ret;
1731
a1ff541a 1732 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1733
1734 if (ret) {
32cffdde 1735 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1736 goto out;
1737 }
1738 }
1739
31d9d9b6 1740 irq_percpu_enable(desc, cpu);
1e7c5fd2 1741out:
31d9d9b6
MZ
1742 irq_put_desc_unlock(desc, flags);
1743}
36a5df85 1744EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1745
f0cb3220
TP
1746/**
1747 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1748 * @irq: Linux irq number to check for
1749 *
1750 * Must be called from a non migratable context. Returns the enable
1751 * state of a per cpu interrupt on the current cpu.
1752 */
1753bool irq_percpu_is_enabled(unsigned int irq)
1754{
1755 unsigned int cpu = smp_processor_id();
1756 struct irq_desc *desc;
1757 unsigned long flags;
1758 bool is_enabled;
1759
1760 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1761 if (!desc)
1762 return false;
1763
1764 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1765 irq_put_desc_unlock(desc, flags);
1766
1767 return is_enabled;
1768}
1769EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1770
31d9d9b6
MZ
1771void disable_percpu_irq(unsigned int irq)
1772{
1773 unsigned int cpu = smp_processor_id();
1774 unsigned long flags;
1775 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1776
1777 if (!desc)
1778 return;
1779
1780 irq_percpu_disable(desc, cpu);
1781 irq_put_desc_unlock(desc, flags);
1782}
36a5df85 1783EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1784
1785/*
1786 * Internal function to unregister a percpu irqaction.
1787 */
1788static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1789{
1790 struct irq_desc *desc = irq_to_desc(irq);
1791 struct irqaction *action;
1792 unsigned long flags;
1793
1794 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1795
1796 if (!desc)
1797 return NULL;
1798
1799 raw_spin_lock_irqsave(&desc->lock, flags);
1800
1801 action = desc->action;
1802 if (!action || action->percpu_dev_id != dev_id) {
1803 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1804 goto bad;
1805 }
1806
1807 if (!cpumask_empty(desc->percpu_enabled)) {
1808 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1809 irq, cpumask_first(desc->percpu_enabled));
1810 goto bad;
1811 }
1812
1813 /* Found it - now remove it from the list of entries: */
1814 desc->action = NULL;
1815
1816 raw_spin_unlock_irqrestore(&desc->lock, flags);
1817
1818 unregister_handler_proc(irq, action);
1819
1820 module_put(desc->owner);
1821 return action;
1822
1823bad:
1824 raw_spin_unlock_irqrestore(&desc->lock, flags);
1825 return NULL;
1826}
1827
1828/**
1829 * remove_percpu_irq - free a per-cpu interrupt
1830 * @irq: Interrupt line to free
1831 * @act: irqaction for the interrupt
1832 *
1833 * Used to remove interrupts statically setup by the early boot process.
1834 */
1835void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1836{
1837 struct irq_desc *desc = irq_to_desc(irq);
1838
1839 if (desc && irq_settings_is_per_cpu_devid(desc))
1840 __free_percpu_irq(irq, act->percpu_dev_id);
1841}
1842
1843/**
1844 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1845 * @irq: Interrupt line to free
1846 * @dev_id: Device identity to free
1847 *
1848 * Remove a percpu interrupt handler. The handler is removed, but
1849 * the interrupt line is not disabled. This must be done on each
1850 * CPU before calling this function. The function does not return
1851 * until any executing interrupts for this IRQ have completed.
1852 *
1853 * This function must not be called from interrupt context.
1854 */
1855void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1856{
1857 struct irq_desc *desc = irq_to_desc(irq);
1858
1859 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1860 return;
1861
1862 chip_bus_lock(desc);
1863 kfree(__free_percpu_irq(irq, dev_id));
1864 chip_bus_sync_unlock(desc);
1865}
aec2e2ad 1866EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
1867
1868/**
1869 * setup_percpu_irq - setup a per-cpu interrupt
1870 * @irq: Interrupt line to setup
1871 * @act: irqaction for the interrupt
1872 *
1873 * Used to statically setup per-cpu interrupts in the early boot process.
1874 */
1875int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1876{
1877 struct irq_desc *desc = irq_to_desc(irq);
1878 int retval;
1879
1880 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1881 return -EINVAL;
1882 chip_bus_lock(desc);
1883 retval = __setup_irq(irq, desc, act);
1884 chip_bus_sync_unlock(desc);
1885
1886 return retval;
1887}
1888
1889/**
1890 * request_percpu_irq - allocate a percpu interrupt line
1891 * @irq: Interrupt line to allocate
1892 * @handler: Function to be called when the IRQ occurs.
1893 * @devname: An ascii name for the claiming device
1894 * @dev_id: A percpu cookie passed back to the handler function
1895 *
a1b7febd
MR
1896 * This call allocates interrupt resources and enables the
1897 * interrupt on the local CPU. If the interrupt is supposed to be
1898 * enabled on other CPUs, it has to be done on each CPU using
1899 * enable_percpu_irq().
31d9d9b6
MZ
1900 *
1901 * Dev_id must be globally unique. It is a per-cpu variable, and
1902 * the handler gets called with the interrupted CPU's instance of
1903 * that variable.
1904 */
1905int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1906 const char *devname, void __percpu *dev_id)
1907{
1908 struct irqaction *action;
1909 struct irq_desc *desc;
1910 int retval;
1911
1912 if (!dev_id)
1913 return -EINVAL;
1914
1915 desc = irq_to_desc(irq);
1916 if (!desc || !irq_settings_can_request(desc) ||
1917 !irq_settings_is_per_cpu_devid(desc))
1918 return -EINVAL;
1919
1920 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1921 if (!action)
1922 return -ENOMEM;
1923
1924 action->handler = handler;
2ed0e645 1925 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1926 action->name = devname;
1927 action->percpu_dev_id = dev_id;
1928
1929 chip_bus_lock(desc);
1930 retval = __setup_irq(irq, desc, action);
1931 chip_bus_sync_unlock(desc);
1932
1933 if (retval)
1934 kfree(action);
1935
1936 return retval;
1937}
aec2e2ad 1938EXPORT_SYMBOL_GPL(request_percpu_irq);
1b7047ed
MZ
1939
1940/**
1941 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
1942 * @irq: Interrupt line that is forwarded to a VM
1943 * @which: One of IRQCHIP_STATE_* the caller wants to know about
1944 * @state: a pointer to a boolean where the state is to be storeed
1945 *
1946 * This call snapshots the internal irqchip state of an
1947 * interrupt, returning into @state the bit corresponding to
1948 * stage @which
1949 *
1950 * This function should be called with preemption disabled if the
1951 * interrupt controller has per-cpu registers.
1952 */
1953int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
1954 bool *state)
1955{
1956 struct irq_desc *desc;
1957 struct irq_data *data;
1958 struct irq_chip *chip;
1959 unsigned long flags;
1960 int err = -EINVAL;
1961
1962 desc = irq_get_desc_buslock(irq, &flags, 0);
1963 if (!desc)
1964 return err;
1965
1966 data = irq_desc_get_irq_data(desc);
1967
1968 do {
1969 chip = irq_data_get_irq_chip(data);
1970 if (chip->irq_get_irqchip_state)
1971 break;
1972#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1973 data = data->parent_data;
1974#else
1975 data = NULL;
1976#endif
1977 } while (data);
1978
1979 if (data)
1980 err = chip->irq_get_irqchip_state(data, which, state);
1981
1982 irq_put_desc_busunlock(desc, flags);
1983 return err;
1984}
1ee4fb3e 1985EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
1986
1987/**
1988 * irq_set_irqchip_state - set the state of a forwarded interrupt.
1989 * @irq: Interrupt line that is forwarded to a VM
1990 * @which: State to be restored (one of IRQCHIP_STATE_*)
1991 * @val: Value corresponding to @which
1992 *
1993 * This call sets the internal irqchip state of an interrupt,
1994 * depending on the value of @which.
1995 *
1996 * This function should be called with preemption disabled if the
1997 * interrupt controller has per-cpu registers.
1998 */
1999int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2000 bool val)
2001{
2002 struct irq_desc *desc;
2003 struct irq_data *data;
2004 struct irq_chip *chip;
2005 unsigned long flags;
2006 int err = -EINVAL;
2007
2008 desc = irq_get_desc_buslock(irq, &flags, 0);
2009 if (!desc)
2010 return err;
2011
2012 data = irq_desc_get_irq_data(desc);
2013
2014 do {
2015 chip = irq_data_get_irq_chip(data);
2016 if (chip->irq_set_irqchip_state)
2017 break;
2018#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2019 data = data->parent_data;
2020#else
2021 data = NULL;
2022#endif
2023 } while (data);
2024
2025 if (data)
2026 err = chip->irq_set_irqchip_state(data, which, val);
2027
2028 irq_put_desc_busunlock(desc, flags);
2029 return err;
2030}
1ee4fb3e 2031EXPORT_SYMBOL_GPL(irq_set_irqchip_state);