Commit | Line | Data |
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54a90588 PM |
1 | #define pr_fmt(fmt) "irq: " fmt |
2 | ||
cc79ca69 GL |
3 | #include <linux/debugfs.h> |
4 | #include <linux/hardirq.h> | |
5 | #include <linux/interrupt.h> | |
08a543ad | 6 | #include <linux/irq.h> |
cc79ca69 | 7 | #include <linux/irqdesc.h> |
08a543ad GL |
8 | #include <linux/irqdomain.h> |
9 | #include <linux/module.h> | |
10 | #include <linux/mutex.h> | |
11 | #include <linux/of.h> | |
7e713301 | 12 | #include <linux/of_address.h> |
64be38ab | 13 | #include <linux/of_irq.h> |
5ca4db61 | 14 | #include <linux/topology.h> |
cc79ca69 | 15 | #include <linux/seq_file.h> |
7e713301 | 16 | #include <linux/slab.h> |
cc79ca69 GL |
17 | #include <linux/smp.h> |
18 | #include <linux/fs.h> | |
08a543ad GL |
19 | |
20 | static LIST_HEAD(irq_domain_list); | |
21 | static DEFINE_MUTEX(irq_domain_mutex); | |
22 | ||
cc79ca69 | 23 | static DEFINE_MUTEX(revmap_trees_mutex); |
68700650 | 24 | static struct irq_domain *irq_default_domain; |
cc79ca69 | 25 | |
f8264e34 JL |
26 | static int irq_domain_alloc_descs(int virq, unsigned int nr_irqs, |
27 | irq_hw_number_t hwirq, int node); | |
28 | static void irq_domain_check_hierarchy(struct irq_domain *domain); | |
29 | ||
b145dcc4 MZ |
30 | struct irqchip_fwid { |
31 | struct fwnode_handle fwnode; | |
32 | char *name; | |
33 | void *data; | |
34 | }; | |
35 | ||
36 | /** | |
37 | * irq_domain_alloc_fwnode - Allocate a fwnode_handle suitable for | |
38 | * identifying an irq domain | |
39 | * @data: optional user-provided data | |
40 | * | |
41 | * Allocate a struct device_node, and return a poiner to the embedded | |
42 | * fwnode_handle (or NULL on failure). | |
43 | */ | |
44 | struct fwnode_handle *irq_domain_alloc_fwnode(void *data) | |
45 | { | |
46 | struct irqchip_fwid *fwid; | |
47 | char *name; | |
48 | ||
49 | fwid = kzalloc(sizeof(*fwid), GFP_KERNEL); | |
50 | name = kasprintf(GFP_KERNEL, "irqchip@%p", data); | |
51 | ||
52 | if (!fwid || !name) { | |
53 | kfree(fwid); | |
54 | kfree(name); | |
55 | return NULL; | |
56 | } | |
57 | ||
58 | fwid->name = name; | |
59 | fwid->data = data; | |
60 | fwid->fwnode.type = FWNODE_IRQCHIP; | |
61 | return &fwid->fwnode; | |
62 | } | |
a4289dc2 | 63 | EXPORT_SYMBOL_GPL(irq_domain_alloc_fwnode); |
b145dcc4 MZ |
64 | |
65 | /** | |
66 | * irq_domain_free_fwnode - Free a non-OF-backed fwnode_handle | |
67 | * | |
68 | * Free a fwnode_handle allocated with irq_domain_alloc_fwnode. | |
69 | */ | |
70 | void irq_domain_free_fwnode(struct fwnode_handle *fwnode) | |
71 | { | |
72 | struct irqchip_fwid *fwid; | |
73 | ||
75aba7b0 | 74 | if (WARN_ON(!is_fwnode_irqchip(fwnode))) |
b145dcc4 MZ |
75 | return; |
76 | ||
77 | fwid = container_of(fwnode, struct irqchip_fwid, fwnode); | |
78 | kfree(fwid->name); | |
79 | kfree(fwid); | |
80 | } | |
a4289dc2 | 81 | EXPORT_SYMBOL_GPL(irq_domain_free_fwnode); |
b145dcc4 | 82 | |
cc79ca69 | 83 | /** |
fa40f377 | 84 | * __irq_domain_add() - Allocate a new irq_domain data structure |
cc79ca69 | 85 | * @of_node: optional device-tree node of the interrupt controller |
fa40f377 | 86 | * @size: Size of linear map; 0 for radix mapping only |
a257954b | 87 | * @hwirq_max: Maximum number of interrupts supported by controller |
fa40f377 GL |
88 | * @direct_max: Maximum value of direct maps; Use ~0 for no limit; 0 for no |
89 | * direct mapping | |
f8264e34 | 90 | * @ops: domain callbacks |
a8db8cf0 | 91 | * @host_data: Controller private data pointer |
cc79ca69 | 92 | * |
a257954b JL |
93 | * Allocates and initialize and irq_domain structure. |
94 | * Returns pointer to IRQ domain, or NULL on failure. | |
cc79ca69 | 95 | */ |
1bf4ddc4 | 96 | struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, int size, |
ddaf144c | 97 | irq_hw_number_t hwirq_max, int direct_max, |
fa40f377 GL |
98 | const struct irq_domain_ops *ops, |
99 | void *host_data) | |
cc79ca69 | 100 | { |
a8db8cf0 | 101 | struct irq_domain *domain; |
1bf4ddc4 MZ |
102 | struct device_node *of_node; |
103 | ||
104 | of_node = to_of_node(fwnode); | |
cc79ca69 | 105 | |
cef5075c GL |
106 | domain = kzalloc_node(sizeof(*domain) + (sizeof(unsigned int) * size), |
107 | GFP_KERNEL, of_node_to_nid(of_node)); | |
a8db8cf0 | 108 | if (WARN_ON(!domain)) |
cc79ca69 GL |
109 | return NULL; |
110 | ||
f110711a | 111 | of_node_get(of_node); |
f110711a | 112 | |
cc79ca69 | 113 | /* Fill structure */ |
1aa0dd94 | 114 | INIT_RADIX_TREE(&domain->revmap_tree, GFP_KERNEL); |
68700650 | 115 | domain->ops = ops; |
a8db8cf0 | 116 | domain->host_data = host_data; |
f110711a | 117 | domain->fwnode = fwnode; |
ddaf144c | 118 | domain->hwirq_max = hwirq_max; |
1aa0dd94 | 119 | domain->revmap_size = size; |
fa40f377 | 120 | domain->revmap_direct_max_irq = direct_max; |
f8264e34 | 121 | irq_domain_check_hierarchy(domain); |
cc79ca69 | 122 | |
a8db8cf0 GL |
123 | mutex_lock(&irq_domain_mutex); |
124 | list_add(&domain->link, &irq_domain_list); | |
125 | mutex_unlock(&irq_domain_mutex); | |
fa40f377 | 126 | |
1aa0dd94 | 127 | pr_debug("Added domain %s\n", domain->name); |
fa40f377 | 128 | return domain; |
a8db8cf0 | 129 | } |
fa40f377 | 130 | EXPORT_SYMBOL_GPL(__irq_domain_add); |
a8db8cf0 | 131 | |
58ee99ad PM |
132 | /** |
133 | * irq_domain_remove() - Remove an irq domain. | |
134 | * @domain: domain to remove | |
135 | * | |
136 | * This routine is used to remove an irq domain. The caller must ensure | |
137 | * that all mappings within the domain have been disposed of prior to | |
138 | * use, depending on the revmap type. | |
139 | */ | |
140 | void irq_domain_remove(struct irq_domain *domain) | |
141 | { | |
142 | mutex_lock(&irq_domain_mutex); | |
143 | ||
cef5075c GL |
144 | /* |
145 | * radix_tree_delete() takes care of destroying the root | |
146 | * node when all entries are removed. Shout if there are | |
147 | * any mappings left. | |
148 | */ | |
1aa0dd94 | 149 | WARN_ON(domain->revmap_tree.height); |
58ee99ad PM |
150 | |
151 | list_del(&domain->link); | |
152 | ||
153 | /* | |
154 | * If the going away domain is the default one, reset it. | |
155 | */ | |
156 | if (unlikely(irq_default_domain == domain)) | |
157 | irq_set_default_host(NULL); | |
158 | ||
159 | mutex_unlock(&irq_domain_mutex); | |
160 | ||
1aa0dd94 | 161 | pr_debug("Removed domain %s\n", domain->name); |
58ee99ad | 162 | |
5d4c9bc7 | 163 | of_node_put(irq_domain_get_of_node(domain)); |
fa40f377 | 164 | kfree(domain); |
58ee99ad | 165 | } |
ecd84eb2 | 166 | EXPORT_SYMBOL_GPL(irq_domain_remove); |
58ee99ad | 167 | |
781d0f46 | 168 | /** |
fa40f377 | 169 | * irq_domain_add_simple() - Register an irq_domain and optionally map a range of irqs |
781d0f46 MB |
170 | * @of_node: pointer to interrupt controller's device tree node. |
171 | * @size: total number of irqs in mapping | |
94a63da0 | 172 | * @first_irq: first number of irq block assigned to the domain, |
fa40f377 GL |
173 | * pass zero to assign irqs on-the-fly. If first_irq is non-zero, then |
174 | * pre-map all of the irqs in the domain to virqs starting at first_irq. | |
f8264e34 | 175 | * @ops: domain callbacks |
781d0f46 MB |
176 | * @host_data: Controller private data pointer |
177 | * | |
fa40f377 GL |
178 | * Allocates an irq_domain, and optionally if first_irq is positive then also |
179 | * allocate irq_descs and map all of the hwirqs to virqs starting at first_irq. | |
781d0f46 MB |
180 | * |
181 | * This is intended to implement the expected behaviour for most | |
fa40f377 GL |
182 | * interrupt controllers. If device tree is used, then first_irq will be 0 and |
183 | * irqs get mapped dynamically on the fly. However, if the controller requires | |
184 | * static virq assignments (non-DT boot) then it will set that up correctly. | |
781d0f46 MB |
185 | */ |
186 | struct irq_domain *irq_domain_add_simple(struct device_node *of_node, | |
187 | unsigned int size, | |
188 | unsigned int first_irq, | |
189 | const struct irq_domain_ops *ops, | |
190 | void *host_data) | |
191 | { | |
fa40f377 GL |
192 | struct irq_domain *domain; |
193 | ||
1bf4ddc4 | 194 | domain = __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data); |
fa40f377 GL |
195 | if (!domain) |
196 | return NULL; | |
2854d167 | 197 | |
fa40f377 | 198 | if (first_irq > 0) { |
2854d167 | 199 | if (IS_ENABLED(CONFIG_SPARSE_IRQ)) { |
fa40f377 GL |
200 | /* attempt to allocated irq_descs */ |
201 | int rc = irq_alloc_descs(first_irq, first_irq, size, | |
202 | of_node_to_nid(of_node)); | |
203 | if (rc < 0) | |
d202b7b9 LW |
204 | pr_info("Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", |
205 | first_irq); | |
fa40f377 | 206 | } |
ddaf144c | 207 | irq_domain_associate_many(domain, first_irq, 0, size); |
2854d167 LW |
208 | } |
209 | ||
fa40f377 | 210 | return domain; |
781d0f46 | 211 | } |
346dbb79 | 212 | EXPORT_SYMBOL_GPL(irq_domain_add_simple); |
781d0f46 | 213 | |
a8db8cf0 GL |
214 | /** |
215 | * irq_domain_add_legacy() - Allocate and register a legacy revmap irq_domain. | |
216 | * @of_node: pointer to interrupt controller's device tree node. | |
1bc04f2c GL |
217 | * @size: total number of irqs in legacy mapping |
218 | * @first_irq: first number of irq block assigned to the domain | |
219 | * @first_hwirq: first hwirq number to use for the translation. Should normally | |
220 | * be '0', but a positive integer can be used if the effective | |
221 | * hwirqs numbering does not begin at zero. | |
a8db8cf0 GL |
222 | * @ops: map/unmap domain callbacks |
223 | * @host_data: Controller private data pointer | |
224 | * | |
225 | * Note: the map() callback will be called before this function returns | |
226 | * for all legacy interrupts except 0 (which is always the invalid irq for | |
227 | * a legacy controller). | |
228 | */ | |
229 | struct irq_domain *irq_domain_add_legacy(struct device_node *of_node, | |
1bc04f2c GL |
230 | unsigned int size, |
231 | unsigned int first_irq, | |
232 | irq_hw_number_t first_hwirq, | |
a18dc81b | 233 | const struct irq_domain_ops *ops, |
a8db8cf0 GL |
234 | void *host_data) |
235 | { | |
1bc04f2c | 236 | struct irq_domain *domain; |
a8db8cf0 | 237 | |
1bf4ddc4 | 238 | domain = __irq_domain_add(of_node_to_fwnode(of_node), first_hwirq + size, |
ddaf144c | 239 | first_hwirq + size, 0, ops, host_data); |
f8264e34 JL |
240 | if (domain) |
241 | irq_domain_associate_many(domain, first_irq, first_hwirq, size); | |
1bc04f2c | 242 | |
a8db8cf0 GL |
243 | return domain; |
244 | } | |
ecd84eb2 | 245 | EXPORT_SYMBOL_GPL(irq_domain_add_legacy); |
a8db8cf0 | 246 | |
cc79ca69 | 247 | /** |
130b8c6c MZ |
248 | * irq_find_matching_fwnode() - Locates a domain for a given fwnode |
249 | * @fwnode: FW descriptor of the interrupt controller | |
ad3aedfb | 250 | * @bus_token: domain-specific data |
cc79ca69 | 251 | */ |
130b8c6c MZ |
252 | struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode, |
253 | enum irq_domain_bus_token bus_token) | |
cc79ca69 GL |
254 | { |
255 | struct irq_domain *h, *found = NULL; | |
a18dc81b | 256 | int rc; |
cc79ca69 GL |
257 | |
258 | /* We might want to match the legacy controller last since | |
259 | * it might potentially be set to match all interrupts in | |
260 | * the absence of a device node. This isn't a problem so far | |
261 | * yet though... | |
ad3aedfb MZ |
262 | * |
263 | * bus_token == DOMAIN_BUS_ANY matches any domain, any other | |
264 | * values must generate an exact match for the domain to be | |
265 | * selected. | |
cc79ca69 GL |
266 | */ |
267 | mutex_lock(&irq_domain_mutex); | |
a18dc81b GL |
268 | list_for_each_entry(h, &irq_domain_list, link) { |
269 | if (h->ops->match) | |
130b8c6c | 270 | rc = h->ops->match(h, to_of_node(fwnode), bus_token); |
a18dc81b | 271 | else |
130b8c6c | 272 | rc = ((fwnode != NULL) && (h->fwnode == fwnode) && |
ad3aedfb MZ |
273 | ((bus_token == DOMAIN_BUS_ANY) || |
274 | (h->bus_token == bus_token))); | |
a18dc81b GL |
275 | |
276 | if (rc) { | |
cc79ca69 GL |
277 | found = h; |
278 | break; | |
279 | } | |
a18dc81b | 280 | } |
cc79ca69 GL |
281 | mutex_unlock(&irq_domain_mutex); |
282 | return found; | |
283 | } | |
130b8c6c | 284 | EXPORT_SYMBOL_GPL(irq_find_matching_fwnode); |
cc79ca69 GL |
285 | |
286 | /** | |
287 | * irq_set_default_host() - Set a "default" irq domain | |
68700650 | 288 | * @domain: default domain pointer |
cc79ca69 GL |
289 | * |
290 | * For convenience, it's possible to set a "default" domain that will be used | |
291 | * whenever NULL is passed to irq_create_mapping(). It makes life easier for | |
292 | * platforms that want to manipulate a few hard coded interrupt numbers that | |
293 | * aren't properly represented in the device-tree. | |
294 | */ | |
68700650 | 295 | void irq_set_default_host(struct irq_domain *domain) |
cc79ca69 | 296 | { |
54a90588 | 297 | pr_debug("Default domain set to @0x%p\n", domain); |
cc79ca69 | 298 | |
68700650 | 299 | irq_default_domain = domain; |
cc79ca69 | 300 | } |
ecd84eb2 | 301 | EXPORT_SYMBOL_GPL(irq_set_default_host); |
cc79ca69 | 302 | |
43a77591 | 303 | void irq_domain_disassociate(struct irq_domain *domain, unsigned int irq) |
913af207 | 304 | { |
ddaf144c GL |
305 | struct irq_data *irq_data = irq_get_irq_data(irq); |
306 | irq_hw_number_t hwirq; | |
913af207 | 307 | |
ddaf144c GL |
308 | if (WARN(!irq_data || irq_data->domain != domain, |
309 | "virq%i doesn't exist; cannot disassociate\n", irq)) | |
310 | return; | |
913af207 | 311 | |
ddaf144c GL |
312 | hwirq = irq_data->hwirq; |
313 | irq_set_status_flags(irq, IRQ_NOREQUEST); | |
913af207 | 314 | |
ddaf144c GL |
315 | /* remove chip and handler */ |
316 | irq_set_chip_and_handler(irq, NULL, NULL); | |
913af207 | 317 | |
ddaf144c GL |
318 | /* Make sure it's completed */ |
319 | synchronize_irq(irq); | |
913af207 | 320 | |
ddaf144c GL |
321 | /* Tell the PIC about it */ |
322 | if (domain->ops->unmap) | |
323 | domain->ops->unmap(domain, irq); | |
324 | smp_mb(); | |
913af207 | 325 | |
ddaf144c GL |
326 | irq_data->domain = NULL; |
327 | irq_data->hwirq = 0; | |
913af207 | 328 | |
ddaf144c GL |
329 | /* Clear reverse map for this hwirq */ |
330 | if (hwirq < domain->revmap_size) { | |
331 | domain->linear_revmap[hwirq] = 0; | |
332 | } else { | |
333 | mutex_lock(&revmap_trees_mutex); | |
334 | radix_tree_delete(&domain->revmap_tree, hwirq); | |
335 | mutex_unlock(&revmap_trees_mutex); | |
913af207 GL |
336 | } |
337 | } | |
338 | ||
ddaf144c GL |
339 | int irq_domain_associate(struct irq_domain *domain, unsigned int virq, |
340 | irq_hw_number_t hwirq) | |
cc79ca69 | 341 | { |
ddaf144c GL |
342 | struct irq_data *irq_data = irq_get_irq_data(virq); |
343 | int ret; | |
cc79ca69 | 344 | |
ddaf144c GL |
345 | if (WARN(hwirq >= domain->hwirq_max, |
346 | "error: hwirq 0x%x is too large for %s\n", (int)hwirq, domain->name)) | |
347 | return -EINVAL; | |
348 | if (WARN(!irq_data, "error: virq%i is not allocated", virq)) | |
349 | return -EINVAL; | |
350 | if (WARN(irq_data->domain, "error: virq%i is already associated", virq)) | |
351 | return -EINVAL; | |
cc79ca69 | 352 | |
ddaf144c GL |
353 | mutex_lock(&irq_domain_mutex); |
354 | irq_data->hwirq = hwirq; | |
355 | irq_data->domain = domain; | |
356 | if (domain->ops->map) { | |
357 | ret = domain->ops->map(domain, virq, hwirq); | |
358 | if (ret != 0) { | |
359 | /* | |
360 | * If map() returns -EPERM, this interrupt is protected | |
361 | * by the firmware or some other service and shall not | |
362 | * be mapped. Don't bother telling the user about it. | |
363 | */ | |
364 | if (ret != -EPERM) { | |
365 | pr_info("%s didn't like hwirq-0x%lx to VIRQ%i mapping (rc=%d)\n", | |
366 | domain->name, hwirq, virq, ret); | |
f5a1ad05 | 367 | } |
ddaf144c GL |
368 | irq_data->domain = NULL; |
369 | irq_data->hwirq = 0; | |
370 | mutex_unlock(&irq_domain_mutex); | |
371 | return ret; | |
98aa468e GL |
372 | } |
373 | ||
ddaf144c GL |
374 | /* If not already assigned, give the domain the chip's name */ |
375 | if (!domain->name && irq_data->chip) | |
376 | domain->name = irq_data->chip->name; | |
377 | } | |
2a71a1a9 | 378 | |
ddaf144c GL |
379 | if (hwirq < domain->revmap_size) { |
380 | domain->linear_revmap[hwirq] = virq; | |
381 | } else { | |
382 | mutex_lock(&revmap_trees_mutex); | |
383 | radix_tree_insert(&domain->revmap_tree, hwirq, irq_data); | |
384 | mutex_unlock(&revmap_trees_mutex); | |
98aa468e | 385 | } |
ddaf144c GL |
386 | mutex_unlock(&irq_domain_mutex); |
387 | ||
388 | irq_clear_status_flags(virq, IRQ_NOREQUEST); | |
cc79ca69 GL |
389 | |
390 | return 0; | |
391 | } | |
ddaf144c | 392 | EXPORT_SYMBOL_GPL(irq_domain_associate); |
98aa468e | 393 | |
ddaf144c GL |
394 | void irq_domain_associate_many(struct irq_domain *domain, unsigned int irq_base, |
395 | irq_hw_number_t hwirq_base, int count) | |
396 | { | |
5d4c9bc7 | 397 | struct device_node *of_node; |
ddaf144c GL |
398 | int i; |
399 | ||
5d4c9bc7 | 400 | of_node = irq_domain_get_of_node(domain); |
ddaf144c | 401 | pr_debug("%s(%s, irqbase=%i, hwbase=%i, count=%i)\n", __func__, |
5d4c9bc7 | 402 | of_node_full_name(of_node), irq_base, (int)hwirq_base, count); |
ddaf144c GL |
403 | |
404 | for (i = 0; i < count; i++) { | |
405 | irq_domain_associate(domain, irq_base + i, hwirq_base + i); | |
406 | } | |
cc79ca69 | 407 | } |
98aa468e | 408 | EXPORT_SYMBOL_GPL(irq_domain_associate_many); |
cc79ca69 GL |
409 | |
410 | /** | |
411 | * irq_create_direct_mapping() - Allocate an irq for direct mapping | |
68700650 | 412 | * @domain: domain to allocate the irq for or NULL for default domain |
cc79ca69 GL |
413 | * |
414 | * This routine is used for irq controllers which can choose the hardware | |
415 | * interrupt numbers they generate. In such a case it's simplest to use | |
1aa0dd94 GL |
416 | * the linux irq as the hardware interrupt number. It still uses the linear |
417 | * or radix tree to store the mapping, but the irq controller can optimize | |
418 | * the revmap path by using the hwirq directly. | |
cc79ca69 | 419 | */ |
68700650 | 420 | unsigned int irq_create_direct_mapping(struct irq_domain *domain) |
cc79ca69 | 421 | { |
5d4c9bc7 | 422 | struct device_node *of_node; |
cc79ca69 GL |
423 | unsigned int virq; |
424 | ||
68700650 GL |
425 | if (domain == NULL) |
426 | domain = irq_default_domain; | |
cc79ca69 | 427 | |
5d4c9bc7 MZ |
428 | of_node = irq_domain_get_of_node(domain); |
429 | virq = irq_alloc_desc_from(1, of_node_to_nid(of_node)); | |
03848373 | 430 | if (!virq) { |
54a90588 | 431 | pr_debug("create_direct virq allocation failed\n"); |
03848373 | 432 | return 0; |
cc79ca69 | 433 | } |
1aa0dd94 | 434 | if (virq >= domain->revmap_direct_max_irq) { |
cc79ca69 | 435 | pr_err("ERROR: no free irqs available below %i maximum\n", |
1aa0dd94 | 436 | domain->revmap_direct_max_irq); |
cc79ca69 GL |
437 | irq_free_desc(virq); |
438 | return 0; | |
439 | } | |
54a90588 | 440 | pr_debug("create_direct obtained virq %d\n", virq); |
cc79ca69 | 441 | |
98aa468e | 442 | if (irq_domain_associate(domain, virq, virq)) { |
cc79ca69 | 443 | irq_free_desc(virq); |
03848373 | 444 | return 0; |
cc79ca69 GL |
445 | } |
446 | ||
447 | return virq; | |
448 | } | |
ecd84eb2 | 449 | EXPORT_SYMBOL_GPL(irq_create_direct_mapping); |
cc79ca69 GL |
450 | |
451 | /** | |
452 | * irq_create_mapping() - Map a hardware interrupt into linux irq space | |
68700650 GL |
453 | * @domain: domain owning this hardware interrupt or NULL for default domain |
454 | * @hwirq: hardware irq number in that domain space | |
cc79ca69 GL |
455 | * |
456 | * Only one mapping per hardware interrupt is permitted. Returns a linux | |
457 | * irq number. | |
458 | * If the sense/trigger is to be specified, set_irq_type() should be called | |
459 | * on the number returned from that call. | |
460 | */ | |
68700650 | 461 | unsigned int irq_create_mapping(struct irq_domain *domain, |
cc79ca69 GL |
462 | irq_hw_number_t hwirq) |
463 | { | |
5d4c9bc7 | 464 | struct device_node *of_node; |
5b7526e3 | 465 | int virq; |
cc79ca69 | 466 | |
54a90588 | 467 | pr_debug("irq_create_mapping(0x%p, 0x%lx)\n", domain, hwirq); |
cc79ca69 | 468 | |
68700650 GL |
469 | /* Look for default domain if nececssary */ |
470 | if (domain == NULL) | |
471 | domain = irq_default_domain; | |
472 | if (domain == NULL) { | |
798f0fd1 | 473 | WARN(1, "%s(, %lx) called with NULL domain\n", __func__, hwirq); |
03848373 | 474 | return 0; |
cc79ca69 | 475 | } |
54a90588 | 476 | pr_debug("-> using domain @%p\n", domain); |
cc79ca69 | 477 | |
5d4c9bc7 MZ |
478 | of_node = irq_domain_get_of_node(domain); |
479 | ||
cc79ca69 | 480 | /* Check if mapping already exists */ |
68700650 | 481 | virq = irq_find_mapping(domain, hwirq); |
03848373 | 482 | if (virq) { |
54a90588 | 483 | pr_debug("-> existing mapping on virq %d\n", virq); |
cc79ca69 GL |
484 | return virq; |
485 | } | |
486 | ||
1bc04f2c | 487 | /* Allocate a virtual interrupt number */ |
5d4c9bc7 | 488 | virq = irq_domain_alloc_descs(-1, 1, hwirq, of_node_to_nid(of_node)); |
5b7526e3 | 489 | if (virq <= 0) { |
54a90588 | 490 | pr_debug("-> virq allocation failed\n"); |
1bc04f2c | 491 | return 0; |
cc79ca69 GL |
492 | } |
493 | ||
98aa468e | 494 | if (irq_domain_associate(domain, virq, hwirq)) { |
73255704 | 495 | irq_free_desc(virq); |
03848373 | 496 | return 0; |
cc79ca69 GL |
497 | } |
498 | ||
54a90588 | 499 | pr_debug("irq %lu on domain %s mapped to virtual irq %u\n", |
5d4c9bc7 | 500 | hwirq, of_node_full_name(of_node), virq); |
cc79ca69 GL |
501 | |
502 | return virq; | |
503 | } | |
504 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
505 | ||
98aa468e GL |
506 | /** |
507 | * irq_create_strict_mappings() - Map a range of hw irqs to fixed linux irqs | |
508 | * @domain: domain owning the interrupt range | |
509 | * @irq_base: beginning of linux IRQ range | |
510 | * @hwirq_base: beginning of hardware IRQ range | |
511 | * @count: Number of interrupts to map | |
512 | * | |
513 | * This routine is used for allocating and mapping a range of hardware | |
514 | * irqs to linux irqs where the linux irq numbers are at pre-defined | |
515 | * locations. For use by controllers that already have static mappings | |
516 | * to insert in to the domain. | |
517 | * | |
518 | * Non-linear users can use irq_create_identity_mapping() for IRQ-at-a-time | |
519 | * domain insertion. | |
520 | * | |
521 | * 0 is returned upon success, while any failure to establish a static | |
522 | * mapping is treated as an error. | |
523 | */ | |
524 | int irq_create_strict_mappings(struct irq_domain *domain, unsigned int irq_base, | |
525 | irq_hw_number_t hwirq_base, int count) | |
526 | { | |
5d4c9bc7 | 527 | struct device_node *of_node; |
98aa468e GL |
528 | int ret; |
529 | ||
5d4c9bc7 | 530 | of_node = irq_domain_get_of_node(domain); |
98aa468e | 531 | ret = irq_alloc_descs(irq_base, irq_base, count, |
5d4c9bc7 | 532 | of_node_to_nid(of_node)); |
98aa468e GL |
533 | if (unlikely(ret < 0)) |
534 | return ret; | |
535 | ||
ddaf144c | 536 | irq_domain_associate_many(domain, irq_base, hwirq_base, count); |
98aa468e GL |
537 | return 0; |
538 | } | |
539 | EXPORT_SYMBOL_GPL(irq_create_strict_mappings); | |
540 | ||
11e4438e MZ |
541 | static int irq_domain_translate(struct irq_domain *d, |
542 | struct irq_fwspec *fwspec, | |
543 | irq_hw_number_t *hwirq, unsigned int *type) | |
544 | { | |
545 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
546 | if (d->ops->translate) | |
547 | return d->ops->translate(d, fwspec, hwirq, type); | |
548 | #endif | |
549 | if (d->ops->xlate) | |
550 | return d->ops->xlate(d, to_of_node(fwspec->fwnode), | |
551 | fwspec->param, fwspec->param_count, | |
552 | hwirq, type); | |
553 | ||
554 | /* If domain has no translation, then we assume interrupt line */ | |
555 | *hwirq = fwspec->param[0]; | |
556 | return 0; | |
557 | } | |
558 | ||
559 | static void of_phandle_args_to_fwspec(struct of_phandle_args *irq_data, | |
560 | struct irq_fwspec *fwspec) | |
561 | { | |
562 | int i; | |
563 | ||
564 | fwspec->fwnode = irq_data->np ? &irq_data->np->fwnode : NULL; | |
565 | fwspec->param_count = irq_data->args_count; | |
566 | ||
567 | for (i = 0; i < irq_data->args_count; i++) | |
568 | fwspec->param[i] = irq_data->args[i]; | |
569 | } | |
570 | ||
c0131f09 | 571 | unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec) |
cc79ca69 | 572 | { |
68700650 | 573 | struct irq_domain *domain; |
cc79ca69 GL |
574 | irq_hw_number_t hwirq; |
575 | unsigned int type = IRQ_TYPE_NONE; | |
f8264e34 | 576 | int virq; |
cc79ca69 | 577 | |
c0131f09 MZ |
578 | if (fwspec->fwnode) |
579 | domain = irq_find_matching_fwnode(fwspec->fwnode, DOMAIN_BUS_ANY); | |
11e4438e MZ |
580 | else |
581 | domain = irq_default_domain; | |
582 | ||
68700650 | 583 | if (!domain) { |
798f0fd1 | 584 | pr_warn("no irq domain found for %s !\n", |
c0131f09 | 585 | of_node_full_name(to_of_node(fwspec->fwnode))); |
03848373 | 586 | return 0; |
cc79ca69 GL |
587 | } |
588 | ||
c0131f09 | 589 | if (irq_domain_translate(domain, fwspec, &hwirq, &type)) |
11e4438e | 590 | return 0; |
cc79ca69 | 591 | |
0cc01aba YC |
592 | if (irq_domain_is_hierarchy(domain)) { |
593 | /* | |
594 | * If we've already configured this interrupt, | |
595 | * don't do it again, or hell will break loose. | |
596 | */ | |
597 | virq = irq_find_mapping(domain, hwirq); | |
598 | if (virq) | |
599 | return virq; | |
600 | ||
c0131f09 | 601 | virq = irq_domain_alloc_irqs(domain, 1, NUMA_NO_NODE, fwspec); |
0cc01aba YC |
602 | if (virq <= 0) |
603 | return 0; | |
604 | } else { | |
605 | /* Create mapping */ | |
606 | virq = irq_create_mapping(domain, hwirq); | |
607 | if (!virq) | |
608 | return virq; | |
609 | } | |
cc79ca69 GL |
610 | |
611 | /* Set type if specified and different than the current one */ | |
612 | if (type != IRQ_TYPE_NONE && | |
fbab62c5 | 613 | type != irq_get_trigger_type(virq)) |
cc79ca69 GL |
614 | irq_set_irq_type(virq, type); |
615 | return virq; | |
616 | } | |
c0131f09 MZ |
617 | EXPORT_SYMBOL_GPL(irq_create_fwspec_mapping); |
618 | ||
619 | unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data) | |
620 | { | |
621 | struct irq_fwspec fwspec; | |
622 | ||
623 | of_phandle_args_to_fwspec(irq_data, &fwspec); | |
624 | return irq_create_fwspec_mapping(&fwspec); | |
625 | } | |
cc79ca69 GL |
626 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
627 | ||
628 | /** | |
629 | * irq_dispose_mapping() - Unmap an interrupt | |
630 | * @virq: linux irq number of the interrupt to unmap | |
631 | */ | |
632 | void irq_dispose_mapping(unsigned int virq) | |
633 | { | |
634 | struct irq_data *irq_data = irq_get_irq_data(virq); | |
68700650 | 635 | struct irq_domain *domain; |
cc79ca69 | 636 | |
03848373 | 637 | if (!virq || !irq_data) |
cc79ca69 GL |
638 | return; |
639 | ||
68700650 GL |
640 | domain = irq_data->domain; |
641 | if (WARN_ON(domain == NULL)) | |
cc79ca69 GL |
642 | return; |
643 | ||
ddaf144c | 644 | irq_domain_disassociate(domain, virq); |
cc79ca69 GL |
645 | irq_free_desc(virq); |
646 | } | |
647 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); | |
648 | ||
649 | /** | |
650 | * irq_find_mapping() - Find a linux irq from an hw irq number. | |
68700650 GL |
651 | * @domain: domain owning this hardware interrupt |
652 | * @hwirq: hardware irq number in that domain space | |
cc79ca69 | 653 | */ |
68700650 | 654 | unsigned int irq_find_mapping(struct irq_domain *domain, |
cc79ca69 GL |
655 | irq_hw_number_t hwirq) |
656 | { | |
4c0946c4 | 657 | struct irq_data *data; |
cc79ca69 | 658 | |
68700650 GL |
659 | /* Look for default domain if nececssary */ |
660 | if (domain == NULL) | |
661 | domain = irq_default_domain; | |
662 | if (domain == NULL) | |
03848373 | 663 | return 0; |
cc79ca69 | 664 | |
1aa0dd94 | 665 | if (hwirq < domain->revmap_direct_max_irq) { |
f8264e34 JL |
666 | data = irq_domain_get_irq_data(domain, hwirq); |
667 | if (data && data->hwirq == hwirq) | |
4c0946c4 | 668 | return hwirq; |
4c0946c4 GL |
669 | } |
670 | ||
d3dcb436 GL |
671 | /* Check if the hwirq is in the linear revmap. */ |
672 | if (hwirq < domain->revmap_size) | |
673 | return domain->linear_revmap[hwirq]; | |
cc79ca69 | 674 | |
d3dcb436 GL |
675 | rcu_read_lock(); |
676 | data = radix_tree_lookup(&domain->revmap_tree, hwirq); | |
677 | rcu_read_unlock(); | |
678 | return data ? data->irq : 0; | |
cc79ca69 | 679 | } |
cc79ca69 | 680 | EXPORT_SYMBOL_GPL(irq_find_mapping); |
cc79ca69 | 681 | |
092b2fb0 | 682 | #ifdef CONFIG_IRQ_DOMAIN_DEBUG |
cc79ca69 GL |
683 | static int virq_debug_show(struct seq_file *m, void *private) |
684 | { | |
685 | unsigned long flags; | |
686 | struct irq_desc *desc; | |
1400ea86 GL |
687 | struct irq_domain *domain; |
688 | struct radix_tree_iter iter; | |
689 | void *data, **slot; | |
cc79ca69 GL |
690 | int i; |
691 | ||
1400ea86 GL |
692 | seq_printf(m, " %-16s %-6s %-10s %-10s %s\n", |
693 | "name", "mapped", "linear-max", "direct-max", "devtree-node"); | |
694 | mutex_lock(&irq_domain_mutex); | |
695 | list_for_each_entry(domain, &irq_domain_list, link) { | |
5d4c9bc7 | 696 | struct device_node *of_node; |
1400ea86 | 697 | int count = 0; |
5d4c9bc7 | 698 | of_node = irq_domain_get_of_node(domain); |
1400ea86 GL |
699 | radix_tree_for_each_slot(slot, &domain->revmap_tree, &iter, 0) |
700 | count++; | |
701 | seq_printf(m, "%c%-16s %6u %10u %10u %s\n", | |
702 | domain == irq_default_domain ? '*' : ' ', domain->name, | |
703 | domain->revmap_size + count, domain->revmap_size, | |
704 | domain->revmap_direct_max_irq, | |
5d4c9bc7 | 705 | of_node ? of_node_full_name(of_node) : ""); |
1400ea86 GL |
706 | } |
707 | mutex_unlock(&irq_domain_mutex); | |
708 | ||
709 | seq_printf(m, "%-5s %-7s %-15s %-*s %6s %-14s %s\n", "irq", "hwirq", | |
5269a9ab | 710 | "chip name", (int)(2 * sizeof(void *) + 2), "chip data", |
1400ea86 | 711 | "active", "type", "domain"); |
cc79ca69 GL |
712 | |
713 | for (i = 1; i < nr_irqs; i++) { | |
714 | desc = irq_to_desc(i); | |
715 | if (!desc) | |
716 | continue; | |
717 | ||
718 | raw_spin_lock_irqsave(&desc->lock, flags); | |
1400ea86 | 719 | domain = desc->irq_data.domain; |
cc79ca69 | 720 | |
1400ea86 | 721 | if (domain) { |
cc79ca69 | 722 | struct irq_chip *chip; |
1400ea86 GL |
723 | int hwirq = desc->irq_data.hwirq; |
724 | bool direct; | |
cc79ca69 GL |
725 | |
726 | seq_printf(m, "%5d ", i); | |
1400ea86 | 727 | seq_printf(m, "0x%05x ", hwirq); |
cc79ca69 GL |
728 | |
729 | chip = irq_desc_get_chip(desc); | |
0bb4afb4 | 730 | seq_printf(m, "%-15s ", (chip && chip->name) ? chip->name : "none"); |
cc79ca69 GL |
731 | |
732 | data = irq_desc_get_chip_data(desc); | |
15e06bf6 | 733 | seq_printf(m, data ? "0x%p " : " %p ", data); |
cc79ca69 | 734 | |
1400ea86 GL |
735 | seq_printf(m, " %c ", (desc->action && desc->action->handler) ? '*' : ' '); |
736 | direct = (i == hwirq) && (i < domain->revmap_direct_max_irq); | |
737 | seq_printf(m, "%6s%-8s ", | |
738 | (hwirq < domain->revmap_size) ? "LINEAR" : "RADIX", | |
739 | direct ? "(DIRECT)" : ""); | |
0bb4afb4 | 740 | seq_printf(m, "%s\n", desc->irq_data.domain->name); |
cc79ca69 GL |
741 | } |
742 | ||
743 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
744 | } | |
745 | ||
746 | return 0; | |
747 | } | |
748 | ||
749 | static int virq_debug_open(struct inode *inode, struct file *file) | |
750 | { | |
751 | return single_open(file, virq_debug_show, inode->i_private); | |
752 | } | |
753 | ||
754 | static const struct file_operations virq_debug_fops = { | |
755 | .open = virq_debug_open, | |
756 | .read = seq_read, | |
757 | .llseek = seq_lseek, | |
758 | .release = single_release, | |
759 | }; | |
760 | ||
761 | static int __init irq_debugfs_init(void) | |
762 | { | |
092b2fb0 | 763 | if (debugfs_create_file("irq_domain_mapping", S_IRUGO, NULL, |
cc79ca69 GL |
764 | NULL, &virq_debug_fops) == NULL) |
765 | return -ENOMEM; | |
766 | ||
767 | return 0; | |
768 | } | |
769 | __initcall(irq_debugfs_init); | |
092b2fb0 | 770 | #endif /* CONFIG_IRQ_DOMAIN_DEBUG */ |
cc79ca69 | 771 | |
16b2e6e2 GL |
772 | /** |
773 | * irq_domain_xlate_onecell() - Generic xlate for direct one cell bindings | |
774 | * | |
775 | * Device Tree IRQ specifier translation function which works with one cell | |
776 | * bindings where the cell value maps directly to the hwirq number. | |
777 | */ | |
778 | int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, | |
779 | const u32 *intspec, unsigned int intsize, | |
780 | unsigned long *out_hwirq, unsigned int *out_type) | |
7e713301 | 781 | { |
16b2e6e2 | 782 | if (WARN_ON(intsize < 1)) |
7e713301 | 783 | return -EINVAL; |
7e713301 GL |
784 | *out_hwirq = intspec[0]; |
785 | *out_type = IRQ_TYPE_NONE; | |
7e713301 GL |
786 | return 0; |
787 | } | |
16b2e6e2 GL |
788 | EXPORT_SYMBOL_GPL(irq_domain_xlate_onecell); |
789 | ||
790 | /** | |
791 | * irq_domain_xlate_twocell() - Generic xlate for direct two cell bindings | |
792 | * | |
793 | * Device Tree IRQ specifier translation function which works with two cell | |
794 | * bindings where the cell values map directly to the hwirq number | |
795 | * and linux irq flags. | |
796 | */ | |
797 | int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, | |
798 | const u32 *intspec, unsigned int intsize, | |
799 | irq_hw_number_t *out_hwirq, unsigned int *out_type) | |
800 | { | |
801 | if (WARN_ON(intsize < 2)) | |
802 | return -EINVAL; | |
803 | *out_hwirq = intspec[0]; | |
804 | *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; | |
805 | return 0; | |
806 | } | |
807 | EXPORT_SYMBOL_GPL(irq_domain_xlate_twocell); | |
808 | ||
809 | /** | |
810 | * irq_domain_xlate_onetwocell() - Generic xlate for one or two cell bindings | |
811 | * | |
812 | * Device Tree IRQ specifier translation function which works with either one | |
813 | * or two cell bindings where the cell values map directly to the hwirq number | |
814 | * and linux irq flags. | |
815 | * | |
816 | * Note: don't use this function unless your interrupt controller explicitly | |
817 | * supports both one and two cell bindings. For the majority of controllers | |
818 | * the _onecell() or _twocell() variants above should be used. | |
819 | */ | |
820 | int irq_domain_xlate_onetwocell(struct irq_domain *d, | |
821 | struct device_node *ctrlr, | |
822 | const u32 *intspec, unsigned int intsize, | |
823 | unsigned long *out_hwirq, unsigned int *out_type) | |
824 | { | |
825 | if (WARN_ON(intsize < 1)) | |
826 | return -EINVAL; | |
827 | *out_hwirq = intspec[0]; | |
828 | *out_type = (intsize > 1) ? intspec[1] : IRQ_TYPE_NONE; | |
829 | return 0; | |
830 | } | |
831 | EXPORT_SYMBOL_GPL(irq_domain_xlate_onetwocell); | |
7e713301 | 832 | |
a18dc81b | 833 | const struct irq_domain_ops irq_domain_simple_ops = { |
16b2e6e2 | 834 | .xlate = irq_domain_xlate_onetwocell, |
75294957 GL |
835 | }; |
836 | EXPORT_SYMBOL_GPL(irq_domain_simple_ops); | |
f8264e34 JL |
837 | |
838 | static int irq_domain_alloc_descs(int virq, unsigned int cnt, | |
839 | irq_hw_number_t hwirq, int node) | |
840 | { | |
841 | unsigned int hint; | |
842 | ||
843 | if (virq >= 0) { | |
844 | virq = irq_alloc_descs(virq, virq, cnt, node); | |
845 | } else { | |
846 | hint = hwirq % nr_irqs; | |
847 | if (hint == 0) | |
848 | hint++; | |
849 | virq = irq_alloc_descs_from(hint, cnt, node); | |
850 | if (virq <= 0 && hint > 1) | |
851 | virq = irq_alloc_descs_from(1, cnt, node); | |
852 | } | |
853 | ||
854 | return virq; | |
855 | } | |
856 | ||
857 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
afb7da83 | 858 | /** |
2a5e9a07 | 859 | * irq_domain_create_hierarchy - Add a irqdomain into the hierarchy |
afb7da83 JL |
860 | * @parent: Parent irq domain to associate with the new domain |
861 | * @flags: Irq domain flags associated to the domain | |
862 | * @size: Size of the domain. See below | |
2a5e9a07 | 863 | * @fwnode: Optional fwnode of the interrupt controller |
afb7da83 JL |
864 | * @ops: Pointer to the interrupt domain callbacks |
865 | * @host_data: Controller private data pointer | |
866 | * | |
867 | * If @size is 0 a tree domain is created, otherwise a linear domain. | |
868 | * | |
869 | * If successful the parent is associated to the new domain and the | |
870 | * domain flags are set. | |
871 | * Returns pointer to IRQ domain, or NULL on failure. | |
872 | */ | |
2a5e9a07 | 873 | struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, |
afb7da83 JL |
874 | unsigned int flags, |
875 | unsigned int size, | |
2a5e9a07 | 876 | struct fwnode_handle *fwnode, |
afb7da83 JL |
877 | const struct irq_domain_ops *ops, |
878 | void *host_data) | |
879 | { | |
880 | struct irq_domain *domain; | |
881 | ||
882 | if (size) | |
2a5e9a07 | 883 | domain = irq_domain_create_linear(fwnode, size, ops, host_data); |
afb7da83 | 884 | else |
2a5e9a07 | 885 | domain = irq_domain_create_tree(fwnode, ops, host_data); |
afb7da83 JL |
886 | if (domain) { |
887 | domain->parent = parent; | |
888 | domain->flags |= flags; | |
889 | } | |
890 | ||
891 | return domain; | |
892 | } | |
893 | ||
f8264e34 JL |
894 | static void irq_domain_insert_irq(int virq) |
895 | { | |
896 | struct irq_data *data; | |
897 | ||
898 | for (data = irq_get_irq_data(virq); data; data = data->parent_data) { | |
899 | struct irq_domain *domain = data->domain; | |
900 | irq_hw_number_t hwirq = data->hwirq; | |
901 | ||
902 | if (hwirq < domain->revmap_size) { | |
903 | domain->linear_revmap[hwirq] = virq; | |
904 | } else { | |
905 | mutex_lock(&revmap_trees_mutex); | |
906 | radix_tree_insert(&domain->revmap_tree, hwirq, data); | |
907 | mutex_unlock(&revmap_trees_mutex); | |
908 | } | |
909 | ||
910 | /* If not already assigned, give the domain the chip's name */ | |
911 | if (!domain->name && data->chip) | |
912 | domain->name = data->chip->name; | |
913 | } | |
914 | ||
915 | irq_clear_status_flags(virq, IRQ_NOREQUEST); | |
916 | } | |
917 | ||
918 | static void irq_domain_remove_irq(int virq) | |
919 | { | |
920 | struct irq_data *data; | |
921 | ||
922 | irq_set_status_flags(virq, IRQ_NOREQUEST); | |
923 | irq_set_chip_and_handler(virq, NULL, NULL); | |
924 | synchronize_irq(virq); | |
925 | smp_mb(); | |
926 | ||
927 | for (data = irq_get_irq_data(virq); data; data = data->parent_data) { | |
928 | struct irq_domain *domain = data->domain; | |
929 | irq_hw_number_t hwirq = data->hwirq; | |
930 | ||
931 | if (hwirq < domain->revmap_size) { | |
932 | domain->linear_revmap[hwirq] = 0; | |
933 | } else { | |
934 | mutex_lock(&revmap_trees_mutex); | |
935 | radix_tree_delete(&domain->revmap_tree, hwirq); | |
936 | mutex_unlock(&revmap_trees_mutex); | |
937 | } | |
938 | } | |
939 | } | |
940 | ||
941 | static struct irq_data *irq_domain_insert_irq_data(struct irq_domain *domain, | |
942 | struct irq_data *child) | |
943 | { | |
944 | struct irq_data *irq_data; | |
945 | ||
6783011b JL |
946 | irq_data = kzalloc_node(sizeof(*irq_data), GFP_KERNEL, |
947 | irq_data_get_node(child)); | |
f8264e34 JL |
948 | if (irq_data) { |
949 | child->parent_data = irq_data; | |
950 | irq_data->irq = child->irq; | |
0d0b4c86 | 951 | irq_data->common = child->common; |
f8264e34 JL |
952 | irq_data->domain = domain; |
953 | } | |
954 | ||
955 | return irq_data; | |
956 | } | |
957 | ||
958 | static void irq_domain_free_irq_data(unsigned int virq, unsigned int nr_irqs) | |
959 | { | |
960 | struct irq_data *irq_data, *tmp; | |
961 | int i; | |
962 | ||
963 | for (i = 0; i < nr_irqs; i++) { | |
964 | irq_data = irq_get_irq_data(virq + i); | |
965 | tmp = irq_data->parent_data; | |
966 | irq_data->parent_data = NULL; | |
967 | irq_data->domain = NULL; | |
968 | ||
969 | while (tmp) { | |
970 | irq_data = tmp; | |
971 | tmp = tmp->parent_data; | |
972 | kfree(irq_data); | |
973 | } | |
974 | } | |
975 | } | |
976 | ||
977 | static int irq_domain_alloc_irq_data(struct irq_domain *domain, | |
978 | unsigned int virq, unsigned int nr_irqs) | |
979 | { | |
980 | struct irq_data *irq_data; | |
981 | struct irq_domain *parent; | |
982 | int i; | |
983 | ||
984 | /* The outermost irq_data is embedded in struct irq_desc */ | |
985 | for (i = 0; i < nr_irqs; i++) { | |
986 | irq_data = irq_get_irq_data(virq + i); | |
987 | irq_data->domain = domain; | |
988 | ||
989 | for (parent = domain->parent; parent; parent = parent->parent) { | |
990 | irq_data = irq_domain_insert_irq_data(parent, irq_data); | |
991 | if (!irq_data) { | |
992 | irq_domain_free_irq_data(virq, i + 1); | |
993 | return -ENOMEM; | |
994 | } | |
995 | } | |
996 | } | |
997 | ||
998 | return 0; | |
999 | } | |
1000 | ||
1001 | /** | |
1002 | * irq_domain_get_irq_data - Get irq_data associated with @virq and @domain | |
1003 | * @domain: domain to match | |
1004 | * @virq: IRQ number to get irq_data | |
1005 | */ | |
1006 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
1007 | unsigned int virq) | |
1008 | { | |
1009 | struct irq_data *irq_data; | |
1010 | ||
1011 | for (irq_data = irq_get_irq_data(virq); irq_data; | |
1012 | irq_data = irq_data->parent_data) | |
1013 | if (irq_data->domain == domain) | |
1014 | return irq_data; | |
1015 | ||
1016 | return NULL; | |
1017 | } | |
a4289dc2 | 1018 | EXPORT_SYMBOL_GPL(irq_domain_get_irq_data); |
f8264e34 JL |
1019 | |
1020 | /** | |
1021 | * irq_domain_set_hwirq_and_chip - Set hwirq and irqchip of @virq at @domain | |
1022 | * @domain: Interrupt domain to match | |
1023 | * @virq: IRQ number | |
1024 | * @hwirq: The hwirq number | |
1025 | * @chip: The associated interrupt chip | |
1026 | * @chip_data: The associated chip data | |
1027 | */ | |
1028 | int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq, | |
1029 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1030 | void *chip_data) | |
1031 | { | |
1032 | struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); | |
1033 | ||
1034 | if (!irq_data) | |
1035 | return -ENOENT; | |
1036 | ||
1037 | irq_data->hwirq = hwirq; | |
1038 | irq_data->chip = chip ? chip : &no_irq_chip; | |
1039 | irq_data->chip_data = chip_data; | |
1040 | ||
1041 | return 0; | |
1042 | } | |
1043 | ||
1b537708 JL |
1044 | /** |
1045 | * irq_domain_set_info - Set the complete data for a @virq in @domain | |
1046 | * @domain: Interrupt domain to match | |
1047 | * @virq: IRQ number | |
1048 | * @hwirq: The hardware interrupt number | |
1049 | * @chip: The associated interrupt chip | |
1050 | * @chip_data: The associated interrupt chip data | |
1051 | * @handler: The interrupt flow handler | |
1052 | * @handler_data: The interrupt flow handler data | |
1053 | * @handler_name: The interrupt handler name | |
1054 | */ | |
1055 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, | |
1056 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1057 | void *chip_data, irq_flow_handler_t handler, | |
1058 | void *handler_data, const char *handler_name) | |
1059 | { | |
1060 | irq_domain_set_hwirq_and_chip(domain, virq, hwirq, chip, chip_data); | |
1061 | __irq_set_handler(virq, handler, 0, handler_name); | |
1062 | irq_set_handler_data(virq, handler_data); | |
1063 | } | |
64bce3e8 | 1064 | EXPORT_SYMBOL(irq_domain_set_info); |
1b537708 | 1065 | |
f8264e34 JL |
1066 | /** |
1067 | * irq_domain_reset_irq_data - Clear hwirq, chip and chip_data in @irq_data | |
1068 | * @irq_data: The pointer to irq_data | |
1069 | */ | |
1070 | void irq_domain_reset_irq_data(struct irq_data *irq_data) | |
1071 | { | |
1072 | irq_data->hwirq = 0; | |
1073 | irq_data->chip = &no_irq_chip; | |
1074 | irq_data->chip_data = NULL; | |
1075 | } | |
1076 | ||
1077 | /** | |
1078 | * irq_domain_free_irqs_common - Clear irq_data and free the parent | |
1079 | * @domain: Interrupt domain to match | |
1080 | * @virq: IRQ number to start with | |
1081 | * @nr_irqs: The number of irqs to free | |
1082 | */ | |
1083 | void irq_domain_free_irqs_common(struct irq_domain *domain, unsigned int virq, | |
1084 | unsigned int nr_irqs) | |
1085 | { | |
1086 | struct irq_data *irq_data; | |
1087 | int i; | |
1088 | ||
1089 | for (i = 0; i < nr_irqs; i++) { | |
1090 | irq_data = irq_domain_get_irq_data(domain, virq + i); | |
1091 | if (irq_data) | |
1092 | irq_domain_reset_irq_data(irq_data); | |
1093 | } | |
1094 | irq_domain_free_irqs_parent(domain, virq, nr_irqs); | |
1095 | } | |
1096 | ||
1097 | /** | |
1098 | * irq_domain_free_irqs_top - Clear handler and handler data, clear irqdata and free parent | |
1099 | * @domain: Interrupt domain to match | |
1100 | * @virq: IRQ number to start with | |
1101 | * @nr_irqs: The number of irqs to free | |
1102 | */ | |
1103 | void irq_domain_free_irqs_top(struct irq_domain *domain, unsigned int virq, | |
1104 | unsigned int nr_irqs) | |
1105 | { | |
1106 | int i; | |
1107 | ||
1108 | for (i = 0; i < nr_irqs; i++) { | |
1109 | irq_set_handler_data(virq + i, NULL); | |
1110 | irq_set_handler(virq + i, NULL); | |
1111 | } | |
1112 | irq_domain_free_irqs_common(domain, virq, nr_irqs); | |
1113 | } | |
1114 | ||
36d72731 JL |
1115 | static bool irq_domain_is_auto_recursive(struct irq_domain *domain) |
1116 | { | |
1117 | return domain->flags & IRQ_DOMAIN_FLAG_AUTO_RECURSIVE; | |
1118 | } | |
1119 | ||
1120 | static void irq_domain_free_irqs_recursive(struct irq_domain *domain, | |
1121 | unsigned int irq_base, | |
1122 | unsigned int nr_irqs) | |
1123 | { | |
1124 | domain->ops->free(domain, irq_base, nr_irqs); | |
1125 | if (irq_domain_is_auto_recursive(domain)) { | |
1126 | BUG_ON(!domain->parent); | |
1127 | irq_domain_free_irqs_recursive(domain->parent, irq_base, | |
1128 | nr_irqs); | |
1129 | } | |
1130 | } | |
1131 | ||
c466595c MZ |
1132 | int irq_domain_alloc_irqs_recursive(struct irq_domain *domain, |
1133 | unsigned int irq_base, | |
1134 | unsigned int nr_irqs, void *arg) | |
36d72731 JL |
1135 | { |
1136 | int ret = 0; | |
1137 | struct irq_domain *parent = domain->parent; | |
1138 | bool recursive = irq_domain_is_auto_recursive(domain); | |
1139 | ||
1140 | BUG_ON(recursive && !parent); | |
1141 | if (recursive) | |
1142 | ret = irq_domain_alloc_irqs_recursive(parent, irq_base, | |
1143 | nr_irqs, arg); | |
1144 | if (ret >= 0) | |
1145 | ret = domain->ops->alloc(domain, irq_base, nr_irqs, arg); | |
1146 | if (ret < 0 && recursive) | |
1147 | irq_domain_free_irqs_recursive(parent, irq_base, nr_irqs); | |
1148 | ||
1149 | return ret; | |
1150 | } | |
1151 | ||
f8264e34 JL |
1152 | /** |
1153 | * __irq_domain_alloc_irqs - Allocate IRQs from domain | |
1154 | * @domain: domain to allocate from | |
1155 | * @irq_base: allocate specified IRQ nubmer if irq_base >= 0 | |
1156 | * @nr_irqs: number of IRQs to allocate | |
1157 | * @node: NUMA node id for memory allocation | |
1158 | * @arg: domain specific argument | |
1159 | * @realloc: IRQ descriptors have already been allocated if true | |
1160 | * | |
1161 | * Allocate IRQ numbers and initialized all data structures to support | |
1162 | * hierarchy IRQ domains. | |
1163 | * Parameter @realloc is mainly to support legacy IRQs. | |
1164 | * Returns error code or allocated IRQ number | |
1165 | * | |
1166 | * The whole process to setup an IRQ has been split into two steps. | |
1167 | * The first step, __irq_domain_alloc_irqs(), is to allocate IRQ | |
1168 | * descriptor and required hardware resources. The second step, | |
1169 | * irq_domain_activate_irq(), is to program hardwares with preallocated | |
1170 | * resources. In this way, it's easier to rollback when failing to | |
1171 | * allocate resources. | |
1172 | */ | |
1173 | int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, | |
1174 | unsigned int nr_irqs, int node, void *arg, | |
1175 | bool realloc) | |
1176 | { | |
1177 | int i, ret, virq; | |
1178 | ||
1179 | if (domain == NULL) { | |
1180 | domain = irq_default_domain; | |
1181 | if (WARN(!domain, "domain is NULL; cannot allocate IRQ\n")) | |
1182 | return -EINVAL; | |
1183 | } | |
1184 | ||
1185 | if (!domain->ops->alloc) { | |
1186 | pr_debug("domain->ops->alloc() is NULL\n"); | |
1187 | return -ENOSYS; | |
1188 | } | |
1189 | ||
1190 | if (realloc && irq_base >= 0) { | |
1191 | virq = irq_base; | |
1192 | } else { | |
1193 | virq = irq_domain_alloc_descs(irq_base, nr_irqs, 0, node); | |
1194 | if (virq < 0) { | |
1195 | pr_debug("cannot allocate IRQ(base %d, count %d)\n", | |
1196 | irq_base, nr_irqs); | |
1197 | return virq; | |
1198 | } | |
1199 | } | |
1200 | ||
1201 | if (irq_domain_alloc_irq_data(domain, virq, nr_irqs)) { | |
1202 | pr_debug("cannot allocate memory for IRQ%d\n", virq); | |
1203 | ret = -ENOMEM; | |
1204 | goto out_free_desc; | |
1205 | } | |
1206 | ||
1207 | mutex_lock(&irq_domain_mutex); | |
36d72731 | 1208 | ret = irq_domain_alloc_irqs_recursive(domain, virq, nr_irqs, arg); |
f8264e34 JL |
1209 | if (ret < 0) { |
1210 | mutex_unlock(&irq_domain_mutex); | |
1211 | goto out_free_irq_data; | |
1212 | } | |
1213 | for (i = 0; i < nr_irqs; i++) | |
1214 | irq_domain_insert_irq(virq + i); | |
1215 | mutex_unlock(&irq_domain_mutex); | |
1216 | ||
1217 | return virq; | |
1218 | ||
1219 | out_free_irq_data: | |
1220 | irq_domain_free_irq_data(virq, nr_irqs); | |
1221 | out_free_desc: | |
1222 | irq_free_descs(virq, nr_irqs); | |
1223 | return ret; | |
1224 | } | |
1225 | ||
1226 | /** | |
1227 | * irq_domain_free_irqs - Free IRQ number and associated data structures | |
1228 | * @virq: base IRQ number | |
1229 | * @nr_irqs: number of IRQs to free | |
1230 | */ | |
1231 | void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs) | |
1232 | { | |
1233 | struct irq_data *data = irq_get_irq_data(virq); | |
1234 | int i; | |
1235 | ||
1236 | if (WARN(!data || !data->domain || !data->domain->ops->free, | |
1237 | "NULL pointer, cannot free irq\n")) | |
1238 | return; | |
1239 | ||
1240 | mutex_lock(&irq_domain_mutex); | |
1241 | for (i = 0; i < nr_irqs; i++) | |
1242 | irq_domain_remove_irq(virq + i); | |
36d72731 | 1243 | irq_domain_free_irqs_recursive(data->domain, virq, nr_irqs); |
f8264e34 JL |
1244 | mutex_unlock(&irq_domain_mutex); |
1245 | ||
1246 | irq_domain_free_irq_data(virq, nr_irqs); | |
1247 | irq_free_descs(virq, nr_irqs); | |
1248 | } | |
1249 | ||
36d72731 JL |
1250 | /** |
1251 | * irq_domain_alloc_irqs_parent - Allocate interrupts from parent domain | |
1252 | * @irq_base: Base IRQ number | |
1253 | * @nr_irqs: Number of IRQs to allocate | |
1254 | * @arg: Allocation data (arch/domain specific) | |
1255 | * | |
1256 | * Check whether the domain has been setup recursive. If not allocate | |
1257 | * through the parent domain. | |
1258 | */ | |
1259 | int irq_domain_alloc_irqs_parent(struct irq_domain *domain, | |
1260 | unsigned int irq_base, unsigned int nr_irqs, | |
1261 | void *arg) | |
1262 | { | |
1263 | /* irq_domain_alloc_irqs_recursive() has called parent's alloc() */ | |
1264 | if (irq_domain_is_auto_recursive(domain)) | |
1265 | return 0; | |
1266 | ||
1267 | domain = domain->parent; | |
1268 | if (domain) | |
1269 | return irq_domain_alloc_irqs_recursive(domain, irq_base, | |
1270 | nr_irqs, arg); | |
1271 | return -ENOSYS; | |
1272 | } | |
1273 | ||
1274 | /** | |
1275 | * irq_domain_free_irqs_parent - Free interrupts from parent domain | |
1276 | * @irq_base: Base IRQ number | |
1277 | * @nr_irqs: Number of IRQs to free | |
1278 | * | |
1279 | * Check whether the domain has been setup recursive. If not free | |
1280 | * through the parent domain. | |
1281 | */ | |
1282 | void irq_domain_free_irqs_parent(struct irq_domain *domain, | |
1283 | unsigned int irq_base, unsigned int nr_irqs) | |
1284 | { | |
1285 | /* irq_domain_free_irqs_recursive() will call parent's free */ | |
1286 | if (!irq_domain_is_auto_recursive(domain) && domain->parent) | |
1287 | irq_domain_free_irqs_recursive(domain->parent, irq_base, | |
1288 | nr_irqs); | |
1289 | } | |
1290 | ||
f8264e34 JL |
1291 | /** |
1292 | * irq_domain_activate_irq - Call domain_ops->activate recursively to activate | |
1293 | * interrupt | |
1294 | * @irq_data: outermost irq_data associated with interrupt | |
1295 | * | |
1296 | * This is the second step to call domain_ops->activate to program interrupt | |
1297 | * controllers, so the interrupt could actually get delivered. | |
1298 | */ | |
1299 | void irq_domain_activate_irq(struct irq_data *irq_data) | |
1300 | { | |
1301 | if (irq_data && irq_data->domain) { | |
1302 | struct irq_domain *domain = irq_data->domain; | |
1303 | ||
1304 | if (irq_data->parent_data) | |
1305 | irq_domain_activate_irq(irq_data->parent_data); | |
1306 | if (domain->ops->activate) | |
1307 | domain->ops->activate(domain, irq_data); | |
1308 | } | |
1309 | } | |
1310 | ||
1311 | /** | |
1312 | * irq_domain_deactivate_irq - Call domain_ops->deactivate recursively to | |
1313 | * deactivate interrupt | |
1314 | * @irq_data: outermost irq_data associated with interrupt | |
1315 | * | |
1316 | * It calls domain_ops->deactivate to program interrupt controllers to disable | |
1317 | * interrupt delivery. | |
1318 | */ | |
1319 | void irq_domain_deactivate_irq(struct irq_data *irq_data) | |
1320 | { | |
1321 | if (irq_data && irq_data->domain) { | |
1322 | struct irq_domain *domain = irq_data->domain; | |
1323 | ||
1324 | if (domain->ops->deactivate) | |
1325 | domain->ops->deactivate(domain, irq_data); | |
1326 | if (irq_data->parent_data) | |
1327 | irq_domain_deactivate_irq(irq_data->parent_data); | |
1328 | } | |
1329 | } | |
1330 | ||
1331 | static void irq_domain_check_hierarchy(struct irq_domain *domain) | |
1332 | { | |
1333 | /* Hierarchy irq_domains must implement callback alloc() */ | |
1334 | if (domain->ops->alloc) | |
1335 | domain->flags |= IRQ_DOMAIN_FLAG_HIERARCHY; | |
1336 | } | |
1337 | #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
1338 | /** | |
1339 | * irq_domain_get_irq_data - Get irq_data associated with @virq and @domain | |
1340 | * @domain: domain to match | |
1341 | * @virq: IRQ number to get irq_data | |
1342 | */ | |
1343 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
1344 | unsigned int virq) | |
1345 | { | |
1346 | struct irq_data *irq_data = irq_get_irq_data(virq); | |
1347 | ||
1348 | return (irq_data && irq_data->domain == domain) ? irq_data : NULL; | |
1349 | } | |
a4289dc2 | 1350 | EXPORT_SYMBOL_GPL(irq_domain_get_irq_data); |
f8264e34 | 1351 | |
5f22f5c6 SA |
1352 | /** |
1353 | * irq_domain_set_info - Set the complete data for a @virq in @domain | |
1354 | * @domain: Interrupt domain to match | |
1355 | * @virq: IRQ number | |
1356 | * @hwirq: The hardware interrupt number | |
1357 | * @chip: The associated interrupt chip | |
1358 | * @chip_data: The associated interrupt chip data | |
1359 | * @handler: The interrupt flow handler | |
1360 | * @handler_data: The interrupt flow handler data | |
1361 | * @handler_name: The interrupt handler name | |
1362 | */ | |
1363 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, | |
1364 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1365 | void *chip_data, irq_flow_handler_t handler, | |
1366 | void *handler_data, const char *handler_name) | |
1367 | { | |
1368 | irq_set_chip_and_handler_name(virq, chip, handler, handler_name); | |
1369 | irq_set_chip_data(virq, chip_data); | |
1370 | irq_set_handler_data(virq, handler_data); | |
1371 | } | |
1372 | ||
f8264e34 JL |
1373 | static void irq_domain_check_hierarchy(struct irq_domain *domain) |
1374 | { | |
1375 | } | |
1376 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |