revert "ARM: keystone: dts: add psci command definition"
[linux-2.6-block.git] / kernel / irq / irqdesc.c
CommitLineData
3795de23
TG
1/*
2 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
3 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
4 *
5 * This file contains the interrupt descriptor management code
6 *
7 * Detailed information is available in Documentation/DocBook/genericirq
8 *
9 */
10#include <linux/irq.h>
11#include <linux/slab.h>
ec53cf23 12#include <linux/export.h>
3795de23
TG
13#include <linux/interrupt.h>
14#include <linux/kernel_stat.h>
15#include <linux/radix-tree.h>
1f5a5b87 16#include <linux/bitmap.h>
76ba59f8 17#include <linux/irqdomain.h>
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TG
18
19#include "internals.h"
20
21/*
22 * lockdep: we want to handle all irq_desc locks as a single lock-class:
23 */
78f90d91 24static struct lock_class_key irq_desc_lock_class;
3795de23 25
fe051434 26#if defined(CONFIG_SMP)
fbf19803
TG
27static int __init irq_affinity_setup(char *str)
28{
29 zalloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
30 cpulist_parse(str, irq_default_affinity);
31 /*
32 * Set at least the boot cpu. We don't want to end up with
33 * bugreports caused by random comandline masks
34 */
35 cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
36 return 1;
37}
38__setup("irqaffinity=", irq_affinity_setup);
39
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40static void __init init_irq_default_affinity(void)
41{
fbf19803
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42#ifdef CONFIG_CPUMASK_OFFSTACK
43 if (!irq_default_affinity)
44 zalloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
45#endif
46 if (cpumask_empty(irq_default_affinity))
47 cpumask_setall(irq_default_affinity);
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48}
49#else
50static void __init init_irq_default_affinity(void)
51{
52}
53#endif
54
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55#ifdef CONFIG_SMP
56static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node)
57{
9df872fa
JL
58 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity,
59 gfp, node))
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60 return -ENOMEM;
61
62#ifdef CONFIG_GENERIC_PENDING_IRQ
63 if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
9df872fa 64 free_cpumask_var(desc->irq_common_data.affinity);
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65 return -ENOMEM;
66 }
67#endif
68 return 0;
69}
70
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71static void desc_smp_init(struct irq_desc *desc, int node,
72 const struct cpumask *affinity)
1f5a5b87 73{
45ddcecb
TG
74 if (!affinity)
75 affinity = irq_default_affinity;
76 cpumask_copy(desc->irq_common_data.affinity, affinity);
77
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78#ifdef CONFIG_GENERIC_PENDING_IRQ
79 cpumask_clear(desc->pending_mask);
80#endif
449e9cae
JL
81#ifdef CONFIG_NUMA
82 desc->irq_common_data.node = node;
83#endif
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TG
84}
85
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86#else
87static inline int
88alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) { return 0; }
45ddcecb
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89static inline void
90desc_smp_init(struct irq_desc *desc, int node, const struct cpumask *affinity) { }
1f5a5b87
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91#endif
92
b6873807 93static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node,
45ddcecb 94 const struct cpumask *affinity, struct module *owner)
1f5a5b87 95{
6c9ae009
ED
96 int cpu;
97
af7080e0 98 desc->irq_common_data.handler_data = NULL;
b237721c 99 desc->irq_common_data.msi_desc = NULL;
af7080e0 100
0d0b4c86 101 desc->irq_data.common = &desc->irq_common_data;
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102 desc->irq_data.irq = irq;
103 desc->irq_data.chip = &no_irq_chip;
104 desc->irq_data.chip_data = NULL;
f9e4989e 105 irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
801a0e9a 106 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
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107 desc->handle_irq = handle_bad_irq;
108 desc->depth = 1;
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109 desc->irq_count = 0;
110 desc->irqs_unhandled = 0;
1f5a5b87 111 desc->name = NULL;
b6873807 112 desc->owner = owner;
6c9ae009
ED
113 for_each_possible_cpu(cpu)
114 *per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
45ddcecb 115 desc_smp_init(desc, node, affinity);
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TG
116}
117
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118int nr_irqs = NR_IRQS;
119EXPORT_SYMBOL_GPL(nr_irqs);
120
a05a900a 121static DEFINE_MUTEX(sparse_irq_lock);
c1ee6264 122static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
1f5a5b87 123
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TG
124#ifdef CONFIG_SPARSE_IRQ
125
baa0d233 126static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
3795de23 127
1f5a5b87 128static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
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TG
129{
130 radix_tree_insert(&irq_desc_tree, irq, desc);
131}
132
133struct irq_desc *irq_to_desc(unsigned int irq)
134{
135 return radix_tree_lookup(&irq_desc_tree, irq);
136}
3911ff30 137EXPORT_SYMBOL(irq_to_desc);
3795de23 138
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139static void delete_irq_desc(unsigned int irq)
140{
141 radix_tree_delete(&irq_desc_tree, irq);
142}
143
144#ifdef CONFIG_SMP
145static void free_masks(struct irq_desc *desc)
146{
147#ifdef CONFIG_GENERIC_PENDING_IRQ
148 free_cpumask_var(desc->pending_mask);
149#endif
9df872fa 150 free_cpumask_var(desc->irq_common_data.affinity);
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151}
152#else
153static inline void free_masks(struct irq_desc *desc) { }
154#endif
155
c291ee62
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156void irq_lock_sparse(void)
157{
158 mutex_lock(&sparse_irq_lock);
159}
160
161void irq_unlock_sparse(void)
162{
163 mutex_unlock(&sparse_irq_lock);
164}
165
45ddcecb
TG
166static struct irq_desc *alloc_desc(int irq, int node, unsigned int flags,
167 const struct cpumask *affinity,
168 struct module *owner)
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TG
169{
170 struct irq_desc *desc;
baa0d233 171 gfp_t gfp = GFP_KERNEL;
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172
173 desc = kzalloc_node(sizeof(*desc), gfp, node);
174 if (!desc)
175 return NULL;
176 /* allocate based on nr_cpu_ids */
6c9ae009 177 desc->kstat_irqs = alloc_percpu(unsigned int);
1f5a5b87
TG
178 if (!desc->kstat_irqs)
179 goto err_desc;
180
181 if (alloc_masks(desc, gfp, node))
182 goto err_kstat;
183
184 raw_spin_lock_init(&desc->lock);
185 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
425a5072 186 init_rcu_head(&desc->rcu);
1f5a5b87 187
45ddcecb
TG
188 desc_set_defaults(irq, desc, node, affinity, owner);
189 irqd_set(&desc->irq_data, flags);
1f5a5b87
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190
191 return desc;
192
193err_kstat:
6c9ae009 194 free_percpu(desc->kstat_irqs);
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195err_desc:
196 kfree(desc);
197 return NULL;
198}
199
425a5072
TG
200static void delayed_free_desc(struct rcu_head *rhp)
201{
202 struct irq_desc *desc = container_of(rhp, struct irq_desc, rcu);
203
204 free_masks(desc);
205 free_percpu(desc->kstat_irqs);
206 kfree(desc);
207}
208
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TG
209static void free_desc(unsigned int irq)
210{
211 struct irq_desc *desc = irq_to_desc(irq);
1f5a5b87 212
13bfe99e
TG
213 unregister_irq_proc(irq, desc);
214
c291ee62
TG
215 /*
216 * sparse_irq_lock protects also show_interrupts() and
217 * kstat_irq_usr(). Once we deleted the descriptor from the
218 * sparse tree we can free it. Access in proc will fail to
219 * lookup the descriptor.
220 */
a05a900a 221 mutex_lock(&sparse_irq_lock);
1f5a5b87 222 delete_irq_desc(irq);
a05a900a 223 mutex_unlock(&sparse_irq_lock);
1f5a5b87 224
425a5072
TG
225 /*
226 * We free the descriptor, masks and stat fields via RCU. That
227 * allows demultiplex interrupts to do rcu based management of
228 * the child interrupts.
229 */
230 call_rcu(&desc->rcu, delayed_free_desc);
1f5a5b87
TG
231}
232
b6873807 233static int alloc_descs(unsigned int start, unsigned int cnt, int node,
06ee6d57 234 const struct cpumask *affinity, struct module *owner)
1f5a5b87 235{
45ddcecb 236 const struct cpumask *mask = NULL;
1f5a5b87 237 struct irq_desc *desc;
45ddcecb
TG
238 unsigned int flags;
239 int i, cpu = -1;
240
241 if (affinity && cpumask_empty(affinity))
242 return -EINVAL;
243
244 flags = affinity ? IRQD_AFFINITY_MANAGED : 0;
1f5a5b87
TG
245
246 for (i = 0; i < cnt; i++) {
45ddcecb
TG
247 if (affinity) {
248 cpu = cpumask_next(cpu, affinity);
249 if (cpu >= nr_cpu_ids)
250 cpu = cpumask_first(affinity);
251 node = cpu_to_node(cpu);
252
253 /*
254 * For single allocations we use the caller provided
255 * mask otherwise we use the mask of the target cpu
256 */
257 mask = cnt == 1 ? affinity : cpumask_of(cpu);
258 }
259 desc = alloc_desc(start + i, node, flags, mask, owner);
1f5a5b87
TG
260 if (!desc)
261 goto err;
a05a900a 262 mutex_lock(&sparse_irq_lock);
1f5a5b87 263 irq_insert_desc(start + i, desc);
a05a900a 264 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
265 }
266 return start;
267
268err:
269 for (i--; i >= 0; i--)
270 free_desc(start + i);
271
a05a900a 272 mutex_lock(&sparse_irq_lock);
1f5a5b87 273 bitmap_clear(allocated_irqs, start, cnt);
a05a900a 274 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
275 return -ENOMEM;
276}
277
ed4dea6e 278static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7 279{
ed4dea6e 280 if (nr > IRQ_BITMAP_BITS)
e7bcecb7 281 return -ENOMEM;
ed4dea6e 282 nr_irqs = nr;
e7bcecb7
TG
283 return 0;
284}
285
3795de23
TG
286int __init early_irq_init(void)
287{
b683de2b 288 int i, initcnt, node = first_online_node;
3795de23 289 struct irq_desc *desc;
3795de23
TG
290
291 init_irq_default_affinity();
292
b683de2b
TG
293 /* Let arch update nr_irqs and return the nr of preallocated irqs */
294 initcnt = arch_probe_nr_irqs();
295 printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d %d\n", NR_IRQS, nr_irqs, initcnt);
3795de23 296
c1ee6264
TG
297 if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
298 nr_irqs = IRQ_BITMAP_BITS;
299
300 if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
301 initcnt = IRQ_BITMAP_BITS;
302
303 if (initcnt > nr_irqs)
304 nr_irqs = initcnt;
305
b683de2b 306 for (i = 0; i < initcnt; i++) {
45ddcecb 307 desc = alloc_desc(i, node, 0, NULL, NULL);
aa99ec0f
TG
308 set_bit(i, allocated_irqs);
309 irq_insert_desc(i, desc);
3795de23 310 }
3795de23
TG
311 return arch_early_irq_init();
312}
313
3795de23
TG
314#else /* !CONFIG_SPARSE_IRQ */
315
316struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
317 [0 ... NR_IRQS-1] = {
3795de23
TG
318 .handle_irq = handle_bad_irq,
319 .depth = 1,
320 .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
321 }
322};
323
3795de23
TG
324int __init early_irq_init(void)
325{
aa99ec0f 326 int count, i, node = first_online_node;
3795de23 327 struct irq_desc *desc;
3795de23
TG
328
329 init_irq_default_affinity();
330
331 printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS);
332
333 desc = irq_desc;
334 count = ARRAY_SIZE(irq_desc);
335
336 for (i = 0; i < count; i++) {
6c9ae009 337 desc[i].kstat_irqs = alloc_percpu(unsigned int);
e7fbad30
LW
338 alloc_masks(&desc[i], GFP_KERNEL, node);
339 raw_spin_lock_init(&desc[i].lock);
154cd387 340 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
45ddcecb 341 desc_set_defaults(i, &desc[i], node, NULL, NULL);
3795de23
TG
342 }
343 return arch_early_irq_init();
344}
345
346struct irq_desc *irq_to_desc(unsigned int irq)
347{
348 return (irq < NR_IRQS) ? irq_desc + irq : NULL;
349}
2c45aada 350EXPORT_SYMBOL(irq_to_desc);
3795de23 351
1f5a5b87
TG
352static void free_desc(unsigned int irq)
353{
d8179bc0
TG
354 struct irq_desc *desc = irq_to_desc(irq);
355 unsigned long flags;
356
357 raw_spin_lock_irqsave(&desc->lock, flags);
45ddcecb 358 desc_set_defaults(irq, desc, irq_desc_get_node(desc), NULL, NULL);
d8179bc0 359 raw_spin_unlock_irqrestore(&desc->lock, flags);
1f5a5b87
TG
360}
361
b6873807 362static inline int alloc_descs(unsigned int start, unsigned int cnt, int node,
06ee6d57 363 const struct cpumask *affinity,
b6873807 364 struct module *owner)
1f5a5b87 365{
b6873807
SAS
366 u32 i;
367
368 for (i = 0; i < cnt; i++) {
369 struct irq_desc *desc = irq_to_desc(start + i);
370
371 desc->owner = owner;
372 }
1f5a5b87
TG
373 return start;
374}
e7bcecb7 375
ed4dea6e 376static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7
TG
377{
378 return -ENOMEM;
379}
380
f63b6a05
TG
381void irq_mark_irq(unsigned int irq)
382{
383 mutex_lock(&sparse_irq_lock);
384 bitmap_set(allocated_irqs, irq, 1);
385 mutex_unlock(&sparse_irq_lock);
386}
387
c940e01c
TG
388#ifdef CONFIG_GENERIC_IRQ_LEGACY
389void irq_init_desc(unsigned int irq)
390{
d8179bc0 391 free_desc(irq);
c940e01c
TG
392}
393#endif
394
3795de23
TG
395#endif /* !CONFIG_SPARSE_IRQ */
396
fe12bc2c
TG
397/**
398 * generic_handle_irq - Invoke the handler for a particular irq
399 * @irq: The irq number to handle
400 *
401 */
402int generic_handle_irq(unsigned int irq)
403{
404 struct irq_desc *desc = irq_to_desc(irq);
405
406 if (!desc)
407 return -EINVAL;
bd0b9ac4 408 generic_handle_irq_desc(desc);
fe12bc2c
TG
409 return 0;
410}
edf76f83 411EXPORT_SYMBOL_GPL(generic_handle_irq);
fe12bc2c 412
76ba59f8
MZ
413#ifdef CONFIG_HANDLE_DOMAIN_IRQ
414/**
415 * __handle_domain_irq - Invoke the handler for a HW irq belonging to a domain
416 * @domain: The domain where to perform the lookup
417 * @hwirq: The HW irq number to convert to a logical one
418 * @lookup: Whether to perform the domain lookup or not
419 * @regs: Register file coming from the low-level handling code
420 *
421 * Returns: 0 on success, or -EINVAL if conversion has failed
422 */
423int __handle_domain_irq(struct irq_domain *domain, unsigned int hwirq,
424 bool lookup, struct pt_regs *regs)
425{
426 struct pt_regs *old_regs = set_irq_regs(regs);
427 unsigned int irq = hwirq;
428 int ret = 0;
429
430 irq_enter();
431
432#ifdef CONFIG_IRQ_DOMAIN
433 if (lookup)
434 irq = irq_find_mapping(domain, hwirq);
435#endif
436
437 /*
438 * Some hardware gives randomly wrong interrupts. Rather
439 * than crashing, do something sensible.
440 */
441 if (unlikely(!irq || irq >= nr_irqs)) {
442 ack_bad_irq(irq);
443 ret = -EINVAL;
444 } else {
445 generic_handle_irq(irq);
446 }
447
448 irq_exit();
449 set_irq_regs(old_regs);
450 return ret;
451}
452#endif
453
1f5a5b87
TG
454/* Dynamic interrupt handling */
455
456/**
457 * irq_free_descs - free irq descriptors
458 * @from: Start of descriptor range
459 * @cnt: Number of consecutive irqs to free
460 */
461void irq_free_descs(unsigned int from, unsigned int cnt)
462{
1f5a5b87
TG
463 int i;
464
465 if (from >= nr_irqs || (from + cnt) > nr_irqs)
466 return;
467
468 for (i = 0; i < cnt; i++)
469 free_desc(from + i);
470
a05a900a 471 mutex_lock(&sparse_irq_lock);
1f5a5b87 472 bitmap_clear(allocated_irqs, from, cnt);
a05a900a 473 mutex_unlock(&sparse_irq_lock);
1f5a5b87 474}
edf76f83 475EXPORT_SYMBOL_GPL(irq_free_descs);
1f5a5b87
TG
476
477/**
478 * irq_alloc_descs - allocate and initialize a range of irq descriptors
479 * @irq: Allocate for specific irq number if irq >= 0
480 * @from: Start the search from this irq number
481 * @cnt: Number of consecutive irqs to allocate.
482 * @node: Preferred node on which the irq descriptor should be allocated
d522a0d1 483 * @owner: Owning module (can be NULL)
06ee6d57
TG
484 * @affinity: Optional pointer to an affinity mask which hints where the
485 * irq descriptors should be allocated and which default
486 * affinities to use
1f5a5b87
TG
487 *
488 * Returns the first irq number or error code
489 */
490int __ref
b6873807 491__irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
06ee6d57 492 struct module *owner, const struct cpumask *affinity)
1f5a5b87 493{
1f5a5b87
TG
494 int start, ret;
495
496 if (!cnt)
497 return -EINVAL;
498
c5182b88
MB
499 if (irq >= 0) {
500 if (from > irq)
501 return -EINVAL;
502 from = irq;
62a08ae2
TG
503 } else {
504 /*
505 * For interrupts which are freely allocated the
506 * architecture can force a lower bound to the @from
507 * argument. x86 uses this to exclude the GSI space.
508 */
509 from = arch_dynirq_lower_bound(from);
c5182b88
MB
510 }
511
a05a900a 512 mutex_lock(&sparse_irq_lock);
1f5a5b87 513
ed4dea6e
YL
514 start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
515 from, cnt, 0);
1f5a5b87
TG
516 ret = -EEXIST;
517 if (irq >=0 && start != irq)
518 goto err;
519
ed4dea6e
YL
520 if (start + cnt > nr_irqs) {
521 ret = irq_expand_nr_irqs(start + cnt);
e7bcecb7
TG
522 if (ret)
523 goto err;
524 }
1f5a5b87
TG
525
526 bitmap_set(allocated_irqs, start, cnt);
a05a900a 527 mutex_unlock(&sparse_irq_lock);
06ee6d57 528 return alloc_descs(start, cnt, node, affinity, owner);
1f5a5b87
TG
529
530err:
a05a900a 531 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
532 return ret;
533}
b6873807 534EXPORT_SYMBOL_GPL(__irq_alloc_descs);
1f5a5b87 535
7b6ef126
TG
536#ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
537/**
538 * irq_alloc_hwirqs - Allocate an irq descriptor and initialize the hardware
539 * @cnt: number of interrupts to allocate
540 * @node: node on which to allocate
541 *
542 * Returns an interrupt number > 0 or 0, if the allocation fails.
543 */
544unsigned int irq_alloc_hwirqs(int cnt, int node)
545{
06ee6d57 546 int i, irq = __irq_alloc_descs(-1, 0, cnt, node, NULL, NULL);
7b6ef126
TG
547
548 if (irq < 0)
549 return 0;
550
551 for (i = irq; cnt > 0; i++, cnt--) {
552 if (arch_setup_hwirq(i, node))
553 goto err;
554 irq_clear_status_flags(i, _IRQ_NOREQUEST);
555 }
556 return irq;
557
558err:
559 for (i--; i >= irq; i--) {
560 irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
561 arch_teardown_hwirq(i);
562 }
563 irq_free_descs(irq, cnt);
564 return 0;
565}
566EXPORT_SYMBOL_GPL(irq_alloc_hwirqs);
567
568/**
569 * irq_free_hwirqs - Free irq descriptor and cleanup the hardware
570 * @from: Free from irq number
571 * @cnt: number of interrupts to free
572 *
573 */
574void irq_free_hwirqs(unsigned int from, int cnt)
575{
8844aad8 576 int i, j;
7b6ef126 577
8844aad8 578 for (i = from, j = cnt; j > 0; i++, j--) {
7b6ef126
TG
579 irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
580 arch_teardown_hwirq(i);
581 }
582 irq_free_descs(from, cnt);
583}
584EXPORT_SYMBOL_GPL(irq_free_hwirqs);
585#endif
586
a98d24b7
TG
587/**
588 * irq_get_next_irq - get next allocated irq number
589 * @offset: where to start the search
590 *
591 * Returns next irq number after offset or nr_irqs if none is found.
592 */
593unsigned int irq_get_next_irq(unsigned int offset)
594{
595 return find_next_bit(allocated_irqs, nr_irqs, offset);
596}
597
d5eb4ad2 598struct irq_desc *
31d9d9b6
MZ
599__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus,
600 unsigned int check)
d5eb4ad2
TG
601{
602 struct irq_desc *desc = irq_to_desc(irq);
603
604 if (desc) {
31d9d9b6
MZ
605 if (check & _IRQ_DESC_CHECK) {
606 if ((check & _IRQ_DESC_PERCPU) &&
607 !irq_settings_is_per_cpu_devid(desc))
608 return NULL;
609
610 if (!(check & _IRQ_DESC_PERCPU) &&
611 irq_settings_is_per_cpu_devid(desc))
612 return NULL;
613 }
614
d5eb4ad2
TG
615 if (bus)
616 chip_bus_lock(desc);
617 raw_spin_lock_irqsave(&desc->lock, *flags);
618 }
619 return desc;
620}
621
622void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
623{
624 raw_spin_unlock_irqrestore(&desc->lock, flags);
625 if (bus)
626 chip_bus_sync_unlock(desc);
627}
628
222df54f
MZ
629int irq_set_percpu_devid_partition(unsigned int irq,
630 const struct cpumask *affinity)
31d9d9b6
MZ
631{
632 struct irq_desc *desc = irq_to_desc(irq);
633
634 if (!desc)
635 return -EINVAL;
636
637 if (desc->percpu_enabled)
638 return -EINVAL;
639
640 desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL);
641
642 if (!desc->percpu_enabled)
643 return -ENOMEM;
644
222df54f
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645 if (affinity)
646 desc->percpu_affinity = affinity;
647 else
648 desc->percpu_affinity = cpu_possible_mask;
649
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MZ
650 irq_set_percpu_devid_flags(irq);
651 return 0;
652}
653
222df54f
MZ
654int irq_set_percpu_devid(unsigned int irq)
655{
656 return irq_set_percpu_devid_partition(irq, NULL);
657}
658
659int irq_get_percpu_devid_partition(unsigned int irq, struct cpumask *affinity)
660{
661 struct irq_desc *desc = irq_to_desc(irq);
662
663 if (!desc || !desc->percpu_enabled)
664 return -EINVAL;
665
666 if (affinity)
667 cpumask_copy(affinity, desc->percpu_affinity);
668
669 return 0;
670}
671
792d0018
TG
672void kstat_incr_irq_this_cpu(unsigned int irq)
673{
b51bf95c 674 kstat_incr_irqs_this_cpu(irq_to_desc(irq));
792d0018
TG
675}
676
c291ee62
TG
677/**
678 * kstat_irqs_cpu - Get the statistics for an interrupt on a cpu
679 * @irq: The interrupt number
680 * @cpu: The cpu number
681 *
682 * Returns the sum of interrupt counts on @cpu since boot for
683 * @irq. The caller must ensure that the interrupt is not removed
684 * concurrently.
685 */
3795de23
TG
686unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
687{
688 struct irq_desc *desc = irq_to_desc(irq);
6c9ae009
ED
689
690 return desc && desc->kstat_irqs ?
691 *per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
3795de23 692}
478735e3 693
c291ee62
TG
694/**
695 * kstat_irqs - Get the statistics for an interrupt
696 * @irq: The interrupt number
697 *
698 * Returns the sum of interrupt counts on all cpus since boot for
699 * @irq. The caller must ensure that the interrupt is not removed
700 * concurrently.
701 */
478735e3
KH
702unsigned int kstat_irqs(unsigned int irq)
703{
704 struct irq_desc *desc = irq_to_desc(irq);
705 int cpu;
5e9662fa 706 unsigned int sum = 0;
478735e3 707
6c9ae009 708 if (!desc || !desc->kstat_irqs)
478735e3
KH
709 return 0;
710 for_each_possible_cpu(cpu)
6c9ae009 711 sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
478735e3
KH
712 return sum;
713}
c291ee62
TG
714
715/**
716 * kstat_irqs_usr - Get the statistics for an interrupt
717 * @irq: The interrupt number
718 *
719 * Returns the sum of interrupt counts on all cpus since boot for
720 * @irq. Contrary to kstat_irqs() this can be called from any
721 * preemptible context. It's protected against concurrent removal of
722 * an interrupt descriptor when sparse irqs are enabled.
723 */
724unsigned int kstat_irqs_usr(unsigned int irq)
725{
7df0b278 726 unsigned int sum;
c291ee62
TG
727
728 irq_lock_sparse();
729 sum = kstat_irqs(irq);
730 irq_unlock_sparse();
731 return sum;
732}