ASoC: jack: Add support for GPIO descriptor defined jack pins
[linux-2.6-block.git] / include / sound / soc.h
CommitLineData
808db4a4
RP
1/*
2 * linux/sound/soc.h -- ALSA SoC Layer
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_SND_SOC_H
14#define __LINUX_SND_SOC_H
15
cb470087 16#include <linux/of.h>
808db4a4
RP
17#include <linux/platform_device.h>
18#include <linux/types.h>
d5021ec9 19#include <linux/notifier.h>
4484bb2e 20#include <linux/workqueue.h>
ec67624d
LCM
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
be3ea3b9 23#include <linux/regmap.h>
86767b7d 24#include <linux/log2.h>
808db4a4
RP
25#include <sound/core.h>
26#include <sound/pcm.h>
49681077 27#include <sound/compress_driver.h>
808db4a4
RP
28#include <sound/control.h>
29#include <sound/ac97_codec.h>
30
808db4a4
RP
31/*
32 * Convenience kcontrol builders
33 */
57295073 34#define SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, xmax, xinvert, xautodisable) \
4eaa9819 35 ((unsigned long)&(struct soc_mixer_control) \
30d86ba4
PU
36 {.reg = xreg, .rreg = xreg, .shift = shift_left, \
37 .rshift = shift_right, .max = xmax, .platform_max = xmax, \
57295073
LPC
38 .invert = xinvert, .autodisable = xautodisable})
39#define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert, xautodisable) \
40 SOC_DOUBLE_VALUE(xreg, xshift, xshift, xmax, xinvert, xautodisable)
4eaa9819
JS
41#define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
42 ((unsigned long)&(struct soc_mixer_control) \
d11bb4a9 43 {.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
cdffa775
PU
44#define SOC_DOUBLE_R_VALUE(xlreg, xrreg, xshift, xmax, xinvert) \
45 ((unsigned long)&(struct soc_mixer_control) \
46 {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
47 .max = xmax, .platform_max = xmax, .invert = xinvert})
cd21b123
MP
48#define SOC_DOUBLE_R_S_VALUE(xlreg, xrreg, xshift, xmin, xmax, xsign_bit, xinvert) \
49 ((unsigned long)&(struct soc_mixer_control) \
50 {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
51 .max = xmax, .min = xmin, .platform_max = xmax, .sign_bit = xsign_bit, \
52 .invert = xinvert})
229e3fdc
MB
53#define SOC_DOUBLE_R_RANGE_VALUE(xlreg, xrreg, xshift, xmin, xmax, xinvert) \
54 ((unsigned long)&(struct soc_mixer_control) \
55 {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
56 .min = xmin, .max = xmax, .platform_max = xmax, .invert = xinvert})
a7a4ac86 57#define SOC_SINGLE(xname, reg, shift, max, invert) \
808db4a4
RP
58{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
59 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
60 .put = snd_soc_put_volsw, \
57295073 61 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) }
6c9d8cf6
AT
62#define SOC_SINGLE_RANGE(xname, xreg, xshift, xmin, xmax, xinvert) \
63{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
64 .info = snd_soc_info_volsw_range, .get = snd_soc_get_volsw_range, \
65 .put = snd_soc_put_volsw_range, \
66 .private_value = (unsigned long)&(struct soc_mixer_control) \
9bde4f0b
MB
67 {.reg = xreg, .rreg = xreg, .shift = xshift, \
68 .rshift = xshift, .min = xmin, .max = xmax, \
69 .platform_max = xmax, .invert = xinvert} }
a7a4ac86
PZ
70#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
71{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
72 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
73 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
74 .tlv.p = (tlv_array), \
75 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
76 .put = snd_soc_put_volsw, \
57295073 77 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) }
1d99f243
BA
78#define SOC_SINGLE_SX_TLV(xname, xreg, xshift, xmin, xmax, tlv_array) \
79{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
80 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
81 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
82 .tlv.p = (tlv_array),\
83 .info = snd_soc_info_volsw, \
84 .get = snd_soc_get_volsw_sx,\
85 .put = snd_soc_put_volsw_sx, \
86 .private_value = (unsigned long)&(struct soc_mixer_control) \
87 {.reg = xreg, .rreg = xreg, \
88 .shift = xshift, .rshift = xshift, \
89 .max = xmax, .min = xmin} }
6c9d8cf6
AT
90#define SOC_SINGLE_RANGE_TLV(xname, xreg, xshift, xmin, xmax, xinvert, tlv_array) \
91{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
92 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
93 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
94 .tlv.p = (tlv_array), \
95 .info = snd_soc_info_volsw_range, \
96 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
97 .private_value = (unsigned long)&(struct soc_mixer_control) \
9bde4f0b
MB
98 {.reg = xreg, .rreg = xreg, .shift = xshift, \
99 .rshift = xshift, .min = xmin, .max = xmax, \
100 .platform_max = xmax, .invert = xinvert} }
460acbec 101#define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
808db4a4
RP
102{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
103 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
104 .put = snd_soc_put_volsw, \
460acbec 105 .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
57295073 106 max, invert, 0) }
4eaa9819 107#define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \
808db4a4 108{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
e8f5a103 109 .info = snd_soc_info_volsw, \
974815ba 110 .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
cdffa775
PU
111 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
112 xmax, xinvert) }
229e3fdc
MB
113#define SOC_DOUBLE_R_RANGE(xname, reg_left, reg_right, xshift, xmin, \
114 xmax, xinvert) \
115{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
116 .info = snd_soc_info_volsw_range, \
117 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
118 .private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
119 xshift, xmin, xmax, xinvert) }
460acbec 120#define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \
a7a4ac86
PZ
121{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
122 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
123 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
124 .tlv.p = (tlv_array), \
125 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
126 .put = snd_soc_put_volsw, \
460acbec 127 .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
57295073 128 max, invert, 0) }
4eaa9819 129#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
a7a4ac86
PZ
130{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
131 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
132 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
133 .tlv.p = (tlv_array), \
e8f5a103 134 .info = snd_soc_info_volsw, \
974815ba 135 .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
cdffa775
PU
136 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
137 xmax, xinvert) }
229e3fdc
MB
138#define SOC_DOUBLE_R_RANGE_TLV(xname, reg_left, reg_right, xshift, xmin, \
139 xmax, xinvert, tlv_array) \
140{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
141 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
142 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
143 .tlv.p = (tlv_array), \
144 .info = snd_soc_info_volsw_range, \
145 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
146 .private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
147 xshift, xmin, xmax, xinvert) }
1d99f243
BA
148#define SOC_DOUBLE_R_SX_TLV(xname, xreg, xrreg, xshift, xmin, xmax, tlv_array) \
149{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
150 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
151 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
152 .tlv.p = (tlv_array), \
153 .info = snd_soc_info_volsw, \
154 .get = snd_soc_get_volsw_sx, \
155 .put = snd_soc_put_volsw_sx, \
156 .private_value = (unsigned long)&(struct soc_mixer_control) \
157 {.reg = xreg, .rreg = xrreg, \
158 .shift = xshift, .rshift = xshift, \
159 .max = xmax, .min = xmin} }
cd21b123
MP
160#define SOC_DOUBLE_R_S_TLV(xname, reg_left, reg_right, xshift, xmin, xmax, xsign_bit, xinvert, tlv_array) \
161{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
162 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
163 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
164 .tlv.p = (tlv_array), \
165 .info = snd_soc_info_volsw, \
166 .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
167 .private_value = SOC_DOUBLE_R_S_VALUE(reg_left, reg_right, xshift, \
168 xmin, xmax, xsign_bit, xinvert) }
4eaa9819 169#define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
e13ac2e9
MB
170{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
171 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
172 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
173 .tlv.p = (tlv_array), \
174 .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \
175 .put = snd_soc_put_volsw_s8, \
4eaa9819 176 .private_value = (unsigned long)&(struct soc_mixer_control) \
d11bb4a9
PU
177 {.reg = xreg, .min = xmin, .max = xmax, \
178 .platform_max = xmax} }
9a8d38db 179#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xitems, xtexts) \
808db4a4 180{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
9a8d38db
TI
181 .items = xitems, .texts = xtexts, \
182 .mask = xitems ? roundup_pow_of_two(xitems) - 1 : 0}
183#define SOC_ENUM_SINGLE(xreg, xshift, xitems, xtexts) \
184 SOC_ENUM_DOUBLE(xreg, xshift, xshift, xitems, xtexts)
185#define SOC_ENUM_SINGLE_EXT(xitems, xtexts) \
186{ .items = xitems, .texts = xtexts }
187#define SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xitems, xtexts, xvalues) \
2e72f8e3 188{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
9a8d38db
TI
189 .mask = xmask, .items = xitems, .texts = xtexts, .values = xvalues}
190#define SOC_VALUE_ENUM_SINGLE(xreg, xshift, xmask, xnitmes, xtexts, xvalues) \
191 SOC_VALUE_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xnitmes, xtexts, xvalues)
b948837a
LPC
192#define SOC_ENUM_SINGLE_VIRT(xitems, xtexts) \
193 SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, xitems, xtexts)
808db4a4
RP
194#define SOC_ENUM(xname, xenum) \
195{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
196 .info = snd_soc_info_enum_double, \
197 .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
198 .private_value = (unsigned long)&xenum }
2e72f8e3 199#define SOC_VALUE_ENUM(xname, xenum) \
29ae2fa5 200 SOC_ENUM(xname, xenum)
f8ba0b7b 201#define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
808db4a4
RP
202 xhandler_get, xhandler_put) \
203{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1c433fbd 204 .info = snd_soc_info_volsw, \
808db4a4 205 .get = xhandler_get, .put = xhandler_put, \
57295073 206 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert, 0) }
460acbec 207#define SOC_DOUBLE_EXT(xname, reg, shift_left, shift_right, max, invert,\
7629ad24
DM
208 xhandler_get, xhandler_put) \
209{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
210 .info = snd_soc_info_volsw, \
211 .get = xhandler_get, .put = xhandler_put, \
460acbec 212 .private_value = \
57295073 213 SOC_DOUBLE_VALUE(reg, shift_left, shift_right, max, invert, 0) }
f8ba0b7b 214#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\
10144c09
MM
215 xhandler_get, xhandler_put, tlv_array) \
216{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
217 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
218 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
219 .tlv.p = (tlv_array), \
220 .info = snd_soc_info_volsw, \
221 .get = xhandler_get, .put = xhandler_put, \
57295073 222 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert, 0) }
d0af93db
JS
223#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
224 xhandler_get, xhandler_put, tlv_array) \
225{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
226 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
227 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
228 .tlv.p = (tlv_array), \
229 .info = snd_soc_info_volsw, \
230 .get = xhandler_get, .put = xhandler_put, \
460acbec 231 .private_value = SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, \
57295073 232 xmax, xinvert, 0) }
3ce91d5a
JS
233#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\
234 xhandler_get, xhandler_put, tlv_array) \
235{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
236 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
237 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
238 .tlv.p = (tlv_array), \
e8f5a103 239 .info = snd_soc_info_volsw, \
3ce91d5a 240 .get = xhandler_get, .put = xhandler_put, \
cdffa775
PU
241 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
242 xmax, xinvert) }
808db4a4
RP
243#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
244{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
245 .info = snd_soc_info_bool_ext, \
246 .get = xhandler_get, .put = xhandler_put, \
247 .private_value = xdata }
248#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
249{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
9a953e6f 250 .info = snd_soc_info_enum_double, \
808db4a4
RP
251 .get = xhandler_get, .put = xhandler_put, \
252 .private_value = (unsigned long)&xenum }
253
71d08516
MB
254#define SND_SOC_BYTES(xname, xbase, xregs) \
255{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
256 .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \
257 .put = snd_soc_bytes_put, .private_value = \
258 ((unsigned long)&(struct soc_bytes) \
259 {.base = xbase, .num_regs = xregs }) }
b6f4bb38 260
f831b055
MB
261#define SND_SOC_BYTES_MASK(xname, xbase, xregs, xmask) \
262{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
263 .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \
264 .put = snd_soc_bytes_put, .private_value = \
265 ((unsigned long)&(struct soc_bytes) \
266 {.base = xbase, .num_regs = xregs, \
267 .mask = xmask }) }
268
4183eed2
KK
269#define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \
270 xmin, xmax, xinvert) \
271{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
272 .info = snd_soc_info_xr_sx, .get = snd_soc_get_xr_sx, \
273 .put = snd_soc_put_xr_sx, \
274 .private_value = (unsigned long)&(struct soc_mreg_control) \
275 {.regbase = xregbase, .regcount = xregcount, .nbits = xnbits, \
276 .invert = xinvert, .min = xmin, .max = xmax} }
277
dd7b10b3
KK
278#define SOC_SINGLE_STROBE(xname, xreg, xshift, xinvert) \
279 SOC_SINGLE_EXT(xname, xreg, xshift, 1, xinvert, \
280 snd_soc_get_strobe, snd_soc_put_strobe)
281
6c2fb6a8
GL
282/*
283 * Simplified versions of above macros, declaring a struct and calculating
284 * ARRAY_SIZE internally
285 */
286#define SOC_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xtexts) \
2e7e1993 287 const struct soc_enum name = SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, \
6c2fb6a8
GL
288 ARRAY_SIZE(xtexts), xtexts)
289#define SOC_ENUM_SINGLE_DECL(name, xreg, xshift, xtexts) \
290 SOC_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xtexts)
291#define SOC_ENUM_SINGLE_EXT_DECL(name, xtexts) \
2e7e1993 292 const struct soc_enum name = SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtexts), xtexts)
6c2fb6a8 293#define SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xmask, xtexts, xvalues) \
2e7e1993 294 const struct soc_enum name = SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, \
6c2fb6a8
GL
295 ARRAY_SIZE(xtexts), xtexts, xvalues)
296#define SOC_VALUE_ENUM_SINGLE_DECL(name, xreg, xshift, xmask, xtexts, xvalues) \
297 SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xmask, xtexts, xvalues)
b948837a
LPC
298#define SOC_ENUM_SINGLE_VIRT_DECL(name, xtexts) \
299 const struct soc_enum name = SOC_ENUM_SINGLE_VIRT(ARRAY_SIZE(xtexts), xtexts)
6c2fb6a8 300
0168bf0d
LG
301/*
302 * Component probe and remove ordering levels for components with runtime
303 * dependencies.
304 */
305#define SND_SOC_COMP_ORDER_FIRST -2
306#define SND_SOC_COMP_ORDER_EARLY -1
307#define SND_SOC_COMP_ORDER_NORMAL 0
308#define SND_SOC_COMP_ORDER_LATE 1
309#define SND_SOC_COMP_ORDER_LAST 2
310
0be9898a
MB
311/*
312 * Bias levels
313 *
314 * @ON: Bias is fully on for audio playback and capture operations.
315 * @PREPARE: Prepare for audio operations. Called before DAPM switching for
316 * stream start and stop operations.
317 * @STANDBY: Low power standby state when no playback/capture operations are
318 * in progress. NOTE: The transition time between STANDBY and ON
319 * should be as fast as possible and no longer than 10ms.
320 * @OFF: Power Off. No restrictions on transition times.
321 */
322enum snd_soc_bias_level {
56fba41f
MB
323 SND_SOC_BIAS_OFF = 0,
324 SND_SOC_BIAS_STANDBY = 1,
325 SND_SOC_BIAS_PREPARE = 2,
326 SND_SOC_BIAS_ON = 3,
0be9898a
MB
327};
328
5a504963 329struct device_node;
8a2cd618
MB
330struct snd_jack;
331struct snd_soc_card;
808db4a4
RP
332struct snd_soc_pcm_stream;
333struct snd_soc_ops;
808db4a4 334struct snd_soc_pcm_runtime;
3c4b266f 335struct snd_soc_dai;
f0fba2ad 336struct snd_soc_dai_driver;
12a48a8c 337struct snd_soc_platform;
d273ebe7 338struct snd_soc_dai_link;
f0fba2ad 339struct snd_soc_platform_driver;
808db4a4 340struct snd_soc_codec;
f0fba2ad 341struct snd_soc_codec_driver;
030e79f6
KM
342struct snd_soc_component;
343struct snd_soc_component_driver;
808db4a4 344struct soc_enum;
8a2cd618 345struct snd_soc_jack;
fa9879ed 346struct snd_soc_jack_zone;
8a2cd618 347struct snd_soc_jack_pin;
ce6120cc 348#include <sound/soc-dapm.h>
01d7584c 349#include <sound/soc-dpcm.h>
f0fba2ad 350
ec67624d 351struct snd_soc_jack_gpio;
808db4a4
RP
352
353typedef int (*hw_write_t)(void *,const char* ,int);
808db4a4 354
b047e1cc 355extern struct snd_ac97_bus_ops *soc_ac97_ops;
808db4a4 356
b8c0dab9
LG
357enum snd_soc_pcm_subclass {
358 SND_SOC_PCM_CLASS_PCM = 0,
359 SND_SOC_PCM_CLASS_BE = 1,
360};
361
01b9d99a 362enum snd_soc_card_subclass {
6874a918
LG
363 SND_SOC_CARD_CLASS_INIT = 0,
364 SND_SOC_CARD_CLASS_RUNTIME = 1,
01b9d99a
LG
365};
366
ec4ee52a 367int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
da1c6ea6 368 int source, unsigned int freq, int dir);
ec4ee52a
MB
369int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
370 unsigned int freq_in, unsigned int freq_out);
371
70a7ca34
VK
372int snd_soc_register_card(struct snd_soc_card *card);
373int snd_soc_unregister_card(struct snd_soc_card *card);
0e4ff5c8 374int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card);
6f8ab4ac
MB
375int snd_soc_suspend(struct device *dev);
376int snd_soc_resume(struct device *dev);
377int snd_soc_poweroff(struct device *dev);
f0fba2ad 378int snd_soc_register_platform(struct device *dev,
d79e57db 379 const struct snd_soc_platform_driver *platform_drv);
f0fba2ad 380void snd_soc_unregister_platform(struct device *dev);
71a45cda
LPC
381int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform,
382 const struct snd_soc_platform_driver *platform_drv);
383void snd_soc_remove_platform(struct snd_soc_platform *platform);
384struct snd_soc_platform *snd_soc_lookup_platform(struct device *dev);
f0fba2ad 385int snd_soc_register_codec(struct device *dev,
001ae4c0 386 const struct snd_soc_codec_driver *codec_drv,
f0fba2ad
LG
387 struct snd_soc_dai_driver *dai_drv, int num_dai);
388void snd_soc_unregister_codec(struct device *dev);
030e79f6
KM
389int snd_soc_register_component(struct device *dev,
390 const struct snd_soc_component_driver *cmpnt_drv,
391 struct snd_soc_dai_driver *dai_drv, int num_dai);
a0b03a61
MB
392int devm_snd_soc_register_component(struct device *dev,
393 const struct snd_soc_component_driver *cmpnt_drv,
394 struct snd_soc_dai_driver *dai_drv, int num_dai);
030e79f6 395void snd_soc_unregister_component(struct device *dev);
181e055e
MB
396int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
397 unsigned int reg);
239c9706
DP
398int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
399 unsigned int reg);
400int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
401 unsigned int reg);
17a52fd6 402int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
092eba93 403 struct regmap *regmap);
7a30a3db
DP
404int snd_soc_cache_sync(struct snd_soc_codec *codec);
405int snd_soc_cache_init(struct snd_soc_codec *codec);
406int snd_soc_cache_exit(struct snd_soc_codec *codec);
407int snd_soc_cache_write(struct snd_soc_codec *codec,
408 unsigned int reg, unsigned int value);
409int snd_soc_cache_read(struct snd_soc_codec *codec,
410 unsigned int reg, unsigned int *value);
f1442bc1
LG
411int snd_soc_platform_read(struct snd_soc_platform *platform,
412 unsigned int reg);
413int snd_soc_platform_write(struct snd_soc_platform *platform,
414 unsigned int reg, unsigned int val);
354a2142 415int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num);
49681077 416int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num);
12a48a8c 417
47c88fff
LG
418struct snd_pcm_substream *snd_soc_get_dai_substream(struct snd_soc_card *card,
419 const char *dai_link, int stream);
420struct snd_soc_pcm_runtime *snd_soc_get_pcm_runtime(struct snd_soc_card *card,
421 const char *dai_link);
422
208a1589 423bool snd_soc_runtime_ignore_pmdown_time(struct snd_soc_pcm_runtime *rtd);
24894b76
LPC
424void snd_soc_runtime_activate(struct snd_soc_pcm_runtime *rtd, int stream);
425void snd_soc_runtime_deactivate(struct snd_soc_pcm_runtime *rtd, int stream);
208a1589 426
7aae816d
MB
427/* Utility functions to get clock rates from various things */
428int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
429int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params);
c0fa59df 430int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots);
7aae816d
MB
431int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
432
808db4a4
RP
433/* set runtime hw params */
434int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
435 const struct snd_pcm_hardware *hw);
808db4a4 436
07bf84aa
LG
437int snd_soc_platform_trigger(struct snd_pcm_substream *substream,
438 int cmd, struct snd_soc_platform *platform);
439
8a2cd618 440/* Jack reporting */
f0fba2ad 441int snd_soc_jack_new(struct snd_soc_codec *codec, const char *id, int type,
8a2cd618
MB
442 struct snd_soc_jack *jack);
443void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
444int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
445 struct snd_soc_jack_pin *pins);
d5021ec9
MB
446void snd_soc_jack_notifier_register(struct snd_soc_jack *jack,
447 struct notifier_block *nb);
448void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack,
449 struct notifier_block *nb);
fa9879ed
VK
450int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
451 struct snd_soc_jack_zone *zones);
452int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
ec67624d
LCM
453#ifdef CONFIG_GPIOLIB
454int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
455 struct snd_soc_jack_gpio *gpios);
f025d3b9
JN
456int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
457 struct snd_soc_jack *jack,
458 int count, struct snd_soc_jack_gpio *gpios);
ec67624d
LCM
459void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
460 struct snd_soc_jack_gpio *gpios);
8778ac6b
TI
461#else
462static inline int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
463 struct snd_soc_jack_gpio *gpios)
464{
465 return 0;
466}
467
f025d3b9
JN
468int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
469 struct snd_soc_jack *jack,
470 int count, struct snd_soc_jack_gpio *gpios)
471{
472 return 0;
473}
474
8778ac6b
TI
475static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
476 struct snd_soc_jack_gpio *gpios)
477{
478}
ec67624d 479#endif
8a2cd618 480
808db4a4
RP
481/* codec register bit access */
482int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 483 unsigned int mask, unsigned int value);
dd1b3d53
MB
484int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
485 unsigned short reg, unsigned int mask,
486 unsigned int value);
808db4a4 487int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 488 unsigned int mask, unsigned int value);
808db4a4
RP
489
490int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
491 struct snd_ac97_bus_ops *ops, int num);
492void snd_soc_free_ac97_codec(struct snd_soc_codec *codec);
493
b047e1cc 494int snd_soc_set_ac97_ops(struct snd_ac97_bus_ops *ops);
741a509f
MP
495int snd_soc_set_ac97_ops_of_reset(struct snd_ac97_bus_ops *ops,
496 struct platform_device *pdev);
b047e1cc 497
808db4a4
RP
498/*
499 *Controls
500 */
501struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
3056557f 502 void *data, const char *long_name,
efb7ac3f 503 const char *prefix);
4fefd698
DP
504struct snd_kcontrol *snd_soc_card_get_kcontrol(struct snd_soc_card *soc_card,
505 const char *name);
022658be 506int snd_soc_add_codec_controls(struct snd_soc_codec *codec,
3e8e1952 507 const struct snd_kcontrol_new *controls, int num_controls);
a491a5c8
LG
508int snd_soc_add_platform_controls(struct snd_soc_platform *platform,
509 const struct snd_kcontrol_new *controls, int num_controls);
022658be
LG
510int snd_soc_add_card_controls(struct snd_soc_card *soc_card,
511 const struct snd_kcontrol_new *controls, int num_controls);
512int snd_soc_add_dai_controls(struct snd_soc_dai *dai,
513 const struct snd_kcontrol_new *controls, int num_controls);
808db4a4
RP
514int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
515 struct snd_ctl_elem_info *uinfo);
808db4a4
RP
516int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
517 struct snd_ctl_elem_value *ucontrol);
518int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
519 struct snd_ctl_elem_value *ucontrol);
520int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
808db4a4 521 struct snd_ctl_elem_info *uinfo);
392abe9c 522#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info
808db4a4
RP
523int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_value *ucontrol);
525int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
526 struct snd_ctl_elem_value *ucontrol);
a92f1394
PU
527#define snd_soc_get_volsw_2r snd_soc_get_volsw
528#define snd_soc_put_volsw_2r snd_soc_put_volsw
1d99f243
BA
529int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol,
530 struct snd_ctl_elem_value *ucontrol);
531int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
532 struct snd_ctl_elem_value *ucontrol);
e13ac2e9
MB
533int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol,
534 struct snd_ctl_elem_info *uinfo);
535int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
536 struct snd_ctl_elem_value *ucontrol);
537int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
538 struct snd_ctl_elem_value *ucontrol);
6c9d8cf6
AT
539int snd_soc_info_volsw_range(struct snd_kcontrol *kcontrol,
540 struct snd_ctl_elem_info *uinfo);
541int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_value *ucontrol);
543int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol,
544 struct snd_ctl_elem_value *ucontrol);
637d3847
PU
545int snd_soc_limit_volume(struct snd_soc_codec *codec,
546 const char *name, int max);
71d08516
MB
547int snd_soc_bytes_info(struct snd_kcontrol *kcontrol,
548 struct snd_ctl_elem_info *uinfo);
549int snd_soc_bytes_get(struct snd_kcontrol *kcontrol,
550 struct snd_ctl_elem_value *ucontrol);
551int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
552 struct snd_ctl_elem_value *ucontrol);
4183eed2
KK
553int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol,
554 struct snd_ctl_elem_info *uinfo);
555int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_value *ucontrol);
557int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol,
558 struct snd_ctl_elem_value *ucontrol);
dd7b10b3
KK
559int snd_soc_get_strobe(struct snd_kcontrol *kcontrol,
560 struct snd_ctl_elem_value *ucontrol);
561int snd_soc_put_strobe(struct snd_kcontrol *kcontrol,
562 struct snd_ctl_elem_value *ucontrol);
808db4a4 563
8a2cd618
MB
564/**
565 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
566 *
567 * @pin: name of the pin to update
568 * @mask: bits to check for in reported jack status
569 * @invert: if non-zero then pin is enabled when status is not reported
570 */
571struct snd_soc_jack_pin {
572 struct list_head list;
573 const char *pin;
574 int mask;
575 bool invert;
576};
577
fa9879ed
VK
578/**
579 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
580 *
581 * @min_mv: start voltage in mv
582 * @max_mv: end voltage in mv
583 * @jack_type: type of jack that is expected for this voltage
584 * @debounce_time: debounce_time for jack, codec driver should wait for this
585 * duration before reading the adc for voltages
586 * @:list: list container
587 */
588struct snd_soc_jack_zone {
589 unsigned int min_mv;
590 unsigned int max_mv;
591 unsigned int jack_type;
592 unsigned int debounce_time;
593 struct list_head list;
594};
595
ec67624d
LCM
596/**
597 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
598 *
f025d3b9
JN
599 * @gpio: legacy gpio number
600 * @idx: gpio descriptor index within the GPIO consumer device
601 * @gpiod_dev GPIO consumer device
ec67624d
LCM
602 * @name: gpio name
603 * @report: value to report when jack detected
604 * @invert: report presence in low state
605 * @debouce_time: debouce time in ms
7887ab3a 606 * @wake: enable as wake source
fadddc87
MB
607 * @jack_status_check: callback function which overrides the detection
608 * to provide more complex checks (eg, reading an
609 * ADC).
ec67624d 610 */
ec67624d
LCM
611struct snd_soc_jack_gpio {
612 unsigned int gpio;
f025d3b9
JN
613 unsigned int idx;
614 struct device *gpiod_dev;
ec67624d
LCM
615 const char *name;
616 int report;
617 int invert;
618 int debounce_time;
7887ab3a
MB
619 bool wake;
620
ec67624d 621 struct snd_soc_jack *jack;
4c14d78e 622 struct delayed_work work;
50dfb69d 623 struct gpio_desc *desc;
c871a053 624
cb29d7b9 625 void *data;
626 int (*jack_status_check)(void *data);
ec67624d 627};
ec67624d 628
8a2cd618 629struct snd_soc_jack {
2667b4b8 630 struct mutex mutex;
8a2cd618 631 struct snd_jack *jack;
f0fba2ad 632 struct snd_soc_codec *codec;
8a2cd618
MB
633 struct list_head pins;
634 int status;
d5021ec9 635 struct blocking_notifier_head notifier;
fa9879ed 636 struct list_head jack_zones;
8a2cd618
MB
637};
638
808db4a4
RP
639/* SoC PCM stream information */
640struct snd_soc_pcm_stream {
f0fba2ad 641 const char *stream_name;
1c433fbd
GG
642 u64 formats; /* SNDRV_PCM_FMTBIT_* */
643 unsigned int rates; /* SNDRV_PCM_RATE_* */
808db4a4
RP
644 unsigned int rate_min; /* min rate */
645 unsigned int rate_max; /* max rate */
646 unsigned int channels_min; /* min channels */
647 unsigned int channels_max; /* max channels */
58ba9b25 648 unsigned int sig_bits; /* number of bits of content */
808db4a4
RP
649};
650
651/* SoC audio ops */
652struct snd_soc_ops {
653 int (*startup)(struct snd_pcm_substream *);
654 void (*shutdown)(struct snd_pcm_substream *);
655 int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
656 int (*hw_free)(struct snd_pcm_substream *);
657 int (*prepare)(struct snd_pcm_substream *);
658 int (*trigger)(struct snd_pcm_substream *, int);
659};
660
49681077
VK
661struct snd_soc_compr_ops {
662 int (*startup)(struct snd_compr_stream *);
663 void (*shutdown)(struct snd_compr_stream *);
664 int (*set_params)(struct snd_compr_stream *);
665 int (*trigger)(struct snd_compr_stream *);
666};
667
d191bd8d
KM
668/* component interface */
669struct snd_soc_component_driver {
670 const char *name;
cb470087
KM
671
672 /* DT */
673 int (*of_xlate_dai_name)(struct snd_soc_component *component,
674 struct of_phandle_args *args,
675 const char **dai_name);
d191bd8d
KM
676};
677
678struct snd_soc_component {
679 const char *name;
680 int id;
d191bd8d 681 struct device *dev;
cdde4ccb
LPC
682
683 unsigned int active;
684
3d59400f
LPC
685 unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
686
d191bd8d
KM
687 struct list_head list;
688
6833c452
KM
689 struct snd_soc_dai_driver *dai_drv;
690 int num_dai;
691
d191bd8d 692 const struct snd_soc_component_driver *driver;
1438c2f6
LPC
693
694 struct list_head dai_list;
d191bd8d
KM
695};
696
f0fba2ad 697/* SoC Audio Codec device */
808db4a4 698struct snd_soc_codec {
f0fba2ad 699 const char *name;
ead9b919 700 const char *name_prefix;
f0fba2ad 701 int id;
0d0cf00a 702 struct device *dev;
001ae4c0 703 const struct snd_soc_codec_driver *driver;
0d0cf00a 704
f0fba2ad
LG
705 struct mutex mutex;
706 struct snd_soc_card *card;
0d0cf00a 707 struct list_head list;
f0fba2ad
LG
708 struct list_head card_list;
709 int num_dai;
1500b7b5
DP
710 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
711 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 712 int (*writable_register)(struct snd_soc_codec *, unsigned int);
808db4a4
RP
713
714 /* runtime */
808db4a4 715 struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */
dad8e7ae 716 unsigned int cache_bypass:1; /* Suppress access to the cache */
f0fba2ad
LG
717 unsigned int suspended:1; /* Codec is in suspend PM state */
718 unsigned int probed:1; /* Codec has been probed */
719 unsigned int ac97_registered:1; /* Codec has been AC97 registered */
0562f788 720 unsigned int ac97_created:1; /* Codec has been created by SoC */
fdf0f54d 721 unsigned int cache_init:1; /* codec cache has been initialized */
8a713da8 722 unsigned int using_regmap:1; /* using regmap access */
aaee8ef1
MB
723 u32 cache_only; /* Suppress writes to hardware */
724 u32 cache_sync; /* Cache needs to be synced to hardware */
808db4a4
RP
725
726 /* codec IO */
727 void *control_data; /* codec control (i2c/3wire) data */
808db4a4 728 hw_write_t hw_write;
c3acec26
MB
729 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
730 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
808db4a4 731 void *reg_cache;
7a30a3db 732 struct mutex cache_rw_mutex;
be3ea3b9 733 int val_bytes;
a96ca338 734
d191bd8d
KM
735 /* component */
736 struct snd_soc_component component;
737
808db4a4 738 /* dapm */
ce6120cc 739 struct snd_soc_dapm_context dapm;
808db4a4 740
384c89e2 741#ifdef CONFIG_DEBUG_FS
88439ac7 742 struct dentry *debugfs_codec_root;
384c89e2 743 struct dentry *debugfs_reg;
384c89e2 744#endif
808db4a4
RP
745};
746
f0fba2ad
LG
747/* codec driver */
748struct snd_soc_codec_driver {
749
750 /* driver ops */
751 int (*probe)(struct snd_soc_codec *);
752 int (*remove)(struct snd_soc_codec *);
84b315ee 753 int (*suspend)(struct snd_soc_codec *);
f0fba2ad 754 int (*resume)(struct snd_soc_codec *);
d191bd8d 755 struct snd_soc_component_driver component_driver;
f0fba2ad 756
b7af1daf
MB
757 /* Default control and setup, added after probe() is run */
758 const struct snd_kcontrol_new *controls;
759 int num_controls;
89b95ac0
MB
760 const struct snd_soc_dapm_widget *dapm_widgets;
761 int num_dapm_widgets;
762 const struct snd_soc_dapm_route *dapm_routes;
763 int num_dapm_routes;
764
ec4ee52a
MB
765 /* codec wide operations */
766 int (*set_sysclk)(struct snd_soc_codec *codec,
da1c6ea6 767 int clk_id, int source, unsigned int freq, int dir);
ec4ee52a
MB
768 int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source,
769 unsigned int freq_in, unsigned int freq_out);
770
f0fba2ad
LG
771 /* codec IO */
772 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
773 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
774 int (*display_register)(struct snd_soc_codec *, char *,
775 size_t, unsigned int);
d4754ec9
DP
776 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
777 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 778 int (*writable_register)(struct snd_soc_codec *, unsigned int);
4a8923ba 779 unsigned int reg_cache_size;
f0fba2ad
LG
780 short reg_cache_step;
781 short reg_word_size;
782 const void *reg_cache_default;
783
784 /* codec bias level */
785 int (*set_bias_level)(struct snd_soc_codec *,
786 enum snd_soc_bias_level level);
33c5f969 787 bool idle_bias_off;
474b62d6
MB
788
789 void (*seq_notifier)(struct snd_soc_dapm_context *,
f85a9e0d 790 enum snd_soc_dapm_type, int);
0168bf0d 791
64a648c2
LG
792 /* codec stream completion event */
793 int (*stream_event)(struct snd_soc_dapm_context *dapm, int event);
794
5124e69e
MB
795 bool ignore_pmdown_time; /* Doesn't benefit from pmdown delay */
796
0168bf0d
LG
797 /* probe ordering - for components with runtime dependencies */
798 int probe_order;
799 int remove_order;
808db4a4
RP
800};
801
802/* SoC platform interface */
f0fba2ad 803struct snd_soc_platform_driver {
808db4a4 804
f0fba2ad
LG
805 int (*probe)(struct snd_soc_platform *);
806 int (*remove)(struct snd_soc_platform *);
807 int (*suspend)(struct snd_soc_dai *dai);
808 int (*resume)(struct snd_soc_dai *dai);
808db4a4
RP
809
810 /* pcm creation and destruction */
552d1ef6 811 int (*pcm_new)(struct snd_soc_pcm_runtime *);
808db4a4
RP
812 void (*pcm_free)(struct snd_pcm *);
813
cb2cf612
LG
814 /* Default control and setup, added after probe() is run */
815 const struct snd_kcontrol_new *controls;
816 int num_controls;
817 const struct snd_soc_dapm_widget *dapm_widgets;
818 int num_dapm_widgets;
819 const struct snd_soc_dapm_route *dapm_routes;
820 int num_dapm_routes;
821
258020d0
PU
822 /*
823 * For platform caused delay reporting.
824 * Optional.
825 */
826 snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
827 struct snd_soc_dai *);
828
49681077 829 /* platform stream pcm ops */
1f03f55b 830 const struct snd_pcm_ops *ops;
0168bf0d 831
49681077 832 /* platform stream compress ops */
ef03c9ae 833 const struct snd_compr_ops *compr_ops;
49681077 834
64a648c2
LG
835 /* platform stream completion event */
836 int (*stream_event)(struct snd_soc_dapm_context *dapm, int event);
837
0168bf0d
LG
838 /* probe ordering - for components with runtime dependencies */
839 int probe_order;
840 int remove_order;
f1442bc1
LG
841
842 /* platform IO - used for platform DAPM */
843 unsigned int (*read)(struct snd_soc_platform *, unsigned int);
844 int (*write)(struct snd_soc_platform *, unsigned int, unsigned int);
07bf84aa 845 int (*bespoke_trigger)(struct snd_pcm_substream *, int);
808db4a4
RP
846};
847
f0fba2ad
LG
848struct snd_soc_platform {
849 const char *name;
850 int id;
851 struct device *dev;
d79e57db 852 const struct snd_soc_platform_driver *driver;
cc22d37e 853 struct mutex mutex;
808db4a4 854
f0fba2ad
LG
855 unsigned int suspended:1; /* platform is suspended */
856 unsigned int probed:1;
1c433fbd 857
f0fba2ad
LG
858 struct snd_soc_card *card;
859 struct list_head list;
860 struct list_head card_list;
b7950641
LG
861
862 struct snd_soc_dapm_context dapm;
731f1ab2
SG
863
864#ifdef CONFIG_DEBUG_FS
865 struct dentry *debugfs_platform_root;
731f1ab2 866#endif
f0fba2ad 867};
808db4a4 868
f0fba2ad
LG
869struct snd_soc_dai_link {
870 /* config - must be set by machine driver */
871 const char *name; /* Codec name */
872 const char *stream_name; /* Stream name */
bc92657a
SW
873 /*
874 * You MAY specify the link's CPU-side device, either by device name,
875 * or by DT/OF node, but not both. If this information is omitted,
876 * the CPU-side DAI is matched using .cpu_dai_name only, which hence
877 * must be globally unique. These fields are currently typically used
878 * only for codec to codec links, or systems using device tree.
879 */
880 const char *cpu_name;
881 const struct device_node *cpu_of_node;
882 /*
883 * You MAY specify the DAI name of the CPU DAI. If this information is
884 * omitted, the CPU-side DAI is matched using .cpu_name/.cpu_of_node
885 * only, which only works well when that device exposes a single DAI.
886 */
f0fba2ad 887 const char *cpu_dai_name;
bc92657a
SW
888 /*
889 * You MUST specify the link's codec, either by device name, or by
890 * DT/OF node, but not both.
891 */
892 const char *codec_name;
893 const struct device_node *codec_of_node;
894 /* You MUST specify the DAI name within the codec */
f0fba2ad 895 const char *codec_dai_name;
bc92657a
SW
896 /*
897 * You MAY specify the link's platform/PCM/DMA driver, either by
898 * device name, or by DT/OF node, but not both. Some forms of link
899 * do not need a platform.
900 */
901 const char *platform_name;
902 const struct device_node *platform_of_node;
01d7584c 903 int be_id; /* optional ID for machine driver BE identification */
4ccab3e7 904
c74184ed
MB
905 const struct snd_soc_pcm_stream *params;
906
75d9ac46
MB
907 unsigned int dai_fmt; /* format to set on init */
908
01d7584c
LG
909 enum snd_soc_dpcm_trigger trigger[2]; /* trigger type for DPCM */
910
3efab7dc
MB
911 /* Keep DAI active over suspend */
912 unsigned int ignore_suspend:1;
913
06f409d7
MB
914 /* Symmetry requirements */
915 unsigned int symmetric_rates:1;
3635bf09
NC
916 unsigned int symmetric_channels:1;
917 unsigned int symmetric_samplebits:1;
06f409d7 918
01d7584c
LG
919 /* Do not create a PCM for this DAI link (Backend link) */
920 unsigned int no_pcm:1;
921
922 /* This DAI link can route to other DAI links at runtime (Frontend)*/
923 unsigned int dynamic:1;
924
1e9de42f
LG
925 /* DPCM capture and Playback support */
926 unsigned int dpcm_capture:1;
927 unsigned int dpcm_playback:1;
928
e50fad4f 929 /* pmdown_time is ignored at stop */
930 unsigned int ignore_pmdown_time:1;
931
f0fba2ad
LG
932 /* codec/machine specific init - e.g. add machine controls */
933 int (*init)(struct snd_soc_pcm_runtime *rtd);
06f409d7 934
01d7584c
LG
935 /* optional hw_params re-writing for BE and FE sync */
936 int (*be_hw_params_fixup)(struct snd_soc_pcm_runtime *rtd,
937 struct snd_pcm_hw_params *params);
938
f0fba2ad 939 /* machine stream operations */
13aec722
LPC
940 const struct snd_soc_ops *ops;
941 const struct snd_soc_compr_ops *compr_ops;
d6bead02
FE
942
943 /* For unidirectional dai links */
944 bool playback_only;
945 bool capture_only;
808db4a4
RP
946};
947
ff819b83 948struct snd_soc_codec_conf {
ead9b919 949 const char *dev_name;
ff819b83
DP
950
951 /*
952 * optional map of kcontrol, widget and path name prefixes that are
953 * associated per device
954 */
ead9b919
JN
955 const char *name_prefix;
956};
957
2eea392d
JN
958struct snd_soc_aux_dev {
959 const char *name; /* Codec name */
960 const char *codec_name; /* for multi-codec */
961
962 /* codec/machine specific init - e.g. add machine controls */
963 int (*init)(struct snd_soc_dapm_context *dapm);
964};
965
87506549
MB
966/* SoC card */
967struct snd_soc_card {
f0fba2ad 968 const char *name;
22de71ba
LG
969 const char *long_name;
970 const char *driver_name;
c5af3a2e 971 struct device *dev;
f0fba2ad
LG
972 struct snd_card *snd_card;
973 struct module *owner;
c5af3a2e
MB
974
975 struct list_head list;
f0fba2ad 976 struct mutex mutex;
a73fb2df 977 struct mutex dapm_mutex;
c5af3a2e 978
f0fba2ad 979 bool instantiated;
808db4a4 980
e7361ec4 981 int (*probe)(struct snd_soc_card *card);
28e9ad92 982 int (*late_probe)(struct snd_soc_card *card);
e7361ec4 983 int (*remove)(struct snd_soc_card *card);
808db4a4
RP
984
985 /* the pre and post PM functions are used to do any PM work before and
986 * after the codec and DAI's do any PM work. */
70b2ac12
MB
987 int (*suspend_pre)(struct snd_soc_card *card);
988 int (*suspend_post)(struct snd_soc_card *card);
989 int (*resume_pre)(struct snd_soc_card *card);
990 int (*resume_post)(struct snd_soc_card *card);
808db4a4 991
0b4d221b 992 /* callbacks */
87506549 993 int (*set_bias_level)(struct snd_soc_card *,
d4c6005f 994 struct snd_soc_dapm_context *dapm,
0be9898a 995 enum snd_soc_bias_level level);
1badabd9 996 int (*set_bias_level_post)(struct snd_soc_card *,
d4c6005f 997 struct snd_soc_dapm_context *dapm,
1badabd9 998 enum snd_soc_bias_level level);
0b4d221b 999
6c5f1fed 1000 long pmdown_time;
96dd3622 1001
808db4a4
RP
1002 /* CPU <--> Codec DAI links */
1003 struct snd_soc_dai_link *dai_link;
1004 int num_links;
f0fba2ad
LG
1005 struct snd_soc_pcm_runtime *rtd;
1006 int num_rtd;
6308419a 1007
ff819b83
DP
1008 /* optional codec specific configuration */
1009 struct snd_soc_codec_conf *codec_conf;
1010 int num_configs;
ead9b919 1011
2eea392d
JN
1012 /*
1013 * optional auxiliary devices such as amplifiers or codecs with DAI
1014 * link unused
1015 */
1016 struct snd_soc_aux_dev *aux_dev;
1017 int num_aux_devs;
1018 struct snd_soc_pcm_runtime *rtd_aux;
1019 int num_aux_rtd;
1020
b7af1daf
MB
1021 const struct snd_kcontrol_new *controls;
1022 int num_controls;
1023
b8ad29de
MB
1024 /*
1025 * Card-specific routes and widgets.
1026 */
d06e48db 1027 const struct snd_soc_dapm_widget *dapm_widgets;
b8ad29de 1028 int num_dapm_widgets;
d06e48db 1029 const struct snd_soc_dapm_route *dapm_routes;
b8ad29de 1030 int num_dapm_routes;
1633281b 1031 bool fully_routed;
b8ad29de 1032
6308419a 1033 struct work_struct deferred_resume_work;
f0fba2ad
LG
1034
1035 /* lists of probed devices belonging to this card */
1036 struct list_head codec_dev_list;
1037 struct list_head platform_dev_list;
1038 struct list_head dai_dev_list;
a6052154 1039
97c866de 1040 struct list_head widgets;
8ddab3f5 1041 struct list_head paths;
7be31be8 1042 struct list_head dapm_list;
db432b41 1043 struct list_head dapm_dirty;
8ddab3f5 1044
e37a4970
MB
1045 /* Generic DAPM context for the card */
1046 struct snd_soc_dapm_context dapm;
de02d078 1047 struct snd_soc_dapm_stats dapm_stats;
564c6504 1048 struct snd_soc_dapm_update *update;
e37a4970 1049
a6052154
JN
1050#ifdef CONFIG_DEBUG_FS
1051 struct dentry *debugfs_card_root;
3a45b867 1052 struct dentry *debugfs_pop_time;
a6052154 1053#endif
3a45b867 1054 u32 pop_time;
dddf3e4c
MB
1055
1056 void *drvdata;
808db4a4
RP
1057};
1058
f0fba2ad 1059/* SoC machine DAI configuration, glues a codec and cpu DAI together */
d66a327d 1060struct snd_soc_pcm_runtime {
36ae1a96 1061 struct device *dev;
87506549 1062 struct snd_soc_card *card;
f0fba2ad 1063 struct snd_soc_dai_link *dai_link;
b8c0dab9
LG
1064 struct mutex pcm_mutex;
1065 enum snd_soc_pcm_subclass pcm_subclass;
1066 struct snd_pcm_ops ops;
f0fba2ad 1067
f0fba2ad 1068 unsigned int dev_registered:1;
808db4a4 1069
01d7584c
LG
1070 /* Dynamic PCM BE runtime data */
1071 struct snd_soc_dpcm_runtime dpcm[2];
2a99ef0f 1072 int fe_compr;
01d7584c 1073
f0fba2ad 1074 long pmdown_time;
9bffb1fb 1075 unsigned char pop_wait:1;
f0fba2ad
LG
1076
1077 /* runtime devices */
1078 struct snd_pcm *pcm;
49681077 1079 struct snd_compr *compr;
f0fba2ad
LG
1080 struct snd_soc_codec *codec;
1081 struct snd_soc_platform *platform;
1082 struct snd_soc_dai *codec_dai;
1083 struct snd_soc_dai *cpu_dai;
1084
1085 struct delayed_work delayed_work;
f86dcef8
LG
1086#ifdef CONFIG_DEBUG_FS
1087 struct dentry *debugfs_dpcm_root;
1088 struct dentry *debugfs_dpcm_state;
1089#endif
808db4a4
RP
1090};
1091
4eaa9819
JS
1092/* mixer control */
1093struct soc_mixer_control {
d11bb4a9 1094 int min, max, platform_max;
249ce138
LPC
1095 int reg, rreg;
1096 unsigned int shift, rshift;
f227b88f 1097 unsigned int sign_bit;
57295073
LPC
1098 unsigned int invert:1;
1099 unsigned int autodisable:1;
4eaa9819
JS
1100};
1101
71d08516
MB
1102struct soc_bytes {
1103 int base;
1104 int num_regs;
f831b055 1105 u32 mask;
71d08516
MB
1106};
1107
4183eed2
KK
1108/* multi register control */
1109struct soc_mreg_control {
1110 long min, max;
1111 unsigned int regbase, regcount, nbits, invert;
1112};
1113
808db4a4
RP
1114/* enumerated kcontrol */
1115struct soc_enum {
b948837a 1116 int reg;
2e72f8e3
PU
1117 unsigned char shift_l;
1118 unsigned char shift_r;
9a8d38db 1119 unsigned int items;
2e72f8e3 1120 unsigned int mask;
87023ff7 1121 const char * const *texts;
2e72f8e3 1122 const unsigned int *values;
2e72f8e3
PU
1123};
1124
28d6d175
LPC
1125/**
1126 * snd_soc_component_to_codec() - Casts a component to the CODEC it is embedded in
1127 * @component: The component to cast to a CODEC
1128 *
1129 * This function must only be used on components that are known to be CODECs.
1130 * Otherwise the behavior is undefined.
1131 */
1132static inline struct snd_soc_codec *snd_soc_component_to_codec(
1133 struct snd_soc_component *component)
1134{
1135 return container_of(component, struct snd_soc_codec, component);
1136}
1137
5c82f567 1138/* codec IO */
c3753707
MB
1139unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
1140unsigned int snd_soc_write(struct snd_soc_codec *codec,
1141 unsigned int reg, unsigned int val);
5c82f567 1142
f0fba2ad
LG
1143/* device driver data */
1144
dddf3e4c
MB
1145static inline void snd_soc_card_set_drvdata(struct snd_soc_card *card,
1146 void *data)
1147{
1148 card->drvdata = data;
1149}
1150
1151static inline void *snd_soc_card_get_drvdata(struct snd_soc_card *card)
1152{
1153 return card->drvdata;
1154}
1155
b2c812e2 1156static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec,
f0fba2ad 1157 void *data)
b2c812e2 1158{
f0fba2ad 1159 dev_set_drvdata(codec->dev, data);
b2c812e2
MB
1160}
1161
1162static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec)
1163{
f0fba2ad
LG
1164 return dev_get_drvdata(codec->dev);
1165}
1166
1167static inline void snd_soc_platform_set_drvdata(struct snd_soc_platform *platform,
1168 void *data)
1169{
1170 dev_set_drvdata(platform->dev, data);
1171}
1172
1173static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platform)
1174{
1175 return dev_get_drvdata(platform->dev);
1176}
1177
1178static inline void snd_soc_pcm_set_drvdata(struct snd_soc_pcm_runtime *rtd,
1179 void *data)
1180{
36ae1a96 1181 dev_set_drvdata(rtd->dev, data);
f0fba2ad
LG
1182}
1183
1184static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
1185{
36ae1a96 1186 return dev_get_drvdata(rtd->dev);
b2c812e2
MB
1187}
1188
4e10bda0
VK
1189static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
1190{
1191 INIT_LIST_HEAD(&card->dai_dev_list);
1192 INIT_LIST_HEAD(&card->codec_dev_list);
1193 INIT_LIST_HEAD(&card->platform_dev_list);
1194 INIT_LIST_HEAD(&card->widgets);
1195 INIT_LIST_HEAD(&card->paths);
1196 INIT_LIST_HEAD(&card->dapm_list);
1197}
1198
30d86ba4
PU
1199static inline bool snd_soc_volsw_is_stereo(struct soc_mixer_control *mc)
1200{
1201 if (mc->reg == mc->rreg && mc->shift == mc->rshift)
1202 return 0;
1203 /*
1204 * mc->reg == mc->rreg && mc->shift != mc->rshift, or
1205 * mc->reg != mc->rreg means that the control is
1206 * stereo (bits in one register or in two registers)
1207 */
1208 return 1;
1209}
1210
29ae2fa5
LPC
1211static inline unsigned int snd_soc_enum_val_to_item(struct soc_enum *e,
1212 unsigned int val)
1213{
1214 unsigned int i;
1215
1216 if (!e->values)
1217 return val;
1218
1219 for (i = 0; i < e->items; i++)
1220 if (val == e->values[i])
1221 return i;
1222
1223 return 0;
1224}
1225
1226static inline unsigned int snd_soc_enum_item_to_val(struct soc_enum *e,
1227 unsigned int item)
1228{
1229 if (!e->values)
1230 return item;
1231
1232 return e->values[item];
1233}
1234
cdde4ccb
LPC
1235static inline bool snd_soc_component_is_active(
1236 struct snd_soc_component *component)
1237{
1238 return component->active != 0;
1239}
1240
5c898e74
LPC
1241static inline bool snd_soc_codec_is_active(struct snd_soc_codec *codec)
1242{
cdde4ccb 1243 return snd_soc_component_is_active(&codec->component);
5c898e74
LPC
1244}
1245
fb257897
MB
1246int snd_soc_util_init(void);
1247void snd_soc_util_exit(void);
1248
bec4fa05
SW
1249int snd_soc_of_parse_card_name(struct snd_soc_card *card,
1250 const char *propname);
9a6d4860
XL
1251int snd_soc_of_parse_audio_simple_widgets(struct snd_soc_card *card,
1252 const char *propname);
89c67857
XL
1253int snd_soc_of_parse_tdm_slot(struct device_node *np,
1254 unsigned int *slots,
1255 unsigned int *slot_width);
a4a54dd5
SW
1256int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
1257 const char *propname);
a7930ed4
KM
1258unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
1259 const char *prefix);
cb470087
KM
1260int snd_soc_of_get_dai_name(struct device_node *of_node,
1261 const char **dai_name);
bec4fa05 1262
a47cbe72
MB
1263#include <sound/soc-dai.h>
1264
faff4bb0 1265#ifdef CONFIG_DEBUG_FS
8a9dab1a 1266extern struct dentry *snd_soc_debugfs_root;
faff4bb0
SW
1267#endif
1268
6f8ab4ac
MB
1269extern const struct dev_pm_ops snd_soc_pm_ops;
1270
f6d5e586
CK
1271/* Helper functions */
1272static inline void snd_soc_dapm_mutex_lock(struct snd_soc_dapm_context *dapm)
1273{
1274 mutex_lock(&dapm->card->dapm_mutex);
1275}
1276
1277static inline void snd_soc_dapm_mutex_unlock(struct snd_soc_dapm_context *dapm)
1278{
1279 mutex_unlock(&dapm->card->dapm_mutex);
1280}
1281
808db4a4 1282#endif