[linux-2.6-block.git] / include / sound / soc.h

/*
 * linux/sound/soc.h -- ALSA SoC Layer
 *
 * Author:		Liam Girdwood
 * Created:		Aug 11th 2005
 * Copyright:	Wolfson Microelectronics. PLC.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef __LINUX_SND_SOC_H
#define __LINUX_SND_SOC_H

#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/workqueue.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/control.h>
#include <sound/ac97_codec.h>

#define SND_SOC_VERSION "0.13.2"

/*
 * Convenience kcontrol builders
 */
#define SOC_SINGLE_VALUE(reg, shift, max, invert) ((reg) | ((shift) << 8) |\
	((shift) << 12) | ((max) << 16) | ((invert) << 24))
#define SOC_SINGLE_VALUE_EXT(reg, max, invert) ((reg) | ((max) << 16) |\
	((invert) << 31))
#define SOC_SINGLE(xname, reg, shift, max, invert) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
	.put = snd_soc_put_volsw, \
	.private_value =  SOC_SINGLE_VALUE(reg, shift, max, invert) }
#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
		 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	.tlv.p = (tlv_array), \
	.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
	.put = snd_soc_put_volsw, \
	.private_value =  SOC_SINGLE_VALUE(reg, shift, max, invert) }
#define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
	.info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
	.put = snd_soc_put_volsw, \
	.private_value = (reg) | ((shift_left) << 8) | \
		((shift_right) << 12) | ((max) << 16) | ((invert) << 24) }
#define SOC_DOUBLE_R(xname, reg_left, reg_right, shift, max, invert) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
	.info = snd_soc_info_volsw_2r, \
	.get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
	.private_value = (reg_left) | ((shift) << 8)  | \
		((max) << 12) | ((invert) << 20) | ((reg_right) << 24) }
#define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
		 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	.tlv.p = (tlv_array), \
	.info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
	.put = snd_soc_put_volsw, \
	.private_value = (reg) | ((shift_left) << 8) | \
		((shift_right) << 12) | ((max) << 16) | ((invert) << 24) }
#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, shift, max, invert, tlv_array) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
		 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	.tlv.p = (tlv_array), \
	.info = snd_soc_info_volsw_2r, \
	.get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
	.private_value = (reg_left) | ((shift) << 8)  | \
		((max) << 12) | ((invert) << 20) | ((reg_right) << 24) }
#define SOC_DOUBLE_S8_TLV(xname, reg, min, max, tlv_array) \
{	.iface  = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
		  SNDRV_CTL_ELEM_ACCESS_READWRITE, \
	.tlv.p  = (tlv_array), \
	.info   = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \
	.put    = snd_soc_put_volsw_s8, \
	.private_value = (reg) | (((signed char)max) << 16) | \
			 (((signed char)min) << 24) }
#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts) \
{	.reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
	.mask = xmask, .texts = xtexts }
#define SOC_ENUM_SINGLE(xreg, xshift, xmask, xtexts) \
	SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xtexts)
#define SOC_ENUM_SINGLE_EXT(xmask, xtexts) \
{	.mask = xmask, .texts = xtexts }
#define SOC_ENUM(xname, xenum) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
	.info = snd_soc_info_enum_double, \
	.get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
	.private_value = (unsigned long)&xenum }
#define SOC_SINGLE_EXT(xname, xreg, xshift, xmask, xinvert,\
	 xhandler_get, xhandler_put) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	.info = snd_soc_info_volsw, \
	.get = xhandler_get, .put = xhandler_put, \
	.private_value = SOC_SINGLE_VALUE(xreg, xshift, xmask, xinvert) }
#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmask, xinvert,\
	 xhandler_get, xhandler_put, tlv_array) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
		 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	.tlv.p = (tlv_array), \
	.info = snd_soc_info_volsw, \
	.get = xhandler_get, .put = xhandler_put, \
	.private_value = SOC_SINGLE_VALUE(xreg, xshift, xmask, xinvert) }
#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	.info = snd_soc_info_bool_ext, \
	.get = xhandler_get, .put = xhandler_put, \
	.private_value = xdata }
#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	.info = snd_soc_info_enum_ext, \
	.get = xhandler_get, .put = xhandler_put, \
	.private_value = (unsigned long)&xenum }

/*
 * Bias levels
 *
 * @ON:      Bias is fully on for audio playback and capture operations.
 * @PREPARE: Prepare for audio operations. Called before DAPM switching for
 *           stream start and stop operations.
 * @STANDBY: Low power standby state when no playback/capture operations are
 *           in progress. NOTE: The transition time between STANDBY and ON
 *           should be as fast as possible and no longer than 10ms.
 * @OFF:     Power Off. No restrictions on transition times.
 */
enum snd_soc_bias_level {
	SND_SOC_BIAS_ON,
	SND_SOC_BIAS_PREPARE,
	SND_SOC_BIAS_STANDBY,
	SND_SOC_BIAS_OFF,
};

/*
 * Digital Audio Interface (DAI) types
 */
#define SND_SOC_DAI_AC97	0x1
#define SND_SOC_DAI_I2S		0x2
#define SND_SOC_DAI_PCM		0x4
#define SND_SOC_DAI_AC97_BUS	0x8	/* for custom i.e. non ac97_codec.c */

/*
 * DAI hardware audio formats
 */
#define SND_SOC_DAIFMT_I2S		0	/* I2S mode */
#define SND_SOC_DAIFMT_RIGHT_J	1	/* Right justified mode */
#define SND_SOC_DAIFMT_LEFT_J	2	/* Left Justified mode */
#define SND_SOC_DAIFMT_DSP_A	3	/* L data msb after FRM or LRC */
#define SND_SOC_DAIFMT_DSP_B	4	/* L data msb during FRM or LRC */
#define SND_SOC_DAIFMT_AC97		5	/* AC97 */

#define SND_SOC_DAIFMT_MSB 	SND_SOC_DAIFMT_LEFT_J
#define SND_SOC_DAIFMT_LSB	SND_SOC_DAIFMT_RIGHT_J

/*
 * DAI Gating
 */
#define SND_SOC_DAIFMT_CONT			(0 << 4)	/* continuous clock */
#define SND_SOC_DAIFMT_GATED		(1 << 4)	/* clock is gated when not Tx/Rx */

/*
 * DAI Sync
 * Synchronous LR (Left Right) clocks and Frame signals.
 */
#define SND_SOC_DAIFMT_SYNC		(0 << 5)	/* Tx FRM = Rx FRM */
#define SND_SOC_DAIFMT_ASYNC		(1 << 5)	/* Tx FRM ~ Rx FRM */

/*
 * TDM
 */
#define SND_SOC_DAIFMT_TDM		(1 << 6)

/*
 * DAI hardware signal inversions
 */
#define SND_SOC_DAIFMT_NB_NF		(0 << 8)	/* normal bclk + frm */
#define SND_SOC_DAIFMT_NB_IF		(1 << 8)	/* normal bclk + inv frm */
#define SND_SOC_DAIFMT_IB_NF		(2 << 8)	/* invert bclk + nor frm */
#define SND_SOC_DAIFMT_IB_IF		(3 << 8)	/* invert bclk + frm */

/*
 * DAI hardware clock masters
 * This is wrt the codec, the inverse is true for the interface
 * i.e. if the codec is clk and frm master then the interface is
 * clk and frame slave.
 */
#define SND_SOC_DAIFMT_CBM_CFM	(0 << 12) /* codec clk & frm master */
#define SND_SOC_DAIFMT_CBS_CFM	(1 << 12) /* codec clk slave & frm master */
#define SND_SOC_DAIFMT_CBM_CFS	(2 << 12) /* codec clk master & frame slave */
#define SND_SOC_DAIFMT_CBS_CFS	(3 << 12) /* codec clk & frm slave */

#define SND_SOC_DAIFMT_FORMAT_MASK		0x000f
#define SND_SOC_DAIFMT_CLOCK_MASK		0x00f0
#define SND_SOC_DAIFMT_INV_MASK			0x0f00
#define SND_SOC_DAIFMT_MASTER_MASK		0xf000


/*
 * Master Clock Directions
 */
#define SND_SOC_CLOCK_IN	0
#define SND_SOC_CLOCK_OUT	1

/*
 * AC97 codec ID's bitmask
 */
#define SND_SOC_DAI_AC97_ID0	(1 << 0)
#define SND_SOC_DAI_AC97_ID1	(1 << 1)
#define SND_SOC_DAI_AC97_ID2	(1 << 2)
#define SND_SOC_DAI_AC97_ID3	(1 << 3)

struct snd_soc_device;
struct snd_soc_pcm_stream;
struct snd_soc_ops;
struct snd_soc_dai_mode;
struct snd_soc_pcm_runtime;
struct snd_soc_codec_dai;
struct snd_soc_cpu_dai;
struct snd_soc_codec;
struct snd_soc_machine_config;
struct soc_enum;
struct snd_soc_ac97_ops;
struct snd_soc_clock_info;

typedef int (*hw_write_t)(void *,const char* ,int);
typedef int (*hw_read_t)(void *,char* ,int);

extern struct snd_ac97_bus_ops soc_ac97_ops;

/* pcm <-> DAI connect */
void snd_soc_free_pcms(struct snd_soc_device *socdev);
int snd_soc_new_pcms(struct snd_soc_device *socdev, int idx, const char *xid);
int snd_soc_register_card(struct snd_soc_device *socdev);

/* set runtime hw params */
int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
	const struct snd_pcm_hardware *hw);

/* codec IO */
#define snd_soc_read(codec, reg) codec->read(codec, reg)
#define snd_soc_write(codec, reg, value) codec->write(codec, reg, value)

/* codec register bit access */
int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
				unsigned short mask, unsigned short value);
int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
				unsigned short mask, unsigned short value);

int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
	struct snd_ac97_bus_ops *ops, int num);
void snd_soc_free_ac97_codec(struct snd_soc_codec *codec);

/*
 *Controls
 */
struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
	void *data, char *long_name);
int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_info *uinfo);
int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_info *uinfo);
int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);
int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_info *uinfo);
int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_info *uinfo);
#define snd_soc_info_bool_ext		snd_ctl_boolean_mono_info
int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);
int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_info *uinfo);
int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);
int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_info *uinfo);
int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
	struct snd_ctl_elem_value *ucontrol);

/* SoC PCM stream information */
struct snd_soc_pcm_stream {
	char *stream_name;
	u64 formats;			/* SNDRV_PCM_FMTBIT_* */
	unsigned int rates;		/* SNDRV_PCM_RATE_* */
	unsigned int rate_min;		/* min rate */
	unsigned int rate_max;		/* max rate */
	unsigned int channels_min;	/* min channels */
	unsigned int channels_max;	/* max channels */
	unsigned int active:1;		/* stream is in use */
};

/* SoC audio ops */
struct snd_soc_ops {
	int (*startup)(struct snd_pcm_substream *);
	void (*shutdown)(struct snd_pcm_substream *);
	int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
	int (*hw_free)(struct snd_pcm_substream *);
	int (*prepare)(struct snd_pcm_substream *);
	int (*trigger)(struct snd_pcm_substream *, int);
};

/* ASoC DAI ops */
struct snd_soc_dai_ops {
	/* DAI clocking configuration */
	int (*set_sysclk)(struct snd_soc_codec_dai *codec_dai,
		int clk_id, unsigned int freq, int dir);
	int (*set_pll)(struct snd_soc_codec_dai *codec_dai,
		int pll_id, unsigned int freq_in, unsigned int freq_out);
	int (*set_clkdiv)(struct snd_soc_codec_dai *codec_dai,
		int div_id, int div);

	/* DAI format configuration */
	int (*set_fmt)(struct snd_soc_codec_dai *codec_dai,
		unsigned int fmt);
	int (*set_tdm_slot)(struct snd_soc_codec_dai *codec_dai,
		unsigned int mask, int slots);
	int (*set_tristate)(struct snd_soc_codec_dai *, int tristate);

	/* digital mute */
	int (*digital_mute)(struct snd_soc_codec_dai *, int mute);
};

/* SoC Codec DAI */
struct snd_soc_codec_dai {
	char *name;
	int id;
	unsigned char type;

	/* DAI capabilities */
	struct snd_soc_pcm_stream playback;
	struct snd_soc_pcm_stream capture;

	/* DAI runtime info */
	struct snd_soc_codec *codec;
	unsigned int active;
	unsigned char pop_wait:1;

	/* ops */
	struct snd_soc_ops ops;
	struct snd_soc_dai_ops dai_ops;

	/* DAI private data */
	void *private_data;
};

/* SoC CPU DAI */
struct snd_soc_cpu_dai {

	/* DAI description */
	char *name;
	unsigned int id;
	unsigned char type;

	/* DAI callbacks */
	int (*probe)(struct platform_device *pdev,
		     struct snd_soc_cpu_dai *dai);
	void (*remove)(struct platform_device *pdev,
		       struct snd_soc_cpu_dai *dai);
	int (*suspend)(struct platform_device *pdev,
		struct snd_soc_cpu_dai *cpu_dai);
	int (*resume)(struct platform_device *pdev,
		struct snd_soc_cpu_dai *cpu_dai);

	/* ops */
	struct snd_soc_ops ops;
	struct snd_soc_dai_ops dai_ops;

	/* DAI capabilities */
	struct snd_soc_pcm_stream capture;
	struct snd_soc_pcm_stream playback;

	/* DAI runtime info */
	struct snd_pcm_runtime *runtime;
	unsigned char active:1;
	void *dma_data;

	/* DAI private data */
	void *private_data;
};

/* SoC Audio Codec */
struct snd_soc_codec {
	char *name;
	struct module *owner;
	struct mutex mutex;

	/* callbacks */
	int (*set_bias_level)(struct snd_soc_codec *,
			      enum snd_soc_bias_level level);

	/* runtime */
	struct snd_card *card;
	struct snd_ac97 *ac97;  /* for ad-hoc ac97 devices */
	unsigned int active;
	unsigned int pcm_devs;
	void *private_data;

	/* codec IO */
	void *control_data; /* codec control (i2c/3wire) data */
	unsigned int (*read)(struct snd_soc_codec *, unsigned int);
	int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
	hw_write_t hw_write;
	hw_read_t hw_read;
	void *reg_cache;
	short reg_cache_size;
	short reg_cache_step;

	/* dapm */
	struct list_head dapm_widgets;
	struct list_head dapm_paths;
	enum snd_soc_bias_level bias_level;
	enum snd_soc_bias_level suspend_bias_level;
	struct delayed_work delayed_work;

	/* codec DAI's */
	struct snd_soc_codec_dai *dai;
	unsigned int num_dai;
};

/* codec device */
struct snd_soc_codec_device {
	int (*probe)(struct platform_device *pdev);
	int (*remove)(struct platform_device *pdev);
	int (*suspend)(struct platform_device *pdev, pm_message_t state);
	int (*resume)(struct platform_device *pdev);
};

/* SoC platform interface */
struct snd_soc_platform {
	char *name;

	int (*probe)(struct platform_device *pdev);
	int (*remove)(struct platform_device *pdev);
	int (*suspend)(struct platform_device *pdev,
		struct snd_soc_cpu_dai *cpu_dai);
	int (*resume)(struct platform_device *pdev,
		struct snd_soc_cpu_dai *cpu_dai);

	/* pcm creation and destruction */
	int (*pcm_new)(struct snd_card *, struct snd_soc_codec_dai *,
		struct snd_pcm *);
	void (*pcm_free)(struct snd_pcm *);

	/* platform stream ops */
	struct snd_pcm_ops *pcm_ops;
};

/* SoC machine DAI configuration, glues a codec and cpu DAI together */
struct snd_soc_dai_link  {
	char *name;			/* Codec name */
	char *stream_name;		/* Stream name */

	/* DAI */
	struct snd_soc_codec_dai *codec_dai;
	struct snd_soc_cpu_dai *cpu_dai;

	/* machine stream operations */
	struct snd_soc_ops *ops;

	/* codec/machine specific init - e.g. add machine controls */
	int (*init)(struct snd_soc_codec *codec);

	/* DAI pcm */
	struct snd_pcm *pcm;
};

/* SoC machine */
struct snd_soc_machine {
	char *name;

	int (*probe)(struct platform_device *pdev);
	int (*remove)(struct platform_device *pdev);

	/* the pre and post PM functions are used to do any PM work before and
	 * after the codec and DAI's do any PM work. */
	int (*suspend_pre)(struct platform_device *pdev, pm_message_t state);
	int (*suspend_post)(struct platform_device *pdev, pm_message_t state);
	int (*resume_pre)(struct platform_device *pdev);
	int (*resume_post)(struct platform_device *pdev);

	/* callbacks */
	int (*set_bias_level)(struct snd_soc_machine *,
			      enum snd_soc_bias_level level);

	/* CPU <--> Codec DAI links  */
	struct snd_soc_dai_link *dai_link;
	int num_links;
};

/* SoC Device - the audio subsystem */
struct snd_soc_device {
	struct device *dev;
	struct snd_soc_machine *machine;
	struct snd_soc_platform *platform;
	struct snd_soc_codec *codec;
	struct snd_soc_codec_device *codec_dev;
	struct delayed_work delayed_work;
	struct work_struct deferred_resume_work;
	void *codec_data;
};

/* runtime channel data */
struct snd_soc_pcm_runtime {
	struct snd_soc_dai_link *dai;
	struct snd_soc_device *socdev;
};

/* enumerated kcontrol */
struct soc_enum {
	unsigned short reg;
	unsigned short reg2;
	unsigned char shift_l;
	unsigned char shift_r;
	unsigned int mask;
	const char **texts;
	void *dapm;
};

#endif
Commit	Line	Data
808db4a4 RP	1	/*
	2	* linux/sound/soc.h -- ALSA SoC Layer
	3	*
	4	* Author: Liam Girdwood
	5	* Created: Aug 11th 2005
	6	* Copyright: Wolfson Microelectronics. PLC.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#ifndef __LINUX_SND_SOC_H
	14	#define __LINUX_SND_SOC_H
	15
	16	#include <linux/platform_device.h>
	17	#include <linux/types.h>
4484bb2e	18	#include <linux/workqueue.h>
808db4a4 RP	19	#include <sound/core.h>
	20	#include <sound/pcm.h>
	21	#include <sound/control.h>
	22	#include <sound/ac97_codec.h>
	23
0a22b87d	24	#define SND_SOC_VERSION "0.13.2"
808db4a4 RP	25
	26	/*
	27	* Convenience kcontrol builders
	28	*/
a7a4ac86 PZ	29	#define SOC_SINGLE_VALUE(reg, shift, max, invert) ((reg) \| ((shift) << 8) \|\
	30	((shift) << 12) \| ((max) << 16) \| ((invert) << 24))
	31	#define SOC_SINGLE_VALUE_EXT(reg, max, invert) ((reg) \| ((max) << 16) \|\
808db4a4	32	((invert) << 31))
a7a4ac86	33	#define SOC_SINGLE(xname, reg, shift, max, invert) \
808db4a4 RP	34	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	35	.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
	36	.put = snd_soc_put_volsw, \
a7a4ac86 PZ	37	.private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
	38	#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
	39	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	40	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ \|\
	41	SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	42	.tlv.p = (tlv_array), \
	43	.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
	44	.put = snd_soc_put_volsw, \
	45	.private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
	46	#define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
808db4a4 RP	47	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
	48	.info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
	49	.put = snd_soc_put_volsw, \
	50	.private_value = (reg) \| ((shift_left) << 8) \| \
a7a4ac86 PZ	51	((shift_right) << 12) \| ((max) << 16) \| ((invert) << 24) }
a7a4ac86 PZ	52	#define SOC_DOUBLE_R(xname, reg_left, reg_right, shift, max, invert) \
808db4a4 RP	53	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
	54	.info = snd_soc_info_volsw_2r, \
	55	.get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
	56	.private_value = (reg_left) \| ((shift) << 8) \| \
a7a4ac86 PZ	57	((max) << 12) \| ((invert) << 20) \| ((reg_right) << 24) }
	58	#define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \
	59	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
	60	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ \|\
	61	SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	62	.tlv.p = (tlv_array), \
	63	.info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
	64	.put = snd_soc_put_volsw, \
	65	.private_value = (reg) \| ((shift_left) << 8) \| \
	66	((shift_right) << 12) \| ((max) << 16) \| ((invert) << 24) }
	67	#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, shift, max, invert, tlv_array) \
	68	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
	69	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ \|\
	70	SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	71	.tlv.p = (tlv_array), \
	72	.info = snd_soc_info_volsw_2r, \
	73	.get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
	74	.private_value = (reg_left) \| ((shift) << 8) \| \
	75	((max) << 12) \| ((invert) << 20) \| ((reg_right) << 24) }
e13ac2e9 MB	76	#define SOC_DOUBLE_S8_TLV(xname, reg, min, max, tlv_array) \
	77	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
	78	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ \| \
	79	SNDRV_CTL_ELEM_ACCESS_READWRITE, \
	80	.tlv.p = (tlv_array), \
	81	.info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \
	82	.put = snd_soc_put_volsw_s8, \
	83	.private_value = (reg) \| (((signed char)max) << 16) \| \
	84	(((signed char)min) << 24) }
808db4a4 RP	85	#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts) \
	86	{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
	87	.mask = xmask, .texts = xtexts }
	88	#define SOC_ENUM_SINGLE(xreg, xshift, xmask, xtexts) \
	89	SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xtexts)
	90	#define SOC_ENUM_SINGLE_EXT(xmask, xtexts) \
	91	{ .mask = xmask, .texts = xtexts }
	92	#define SOC_ENUM(xname, xenum) \
	93	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
	94	.info = snd_soc_info_enum_double, \
	95	.get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
	96	.private_value = (unsigned long)&xenum }
1c433fbd	97	#define SOC_SINGLE_EXT(xname, xreg, xshift, xmask, xinvert,\
808db4a4 RP	98	xhandler_get, xhandler_put) \
808db4a4 RP	99	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1c433fbd	100	.info = snd_soc_info_volsw, \
808db4a4	101	.get = xhandler_get, .put = xhandler_put, \
1c433fbd	102	.private_value = SOC_SINGLE_VALUE(xreg, xshift, xmask, xinvert) }
10144c09 MM	103	#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmask, xinvert,\
	104	xhandler_get, xhandler_put, tlv_array) \
	105	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	106	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ \|\
	107	SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	108	.tlv.p = (tlv_array), \
	109	.info = snd_soc_info_volsw, \
	110	.get = xhandler_get, .put = xhandler_put, \
	111	.private_value = SOC_SINGLE_VALUE(xreg, xshift, xmask, xinvert) }
808db4a4 RP	112	#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
	113	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	114	.info = snd_soc_info_bool_ext, \
	115	.get = xhandler_get, .put = xhandler_put, \
	116	.private_value = xdata }
	117	#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
	118	{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
	119	.info = snd_soc_info_enum_ext, \
	120	.get = xhandler_get, .put = xhandler_put, \
	121	.private_value = (unsigned long)&xenum }
	122
0be9898a MB	123	/*
	124	* Bias levels
	125	*
	126	* @ON: Bias is fully on for audio playback and capture operations.
	127	* @PREPARE: Prepare for audio operations. Called before DAPM switching for
	128	* stream start and stop operations.
	129	* @STANDBY: Low power standby state when no playback/capture operations are
	130	* in progress. NOTE: The transition time between STANDBY and ON
	131	* should be as fast as possible and no longer than 10ms.
	132	* @OFF: Power Off. No restrictions on transition times.
	133	*/
	134	enum snd_soc_bias_level {
	135	SND_SOC_BIAS_ON,
	136	SND_SOC_BIAS_PREPARE,
	137	SND_SOC_BIAS_STANDBY,
	138	SND_SOC_BIAS_OFF,
	139	};
	140
808db4a4 RP	141	/*
	142	* Digital Audio Interface (DAI) types
	143	*/
	144	#define SND_SOC_DAI_AC97 0x1
	145	#define SND_SOC_DAI_I2S 0x2
	146	#define SND_SOC_DAI_PCM 0x4
a68660e0	147	#define SND_SOC_DAI_AC97_BUS 0x8 /* for custom i.e. non ac97_codec.c */
808db4a4 RP	148
	149	/*
	150	* DAI hardware audio formats
	151	*/
1c433fbd GG	152	#define SND_SOC_DAIFMT_I2S 0 /* I2S mode */
	153	#define SND_SOC_DAIFMT_RIGHT_J 1 /* Right justified mode */
	154	#define SND_SOC_DAIFMT_LEFT_J 2 /* Left Justified mode */
	155	#define SND_SOC_DAIFMT_DSP_A 3 /* L data msb after FRM or LRC */
	156	#define SND_SOC_DAIFMT_DSP_B 4 /* L data msb during FRM or LRC */
	157	#define SND_SOC_DAIFMT_AC97 5 /* AC97 */
	158
	159	#define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J
	160	#define SND_SOC_DAIFMT_LSB SND_SOC_DAIFMT_RIGHT_J
	161
	162	/*
	163	* DAI Gating
	164	*/
	165	#define SND_SOC_DAIFMT_CONT (0 << 4) /* continuous clock */
	166	#define SND_SOC_DAIFMT_GATED (1 << 4) /* clock is gated when not Tx/Rx */
808db4a4	167
a7a4ac86 PZ	168	/*
	169	* DAI Sync
	170	* Synchronous LR (Left Right) clocks and Frame signals.
	171	*/
	172	#define SND_SOC_DAIFMT_SYNC (0 << 5) /* Tx FRM = Rx FRM */
	173	#define SND_SOC_DAIFMT_ASYNC (1 << 5) /* Tx FRM ~ Rx FRM */
	174
	175	/*
	176	* TDM
	177	*/
	178	#define SND_SOC_DAIFMT_TDM (1 << 6)
	179
808db4a4 RP	180	/*
	181	* DAI hardware signal inversions
	182	*/
a7a4ac86	183	#define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bclk + frm */
1c433fbd GG	184	#define SND_SOC_DAIFMT_NB_IF (1 << 8) /* normal bclk + inv frm */
	185	#define SND_SOC_DAIFMT_IB_NF (2 << 8) /* invert bclk + nor frm */
	186	#define SND_SOC_DAIFMT_IB_IF (3 << 8) /* invert bclk + frm */
808db4a4 RP	187
	188	/*
	189	* DAI hardware clock masters
	190	* This is wrt the codec, the inverse is true for the interface
	191	* i.e. if the codec is clk and frm master then the interface is
	192	* clk and frame slave.
	193	*/
1c433fbd GG	194	#define SND_SOC_DAIFMT_CBM_CFM (0 << 12) /* codec clk & frm master */
	195	#define SND_SOC_DAIFMT_CBS_CFM (1 << 12) /* codec clk slave & frm master */
	196	#define SND_SOC_DAIFMT_CBM_CFS (2 << 12) /* codec clk master & frame slave */
	197	#define SND_SOC_DAIFMT_CBS_CFS (3 << 12) /* codec clk & frm slave */
808db4a4	198
1c433fbd GG	199	#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f
1c433fbd GG	200	#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0
808db4a4	201	#define SND_SOC_DAIFMT_INV_MASK 0x0f00
1c433fbd	202	#define SND_SOC_DAIFMT_MASTER_MASK 0xf000
808db4a4	203
808db4a4 RP	204
808db4a4 RP	205	/*
1c433fbd	206	* Master Clock Directions
808db4a4	207	*/
1c433fbd GG	208	#define SND_SOC_CLOCK_IN 0
1c433fbd GG	209	#define SND_SOC_CLOCK_OUT 1
808db4a4 RP	210
	211	/*
	212	* AC97 codec ID's bitmask
	213	*/
	214	#define SND_SOC_DAI_AC97_ID0 (1 << 0)
	215	#define SND_SOC_DAI_AC97_ID1 (1 << 1)
	216	#define SND_SOC_DAI_AC97_ID2 (1 << 2)
	217	#define SND_SOC_DAI_AC97_ID3 (1 << 3)
	218
	219	struct snd_soc_device;
	220	struct snd_soc_pcm_stream;
	221	struct snd_soc_ops;
	222	struct snd_soc_dai_mode;
	223	struct snd_soc_pcm_runtime;
	224	struct snd_soc_codec_dai;
	225	struct snd_soc_cpu_dai;
	226	struct snd_soc_codec;
	227	struct snd_soc_machine_config;
	228	struct soc_enum;
	229	struct snd_soc_ac97_ops;
	230	struct snd_soc_clock_info;
	231
	232	typedef int (hw_write_t)(void ,const char* ,int);
	233	typedef int (hw_read_t)(void ,char* ,int);
	234
	235	extern struct snd_ac97_bus_ops soc_ac97_ops;
	236
	237	/* pcm <-> DAI connect */
	238	void snd_soc_free_pcms(struct snd_soc_device *socdev);
	239	int snd_soc_new_pcms(struct snd_soc_device socdev, int idx, const char xid);
	240	int snd_soc_register_card(struct snd_soc_device *socdev);
	241
	242	/* set runtime hw params */
	243	int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
	244	const struct snd_pcm_hardware *hw);
808db4a4 RP	245
	246	/* codec IO */
	247	#define snd_soc_read(codec, reg) codec->read(codec, reg)
	248	#define snd_soc_write(codec, reg, value) codec->write(codec, reg, value)
	249
	250	/* codec register bit access */
	251	int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
	252	unsigned short mask, unsigned short value);
	253	int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
	254	unsigned short mask, unsigned short value);
	255
	256	int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
	257	struct snd_ac97_bus_ops *ops, int num);
	258	void snd_soc_free_ac97_codec(struct snd_soc_codec *codec);
	259
	260	/*
	261	*Controls
	262	*/
	263	struct snd_kcontrol snd_soc_cnew(const struct snd_kcontrol_new _template,
	264	void data, char long_name);
	265	int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
	266	struct snd_ctl_elem_info *uinfo);
	267	int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol,
	268	struct snd_ctl_elem_info *uinfo);
	269	int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
	270	struct snd_ctl_elem_value *ucontrol);
	271	int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
	272	struct snd_ctl_elem_value *ucontrol);
	273	int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
	274	struct snd_ctl_elem_info *uinfo);
	275	int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol,
	276	struct snd_ctl_elem_info *uinfo);
392abe9c	277	#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info
808db4a4 RP	278	int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
	279	struct snd_ctl_elem_value *ucontrol);
	280	int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
	281	struct snd_ctl_elem_value *ucontrol);
	282	int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol,
	283	struct snd_ctl_elem_info *uinfo);
	284	int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol,
	285	struct snd_ctl_elem_value *ucontrol);
	286	int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol,
	287	struct snd_ctl_elem_value *ucontrol);
e13ac2e9 MB	288	int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol,
	289	struct snd_ctl_elem_info *uinfo);
	290	int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
	291	struct snd_ctl_elem_value *ucontrol);
	292	int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
	293	struct snd_ctl_elem_value *ucontrol);
808db4a4 RP	294
	295	/* SoC PCM stream information */
	296	struct snd_soc_pcm_stream {
	297	char *stream_name;
1c433fbd GG	298	u64 formats; /* SNDRV_PCM_FMTBIT_* */
1c433fbd GG	299	unsigned int rates; /* SNDRV_PCM_RATE_* */
808db4a4 RP	300	unsigned int rate_min; /* min rate */
	301	unsigned int rate_max; /* max rate */
	302	unsigned int channels_min; /* min channels */
	303	unsigned int channels_max; /* max channels */
	304	unsigned int active:1; /* stream is in use */
	305	};
	306
	307	/* SoC audio ops */
	308	struct snd_soc_ops {
	309	int (startup)(struct snd_pcm_substream );
	310	void (shutdown)(struct snd_pcm_substream );
	311	int (hw_params)(struct snd_pcm_substream , struct snd_pcm_hw_params *);
	312	int (hw_free)(struct snd_pcm_substream );
	313	int (prepare)(struct snd_pcm_substream );
	314	int (trigger)(struct snd_pcm_substream , int);
	315	};
	316
1ef6ab75 MB	317	/* ASoC DAI ops */
	318	struct snd_soc_dai_ops {
	319	/* DAI clocking configuration */
1c433fbd GG	320	int (set_sysclk)(struct snd_soc_codec_dai codec_dai,
	321	int clk_id, unsigned int freq, int dir);
	322	int (set_pll)(struct snd_soc_codec_dai codec_dai,
	323	int pll_id, unsigned int freq_in, unsigned int freq_out);
	324	int (set_clkdiv)(struct snd_soc_codec_dai codec_dai,
	325	int div_id, int div);
	326
1ef6ab75	327	/* DAI format configuration */
1c433fbd GG	328	int (set_fmt)(struct snd_soc_codec_dai codec_dai,
	329	unsigned int fmt);
	330	int (set_tdm_slot)(struct snd_soc_codec_dai codec_dai,
	331	unsigned int mask, int slots);
	332	int (set_tristate)(struct snd_soc_codec_dai , int tristate);
	333
	334	/* digital mute */
	335	int (digital_mute)(struct snd_soc_codec_dai , int mute);
808db4a4 RP	336	};
808db4a4 RP	337
808db4a4 RP	338	/* SoC Codec DAI */
	339	struct snd_soc_codec_dai {
	340	char *name;
	341	int id;
a68660e0	342	unsigned char type;
808db4a4 RP	343
	344	/* DAI capabilities */
	345	struct snd_soc_pcm_stream playback;
	346	struct snd_soc_pcm_stream capture;
808db4a4 RP	347
808db4a4 RP	348	/* DAI runtime info */
1c433fbd	349	struct snd_soc_codec *codec;
808db4a4 RP	350	unsigned int active;
	351	unsigned char pop_wait:1;
	352
1c433fbd GG	353	/* ops */
1c433fbd GG	354	struct snd_soc_ops ops;
1ef6ab75	355	struct snd_soc_dai_ops dai_ops;
1c433fbd	356
808db4a4 RP	357	/* DAI private data */
	358	void *private_data;
	359	};
	360
	361	/* SoC CPU DAI */
	362	struct snd_soc_cpu_dai {
	363
	364	/* DAI description */
	365	char *name;
	366	unsigned int id;
	367	unsigned char type;
	368
	369	/* DAI callbacks */
bdb92876 MB	370	int (probe)(struct platform_device pdev,
	371	struct snd_soc_cpu_dai *dai);
	372	void (remove)(struct platform_device pdev,
	373	struct snd_soc_cpu_dai *dai);
808db4a4 RP	374	int (suspend)(struct platform_device pdev,
	375	struct snd_soc_cpu_dai *cpu_dai);
	376	int (resume)(struct platform_device pdev,
	377	struct snd_soc_cpu_dai *cpu_dai);
1c433fbd GG	378
	379	/* ops */
	380	struct snd_soc_ops ops;
1ef6ab75	381	struct snd_soc_dai_ops dai_ops;
808db4a4 RP	382
	383	/* DAI capabilities */
	384	struct snd_soc_pcm_stream capture;
	385	struct snd_soc_pcm_stream playback;
808db4a4 RP	386
808db4a4 RP	387	/* DAI runtime info */
808db4a4 RP	388	struct snd_pcm_runtime *runtime;
808db4a4 RP	389	unsigned char active:1;
808db4a4 RP	390	void *dma_data;
	391
	392	/* DAI private data */
	393	void *private_data;
	394	};
	395
	396	/* SoC Audio Codec */
	397	struct snd_soc_codec {
	398	char *name;
	399	struct module *owner;
	400	struct mutex mutex;
	401
	402	/* callbacks */
0be9898a MB	403	int (set_bias_level)(struct snd_soc_codec ,
0be9898a MB	404	enum snd_soc_bias_level level);
808db4a4 RP	405
	406	/* runtime */
	407	struct snd_card *card;
	408	struct snd_ac97 ac97; / for ad-hoc ac97 devices */
	409	unsigned int active;
	410	unsigned int pcm_devs;
	411	void *private_data;
	412
	413	/* codec IO */
	414	void control_data; / codec control (i2c/3wire) data */
	415	unsigned int (read)(struct snd_soc_codec , unsigned int);
	416	int (write)(struct snd_soc_codec , unsigned int, unsigned int);
	417	hw_write_t hw_write;
	418	hw_read_t hw_read;
	419	void *reg_cache;
	420	short reg_cache_size;
	421	short reg_cache_step;
	422
	423	/* dapm */
	424	struct list_head dapm_widgets;
	425	struct list_head dapm_paths;
0be9898a MB	426	enum snd_soc_bias_level bias_level;
0be9898a MB	427	enum snd_soc_bias_level suspend_bias_level;
1321b160	428	struct delayed_work delayed_work;
808db4a4 RP	429
	430	/* codec DAI's */
	431	struct snd_soc_codec_dai *dai;
	432	unsigned int num_dai;
	433	};
	434
	435	/* codec device */
	436	struct snd_soc_codec_device {
	437	int (probe)(struct platform_device pdev);
	438	int (remove)(struct platform_device pdev);
	439	int (suspend)(struct platform_device pdev, pm_message_t state);
	440	int (resume)(struct platform_device pdev);
	441	};
	442
	443	/* SoC platform interface */
	444	struct snd_soc_platform {
	445	char *name;
	446
	447	int (probe)(struct platform_device pdev);
	448	int (remove)(struct platform_device pdev);
	449	int (suspend)(struct platform_device pdev,
	450	struct snd_soc_cpu_dai *cpu_dai);
	451	int (resume)(struct platform_device pdev,
	452	struct snd_soc_cpu_dai *cpu_dai);
	453
	454	/* pcm creation and destruction */
	455	int (pcm_new)(struct snd_card , struct snd_soc_codec_dai *,
	456	struct snd_pcm *);
	457	void (pcm_free)(struct snd_pcm );
	458
	459	/* platform stream ops */
	460	struct snd_pcm_ops *pcm_ops;
	461	};
	462
	463	/* SoC machine DAI configuration, glues a codec and cpu DAI together */
	464	struct snd_soc_dai_link {
	465	char name; / Codec name */
	466	char stream_name; / Stream name */
	467
	468	/* DAI */
	469	struct snd_soc_codec_dai *codec_dai;
	470	struct snd_soc_cpu_dai *cpu_dai;
1c433fbd GG	471
	472	/* machine stream operations */
	473	struct snd_soc_ops *ops;
808db4a4 RP	474
	475	/* codec/machine specific init - e.g. add machine controls */
	476	int (init)(struct snd_soc_codec codec);
4ccab3e7 LG	477
	478	/* DAI pcm */
	479	struct snd_pcm *pcm;
808db4a4 RP	480	};
	481
	482	/* SoC machine */
	483	struct snd_soc_machine {
	484	char *name;
	485
	486	int (probe)(struct platform_device pdev);
	487	int (remove)(struct platform_device pdev);
	488
	489	/* the pre and post PM functions are used to do any PM work before and
	490	* after the codec and DAI's do any PM work. */
	491	int (suspend_pre)(struct platform_device pdev, pm_message_t state);
	492	int (suspend_post)(struct platform_device pdev, pm_message_t state);
	493	int (resume_pre)(struct platform_device pdev);
	494	int (resume_post)(struct platform_device pdev);
	495
0b4d221b	496	/* callbacks */
0be9898a MB	497	int (set_bias_level)(struct snd_soc_machine ,
0be9898a MB	498	enum snd_soc_bias_level level);
0b4d221b	499
808db4a4 RP	500	/* CPU <--> Codec DAI links */
	501	struct snd_soc_dai_link *dai_link;
	502	int num_links;
	503	};
	504
	505	/* SoC Device - the audio subsystem */
	506	struct snd_soc_device {
	507	struct device *dev;
	508	struct snd_soc_machine *machine;
	509	struct snd_soc_platform *platform;
	510	struct snd_soc_codec *codec;
	511	struct snd_soc_codec_device *codec_dev;
4484bb2e	512	struct delayed_work delayed_work;
6ed25978	513	struct work_struct deferred_resume_work;
808db4a4 RP	514	void *codec_data;
	515	};
	516
	517	/* runtime channel data */
	518	struct snd_soc_pcm_runtime {
1c433fbd	519	struct snd_soc_dai_link *dai;
808db4a4 RP	520	struct snd_soc_device *socdev;
	521	};
	522
	523	/* enumerated kcontrol */
	524	struct soc_enum {
	525	unsigned short reg;
	526	unsigned short reg2;
	527	unsigned char shift_l;
	528	unsigned char shift_r;
	529	unsigned int mask;
	530	const char **texts;
	531	void *dapm;
	532	};
	533
808db4a4	534	#endif