Merge remote-tracking branch 'asoc/topic/blackfin' into for-3.7
[linux-2.6-block.git] / include / sound / soc.h
CommitLineData
808db4a4
RP
1/*
2 * linux/sound/soc.h -- ALSA SoC Layer
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_SND_SOC_H
14#define __LINUX_SND_SOC_H
15
16#include <linux/platform_device.h>
17#include <linux/types.h>
d5021ec9 18#include <linux/notifier.h>
4484bb2e 19#include <linux/workqueue.h>
ec67624d
LCM
20#include <linux/interrupt.h>
21#include <linux/kernel.h>
be3ea3b9 22#include <linux/regmap.h>
808db4a4
RP
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/control.h>
26#include <sound/ac97_codec.h>
27
808db4a4
RP
28/*
29 * Convenience kcontrol builders
30 */
460acbec 31#define SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, xmax, xinvert) \
4eaa9819 32 ((unsigned long)&(struct soc_mixer_control) \
30d86ba4
PU
33 {.reg = xreg, .rreg = xreg, .shift = shift_left, \
34 .rshift = shift_right, .max = xmax, .platform_max = xmax, \
35 .invert = xinvert})
460acbec
PU
36#define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) \
37 SOC_DOUBLE_VALUE(xreg, xshift, xshift, xmax, xinvert)
4eaa9819
JS
38#define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
39 ((unsigned long)&(struct soc_mixer_control) \
d11bb4a9 40 {.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
cdffa775
PU
41#define SOC_DOUBLE_R_VALUE(xlreg, xrreg, xshift, xmax, xinvert) \
42 ((unsigned long)&(struct soc_mixer_control) \
43 {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
44 .max = xmax, .platform_max = xmax, .invert = xinvert})
229e3fdc
MB
45#define SOC_DOUBLE_R_RANGE_VALUE(xlreg, xrreg, xshift, xmin, xmax, xinvert) \
46 ((unsigned long)&(struct soc_mixer_control) \
47 {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
48 .min = xmin, .max = xmax, .platform_max = xmax, .invert = xinvert})
a7a4ac86 49#define SOC_SINGLE(xname, reg, shift, max, invert) \
808db4a4
RP
50{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
51 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
52 .put = snd_soc_put_volsw, \
a7a4ac86 53 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
6c9d8cf6
AT
54#define SOC_SINGLE_RANGE(xname, xreg, xshift, xmin, xmax, xinvert) \
55{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
56 .info = snd_soc_info_volsw_range, .get = snd_soc_get_volsw_range, \
57 .put = snd_soc_put_volsw_range, \
58 .private_value = (unsigned long)&(struct soc_mixer_control) \
59 {.reg = xreg, .shift = xshift, .min = xmin,\
60 .max = xmax, .platform_max = xmax, .invert = xinvert} }
a7a4ac86
PZ
61#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
62{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
63 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
64 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
65 .tlv.p = (tlv_array), \
66 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
67 .put = snd_soc_put_volsw, \
68 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
1d99f243
BA
69#define SOC_SINGLE_SX_TLV(xname, xreg, xshift, xmin, xmax, tlv_array) \
70{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
71 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
72 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
73 .tlv.p = (tlv_array),\
74 .info = snd_soc_info_volsw, \
75 .get = snd_soc_get_volsw_sx,\
76 .put = snd_soc_put_volsw_sx, \
77 .private_value = (unsigned long)&(struct soc_mixer_control) \
78 {.reg = xreg, .rreg = xreg, \
79 .shift = xshift, .rshift = xshift, \
80 .max = xmax, .min = xmin} }
6c9d8cf6
AT
81#define SOC_SINGLE_RANGE_TLV(xname, xreg, xshift, xmin, xmax, xinvert, tlv_array) \
82{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
83 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
84 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
85 .tlv.p = (tlv_array), \
86 .info = snd_soc_info_volsw_range, \
87 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
88 .private_value = (unsigned long)&(struct soc_mixer_control) \
89 {.reg = xreg, .shift = xshift, .min = xmin,\
90 .max = xmax, .platform_max = xmax, .invert = xinvert} }
460acbec 91#define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
808db4a4
RP
92{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
93 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
94 .put = snd_soc_put_volsw, \
460acbec
PU
95 .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
96 max, invert) }
4eaa9819 97#define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \
808db4a4 98{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
e8f5a103 99 .info = snd_soc_info_volsw, \
974815ba 100 .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
cdffa775
PU
101 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
102 xmax, xinvert) }
229e3fdc
MB
103#define SOC_DOUBLE_R_RANGE(xname, reg_left, reg_right, xshift, xmin, \
104 xmax, xinvert) \
105{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
106 .info = snd_soc_info_volsw_range, \
107 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
108 .private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
109 xshift, xmin, xmax, xinvert) }
460acbec 110#define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \
a7a4ac86
PZ
111{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
112 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
113 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
114 .tlv.p = (tlv_array), \
115 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
116 .put = snd_soc_put_volsw, \
460acbec
PU
117 .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
118 max, invert) }
4eaa9819 119#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
a7a4ac86
PZ
120{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
121 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
122 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
123 .tlv.p = (tlv_array), \
e8f5a103 124 .info = snd_soc_info_volsw, \
974815ba 125 .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
cdffa775
PU
126 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
127 xmax, xinvert) }
229e3fdc
MB
128#define SOC_DOUBLE_R_RANGE_TLV(xname, reg_left, reg_right, xshift, xmin, \
129 xmax, xinvert, tlv_array) \
130{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
131 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
132 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
133 .tlv.p = (tlv_array), \
134 .info = snd_soc_info_volsw_range, \
135 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
136 .private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
137 xshift, xmin, xmax, xinvert) }
1d99f243
BA
138#define SOC_DOUBLE_R_SX_TLV(xname, xreg, xrreg, xshift, xmin, xmax, tlv_array) \
139{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
140 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
141 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
142 .tlv.p = (tlv_array), \
143 .info = snd_soc_info_volsw, \
144 .get = snd_soc_get_volsw_sx, \
145 .put = snd_soc_put_volsw_sx, \
146 .private_value = (unsigned long)&(struct soc_mixer_control) \
147 {.reg = xreg, .rreg = xrreg, \
148 .shift = xshift, .rshift = xshift, \
149 .max = xmax, .min = xmin} }
4eaa9819 150#define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
e13ac2e9
MB
151{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
152 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
153 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
154 .tlv.p = (tlv_array), \
155 .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \
156 .put = snd_soc_put_volsw_s8, \
4eaa9819 157 .private_value = (unsigned long)&(struct soc_mixer_control) \
d11bb4a9
PU
158 {.reg = xreg, .min = xmin, .max = xmax, \
159 .platform_max = xmax} }
f8ba0b7b 160#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmax, xtexts) \
808db4a4 161{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
f8ba0b7b
JS
162 .max = xmax, .texts = xtexts }
163#define SOC_ENUM_SINGLE(xreg, xshift, xmax, xtexts) \
164 SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmax, xtexts)
165#define SOC_ENUM_SINGLE_EXT(xmax, xtexts) \
166{ .max = xmax, .texts = xtexts }
2e72f8e3
PU
167#define SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xmax, xtexts, xvalues) \
168{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
169 .mask = xmask, .max = xmax, .texts = xtexts, .values = xvalues}
170#define SOC_VALUE_ENUM_SINGLE(xreg, xshift, xmask, xmax, xtexts, xvalues) \
171 SOC_VALUE_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xmax, xtexts, xvalues)
808db4a4
RP
172#define SOC_ENUM(xname, xenum) \
173{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
174 .info = snd_soc_info_enum_double, \
175 .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
176 .private_value = (unsigned long)&xenum }
2e72f8e3
PU
177#define SOC_VALUE_ENUM(xname, xenum) \
178{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
74155556 179 .info = snd_soc_info_enum_double, \
2e72f8e3
PU
180 .get = snd_soc_get_value_enum_double, \
181 .put = snd_soc_put_value_enum_double, \
182 .private_value = (unsigned long)&xenum }
f8ba0b7b 183#define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
808db4a4
RP
184 xhandler_get, xhandler_put) \
185{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1c433fbd 186 .info = snd_soc_info_volsw, \
808db4a4 187 .get = xhandler_get, .put = xhandler_put, \
f8ba0b7b 188 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
460acbec 189#define SOC_DOUBLE_EXT(xname, reg, shift_left, shift_right, max, invert,\
7629ad24
DM
190 xhandler_get, xhandler_put) \
191{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
192 .info = snd_soc_info_volsw, \
193 .get = xhandler_get, .put = xhandler_put, \
460acbec
PU
194 .private_value = \
195 SOC_DOUBLE_VALUE(reg, shift_left, shift_right, max, invert) }
f8ba0b7b 196#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\
10144c09
MM
197 xhandler_get, xhandler_put, tlv_array) \
198{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
199 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
200 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
201 .tlv.p = (tlv_array), \
202 .info = snd_soc_info_volsw, \
203 .get = xhandler_get, .put = xhandler_put, \
f8ba0b7b 204 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
d0af93db
JS
205#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
206 xhandler_get, xhandler_put, tlv_array) \
207{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
208 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
209 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
210 .tlv.p = (tlv_array), \
211 .info = snd_soc_info_volsw, \
212 .get = xhandler_get, .put = xhandler_put, \
460acbec
PU
213 .private_value = SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, \
214 xmax, xinvert) }
3ce91d5a
JS
215#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\
216 xhandler_get, xhandler_put, tlv_array) \
217{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
218 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
219 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
220 .tlv.p = (tlv_array), \
e8f5a103 221 .info = snd_soc_info_volsw, \
3ce91d5a 222 .get = xhandler_get, .put = xhandler_put, \
cdffa775
PU
223 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
224 xmax, xinvert) }
808db4a4
RP
225#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
226{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
227 .info = snd_soc_info_bool_ext, \
228 .get = xhandler_get, .put = xhandler_put, \
229 .private_value = xdata }
230#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
231{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
232 .info = snd_soc_info_enum_ext, \
233 .get = xhandler_get, .put = xhandler_put, \
234 .private_value = (unsigned long)&xenum }
235
71d08516
MB
236#define SND_SOC_BYTES(xname, xbase, xregs) \
237{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
238 .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \
239 .put = snd_soc_bytes_put, .private_value = \
240 ((unsigned long)&(struct soc_bytes) \
241 {.base = xbase, .num_regs = xregs }) }
b6f4bb38 242
f831b055
MB
243#define SND_SOC_BYTES_MASK(xname, xbase, xregs, xmask) \
244{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
245 .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \
246 .put = snd_soc_bytes_put, .private_value = \
247 ((unsigned long)&(struct soc_bytes) \
248 {.base = xbase, .num_regs = xregs, \
249 .mask = xmask }) }
250
4183eed2
KK
251#define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \
252 xmin, xmax, xinvert) \
253{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
254 .info = snd_soc_info_xr_sx, .get = snd_soc_get_xr_sx, \
255 .put = snd_soc_put_xr_sx, \
256 .private_value = (unsigned long)&(struct soc_mreg_control) \
257 {.regbase = xregbase, .regcount = xregcount, .nbits = xnbits, \
258 .invert = xinvert, .min = xmin, .max = xmax} }
259
dd7b10b3
KK
260#define SOC_SINGLE_STROBE(xname, xreg, xshift, xinvert) \
261 SOC_SINGLE_EXT(xname, xreg, xshift, 1, xinvert, \
262 snd_soc_get_strobe, snd_soc_put_strobe)
263
6c2fb6a8
GL
264/*
265 * Simplified versions of above macros, declaring a struct and calculating
266 * ARRAY_SIZE internally
267 */
268#define SOC_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xtexts) \
269 struct soc_enum name = SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, \
270 ARRAY_SIZE(xtexts), xtexts)
271#define SOC_ENUM_SINGLE_DECL(name, xreg, xshift, xtexts) \
272 SOC_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xtexts)
273#define SOC_ENUM_SINGLE_EXT_DECL(name, xtexts) \
274 struct soc_enum name = SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtexts), xtexts)
275#define SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xmask, xtexts, xvalues) \
276 struct soc_enum name = SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, \
277 ARRAY_SIZE(xtexts), xtexts, xvalues)
278#define SOC_VALUE_ENUM_SINGLE_DECL(name, xreg, xshift, xmask, xtexts, xvalues) \
279 SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xmask, xtexts, xvalues)
280
0168bf0d
LG
281/*
282 * Component probe and remove ordering levels for components with runtime
283 * dependencies.
284 */
285#define SND_SOC_COMP_ORDER_FIRST -2
286#define SND_SOC_COMP_ORDER_EARLY -1
287#define SND_SOC_COMP_ORDER_NORMAL 0
288#define SND_SOC_COMP_ORDER_LATE 1
289#define SND_SOC_COMP_ORDER_LAST 2
290
0be9898a
MB
291/*
292 * Bias levels
293 *
294 * @ON: Bias is fully on for audio playback and capture operations.
295 * @PREPARE: Prepare for audio operations. Called before DAPM switching for
296 * stream start and stop operations.
297 * @STANDBY: Low power standby state when no playback/capture operations are
298 * in progress. NOTE: The transition time between STANDBY and ON
299 * should be as fast as possible and no longer than 10ms.
300 * @OFF: Power Off. No restrictions on transition times.
301 */
302enum snd_soc_bias_level {
56fba41f
MB
303 SND_SOC_BIAS_OFF = 0,
304 SND_SOC_BIAS_STANDBY = 1,
305 SND_SOC_BIAS_PREPARE = 2,
306 SND_SOC_BIAS_ON = 3,
0be9898a
MB
307};
308
5a504963 309struct device_node;
8a2cd618
MB
310struct snd_jack;
311struct snd_soc_card;
808db4a4
RP
312struct snd_soc_pcm_stream;
313struct snd_soc_ops;
808db4a4 314struct snd_soc_pcm_runtime;
3c4b266f 315struct snd_soc_dai;
f0fba2ad 316struct snd_soc_dai_driver;
12a48a8c 317struct snd_soc_platform;
d273ebe7 318struct snd_soc_dai_link;
f0fba2ad 319struct snd_soc_platform_driver;
808db4a4 320struct snd_soc_codec;
f0fba2ad 321struct snd_soc_codec_driver;
808db4a4 322struct soc_enum;
8a2cd618 323struct snd_soc_jack;
fa9879ed 324struct snd_soc_jack_zone;
8a2cd618 325struct snd_soc_jack_pin;
7a30a3db 326struct snd_soc_cache_ops;
ce6120cc 327#include <sound/soc-dapm.h>
01d7584c 328#include <sound/soc-dpcm.h>
f0fba2ad 329
ec67624d
LCM
330#ifdef CONFIG_GPIOLIB
331struct snd_soc_jack_gpio;
332#endif
808db4a4
RP
333
334typedef int (*hw_write_t)(void *,const char* ,int);
808db4a4
RP
335
336extern struct snd_ac97_bus_ops soc_ac97_ops;
337
7084a42b 338enum snd_soc_control_type {
e9c03905 339 SND_SOC_I2C = 1,
7084a42b 340 SND_SOC_SPI,
0671da18 341 SND_SOC_REGMAP,
7084a42b
MB
342};
343
7a30a3db 344enum snd_soc_compress_type {
119bd789 345 SND_SOC_FLAT_COMPRESSION = 1,
7a30a3db
DP
346};
347
b8c0dab9
LG
348enum snd_soc_pcm_subclass {
349 SND_SOC_PCM_CLASS_PCM = 0,
350 SND_SOC_PCM_CLASS_BE = 1,
351};
352
01b9d99a 353enum snd_soc_card_subclass {
6874a918
LG
354 SND_SOC_CARD_CLASS_INIT = 0,
355 SND_SOC_CARD_CLASS_RUNTIME = 1,
01b9d99a
LG
356};
357
ec4ee52a 358int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
da1c6ea6 359 int source, unsigned int freq, int dir);
ec4ee52a
MB
360int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
361 unsigned int freq_in, unsigned int freq_out);
362
70a7ca34
VK
363int snd_soc_register_card(struct snd_soc_card *card);
364int snd_soc_unregister_card(struct snd_soc_card *card);
6f8ab4ac
MB
365int snd_soc_suspend(struct device *dev);
366int snd_soc_resume(struct device *dev);
367int snd_soc_poweroff(struct device *dev);
f0fba2ad
LG
368int snd_soc_register_platform(struct device *dev,
369 struct snd_soc_platform_driver *platform_drv);
370void snd_soc_unregister_platform(struct device *dev);
371int snd_soc_register_codec(struct device *dev,
001ae4c0 372 const struct snd_soc_codec_driver *codec_drv,
f0fba2ad
LG
373 struct snd_soc_dai_driver *dai_drv, int num_dai);
374void snd_soc_unregister_codec(struct device *dev);
181e055e
MB
375int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
376 unsigned int reg);
239c9706
DP
377int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
378 unsigned int reg);
379int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
380 unsigned int reg);
17a52fd6 381int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
7084a42b
MB
382 int addr_bits, int data_bits,
383 enum snd_soc_control_type control);
7a30a3db
DP
384int snd_soc_cache_sync(struct snd_soc_codec *codec);
385int snd_soc_cache_init(struct snd_soc_codec *codec);
386int snd_soc_cache_exit(struct snd_soc_codec *codec);
387int snd_soc_cache_write(struct snd_soc_codec *codec,
388 unsigned int reg, unsigned int value);
389int snd_soc_cache_read(struct snd_soc_codec *codec,
390 unsigned int reg, unsigned int *value);
066d16c3
DP
391int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
392 unsigned int reg);
393int snd_soc_default_readable_register(struct snd_soc_codec *codec,
394 unsigned int reg);
8020454c
DP
395int snd_soc_default_writable_register(struct snd_soc_codec *codec,
396 unsigned int reg);
f1442bc1
LG
397int snd_soc_platform_read(struct snd_soc_platform *platform,
398 unsigned int reg);
399int snd_soc_platform_write(struct snd_soc_platform *platform,
400 unsigned int reg, unsigned int val);
354a2142 401int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num);
12a48a8c 402
47c88fff
LG
403struct snd_pcm_substream *snd_soc_get_dai_substream(struct snd_soc_card *card,
404 const char *dai_link, int stream);
405struct snd_soc_pcm_runtime *snd_soc_get_pcm_runtime(struct snd_soc_card *card,
406 const char *dai_link);
407
7aae816d
MB
408/* Utility functions to get clock rates from various things */
409int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
410int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params);
c0fa59df 411int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots);
7aae816d
MB
412int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
413
808db4a4
RP
414/* set runtime hw params */
415int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
416 const struct snd_pcm_hardware *hw);
808db4a4 417
07bf84aa
LG
418int snd_soc_platform_trigger(struct snd_pcm_substream *substream,
419 int cmd, struct snd_soc_platform *platform);
420
8a2cd618 421/* Jack reporting */
f0fba2ad 422int snd_soc_jack_new(struct snd_soc_codec *codec, const char *id, int type,
8a2cd618
MB
423 struct snd_soc_jack *jack);
424void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
425int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
426 struct snd_soc_jack_pin *pins);
d5021ec9
MB
427void snd_soc_jack_notifier_register(struct snd_soc_jack *jack,
428 struct notifier_block *nb);
429void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack,
430 struct notifier_block *nb);
fa9879ed
VK
431int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
432 struct snd_soc_jack_zone *zones);
433int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
ec67624d
LCM
434#ifdef CONFIG_GPIOLIB
435int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
436 struct snd_soc_jack_gpio *gpios);
437void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
438 struct snd_soc_jack_gpio *gpios);
439#endif
8a2cd618 440
808db4a4
RP
441/* codec register bit access */
442int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 443 unsigned int mask, unsigned int value);
dd1b3d53
MB
444int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
445 unsigned short reg, unsigned int mask,
446 unsigned int value);
808db4a4 447int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 448 unsigned int mask, unsigned int value);
808db4a4
RP
449
450int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
451 struct snd_ac97_bus_ops *ops, int num);
452void snd_soc_free_ac97_codec(struct snd_soc_codec *codec);
453
454/*
455 *Controls
456 */
457struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
3056557f 458 void *data, const char *long_name,
efb7ac3f 459 const char *prefix);
022658be 460int snd_soc_add_codec_controls(struct snd_soc_codec *codec,
3e8e1952 461 const struct snd_kcontrol_new *controls, int num_controls);
a491a5c8
LG
462int snd_soc_add_platform_controls(struct snd_soc_platform *platform,
463 const struct snd_kcontrol_new *controls, int num_controls);
022658be
LG
464int snd_soc_add_card_controls(struct snd_soc_card *soc_card,
465 const struct snd_kcontrol_new *controls, int num_controls);
466int snd_soc_add_dai_controls(struct snd_soc_dai *dai,
467 const struct snd_kcontrol_new *controls, int num_controls);
808db4a4
RP
468int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
469 struct snd_ctl_elem_info *uinfo);
470int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol,
471 struct snd_ctl_elem_info *uinfo);
472int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
473 struct snd_ctl_elem_value *ucontrol);
474int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
475 struct snd_ctl_elem_value *ucontrol);
2e72f8e3
PU
476int snd_soc_get_value_enum_double(struct snd_kcontrol *kcontrol,
477 struct snd_ctl_elem_value *ucontrol);
478int snd_soc_put_value_enum_double(struct snd_kcontrol *kcontrol,
479 struct snd_ctl_elem_value *ucontrol);
808db4a4
RP
480int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
481 struct snd_ctl_elem_info *uinfo);
482int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol,
483 struct snd_ctl_elem_info *uinfo);
392abe9c 484#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info
808db4a4
RP
485int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
486 struct snd_ctl_elem_value *ucontrol);
487int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
488 struct snd_ctl_elem_value *ucontrol);
a92f1394
PU
489#define snd_soc_get_volsw_2r snd_soc_get_volsw
490#define snd_soc_put_volsw_2r snd_soc_put_volsw
1d99f243
BA
491int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol,
492 struct snd_ctl_elem_value *ucontrol);
493int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
494 struct snd_ctl_elem_value *ucontrol);
e13ac2e9
MB
495int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol,
496 struct snd_ctl_elem_info *uinfo);
497int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
498 struct snd_ctl_elem_value *ucontrol);
499int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
500 struct snd_ctl_elem_value *ucontrol);
6c9d8cf6
AT
501int snd_soc_info_volsw_range(struct snd_kcontrol *kcontrol,
502 struct snd_ctl_elem_info *uinfo);
503int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
504 struct snd_ctl_elem_value *ucontrol);
505int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol,
506 struct snd_ctl_elem_value *ucontrol);
637d3847
PU
507int snd_soc_limit_volume(struct snd_soc_codec *codec,
508 const char *name, int max);
71d08516
MB
509int snd_soc_bytes_info(struct snd_kcontrol *kcontrol,
510 struct snd_ctl_elem_info *uinfo);
511int snd_soc_bytes_get(struct snd_kcontrol *kcontrol,
512 struct snd_ctl_elem_value *ucontrol);
513int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
514 struct snd_ctl_elem_value *ucontrol);
4183eed2
KK
515int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_info *uinfo);
517int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_value *ucontrol);
519int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol,
520 struct snd_ctl_elem_value *ucontrol);
dd7b10b3
KK
521int snd_soc_get_strobe(struct snd_kcontrol *kcontrol,
522 struct snd_ctl_elem_value *ucontrol);
523int snd_soc_put_strobe(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_value *ucontrol);
808db4a4 525
066d16c3
DP
526/**
527 * struct snd_soc_reg_access - Describes whether a given register is
528 * readable, writable or volatile.
529 *
530 * @reg: the register number
531 * @read: whether this register is readable
532 * @write: whether this register is writable
533 * @vol: whether this register is volatile
534 */
535struct snd_soc_reg_access {
536 u16 reg;
537 u16 read;
538 u16 write;
539 u16 vol;
540};
541
8a2cd618
MB
542/**
543 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
544 *
545 * @pin: name of the pin to update
546 * @mask: bits to check for in reported jack status
547 * @invert: if non-zero then pin is enabled when status is not reported
548 */
549struct snd_soc_jack_pin {
550 struct list_head list;
551 const char *pin;
552 int mask;
553 bool invert;
554};
555
fa9879ed
VK
556/**
557 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
558 *
559 * @min_mv: start voltage in mv
560 * @max_mv: end voltage in mv
561 * @jack_type: type of jack that is expected for this voltage
562 * @debounce_time: debounce_time for jack, codec driver should wait for this
563 * duration before reading the adc for voltages
564 * @:list: list container
565 */
566struct snd_soc_jack_zone {
567 unsigned int min_mv;
568 unsigned int max_mv;
569 unsigned int jack_type;
570 unsigned int debounce_time;
571 struct list_head list;
572};
573
ec67624d
LCM
574/**
575 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
576 *
577 * @gpio: gpio number
578 * @name: gpio name
579 * @report: value to report when jack detected
580 * @invert: report presence in low state
581 * @debouce_time: debouce time in ms
7887ab3a 582 * @wake: enable as wake source
fadddc87
MB
583 * @jack_status_check: callback function which overrides the detection
584 * to provide more complex checks (eg, reading an
585 * ADC).
ec67624d
LCM
586 */
587#ifdef CONFIG_GPIOLIB
588struct snd_soc_jack_gpio {
589 unsigned int gpio;
590 const char *name;
591 int report;
592 int invert;
593 int debounce_time;
7887ab3a
MB
594 bool wake;
595
ec67624d 596 struct snd_soc_jack *jack;
4c14d78e 597 struct delayed_work work;
c871a053
JS
598
599 int (*jack_status_check)(void);
ec67624d
LCM
600};
601#endif
602
8a2cd618 603struct snd_soc_jack {
2667b4b8 604 struct mutex mutex;
8a2cd618 605 struct snd_jack *jack;
f0fba2ad 606 struct snd_soc_codec *codec;
8a2cd618
MB
607 struct list_head pins;
608 int status;
d5021ec9 609 struct blocking_notifier_head notifier;
fa9879ed 610 struct list_head jack_zones;
8a2cd618
MB
611};
612
808db4a4
RP
613/* SoC PCM stream information */
614struct snd_soc_pcm_stream {
f0fba2ad 615 const char *stream_name;
1c433fbd
GG
616 u64 formats; /* SNDRV_PCM_FMTBIT_* */
617 unsigned int rates; /* SNDRV_PCM_RATE_* */
808db4a4
RP
618 unsigned int rate_min; /* min rate */
619 unsigned int rate_max; /* max rate */
620 unsigned int channels_min; /* min channels */
621 unsigned int channels_max; /* max channels */
58ba9b25 622 unsigned int sig_bits; /* number of bits of content */
808db4a4
RP
623};
624
625/* SoC audio ops */
626struct snd_soc_ops {
627 int (*startup)(struct snd_pcm_substream *);
628 void (*shutdown)(struct snd_pcm_substream *);
629 int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
630 int (*hw_free)(struct snd_pcm_substream *);
631 int (*prepare)(struct snd_pcm_substream *);
632 int (*trigger)(struct snd_pcm_substream *, int);
633};
634
7a30a3db
DP
635/* SoC cache ops */
636struct snd_soc_cache_ops {
0d735eaa 637 const char *name;
7a30a3db
DP
638 enum snd_soc_compress_type id;
639 int (*init)(struct snd_soc_codec *codec);
640 int (*exit)(struct snd_soc_codec *codec);
641 int (*read)(struct snd_soc_codec *codec, unsigned int reg,
642 unsigned int *value);
643 int (*write)(struct snd_soc_codec *codec, unsigned int reg,
644 unsigned int value);
645 int (*sync)(struct snd_soc_codec *codec);
646};
647
f0fba2ad 648/* SoC Audio Codec device */
808db4a4 649struct snd_soc_codec {
f0fba2ad 650 const char *name;
ead9b919 651 const char *name_prefix;
f0fba2ad 652 int id;
0d0cf00a 653 struct device *dev;
001ae4c0 654 const struct snd_soc_codec_driver *driver;
0d0cf00a 655
f0fba2ad
LG
656 struct mutex mutex;
657 struct snd_soc_card *card;
0d0cf00a 658 struct list_head list;
f0fba2ad
LG
659 struct list_head card_list;
660 int num_dai;
23bbce34 661 enum snd_soc_compress_type compress_type;
aea170a0 662 size_t reg_size; /* reg_cache_size * reg_word_size */
1500b7b5
DP
663 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
664 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 665 int (*writable_register)(struct snd_soc_codec *, unsigned int);
808db4a4
RP
666
667 /* runtime */
808db4a4
RP
668 struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */
669 unsigned int active;
dad8e7ae 670 unsigned int cache_bypass:1; /* Suppress access to the cache */
f0fba2ad
LG
671 unsigned int suspended:1; /* Codec is in suspend PM state */
672 unsigned int probed:1; /* Codec has been probed */
673 unsigned int ac97_registered:1; /* Codec has been AC97 registered */
0562f788 674 unsigned int ac97_created:1; /* Codec has been created by SoC */
f0fba2ad 675 unsigned int sysfs_registered:1; /* codec has been sysfs registered */
fdf0f54d 676 unsigned int cache_init:1; /* codec cache has been initialized */
8a713da8 677 unsigned int using_regmap:1; /* using regmap access */
aaee8ef1
MB
678 u32 cache_only; /* Suppress writes to hardware */
679 u32 cache_sync; /* Cache needs to be synced to hardware */
808db4a4
RP
680
681 /* codec IO */
682 void *control_data; /* codec control (i2c/3wire) data */
67850a89 683 enum snd_soc_control_type control_type;
808db4a4 684 hw_write_t hw_write;
afa2f106 685 unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int);
c3acec26
MB
686 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
687 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
5fb609d4 688 int (*bulk_write_raw)(struct snd_soc_codec *, unsigned int, const void *, size_t);
808db4a4 689 void *reg_cache;
3335ddca 690 const void *reg_def_copy;
7a30a3db
DP
691 const struct snd_soc_cache_ops *cache_ops;
692 struct mutex cache_rw_mutex;
be3ea3b9 693 int val_bytes;
a96ca338 694
808db4a4 695 /* dapm */
ce6120cc 696 struct snd_soc_dapm_context dapm;
1d69c5c5 697 unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
808db4a4 698
384c89e2 699#ifdef CONFIG_DEBUG_FS
88439ac7 700 struct dentry *debugfs_codec_root;
384c89e2 701 struct dentry *debugfs_reg;
79fb9387 702 struct dentry *debugfs_dapm;
384c89e2 703#endif
808db4a4
RP
704};
705
f0fba2ad
LG
706/* codec driver */
707struct snd_soc_codec_driver {
708
709 /* driver ops */
710 int (*probe)(struct snd_soc_codec *);
711 int (*remove)(struct snd_soc_codec *);
84b315ee 712 int (*suspend)(struct snd_soc_codec *);
f0fba2ad
LG
713 int (*resume)(struct snd_soc_codec *);
714
b7af1daf
MB
715 /* Default control and setup, added after probe() is run */
716 const struct snd_kcontrol_new *controls;
717 int num_controls;
89b95ac0
MB
718 const struct snd_soc_dapm_widget *dapm_widgets;
719 int num_dapm_widgets;
720 const struct snd_soc_dapm_route *dapm_routes;
721 int num_dapm_routes;
722
ec4ee52a
MB
723 /* codec wide operations */
724 int (*set_sysclk)(struct snd_soc_codec *codec,
da1c6ea6 725 int clk_id, int source, unsigned int freq, int dir);
ec4ee52a
MB
726 int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source,
727 unsigned int freq_in, unsigned int freq_out);
728
f0fba2ad
LG
729 /* codec IO */
730 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
731 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
732 int (*display_register)(struct snd_soc_codec *, char *,
733 size_t, unsigned int);
d4754ec9
DP
734 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
735 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 736 int (*writable_register)(struct snd_soc_codec *, unsigned int);
4a8923ba 737 unsigned int reg_cache_size;
f0fba2ad
LG
738 short reg_cache_step;
739 short reg_word_size;
740 const void *reg_cache_default;
066d16c3
DP
741 short reg_access_size;
742 const struct snd_soc_reg_access *reg_access_default;
7a30a3db 743 enum snd_soc_compress_type compress_type;
f0fba2ad
LG
744
745 /* codec bias level */
746 int (*set_bias_level)(struct snd_soc_codec *,
747 enum snd_soc_bias_level level);
33c5f969 748 bool idle_bias_off;
474b62d6
MB
749
750 void (*seq_notifier)(struct snd_soc_dapm_context *,
f85a9e0d 751 enum snd_soc_dapm_type, int);
0168bf0d 752
64a648c2
LG
753 /* codec stream completion event */
754 int (*stream_event)(struct snd_soc_dapm_context *dapm, int event);
755
5124e69e
MB
756 bool ignore_pmdown_time; /* Doesn't benefit from pmdown delay */
757
0168bf0d
LG
758 /* probe ordering - for components with runtime dependencies */
759 int probe_order;
760 int remove_order;
808db4a4
RP
761};
762
763/* SoC platform interface */
f0fba2ad 764struct snd_soc_platform_driver {
808db4a4 765
f0fba2ad
LG
766 int (*probe)(struct snd_soc_platform *);
767 int (*remove)(struct snd_soc_platform *);
768 int (*suspend)(struct snd_soc_dai *dai);
769 int (*resume)(struct snd_soc_dai *dai);
808db4a4
RP
770
771 /* pcm creation and destruction */
552d1ef6 772 int (*pcm_new)(struct snd_soc_pcm_runtime *);
808db4a4
RP
773 void (*pcm_free)(struct snd_pcm *);
774
cb2cf612
LG
775 /* Default control and setup, added after probe() is run */
776 const struct snd_kcontrol_new *controls;
777 int num_controls;
778 const struct snd_soc_dapm_widget *dapm_widgets;
779 int num_dapm_widgets;
780 const struct snd_soc_dapm_route *dapm_routes;
781 int num_dapm_routes;
782
258020d0
PU
783 /*
784 * For platform caused delay reporting.
785 * Optional.
786 */
787 snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
788 struct snd_soc_dai *);
789
808db4a4 790 /* platform stream ops */
f0fba2ad 791 struct snd_pcm_ops *ops;
0168bf0d 792
64a648c2
LG
793 /* platform stream completion event */
794 int (*stream_event)(struct snd_soc_dapm_context *dapm, int event);
795
0168bf0d
LG
796 /* probe ordering - for components with runtime dependencies */
797 int probe_order;
798 int remove_order;
f1442bc1
LG
799
800 /* platform IO - used for platform DAPM */
801 unsigned int (*read)(struct snd_soc_platform *, unsigned int);
802 int (*write)(struct snd_soc_platform *, unsigned int, unsigned int);
07bf84aa 803 int (*bespoke_trigger)(struct snd_pcm_substream *, int);
808db4a4
RP
804};
805
f0fba2ad
LG
806struct snd_soc_platform {
807 const char *name;
808 int id;
809 struct device *dev;
810 struct snd_soc_platform_driver *driver;
cc22d37e 811 struct mutex mutex;
808db4a4 812
f0fba2ad
LG
813 unsigned int suspended:1; /* platform is suspended */
814 unsigned int probed:1;
1c433fbd 815
f0fba2ad
LG
816 struct snd_soc_card *card;
817 struct list_head list;
818 struct list_head card_list;
b7950641
LG
819
820 struct snd_soc_dapm_context dapm;
731f1ab2
SG
821
822#ifdef CONFIG_DEBUG_FS
823 struct dentry *debugfs_platform_root;
824 struct dentry *debugfs_dapm;
825#endif
f0fba2ad 826};
808db4a4 827
f0fba2ad
LG
828struct snd_soc_dai_link {
829 /* config - must be set by machine driver */
830 const char *name; /* Codec name */
831 const char *stream_name; /* Stream name */
bc92657a
SW
832 /*
833 * You MAY specify the link's CPU-side device, either by device name,
834 * or by DT/OF node, but not both. If this information is omitted,
835 * the CPU-side DAI is matched using .cpu_dai_name only, which hence
836 * must be globally unique. These fields are currently typically used
837 * only for codec to codec links, or systems using device tree.
838 */
839 const char *cpu_name;
840 const struct device_node *cpu_of_node;
841 /*
842 * You MAY specify the DAI name of the CPU DAI. If this information is
843 * omitted, the CPU-side DAI is matched using .cpu_name/.cpu_of_node
844 * only, which only works well when that device exposes a single DAI.
845 */
f0fba2ad 846 const char *cpu_dai_name;
bc92657a
SW
847 /*
848 * You MUST specify the link's codec, either by device name, or by
849 * DT/OF node, but not both.
850 */
851 const char *codec_name;
852 const struct device_node *codec_of_node;
853 /* You MUST specify the DAI name within the codec */
f0fba2ad 854 const char *codec_dai_name;
bc92657a
SW
855 /*
856 * You MAY specify the link's platform/PCM/DMA driver, either by
857 * device name, or by DT/OF node, but not both. Some forms of link
858 * do not need a platform.
859 */
860 const char *platform_name;
861 const struct device_node *platform_of_node;
01d7584c 862 int be_id; /* optional ID for machine driver BE identification */
4ccab3e7 863
c74184ed
MB
864 const struct snd_soc_pcm_stream *params;
865
75d9ac46
MB
866 unsigned int dai_fmt; /* format to set on init */
867
01d7584c
LG
868 enum snd_soc_dpcm_trigger trigger[2]; /* trigger type for DPCM */
869
3efab7dc
MB
870 /* Keep DAI active over suspend */
871 unsigned int ignore_suspend:1;
872
06f409d7
MB
873 /* Symmetry requirements */
874 unsigned int symmetric_rates:1;
875
01d7584c
LG
876 /* Do not create a PCM for this DAI link (Backend link) */
877 unsigned int no_pcm:1;
878
879 /* This DAI link can route to other DAI links at runtime (Frontend)*/
880 unsigned int dynamic:1;
881
e50fad4f 882 /* pmdown_time is ignored at stop */
883 unsigned int ignore_pmdown_time:1;
884
f0fba2ad
LG
885 /* codec/machine specific init - e.g. add machine controls */
886 int (*init)(struct snd_soc_pcm_runtime *rtd);
06f409d7 887
01d7584c
LG
888 /* optional hw_params re-writing for BE and FE sync */
889 int (*be_hw_params_fixup)(struct snd_soc_pcm_runtime *rtd,
890 struct snd_pcm_hw_params *params);
891
f0fba2ad
LG
892 /* machine stream operations */
893 struct snd_soc_ops *ops;
808db4a4
RP
894};
895
ff819b83 896struct snd_soc_codec_conf {
ead9b919 897 const char *dev_name;
ff819b83
DP
898
899 /*
900 * optional map of kcontrol, widget and path name prefixes that are
901 * associated per device
902 */
ead9b919 903 const char *name_prefix;
ff819b83
DP
904
905 /*
906 * set this to the desired compression type if you want to
907 * override the one supplied in codec->driver->compress_type
908 */
909 enum snd_soc_compress_type compress_type;
ead9b919
JN
910};
911
2eea392d
JN
912struct snd_soc_aux_dev {
913 const char *name; /* Codec name */
914 const char *codec_name; /* for multi-codec */
915
916 /* codec/machine specific init - e.g. add machine controls */
917 int (*init)(struct snd_soc_dapm_context *dapm);
918};
919
87506549
MB
920/* SoC card */
921struct snd_soc_card {
f0fba2ad 922 const char *name;
22de71ba
LG
923 const char *long_name;
924 const char *driver_name;
c5af3a2e 925 struct device *dev;
f0fba2ad
LG
926 struct snd_card *snd_card;
927 struct module *owner;
c5af3a2e
MB
928
929 struct list_head list;
f0fba2ad 930 struct mutex mutex;
a73fb2df 931 struct mutex dapm_mutex;
c5af3a2e 932
f0fba2ad 933 bool instantiated;
808db4a4 934
e7361ec4 935 int (*probe)(struct snd_soc_card *card);
28e9ad92 936 int (*late_probe)(struct snd_soc_card *card);
e7361ec4 937 int (*remove)(struct snd_soc_card *card);
808db4a4
RP
938
939 /* the pre and post PM functions are used to do any PM work before and
940 * after the codec and DAI's do any PM work. */
70b2ac12
MB
941 int (*suspend_pre)(struct snd_soc_card *card);
942 int (*suspend_post)(struct snd_soc_card *card);
943 int (*resume_pre)(struct snd_soc_card *card);
944 int (*resume_post)(struct snd_soc_card *card);
808db4a4 945
0b4d221b 946 /* callbacks */
87506549 947 int (*set_bias_level)(struct snd_soc_card *,
d4c6005f 948 struct snd_soc_dapm_context *dapm,
0be9898a 949 enum snd_soc_bias_level level);
1badabd9 950 int (*set_bias_level_post)(struct snd_soc_card *,
d4c6005f 951 struct snd_soc_dapm_context *dapm,
1badabd9 952 enum snd_soc_bias_level level);
0b4d221b 953
6c5f1fed 954 long pmdown_time;
96dd3622 955
808db4a4
RP
956 /* CPU <--> Codec DAI links */
957 struct snd_soc_dai_link *dai_link;
958 int num_links;
f0fba2ad
LG
959 struct snd_soc_pcm_runtime *rtd;
960 int num_rtd;
6308419a 961
ff819b83
DP
962 /* optional codec specific configuration */
963 struct snd_soc_codec_conf *codec_conf;
964 int num_configs;
ead9b919 965
2eea392d
JN
966 /*
967 * optional auxiliary devices such as amplifiers or codecs with DAI
968 * link unused
969 */
970 struct snd_soc_aux_dev *aux_dev;
971 int num_aux_devs;
972 struct snd_soc_pcm_runtime *rtd_aux;
973 int num_aux_rtd;
974
b7af1daf
MB
975 const struct snd_kcontrol_new *controls;
976 int num_controls;
977
b8ad29de
MB
978 /*
979 * Card-specific routes and widgets.
980 */
d06e48db 981 const struct snd_soc_dapm_widget *dapm_widgets;
b8ad29de 982 int num_dapm_widgets;
d06e48db 983 const struct snd_soc_dapm_route *dapm_routes;
b8ad29de 984 int num_dapm_routes;
1633281b 985 bool fully_routed;
b8ad29de 986
6308419a 987 struct work_struct deferred_resume_work;
f0fba2ad
LG
988
989 /* lists of probed devices belonging to this card */
990 struct list_head codec_dev_list;
991 struct list_head platform_dev_list;
992 struct list_head dai_dev_list;
a6052154 993
97c866de 994 struct list_head widgets;
8ddab3f5 995 struct list_head paths;
7be31be8 996 struct list_head dapm_list;
db432b41 997 struct list_head dapm_dirty;
8ddab3f5 998
e37a4970
MB
999 /* Generic DAPM context for the card */
1000 struct snd_soc_dapm_context dapm;
de02d078 1001 struct snd_soc_dapm_stats dapm_stats;
e37a4970 1002
a6052154
JN
1003#ifdef CONFIG_DEBUG_FS
1004 struct dentry *debugfs_card_root;
3a45b867 1005 struct dentry *debugfs_pop_time;
a6052154 1006#endif
3a45b867 1007 u32 pop_time;
dddf3e4c
MB
1008
1009 void *drvdata;
808db4a4
RP
1010};
1011
f0fba2ad 1012/* SoC machine DAI configuration, glues a codec and cpu DAI together */
d66a327d 1013struct snd_soc_pcm_runtime {
36ae1a96 1014 struct device *dev;
87506549 1015 struct snd_soc_card *card;
f0fba2ad 1016 struct snd_soc_dai_link *dai_link;
b8c0dab9
LG
1017 struct mutex pcm_mutex;
1018 enum snd_soc_pcm_subclass pcm_subclass;
1019 struct snd_pcm_ops ops;
f0fba2ad 1020
f0fba2ad 1021 unsigned int dev_registered:1;
808db4a4 1022
01d7584c
LG
1023 /* Dynamic PCM BE runtime data */
1024 struct snd_soc_dpcm_runtime dpcm[2];
1025
f0fba2ad
LG
1026 long pmdown_time;
1027
1028 /* runtime devices */
1029 struct snd_pcm *pcm;
1030 struct snd_soc_codec *codec;
1031 struct snd_soc_platform *platform;
1032 struct snd_soc_dai *codec_dai;
1033 struct snd_soc_dai *cpu_dai;
1034
1035 struct delayed_work delayed_work;
f86dcef8
LG
1036#ifdef CONFIG_DEBUG_FS
1037 struct dentry *debugfs_dpcm_root;
1038 struct dentry *debugfs_dpcm_state;
1039#endif
808db4a4
RP
1040};
1041
4eaa9819
JS
1042/* mixer control */
1043struct soc_mixer_control {
d11bb4a9 1044 int min, max, platform_max;
815ecf8d 1045 unsigned int reg, rreg, shift, rshift, invert;
4eaa9819
JS
1046};
1047
71d08516
MB
1048struct soc_bytes {
1049 int base;
1050 int num_regs;
f831b055 1051 u32 mask;
71d08516
MB
1052};
1053
4183eed2
KK
1054/* multi register control */
1055struct soc_mreg_control {
1056 long min, max;
1057 unsigned int regbase, regcount, nbits, invert;
1058};
1059
808db4a4
RP
1060/* enumerated kcontrol */
1061struct soc_enum {
2e72f8e3
PU
1062 unsigned short reg;
1063 unsigned short reg2;
1064 unsigned char shift_l;
1065 unsigned char shift_r;
1066 unsigned int max;
1067 unsigned int mask;
87023ff7 1068 const char * const *texts;
2e72f8e3
PU
1069 const unsigned int *values;
1070 void *dapm;
1071};
1072
5c82f567 1073/* codec IO */
c3753707
MB
1074unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
1075unsigned int snd_soc_write(struct snd_soc_codec *codec,
1076 unsigned int reg, unsigned int val);
5fb609d4
DP
1077unsigned int snd_soc_bulk_write_raw(struct snd_soc_codec *codec,
1078 unsigned int reg, const void *data, size_t len);
5c82f567 1079
f0fba2ad
LG
1080/* device driver data */
1081
dddf3e4c
MB
1082static inline void snd_soc_card_set_drvdata(struct snd_soc_card *card,
1083 void *data)
1084{
1085 card->drvdata = data;
1086}
1087
1088static inline void *snd_soc_card_get_drvdata(struct snd_soc_card *card)
1089{
1090 return card->drvdata;
1091}
1092
b2c812e2 1093static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec,
f0fba2ad 1094 void *data)
b2c812e2 1095{
f0fba2ad 1096 dev_set_drvdata(codec->dev, data);
b2c812e2
MB
1097}
1098
1099static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec)
1100{
f0fba2ad
LG
1101 return dev_get_drvdata(codec->dev);
1102}
1103
1104static inline void snd_soc_platform_set_drvdata(struct snd_soc_platform *platform,
1105 void *data)
1106{
1107 dev_set_drvdata(platform->dev, data);
1108}
1109
1110static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platform)
1111{
1112 return dev_get_drvdata(platform->dev);
1113}
1114
1115static inline void snd_soc_pcm_set_drvdata(struct snd_soc_pcm_runtime *rtd,
1116 void *data)
1117{
36ae1a96 1118 dev_set_drvdata(rtd->dev, data);
f0fba2ad
LG
1119}
1120
1121static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
1122{
36ae1a96 1123 return dev_get_drvdata(rtd->dev);
b2c812e2
MB
1124}
1125
4e10bda0
VK
1126static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
1127{
1128 INIT_LIST_HEAD(&card->dai_dev_list);
1129 INIT_LIST_HEAD(&card->codec_dev_list);
1130 INIT_LIST_HEAD(&card->platform_dev_list);
1131 INIT_LIST_HEAD(&card->widgets);
1132 INIT_LIST_HEAD(&card->paths);
1133 INIT_LIST_HEAD(&card->dapm_list);
1134}
1135
30d86ba4
PU
1136static inline bool snd_soc_volsw_is_stereo(struct soc_mixer_control *mc)
1137{
1138 if (mc->reg == mc->rreg && mc->shift == mc->rshift)
1139 return 0;
1140 /*
1141 * mc->reg == mc->rreg && mc->shift != mc->rshift, or
1142 * mc->reg != mc->rreg means that the control is
1143 * stereo (bits in one register or in two registers)
1144 */
1145 return 1;
1146}
1147
fb257897
MB
1148int snd_soc_util_init(void);
1149void snd_soc_util_exit(void);
1150
bec4fa05
SW
1151int snd_soc_of_parse_card_name(struct snd_soc_card *card,
1152 const char *propname);
a4a54dd5
SW
1153int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
1154 const char *propname);
bec4fa05 1155
a47cbe72
MB
1156#include <sound/soc-dai.h>
1157
faff4bb0 1158#ifdef CONFIG_DEBUG_FS
8a9dab1a 1159extern struct dentry *snd_soc_debugfs_root;
faff4bb0
SW
1160#endif
1161
6f8ab4ac
MB
1162extern const struct dev_pm_ops snd_soc_pm_ops;
1163
808db4a4 1164#endif