[linux-2.6-block.git] / include / linux / pm_qos.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _LINUX_PM_QOS_H
#define _LINUX_PM_QOS_H
/* interface for the pm_qos_power infrastructure of the linux kernel.
 *
 * Mark Gross <mgross@linux.intel.com>
 */
#include <linux/plist.h>
#include <linux/notifier.h>
#include <linux/device.h>
#include <linux/workqueue.h>

enum {
	PM_QOS_RESERVED = 0,
	PM_QOS_CPU_DMA_LATENCY,
	PM_QOS_NETWORK_LATENCY,
	PM_QOS_NETWORK_THROUGHPUT,
	PM_QOS_MEMORY_BANDWIDTH,

	/* insert new class ID */
	PM_QOS_NUM_CLASSES,
};

enum pm_qos_flags_status {
	PM_QOS_FLAGS_UNDEFINED = -1,
	PM_QOS_FLAGS_NONE,
	PM_QOS_FLAGS_SOME,
	PM_QOS_FLAGS_ALL,
};

#define PM_QOS_DEFAULT_VALUE	(-1)
#define PM_QOS_LATENCY_ANY	S32_MAX
#define PM_QOS_LATENCY_ANY_NS	((s64)PM_QOS_LATENCY_ANY * NSEC_PER_USEC)

#define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE	(2000 * USEC_PER_SEC)
#define PM_QOS_NETWORK_LAT_DEFAULT_VALUE	(2000 * USEC_PER_SEC)
#define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE	0
#define PM_QOS_MEMORY_BANDWIDTH_DEFAULT_VALUE	0
#define PM_QOS_RESUME_LATENCY_DEFAULT_VALUE	PM_QOS_LATENCY_ANY
#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT	PM_QOS_LATENCY_ANY
#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT_NS	PM_QOS_LATENCY_ANY_NS
#define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE	0
#define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT	(-1)

#define PM_QOS_FLAG_NO_POWER_OFF	(1 << 0)

struct pm_qos_request {
	struct plist_node node;
	int pm_qos_class;
	struct delayed_work work; /* for pm_qos_update_request_timeout */
};

struct pm_qos_flags_request {
	struct list_head node;
	s32 flags;	/* Do not change to 64 bit */
};

enum dev_pm_qos_req_type {
	DEV_PM_QOS_RESUME_LATENCY = 1,
	DEV_PM_QOS_LATENCY_TOLERANCE,
	DEV_PM_QOS_FLAGS,
};

struct dev_pm_qos_request {
	enum dev_pm_qos_req_type type;
	union {
		struct plist_node pnode;
		struct pm_qos_flags_request flr;
	} data;
	struct device *dev;
};

enum pm_qos_type {
	PM_QOS_UNITIALIZED,
	PM_QOS_MAX,		/* return the largest value */
	PM_QOS_MIN,		/* return the smallest value */
	PM_QOS_SUM		/* return the sum */
};

/*
 * Note: The lockless read path depends on the CPU accessing target_value
 * or effective_flags atomically.  Atomic access is only guaranteed on all CPU
 * types linux supports for 32 bit quantites
 */
struct pm_qos_constraints {
	struct plist_head list;
	s32 target_value;	/* Do not change to 64 bit */
	s32 default_value;
	s32 no_constraint_value;
	enum pm_qos_type type;
	struct blocking_notifier_head *notifiers;
};

struct pm_qos_flags {
	struct list_head list;
	s32 effective_flags;	/* Do not change to 64 bit */
};

struct dev_pm_qos {
	struct pm_qos_constraints resume_latency;
	struct pm_qos_constraints latency_tolerance;
	struct pm_qos_flags flags;
	struct dev_pm_qos_request *resume_latency_req;
	struct dev_pm_qos_request *latency_tolerance_req;
	struct dev_pm_qos_request *flags_req;
};

/* Action requested to pm_qos_update_target */
enum pm_qos_req_action {
	PM_QOS_ADD_REQ,		/* Add a new request */
	PM_QOS_UPDATE_REQ,	/* Update an existing request */
	PM_QOS_REMOVE_REQ	/* Remove an existing request */
};

static inline int dev_pm_qos_request_active(struct dev_pm_qos_request *req)
{
	return req->dev != NULL;
}

int pm_qos_update_target(struct pm_qos_constraints *c, struct plist_node *node,
			 enum pm_qos_req_action action, int value);
bool pm_qos_update_flags(struct pm_qos_flags *pqf,
			 struct pm_qos_flags_request *req,
			 enum pm_qos_req_action action, s32 val);
void pm_qos_add_request(struct pm_qos_request *req, int pm_qos_class,
			s32 value);
void pm_qos_update_request(struct pm_qos_request *req,
			   s32 new_value);
void pm_qos_update_request_timeout(struct pm_qos_request *req,
				   s32 new_value, unsigned long timeout_us);
void pm_qos_remove_request(struct pm_qos_request *req);

int pm_qos_request(int pm_qos_class);
int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier);
int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier);
int pm_qos_request_active(struct pm_qos_request *req);
s32 pm_qos_read_value(struct pm_qos_constraints *c);

#ifdef CONFIG_PM
enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask);
enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask);
s32 __dev_pm_qos_read_value(struct device *dev);
s32 dev_pm_qos_read_value(struct device *dev);
int dev_pm_qos_add_request(struct device *dev, struct dev_pm_qos_request *req,
			   enum dev_pm_qos_req_type type, s32 value);
int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value);
int dev_pm_qos_remove_request(struct dev_pm_qos_request *req);
int dev_pm_qos_add_notifier(struct device *dev,
			    struct notifier_block *notifier,
			    enum dev_pm_qos_req_type type);
int dev_pm_qos_remove_notifier(struct device *dev,
			       struct notifier_block *notifier,
			       enum dev_pm_qos_req_type type);
void dev_pm_qos_constraints_init(struct device *dev);
void dev_pm_qos_constraints_destroy(struct device *dev);
int dev_pm_qos_add_ancestor_request(struct device *dev,
				    struct dev_pm_qos_request *req,
				    enum dev_pm_qos_req_type type, s32 value);
int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value);
void dev_pm_qos_hide_latency_limit(struct device *dev);
int dev_pm_qos_expose_flags(struct device *dev, s32 value);
void dev_pm_qos_hide_flags(struct device *dev);
int dev_pm_qos_update_flags(struct device *dev, s32 mask, bool set);
s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev);
int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val);
int dev_pm_qos_expose_latency_tolerance(struct device *dev);
void dev_pm_qos_hide_latency_tolerance(struct device *dev);

static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
{
	return dev->power.qos->resume_latency_req->data.pnode.prio;
}

static inline s32 dev_pm_qos_requested_flags(struct device *dev)
{
	return dev->power.qos->flags_req->data.flr.flags;
}

static inline s32 dev_pm_qos_raw_read_value(struct device *dev)
{
	return IS_ERR_OR_NULL(dev->power.qos) ?
		PM_QOS_RESUME_LATENCY_NO_CONSTRAINT :
		pm_qos_read_value(&dev->power.qos->resume_latency);
}
#else
static inline enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev,
							  s32 mask)
			{ return PM_QOS_FLAGS_UNDEFINED; }
static inline enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev,
							s32 mask)
			{ return PM_QOS_FLAGS_UNDEFINED; }
static inline s32 __dev_pm_qos_read_value(struct device *dev)
			{ return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; }
static inline s32 dev_pm_qos_read_value(struct device *dev)
			{ return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; }
static inline int dev_pm_qos_add_request(struct device *dev,
					 struct dev_pm_qos_request *req,
					 enum dev_pm_qos_req_type type,
					 s32 value)
			{ return 0; }
static inline int dev_pm_qos_update_request(struct dev_pm_qos_request *req,
					    s32 new_value)
			{ return 0; }
static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req)
			{ return 0; }
static inline int dev_pm_qos_add_notifier(struct device *dev,
					  struct notifier_block *notifier,
					  enum dev_pm_qos_req_type type)
			{ return 0; }
static inline int dev_pm_qos_remove_notifier(struct device *dev,
					     struct notifier_block *notifier,
					     enum dev_pm_qos_req_type type)
			{ return 0; }
static inline void dev_pm_qos_constraints_init(struct device *dev)
{
	dev->power.power_state = PMSG_ON;
}
static inline void dev_pm_qos_constraints_destroy(struct device *dev)
{
	dev->power.power_state = PMSG_INVALID;
}
static inline int dev_pm_qos_add_ancestor_request(struct device *dev,
						  struct dev_pm_qos_request *req,
						  enum dev_pm_qos_req_type type,
						  s32 value)
			{ return 0; }
static inline int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value)
			{ return 0; }
static inline void dev_pm_qos_hide_latency_limit(struct device *dev) {}
static inline int dev_pm_qos_expose_flags(struct device *dev, s32 value)
			{ return 0; }
static inline void dev_pm_qos_hide_flags(struct device *dev) {}
static inline int dev_pm_qos_update_flags(struct device *dev, s32 m, bool set)
			{ return 0; }
static inline s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev)
			{ return PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT; }
static inline int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val)
			{ return 0; }
static inline int dev_pm_qos_expose_latency_tolerance(struct device *dev)
			{ return 0; }
static inline void dev_pm_qos_hide_latency_tolerance(struct device *dev) {}

static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
{
	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
}
static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return 0; }
static inline s32 dev_pm_qos_raw_read_value(struct device *dev)
{
	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
}
#endif

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
e8db0be1 JP	2	#ifndef _LINUX_PM_QOS_H
e8db0be1 JP	3	#define _LINUX_PM_QOS_H
d82b3518 MG	4	/* interface for the pm_qos_power infrastructure of the linux kernel.
d82b3518 MG	5	*
bf1db69f	6	* Mark Gross <mgross@linux.intel.com>
d82b3518	7	*/
82f68251	8	#include <linux/plist.h>
d82b3518	9	#include <linux/notifier.h>
1a9a9152	10	#include <linux/device.h>
c4772d19	11	#include <linux/workqueue.h>
d82b3518	12
d031e1de AF	13	enum {
	14	PM_QOS_RESERVED = 0,
	15	PM_QOS_CPU_DMA_LATENCY,
	16	PM_QOS_NETWORK_LATENCY,
	17	PM_QOS_NETWORK_THROUGHPUT,
7990da71	18	PM_QOS_MEMORY_BANDWIDTH,
d031e1de AF	19
	20	/* insert new class ID */
	21	PM_QOS_NUM_CLASSES,
	22	};
d82b3518	23
ae0fb4b7 RW	24	enum pm_qos_flags_status {
	25	PM_QOS_FLAGS_UNDEFINED = -1,
	26	PM_QOS_FLAGS_NONE,
	27	PM_QOS_FLAGS_SOME,
	28	PM_QOS_FLAGS_ALL,
	29	};
	30
0759e80b RW	31	#define PM_QOS_DEFAULT_VALUE (-1)
	32	#define PM_QOS_LATENCY_ANY S32_MAX
	33	#define PM_QOS_LATENCY_ANY_NS ((s64)PM_QOS_LATENCY_ANY * NSEC_PER_USEC)
d82b3518	34
333c5ae9 TC	35	#define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC)
	36	#define PM_QOS_NETWORK_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC)
	37	#define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE 0
7990da71	38	#define PM_QOS_MEMORY_BANDWIDTH_DEFAULT_VALUE 0
0759e80b RW	39	#define PM_QOS_RESUME_LATENCY_DEFAULT_VALUE PM_QOS_LATENCY_ANY
	40	#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT PM_QOS_LATENCY_ANY
	41	#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT_NS PM_QOS_LATENCY_ANY_NS
2d984ad1 RW	42	#define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE 0
2d984ad1 RW	43	#define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT (-1)
333c5ae9	44
e39473d0	45	#define PM_QOS_FLAG_NO_POWER_OFF (1 << 0)
e39473d0	46
cc749986 JP	47	struct pm_qos_request {
cc749986 JP	48	struct plist_node node;
82f68251	49	int pm_qos_class;
c4772d19	50	struct delayed_work work; /* for pm_qos_update_request_timeout */
82f68251	51	};
d82b3518	52
5efbe427 RW	53	struct pm_qos_flags_request {
	54	struct list_head node;
	55	s32 flags; /* Do not change to 64 bit */
	56	};
	57
ae0fb4b7	58	enum dev_pm_qos_req_type {
b02f6695	59	DEV_PM_QOS_RESUME_LATENCY = 1,
2d984ad1	60	DEV_PM_QOS_LATENCY_TOLERANCE,
ae0fb4b7 RW	61	DEV_PM_QOS_FLAGS,
	62	};
	63
91ff4cb8	64	struct dev_pm_qos_request {
ae0fb4b7	65	enum dev_pm_qos_req_type type;
021c870b RW	66	union {
021c870b RW	67	struct plist_node pnode;
ae0fb4b7	68	struct pm_qos_flags_request flr;
021c870b	69	} data;
91ff4cb8 JP	70	struct device *dev;
	71	};
	72
4e1779ba JP	73	enum pm_qos_type {
	74	PM_QOS_UNITIALIZED,
	75	PM_QOS_MAX, /* return the largest value */
7990da71 TV	76	PM_QOS_MIN, /* return the smallest value */
7990da71 TV	77	PM_QOS_SUM /* return the sum */
4e1779ba JP	78	};
	79
	80	/*
5efbe427 RW	81	* Note: The lockless read path depends on the CPU accessing target_value
5efbe427 RW	82	* or effective_flags atomically. Atomic access is only guaranteed on all CPU
4e1779ba JP	83	* types linux supports for 32 bit quantites
	84	*/
	85	struct pm_qos_constraints {
	86	struct plist_head list;
	87	s32 target_value; /* Do not change to 64 bit */
	88	s32 default_value;
327adaed	89	s32 no_constraint_value;
4e1779ba JP	90	enum pm_qos_type type;
	91	struct blocking_notifier_head *notifiers;
	92	};
	93
5efbe427 RW	94	struct pm_qos_flags {
	95	struct list_head list;
	96	s32 effective_flags; /* Do not change to 64 bit */
	97	};
	98
5f986c59	99	struct dev_pm_qos {
b02f6695	100	struct pm_qos_constraints resume_latency;
2d984ad1	101	struct pm_qos_constraints latency_tolerance;
ae0fb4b7	102	struct pm_qos_flags flags;
b02f6695	103	struct dev_pm_qos_request *resume_latency_req;
2d984ad1	104	struct dev_pm_qos_request *latency_tolerance_req;
e39473d0	105	struct dev_pm_qos_request *flags_req;
5f986c59 RW	106	};
5f986c59 RW	107
abe98ec2 JP	108	/* Action requested to pm_qos_update_target */
	109	enum pm_qos_req_action {
	110	PM_QOS_ADD_REQ, /* Add a new request */
	111	PM_QOS_UPDATE_REQ, /* Update an existing request */
	112	PM_QOS_REMOVE_REQ /* Remove an existing request */
	113	};
	114
91ff4cb8 JP	115	static inline int dev_pm_qos_request_active(struct dev_pm_qos_request *req)
91ff4cb8 JP	116	{
83618092	117	return req->dev != NULL;
91ff4cb8 JP	118	}
91ff4cb8 JP	119
abe98ec2 JP	120	int pm_qos_update_target(struct pm_qos_constraints c, struct plist_node node,
abe98ec2 JP	121	enum pm_qos_req_action action, int value);
5efbe427 RW	122	bool pm_qos_update_flags(struct pm_qos_flags *pqf,
	123	struct pm_qos_flags_request *req,
	124	enum pm_qos_req_action action, s32 val);
cc749986 JP	125	void pm_qos_add_request(struct pm_qos_request *req, int pm_qos_class,
	126	s32 value);
	127	void pm_qos_update_request(struct pm_qos_request *req,
e8db0be1	128	s32 new_value);
c4772d19 MH	129	void pm_qos_update_request_timeout(struct pm_qos_request *req,
c4772d19 MH	130	s32 new_value, unsigned long timeout_us);
cc749986	131	void pm_qos_remove_request(struct pm_qos_request *req);
d82b3518	132
ed77134b MG	133	int pm_qos_request(int pm_qos_class);
	134	int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier);
	135	int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier);
cc749986	136	int pm_qos_request_active(struct pm_qos_request *req);
b66213cd	137	s32 pm_qos_read_value(struct pm_qos_constraints *c);
91ff4cb8	138
a9b542ee	139	#ifdef CONFIG_PM
ae0fb4b7 RW	140	enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask);
ae0fb4b7 RW	141	enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask);
00dc9ad1	142	s32 __dev_pm_qos_read_value(struct device *dev);
1a9a9152	143	s32 dev_pm_qos_read_value(struct device *dev);
91ff4cb8	144	int dev_pm_qos_add_request(struct device dev, struct dev_pm_qos_request req,
ae0fb4b7	145	enum dev_pm_qos_req_type type, s32 value);
91ff4cb8 JP	146	int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value);
	147	int dev_pm_qos_remove_request(struct dev_pm_qos_request *req);
	148	int dev_pm_qos_add_notifier(struct device *dev,
0b07ee94 VK	149	struct notifier_block *notifier,
0b07ee94 VK	150	enum dev_pm_qos_req_type type);
91ff4cb8	151	int dev_pm_qos_remove_notifier(struct device *dev,
0b07ee94 VK	152	struct notifier_block *notifier,
0b07ee94 VK	153	enum dev_pm_qos_req_type type);
91ff4cb8 JP	154	void dev_pm_qos_constraints_init(struct device *dev);
91ff4cb8 JP	155	void dev_pm_qos_constraints_destroy(struct device *dev);
40a5f8be	156	int dev_pm_qos_add_ancestor_request(struct device *dev,
71d821fd RW	157	struct dev_pm_qos_request *req,
71d821fd RW	158	enum dev_pm_qos_req_type type, s32 value);
d30d819d RW	159	int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value);
	160	void dev_pm_qos_hide_latency_limit(struct device *dev);
	161	int dev_pm_qos_expose_flags(struct device *dev, s32 value);
	162	void dev_pm_qos_hide_flags(struct device *dev);
	163	int dev_pm_qos_update_flags(struct device *dev, s32 mask, bool set);
	164	s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev);
	165	int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val);
13b2c4a0 MW	166	int dev_pm_qos_expose_latency_tolerance(struct device *dev);
13b2c4a0 MW	167	void dev_pm_qos_hide_latency_tolerance(struct device *dev);
d30d819d RW	168
	169	static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
	170	{
	171	return dev->power.qos->resume_latency_req->data.pnode.prio;
	172	}
	173
	174	static inline s32 dev_pm_qos_requested_flags(struct device *dev)
	175	{
	176	return dev->power.qos->flags_req->data.flr.flags;
	177	}
6dbf5cea RW	178
	179	static inline s32 dev_pm_qos_raw_read_value(struct device *dev)
	180	{
	181	return IS_ERR_OR_NULL(dev->power.qos) ?
0759e80b RW	182	PM_QOS_RESUME_LATENCY_NO_CONSTRAINT :
0759e80b RW	183	pm_qos_read_value(&dev->power.qos->resume_latency);
6dbf5cea	184	}
e8db0be1	185	#else
ae0fb4b7 RW	186	static inline enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev,
	187	s32 mask)
	188	{ return PM_QOS_FLAGS_UNDEFINED; }
	189	static inline enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev,
	190	s32 mask)
	191	{ return PM_QOS_FLAGS_UNDEFINED; }
00dc9ad1	192	static inline s32 __dev_pm_qos_read_value(struct device *dev)
0759e80b	193	{ return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; }
1a9a9152	194	static inline s32 dev_pm_qos_read_value(struct device *dev)
0759e80b	195	{ return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; }
91ff4cb8 JP	196	static inline int dev_pm_qos_add_request(struct device *dev,
91ff4cb8 JP	197	struct dev_pm_qos_request *req,
ae0fb4b7	198	enum dev_pm_qos_req_type type,
91ff4cb8 JP	199	s32 value)
	200	{ return 0; }
	201	static inline int dev_pm_qos_update_request(struct dev_pm_qos_request *req,
	202	s32 new_value)
	203	{ return 0; }
	204	static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req)
	205	{ return 0; }
	206	static inline int dev_pm_qos_add_notifier(struct device *dev,
0b07ee94 VK	207	struct notifier_block *notifier,
0b07ee94 VK	208	enum dev_pm_qos_req_type type)
91ff4cb8 JP	209	{ return 0; }
91ff4cb8 JP	210	static inline int dev_pm_qos_remove_notifier(struct device *dev,
0b07ee94 VK	211	struct notifier_block *notifier,
0b07ee94 VK	212	enum dev_pm_qos_req_type type)
91ff4cb8 JP	213	{ return 0; }
91ff4cb8 JP	214	static inline void dev_pm_qos_constraints_init(struct device *dev)
1a9a9152 RW	215	{
	216	dev->power.power_state = PMSG_ON;
	217	}
91ff4cb8	218	static inline void dev_pm_qos_constraints_destroy(struct device *dev)
1a9a9152 RW	219	{
	220	dev->power.power_state = PMSG_INVALID;
	221	}
40a5f8be	222	static inline int dev_pm_qos_add_ancestor_request(struct device *dev,
71d821fd RW	223	struct dev_pm_qos_request *req,
	224	enum dev_pm_qos_req_type type,
	225	s32 value)
40a5f8be	226	{ return 0; }
85dc0b8a RW	227	static inline int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value)
	228	{ return 0; }
	229	static inline void dev_pm_qos_hide_latency_limit(struct device *dev) {}
e39473d0 RW	230	static inline int dev_pm_qos_expose_flags(struct device *dev, s32 value)
	231	{ return 0; }
	232	static inline void dev_pm_qos_hide_flags(struct device *dev) {}
	233	static inline int dev_pm_qos_update_flags(struct device *dev, s32 m, bool set)
	234	{ return 0; }
2d984ad1 RW	235	static inline s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev)
	236	{ return PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT; }
	237	static inline int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val)
	238	{ return 0; }
13b2c4a0 MW	239	static inline int dev_pm_qos_expose_latency_tolerance(struct device *dev)
	240	{ return 0; }
	241	static inline void dev_pm_qos_hide_latency_tolerance(struct device *dev) {}
e39473d0	242
0759e80b RW	243	static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
	244	{
	245	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
	246	}
e39473d0	247	static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return 0; }
0759e80b RW	248	static inline s32 dev_pm_qos_raw_read_value(struct device *dev)
	249	{
	250	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
	251	}
85dc0b8a RW	252	#endif
85dc0b8a RW	253
82f68251	254	#endif