[linux-2.6-block.git] / include / linux / pm_qos.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _LINUX_PM_QOS_H
#define _LINUX_PM_QOS_H
/* interface for the pm_qos_power infrastructure of the linux kernel.
 *
 * Mark Gross <mgross@linux.intel.com>
 */
#include <linux/plist.h>
#include <linux/notifier.h>
#include <linux/device.h>
#include <linux/workqueue.h>

enum {
	PM_QOS_RESERVED = 0,
	PM_QOS_CPU_DMA_LATENCY,
	PM_QOS_NETWORK_LATENCY,
	PM_QOS_NETWORK_THROUGHPUT,
	PM_QOS_MEMORY_BANDWIDTH,

	/* insert new class ID */
	PM_QOS_NUM_CLASSES,
};

enum pm_qos_flags_status {
	PM_QOS_FLAGS_UNDEFINED = -1,
	PM_QOS_FLAGS_NONE,
	PM_QOS_FLAGS_SOME,
	PM_QOS_FLAGS_ALL,
};

#define PM_QOS_DEFAULT_VALUE	(-1)
#define PM_QOS_LATENCY_ANY	S32_MAX
#define PM_QOS_LATENCY_ANY_NS	((s64)PM_QOS_LATENCY_ANY * NSEC_PER_USEC)

#define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE	(2000 * USEC_PER_SEC)
#define PM_QOS_NETWORK_LAT_DEFAULT_VALUE	(2000 * USEC_PER_SEC)
#define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE	0
#define PM_QOS_MEMORY_BANDWIDTH_DEFAULT_VALUE	0
#define PM_QOS_RESUME_LATENCY_DEFAULT_VALUE	PM_QOS_LATENCY_ANY
#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT	PM_QOS_LATENCY_ANY
#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT_NS	PM_QOS_LATENCY_ANY_NS
#define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE	0
#define PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE	0
#define PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE	(-1)
#define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT	(-1)

#define PM_QOS_FLAG_NO_POWER_OFF	(1 << 0)

struct pm_qos_request {
	struct plist_node node;
	int pm_qos_class;
	struct delayed_work work; /* for pm_qos_update_request_timeout */
};

struct pm_qos_flags_request {
	struct list_head node;
	s32 flags;	/* Do not change to 64 bit */
};

enum dev_pm_qos_req_type {
	DEV_PM_QOS_RESUME_LATENCY = 1,
	DEV_PM_QOS_LATENCY_TOLERANCE,
	DEV_PM_QOS_MIN_FREQUENCY,
	DEV_PM_QOS_MAX_FREQUENCY,
	DEV_PM_QOS_FLAGS,
};

struct dev_pm_qos_request {
	enum dev_pm_qos_req_type type;
	union {
		struct plist_node pnode;
		struct pm_qos_flags_request flr;
	} data;
	struct device *dev;
};

enum pm_qos_type {
	PM_QOS_UNITIALIZED,
	PM_QOS_MAX,		/* return the largest value */
	PM_QOS_MIN,		/* return the smallest value */
	PM_QOS_SUM		/* return the sum */
};

/*
 * Note: The lockless read path depends on the CPU accessing target_value
 * or effective_flags atomically.  Atomic access is only guaranteed on all CPU
 * types linux supports for 32 bit quantites
 */
struct pm_qos_constraints {
	struct plist_head list;
	s32 target_value;	/* Do not change to 64 bit */
	s32 default_value;
	s32 no_constraint_value;
	enum pm_qos_type type;
	struct blocking_notifier_head *notifiers;
};

struct pm_qos_flags {
	struct list_head list;
	s32 effective_flags;	/* Do not change to 64 bit */
};

struct dev_pm_qos {
	struct pm_qos_constraints resume_latency;
	struct pm_qos_constraints latency_tolerance;
	struct pm_qos_constraints min_frequency;
	struct pm_qos_constraints max_frequency;
	struct pm_qos_flags flags;
	struct dev_pm_qos_request *resume_latency_req;
	struct dev_pm_qos_request *latency_tolerance_req;
	struct dev_pm_qos_request *flags_req;
	struct dev_pm_qos_request *min_frequency_req;
	struct dev_pm_qos_request *max_frequency_req;
};

/* Action requested to pm_qos_update_target */
enum pm_qos_req_action {
	PM_QOS_ADD_REQ,		/* Add a new request */
	PM_QOS_UPDATE_REQ,	/* Update an existing request */
	PM_QOS_REMOVE_REQ	/* Remove an existing request */
};

static inline int dev_pm_qos_request_active(struct dev_pm_qos_request *req)
{
	return req->dev != NULL;
}

int pm_qos_update_target(struct pm_qos_constraints *c, struct plist_node *node,
			 enum pm_qos_req_action action, int value);
bool pm_qos_update_flags(struct pm_qos_flags *pqf,
			 struct pm_qos_flags_request *req,
			 enum pm_qos_req_action action, s32 val);
void pm_qos_add_request(struct pm_qos_request *req, int pm_qos_class,
			s32 value);
void pm_qos_update_request(struct pm_qos_request *req,
			   s32 new_value);
void pm_qos_update_request_timeout(struct pm_qos_request *req,
				   s32 new_value, unsigned long timeout_us);
void pm_qos_remove_request(struct pm_qos_request *req);

int pm_qos_request(int pm_qos_class);
int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier);
int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier);
int pm_qos_request_active(struct pm_qos_request *req);
s32 pm_qos_read_value(struct pm_qos_constraints *c);

#ifdef CONFIG_PM
enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask);
enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask);
s32 __dev_pm_qos_resume_latency(struct device *dev);
s32 dev_pm_qos_read_value(struct device *dev, enum dev_pm_qos_req_type type);
int dev_pm_qos_add_request(struct device *dev, struct dev_pm_qos_request *req,
			   enum dev_pm_qos_req_type type, s32 value);
int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value);
int dev_pm_qos_remove_request(struct dev_pm_qos_request *req);
int dev_pm_qos_add_notifier(struct device *dev,
			    struct notifier_block *notifier,
			    enum dev_pm_qos_req_type type);
int dev_pm_qos_remove_notifier(struct device *dev,
			       struct notifier_block *notifier,
			       enum dev_pm_qos_req_type type);
void dev_pm_qos_constraints_init(struct device *dev);
void dev_pm_qos_constraints_destroy(struct device *dev);
int dev_pm_qos_add_ancestor_request(struct device *dev,
				    struct dev_pm_qos_request *req,
				    enum dev_pm_qos_req_type type, s32 value);
int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value);
void dev_pm_qos_hide_latency_limit(struct device *dev);
int dev_pm_qos_expose_flags(struct device *dev, s32 value);
void dev_pm_qos_hide_flags(struct device *dev);
int dev_pm_qos_update_flags(struct device *dev, s32 mask, bool set);
s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev);
int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val);
int dev_pm_qos_expose_latency_tolerance(struct device *dev);
void dev_pm_qos_hide_latency_tolerance(struct device *dev);

static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
{
	return dev->power.qos->resume_latency_req->data.pnode.prio;
}

static inline s32 dev_pm_qos_requested_flags(struct device *dev)
{
	return dev->power.qos->flags_req->data.flr.flags;
}

static inline s32 dev_pm_qos_raw_resume_latency(struct device *dev)
{
	return IS_ERR_OR_NULL(dev->power.qos) ?
		PM_QOS_RESUME_LATENCY_NO_CONSTRAINT :
		pm_qos_read_value(&dev->power.qos->resume_latency);
}
#else
static inline enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev,
							  s32 mask)
			{ return PM_QOS_FLAGS_UNDEFINED; }
static inline enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev,
							s32 mask)
			{ return PM_QOS_FLAGS_UNDEFINED; }
static inline s32 __dev_pm_qos_resume_latency(struct device *dev)
			{ return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; }
static inline s32 dev_pm_qos_read_value(struct device *dev,
					enum dev_pm_qos_req_type type)
{
	switch (type) {
	case DEV_PM_QOS_RESUME_LATENCY:
		return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
	case DEV_PM_QOS_MIN_FREQUENCY:
		return PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
	case DEV_PM_QOS_MAX_FREQUENCY:
		return PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
	default:
		WARN_ON(1);
		return 0;
	}
}

static inline int dev_pm_qos_add_request(struct device *dev,
					 struct dev_pm_qos_request *req,
					 enum dev_pm_qos_req_type type,
					 s32 value)
			{ return 0; }
static inline int dev_pm_qos_update_request(struct dev_pm_qos_request *req,
					    s32 new_value)
			{ return 0; }
static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req)
			{ return 0; }
static inline int dev_pm_qos_add_notifier(struct device *dev,
					  struct notifier_block *notifier,
					  enum dev_pm_qos_req_type type)
			{ return 0; }
static inline int dev_pm_qos_remove_notifier(struct device *dev,
					     struct notifier_block *notifier,
					     enum dev_pm_qos_req_type type)
			{ return 0; }
static inline void dev_pm_qos_constraints_init(struct device *dev)
{
	dev->power.power_state = PMSG_ON;
}
static inline void dev_pm_qos_constraints_destroy(struct device *dev)
{
	dev->power.power_state = PMSG_INVALID;
}
static inline int dev_pm_qos_add_ancestor_request(struct device *dev,
						  struct dev_pm_qos_request *req,
						  enum dev_pm_qos_req_type type,
						  s32 value)
			{ return 0; }
static inline int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value)
			{ return 0; }
static inline void dev_pm_qos_hide_latency_limit(struct device *dev) {}
static inline int dev_pm_qos_expose_flags(struct device *dev, s32 value)
			{ return 0; }
static inline void dev_pm_qos_hide_flags(struct device *dev) {}
static inline int dev_pm_qos_update_flags(struct device *dev, s32 m, bool set)
			{ return 0; }
static inline s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev)
			{ return PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT; }
static inline int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val)
			{ return 0; }
static inline int dev_pm_qos_expose_latency_tolerance(struct device *dev)
			{ return 0; }
static inline void dev_pm_qos_hide_latency_tolerance(struct device *dev) {}

static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
{
	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
}
static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return 0; }
static inline s32 dev_pm_qos_raw_resume_latency(struct device *dev)
{
	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
}
#endif

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
e8db0be1 JP	2	#ifndef _LINUX_PM_QOS_H
e8db0be1 JP	3	#define _LINUX_PM_QOS_H
d82b3518 MG	4	/* interface for the pm_qos_power infrastructure of the linux kernel.
d82b3518 MG	5	*
bf1db69f	6	* Mark Gross <mgross@linux.intel.com>
d82b3518	7	*/
82f68251	8	#include <linux/plist.h>
d82b3518	9	#include <linux/notifier.h>
1a9a9152	10	#include <linux/device.h>
c4772d19	11	#include <linux/workqueue.h>
d82b3518	12
d031e1de AF	13	enum {
	14	PM_QOS_RESERVED = 0,
	15	PM_QOS_CPU_DMA_LATENCY,
	16	PM_QOS_NETWORK_LATENCY,
	17	PM_QOS_NETWORK_THROUGHPUT,
7990da71	18	PM_QOS_MEMORY_BANDWIDTH,
d031e1de AF	19
	20	/* insert new class ID */
	21	PM_QOS_NUM_CLASSES,
	22	};
d82b3518	23
ae0fb4b7 RW	24	enum pm_qos_flags_status {
	25	PM_QOS_FLAGS_UNDEFINED = -1,
	26	PM_QOS_FLAGS_NONE,
	27	PM_QOS_FLAGS_SOME,
	28	PM_QOS_FLAGS_ALL,
	29	};
	30
0759e80b RW	31	#define PM_QOS_DEFAULT_VALUE (-1)
	32	#define PM_QOS_LATENCY_ANY S32_MAX
	33	#define PM_QOS_LATENCY_ANY_NS ((s64)PM_QOS_LATENCY_ANY * NSEC_PER_USEC)
d82b3518	34
333c5ae9 TC	35	#define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC)
	36	#define PM_QOS_NETWORK_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC)
	37	#define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE 0
7990da71	38	#define PM_QOS_MEMORY_BANDWIDTH_DEFAULT_VALUE 0
0759e80b RW	39	#define PM_QOS_RESUME_LATENCY_DEFAULT_VALUE PM_QOS_LATENCY_ANY
	40	#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT PM_QOS_LATENCY_ANY
	41	#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT_NS PM_QOS_LATENCY_ANY_NS
2d984ad1	42	#define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE 0
208637b3 VK	43	#define PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE 0
208637b3 VK	44	#define PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE (-1)
2d984ad1	45	#define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT (-1)
333c5ae9	46
e39473d0	47	#define PM_QOS_FLAG_NO_POWER_OFF (1 << 0)
e39473d0	48
cc749986 JP	49	struct pm_qos_request {
cc749986 JP	50	struct plist_node node;
82f68251	51	int pm_qos_class;
c4772d19	52	struct delayed_work work; /* for pm_qos_update_request_timeout */
82f68251	53	};
d82b3518	54
5efbe427 RW	55	struct pm_qos_flags_request {
	56	struct list_head node;
	57	s32 flags; /* Do not change to 64 bit */
	58	};
	59
ae0fb4b7	60	enum dev_pm_qos_req_type {
b02f6695	61	DEV_PM_QOS_RESUME_LATENCY = 1,
2d984ad1	62	DEV_PM_QOS_LATENCY_TOLERANCE,
208637b3 VK	63	DEV_PM_QOS_MIN_FREQUENCY,
208637b3 VK	64	DEV_PM_QOS_MAX_FREQUENCY,
ae0fb4b7 RW	65	DEV_PM_QOS_FLAGS,
	66	};
	67
91ff4cb8	68	struct dev_pm_qos_request {
ae0fb4b7	69	enum dev_pm_qos_req_type type;
021c870b RW	70	union {
021c870b RW	71	struct plist_node pnode;
ae0fb4b7	72	struct pm_qos_flags_request flr;
021c870b	73	} data;
91ff4cb8 JP	74	struct device *dev;
	75	};
	76
4e1779ba JP	77	enum pm_qos_type {
	78	PM_QOS_UNITIALIZED,
	79	PM_QOS_MAX, /* return the largest value */
7990da71 TV	80	PM_QOS_MIN, /* return the smallest value */
7990da71 TV	81	PM_QOS_SUM /* return the sum */
4e1779ba JP	82	};
	83
	84	/*
5efbe427 RW	85	* Note: The lockless read path depends on the CPU accessing target_value
5efbe427 RW	86	* or effective_flags atomically. Atomic access is only guaranteed on all CPU
4e1779ba JP	87	* types linux supports for 32 bit quantites
	88	*/
	89	struct pm_qos_constraints {
	90	struct plist_head list;
	91	s32 target_value; /* Do not change to 64 bit */
	92	s32 default_value;
327adaed	93	s32 no_constraint_value;
4e1779ba JP	94	enum pm_qos_type type;
	95	struct blocking_notifier_head *notifiers;
	96	};
	97
5efbe427 RW	98	struct pm_qos_flags {
	99	struct list_head list;
	100	s32 effective_flags; /* Do not change to 64 bit */
	101	};
	102
5f986c59	103	struct dev_pm_qos {
b02f6695	104	struct pm_qos_constraints resume_latency;
2d984ad1	105	struct pm_qos_constraints latency_tolerance;
208637b3 VK	106	struct pm_qos_constraints min_frequency;
208637b3 VK	107	struct pm_qos_constraints max_frequency;
ae0fb4b7	108	struct pm_qos_flags flags;
b02f6695	109	struct dev_pm_qos_request *resume_latency_req;
2d984ad1	110	struct dev_pm_qos_request *latency_tolerance_req;
e39473d0	111	struct dev_pm_qos_request *flags_req;
208637b3 VK	112	struct dev_pm_qos_request *min_frequency_req;
208637b3 VK	113	struct dev_pm_qos_request *max_frequency_req;
5f986c59 RW	114	};
5f986c59 RW	115
abe98ec2 JP	116	/* Action requested to pm_qos_update_target */
	117	enum pm_qos_req_action {
	118	PM_QOS_ADD_REQ, /* Add a new request */
	119	PM_QOS_UPDATE_REQ, /* Update an existing request */
	120	PM_QOS_REMOVE_REQ /* Remove an existing request */
	121	};
	122
91ff4cb8 JP	123	static inline int dev_pm_qos_request_active(struct dev_pm_qos_request *req)
91ff4cb8 JP	124	{
83618092	125	return req->dev != NULL;
91ff4cb8 JP	126	}
91ff4cb8 JP	127
abe98ec2 JP	128	int pm_qos_update_target(struct pm_qos_constraints c, struct plist_node node,
abe98ec2 JP	129	enum pm_qos_req_action action, int value);
5efbe427 RW	130	bool pm_qos_update_flags(struct pm_qos_flags *pqf,
	131	struct pm_qos_flags_request *req,
	132	enum pm_qos_req_action action, s32 val);
cc749986 JP	133	void pm_qos_add_request(struct pm_qos_request *req, int pm_qos_class,
	134	s32 value);
	135	void pm_qos_update_request(struct pm_qos_request *req,
e8db0be1	136	s32 new_value);
c4772d19 MH	137	void pm_qos_update_request_timeout(struct pm_qos_request *req,
c4772d19 MH	138	s32 new_value, unsigned long timeout_us);
cc749986	139	void pm_qos_remove_request(struct pm_qos_request *req);
d82b3518	140
ed77134b MG	141	int pm_qos_request(int pm_qos_class);
	142	int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier);
	143	int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier);
cc749986	144	int pm_qos_request_active(struct pm_qos_request *req);
b66213cd	145	s32 pm_qos_read_value(struct pm_qos_constraints *c);
91ff4cb8	146
a9b542ee	147	#ifdef CONFIG_PM
ae0fb4b7 RW	148	enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask);
ae0fb4b7 RW	149	enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask);
8262331e	150	s32 __dev_pm_qos_resume_latency(struct device *dev);
2a79ea5e	151	s32 dev_pm_qos_read_value(struct device *dev, enum dev_pm_qos_req_type type);
91ff4cb8	152	int dev_pm_qos_add_request(struct device dev, struct dev_pm_qos_request req,
ae0fb4b7	153	enum dev_pm_qos_req_type type, s32 value);
91ff4cb8 JP	154	int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value);
	155	int dev_pm_qos_remove_request(struct dev_pm_qos_request *req);
	156	int dev_pm_qos_add_notifier(struct device *dev,
0b07ee94 VK	157	struct notifier_block *notifier,
0b07ee94 VK	158	enum dev_pm_qos_req_type type);
91ff4cb8	159	int dev_pm_qos_remove_notifier(struct device *dev,
0b07ee94 VK	160	struct notifier_block *notifier,
0b07ee94 VK	161	enum dev_pm_qos_req_type type);
91ff4cb8 JP	162	void dev_pm_qos_constraints_init(struct device *dev);
91ff4cb8 JP	163	void dev_pm_qos_constraints_destroy(struct device *dev);
40a5f8be	164	int dev_pm_qos_add_ancestor_request(struct device *dev,
71d821fd RW	165	struct dev_pm_qos_request *req,
71d821fd RW	166	enum dev_pm_qos_req_type type, s32 value);
d30d819d RW	167	int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value);
	168	void dev_pm_qos_hide_latency_limit(struct device *dev);
	169	int dev_pm_qos_expose_flags(struct device *dev, s32 value);
	170	void dev_pm_qos_hide_flags(struct device *dev);
	171	int dev_pm_qos_update_flags(struct device *dev, s32 mask, bool set);
	172	s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev);
	173	int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val);
13b2c4a0 MW	174	int dev_pm_qos_expose_latency_tolerance(struct device *dev);
13b2c4a0 MW	175	void dev_pm_qos_hide_latency_tolerance(struct device *dev);
d30d819d RW	176
	177	static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
	178	{
	179	return dev->power.qos->resume_latency_req->data.pnode.prio;
	180	}
	181
	182	static inline s32 dev_pm_qos_requested_flags(struct device *dev)
	183	{
	184	return dev->power.qos->flags_req->data.flr.flags;
	185	}
6dbf5cea	186
8262331e	187	static inline s32 dev_pm_qos_raw_resume_latency(struct device *dev)
6dbf5cea RW	188	{
6dbf5cea RW	189	return IS_ERR_OR_NULL(dev->power.qos) ?
0759e80b RW	190	PM_QOS_RESUME_LATENCY_NO_CONSTRAINT :
0759e80b RW	191	pm_qos_read_value(&dev->power.qos->resume_latency);
6dbf5cea	192	}
e8db0be1	193	#else
ae0fb4b7 RW	194	static inline enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev,
	195	s32 mask)
	196	{ return PM_QOS_FLAGS_UNDEFINED; }
	197	static inline enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev,
	198	s32 mask)
	199	{ return PM_QOS_FLAGS_UNDEFINED; }
8262331e	200	static inline s32 __dev_pm_qos_resume_latency(struct device *dev)
0759e80b	201	{ return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; }
2a79ea5e VK	202	static inline s32 dev_pm_qos_read_value(struct device *dev,
	203	enum dev_pm_qos_req_type type)
	204	{
	205	switch (type) {
	206	case DEV_PM_QOS_RESUME_LATENCY:
	207	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
208637b3 VK	208	case DEV_PM_QOS_MIN_FREQUENCY:
	209	return PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
	210	case DEV_PM_QOS_MAX_FREQUENCY:
	211	return PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
2a79ea5e VK	212	default:
	213	WARN_ON(1);
	214	return 0;
	215	}
	216	}
	217
91ff4cb8 JP	218	static inline int dev_pm_qos_add_request(struct device *dev,
91ff4cb8 JP	219	struct dev_pm_qos_request *req,
ae0fb4b7	220	enum dev_pm_qos_req_type type,
91ff4cb8 JP	221	s32 value)
	222	{ return 0; }
	223	static inline int dev_pm_qos_update_request(struct dev_pm_qos_request *req,
	224	s32 new_value)
	225	{ return 0; }
	226	static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req)
	227	{ return 0; }
	228	static inline int dev_pm_qos_add_notifier(struct device *dev,
0b07ee94 VK	229	struct notifier_block *notifier,
0b07ee94 VK	230	enum dev_pm_qos_req_type type)
91ff4cb8 JP	231	{ return 0; }
91ff4cb8 JP	232	static inline int dev_pm_qos_remove_notifier(struct device *dev,
0b07ee94 VK	233	struct notifier_block *notifier,
0b07ee94 VK	234	enum dev_pm_qos_req_type type)
91ff4cb8 JP	235	{ return 0; }
91ff4cb8 JP	236	static inline void dev_pm_qos_constraints_init(struct device *dev)
1a9a9152 RW	237	{
	238	dev->power.power_state = PMSG_ON;
	239	}
91ff4cb8	240	static inline void dev_pm_qos_constraints_destroy(struct device *dev)
1a9a9152 RW	241	{
	242	dev->power.power_state = PMSG_INVALID;
	243	}
40a5f8be	244	static inline int dev_pm_qos_add_ancestor_request(struct device *dev,
71d821fd RW	245	struct dev_pm_qos_request *req,
	246	enum dev_pm_qos_req_type type,
	247	s32 value)
40a5f8be	248	{ return 0; }
85dc0b8a RW	249	static inline int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value)
	250	{ return 0; }
	251	static inline void dev_pm_qos_hide_latency_limit(struct device *dev) {}
e39473d0 RW	252	static inline int dev_pm_qos_expose_flags(struct device *dev, s32 value)
	253	{ return 0; }
	254	static inline void dev_pm_qos_hide_flags(struct device *dev) {}
	255	static inline int dev_pm_qos_update_flags(struct device *dev, s32 m, bool set)
	256	{ return 0; }
2d984ad1 RW	257	static inline s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev)
	258	{ return PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT; }
	259	static inline int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val)
	260	{ return 0; }
13b2c4a0 MW	261	static inline int dev_pm_qos_expose_latency_tolerance(struct device *dev)
	262	{ return 0; }
	263	static inline void dev_pm_qos_hide_latency_tolerance(struct device *dev) {}
e39473d0	264
0759e80b RW	265	static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
	266	{
	267	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
	268	}
e39473d0	269	static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return 0; }
8262331e	270	static inline s32 dev_pm_qos_raw_resume_latency(struct device *dev)
0759e80b RW	271	{
	272	return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
	273	}
85dc0b8a RW	274	#endif
85dc0b8a RW	275
82f68251	276	#endif