Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
607ca46e | 17 | #include <uapi/linux/perf_event.h> |
0793a61d | 18 | |
9f66a381 | 19 | /* |
f3dfd265 | 20 | * Kernel-internal data types and definitions: |
9f66a381 IM |
21 | */ |
22 | ||
cdd6c482 IM |
23 | #ifdef CONFIG_PERF_EVENTS |
24 | # include <asm/perf_event.h> | |
7be79236 | 25 | # include <asm/local64.h> |
f3dfd265 PM |
26 | #endif |
27 | ||
39447b38 | 28 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
29 | int (*is_in_guest)(void); |
30 | int (*is_user_mode)(void); | |
31 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
32 | }; |
33 | ||
2ff6cfd7 AB |
34 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
35 | #include <asm/hw_breakpoint.h> | |
36 | #endif | |
37 | ||
f3dfd265 PM |
38 | #include <linux/list.h> |
39 | #include <linux/mutex.h> | |
40 | #include <linux/rculist.h> | |
41 | #include <linux/rcupdate.h> | |
42 | #include <linux/spinlock.h> | |
d6d020e9 | 43 | #include <linux/hrtimer.h> |
3c446b3d | 44 | #include <linux/fs.h> |
709e50cf | 45 | #include <linux/pid_namespace.h> |
906010b2 | 46 | #include <linux/workqueue.h> |
5331d7b8 | 47 | #include <linux/ftrace.h> |
85cfabbc | 48 | #include <linux/cpu.h> |
e360adbe | 49 | #include <linux/irq_work.h> |
c5905afb | 50 | #include <linux/static_key.h> |
851cf6e7 | 51 | #include <linux/jump_label_ratelimit.h> |
60063497 | 52 | #include <linux/atomic.h> |
641cc938 | 53 | #include <linux/sysfs.h> |
4018994f | 54 | #include <linux/perf_regs.h> |
fadfe7be | 55 | #include <linux/workqueue.h> |
fa588151 | 56 | #include <asm/local.h> |
f3dfd265 | 57 | |
f9188e02 PZ |
58 | struct perf_callchain_entry { |
59 | __u64 nr; | |
60 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
61 | }; | |
62 | ||
3a43ce68 FW |
63 | struct perf_raw_record { |
64 | u32 size; | |
65 | void *data; | |
f413cdb8 FW |
66 | }; |
67 | ||
bce38cd5 SE |
68 | /* |
69 | * branch stack layout: | |
70 | * nr: number of taken branches stored in entries[] | |
71 | * | |
72 | * Note that nr can vary from sample to sample | |
73 | * branches (to, from) are stored from most recent | |
74 | * to least recent, i.e., entries[0] contains the most | |
75 | * recent branch. | |
76 | */ | |
caff2bef PZ |
77 | struct perf_branch_stack { |
78 | __u64 nr; | |
79 | struct perf_branch_entry entries[0]; | |
80 | }; | |
81 | ||
f3dfd265 PM |
82 | struct task_struct; |
83 | ||
efc9f05d SE |
84 | /* |
85 | * extra PMU register associated with an event | |
86 | */ | |
87 | struct hw_perf_event_extra { | |
88 | u64 config; /* register value */ | |
89 | unsigned int reg; /* register address or index */ | |
90 | int alloc; /* extra register already allocated */ | |
91 | int idx; /* index in shared_regs->regs[] */ | |
92 | }; | |
93 | ||
43b45780 AH |
94 | struct event_constraint; |
95 | ||
0793a61d | 96 | /** |
cdd6c482 | 97 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 98 | */ |
cdd6c482 IM |
99 | struct hw_perf_event { |
100 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
101 | union { |
102 | struct { /* hardware */ | |
a308444c | 103 | u64 config; |
447a194b | 104 | u64 last_tag; |
a308444c | 105 | unsigned long config_base; |
cdd6c482 | 106 | unsigned long event_base; |
c48b6053 | 107 | int event_base_rdpmc; |
a308444c | 108 | int idx; |
447a194b | 109 | int last_cpu; |
9fac2cf3 | 110 | int flags; |
bce38cd5 | 111 | |
efc9f05d | 112 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 113 | struct hw_perf_event_extra branch_reg; |
43b45780 AH |
114 | |
115 | struct event_constraint *constraint; | |
d6d020e9 | 116 | }; |
721a669b | 117 | struct { /* software */ |
a308444c | 118 | struct hrtimer hrtimer; |
d6d020e9 | 119 | }; |
f22c1bb6 ON |
120 | struct { /* tracepoint */ |
121 | struct task_struct *tp_target; | |
122 | /* for tp_event->class */ | |
123 | struct list_head tp_list; | |
124 | }; | |
24f1e32c | 125 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 | 126 | struct { /* breakpoint */ |
d580ff86 PZ |
127 | /* |
128 | * Crufty hack to avoid the chicken and egg | |
129 | * problem hw_breakpoint has with context | |
130 | * creation and event initalization. | |
131 | */ | |
132 | struct task_struct *bp_target; | |
f22c1bb6 ON |
133 | struct arch_hw_breakpoint info; |
134 | struct list_head bp_list; | |
45a73372 | 135 | }; |
24f1e32c | 136 | #endif |
d6d020e9 | 137 | }; |
a4eaf7f1 | 138 | int state; |
e7850595 | 139 | local64_t prev_count; |
b23f3325 | 140 | u64 sample_period; |
9e350de3 | 141 | u64 last_period; |
e7850595 | 142 | local64_t period_left; |
e050e3f0 | 143 | u64 interrupts_seq; |
60db5e09 | 144 | u64 interrupts; |
6a24ed6c | 145 | |
abd50713 PZ |
146 | u64 freq_time_stamp; |
147 | u64 freq_count_stamp; | |
ee06094f | 148 | #endif |
0793a61d TG |
149 | }; |
150 | ||
a4eaf7f1 PZ |
151 | /* |
152 | * hw_perf_event::state flags | |
153 | */ | |
154 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
155 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
156 | #define PERF_HES_ARCH 0x04 | |
157 | ||
cdd6c482 | 158 | struct perf_event; |
621a01ea | 159 | |
8d2cacbb PZ |
160 | /* |
161 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
162 | */ | |
163 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 164 | |
53b25335 VW |
165 | /** |
166 | * pmu::capabilities flags | |
167 | */ | |
168 | #define PERF_PMU_CAP_NO_INTERRUPT 0x01 | |
169 | ||
621a01ea | 170 | /** |
4aeb0b42 | 171 | * struct pmu - generic performance monitoring unit |
621a01ea | 172 | */ |
4aeb0b42 | 173 | struct pmu { |
b0a873eb PZ |
174 | struct list_head entry; |
175 | ||
c464c76e | 176 | struct module *module; |
abe43400 | 177 | struct device *dev; |
0c9d42ed | 178 | const struct attribute_group **attr_groups; |
03d8e80b | 179 | const char *name; |
2e80a82a PZ |
180 | int type; |
181 | ||
53b25335 VW |
182 | /* |
183 | * various common per-pmu feature flags | |
184 | */ | |
185 | int capabilities; | |
186 | ||
108b02cf PZ |
187 | int * __percpu pmu_disable_count; |
188 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 189 | int task_ctx_nr; |
62b85639 | 190 | int hrtimer_interval_ms; |
6bde9b6c LM |
191 | |
192 | /* | |
a4eaf7f1 PZ |
193 | * Fully disable/enable this PMU, can be used to protect from the PMI |
194 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 195 | */ |
ad5133b7 PZ |
196 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
197 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 198 | |
8d2cacbb | 199 | /* |
a4eaf7f1 | 200 | * Try and initialize the event for this PMU. |
24cd7f54 | 201 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 202 | */ |
b0a873eb PZ |
203 | int (*event_init) (struct perf_event *event); |
204 | ||
1e0fb9ec AL |
205 | /* |
206 | * Notification that the event was mapped or unmapped. Called | |
207 | * in the context of the mapping task. | |
208 | */ | |
209 | void (*event_mapped) (struct perf_event *event); /*optional*/ | |
210 | void (*event_unmapped) (struct perf_event *event); /*optional*/ | |
211 | ||
a4eaf7f1 PZ |
212 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
213 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
214 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
215 | ||
8d2cacbb | 216 | /* |
a4eaf7f1 PZ |
217 | * Adds/Removes a counter to/from the PMU, can be done inside |
218 | * a transaction, see the ->*_txn() methods. | |
219 | */ | |
220 | int (*add) (struct perf_event *event, int flags); | |
221 | void (*del) (struct perf_event *event, int flags); | |
222 | ||
223 | /* | |
224 | * Starts/Stops a counter present on the PMU. The PMI handler | |
225 | * should stop the counter when perf_event_overflow() returns | |
226 | * !0. ->start() will be used to continue. | |
227 | */ | |
228 | void (*start) (struct perf_event *event, int flags); | |
229 | void (*stop) (struct perf_event *event, int flags); | |
230 | ||
231 | /* | |
232 | * Updates the counter value of the event. | |
233 | */ | |
cdd6c482 | 234 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
235 | |
236 | /* | |
24cd7f54 PZ |
237 | * Group events scheduling is treated as a transaction, add |
238 | * group events as a whole and perform one schedulability test. | |
239 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
240 | * |
241 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 242 | * do schedulability tests. |
8d2cacbb | 243 | */ |
e7e7ee2e | 244 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 245 | /* |
a4eaf7f1 | 246 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
247 | * then ->commit_txn() is required to perform one. On success |
248 | * the transaction is closed. On error the transaction is kept | |
249 | * open until ->cancel_txn() is called. | |
250 | */ | |
e7e7ee2e | 251 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 252 | /* |
a4eaf7f1 | 253 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 254 | * for each successful ->add() during the transaction. |
8d2cacbb | 255 | */ |
e7e7ee2e | 256 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
35edc2a5 PZ |
257 | |
258 | /* | |
259 | * Will return the value for perf_event_mmap_page::index for this event, | |
260 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
261 | */ | |
262 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 SE |
263 | |
264 | /* | |
265 | * flush branch stack on context-switches (needed in cpu-wide mode) | |
266 | */ | |
267 | void (*flush_branch_stack) (void); | |
ba532500 YZ |
268 | |
269 | /* | |
270 | * context-switches callback | |
271 | */ | |
272 | void (*sched_task) (struct perf_event_context *ctx, | |
273 | bool sched_in); | |
4af57ef2 YZ |
274 | /* |
275 | * PMU specific data size | |
276 | */ | |
277 | size_t task_ctx_size; | |
ba532500 | 278 | |
621a01ea IM |
279 | }; |
280 | ||
6a930700 | 281 | /** |
cdd6c482 | 282 | * enum perf_event_active_state - the states of a event |
6a930700 | 283 | */ |
cdd6c482 | 284 | enum perf_event_active_state { |
179033b3 | 285 | PERF_EVENT_STATE_EXIT = -3, |
57c0c15b | 286 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
287 | PERF_EVENT_STATE_OFF = -1, |
288 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 289 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
290 | }; |
291 | ||
9b51f66d | 292 | struct file; |
453f19ee PZ |
293 | struct perf_sample_data; |
294 | ||
a8b0ca17 | 295 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
296 | struct perf_sample_data *, |
297 | struct pt_regs *regs); | |
298 | ||
d6f962b5 | 299 | enum perf_group_flag { |
e7e7ee2e | 300 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
301 | }; |
302 | ||
e7e7ee2e IM |
303 | #define SWEVENT_HLIST_BITS 8 |
304 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
305 | |
306 | struct swevent_hlist { | |
e7e7ee2e IM |
307 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
308 | struct rcu_head rcu_head; | |
76e1d904 FW |
309 | }; |
310 | ||
8a49542c PZ |
311 | #define PERF_ATTACH_CONTEXT 0x01 |
312 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 313 | #define PERF_ATTACH_TASK 0x04 |
4af57ef2 | 314 | #define PERF_ATTACH_TASK_DATA 0x08 |
8a49542c | 315 | |
877c6856 | 316 | struct perf_cgroup; |
76369139 FW |
317 | struct ring_buffer; |
318 | ||
0793a61d | 319 | /** |
cdd6c482 | 320 | * struct perf_event - performance event kernel representation: |
0793a61d | 321 | */ |
cdd6c482 IM |
322 | struct perf_event { |
323 | #ifdef CONFIG_PERF_EVENTS | |
9886167d PZ |
324 | /* |
325 | * entry onto perf_event_context::event_list; | |
326 | * modifications require ctx->lock | |
327 | * RCU safe iterations. | |
328 | */ | |
592903cd | 329 | struct list_head event_entry; |
9886167d PZ |
330 | |
331 | /* | |
332 | * XXX: group_entry and sibling_list should be mutually exclusive; | |
333 | * either you're a sibling on a group, or you're the group leader. | |
334 | * Rework the code to always use the same list element. | |
335 | * | |
336 | * Locked for modification by both ctx->mutex and ctx->lock; holding | |
337 | * either sufficies for read. | |
338 | */ | |
339 | struct list_head group_entry; | |
04289bb9 | 340 | struct list_head sibling_list; |
9886167d PZ |
341 | |
342 | /* | |
343 | * We need storage to track the entries in perf_pmu_migrate_context; we | |
344 | * cannot use the event_entry because of RCU and we want to keep the | |
345 | * group in tact which avoids us using the other two entries. | |
346 | */ | |
347 | struct list_head migrate_entry; | |
348 | ||
f3ae75de SE |
349 | struct hlist_node hlist_entry; |
350 | struct list_head active_entry; | |
0127c3ea | 351 | int nr_siblings; |
d6f962b5 | 352 | int group_flags; |
cdd6c482 | 353 | struct perf_event *group_leader; |
a4eaf7f1 | 354 | struct pmu *pmu; |
04289bb9 | 355 | |
cdd6c482 | 356 | enum perf_event_active_state state; |
8a49542c | 357 | unsigned int attach_state; |
e7850595 | 358 | local64_t count; |
a6e6dea6 | 359 | atomic64_t child_count; |
ee06094f | 360 | |
53cfbf59 | 361 | /* |
cdd6c482 | 362 | * These are the total time in nanoseconds that the event |
53cfbf59 | 363 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 364 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
365 | * and running (scheduled onto the CPU), respectively. |
366 | * | |
367 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 368 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
369 | */ |
370 | u64 total_time_enabled; | |
371 | u64 total_time_running; | |
372 | ||
373 | /* | |
374 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 375 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
376 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
377 | * in time. | |
cdd6c482 IM |
378 | * tstamp_enabled: the notional time when the event was enabled |
379 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 380 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 381 | * event was scheduled off. |
53cfbf59 PM |
382 | */ |
383 | u64 tstamp_enabled; | |
384 | u64 tstamp_running; | |
385 | u64 tstamp_stopped; | |
386 | ||
eed01528 SE |
387 | /* |
388 | * timestamp shadows the actual context timing but it can | |
389 | * be safely used in NMI interrupt context. It reflects the | |
390 | * context time as it was when the event was last scheduled in. | |
391 | * | |
392 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
393 | * compute ctx_time for a sample, simply add perf_clock(). | |
394 | */ | |
395 | u64 shadow_ctx_time; | |
396 | ||
24f1e32c | 397 | struct perf_event_attr attr; |
c320c7b7 | 398 | u16 header_size; |
6844c09d | 399 | u16 id_header_size; |
c320c7b7 | 400 | u16 read_size; |
cdd6c482 | 401 | struct hw_perf_event hw; |
0793a61d | 402 | |
cdd6c482 | 403 | struct perf_event_context *ctx; |
a6fa941d | 404 | atomic_long_t refcount; |
0793a61d | 405 | |
53cfbf59 PM |
406 | /* |
407 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 408 | * events have been enabled and running, respectively. |
53cfbf59 PM |
409 | */ |
410 | atomic64_t child_total_time_enabled; | |
411 | atomic64_t child_total_time_running; | |
412 | ||
0793a61d | 413 | /* |
d859e29f | 414 | * Protect attach/detach and child_list: |
0793a61d | 415 | */ |
fccc714b PZ |
416 | struct mutex child_mutex; |
417 | struct list_head child_list; | |
cdd6c482 | 418 | struct perf_event *parent; |
0793a61d TG |
419 | |
420 | int oncpu; | |
421 | int cpu; | |
422 | ||
082ff5a2 PZ |
423 | struct list_head owner_entry; |
424 | struct task_struct *owner; | |
425 | ||
7b732a75 PZ |
426 | /* mmap bits */ |
427 | struct mutex mmap_mutex; | |
428 | atomic_t mmap_count; | |
26cb63ad | 429 | |
76369139 | 430 | struct ring_buffer *rb; |
10c6db11 | 431 | struct list_head rb_entry; |
b69cf536 PZ |
432 | unsigned long rcu_batches; |
433 | int rcu_pending; | |
37d81828 | 434 | |
7b732a75 | 435 | /* poll related */ |
0793a61d | 436 | wait_queue_head_t waitq; |
3c446b3d | 437 | struct fasync_struct *fasync; |
79f14641 PZ |
438 | |
439 | /* delayed work for NMIs and such */ | |
440 | int pending_wakeup; | |
4c9e2542 | 441 | int pending_kill; |
79f14641 | 442 | int pending_disable; |
e360adbe | 443 | struct irq_work pending; |
592903cd | 444 | |
79f14641 PZ |
445 | atomic_t event_limit; |
446 | ||
cdd6c482 | 447 | void (*destroy)(struct perf_event *); |
592903cd | 448 | struct rcu_head rcu_head; |
709e50cf PZ |
449 | |
450 | struct pid_namespace *ns; | |
8e5799b1 | 451 | u64 id; |
6fb2915d | 452 | |
b326e956 | 453 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 454 | void *overflow_handler_context; |
453f19ee | 455 | |
07b139c8 | 456 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 457 | struct ftrace_event_call *tp_event; |
6fb2915d | 458 | struct event_filter *filter; |
ced39002 JO |
459 | #ifdef CONFIG_FUNCTION_TRACER |
460 | struct ftrace_ops ftrace_ops; | |
461 | #endif | |
ee06094f | 462 | #endif |
6fb2915d | 463 | |
e5d1367f SE |
464 | #ifdef CONFIG_CGROUP_PERF |
465 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
466 | int cgrp_defer_enabled; | |
467 | #endif | |
468 | ||
6fb2915d | 469 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
470 | }; |
471 | ||
472 | /** | |
cdd6c482 | 473 | * struct perf_event_context - event context structure |
0793a61d | 474 | * |
cdd6c482 | 475 | * Used as a container for task events and CPU events as well: |
0793a61d | 476 | */ |
cdd6c482 | 477 | struct perf_event_context { |
108b02cf | 478 | struct pmu *pmu; |
0793a61d | 479 | /* |
cdd6c482 | 480 | * Protect the states of the events in the list, |
d859e29f | 481 | * nr_active, and the list: |
0793a61d | 482 | */ |
e625cce1 | 483 | raw_spinlock_t lock; |
d859e29f | 484 | /* |
cdd6c482 | 485 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
486 | * is sufficient to ensure the list doesn't change; to change |
487 | * the list you need to lock both the mutex and the spinlock. | |
488 | */ | |
a308444c | 489 | struct mutex mutex; |
04289bb9 | 490 | |
2fde4f94 | 491 | struct list_head active_ctx_list; |
889ff015 FW |
492 | struct list_head pinned_groups; |
493 | struct list_head flexible_groups; | |
a308444c | 494 | struct list_head event_list; |
cdd6c482 | 495 | int nr_events; |
a308444c IM |
496 | int nr_active; |
497 | int is_active; | |
bfbd3381 | 498 | int nr_stat; |
0f5a2601 | 499 | int nr_freq; |
dddd3379 | 500 | int rotate_disable; |
a308444c IM |
501 | atomic_t refcount; |
502 | struct task_struct *task; | |
53cfbf59 PM |
503 | |
504 | /* | |
4af4998b | 505 | * Context clock, runs when context enabled. |
53cfbf59 | 506 | */ |
a308444c IM |
507 | u64 time; |
508 | u64 timestamp; | |
564c2b21 PM |
509 | |
510 | /* | |
511 | * These fields let us detect when two contexts have both | |
512 | * been cloned (inherited) from a common ancestor. | |
513 | */ | |
cdd6c482 | 514 | struct perf_event_context *parent_ctx; |
a308444c IM |
515 | u64 parent_gen; |
516 | u64 generation; | |
517 | int pin_count; | |
d010b332 | 518 | int nr_cgroups; /* cgroup evts */ |
4af57ef2 | 519 | void *task_ctx_data; /* pmu specific data */ |
28009ce4 | 520 | struct rcu_head rcu_head; |
fadfe7be JO |
521 | |
522 | struct delayed_work orphans_remove; | |
523 | bool orphans_remove_sched; | |
0793a61d TG |
524 | }; |
525 | ||
7ae07ea3 FW |
526 | /* |
527 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 528 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
529 | */ |
530 | #define PERF_NR_CONTEXTS 4 | |
531 | ||
0793a61d | 532 | /** |
cdd6c482 | 533 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
534 | */ |
535 | struct perf_cpu_context { | |
cdd6c482 IM |
536 | struct perf_event_context ctx; |
537 | struct perf_event_context *task_ctx; | |
0793a61d | 538 | int active_oncpu; |
3b6f9e5c | 539 | int exclusive; |
9e630205 SE |
540 | struct hrtimer hrtimer; |
541 | ktime_t hrtimer_interval; | |
3f1f3320 | 542 | struct pmu *unique_pmu; |
e5d1367f | 543 | struct perf_cgroup *cgrp; |
0793a61d TG |
544 | }; |
545 | ||
5622f295 | 546 | struct perf_output_handle { |
57c0c15b | 547 | struct perf_event *event; |
76369139 | 548 | struct ring_buffer *rb; |
6d1acfd5 | 549 | unsigned long wakeup; |
5d967a8b PZ |
550 | unsigned long size; |
551 | void *addr; | |
552 | int page; | |
5622f295 MM |
553 | }; |
554 | ||
cdd6c482 | 555 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 556 | |
03d8e80b | 557 | extern int perf_pmu_register(struct pmu *pmu, const char *name, int type); |
b0a873eb | 558 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 559 | |
3bf101ba | 560 | extern int perf_num_counters(void); |
84c79910 | 561 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
562 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
563 | struct task_struct *task); | |
564 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
565 | struct task_struct *next); | |
cdd6c482 IM |
566 | extern int perf_event_init_task(struct task_struct *child); |
567 | extern void perf_event_exit_task(struct task_struct *child); | |
568 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 569 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 570 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
571 | extern void perf_pmu_disable(struct pmu *pmu); |
572 | extern void perf_pmu_enable(struct pmu *pmu); | |
ba532500 YZ |
573 | extern void perf_sched_cb_dec(struct pmu *pmu); |
574 | extern void perf_sched_cb_inc(struct pmu *pmu); | |
cdd6c482 IM |
575 | extern int perf_event_task_disable(void); |
576 | extern int perf_event_task_enable(void); | |
26ca5c11 | 577 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 578 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
579 | extern int perf_event_release_kernel(struct perf_event *event); |
580 | extern struct perf_event * | |
581 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
582 | int cpu, | |
38a81da2 | 583 | struct task_struct *task, |
4dc0da86 AK |
584 | perf_overflow_handler_t callback, |
585 | void *context); | |
0cda4c02 YZ |
586 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
587 | int src_cpu, int dst_cpu); | |
59ed446f PZ |
588 | extern u64 perf_event_read_value(struct perf_event *event, |
589 | u64 *enabled, u64 *running); | |
5c92d124 | 590 | |
d010b332 | 591 | |
df1a132b | 592 | struct perf_sample_data { |
2565711f PZ |
593 | /* |
594 | * Fields set by perf_sample_data_init(), group so as to | |
595 | * minimize the cachelines touched. | |
596 | */ | |
597 | u64 addr; | |
598 | struct perf_raw_record *raw; | |
599 | struct perf_branch_stack *br_stack; | |
600 | u64 period; | |
601 | u64 weight; | |
602 | u64 txn; | |
603 | union perf_mem_data_src data_src; | |
5622f295 | 604 | |
2565711f PZ |
605 | /* |
606 | * The other fields, optionally {set,used} by | |
607 | * perf_{prepare,output}_sample(). | |
608 | */ | |
609 | u64 type; | |
5622f295 MM |
610 | u64 ip; |
611 | struct { | |
612 | u32 pid; | |
613 | u32 tid; | |
614 | } tid_entry; | |
615 | u64 time; | |
5622f295 MM |
616 | u64 id; |
617 | u64 stream_id; | |
618 | struct { | |
619 | u32 cpu; | |
620 | u32 reserved; | |
621 | } cpu_entry; | |
5622f295 | 622 | struct perf_callchain_entry *callchain; |
88a7c26a AL |
623 | |
624 | /* | |
625 | * regs_user may point to task_pt_regs or to regs_user_copy, depending | |
626 | * on arch details. | |
627 | */ | |
60e2364e | 628 | struct perf_regs regs_user; |
88a7c26a AL |
629 | struct pt_regs regs_user_copy; |
630 | ||
60e2364e | 631 | struct perf_regs regs_intr; |
c5ebcedb | 632 | u64 stack_user_size; |
2565711f | 633 | } ____cacheline_aligned; |
df1a132b | 634 | |
770eee1f SE |
635 | /* default value for data source */ |
636 | #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ | |
637 | PERF_MEM_S(LVL, NA) |\ | |
638 | PERF_MEM_S(SNOOP, NA) |\ | |
639 | PERF_MEM_S(LOCK, NA) |\ | |
640 | PERF_MEM_S(TLB, NA)) | |
641 | ||
fd0d000b RR |
642 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
643 | u64 addr, u64 period) | |
dc1d628a | 644 | { |
fd0d000b | 645 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
646 | data->addr = addr; |
647 | data->raw = NULL; | |
bce38cd5 | 648 | data->br_stack = NULL; |
4018994f | 649 | data->period = period; |
c3feedf2 | 650 | data->weight = 0; |
770eee1f | 651 | data->data_src.val = PERF_MEM_NA; |
fdfbbd07 | 652 | data->txn = 0; |
dc1d628a PZ |
653 | } |
654 | ||
5622f295 MM |
655 | extern void perf_output_sample(struct perf_output_handle *handle, |
656 | struct perf_event_header *header, | |
657 | struct perf_sample_data *data, | |
cdd6c482 | 658 | struct perf_event *event); |
5622f295 MM |
659 | extern void perf_prepare_sample(struct perf_event_header *header, |
660 | struct perf_sample_data *data, | |
cdd6c482 | 661 | struct perf_event *event, |
5622f295 MM |
662 | struct pt_regs *regs); |
663 | ||
a8b0ca17 | 664 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
665 | struct perf_sample_data *data, |
666 | struct pt_regs *regs); | |
df1a132b | 667 | |
6c7e550f FBH |
668 | static inline bool is_sampling_event(struct perf_event *event) |
669 | { | |
670 | return event->attr.sample_period != 0; | |
671 | } | |
672 | ||
3b6f9e5c | 673 | /* |
cdd6c482 | 674 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 675 | */ |
cdd6c482 | 676 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 677 | { |
89a1e187 | 678 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
679 | } |
680 | ||
c5905afb | 681 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 682 | |
86038c5e | 683 | extern void ___perf_sw_event(u32, u64, struct pt_regs *, u64); |
a8b0ca17 | 684 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 685 | |
b0f82b81 | 686 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 687 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 688 | #endif |
5331d7b8 FW |
689 | |
690 | /* | |
691 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
692 | * the nth caller. We only need a few of the regs: | |
693 | * - ip for PERF_SAMPLE_IP | |
694 | * - cs for user_mode() tests | |
695 | * - bp for callchains | |
696 | * - eflags, for future purposes, just in case | |
697 | */ | |
b0f82b81 | 698 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 699 | { |
5331d7b8 FW |
700 | memset(regs, 0, sizeof(*regs)); |
701 | ||
b0f82b81 | 702 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
703 | } |
704 | ||
7e54a5a0 | 705 | static __always_inline void |
a8b0ca17 | 706 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 707 | { |
86038c5e PZI |
708 | if (static_key_false(&perf_swevent_enabled[event_id])) |
709 | __perf_sw_event(event_id, nr, regs, addr); | |
710 | } | |
711 | ||
712 | DECLARE_PER_CPU(struct pt_regs, __perf_regs[4]); | |
7e54a5a0 | 713 | |
86038c5e PZI |
714 | /* |
715 | * 'Special' version for the scheduler, it hard assumes no recursion, | |
716 | * which is guaranteed by us not actually scheduling inside other swevents | |
717 | * because those disable preemption. | |
718 | */ | |
719 | static __always_inline void | |
720 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) | |
721 | { | |
c5905afb | 722 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
86038c5e PZI |
723 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); |
724 | ||
725 | perf_fetch_caller_regs(regs); | |
726 | ___perf_sw_event(event_id, nr, regs, addr); | |
e49a5bd3 FW |
727 | } |
728 | } | |
729 | ||
c5905afb | 730 | extern struct static_key_deferred perf_sched_events; |
ee6dcfa4 | 731 | |
ab0cce56 | 732 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 733 | struct task_struct *task) |
ab0cce56 JO |
734 | { |
735 | if (static_key_false(&perf_sched_events.key)) | |
736 | __perf_event_task_sched_in(prev, task); | |
737 | } | |
738 | ||
739 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
740 | struct task_struct *next) | |
ee6dcfa4 | 741 | { |
86038c5e | 742 | perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0); |
ee6dcfa4 | 743 | |
c5905afb | 744 | if (static_key_false(&perf_sched_events.key)) |
ab0cce56 | 745 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
746 | } |
747 | ||
3af9e859 | 748 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 749 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
750 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
751 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 752 | |
e041e328 | 753 | extern void perf_event_exec(void); |
82b89778 | 754 | extern void perf_event_comm(struct task_struct *tsk, bool exec); |
cdd6c482 | 755 | extern void perf_event_fork(struct task_struct *tsk); |
8d1b2d93 | 756 | |
56962b44 FW |
757 | /* Callchains */ |
758 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
759 | ||
e7e7ee2e IM |
760 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
761 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 762 | |
e7e7ee2e | 763 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
764 | { |
765 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
766 | entry->ip[entry->nr++] = ip; | |
767 | } | |
394ee076 | 768 | |
cdd6c482 IM |
769 | extern int sysctl_perf_event_paranoid; |
770 | extern int sysctl_perf_event_mlock; | |
771 | extern int sysctl_perf_event_sample_rate; | |
14c63f17 DH |
772 | extern int sysctl_perf_cpu_time_max_percent; |
773 | ||
774 | extern void perf_sample_event_took(u64 sample_len_ns); | |
1ccd1549 | 775 | |
163ec435 PZ |
776 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
777 | void __user *buffer, size_t *lenp, | |
778 | loff_t *ppos); | |
14c63f17 DH |
779 | extern int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, |
780 | void __user *buffer, size_t *lenp, | |
781 | loff_t *ppos); | |
782 | ||
163ec435 | 783 | |
320ebf09 PZ |
784 | static inline bool perf_paranoid_tracepoint_raw(void) |
785 | { | |
786 | return sysctl_perf_event_paranoid > -1; | |
787 | } | |
788 | ||
789 | static inline bool perf_paranoid_cpu(void) | |
790 | { | |
791 | return sysctl_perf_event_paranoid > 0; | |
792 | } | |
793 | ||
794 | static inline bool perf_paranoid_kernel(void) | |
795 | { | |
796 | return sysctl_perf_event_paranoid > 1; | |
797 | } | |
798 | ||
cdd6c482 | 799 | extern void perf_event_init(void); |
1c024eca PZ |
800 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
801 | int entry_size, struct pt_regs *regs, | |
e6dab5ff AV |
802 | struct hlist_head *head, int rctx, |
803 | struct task_struct *task); | |
24f1e32c | 804 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 805 | |
9d23a90a | 806 | #ifndef perf_misc_flags |
e7e7ee2e IM |
807 | # define perf_misc_flags(regs) \ |
808 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
809 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
810 | #endif |
811 | ||
bce38cd5 SE |
812 | static inline bool has_branch_stack(struct perf_event *event) |
813 | { | |
814 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
a46a2300 YZ |
815 | } |
816 | ||
817 | static inline bool needs_branch_stack(struct perf_event *event) | |
818 | { | |
819 | return event->attr.branch_sample_type != 0; | |
bce38cd5 SE |
820 | } |
821 | ||
5622f295 | 822 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 823 | struct perf_event *event, unsigned int size); |
5622f295 | 824 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 825 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 826 | const void *buf, unsigned int len); |
5685e0ff JO |
827 | extern unsigned int perf_output_skip(struct perf_output_handle *handle, |
828 | unsigned int len); | |
4ed7c92d PZ |
829 | extern int perf_swevent_get_recursion_context(void); |
830 | extern void perf_swevent_put_recursion_context(int rctx); | |
ab573844 | 831 | extern u64 perf_swevent_set_period(struct perf_event *event); |
44234adc FW |
832 | extern void perf_event_enable(struct perf_event *event); |
833 | extern void perf_event_disable(struct perf_event *event); | |
500ad2d8 | 834 | extern int __perf_event_disable(void *info); |
e9d2b064 | 835 | extern void perf_event_task_tick(void); |
e041e328 | 836 | #else /* !CONFIG_PERF_EVENTS: */ |
0793a61d | 837 | static inline void |
ab0cce56 JO |
838 | perf_event_task_sched_in(struct task_struct *prev, |
839 | struct task_struct *task) { } | |
840 | static inline void | |
841 | perf_event_task_sched_out(struct task_struct *prev, | |
842 | struct task_struct *next) { } | |
cdd6c482 IM |
843 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
844 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
845 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 846 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 847 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
848 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
849 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
850 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
851 | { | |
852 | return -EINVAL; | |
853 | } | |
15dbf27c | 854 | |
925d519a | 855 | static inline void |
a8b0ca17 | 856 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 857 | static inline void |
86038c5e PZI |
858 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) { } |
859 | static inline void | |
184f412c | 860 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 861 | |
39447b38 | 862 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 863 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 864 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 865 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 866 | |
57c0c15b | 867 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
e041e328 | 868 | static inline void perf_event_exec(void) { } |
82b89778 | 869 | static inline void perf_event_comm(struct task_struct *tsk, bool exec) { } |
cdd6c482 IM |
870 | static inline void perf_event_fork(struct task_struct *tsk) { } |
871 | static inline void perf_event_init(void) { } | |
184f412c | 872 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 873 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
ab573844 | 874 | static inline u64 perf_swevent_set_period(struct perf_event *event) { return 0; } |
44234adc FW |
875 | static inline void perf_event_enable(struct perf_event *event) { } |
876 | static inline void perf_event_disable(struct perf_event *event) { } | |
500ad2d8 | 877 | static inline int __perf_event_disable(void *info) { return -1; } |
e9d2b064 | 878 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
879 | #endif |
880 | ||
026249ef FW |
881 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_NO_HZ_FULL) |
882 | extern bool perf_event_can_stop_tick(void); | |
883 | #else | |
884 | static inline bool perf_event_can_stop_tick(void) { return true; } | |
885 | #endif | |
886 | ||
6c4d3bc9 DR |
887 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) |
888 | extern void perf_restore_debug_store(void); | |
889 | #else | |
1d9d8639 | 890 | static inline void perf_restore_debug_store(void) { } |
0793a61d TG |
891 | #endif |
892 | ||
e7e7ee2e | 893 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 894 | |
3f6da390 | 895 | /* |
0a0fca9d | 896 | * This has to have a higher priority than migration_notifier in sched/core.c. |
3f6da390 | 897 | */ |
e7e7ee2e IM |
898 | #define perf_cpu_notifier(fn) \ |
899 | do { \ | |
0db0628d | 900 | static struct notifier_block fn##_nb = \ |
e7e7ee2e | 901 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ |
c13d38e4 | 902 | unsigned long cpu = smp_processor_id(); \ |
6760bca9 | 903 | unsigned long flags; \ |
f0bdb5e0 SB |
904 | \ |
905 | cpu_notifier_register_begin(); \ | |
e7e7ee2e | 906 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ |
c13d38e4 | 907 | (void *)(unsigned long)cpu); \ |
6760bca9 | 908 | local_irq_save(flags); \ |
e7e7ee2e | 909 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ |
c13d38e4 | 910 | (void *)(unsigned long)cpu); \ |
6760bca9 | 911 | local_irq_restore(flags); \ |
e7e7ee2e | 912 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ |
c13d38e4 | 913 | (void *)(unsigned long)cpu); \ |
f0bdb5e0 SB |
914 | __register_cpu_notifier(&fn##_nb); \ |
915 | cpu_notifier_register_done(); \ | |
3f6da390 PZ |
916 | } while (0) |
917 | ||
f0bdb5e0 SB |
918 | /* |
919 | * Bare-bones version of perf_cpu_notifier(), which doesn't invoke the | |
920 | * callback for already online CPUs. | |
921 | */ | |
922 | #define __perf_cpu_notifier(fn) \ | |
923 | do { \ | |
924 | static struct notifier_block fn##_nb = \ | |
925 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
926 | \ | |
927 | __register_cpu_notifier(&fn##_nb); \ | |
928 | } while (0) | |
641cc938 | 929 | |
2663960c SB |
930 | struct perf_pmu_events_attr { |
931 | struct device_attribute attr; | |
932 | u64 id; | |
3a54aaa0 | 933 | const char *event_str; |
2663960c SB |
934 | }; |
935 | ||
936 | #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ | |
937 | static struct perf_pmu_events_attr _var = { \ | |
938 | .attr = __ATTR(_name, 0444, _show, NULL), \ | |
939 | .id = _id, \ | |
940 | }; | |
941 | ||
641cc938 JO |
942 | #define PMU_FORMAT_ATTR(_name, _format) \ |
943 | static ssize_t \ | |
944 | _name##_show(struct device *dev, \ | |
945 | struct device_attribute *attr, \ | |
946 | char *page) \ | |
947 | { \ | |
948 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
949 | return sprintf(page, _format "\n"); \ | |
950 | } \ | |
951 | \ | |
952 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
953 | ||
cdd6c482 | 954 | #endif /* _LINUX_PERF_EVENT_H */ |