[linux-2.6-block.git] / include / linux / mmc / host.h

/*
 *  linux/include/linux/mmc/host.h
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  Host driver specific definitions.
 */
#ifndef LINUX_MMC_HOST_H
#define LINUX_MMC_HOST_H

#include <linux/leds.h>
#include <linux/sched.h>
#include <linux/device.h>
#include <linux/fault-inject.h>

#include <linux/mmc/core.h>
#include <linux/mmc/pm.h>

struct mmc_ios {
	unsigned int	clock;			/* clock rate */
	unsigned short	vdd;

/* vdd stores the bit number of the selected voltage range from below. */

	unsigned char	bus_mode;		/* command output mode */

#define MMC_BUSMODE_OPENDRAIN	1
#define MMC_BUSMODE_PUSHPULL	2

	unsigned char	chip_select;		/* SPI chip select */

#define MMC_CS_DONTCARE		0
#define MMC_CS_HIGH		1
#define MMC_CS_LOW		2

	unsigned char	power_mode;		/* power supply mode */

#define MMC_POWER_OFF		0
#define MMC_POWER_UP		1
#define MMC_POWER_ON		2

	unsigned char	bus_width;		/* data bus width */

#define MMC_BUS_WIDTH_1		0
#define MMC_BUS_WIDTH_4		2
#define MMC_BUS_WIDTH_8		3

	unsigned char	timing;			/* timing specification used */

#define MMC_TIMING_LEGACY	0
#define MMC_TIMING_MMC_HS	1
#define MMC_TIMING_SD_HS	2
#define MMC_TIMING_UHS_SDR12	MMC_TIMING_LEGACY
#define MMC_TIMING_UHS_SDR25	MMC_TIMING_SD_HS
#define MMC_TIMING_UHS_SDR50	3
#define MMC_TIMING_UHS_SDR104	4
#define MMC_TIMING_UHS_DDR50	5
#define MMC_TIMING_MMC_HS200	6

#define MMC_SDR_MODE		0
#define MMC_1_2V_DDR_MODE	1
#define MMC_1_8V_DDR_MODE	2
#define MMC_1_2V_SDR_MODE	3
#define MMC_1_8V_SDR_MODE	4

	unsigned char	signal_voltage;		/* signalling voltage (1.8V or 3.3V) */

#define MMC_SIGNAL_VOLTAGE_330	0
#define MMC_SIGNAL_VOLTAGE_180	1
#define MMC_SIGNAL_VOLTAGE_120	2

	unsigned char	drv_type;		/* driver type (A, B, C, D) */

#define MMC_SET_DRIVER_TYPE_B	0
#define MMC_SET_DRIVER_TYPE_A	1
#define MMC_SET_DRIVER_TYPE_C	2
#define MMC_SET_DRIVER_TYPE_D	3
};

struct mmc_host_ops {
	/*
	 * 'enable' is called when the host is claimed and 'disable' is called
	 * when the host is released. 'enable' and 'disable' are deprecated.
	 */
	int (*enable)(struct mmc_host *host);
	int (*disable)(struct mmc_host *host);
	/*
	 * It is optional for the host to implement pre_req and post_req in
	 * order to support double buffering of requests (prepare one
	 * request while another request is active).
	 * pre_req() must always be followed by a post_req().
	 * To undo a call made to pre_req(), call post_req() with
	 * a nonzero err condition.
	 */
	void	(*post_req)(struct mmc_host *host, struct mmc_request *req,
			    int err);
	void	(*pre_req)(struct mmc_host *host, struct mmc_request *req,
			   bool is_first_req);
	void	(*request)(struct mmc_host *host, struct mmc_request *req);
	/*
	 * Avoid calling these three functions too often or in a "fast path",
	 * since underlaying controller might implement them in an expensive
	 * and/or slow way.
	 *
	 * Also note that these functions might sleep, so don't call them
	 * in the atomic contexts!
	 *
	 * Return values for the get_ro callback should be:
	 *   0 for a read/write card
	 *   1 for a read-only card
	 *   -ENOSYS when not supported (equal to NULL callback)
	 *   or a negative errno value when something bad happened
	 *
	 * Return values for the get_cd callback should be:
	 *   0 for a absent card
	 *   1 for a present card
	 *   -ENOSYS when not supported (equal to NULL callback)
	 *   or a negative errno value when something bad happened
	 */
	void	(*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
	int	(*get_ro)(struct mmc_host *host);
	int	(*get_cd)(struct mmc_host *host);

	void	(*enable_sdio_irq)(struct mmc_host *host, int enable);

	/* optional callback for HC quirks */
	void	(*init_card)(struct mmc_host *host, struct mmc_card *card);

	int	(*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);

	/* The tuning command opcode value is different for SD and eMMC cards */
	int	(*execute_tuning)(struct mmc_host *host, u32 opcode);
	void	(*enable_preset_value)(struct mmc_host *host, bool enable);
	int	(*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
	void	(*hw_reset)(struct mmc_host *host);
};

struct mmc_card;
struct device;

struct mmc_async_req {
	/* active mmc request */
	struct mmc_request	*mrq;
	/*
	 * Check error status of completed mmc request.
	 * Returns 0 if success otherwise non zero.
	 */
	int (*err_check) (struct mmc_card *, struct mmc_async_req *);
};

struct mmc_hotplug {
	unsigned int irq;
	void *handler_priv;
};

struct mmc_host {
	struct device		*parent;
	struct device		class_dev;
	int			index;
	const struct mmc_host_ops *ops;
	unsigned int		f_min;
	unsigned int		f_max;
	unsigned int		f_init;
	u32			ocr_avail;
	u32			ocr_avail_sdio;	/* SDIO-specific OCR */
	u32			ocr_avail_sd;	/* SD-specific OCR */
	u32			ocr_avail_mmc;	/* MMC-specific OCR */
	struct notifier_block	pm_notify;

#define MMC_VDD_165_195		0x00000080	/* VDD voltage 1.65 - 1.95 */
#define MMC_VDD_20_21		0x00000100	/* VDD voltage 2.0 ~ 2.1 */
#define MMC_VDD_21_22		0x00000200	/* VDD voltage 2.1 ~ 2.2 */
#define MMC_VDD_22_23		0x00000400	/* VDD voltage 2.2 ~ 2.3 */
#define MMC_VDD_23_24		0x00000800	/* VDD voltage 2.3 ~ 2.4 */
#define MMC_VDD_24_25		0x00001000	/* VDD voltage 2.4 ~ 2.5 */
#define MMC_VDD_25_26		0x00002000	/* VDD voltage 2.5 ~ 2.6 */
#define MMC_VDD_26_27		0x00004000	/* VDD voltage 2.6 ~ 2.7 */
#define MMC_VDD_27_28		0x00008000	/* VDD voltage 2.7 ~ 2.8 */
#define MMC_VDD_28_29		0x00010000	/* VDD voltage 2.8 ~ 2.9 */
#define MMC_VDD_29_30		0x00020000	/* VDD voltage 2.9 ~ 3.0 */
#define MMC_VDD_30_31		0x00040000	/* VDD voltage 3.0 ~ 3.1 */
#define MMC_VDD_31_32		0x00080000	/* VDD voltage 3.1 ~ 3.2 */
#define MMC_VDD_32_33		0x00100000	/* VDD voltage 3.2 ~ 3.3 */
#define MMC_VDD_33_34		0x00200000	/* VDD voltage 3.3 ~ 3.4 */
#define MMC_VDD_34_35		0x00400000	/* VDD voltage 3.4 ~ 3.5 */
#define MMC_VDD_35_36		0x00800000	/* VDD voltage 3.5 ~ 3.6 */

	unsigned long		caps;		/* Host capabilities */

#define MMC_CAP_4_BIT_DATA	(1 << 0)	/* Can the host do 4 bit transfers */
#define MMC_CAP_MMC_HIGHSPEED	(1 << 1)	/* Can do MMC high-speed timing */
#define MMC_CAP_SD_HIGHSPEED	(1 << 2)	/* Can do SD high-speed timing */
#define MMC_CAP_SDIO_IRQ	(1 << 3)	/* Can signal pending SDIO IRQs */
#define MMC_CAP_SPI		(1 << 4)	/* Talks only SPI protocols */
#define MMC_CAP_NEEDS_POLL	(1 << 5)	/* Needs polling for card-detection */
#define MMC_CAP_8_BIT_DATA	(1 << 6)	/* Can the host do 8 bit transfers */

#define MMC_CAP_NONREMOVABLE	(1 << 8)	/* Nonremovable e.g. eMMC */
#define MMC_CAP_WAIT_WHILE_BUSY	(1 << 9)	/* Waits while card is busy */
#define MMC_CAP_ERASE		(1 << 10)	/* Allow erase/trim commands */
#define MMC_CAP_1_8V_DDR	(1 << 11)	/* can support */
						/* DDR mode at 1.8V */
#define MMC_CAP_1_2V_DDR	(1 << 12)	/* can support */
						/* DDR mode at 1.2V */
#define MMC_CAP_POWER_OFF_CARD	(1 << 13)	/* Can power off after boot */
#define MMC_CAP_BUS_WIDTH_TEST	(1 << 14)	/* CMD14/CMD19 bus width ok */
#define MMC_CAP_UHS_SDR12	(1 << 15)	/* Host supports UHS SDR12 mode */
#define MMC_CAP_UHS_SDR25	(1 << 16)	/* Host supports UHS SDR25 mode */
#define MMC_CAP_UHS_SDR50	(1 << 17)	/* Host supports UHS SDR50 mode */
#define MMC_CAP_UHS_SDR104	(1 << 18)	/* Host supports UHS SDR104 mode */
#define MMC_CAP_UHS_DDR50	(1 << 19)	/* Host supports UHS DDR50 mode */
#define MMC_CAP_SET_XPC_330	(1 << 20)	/* Host supports >150mA current at 3.3V */
#define MMC_CAP_SET_XPC_300	(1 << 21)	/* Host supports >150mA current at 3.0V */
#define MMC_CAP_SET_XPC_180	(1 << 22)	/* Host supports >150mA current at 1.8V */
#define MMC_CAP_DRIVER_TYPE_A	(1 << 23)	/* Host supports Driver Type A */
#define MMC_CAP_DRIVER_TYPE_C	(1 << 24)	/* Host supports Driver Type C */
#define MMC_CAP_DRIVER_TYPE_D	(1 << 25)	/* Host supports Driver Type D */
#define MMC_CAP_MAX_CURRENT_200	(1 << 26)	/* Host max current limit is 200mA */
#define MMC_CAP_MAX_CURRENT_400	(1 << 27)	/* Host max current limit is 400mA */
#define MMC_CAP_MAX_CURRENT_600	(1 << 28)	/* Host max current limit is 600mA */
#define MMC_CAP_MAX_CURRENT_800	(1 << 29)	/* Host max current limit is 800mA */
#define MMC_CAP_CMD23		(1 << 30)	/* CMD23 supported. */
#define MMC_CAP_HW_RESET	(1 << 31)	/* Hardware reset */

	unsigned int		caps2;		/* More host capabilities */

#define MMC_CAP2_BOOTPART_NOACC	(1 << 0)	/* Boot partition no access */
#define MMC_CAP2_CACHE_CTRL	(1 << 1)	/* Allow cache control */
#define MMC_CAP2_POWEROFF_NOTIFY (1 << 2)	/* Notify poweroff supported */
#define MMC_CAP2_NO_MULTI_READ	(1 << 3)	/* Multiblock reads don't work */
#define MMC_CAP2_NO_SLEEP_CMD	(1 << 4)	/* Don't allow sleep command */
#define MMC_CAP2_HS200_1_8V_SDR	(1 << 5)        /* can support */
#define MMC_CAP2_HS200_1_2V_SDR	(1 << 6)        /* can support */
#define MMC_CAP2_HS200		(MMC_CAP2_HS200_1_8V_SDR | \
				 MMC_CAP2_HS200_1_2V_SDR)
#define MMC_CAP2_BROKEN_VOLTAGE	(1 << 7)	/* Use the broken voltage */
#define MMC_CAP2_DETECT_ON_ERR	(1 << 8)	/* On I/O err check card removal */
#define MMC_CAP2_HC_ERASE_SZ	(1 << 9)	/* High-capacity erase size */

	mmc_pm_flag_t		pm_caps;	/* supported pm features */
	unsigned int        power_notify_type;
#define MMC_HOST_PW_NOTIFY_NONE		0
#define MMC_HOST_PW_NOTIFY_SHORT	1
#define MMC_HOST_PW_NOTIFY_LONG		2

#ifdef CONFIG_MMC_CLKGATE
	int			clk_requests;	/* internal reference counter */
	unsigned int		clk_delay;	/* number of MCI clk hold cycles */
	bool			clk_gated;	/* clock gated */
	struct delayed_work	clk_gate_work; /* delayed clock gate */
	unsigned int		clk_old;	/* old clock value cache */
	spinlock_t		clk_lock;	/* lock for clk fields */
	struct mutex		clk_gate_mutex;	/* mutex for clock gating */
	struct device_attribute clkgate_delay_attr;
	unsigned long           clkgate_delay;
#endif

	/* host specific block data */
	unsigned int		max_seg_size;	/* see blk_queue_max_segment_size */
	unsigned short		max_segs;	/* see blk_queue_max_segments */
	unsigned short		unused;
	unsigned int		max_req_size;	/* maximum number of bytes in one req */
	unsigned int		max_blk_size;	/* maximum size of one mmc block */
	unsigned int		max_blk_count;	/* maximum number of blocks in one req */
	unsigned int		max_discard_to;	/* max. discard timeout in ms */

	/* private data */
	spinlock_t		lock;		/* lock for claim and bus ops */

	struct mmc_ios		ios;		/* current io bus settings */
	u32			ocr;		/* the current OCR setting */

	/* group bitfields together to minimize padding */
	unsigned int		use_spi_crc:1;
	unsigned int		claimed:1;	/* host exclusively claimed */
	unsigned int		bus_dead:1;	/* bus has been released */
#ifdef CONFIG_MMC_DEBUG
	unsigned int		removed:1;	/* host is being removed */
#endif

	int			rescan_disable;	/* disable card detection */

	struct mmc_card		*card;		/* device attached to this host */

	wait_queue_head_t	wq;
	struct task_struct	*claimer;	/* task that has host claimed */
	int			claim_cnt;	/* "claim" nesting count */

	struct delayed_work	detect;
	int			detect_change;	/* card detect flag */
	struct mmc_hotplug	hotplug;

	const struct mmc_bus_ops *bus_ops;	/* current bus driver */
	unsigned int		bus_refs;	/* reference counter */

	unsigned int		sdio_irqs;
	struct task_struct	*sdio_irq_thread;
	atomic_t		sdio_irq_thread_abort;

	mmc_pm_flag_t		pm_flags;	/* requested pm features */

#ifdef CONFIG_LEDS_TRIGGERS
	struct led_trigger	*led;		/* activity led */
#endif

#ifdef CONFIG_REGULATOR
	bool			regulator_enabled; /* regulator state */
#endif

	struct dentry		*debugfs_root;

	struct mmc_async_req	*areq;		/* active async req */

#ifdef CONFIG_FAIL_MMC_REQUEST
	struct fault_attr	fail_mmc_request;
#endif

	unsigned int		actual_clock;	/* Actual HC clock rate */

	unsigned long		private[0] ____cacheline_aligned;
};

extern struct mmc_host *mmc_alloc_host(int extra, struct device *);
extern int mmc_add_host(struct mmc_host *);
extern void mmc_remove_host(struct mmc_host *);
extern void mmc_free_host(struct mmc_host *);

static inline void *mmc_priv(struct mmc_host *host)
{
	return (void *)host->private;
}

#define mmc_host_is_spi(host)	((host)->caps & MMC_CAP_SPI)

#define mmc_dev(x)	((x)->parent)
#define mmc_classdev(x)	(&(x)->class_dev)
#define mmc_hostname(x)	(dev_name(&(x)->class_dev))

extern int mmc_suspend_host(struct mmc_host *);
extern int mmc_resume_host(struct mmc_host *);

extern int mmc_power_save_host(struct mmc_host *host);
extern int mmc_power_restore_host(struct mmc_host *host);

extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
extern void mmc_request_done(struct mmc_host *, struct mmc_request *);

extern int mmc_cache_ctrl(struct mmc_host *, u8);

static inline void mmc_signal_sdio_irq(struct mmc_host *host)
{
	host->ops->enable_sdio_irq(host, 0);
	wake_up_process(host->sdio_irq_thread);
}

struct regulator;

#ifdef CONFIG_REGULATOR
int mmc_regulator_get_ocrmask(struct regulator *supply);
int mmc_regulator_set_ocr(struct mmc_host *mmc,
			struct regulator *supply,
			unsigned short vdd_bit);
#else
static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
{
	return 0;
}

static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
				 struct regulator *supply,
				 unsigned short vdd_bit)
{
	return 0;
}
#endif

int mmc_card_awake(struct mmc_host *host);
int mmc_card_sleep(struct mmc_host *host);
int mmc_card_can_sleep(struct mmc_host *host);

int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);

/* Module parameter */
extern bool mmc_assume_removable;

static inline int mmc_card_is_removable(struct mmc_host *host)
{
	return !(host->caps & MMC_CAP_NONREMOVABLE) && mmc_assume_removable;
}

static inline int mmc_card_keep_power(struct mmc_host *host)
{
	return host->pm_flags & MMC_PM_KEEP_POWER;
}

static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
{
	return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
}

static inline int mmc_host_cmd23(struct mmc_host *host)
{
	return host->caps & MMC_CAP_CMD23;
}

static inline int mmc_boot_partition_access(struct mmc_host *host)
{
	return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
}

#ifdef CONFIG_MMC_CLKGATE
void mmc_host_clk_hold(struct mmc_host *host);
void mmc_host_clk_release(struct mmc_host *host);
unsigned int mmc_host_clk_rate(struct mmc_host *host);

#else
static inline void mmc_host_clk_hold(struct mmc_host *host)
{
}

static inline void mmc_host_clk_release(struct mmc_host *host)
{
}

static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
{
	return host->ios.clock;
}
#endif
#endif /* LINUX_MMC_HOST_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/include/linux/mmc/host.h
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* Host driver specific definitions.
	9	*/
	10	#ifndef LINUX_MMC_HOST_H
	11	#define LINUX_MMC_HOST_H
	12
af8350c7	13	#include <linux/leds.h>
d43c36dc	14	#include <linux/sched.h>
313162d0	15	#include <linux/device.h>
1b676f70	16	#include <linux/fault-inject.h>
af8350c7	17
aaac1b47	18	#include <linux/mmc/core.h>
da68c4eb	19	#include <linux/mmc/pm.h>
1da177e4 LT	20
	21	struct mmc_ios {
	22	unsigned int clock; /* clock rate */
	23	unsigned short vdd;
	24
4be34c99	25	/* vdd stores the bit number of the selected voltage range from below. */
1da177e4 LT	26
	27	unsigned char bus_mode; /* command output mode */
	28
	29	#define MMC_BUSMODE_OPENDRAIN 1
	30	#define MMC_BUSMODE_PUSHPULL 2
	31
865e9f13 PO	32	unsigned char chip_select; /* SPI chip select */
	33
	34	#define MMC_CS_DONTCARE 0
	35	#define MMC_CS_HIGH 1
	36	#define MMC_CS_LOW 2
	37
1da177e4 LT	38	unsigned char power_mode; /* power supply mode */
	39
	40	#define MMC_POWER_OFF 0
	41	#define MMC_POWER_UP 1
	42	#define MMC_POWER_ON 2
f218278a PO	43
	44	unsigned char bus_width; /* data bus width */
	45
	46	#define MMC_BUS_WIDTH_1 0
	47	#define MMC_BUS_WIDTH_4 2
b30f8af3	48	#define MMC_BUS_WIDTH_8 3
cd9277c0 PO	49
	50	unsigned char timing; /* timing specification used */
	51
	52	#define MMC_TIMING_LEGACY 0
	53	#define MMC_TIMING_MMC_HS 1
	54	#define MMC_TIMING_SD_HS 2
49c468fc AN	55	#define MMC_TIMING_UHS_SDR12 MMC_TIMING_LEGACY
	56	#define MMC_TIMING_UHS_SDR25 MMC_TIMING_SD_HS
	57	#define MMC_TIMING_UHS_SDR50 3
	58	#define MMC_TIMING_UHS_SDR104 4
	59	#define MMC_TIMING_UHS_DDR50 5
a4924c71	60	#define MMC_TIMING_MMC_HS200 6
0f8d8ea6	61
0f8d8ea6	62	#define MMC_SDR_MODE 0
49e3b5a4 AH	63	#define MMC_1_2V_DDR_MODE 1
49e3b5a4 AH	64	#define MMC_1_8V_DDR_MODE 2
a4924c71 G	65	#define MMC_1_2V_SDR_MODE 3
a4924c71 G	66	#define MMC_1_8V_SDR_MODE 4
f2119df6 AN	67
	68	unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
	69
	70	#define MMC_SIGNAL_VOLTAGE_330 0
	71	#define MMC_SIGNAL_VOLTAGE_180 1
4c4cb171	72	#define MMC_SIGNAL_VOLTAGE_120 2
d6d50a15 AN	73
	74	unsigned char drv_type; /* driver type (A, B, C, D) */
	75
	76	#define MMC_SET_DRIVER_TYPE_B 0
	77	#define MMC_SET_DRIVER_TYPE_A 1
	78	#define MMC_SET_DRIVER_TYPE_C 2
	79	#define MMC_SET_DRIVER_TYPE_D 3
1da177e4 LT	80	};
	81
	82	struct mmc_host_ops {
8ea926b2	83	/*
907d2e7c AH	84	* 'enable' is called when the host is claimed and 'disable' is called
907d2e7c AH	85	* when the host is released. 'enable' and 'disable' are deprecated.
8ea926b2 AH	86	*/
8ea926b2 AH	87	int (enable)(struct mmc_host host);
907d2e7c	88	int (disable)(struct mmc_host host);
aa8b683a PF	89	/*
	90	* It is optional for the host to implement pre_req and post_req in
	91	* order to support double buffering of requests (prepare one
	92	* request while another request is active).
7c8a2829 PF	93	* pre_req() must always be followed by a post_req().
	94	* To undo a call made to pre_req(), call post_req() with
	95	* a nonzero err condition.
aa8b683a PF	96	*/
	97	void (post_req)(struct mmc_host host, struct mmc_request *req,
	98	int err);
	99	void (pre_req)(struct mmc_host host, struct mmc_request *req,
	100	bool is_first_req);
1da177e4	101	void (request)(struct mmc_host host, struct mmc_request *req);
28f52482 AV	102	/*
	103	* Avoid calling these three functions too often or in a "fast path",
	104	* since underlaying controller might implement them in an expensive
	105	* and/or slow way.
	106	*
	107	* Also note that these functions might sleep, so don't call them
	108	* in the atomic contexts!
08f80bb5 AV	109	*
	110	* Return values for the get_ro callback should be:
	111	* 0 for a read/write card
	112	* 1 for a read-only card
	113	* -ENOSYS when not supported (equal to NULL callback)
	114	* or a negative errno value when something bad happened
	115	*
ee63a7d2	116	* Return values for the get_cd callback should be:
08f80bb5 AV	117	* 0 for a absent card
	118	* 1 for a present card
	119	* -ENOSYS when not supported (equal to NULL callback)
	120	* or a negative errno value when something bad happened
28f52482	121	*/
1da177e4	122	void (set_ios)(struct mmc_host host, struct mmc_ios *ios);
a00fc090	123	int (get_ro)(struct mmc_host host);
28f52482 AV	124	int (get_cd)(struct mmc_host host);
28f52482 AV	125
17b759af	126	void (enable_sdio_irq)(struct mmc_host host, int enable);
3fcb027d DM	127
	128	/* optional callback for HC quirks */
	129	void (init_card)(struct mmc_host host, struct mmc_card *card);
f2119df6 AN	130
f2119df6 AN	131	int (start_signal_voltage_switch)(struct mmc_host host, struct mmc_ios *ios);
a4924c71 G	132
	133	/* The tuning command opcode value is different for SD and eMMC cards */
	134	int (execute_tuning)(struct mmc_host host, u32 opcode);
4d55c5a1	135	void (enable_preset_value)(struct mmc_host host, bool enable);
ca8e99b3	136	int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
b2499518	137	void (hw_reset)(struct mmc_host host);
1da177e4 LT	138	};
	139
	140	struct mmc_card;
	141	struct device;
	142
aa8b683a PF	143	struct mmc_async_req {
	144	/* active mmc request */
	145	struct mmc_request *mrq;
	146	/*
	147	* Check error status of completed mmc request.
	148	* Returns 0 if success otherwise non zero.
	149	*/
	150	int (err_check) (struct mmc_card , struct mmc_async_req *);
	151	};
	152
b67e1980 GL	153	struct mmc_hotplug {
	154	unsigned int irq;
	155	void *handler_priv;
	156	};
	157
1da177e4	158	struct mmc_host {
fcaf71fd GKH	159	struct device *parent;
fcaf71fd GKH	160	struct device class_dev;
dce77377	161	int index;
f57b225e	162	const struct mmc_host_ops *ops;
1da177e4 LT	163	unsigned int f_min;
1da177e4 LT	164	unsigned int f_max;
88ae8b86	165	unsigned int f_init;
1da177e4	166	u32 ocr_avail;
8f230f45 TI	167	u32 ocr_avail_sdio; /* SDIO-specific OCR */
	168	u32 ocr_avail_sd; /* SD-specific OCR */
	169	u32 ocr_avail_mmc; /* MMC-specific OCR */
4c2ef25f	170	struct notifier_block pm_notify;
1da177e4	171
55556da0	172	#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
f74d132c PO	173	#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
	174	#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
	175	#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
	176	#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
	177	#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
	178	#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
	179	#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
	180	#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
	181	#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
	182	#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
	183	#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
	184	#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
	185	#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
	186	#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
	187	#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
	188	#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
	189
f218278a PO	190	unsigned long caps; /* Host capabilities */
	191
	192	#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
23af6039 PO	193	#define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
	194	#define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
	195	#define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
	196	#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
	197	#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
b30f8af3	198	#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
907d2e7c	199
9feae246	200	#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
b1ebe384	201	#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
dfe86cba	202	#define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
dfc13e84 HP	203	#define MMC_CAP_1_8V_DDR (1 << 11) /* can support */
	204	/* DDR mode at 1.8V */
	205	#define MMC_CAP_1_2V_DDR (1 << 12) /* can support */
	206	/* DDR mode at 1.2V */
ed919b01	207	#define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */
22113efd	208	#define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */
f2119df6 AN	209	#define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */
	210	#define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */
	211	#define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
	212	#define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
	213	#define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
	214	#define MMC_CAP_SET_XPC_330 (1 << 20) /* Host supports >150mA current at 3.3V */
	215	#define MMC_CAP_SET_XPC_300 (1 << 21) /* Host supports >150mA current at 3.0V */
	216	#define MMC_CAP_SET_XPC_180 (1 << 22) /* Host supports >150mA current at 1.8V */
d6d50a15 AN	217	#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
	218	#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
	219	#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
5371c927 AN	220	#define MMC_CAP_MAX_CURRENT_200 (1 << 26) /* Host max current limit is 200mA */
	221	#define MMC_CAP_MAX_CURRENT_400 (1 << 27) /* Host max current limit is 400mA */
	222	#define MMC_CAP_MAX_CURRENT_600 (1 << 28) /* Host max current limit is 600mA */
	223	#define MMC_CAP_MAX_CURRENT_800 (1 << 29) /* Host max current limit is 800mA */
d0c97cfb	224	#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
b2499518	225	#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
f218278a	226
f7c56ef2 AH	227	unsigned int caps2; /* More host capabilities */
	228
	229	#define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
881d1c25	230	#define MMC_CAP2_CACHE_CTRL (1 << 1) /* Allow cache control */
bec8726a	231	#define MMC_CAP2_POWEROFF_NOTIFY (1 << 2) /* Notify poweroff supported */
2bf22b39	232	#define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock reads don't work */
aa9df4fb	233	#define MMC_CAP2_NO_SLEEP_CMD (1 << 4) /* Don't allow sleep command */
a4924c71 G	234	#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
	235	#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
	236	#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR \| \
	237	MMC_CAP2_HS200_1_2V_SDR)
6e8201f5	238	#define MMC_CAP2_BROKEN_VOLTAGE (1 << 7) /* Use the broken voltage */
f0cc9cf9	239	#define MMC_CAP2_DETECT_ON_ERR (1 << 8) /* On I/O err check card removal */
83bb24aa	240	#define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */
f7c56ef2	241
da68c4eb	242	mmc_pm_flag_t pm_caps; /* supported pm features */
bec8726a G	243	unsigned int power_notify_type;
	244	#define MMC_HOST_PW_NOTIFY_NONE 0
	245	#define MMC_HOST_PW_NOTIFY_SHORT 1
	246	#define MMC_HOST_PW_NOTIFY_LONG 2
da68c4eb	247
04566831 LW	248	#ifdef CONFIG_MMC_CLKGATE
	249	int clk_requests; /* internal reference counter */
	250	unsigned int clk_delay; /* number of MCI clk hold cycles */
	251	bool clk_gated; /* clock gated */
597dd9d7	252	struct delayed_work clk_gate_work; /* delayed clock gate */
04566831 LW	253	unsigned int clk_old; /* old clock value cache */
04566831 LW	254	spinlock_t clk_lock; /* lock for clk fields */
86f315bb	255	struct mutex clk_gate_mutex; /* mutex for clock gating */
597dd9d7 SRT	256	struct device_attribute clkgate_delay_attr;
597dd9d7 SRT	257	unsigned long clkgate_delay;
04566831 LW	258	#endif
04566831 LW	259
1da177e4 LT	260	/* host specific block data */
1da177e4 LT	261	unsigned int max_seg_size; /* see blk_queue_max_segment_size */
a36274e0	262	unsigned short max_segs; /* see blk_queue_max_segments */
1da177e4	263	unsigned short unused;
55db890a	264	unsigned int max_req_size; /* maximum number of bytes in one req */
fe4a3c7a	265	unsigned int max_blk_size; /* maximum size of one mmc block */
55db890a	266	unsigned int max_blk_count; /* maximum number of blocks in one req */
e056a1b5	267	unsigned int max_discard_to; /* max. discard timeout in ms */
1da177e4 LT	268
1da177e4 LT	269	/* private data */
7ea239d9 PO	270	spinlock_t lock; /* lock for claim and bus ops */
7ea239d9 PO	271
1da177e4 LT	272	struct mmc_ios ios; /* current io bus settings */
	273	u32 ocr; /* the current OCR setting */
	274
97018580 DB	275	/* group bitfields together to minimize padding */
	276	unsigned int use_spi_crc:1;
	277	unsigned int claimed:1; /* host exclusively claimed */
	278	unsigned int bus_dead:1; /* bus has been released */
	279	#ifdef CONFIG_MMC_DEBUG
	280	unsigned int removed:1; /* host is being removed */
	281	#endif
	282
4c2ef25f	283	int rescan_disable; /* disable card detection */
8ea926b2	284
b855885e	285	struct mmc_card card; / device attached to this host */
1da177e4 LT	286
1da177e4 LT	287	wait_queue_head_t wq;
319a3f14 AH	288	struct task_struct claimer; / task that has host claimed */
319a3f14 AH	289	int claim_cnt; /* "claim" nesting count */
f22ee4ed	290
c4028958	291	struct delayed_work detect;
d3049504	292	int detect_change; /* card detect flag */
b67e1980	293	struct mmc_hotplug hotplug;
01357dca	294
7ea239d9 PO	295	const struct mmc_bus_ops bus_ops; / current bus driver */
7ea239d9 PO	296	unsigned int bus_refs; /* reference counter */
7ea239d9	297
d1496c39 NP	298	unsigned int sdio_irqs;
	299	struct task_struct *sdio_irq_thread;
	300	atomic_t sdio_irq_thread_abort;
	301
da68c4eb NP	302	mmc_pm_flag_t pm_flags; /* requested pm features */
da68c4eb NP	303
af8350c7 PO	304	#ifdef CONFIG_LEDS_TRIGGERS
	305	struct led_trigger led; / activity led */
	306	#endif
	307
99fc5131 LW	308	#ifdef CONFIG_REGULATOR
	309	bool regulator_enabled; /* regulator state */
	310	#endif
	311
6edd8ee6 HS	312	struct dentry *debugfs_root;
6edd8ee6 HS	313
aa8b683a PF	314	struct mmc_async_req areq; / active async req */
aa8b683a PF	315
1b676f70 PF	316	#ifdef CONFIG_FAIL_MMC_REQUEST
	317	struct fault_attr fail_mmc_request;
	318	#endif
	319
df16219f GC	320	unsigned int actual_clock; /* Actual HC clock rate */
df16219f GC	321
01357dca	322	unsigned long private[0] ____cacheline_aligned;
1da177e4 LT	323	};
	324
	325	extern struct mmc_host mmc_alloc_host(int extra, struct device );
	326	extern int mmc_add_host(struct mmc_host *);
	327	extern void mmc_remove_host(struct mmc_host *);
	328	extern void mmc_free_host(struct mmc_host *);
	329
01357dca RK	330	static inline void mmc_priv(struct mmc_host host)
	331	{
	332	return (void *)host->private;
	333	}
	334
97018580 DB	335	#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
97018580 DB	336
fcaf71fd	337	#define mmc_dev(x) ((x)->parent)
11354d03	338	#define mmc_classdev(x) (&(x)->class_dev)
d1b26863	339	#define mmc_hostname(x) (dev_name(&(x)->class_dev))
1da177e4	340
1a13f8fa	341	extern int mmc_suspend_host(struct mmc_host *);
1da177e4 LT	342	extern int mmc_resume_host(struct mmc_host *);
1da177e4 LT	343
12ae637f OBC	344	extern int mmc_power_save_host(struct mmc_host *host);
12ae637f OBC	345	extern int mmc_power_restore_host(struct mmc_host *host);
eae1aeee	346
8dc00335	347	extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
1da177e4 LT	348	extern void mmc_request_done(struct mmc_host , struct mmc_request );
1da177e4 LT	349
881d1c25 SJ	350	extern int mmc_cache_ctrl(struct mmc_host *, u8);
881d1c25 SJ	351
17b759af NP	352	static inline void mmc_signal_sdio_irq(struct mmc_host *host)
	353	{
	354	host->ops->enable_sdio_irq(host, 0);
	355	wake_up_process(host->sdio_irq_thread);
	356	}
	357
5c13941a DB	358	struct regulator;
5c13941a DB	359
99fc5131	360	#ifdef CONFIG_REGULATOR
5c13941a	361	int mmc_regulator_get_ocrmask(struct regulator *supply);
99fc5131 LW	362	int mmc_regulator_set_ocr(struct mmc_host *mmc,
	363	struct regulator *supply,
	364	unsigned short vdd_bit);
	365	#else
	366	static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
	367	{
	368	return 0;
	369	}
	370
	371	static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
	372	struct regulator *supply,
	373	unsigned short vdd_bit)
	374	{
	375	return 0;
	376	}
	377	#endif
5c13941a	378
b1ebe384 JL	379	int mmc_card_awake(struct mmc_host *host);
	380	int mmc_card_sleep(struct mmc_host *host);
	381	int mmc_card_can_sleep(struct mmc_host *host);
	382
4c2ef25f	383	int mmc_pm_notify(struct notifier_block notify_block, unsigned long, void );
8ea926b2	384
71d7d3d1	385	/* Module parameter */
90ab5ee9	386	extern bool mmc_assume_removable;
71d7d3d1 MF	387
	388	static inline int mmc_card_is_removable(struct mmc_host *host)
	389	{
	390	return !(host->caps & MMC_CAP_NONREMOVABLE) && mmc_assume_removable;
	391	}
	392
a5e9425d	393	static inline int mmc_card_keep_power(struct mmc_host *host)
080bc977 OBC	394	{
	395	return host->pm_flags & MMC_PM_KEEP_POWER;
	396	}
	397
6b93d01f OBC	398	static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
	399	{
	400	return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
	401	}
d0c97cfb AW	402
	403	static inline int mmc_host_cmd23(struct mmc_host *host)
	404	{
	405	return host->caps & MMC_CAP_CMD23;
	406	}
f7c56ef2 AH	407
	408	static inline int mmc_boot_partition_access(struct mmc_host *host)
	409	{
	410	return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
	411	}
	412
2c4967f7 SRT	413	#ifdef CONFIG_MMC_CLKGATE
	414	void mmc_host_clk_hold(struct mmc_host *host);
	415	void mmc_host_clk_release(struct mmc_host *host);
	416	unsigned int mmc_host_clk_rate(struct mmc_host *host);
	417
	418	#else
	419	static inline void mmc_host_clk_hold(struct mmc_host *host)
	420	{
	421	}
	422
	423	static inline void mmc_host_clk_release(struct mmc_host *host)
	424	{
	425	}
	426
	427	static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
	428	{
	429	return host->ios.clock;
	430	}
	431	#endif
100e9186	432	#endif /* LINUX_MMC_HOST_H */