[linux-2.6-block.git] / include / linux / mfd / da9052 / da9052.h

/*
 * da9052 declarations for DA9052 PMICs.
 *
 * Copyright(c) 2011 Dialog Semiconductor Ltd.
 *
 * Author: David Dajun Chen <dchen@diasemi.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */

#ifndef __MFD_DA9052_DA9052_H
#define __MFD_DA9052_DA9052_H

#include <linux/interrupt.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/completion.h>
#include <linux/list.h>
#include <linux/mfd/core.h>

#include <linux/mfd/da9052/reg.h>

/* Common - HWMON Channel Definations */
#define DA9052_ADC_VDDOUT	0
#define DA9052_ADC_ICH		1
#define DA9052_ADC_TBAT	2
#define DA9052_ADC_VBAT	3
#define DA9052_ADC_IN4		4
#define DA9052_ADC_IN5		5
#define DA9052_ADC_IN6		6
#define DA9052_ADC_TSI		7
#define DA9052_ADC_TJUNC	8
#define DA9052_ADC_VBBAT	9

#define DA9052_IRQ_DCIN	0
#define DA9052_IRQ_VBUS	1
#define DA9052_IRQ_DCINREM	2
#define DA9052_IRQ_VBUSREM	3
#define DA9052_IRQ_VDDLOW	4
#define DA9052_IRQ_ALARM	5
#define DA9052_IRQ_SEQRDY	6
#define DA9052_IRQ_COMP1V2	7
#define DA9052_IRQ_NONKEY	8
#define DA9052_IRQ_IDFLOAT	9
#define DA9052_IRQ_IDGND	10
#define DA9052_IRQ_CHGEND	11
#define DA9052_IRQ_TBAT	12
#define DA9052_IRQ_ADC_EOM	13
#define DA9052_IRQ_PENDOWN	14
#define DA9052_IRQ_TSIREADY	15
#define DA9052_IRQ_GPI0	16
#define DA9052_IRQ_GPI1	17
#define DA9052_IRQ_GPI2	18
#define DA9052_IRQ_GPI3	19
#define DA9052_IRQ_GPI4	20
#define DA9052_IRQ_GPI5	21
#define DA9052_IRQ_GPI6	22
#define DA9052_IRQ_GPI7	23
#define DA9052_IRQ_GPI8	24
#define DA9052_IRQ_GPI9	25
#define DA9052_IRQ_GPI10	26
#define DA9052_IRQ_GPI11	27
#define DA9052_IRQ_GPI12	28
#define DA9052_IRQ_GPI13	29
#define DA9052_IRQ_GPI14	30
#define DA9052_IRQ_GPI15	31

enum da9052_chip_id {
	DA9052,
	DA9053_AA,
	DA9053_BA,
	DA9053_BB,
	DA9053_BC,
};

struct da9052_pdata;

struct da9052 {
	struct device *dev;
	struct regmap *regmap;

	struct mutex auxadc_lock;
	struct completion done;

	int irq_base;
	struct regmap_irq_chip_data *irq_data;
	u8 chip_id;

	int chip_irq;

	/* SOC I/O transfer related fixes for DA9052/53 */
	int (*fix_io) (struct da9052 *da9052, unsigned char reg);
};

/* ADC API */
int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel);
int da9052_adc_read_temp(struct da9052 *da9052);

/* Device I/O API */
static inline int da9052_reg_read(struct da9052 *da9052, unsigned char reg)
{
	int val, ret;

	ret = regmap_read(da9052->regmap, reg, &val);
	if (ret < 0)
		return ret;

	if (da9052->fix_io) {
		ret = da9052->fix_io(da9052, reg);
		if (ret < 0)
			return ret;
	}

	return val;
}

static inline int da9052_reg_write(struct da9052 *da9052, unsigned char reg,
				    unsigned char val)
{
	int ret;

	ret = regmap_write(da9052->regmap, reg, val);
	if (ret < 0)
		return ret;

	if (da9052->fix_io) {
		ret = da9052->fix_io(da9052, reg);
		if (ret < 0)
			return ret;
	}

	return ret;
}

static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg,
				     unsigned reg_cnt, unsigned char *val)
{
	int ret;
	unsigned int tmp;
	int i;

	for (i = 0; i < reg_cnt; i++) {
		ret = regmap_read(da9052->regmap, reg + i, &tmp);
		val[i] = (unsigned char)tmp;
		if (ret < 0)
			return ret;
	}

	if (da9052->fix_io) {
		ret = da9052->fix_io(da9052, reg);
		if (ret < 0)
			return ret;
	}

	return ret;
}

static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg,
				      unsigned reg_cnt, unsigned char *val)
{
	int ret = 0;
	int i;

	for (i = 0; i < reg_cnt; i++) {
		ret = regmap_write(da9052->regmap, reg + i, val[i]);
		if (ret < 0)
			return ret;
	}

	if (da9052->fix_io) {
		ret = da9052->fix_io(da9052, reg);
		if (ret < 0)
			return ret;
	}

	return ret;
}

static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg,
				     unsigned char bit_mask,
				     unsigned char reg_val)
{
	int ret;

	ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val);
	if (ret < 0)
		return ret;

	if (da9052->fix_io) {
		ret = da9052->fix_io(da9052, reg);
		if (ret < 0)
			return ret;
	}

	return ret;
}

int da9052_device_init(struct da9052 *da9052, u8 chip_id);
void da9052_device_exit(struct da9052 *da9052);

extern const struct regmap_config da9052_regmap_config;

int da9052_irq_init(struct da9052 *da9052);
int da9052_irq_exit(struct da9052 *da9052);
int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
			   irq_handler_t handler, void *data);
void da9052_free_irq(struct da9052 *da9052, int irq, void *data);

int da9052_enable_irq(struct da9052 *da9052, int irq);
int da9052_disable_irq(struct da9052 *da9052, int irq);
int da9052_disable_irq_nosync(struct da9052 *da9052, int irq);

#endif /* __MFD_DA9052_DA9052_H */
Commit	Line	Data
84c99db8 AJ	1	/*
	2	* da9052 declarations for DA9052 PMICs.
	3	*
	4	* Copyright(c) 2011 Dialog Semiconductor Ltd.
	5	*
	6	* Author: David Dajun Chen <dchen@diasemi.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21	*
	22	*/
	23
	24	#ifndef __MFD_DA9052_DA9052_H
	25	#define __MFD_DA9052_DA9052_H
	26
	27	#include <linux/interrupt.h>
	28	#include <linux/regmap.h>
	29	#include <linux/slab.h>
	30	#include <linux/completion.h>
	31	#include <linux/list.h>
	32	#include <linux/mfd/core.h>
	33
	34	#include <linux/mfd/da9052/reg.h>
	35
16e5e204 AJ	36	/* Common - HWMON Channel Definations */
	37	#define DA9052_ADC_VDDOUT 0
	38	#define DA9052_ADC_ICH 1
	39	#define DA9052_ADC_TBAT 2
	40	#define DA9052_ADC_VBAT 3
	41	#define DA9052_ADC_IN4 4
	42	#define DA9052_ADC_IN5 5
	43	#define DA9052_ADC_IN6 6
	44	#define DA9052_ADC_TSI 7
	45	#define DA9052_ADC_TJUNC 8
	46	#define DA9052_ADC_VBBAT 9
	47
84c99db8 AJ	48	#define DA9052_IRQ_DCIN 0
	49	#define DA9052_IRQ_VBUS 1
	50	#define DA9052_IRQ_DCINREM 2
	51	#define DA9052_IRQ_VBUSREM 3
	52	#define DA9052_IRQ_VDDLOW 4
	53	#define DA9052_IRQ_ALARM 5
	54	#define DA9052_IRQ_SEQRDY 6
	55	#define DA9052_IRQ_COMP1V2 7
	56	#define DA9052_IRQ_NONKEY 8
	57	#define DA9052_IRQ_IDFLOAT 9
	58	#define DA9052_IRQ_IDGND 10
	59	#define DA9052_IRQ_CHGEND 11
	60	#define DA9052_IRQ_TBAT 12
	61	#define DA9052_IRQ_ADC_EOM 13
	62	#define DA9052_IRQ_PENDOWN 14
	63	#define DA9052_IRQ_TSIREADY 15
	64	#define DA9052_IRQ_GPI0 16
	65	#define DA9052_IRQ_GPI1 17
	66	#define DA9052_IRQ_GPI2 18
	67	#define DA9052_IRQ_GPI3 19
	68	#define DA9052_IRQ_GPI4 20
	69	#define DA9052_IRQ_GPI5 21
	70	#define DA9052_IRQ_GPI6 22
	71	#define DA9052_IRQ_GPI7 23
	72	#define DA9052_IRQ_GPI8 24
	73	#define DA9052_IRQ_GPI9 25
	74	#define DA9052_IRQ_GPI10 26
	75	#define DA9052_IRQ_GPI11 27
	76	#define DA9052_IRQ_GPI12 28
	77	#define DA9052_IRQ_GPI13 29
	78	#define DA9052_IRQ_GPI14 30
	79	#define DA9052_IRQ_GPI15 31
	80
	81	enum da9052_chip_id {
	82	DA9052,
	83	DA9053_AA,
	84	DA9053_BA,
	85	DA9053_BB,
16263f28	86	DA9053_BC,
84c99db8 AJ	87	};
	88
	89	struct da9052_pdata;
	90
	91	struct da9052 {
84c99db8 AJ	92	struct device *dev;
	93	struct regmap *regmap;
	94
16e5e204 AJ	95	struct mutex auxadc_lock;
	96	struct completion done;
	97
84c99db8	98	int irq_base;
86144194	99	struct regmap_irq_chip_data *irq_data;
84c99db8 AJ	100	u8 chip_id;
	101
	102	int chip_irq;
0a8c290a AJ	103
	104	/* SOC I/O transfer related fixes for DA9052/53 */
	105	int (fix_io) (struct da9052 da9052, unsigned char reg);
84c99db8 AJ	106	};
84c99db8 AJ	107
16e5e204 AJ	108	/* ADC API */
	109	int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel);
	110	int da9052_adc_read_temp(struct da9052 *da9052);
	111
84c99db8 AJ	112	/* Device I/O API */
	113	static inline int da9052_reg_read(struct da9052 *da9052, unsigned char reg)
	114	{
	115	int val, ret;
	116
	117	ret = regmap_read(da9052->regmap, reg, &val);
	118	if (ret < 0)
	119	return ret;
0a8c290a AJ	120
	121	if (da9052->fix_io) {
	122	ret = da9052->fix_io(da9052, reg);
	123	if (ret < 0)
	124	return ret;
	125	}
	126
84c99db8 AJ	127	return val;
	128	}
	129
	130	static inline int da9052_reg_write(struct da9052 *da9052, unsigned char reg,
	131	unsigned char val)
	132	{
0a8c290a AJ	133	int ret;
	134
	135	ret = regmap_write(da9052->regmap, reg, val);
	136	if (ret < 0)
	137	return ret;
	138
	139	if (da9052->fix_io) {
	140	ret = da9052->fix_io(da9052, reg);
	141	if (ret < 0)
	142	return ret;
	143	}
	144
	145	return ret;
84c99db8 AJ	146	}
	147
	148	static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg,
	149	unsigned reg_cnt, unsigned char *val)
	150	{
0a8c290a	151	int ret;
43e30f23 DJ	152	unsigned int tmp;
43e30f23 DJ	153	int i;
0a8c290a	154
43e30f23 DJ	155	for (i = 0; i < reg_cnt; i++) {
	156	ret = regmap_read(da9052->regmap, reg + i, &tmp);
	157	val[i] = (unsigned char)tmp;
	158	if (ret < 0)
	159	return ret;
	160	}
0a8c290a AJ	161
	162	if (da9052->fix_io) {
	163	ret = da9052->fix_io(da9052, reg);
	164	if (ret < 0)
	165	return ret;
	166	}
	167
	168	return ret;
84c99db8 AJ	169	}
	170
	171	static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg,
	172	unsigned reg_cnt, unsigned char *val)
	173	{
ba4a1c28	174	int ret = 0;
43e30f23	175	int i;
0a8c290a	176
43e30f23 DJ	177	for (i = 0; i < reg_cnt; i++) {
	178	ret = regmap_write(da9052->regmap, reg + i, val[i]);
	179	if (ret < 0)
	180	return ret;
	181	}
0a8c290a AJ	182
	183	if (da9052->fix_io) {
	184	ret = da9052->fix_io(da9052, reg);
	185	if (ret < 0)
	186	return ret;
	187	}
	188
	189	return ret;
84c99db8 AJ	190	}
	191
	192	static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg,
	193	unsigned char bit_mask,
	194	unsigned char reg_val)
	195	{
0a8c290a AJ	196	int ret;
	197
	198	ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val);
	199	if (ret < 0)
	200	return ret;
	201
	202	if (da9052->fix_io) {
	203	ret = da9052->fix_io(da9052, reg);
	204	if (ret < 0)
	205	return ret;
	206	}
	207
	208	return ret;
84c99db8 AJ	209	}
	210
	211	int da9052_device_init(struct da9052 *da9052, u8 chip_id);
	212	void da9052_device_exit(struct da9052 *da9052);
	213
e9e9d397	214	extern const struct regmap_config da9052_regmap_config;
3c8bedb7	215
8bad1abd FE	216	int da9052_irq_init(struct da9052 *da9052);
	217	int da9052_irq_exit(struct da9052 *da9052);
	218	int da9052_request_irq(struct da9052 da9052, int irq, char name,
	219	irq_handler_t handler, void *data);
	220	void da9052_free_irq(struct da9052 da9052, int irq, void data);
	221
	222	int da9052_enable_irq(struct da9052 *da9052, int irq);
	223	int da9052_disable_irq(struct da9052 *da9052, int irq);
	224	int da9052_disable_irq_nosync(struct da9052 *da9052, int irq);
	225
84c99db8	226	#endif /* __MFD_DA9052_DA9052_H */