ide: remove CONFIG_BLK_DEV_HD_IDE config option (take 2)
[linux-2.6-block.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
e3a59b4d
HR
20#ifdef CONFIG_BLK_DEV_IDEACPI
21#include <acpi/acpi.h>
22#endif
1da177e4
LT
23#include <asm/byteorder.h>
24#include <asm/system.h>
25#include <asm/io.h>
26#include <asm/semaphore.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
729d4de9 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
4ee06b7e
BZ
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
35/*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40#define IDE_NO_IRQ (-1)
41
1da177e4
LT
42typedef unsigned char byte; /* used everywhere */
43
44/*
45 * Probably not wise to fiddle with these
46 */
47#define ERROR_MAX 8 /* Max read/write errors per sector */
48#define ERROR_RESET 3 /* Reset controller every 4th retry */
49#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
51/*
52 * Tune flags
53 */
54#define IDE_TUNE_NOAUTO 2
55#define IDE_TUNE_AUTO 1
56#define IDE_TUNE_DEFAULT 0
57
58/*
59 * state flags
60 */
61
62#define DMA_PIO_RETRY 1 /* retrying in PIO */
63
64#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
66
67/*
68 * Definitions for accessing IDE controller registers
69 */
70#define IDE_NR_PORTS (10)
71
72#define IDE_DATA_OFFSET (0)
73#define IDE_ERROR_OFFSET (1)
74#define IDE_NSECTOR_OFFSET (2)
75#define IDE_SECTOR_OFFSET (3)
76#define IDE_LCYL_OFFSET (4)
77#define IDE_HCYL_OFFSET (5)
78#define IDE_SELECT_OFFSET (6)
79#define IDE_STATUS_OFFSET (7)
80#define IDE_CONTROL_OFFSET (8)
81#define IDE_IRQ_OFFSET (9)
82
83#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
85
1da177e4
LT
86#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
87#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
88#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
89#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
90#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
91#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
92#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
93#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
94#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
95#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
96
97#define IDE_FEATURE_REG IDE_ERROR_REG
98#define IDE_COMMAND_REG IDE_STATUS_REG
99#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
100#define IDE_IREASON_REG IDE_NSECTOR_REG
101#define IDE_BCOUNTL_REG IDE_LCYL_REG
102#define IDE_BCOUNTH_REG IDE_HCYL_REG
103
104#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
105#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
106#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
107#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
108#define DRIVE_READY (READY_STAT | SEEK_STAT)
1da177e4
LT
109
110#define BAD_CRC (ABRT_ERR | ICRC_ERR)
111
112#define SATA_NR_PORTS (3) /* 16 possible ?? */
113
114#define SATA_STATUS_OFFSET (0)
1da177e4 115#define SATA_ERROR_OFFSET (1)
1da177e4 116#define SATA_CONTROL_OFFSET (2)
1da177e4 117
1da177e4
LT
118/*
119 * Our Physical Region Descriptor (PRD) table should be large enough
120 * to handle the biggest I/O request we are likely to see. Since requests
121 * can have no more than 256 sectors, and since the typical blocksize is
122 * two or more sectors, we could get by with a limit of 128 entries here for
123 * the usual worst case. Most requests seem to include some contiguous blocks,
124 * further reducing the number of table entries required.
125 *
126 * The driver reverts to PIO mode for individual requests that exceed
127 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
128 * 100% of all crazy scenarios here is not necessary.
129 *
130 * As it turns out though, we must allocate a full 4KB page for this,
131 * so the two PRD tables (ide0 & ide1) will each get half of that,
132 * allowing each to have about 256 entries (8 bytes each) from this.
133 */
134#define PRD_BYTES 8
135#define PRD_ENTRIES 256
136
137/*
138 * Some more useful definitions
139 */
140#define PARTN_BITS 6 /* number of minor dev bits for partitions */
141#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
142#define SECTOR_SIZE 512
143#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
144#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
145
146/*
147 * Timeouts for various operations:
148 */
149#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
150#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
151#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
152#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
153#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
154#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
155
1da177e4
LT
156/*
157 * Check for an interrupt and acknowledge the interrupt status
158 */
159struct hwif_s;
160typedef int (ide_ack_intr_t)(struct hwif_s *);
161
1da177e4
LT
162/*
163 * hwif_chipset_t is used to keep track of the specific hardware
164 * chipset used by each IDE interface, if known.
165 */
528a572d 166enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
167 ide_cmd640, ide_dtc2278, ide_ali14xx,
168 ide_qd65xx, ide_umc8672, ide_ht6560b,
169 ide_rz1000, ide_trm290,
170 ide_cmd646, ide_cy82c693, ide_4drives,
171 ide_pmac, ide_etrax100, ide_acorn,
7c7e92a9 172 ide_au1xxx, ide_palm3710, ide_forced
528a572d
BZ
173};
174
175typedef u8 hwif_chipset_t;
1da177e4
LT
176
177/*
178 * Structure to hold all information about the location of this port
179 */
180typedef struct hw_regs_s {
181 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
182 int irq; /* our irq number */
1da177e4
LT
183 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
184 hwif_chipset_t chipset;
4349d5cd 185 struct device *dev;
1da177e4
LT
186} hw_regs_t;
187
baa8f3e9 188struct hwif_s * ide_find_port(unsigned long);
cbb010c1 189void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 190void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 191
1da177e4
LT
192static inline void ide_std_init_ports(hw_regs_t *hw,
193 unsigned long io_addr,
194 unsigned long ctl_addr)
195{
196 unsigned int i;
197
198 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
199 hw->io_ports[i] = io_addr++;
200
201 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
202}
203
204#include <asm/ide.h>
205
83d7dbc4
MM
206#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
207#undef MAX_HWIFS
83ae20c8
BH
208#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
209#endif
210
1da177e4
LT
211/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
212#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
213# define ide_default_io_base(index) (0)
214# define ide_default_irq(base) (0)
215# define ide_init_default_irq(base) (0)
216#endif
217
847ddd2b 218#ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
1da177e4
LT
219static inline void ide_init_hwif_ports(hw_regs_t *hw,
220 unsigned long io_addr,
221 unsigned long ctl_addr,
222 int *irq)
223{
224 if (!ctl_addr)
225 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
226 else
227 ide_std_init_ports(hw, io_addr, ctl_addr);
228
229 if (irq)
230 *irq = 0;
231
232 hw->io_ports[IDE_IRQ_OFFSET] = 0;
233
234#ifdef CONFIG_PPC32
235 if (ppc_ide_md.ide_init_hwif)
236 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
237#endif
238}
239#else
240static inline void ide_init_hwif_ports(hw_regs_t *hw,
241 unsigned long io_addr,
242 unsigned long ctl_addr,
243 int *irq)
244{
245 if (io_addr || ctl_addr)
246 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
247}
847ddd2b 248#endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
1da177e4
LT
249
250/* Currently only m68k, apus and m8xx need it */
251#ifndef IDE_ARCH_ACK_INTR
252# define ide_ack_intr(hwif) (1)
253#endif
254
255/* Currently only Atari needs it */
256#ifndef IDE_ARCH_LOCK
257# define ide_release_lock() do {} while (0)
258# define ide_get_lock(hdlr, data) do {} while (0)
259#endif /* IDE_ARCH_LOCK */
260
261/*
262 * Now for the data we need to maintain per-drive: ide_drive_t
263 */
264
265#define ide_scsi 0x21
266#define ide_disk 0x20
267#define ide_optical 0x7
268#define ide_cdrom 0x5
269#define ide_tape 0x1
270#define ide_floppy 0x0
271
272/*
273 * Special Driver Flags
274 *
275 * set_geometry : respecify drive geometry
276 * recalibrate : seek to cyl 0
277 * set_multmode : set multmode count
278 * set_tune : tune interface for drive
279 * serviced : service command
280 * reserved : unused
281 */
282typedef union {
283 unsigned all : 8;
284 struct {
1da177e4
LT
285 unsigned set_geometry : 1;
286 unsigned recalibrate : 1;
287 unsigned set_multmode : 1;
288 unsigned set_tune : 1;
289 unsigned serviced : 1;
290 unsigned reserved : 3;
1da177e4
LT
291 } b;
292} special_t;
293
1da177e4
LT
294/*
295 * ATA-IDE Select Register, aka Device-Head
296 *
297 * head : always zeros here
298 * unit : drive select number: 0/1
299 * bit5 : always 1
300 * lba : using LBA instead of CHS
301 * bit7 : always 1
302 */
303typedef union {
304 unsigned all : 8;
305 struct {
306#if defined(__LITTLE_ENDIAN_BITFIELD)
307 unsigned head : 4;
308 unsigned unit : 1;
309 unsigned bit5 : 1;
310 unsigned lba : 1;
311 unsigned bit7 : 1;
312#elif defined(__BIG_ENDIAN_BITFIELD)
313 unsigned bit7 : 1;
314 unsigned lba : 1;
315 unsigned bit5 : 1;
316 unsigned unit : 1;
317 unsigned head : 4;
318#else
319#error "Please fix <asm/byteorder.h>"
320#endif
321 } b;
322} select_t, ata_select_t;
323
1da177e4
LT
324/*
325 * Status returned from various ide_ functions
326 */
327typedef enum {
328 ide_stopped, /* no drive operation was started */
329 ide_started, /* a drive operation was started, handler was set */
330} ide_startstop_t;
331
332struct ide_driver_s;
333struct ide_settings_s;
334
e3a59b4d
HR
335#ifdef CONFIG_BLK_DEV_IDEACPI
336struct ide_acpi_drive_link;
337struct ide_acpi_hwif_link;
338#endif
339
1da177e4
LT
340typedef struct ide_drive_s {
341 char name[4]; /* drive name, such as "hda" */
342 char driver_req[10]; /* requests specific driver */
343
165125e1 344 struct request_queue *queue; /* request queue */
1da177e4
LT
345
346 struct request *rq; /* current request */
347 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT
348 void *driver_data; /* extra driver data */
349 struct hd_driveid *id; /* drive model identification info */
7662d046 350#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
351 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
352 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 353#endif
1da177e4
LT
354 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
355
356 unsigned long sleep; /* sleep until this time */
357 unsigned long service_start; /* time we started last request */
358 unsigned long service_time; /* service time of last request */
359 unsigned long timeout; /* max time to wait for irq */
360
361 special_t special; /* special action flags */
362 select_t select; /* basic drive/head select reg value */
363
364 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT
365 u8 using_dma; /* disk is using dma for read/write */
366 u8 retry_pio; /* retrying dma capable host in pio */
367 u8 state; /* retry state */
368 u8 waiting_for_dma; /* dma currently in progress */
369 u8 unmask; /* okay to unmask other irqs */
36193484 370 u8 noflush; /* don't attempt flushes */
1da177e4
LT
371 u8 dsc_overlap; /* DSC overlap */
372 u8 nice1; /* give potential excess bandwidth */
373
374 unsigned present : 1; /* drive is physically present */
375 unsigned dead : 1; /* device ejected hint */
376 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
377 unsigned noprobe : 1; /* from: hdx=noprobe */
378 unsigned removable : 1; /* 1 if need to do check_media_change */
379 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT
380 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
381 unsigned no_unmask : 1; /* disallow setting unmask bit */
382 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
383 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
1da177e4 384 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 385 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT
386 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
387 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
388 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
389 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT
390 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
391 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
392 unsigned post_reset : 1;
7f8f48af 393 unsigned udma33_warned : 1;
1da177e4 394
1497943e 395 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT
396 u8 quirk_list; /* considered quirky, set for a specific host */
397 u8 init_speed; /* transfer rate set at boot */
1da177e4 398 u8 current_speed; /* current transfer rate set */
513daadd 399 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT
400 u8 dn; /* now wide spread use */
401 u8 wcache; /* status of write cache */
402 u8 acoustic; /* acoustic management */
403 u8 media; /* disk, cdrom, tape, floppy, ... */
404 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
405 u8 ready_stat; /* min status value for drive ready */
406 u8 mult_count; /* current multiple sector setting */
407 u8 mult_req; /* requested multiple sector setting */
408 u8 tune_req; /* requested drive tuning setting */
409 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
410 u8 bad_wstat; /* used for ignoring WRERR_STAT */
411 u8 nowerr; /* used for ignoring WRERR_STAT */
412 u8 sect0; /* offset of first sector for DM6:DDO */
413 u8 head; /* "real" number of heads */
414 u8 sect; /* "real" sectors per track */
415 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
416 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
417
418 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
419 unsigned int cyl; /* "real" number of cyls */
26bcb879 420 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
421 unsigned int failures; /* current failure count */
422 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 423 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
424
425 u64 capacity64; /* total number of sectors */
426
427 int lun; /* logical unit */
428 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR
429#ifdef CONFIG_BLK_DEV_IDEACPI
430 struct ide_acpi_drive_link *acpidata;
431#endif
1da177e4
LT
432 struct list_head list;
433 struct device gendev;
f36d4024 434 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT
435} ide_drive_t;
436
8604affd
BZ
437#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
438
1da177e4
LT
439#define IDE_CHIPSET_PCI_MASK \
440 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
441#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
442
039788e1 443struct ide_port_info;
1da177e4
LT
444
445typedef struct hwif_s {
446 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
447 struct hwif_s *mate; /* other hwif from same PCI chip */
448 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
449 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
450
451 char name[6]; /* name of interface, eg. "ide0" */
452
453 /* task file registers for pata and sata */
454 unsigned long io_ports[IDE_NR_PORTS];
455 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 456
1da177e4
LT
457 ide_drive_t drives[MAX_DRIVES]; /* drive info */
458
459 u8 major; /* our major number */
460 u8 index; /* 0 for ide0; 1 for ide1; ... */
461 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4
LT
462 u8 bus_state; /* power state of the IDE bus */
463
e95d9c6b 464 u32 host_flags;
6a824c92 465
4099d143
BZ
466 u8 pio_mask;
467
1da177e4
LT
468 u8 ultra_mask;
469 u8 mwdma_mask;
470 u8 swdma_mask;
471
49521f97
BZ
472 u8 cbl; /* cable type */
473
1da177e4
LT
474 hwif_chipset_t chipset; /* sub-module for tuning.. */
475
36501650
BZ
476 struct device *dev;
477
85620436 478 const struct ide_port_info *cds; /* chipset device struct */
1da177e4 479
18e181fe
BZ
480 ide_ack_intr_t *ack_intr;
481
1da177e4
LT
482 void (*rw_disk)(ide_drive_t *, struct request *);
483
484#if 0
485 ide_hwif_ops_t *hwifops;
486#else
1f2cf8b0
BZ
487 /* host specific initialization of devices on a port */
488 void (*port_init_devs)(struct hwif_s *);
88b2b32b 489 /* routine to program host for PIO mode */
26bcb879 490 void (*set_pio_mode)(ide_drive_t *, const u8);
88b2b32b
BZ
491 /* routine to program host for DMA mode */
492 void (*set_dma_mode)(ide_drive_t *, const u8);
1da177e4
LT
493 /* tweaks hardware to select drive */
494 void (*selectproc)(ide_drive_t *);
495 /* chipset polling based on hba specifics */
496 int (*reset_poll)(ide_drive_t *);
497 /* chipset specific changes to default for device-hba resets */
498 void (*pre_reset)(ide_drive_t *);
499 /* routine to reset controller after a disk reset */
500 void (*resetproc)(ide_drive_t *);
1da177e4
LT
501 /* special host masking for drive selection */
502 void (*maskproc)(ide_drive_t *, int);
503 /* check host's drive quirk list */
f01393e4 504 void (*quirkproc)(ide_drive_t *);
1da177e4 505#endif
b4e44369 506 u8 (*mdma_filter)(ide_drive_t *);
2d5eaa6d 507 u8 (*udma_filter)(ide_drive_t *);
1da177e4 508
bfa14b42
BZ
509 u8 (*cable_detect)(struct hwif_s *);
510
1da177e4
LT
511 void (*ata_input_data)(ide_drive_t *, void *, u32);
512 void (*ata_output_data)(ide_drive_t *, void *, u32);
513
514 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
515 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
516
15ce926a 517 void (*dma_host_set)(ide_drive_t *, int);
1da177e4
LT
518 int (*dma_setup)(ide_drive_t *);
519 void (*dma_exec_cmd)(ide_drive_t *, u8);
520 void (*dma_start)(ide_drive_t *);
521 int (*ide_dma_end)(ide_drive_t *drive);
1da177e4 522 int (*ide_dma_test_irq)(ide_drive_t *drive);
f0dd8712 523 void (*ide_dma_clear_irq)(ide_drive_t *drive);
841d2a9b 524 void (*dma_lost_irq)(ide_drive_t *drive);
c283f5db 525 void (*dma_timeout)(ide_drive_t *drive);
1da177e4
LT
526
527 void (*OUTB)(u8 addr, unsigned long port);
528 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
529 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT
530 void (*OUTSW)(unsigned long port, void *addr, u32 count);
531 void (*OUTSL)(unsigned long port, void *addr, u32 count);
532
533 u8 (*INB)(unsigned long port);
534 u16 (*INW)(unsigned long port);
1da177e4
LT
535 void (*INSW)(unsigned long port, void *addr, u32 count);
536 void (*INSL)(unsigned long port, void *addr, u32 count);
537
538 /* dma physical region descriptor table (cpu view) */
539 unsigned int *dmatable_cpu;
540 /* dma physical region descriptor table (dma view) */
541 dma_addr_t dmatable_dma;
542 /* Scatter-gather list used to build the above */
543 struct scatterlist *sg_table;
544 int sg_max_nents; /* Maximum number of entries in it */
545 int sg_nents; /* Current number of entries in it */
546 int sg_dma_direction; /* dma transfer direction */
547
548 /* data phase of the active command (currently only valid for PIO/DMA) */
549 int data_phase;
550
551 unsigned int nsect;
552 unsigned int nleft;
55c16a70 553 struct scatterlist *cursg;
1da177e4
LT
554 unsigned int cursg_ofs;
555
1da177e4
LT
556 int rqsize; /* max sectors per request */
557 int irq; /* our irq number */
558
1da177e4
LT
559 unsigned long dma_base; /* base addr for dma ports */
560 unsigned long dma_command; /* dma command register */
561 unsigned long dma_vendor1; /* dma vendor 1 register */
562 unsigned long dma_status; /* dma status register */
563 unsigned long dma_vendor3; /* dma vendor 3 register */
564 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 565
1da177e4
LT
566 unsigned long config_data; /* for use by chipset-specific code */
567 unsigned long select_data; /* for use by chipset-specific code */
568
020e322d
SS
569 unsigned long extra_base; /* extra addr for dma ports */
570 unsigned extra_ports; /* number of extra dma ports */
571
1da177e4
LT
572 unsigned noprobe : 1; /* don't probe for this interface */
573 unsigned present : 1; /* this interface exists */
574 unsigned hold : 1; /* this interface is always present */
575 unsigned serialized : 1; /* serialized all channel operation */
576 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
577 unsigned reset : 1; /* reset after probe */
1da177e4 578 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
2ad1e558 579 unsigned mmio : 1; /* host uses MMIO */
b034304a 580 unsigned straight8 : 1; /* Alan's straight 8 check */
1da177e4 581
f74c9141
BZ
582 struct device gendev;
583 struct device *portdev;
584
f36d4024 585 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
586
587 void *hwif_data; /* extra hwif data */
588
589 unsigned dma;
e3a59b4d
HR
590
591#ifdef CONFIG_BLK_DEV_IDEACPI
592 struct ide_acpi_hwif_link *acpidata;
593#endif
22fc6ecc 594} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT
595
596/*
597 * internal ide interrupt handler type
598 */
1da177e4
LT
599typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
600typedef int (ide_expiry_t)(ide_drive_t *);
601
0eea6458
BP
602/* used by ide-cd, ide-floppy, etc. */
603typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
604
1da177e4
LT
605typedef struct hwgroup_s {
606 /* irq handler, if active */
607 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 608
1da177e4
LT
609 /* BOOL: protects all fields below */
610 volatile int busy;
611 /* BOOL: wake us up on timer expiry */
612 unsigned int sleeping : 1;
613 /* BOOL: polling active & poll_timeout field valid */
614 unsigned int polling : 1;
913759ac
AC
615 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
616 unsigned int resetting : 1;
617
1da177e4
LT
618 /* current drive */
619 ide_drive_t *drive;
620 /* ptr to current hwif in linked-list */
621 ide_hwif_t *hwif;
622
1da177e4
LT
623 /* current request */
624 struct request *rq;
a6fbb1c8 625
1da177e4
LT
626 /* failsafe timer */
627 struct timer_list timer;
1da177e4
LT
628 /* timeout value during long polls */
629 unsigned long poll_timeout;
630 /* queried upon timeouts */
631 int (*expiry)(ide_drive_t *);
a6fbb1c8 632
23450319
SS
633 int req_gen;
634 int req_gen_timer;
1da177e4
LT
635} ide_hwgroup_t;
636
7662d046
BZ
637typedef struct ide_driver_s ide_driver_t;
638
f9383c42 639extern struct mutex ide_setting_mtx;
1da177e4 640
7662d046
BZ
641int set_io_32bit(ide_drive_t *, int);
642int set_pio_mode(ide_drive_t *, int);
643int set_using_dma(ide_drive_t *, int);
644
645#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
646/*
647 * configurable drive settings
648 */
649
650#define TYPE_INT 0
1497943e
BZ
651#define TYPE_BYTE 1
652#define TYPE_SHORT 2
1da177e4
LT
653
654#define SETTING_READ (1 << 0)
655#define SETTING_WRITE (1 << 1)
656#define SETTING_RW (SETTING_READ | SETTING_WRITE)
657
658typedef int (ide_procset_t)(ide_drive_t *, int);
659typedef struct ide_settings_s {
660 char *name;
661 int rw;
1da177e4
LT
662 int data_type;
663 int min;
664 int max;
665 int mul_factor;
666 int div_factor;
667 void *data;
668 ide_procset_t *set;
669 int auto_remove;
670 struct ide_settings_s *next;
671} ide_settings_t;
672
1497943e 673int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT
674
675/*
676 * /proc/ide interface
677 */
678typedef struct {
679 const char *name;
680 mode_t mode;
681 read_proc_t *read_proc;
682 write_proc_t *write_proc;
683} ide_proc_entry_t;
684
ecfd80e4
BZ
685void proc_ide_create(void);
686void proc_ide_destroy(void);
5cbf79cd 687void ide_proc_register_port(ide_hwif_t *);
d9270a3f 688void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 689void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 690void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
691void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
692void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
693
694void ide_add_generic_settings(ide_drive_t *);
695
1da177e4
LT
696read_proc_t proc_ide_read_capacity;
697read_proc_t proc_ide_read_geometry;
698
699#ifdef CONFIG_BLK_DEV_IDEPCI
700void ide_pci_create_host_proc(const char *, get_info_t *);
701#endif
702
703/*
704 * Standard exit stuff:
705 */
706#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
707{ \
708 len -= off; \
709 if (len < count) { \
710 *eof = 1; \
711 if (len <= 0) \
712 return 0; \
713 } else \
714 len = count; \
715 *start = page + off; \
716 return len; \
717}
718#else
ecfd80e4
BZ
719static inline void proc_ide_create(void) { ; }
720static inline void proc_ide_destroy(void) { ; }
5cbf79cd 721static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 722static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 723static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 724static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
725static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
726static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
727static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT
728#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
729#endif
730
731/*
732 * Power Management step value (rq->pm->pm_step).
733 *
734 * The step value starts at 0 (ide_pm_state_start_suspend) for a
735 * suspend operation or 1000 (ide_pm_state_start_resume) for a
736 * resume operation.
737 *
738 * For each step, the core calls the subdriver start_power_step() first.
739 * This can return:
740 * - ide_stopped : In this case, the core calls us back again unless
741 * step have been set to ide_power_state_completed.
742 * - ide_started : In this case, the channel is left busy until an
743 * async event (interrupt) occurs.
744 * Typically, start_power_step() will issue a taskfile request with
745 * do_rw_taskfile().
746 *
747 * Upon reception of the interrupt, the core will call complete_power_step()
748 * with the error code if any. This routine should update the step value
749 * and return. It should not start a new request. The core will call
750 * start_power_step for the new step value, unless step have been set to
751 * ide_power_state_completed.
752 *
753 * Subdrivers are expected to define their own additional power
754 * steps from 1..999 for suspend and from 1001..1999 for resume,
755 * other values are reserved for future use.
756 */
757
758enum {
759 ide_pm_state_completed = -1,
760 ide_pm_state_start_suspend = 0,
761 ide_pm_state_start_resume = 1000,
762};
763
764/*
765 * Subdrivers support.
4ef3b8f4
LR
766 *
767 * The gendriver.owner field should be set to the module owner of this driver.
768 * The gendriver.name field should be set to the name of this driver
1da177e4 769 */
7662d046 770struct ide_driver_s {
1da177e4
LT
771 const char *version;
772 u8 media;
1da177e4 773 unsigned supports_dsc_overlap : 1;
1da177e4
LT
774 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
775 int (*end_request)(ide_drive_t *, int, int);
776 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
777 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 778 struct device_driver gen_driver;
4031bbe4
RK
779 int (*probe)(ide_drive_t *);
780 void (*remove)(ide_drive_t *);
0d2157f7 781 void (*resume)(ide_drive_t *);
4031bbe4 782 void (*shutdown)(ide_drive_t *);
7662d046
BZ
783#ifdef CONFIG_IDE_PROC_FS
784 ide_proc_entry_t *proc;
785#endif
786};
1da177e4 787
4031bbe4
RK
788#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
789
1da177e4
LT
790int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
791
792/*
793 * ide_hwifs[] is the master data structure used to keep track
794 * of just about everything in ide.c. Whenever possible, routines
795 * should be using pointers to a drive (ide_drive_t *) or
796 * pointers to a hwif (ide_hwif_t *), rather than indexing this
797 * structure directly (the allocation/layout may change!).
798 *
799 */
800#ifndef _IDE_C
801extern ide_hwif_t ide_hwifs[]; /* master data repository */
802#endif
803extern int noautodma;
804
805extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
806int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
807 int uptodate, int nr_sectors);
1da177e4 808
1da177e4
LT
809extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
810
cd2a2d96
BZ
811void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
812 ide_expiry_t *);
1da177e4
LT
813
814ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
815
1da177e4
LT
816ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
817
818ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
819
1da177e4
LT
820extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
821
822extern void ide_fix_driveid(struct hd_driveid *);
01745112 823
1da177e4
LT
824extern void ide_fixstring(u8 *, const int, const int);
825
74af21cf 826int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 827
1da177e4
LT
828extern ide_startstop_t ide_do_reset (ide_drive_t *);
829
1da177e4
LT
830extern void ide_init_drive_cmd (struct request *rq);
831
1da177e4
LT
832/*
833 * "action" parameter type for ide_do_drive_cmd() below.
834 */
835typedef enum {
836 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT
837 ide_preempt, /* insert rq in front of current request */
838 ide_head_wait, /* insert rq in front of current request and wait for it */
839 ide_end /* insert rq at end of list, but don't wait for it */
840} ide_action_t;
841
1da177e4
LT
842extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
843
1da177e4
LT
844extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
845
9e42237f
BZ
846enum {
847 IDE_TFLAG_LBA48 = (1 << 0),
848 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
74095a91
BZ
849 IDE_TFLAG_FLAGGED = (1 << 2),
850 IDE_TFLAG_OUT_DATA = (1 << 3),
851 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
852 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
853 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
854 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
855 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
856 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
857 IDE_TFLAG_OUT_HOB_NSECT |
858 IDE_TFLAG_OUT_HOB_LBAL |
859 IDE_TFLAG_OUT_HOB_LBAM |
860 IDE_TFLAG_OUT_HOB_LBAH,
861 IDE_TFLAG_OUT_FEATURE = (1 << 9),
862 IDE_TFLAG_OUT_NSECT = (1 << 10),
863 IDE_TFLAG_OUT_LBAL = (1 << 11),
864 IDE_TFLAG_OUT_LBAM = (1 << 12),
865 IDE_TFLAG_OUT_LBAH = (1 << 13),
866 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
867 IDE_TFLAG_OUT_NSECT |
868 IDE_TFLAG_OUT_LBAL |
869 IDE_TFLAG_OUT_LBAM |
870 IDE_TFLAG_OUT_LBAH,
807e35d6 871 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 872 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ
873 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
874 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 875 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 876 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ
877 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
878 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
879 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
880 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
881 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
882 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
883 IDE_TFLAG_IN_HOB_LBAM |
884 IDE_TFLAG_IN_HOB_LBAH,
885 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
886 IDE_TFLAG_IN_HOB_NSECT |
887 IDE_TFLAG_IN_HOB_LBA,
888 IDE_TFLAG_IN_NSECT = (1 << 25),
889 IDE_TFLAG_IN_LBAL = (1 << 26),
890 IDE_TFLAG_IN_LBAM = (1 << 27),
891 IDE_TFLAG_IN_LBAH = (1 << 28),
892 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
893 IDE_TFLAG_IN_LBAM |
894 IDE_TFLAG_IN_LBAH,
895 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
896 IDE_TFLAG_IN_LBA,
897 IDE_TFLAG_IN_DEVICE = (1 << 29),
657cc1a8
BZ
898 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
899 IDE_TFLAG_IN_HOB,
900 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
901 IDE_TFLAG_IN_TF,
902 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
903 IDE_TFLAG_IN_DEVICE,
35cf2b94
TH
904 /* force 16-bit I/O operations */
905 IDE_TFLAG_IO_16BIT = (1 << 30),
395d8ef5
BZ
906 /* ide_task_t was allocated using kmalloc() */
907 IDE_TFLAG_DYN = (1 << 31),
9e42237f
BZ
908};
909
650d841d
BZ
910struct ide_taskfile {
911 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
912
913 u8 hob_feature; /* 1-5: additional data to support LBA48 */
914 u8 hob_nsect;
915 u8 hob_lbal;
916 u8 hob_lbam;
917 u8 hob_lbah;
918
919 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
920
921 union { /*  7: */
922 u8 error; /* read: error */
923 u8 feature; /* write: feature */
924 };
925
926 u8 nsect; /* 8: number of sectors */
927 u8 lbal; /* 9: LBA low */
928 u8 lbam; /* 10: LBA mid */
929 u8 lbah; /* 11: LBA high */
930
931 u8 device; /* 12: device select */
932
933 union { /* 13: */
934 u8 status; /*  read: status  */
935 u8 command; /* write: command */
936 };
937};
938
1da177e4 939typedef struct ide_task_s {
650d841d
BZ
940 union {
941 struct ide_taskfile tf;
942 u8 tf_array[14];
943 };
866e2ec9 944 u32 tf_flags;
1da177e4 945 int data_phase;
1da177e4
LT
946 struct request *rq; /* copy of request */
947 void *special; /* valid_t generally */
948} ide_task_t;
949
9e42237f 950void ide_tf_load(ide_drive_t *, ide_task_t *);
c2b57cdc 951void ide_tf_read(ide_drive_t *, ide_task_t *);
1da177e4
LT
952
953extern void SELECT_DRIVE(ide_drive_t *);
1da177e4 954extern void SELECT_MASK(ide_drive_t *, int);
1da177e4
LT
955
956extern int drive_is_ready(ide_drive_t *);
1da177e4 957
2fc57388
BZ
958void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
959
f6e29e35 960ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 961
4d7a984b
TH
962void task_end_request(ide_drive_t *, struct request *, u8);
963
ac026ff2 964int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
965int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
966
1da177e4
LT
967int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
968int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
969int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
970
971extern int system_bus_clock(void);
972
973extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
974extern int ide_config_drive_speed(ide_drive_t *, u8);
975extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
976extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
977
978extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
979
1da177e4
LT
980extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
981
982extern int ide_spin_wait_hwgroup(ide_drive_t *);
983extern void ide_timer_expiry(unsigned long);
7d12e780 984extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 985extern void do_ide_request(struct request_queue *);
1da177e4
LT
986
987void ide_init_disk(struct gendisk *, ide_drive_t *);
988
6d208b39 989#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
990extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
991#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
992#else
993#define ide_pci_register_driver(d) pci_register_driver(d)
994#endif
995
85620436
BZ
996void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
997void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 998
8e882ba1 999#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
c413b9b9
BZ
1000void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1001#else
1002static inline void ide_hwif_setup_dma(ide_hwif_t *hwif,
1003 const struct ide_port_info *d) { }
1004#endif
1005
1da177e4
LT
1006extern void default_hwif_iops(ide_hwif_t *);
1007extern void default_hwif_mmiops(ide_hwif_t *);
1008extern void default_hwif_transport(ide_hwif_t *);
1009
1da177e4
LT
1010typedef struct ide_pci_enablebit_s {
1011 u8 reg; /* byte pci reg holding the enable-bit */
1012 u8 mask; /* mask to isolate the enable-bit */
1013 u8 val; /* value of masked reg when "enabled" */
1014} ide_pci_enablebit_t;
1015
1016enum {
1017 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1018 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1019 /* single port device */
a5d8c5c8 1020 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1021 /* don't use legacy PIO blacklist */
1022 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1023 /* don't use conservative PIO "downgrade" */
1024 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
26bcb879
BZ
1025 /* use PIO8/9 for prefetch off/on */
1026 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1027 /* use PIO6/7 for fast-devsel off/on */
1028 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1029 /* use 100-102 and 200-202 PIO values to set DMA modes */
1030 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1031 /*
1032 * keep DMA setting when programming PIO mode, may be used only
1033 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1034 */
1035 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1036 /* program host for the transfer mode after programming device */
1037 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1038 /* don't program host/device for the transfer mode ("smart" hosts) */
1039 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1040 /* trust BIOS for programming chipset/device for DMA */
1041 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
807b90d0 1042 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
0ae2e178 1043 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ
1044 /* ATAPI DMA is unsupported */
1045 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
7cab14a7
BZ
1046 /* set if host is a "bootable" controller */
1047 IDE_HFLAG_BOOTABLE = (1 << 13),
47b68788
BZ
1048 /* host doesn't support DMA */
1049 IDE_HFLAG_NO_DMA = (1 << 14),
1050 /* check if host is PCI IDE device before allowing DMA */
1051 IDE_HFLAG_NO_AUTODMA = (1 << 15),
807b90d0
BZ
1052 /* don't autotune PIO */
1053 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
9ffcf364 1054 /* host is CS5510/CS5520 */
807b90d0 1055 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
238e4f14
BZ
1056 /* no LBA48 */
1057 IDE_HFLAG_NO_LBA48 = (1 << 17),
1058 /* no LBA48 DMA */
1059 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1060 /* data FIFO is cleared by an error */
1061 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1062 /* serialize ports */
1063 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1064 /* use legacy IRQs */
1065 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1066 /* force use of legacy IRQs */
1067 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ
1068 /* limit LBA48 requests to 256 sectors */
1069 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ
1070 /* use 32-bit I/O ops */
1071 IDE_HFLAG_IO_32BIT = (1 << 24),
1072 /* unmask IRQs */
1073 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
4db90a14 1074 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
8704de8f
BZ
1075 /* host is CY82C693 */
1076 IDE_HFLAG_CY82C693 = (1 << 27),
8ac2b42a
BZ
1077 /* force host out of "simplex" mode */
1078 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1079 /* DSC overlap is unsupported */
1080 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1081 /* never use 32-bit I/O ops */
1082 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1083 /* never unmask IRQs */
1084 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1085};
1086
7cab14a7
BZ
1087#ifdef CONFIG_BLK_DEV_OFFBOARD
1088# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1089#else
1090# define IDE_HFLAG_OFF_BOARD 0
1091#endif
1092
039788e1 1093struct ide_port_info {
1da177e4 1094 char *name;
1da177e4
LT
1095 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1096 void (*init_iops)(ide_hwif_t *);
1097 void (*init_hwif)(ide_hwif_t *);
1098 void (*init_dma)(ide_hwif_t *, unsigned long);
1da177e4 1099 ide_pci_enablebit_t enablebits[2];
528a572d 1100 hwif_chipset_t chipset;
3071a9d0 1101 u8 extra;
9ffcf364 1102 u32 host_flags;
4099d143 1103 u8 pio_mask;
5f8b6c34
BZ
1104 u8 swdma_mask;
1105 u8 mwdma_mask;
18137207 1106 u8 udma_mask;
039788e1 1107};
1da177e4 1108
85620436
BZ
1109int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1110int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT
1111
1112void ide_map_sg(ide_drive_t *, struct request *);
1113void ide_init_sg_cmd(ide_drive_t *, struct request *);
1114
1115#define BAD_DMA_DRIVE 0
1116#define GOOD_DMA_DRIVE 1
1117
65e5f2e3
JC
1118struct drive_list_entry {
1119 const char *id_model;
1120 const char *id_firmware;
1121};
1122
1123int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ
1124
1125#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1126int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1127int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1128
1129u8 ide_find_dma_mode(ide_drive_t *, u8);
1130
1131static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1132{
1133 return ide_find_dma_mode(drive, XFER_UDMA_6);
1134}
1135
4a546e04 1136void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1137void ide_dma_off(ide_drive_t *);
4a546e04 1138void ide_dma_on(ide_drive_t *);
3608b5d7 1139int ide_set_dma(ide_drive_t *);
578cfa0d 1140void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1141ide_startstop_t ide_dma_intr(ide_drive_t *);
1142
062f9f02
BZ
1143int ide_build_sglist(ide_drive_t *, struct request *);
1144void ide_destroy_dmatable(ide_drive_t *);
1145
8e882ba1 1146#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4 1147extern int ide_build_dmatable(ide_drive_t *, struct request *);
1da177e4 1148extern int ide_release_dma(ide_hwif_t *);
ecf32796 1149extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1da177e4 1150
15ce926a 1151void ide_dma_host_set(ide_drive_t *, int);
1da177e4
LT
1152extern int ide_dma_setup(ide_drive_t *);
1153extern void ide_dma_start(ide_drive_t *);
1154extern int __ide_dma_end(ide_drive_t *);
841d2a9b 1155extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1156extern void ide_dma_timeout(ide_drive_t *);
8e882ba1 1157#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4
LT
1158
1159#else
3ab7efe8 1160static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1161static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1162static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1163static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1164static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1165static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1166static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1167static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1168static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1da177e4
LT
1169#endif /* CONFIG_BLK_DEV_IDEDMA */
1170
8e882ba1 1171#ifndef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4
LT
1172static inline void ide_release_dma(ide_hwif_t *drive) {;}
1173#endif
1174
e3a59b4d
HR
1175#ifdef CONFIG_BLK_DEV_IDEACPI
1176extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1177extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1178extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1179extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1180void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1181extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1182#else
1183static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1184static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1185static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1186static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1187static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1188static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1189#endif
1190
fbd13088 1191void ide_remove_port_from_hwgroup(ide_hwif_t *);
1da177e4
LT
1192extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1193extern void ide_hwif_release_regions(ide_hwif_t* hwif);
f82c2b17 1194void ide_unregister(unsigned int, int, int);
1da177e4
LT
1195
1196void ide_register_region(struct gendisk *);
1197void ide_unregister_region(struct gendisk *);
1198
f01393e4 1199void ide_undecoded_slave(ide_drive_t *);
1da177e4 1200
c413b9b9
BZ
1201int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1202int ide_device_add(u8 idx[4], const struct ide_port_info *);
2dde7861
BZ
1203void ide_port_unregister_devices(ide_hwif_t *);
1204void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1205
1206static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1207{
1208 return hwif->hwif_data;
1209}
1210
1211static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1212{
1213 hwif->hwif_data = data;
1214}
1215
3ab7efe8 1216const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1217extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1218extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1219
2229833c
BZ
1220static inline int ide_dev_has_iordy(struct hd_driveid *id)
1221{
1222 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1223}
1224
6c3c22f3
SS
1225static inline int ide_dev_is_sata(struct hd_driveid *id)
1226{
1227 /*
1228 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1229 * verifying that word 80 by casting it to a signed type --
1230 * this trick allows us to filter out the reserved values of
1231 * 0x0000 and 0xffff along with the earlier ATA revisions...
1232 */
1233 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1234 return 1;
1235 return 0;
1236}
1237
a501633c 1238u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1239u8 ide_dump_status(ide_drive_t *, const char *, u8);
1240
1241typedef struct ide_pio_timings_s {
1242 int setup_time; /* Address setup (ns) minimum */
1243 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS
1244 int cycle_time; /* Cycle time (ns) minimum = */
1245 /* active + recovery (+ setup for some chips) */
1da177e4
LT
1246} ide_pio_timings_t;
1247
7dd00083 1248unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1249u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT
1250extern const ide_pio_timings_t ide_pio_timings[6];
1251
88b2b32b
BZ
1252int ide_set_pio_mode(ide_drive_t *, u8);
1253int ide_set_dma_mode(ide_drive_t *, u8);
1254
26bcb879
BZ
1255void ide_set_pio(ide_drive_t *, u8);
1256
1257static inline void ide_set_max_pio(ide_drive_t *drive)
1258{
1259 ide_set_pio(drive, 255);
1260}
1da177e4
LT
1261
1262extern spinlock_t ide_lock;
ef29888e 1263extern struct mutex ide_cfg_mtx;
1da177e4
LT
1264/*
1265 * Structure locking:
1266 *
ef29888e 1267 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1268 * ide_hwif_t->{next,hwgroup}
1269 * ide_drive_t->next
1270 *
1271 * ide_hwgroup_t->busy: ide_lock
1272 * ide_hwgroup_t->hwif: ide_lock
1273 * ide_hwif_t->mate: constant, no locking
1274 * ide_drive_t->hwif: constant, no locking
1275 */
1276
366c7f55 1277#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1278
1279extern struct bus_type ide_bus_type;
f74c9141 1280extern struct class *ide_port_class;
1da177e4
LT
1281
1282/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1283#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1284
1285/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1286#define ide_id_has_flush_cache_ext(id) \
1287 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1288
7b9f25b5
BZ
1289static inline void ide_dump_identify(u8 *id)
1290{
1291 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1292}
1293
86b37860
CL
1294static inline int hwif_to_node(ide_hwif_t *hwif)
1295{
36501650 1296 struct pci_dev *dev = to_pci_dev(hwif->dev);
1f07e988 1297 return hwif->dev ? pcibus_to_node(dev->bus) : -1;
86b37860
CL
1298}
1299
1b678347
BH
1300static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1301{
1302 ide_hwif_t *hwif = HWIF(drive);
1303
1304 return &hwif->drives[(drive->dn ^ 1) & 1];
1305}
1306
81ca6919
BZ
1307static inline void ide_set_irq(ide_drive_t *drive, int on)
1308{
1309 drive->hwif->OUTB(drive->ctl | (on ? 0 : 2), IDE_CONTROL_REG);
1310}
1311
c47137a9
BZ
1312static inline u8 ide_read_status(ide_drive_t *drive)
1313{
1314 ide_hwif_t *hwif = drive->hwif;
1315
1316 return hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1317}
1318
1319static inline u8 ide_read_altstatus(ide_drive_t *drive)
1320{
1321 ide_hwif_t *hwif = drive->hwif;
1322
1323 return hwif->INB(hwif->io_ports[IDE_CONTROL_OFFSET]);
1324}
1325
64a57fe4
BZ
1326static inline u8 ide_read_error(ide_drive_t *drive)
1327{
1328 ide_hwif_t *hwif = drive->hwif;
1329
1330 return hwif->INB(hwif->io_ports[IDE_ERROR_OFFSET]);
1331}
1332
1da177e4 1333#endif /* _IDE_H */