ide: add IDE_HFLAG_NO_{DMA,AUTODMA} host flags
[linux-2.6-block.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
12#include <linux/hdsmart.h>
13#include <linux/blkdev.h>
14#include <linux/proc_fs.h>
15#include <linux/interrupt.h>
16#include <linux/bitops.h>
17#include <linux/bio.h>
18#include <linux/device.h>
19#include <linux/pci.h>
f36d4024 20#include <linux/completion.h>
e3a59b4d
HR
21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
27#include <asm/semaphore.h>
f9383c42 28#include <asm/mutex.h>
1da177e4 29
1da177e4
LT
30/******************************************************************************
31 * IDE driver configuration options (play with these as desired):
32 *
33 * REALLY_SLOW_IO can be defined in ide.c and ide-cd.c, if necessary
34 */
35#define INITIAL_MULT_COUNT 0 /* off=0; on=2,4,8,16,32, etc.. */
36
37#ifndef SUPPORT_SLOW_DATA_PORTS /* 1 to support slow data ports */
38#define SUPPORT_SLOW_DATA_PORTS 1 /* 0 to reduce kernel size */
39#endif
40#ifndef SUPPORT_VLB_SYNC /* 1 to support weird 32-bit chips */
41#define SUPPORT_VLB_SYNC 1 /* 0 to reduce kernel size */
42#endif
43#ifndef OK_TO_RESET_CONTROLLER /* 1 needed for good error recovery */
44#define OK_TO_RESET_CONTROLLER 1 /* 0 for use with AH2372A/B interface */
45#endif
46
47#ifndef DISABLE_IRQ_NOSYNC
48#define DISABLE_IRQ_NOSYNC 0
49#endif
50
51/*
52 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
53 * number.
54 */
55
56#define IDE_NO_IRQ (-1)
57
58/*
59 * "No user-serviceable parts" beyond this point :)
60 *****************************************************************************/
61
62typedef unsigned char byte; /* used everywhere */
63
64/*
65 * Probably not wise to fiddle with these
66 */
67#define ERROR_MAX 8 /* Max read/write errors per sector */
68#define ERROR_RESET 3 /* Reset controller every 4th retry */
69#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
70
71/*
72 * Tune flags
73 */
74#define IDE_TUNE_NOAUTO 2
75#define IDE_TUNE_AUTO 1
76#define IDE_TUNE_DEFAULT 0
77
78/*
79 * state flags
80 */
81
82#define DMA_PIO_RETRY 1 /* retrying in PIO */
83
84#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
85#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
86
87/*
88 * Definitions for accessing IDE controller registers
89 */
90#define IDE_NR_PORTS (10)
91
92#define IDE_DATA_OFFSET (0)
93#define IDE_ERROR_OFFSET (1)
94#define IDE_NSECTOR_OFFSET (2)
95#define IDE_SECTOR_OFFSET (3)
96#define IDE_LCYL_OFFSET (4)
97#define IDE_HCYL_OFFSET (5)
98#define IDE_SELECT_OFFSET (6)
99#define IDE_STATUS_OFFSET (7)
100#define IDE_CONTROL_OFFSET (8)
101#define IDE_IRQ_OFFSET (9)
102
103#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
104#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
105
106#define IDE_CONTROL_OFFSET_HOB (7)
107
108#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
109#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
110#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
111#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
112#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
113#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
114#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
115#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
116#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
117#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
118
119#define IDE_FEATURE_REG IDE_ERROR_REG
120#define IDE_COMMAND_REG IDE_STATUS_REG
121#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
122#define IDE_IREASON_REG IDE_NSECTOR_REG
123#define IDE_BCOUNTL_REG IDE_LCYL_REG
124#define IDE_BCOUNTH_REG IDE_HCYL_REG
125
126#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
127#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
128#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
129#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
130#define DRIVE_READY (READY_STAT | SEEK_STAT)
131#define DATA_READY (DRQ_STAT)
132
133#define BAD_CRC (ABRT_ERR | ICRC_ERR)
134
135#define SATA_NR_PORTS (3) /* 16 possible ?? */
136
137#define SATA_STATUS_OFFSET (0)
138#define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
139#define SATA_ERROR_OFFSET (1)
140#define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
141#define SATA_CONTROL_OFFSET (2)
142#define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
143
144#define SATA_MISC_OFFSET (0)
145#define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
146#define SATA_PHY_OFFSET (1)
147#define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
148#define SATA_IEN_OFFSET (2)
149#define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
150
151/*
152 * Our Physical Region Descriptor (PRD) table should be large enough
153 * to handle the biggest I/O request we are likely to see. Since requests
154 * can have no more than 256 sectors, and since the typical blocksize is
155 * two or more sectors, we could get by with a limit of 128 entries here for
156 * the usual worst case. Most requests seem to include some contiguous blocks,
157 * further reducing the number of table entries required.
158 *
159 * The driver reverts to PIO mode for individual requests that exceed
160 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
161 * 100% of all crazy scenarios here is not necessary.
162 *
163 * As it turns out though, we must allocate a full 4KB page for this,
164 * so the two PRD tables (ide0 & ide1) will each get half of that,
165 * allowing each to have about 256 entries (8 bytes each) from this.
166 */
167#define PRD_BYTES 8
168#define PRD_ENTRIES 256
169
170/*
171 * Some more useful definitions
172 */
173#define PARTN_BITS 6 /* number of minor dev bits for partitions */
174#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
175#define SECTOR_SIZE 512
176#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
177#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
178
179/*
180 * Timeouts for various operations:
181 */
182#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
183#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
184#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
185#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
186#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
187#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
188
1da177e4
LT
189/*
190 * Check for an interrupt and acknowledge the interrupt status
191 */
192struct hwif_s;
193typedef int (ide_ack_intr_t)(struct hwif_s *);
194
195#ifndef NO_DMA
196#define NO_DMA 255
197#endif
198
199/*
200 * hwif_chipset_t is used to keep track of the specific hardware
201 * chipset used by each IDE interface, if known.
202 */
203typedef enum { ide_unknown, ide_generic, ide_pci,
204 ide_cmd640, ide_dtc2278, ide_ali14xx,
205 ide_qd65xx, ide_umc8672, ide_ht6560b,
206 ide_rz1000, ide_trm290,
207 ide_cmd646, ide_cy82c693, ide_4drives,
208 ide_pmac, ide_etrax100, ide_acorn,
26a940e2 209 ide_au1xxx, ide_forced
1da177e4
LT
210} hwif_chipset_t;
211
212/*
213 * Structure to hold all information about the location of this port
214 */
215typedef struct hw_regs_s {
216 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
217 int irq; /* our irq number */
218 int dma; /* our dma entry */
219 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
220 hwif_chipset_t chipset;
4349d5cd 221 struct device *dev;
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LT
222} hw_regs_t;
223
224/*
225 * Register new hardware with ide
226 */
869c56ee
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227int ide_register_hw(hw_regs_t *, int, struct hwif_s **);
228int ide_register_hw_with_fixup(hw_regs_t *, int, struct hwif_s **,
229 void (*)(struct hwif_s *));
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230
231/*
232 * Set up hw_regs_t structure before calling ide_register_hw (optional)
233 */
234void ide_setup_ports( hw_regs_t *hw,
235 unsigned long base,
236 int *offsets,
237 unsigned long ctrl,
238 unsigned long intr,
239 ide_ack_intr_t *ack_intr,
240#if 0
241 ide_io_ops_t *iops,
242#endif
243 int irq);
244
245static inline void ide_std_init_ports(hw_regs_t *hw,
246 unsigned long io_addr,
247 unsigned long ctl_addr)
248{
249 unsigned int i;
250
251 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
252 hw->io_ports[i] = io_addr++;
253
254 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
255}
256
257#include <asm/ide.h>
258
83d7dbc4
MM
259#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
260#undef MAX_HWIFS
83ae20c8
BH
261#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
262#endif
263
1da177e4
LT
264/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
265#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
266# define ide_default_io_base(index) (0)
267# define ide_default_irq(base) (0)
268# define ide_init_default_irq(base) (0)
269#endif
270
271/*
272 * ide_init_hwif_ports() is OBSOLETE and will be removed in 2.7 series.
273 * New ports shouldn't define IDE_ARCH_OBSOLETE_INIT in <asm/ide.h>.
274 */
275#ifdef IDE_ARCH_OBSOLETE_INIT
276static inline void ide_init_hwif_ports(hw_regs_t *hw,
277 unsigned long io_addr,
278 unsigned long ctl_addr,
279 int *irq)
280{
281 if (!ctl_addr)
282 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
283 else
284 ide_std_init_ports(hw, io_addr, ctl_addr);
285
286 if (irq)
287 *irq = 0;
288
289 hw->io_ports[IDE_IRQ_OFFSET] = 0;
290
291#ifdef CONFIG_PPC32
292 if (ppc_ide_md.ide_init_hwif)
293 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
294#endif
295}
296#else
297static inline void ide_init_hwif_ports(hw_regs_t *hw,
298 unsigned long io_addr,
299 unsigned long ctl_addr,
300 int *irq)
301{
302 if (io_addr || ctl_addr)
303 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
304}
305#endif /* IDE_ARCH_OBSOLETE_INIT */
306
307/* Currently only m68k, apus and m8xx need it */
308#ifndef IDE_ARCH_ACK_INTR
309# define ide_ack_intr(hwif) (1)
310#endif
311
312/* Currently only Atari needs it */
313#ifndef IDE_ARCH_LOCK
314# define ide_release_lock() do {} while (0)
315# define ide_get_lock(hdlr, data) do {} while (0)
316#endif /* IDE_ARCH_LOCK */
317
318/*
319 * Now for the data we need to maintain per-drive: ide_drive_t
320 */
321
322#define ide_scsi 0x21
323#define ide_disk 0x20
324#define ide_optical 0x7
325#define ide_cdrom 0x5
326#define ide_tape 0x1
327#define ide_floppy 0x0
328
329/*
330 * Special Driver Flags
331 *
332 * set_geometry : respecify drive geometry
333 * recalibrate : seek to cyl 0
334 * set_multmode : set multmode count
335 * set_tune : tune interface for drive
336 * serviced : service command
337 * reserved : unused
338 */
339typedef union {
340 unsigned all : 8;
341 struct {
342#if defined(__LITTLE_ENDIAN_BITFIELD)
343 unsigned set_geometry : 1;
344 unsigned recalibrate : 1;
345 unsigned set_multmode : 1;
346 unsigned set_tune : 1;
347 unsigned serviced : 1;
348 unsigned reserved : 3;
349#elif defined(__BIG_ENDIAN_BITFIELD)
350 unsigned reserved : 3;
351 unsigned serviced : 1;
352 unsigned set_tune : 1;
353 unsigned set_multmode : 1;
354 unsigned recalibrate : 1;
355 unsigned set_geometry : 1;
356#else
357#error "Please fix <asm/byteorder.h>"
358#endif
359 } b;
360} special_t;
361
362/*
363 * ATA DATA Register Special.
364 * ATA NSECTOR Count Register().
365 * ATAPI Byte Count Register.
366 * Channel index ordering pairs.
367 */
368typedef union {
369 unsigned all :16;
370 struct {
371#if defined(__LITTLE_ENDIAN_BITFIELD)
372 unsigned low :8; /* LSB */
373 unsigned high :8; /* MSB */
374#elif defined(__BIG_ENDIAN_BITFIELD)
375 unsigned high :8; /* MSB */
376 unsigned low :8; /* LSB */
377#else
378#error "Please fix <asm/byteorder.h>"
379#endif
380 } b;
381} ata_nsector_t, ata_data_t, atapi_bcount_t, ata_index_t;
382
1da177e4
LT
383/*
384 * ATA-IDE Select Register, aka Device-Head
385 *
386 * head : always zeros here
387 * unit : drive select number: 0/1
388 * bit5 : always 1
389 * lba : using LBA instead of CHS
390 * bit7 : always 1
391 */
392typedef union {
393 unsigned all : 8;
394 struct {
395#if defined(__LITTLE_ENDIAN_BITFIELD)
396 unsigned head : 4;
397 unsigned unit : 1;
398 unsigned bit5 : 1;
399 unsigned lba : 1;
400 unsigned bit7 : 1;
401#elif defined(__BIG_ENDIAN_BITFIELD)
402 unsigned bit7 : 1;
403 unsigned lba : 1;
404 unsigned bit5 : 1;
405 unsigned unit : 1;
406 unsigned head : 4;
407#else
408#error "Please fix <asm/byteorder.h>"
409#endif
410 } b;
411} select_t, ata_select_t;
412
413/*
414 * The ATA-IDE Status Register.
415 * The ATAPI Status Register.
416 *
417 * check : Error occurred
418 * idx : Index Error
419 * corr : Correctable error occurred
420 * drq : Data is request by the device
421 * dsc : Disk Seek Complete : ata
422 * : Media access command finished : atapi
423 * df : Device Fault : ata
424 * : Reserved : atapi
425 * drdy : Ready, Command Mode Capable : ata
426 * : Ignored for ATAPI commands : atapi
427 * bsy : Disk is Busy
428 * : The device has access to the command block
429 */
430typedef union {
431 unsigned all :8;
432 struct {
433#if defined(__LITTLE_ENDIAN_BITFIELD)
434 unsigned check :1;
435 unsigned idx :1;
436 unsigned corr :1;
437 unsigned drq :1;
438 unsigned dsc :1;
439 unsigned df :1;
440 unsigned drdy :1;
441 unsigned bsy :1;
442#elif defined(__BIG_ENDIAN_BITFIELD)
443 unsigned bsy :1;
444 unsigned drdy :1;
445 unsigned df :1;
446 unsigned dsc :1;
447 unsigned drq :1;
448 unsigned corr :1;
449 unsigned idx :1;
450 unsigned check :1;
451#else
452#error "Please fix <asm/byteorder.h>"
453#endif
454 } b;
455} ata_status_t, atapi_status_t;
456
1da177e4
LT
457/*
458 * ATAPI Feature Register
459 *
460 * dma : Using DMA or PIO
461 * reserved321 : Reserved
462 * reserved654 : Reserved (Tag Type)
463 * reserved7 : Reserved
464 */
465typedef union {
466 unsigned all :8;
467 struct {
468#if defined(__LITTLE_ENDIAN_BITFIELD)
469 unsigned dma :1;
470 unsigned reserved321 :3;
471 unsigned reserved654 :3;
472 unsigned reserved7 :1;
473#elif defined(__BIG_ENDIAN_BITFIELD)
474 unsigned reserved7 :1;
475 unsigned reserved654 :3;
476 unsigned reserved321 :3;
477 unsigned dma :1;
478#else
479#error "Please fix <asm/byteorder.h>"
480#endif
481 } b;
482} atapi_feature_t;
483
484/*
485 * ATAPI Interrupt Reason Register.
486 *
487 * cod : Information transferred is command (1) or data (0)
488 * io : The device requests us to read (1) or write (0)
489 * reserved : Reserved
490 */
491typedef union {
492 unsigned all :8;
493 struct {
494#if defined(__LITTLE_ENDIAN_BITFIELD)
495 unsigned cod :1;
496 unsigned io :1;
497 unsigned reserved :6;
498#elif defined(__BIG_ENDIAN_BITFIELD)
499 unsigned reserved :6;
500 unsigned io :1;
501 unsigned cod :1;
502#else
503#error "Please fix <asm/byteorder.h>"
504#endif
505 } b;
506} atapi_ireason_t;
507
508/*
509 * The ATAPI error register.
510 *
511 * ili : Illegal Length Indication
512 * eom : End Of Media Detected
513 * abrt : Aborted command - As defined by ATA
514 * mcr : Media Change Requested - As defined by ATA
515 * sense_key : Sense key of the last failed packet command
516 */
517typedef union {
518 unsigned all :8;
519 struct {
520#if defined(__LITTLE_ENDIAN_BITFIELD)
521 unsigned ili :1;
522 unsigned eom :1;
523 unsigned abrt :1;
524 unsigned mcr :1;
525 unsigned sense_key :4;
526#elif defined(__BIG_ENDIAN_BITFIELD)
527 unsigned sense_key :4;
528 unsigned mcr :1;
529 unsigned abrt :1;
530 unsigned eom :1;
531 unsigned ili :1;
532#else
533#error "Please fix <asm/byteorder.h>"
534#endif
535 } b;
536} atapi_error_t;
537
1da177e4
LT
538/*
539 * Status returned from various ide_ functions
540 */
541typedef enum {
542 ide_stopped, /* no drive operation was started */
543 ide_started, /* a drive operation was started, handler was set */
544} ide_startstop_t;
545
546struct ide_driver_s;
547struct ide_settings_s;
548
e3a59b4d
HR
549#ifdef CONFIG_BLK_DEV_IDEACPI
550struct ide_acpi_drive_link;
551struct ide_acpi_hwif_link;
552#endif
553
1da177e4
LT
554typedef struct ide_drive_s {
555 char name[4]; /* drive name, such as "hda" */
556 char driver_req[10]; /* requests specific driver */
557
165125e1 558 struct request_queue *queue; /* request queue */
1da177e4
LT
559
560 struct request *rq; /* current request */
561 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT
562 void *driver_data; /* extra driver data */
563 struct hd_driveid *id; /* drive model identification info */
7662d046 564#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
565 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
566 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 567#endif
1da177e4
LT
568 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
569
570 unsigned long sleep; /* sleep until this time */
571 unsigned long service_start; /* time we started last request */
572 unsigned long service_time; /* service time of last request */
573 unsigned long timeout; /* max time to wait for irq */
574
575 special_t special; /* special action flags */
576 select_t select; /* basic drive/head select reg value */
577
578 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT
579 u8 using_dma; /* disk is using dma for read/write */
580 u8 retry_pio; /* retrying dma capable host in pio */
581 u8 state; /* retry state */
582 u8 waiting_for_dma; /* dma currently in progress */
583 u8 unmask; /* okay to unmask other irqs */
584 u8 bswap; /* byte swap data */
36193484 585 u8 noflush; /* don't attempt flushes */
1da177e4
LT
586 u8 dsc_overlap; /* DSC overlap */
587 u8 nice1; /* give potential excess bandwidth */
588
589 unsigned present : 1; /* drive is physically present */
590 unsigned dead : 1; /* device ejected hint */
591 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
592 unsigned noprobe : 1; /* from: hdx=noprobe */
593 unsigned removable : 1; /* 1 if need to do check_media_change */
594 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT
595 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
596 unsigned no_unmask : 1; /* disallow setting unmask bit */
597 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
598 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
599 unsigned nice0 : 1; /* give obvious excess bandwidth */
600 unsigned nice2 : 1; /* give a share in our own bandwidth */
601 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 602 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT
603 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
604 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
605 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
606 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT
607 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
608 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
609 unsigned post_reset : 1;
7f8f48af 610 unsigned udma33_warned : 1;
1da177e4 611
1497943e 612 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT
613 u8 quirk_list; /* considered quirky, set for a specific host */
614 u8 init_speed; /* transfer rate set at boot */
1da177e4 615 u8 current_speed; /* current transfer rate set */
513daadd 616 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT
617 u8 dn; /* now wide spread use */
618 u8 wcache; /* status of write cache */
619 u8 acoustic; /* acoustic management */
620 u8 media; /* disk, cdrom, tape, floppy, ... */
621 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
622 u8 ready_stat; /* min status value for drive ready */
623 u8 mult_count; /* current multiple sector setting */
624 u8 mult_req; /* requested multiple sector setting */
625 u8 tune_req; /* requested drive tuning setting */
626 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
627 u8 bad_wstat; /* used for ignoring WRERR_STAT */
628 u8 nowerr; /* used for ignoring WRERR_STAT */
629 u8 sect0; /* offset of first sector for DM6:DDO */
630 u8 head; /* "real" number of heads */
631 u8 sect; /* "real" sectors per track */
632 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
633 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
634
635 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
636 unsigned int cyl; /* "real" number of cyls */
26bcb879 637 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
638 unsigned int failures; /* current failure count */
639 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 640 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
641
642 u64 capacity64; /* total number of sectors */
643
644 int lun; /* logical unit */
645 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR
646#ifdef CONFIG_BLK_DEV_IDEACPI
647 struct ide_acpi_drive_link *acpidata;
648#endif
1da177e4
LT
649 struct list_head list;
650 struct device gendev;
f36d4024 651 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT
652} ide_drive_t;
653
8604affd
BZ
654#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
655
1da177e4
LT
656#define IDE_CHIPSET_PCI_MASK \
657 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
658#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
659
660struct ide_pci_device_s;
661
662typedef struct hwif_s {
663 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
664 struct hwif_s *mate; /* other hwif from same PCI chip */
665 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
666 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
667
668 char name[6]; /* name of interface, eg. "ide0" */
669
670 /* task file registers for pata and sata */
671 unsigned long io_ports[IDE_NR_PORTS];
672 unsigned long sata_scr[SATA_NR_PORTS];
673 unsigned long sata_misc[SATA_NR_PORTS];
674
675 hw_regs_t hw; /* Hardware info */
676 ide_drive_t drives[MAX_DRIVES]; /* drive info */
677
678 u8 major; /* our major number */
679 u8 index; /* 0 for ide0; 1 for ide1; ... */
680 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
681 u8 straight8; /* Alan's straight 8 check */
682 u8 bus_state; /* power state of the IDE bus */
683
88b2b32b 684 u16 host_flags;
6a824c92 685
4099d143
BZ
686 u8 pio_mask;
687
1da177e4
LT
688 u8 ultra_mask;
689 u8 mwdma_mask;
690 u8 swdma_mask;
691
49521f97
BZ
692 u8 cbl; /* cable type */
693
1da177e4
LT
694 hwif_chipset_t chipset; /* sub-module for tuning.. */
695
696 struct pci_dev *pci_dev; /* for pci chipsets */
697 struct ide_pci_device_s *cds; /* chipset device struct */
698
699 void (*rw_disk)(ide_drive_t *, struct request *);
700
701#if 0
702 ide_hwif_ops_t *hwifops;
703#else
88b2b32b 704 /* routine to program host for PIO mode */
26bcb879 705 void (*set_pio_mode)(ide_drive_t *, const u8);
88b2b32b
BZ
706 /* routine to program host for DMA mode */
707 void (*set_dma_mode)(ide_drive_t *, const u8);
1da177e4
LT
708 /* tweaks hardware to select drive */
709 void (*selectproc)(ide_drive_t *);
710 /* chipset polling based on hba specifics */
711 int (*reset_poll)(ide_drive_t *);
712 /* chipset specific changes to default for device-hba resets */
713 void (*pre_reset)(ide_drive_t *);
714 /* routine to reset controller after a disk reset */
715 void (*resetproc)(ide_drive_t *);
716 /* special interrupt handling for shared pci interrupts */
717 void (*intrproc)(ide_drive_t *);
718 /* special host masking for drive selection */
719 void (*maskproc)(ide_drive_t *, int);
720 /* check host's drive quirk list */
721 int (*quirkproc)(ide_drive_t *);
722 /* driver soft-power interface */
723 int (*busproc)(ide_drive_t *, int);
1da177e4 724#endif
b4e44369 725 u8 (*mdma_filter)(ide_drive_t *);
2d5eaa6d 726 u8 (*udma_filter)(ide_drive_t *);
1da177e4
LT
727
728 void (*ata_input_data)(ide_drive_t *, void *, u32);
729 void (*ata_output_data)(ide_drive_t *, void *, u32);
730
731 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
732 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
733
734 int (*dma_setup)(ide_drive_t *);
735 void (*dma_exec_cmd)(ide_drive_t *, u8);
736 void (*dma_start)(ide_drive_t *);
737 int (*ide_dma_end)(ide_drive_t *drive);
1da177e4 738 int (*ide_dma_on)(ide_drive_t *drive);
7469aaf6 739 void (*dma_off_quietly)(ide_drive_t *drive);
1da177e4 740 int (*ide_dma_test_irq)(ide_drive_t *drive);
f0dd8712 741 void (*ide_dma_clear_irq)(ide_drive_t *drive);
ccf35289 742 void (*dma_host_on)(ide_drive_t *drive);
7469aaf6 743 void (*dma_host_off)(ide_drive_t *drive);
841d2a9b 744 void (*dma_lost_irq)(ide_drive_t *drive);
c283f5db 745 void (*dma_timeout)(ide_drive_t *drive);
1da177e4
LT
746
747 void (*OUTB)(u8 addr, unsigned long port);
748 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
749 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT
750 void (*OUTSW)(unsigned long port, void *addr, u32 count);
751 void (*OUTSL)(unsigned long port, void *addr, u32 count);
752
753 u8 (*INB)(unsigned long port);
754 u16 (*INW)(unsigned long port);
1da177e4
LT
755 void (*INSW)(unsigned long port, void *addr, u32 count);
756 void (*INSL)(unsigned long port, void *addr, u32 count);
757
758 /* dma physical region descriptor table (cpu view) */
759 unsigned int *dmatable_cpu;
760 /* dma physical region descriptor table (dma view) */
761 dma_addr_t dmatable_dma;
762 /* Scatter-gather list used to build the above */
763 struct scatterlist *sg_table;
764 int sg_max_nents; /* Maximum number of entries in it */
765 int sg_nents; /* Current number of entries in it */
766 int sg_dma_direction; /* dma transfer direction */
767
768 /* data phase of the active command (currently only valid for PIO/DMA) */
769 int data_phase;
770
771 unsigned int nsect;
772 unsigned int nleft;
55c16a70 773 struct scatterlist *cursg;
1da177e4
LT
774 unsigned int cursg_ofs;
775
1da177e4
LT
776 int rqsize; /* max sectors per request */
777 int irq; /* our irq number */
778
779 unsigned long dma_master; /* reference base addr dmabase */
780 unsigned long dma_base; /* base addr for dma ports */
781 unsigned long dma_command; /* dma command register */
782 unsigned long dma_vendor1; /* dma vendor 1 register */
783 unsigned long dma_status; /* dma status register */
784 unsigned long dma_vendor3; /* dma vendor 3 register */
785 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 786
1da177e4
LT
787 unsigned long config_data; /* for use by chipset-specific code */
788 unsigned long select_data; /* for use by chipset-specific code */
789
020e322d
SS
790 unsigned long extra_base; /* extra addr for dma ports */
791 unsigned extra_ports; /* number of extra dma ports */
792
1da177e4
LT
793 unsigned noprobe : 1; /* don't probe for this interface */
794 unsigned present : 1; /* this interface exists */
795 unsigned hold : 1; /* this interface is always present */
796 unsigned serialized : 1; /* serialized all channel operation */
797 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
798 unsigned reset : 1; /* reset after probe */
1da177e4
LT
799 unsigned no_lba48 : 1; /* 1 = cannot do LBA48 */
800 unsigned no_lba48_dma : 1; /* 1 = cannot do LBA48 DMA */
1da177e4
LT
801 unsigned auto_poll : 1; /* supports nop auto-poll */
802 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
208a08f7 803 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
da574af7 804 unsigned err_stops_fifo : 1; /* 1=data FIFO is cleared by an error */
2ad1e558 805 unsigned mmio : 1; /* host uses MMIO */
1da177e4
LT
806
807 struct device gendev;
f36d4024 808 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
809
810 void *hwif_data; /* extra hwif data */
811
812 unsigned dma;
e3a59b4d
HR
813
814#ifdef CONFIG_BLK_DEV_IDEACPI
815 struct ide_acpi_hwif_link *acpidata;
816#endif
22fc6ecc 817} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT
818
819/*
820 * internal ide interrupt handler type
821 */
822typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
823typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
824typedef int (ide_expiry_t)(ide_drive_t *);
825
826typedef struct hwgroup_s {
827 /* irq handler, if active */
828 ide_startstop_t (*handler)(ide_drive_t *);
829 /* irq handler, suspended if active */
830 ide_startstop_t (*handler_save)(ide_drive_t *);
831 /* BOOL: protects all fields below */
832 volatile int busy;
833 /* BOOL: wake us up on timer expiry */
834 unsigned int sleeping : 1;
835 /* BOOL: polling active & poll_timeout field valid */
836 unsigned int polling : 1;
913759ac
AC
837 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
838 unsigned int resetting : 1;
839
1da177e4
LT
840 /* current drive */
841 ide_drive_t *drive;
842 /* ptr to current hwif in linked-list */
843 ide_hwif_t *hwif;
844
845 /* for pci chipsets */
846 struct pci_dev *pci_dev;
847 /* chipset device struct */
848 struct ide_pci_device_s *cds;
849
850 /* current request */
851 struct request *rq;
852 /* failsafe timer */
853 struct timer_list timer;
854 /* local copy of current write rq */
855 struct request wrq;
856 /* timeout value during long polls */
857 unsigned long poll_timeout;
858 /* queried upon timeouts */
859 int (*expiry)(ide_drive_t *);
860 /* ide_system_bus_speed */
861 int pio_clock;
23450319
SS
862 int req_gen;
863 int req_gen_timer;
1da177e4
LT
864
865 unsigned char cmd_buf[4];
866} ide_hwgroup_t;
867
7662d046
BZ
868typedef struct ide_driver_s ide_driver_t;
869
f9383c42 870extern struct mutex ide_setting_mtx;
1da177e4 871
7662d046
BZ
872int set_io_32bit(ide_drive_t *, int);
873int set_pio_mode(ide_drive_t *, int);
874int set_using_dma(ide_drive_t *, int);
875
876#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
877/*
878 * configurable drive settings
879 */
880
881#define TYPE_INT 0
1497943e
BZ
882#define TYPE_BYTE 1
883#define TYPE_SHORT 2
1da177e4
LT
884
885#define SETTING_READ (1 << 0)
886#define SETTING_WRITE (1 << 1)
887#define SETTING_RW (SETTING_READ | SETTING_WRITE)
888
889typedef int (ide_procset_t)(ide_drive_t *, int);
890typedef struct ide_settings_s {
891 char *name;
892 int rw;
1da177e4
LT
893 int data_type;
894 int min;
895 int max;
896 int mul_factor;
897 int div_factor;
898 void *data;
899 ide_procset_t *set;
900 int auto_remove;
901 struct ide_settings_s *next;
902} ide_settings_t;
903
1497943e 904int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT
905
906/*
907 * /proc/ide interface
908 */
909typedef struct {
910 const char *name;
911 mode_t mode;
912 read_proc_t *read_proc;
913 write_proc_t *write_proc;
914} ide_proc_entry_t;
915
ecfd80e4
BZ
916void proc_ide_create(void);
917void proc_ide_destroy(void);
5cbf79cd
BZ
918void ide_proc_register_port(ide_hwif_t *);
919void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
920void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
921void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
922
923void ide_add_generic_settings(ide_drive_t *);
924
1da177e4
LT
925read_proc_t proc_ide_read_capacity;
926read_proc_t proc_ide_read_geometry;
927
928#ifdef CONFIG_BLK_DEV_IDEPCI
929void ide_pci_create_host_proc(const char *, get_info_t *);
930#endif
931
932/*
933 * Standard exit stuff:
934 */
935#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
936{ \
937 len -= off; \
938 if (len < count) { \
939 *eof = 1; \
940 if (len <= 0) \
941 return 0; \
942 } else \
943 len = count; \
944 *start = page + off; \
945 return len; \
946}
947#else
ecfd80e4
BZ
948static inline void proc_ide_create(void) { ; }
949static inline void proc_ide_destroy(void) { ; }
5cbf79cd
BZ
950static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
951static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
952static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
953static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
954static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT
955#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
956#endif
957
958/*
959 * Power Management step value (rq->pm->pm_step).
960 *
961 * The step value starts at 0 (ide_pm_state_start_suspend) for a
962 * suspend operation or 1000 (ide_pm_state_start_resume) for a
963 * resume operation.
964 *
965 * For each step, the core calls the subdriver start_power_step() first.
966 * This can return:
967 * - ide_stopped : In this case, the core calls us back again unless
968 * step have been set to ide_power_state_completed.
969 * - ide_started : In this case, the channel is left busy until an
970 * async event (interrupt) occurs.
971 * Typically, start_power_step() will issue a taskfile request with
972 * do_rw_taskfile().
973 *
974 * Upon reception of the interrupt, the core will call complete_power_step()
975 * with the error code if any. This routine should update the step value
976 * and return. It should not start a new request. The core will call
977 * start_power_step for the new step value, unless step have been set to
978 * ide_power_state_completed.
979 *
980 * Subdrivers are expected to define their own additional power
981 * steps from 1..999 for suspend and from 1001..1999 for resume,
982 * other values are reserved for future use.
983 */
984
985enum {
986 ide_pm_state_completed = -1,
987 ide_pm_state_start_suspend = 0,
988 ide_pm_state_start_resume = 1000,
989};
990
991/*
992 * Subdrivers support.
4ef3b8f4
LR
993 *
994 * The gendriver.owner field should be set to the module owner of this driver.
995 * The gendriver.name field should be set to the name of this driver
1da177e4 996 */
7662d046 997struct ide_driver_s {
1da177e4
LT
998 const char *version;
999 u8 media;
1da177e4 1000 unsigned supports_dsc_overlap : 1;
1da177e4
LT
1001 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1002 int (*end_request)(ide_drive_t *, int, int);
1003 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1004 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 1005 struct device_driver gen_driver;
4031bbe4
RK
1006 int (*probe)(ide_drive_t *);
1007 void (*remove)(ide_drive_t *);
0d2157f7 1008 void (*resume)(ide_drive_t *);
4031bbe4 1009 void (*shutdown)(ide_drive_t *);
7662d046
BZ
1010#ifdef CONFIG_IDE_PROC_FS
1011 ide_proc_entry_t *proc;
1012#endif
1013};
1da177e4 1014
4031bbe4
RK
1015#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
1016
1da177e4
LT
1017int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
1018
1019/*
1020 * ide_hwifs[] is the master data structure used to keep track
1021 * of just about everything in ide.c. Whenever possible, routines
1022 * should be using pointers to a drive (ide_drive_t *) or
1023 * pointers to a hwif (ide_hwif_t *), rather than indexing this
1024 * structure directly (the allocation/layout may change!).
1025 *
1026 */
1027#ifndef _IDE_C
1028extern ide_hwif_t ide_hwifs[]; /* master data repository */
1029#endif
1030extern int noautodma;
1031
1032extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
1033int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1034 int uptodate, int nr_sectors);
1da177e4
LT
1035
1036/*
1037 * This is used on exit from the driver to designate the next irq handler
1038 * and also to start the safety timer.
1039 */
1040extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1041
1042/*
1043 * This is used on exit from the driver to designate the next irq handler
1044 * and start the safety time safely and atomically from the IRQ handler
1045 * with respect to the command issue (which it also does)
1046 */
1047extern void ide_execute_command(ide_drive_t *, task_ioreg_t cmd, ide_handler_t *, unsigned int, ide_expiry_t *);
1048
1049ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1050
1051/*
1052 * ide_error() takes action based on the error returned by the controller.
1053 * The caller should return immediately after invoking this.
1054 *
1055 * (drive, msg, status)
1056 */
1057ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1058
1059ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
1060
1061/*
1062 * Abort a running command on the controller triggering the abort
1063 * from a host side, non error situation
1064 * (drive, msg)
1065 */
1066extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
1067
1068extern void ide_fix_driveid(struct hd_driveid *);
1069/*
1070 * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
1071 * removing leading/trailing blanks and compressing internal blanks.
1072 * It is primarily used to tidy up the model name/number fields as
1073 * returned by the WIN_[P]IDENTIFY commands.
1074 *
1075 * (s, bytecount, byteswap)
1076 */
1077extern void ide_fixstring(u8 *, const int, const int);
1078
74af21cf 1079int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4
LT
1080
1081/*
1082 * Start a reset operation for an IDE interface.
1083 * The caller should return immediately after invoking this.
1084 */
1085extern ide_startstop_t ide_do_reset (ide_drive_t *);
1086
1087/*
1088 * This function is intended to be used prior to invoking ide_do_drive_cmd().
1089 */
1090extern void ide_init_drive_cmd (struct request *rq);
1091
1da177e4
LT
1092/*
1093 * "action" parameter type for ide_do_drive_cmd() below.
1094 */
1095typedef enum {
1096 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT
1097 ide_preempt, /* insert rq in front of current request */
1098 ide_head_wait, /* insert rq in front of current request and wait for it */
1099 ide_end /* insert rq at end of list, but don't wait for it */
1100} ide_action_t;
1101
1da177e4
LT
1102extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
1103
1104/*
1105 * Clean up after success/failure of an explicit drive cmd.
1106 * stat/err are used only when (HWGROUP(drive)->rq->cmd == IDE_DRIVE_CMD).
1107 * stat/err are used only when (HWGROUP(drive)->rq->cmd == IDE_DRIVE_TASK_MASK).
1108 *
1109 * (ide_drive_t *drive, u8 stat, u8 err)
1110 */
1111extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1112
1113/*
1114 * Issue ATA command and wait for completion.
1115 * Use for implementing commands in kernel
1116 *
1117 * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
1118 */
1119extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
1120
1121typedef struct ide_task_s {
1122/*
1123 * struct hd_drive_task_hdr tf;
1124 * task_struct_t tf;
1125 * struct hd_drive_hob_hdr hobf;
1126 * hob_struct_t hobf;
1127 */
1128 task_ioreg_t tfRegister[8];
1129 task_ioreg_t hobRegister[8];
1130 ide_reg_valid_t tf_out_flags;
1131 ide_reg_valid_t tf_in_flags;
1132 int data_phase;
1133 int command_type;
1134 ide_pre_handler_t *prehandler;
1135 ide_handler_t *handler;
1136 struct request *rq; /* copy of request */
1137 void *special; /* valid_t generally */
1138} ide_task_t;
1139
1140extern u32 ide_read_24(ide_drive_t *);
1141
1142extern void SELECT_DRIVE(ide_drive_t *);
1143extern void SELECT_INTERRUPT(ide_drive_t *);
1144extern void SELECT_MASK(ide_drive_t *, int);
1145extern void QUIRK_LIST(ide_drive_t *);
1146
1147extern int drive_is_ready(ide_drive_t *);
1da177e4
LT
1148
1149/*
1150 * taskfile io for disks for now...and builds request from ide_ioctl
1151 */
1152extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1153
1154/*
1155 * Special Flagged Register Validation Caller
1156 */
1157extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *);
1158
1159extern ide_startstop_t set_multmode_intr(ide_drive_t *);
1160extern ide_startstop_t set_geometry_intr(ide_drive_t *);
1161extern ide_startstop_t recal_intr(ide_drive_t *);
1162extern ide_startstop_t task_no_data_intr(ide_drive_t *);
1163extern ide_startstop_t task_in_intr(ide_drive_t *);
1164extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *);
1165
1166extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *);
1167
1168int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1169int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
1170int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
1171
1172extern int system_bus_clock(void);
1173
1174extern int ide_driveid_update(ide_drive_t *);
1175extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
1176extern int ide_config_drive_speed(ide_drive_t *, u8);
1177extern u8 eighty_ninty_three (ide_drive_t *);
1178extern int set_transfer(ide_drive_t *, ide_task_t *);
1179extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1180
1181extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1182
1183/*
1184 * ide_stall_queue() can be used by a drive to give excess bandwidth back
1185 * to the hwgroup by sleeping for timeout jiffies.
1186 */
1187extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1188
1189extern int ide_spin_wait_hwgroup(ide_drive_t *);
1190extern void ide_timer_expiry(unsigned long);
7d12e780 1191extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1192extern void do_ide_request(struct request_queue *);
1da177e4
LT
1193
1194void ide_init_disk(struct gendisk *, ide_drive_t *);
1195
1da177e4
LT
1196extern int ideprobe_init(void);
1197
6d208b39 1198#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1da177e4 1199extern void ide_scan_pcibus(int scan_direction) __init;
725522b5
GKH
1200extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1201#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1202#else
1203#define ide_pci_register_driver(d) pci_register_driver(d)
1204#endif
1205
1da177e4
LT
1206void ide_pci_setup_ports(struct pci_dev *, struct ide_pci_device_s *, int, ata_index_t *);
1207extern void ide_setup_pci_noise (struct pci_dev *dev, struct ide_pci_device_s *d);
1208
1209extern void default_hwif_iops(ide_hwif_t *);
1210extern void default_hwif_mmiops(ide_hwif_t *);
1211extern void default_hwif_transport(ide_hwif_t *);
1212
1da177e4
LT
1213typedef struct ide_pci_enablebit_s {
1214 u8 reg; /* byte pci reg holding the enable-bit */
1215 u8 mask; /* mask to isolate the enable-bit */
1216 u8 val; /* value of masked reg when "enabled" */
1217} ide_pci_enablebit_t;
1218
1219enum {
1220 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1221 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1222 /* single port device */
a5d8c5c8 1223 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1224 /* don't use legacy PIO blacklist */
1225 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1226 /* don't use conservative PIO "downgrade" */
1227 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
26bcb879
BZ
1228 /* use PIO8/9 for prefetch off/on */
1229 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1230 /* use PIO6/7 for fast-devsel off/on */
1231 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1232 /* use 100-102 and 200-202 PIO values to set DMA modes */
1233 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1234 /*
1235 * keep DMA setting when programming PIO mode, may be used only
1236 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1237 */
1238 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1239 /* program host for the transfer mode after programming device */
1240 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1241 /* don't program host/device for the transfer mode ("smart" hosts) */
1242 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1243 /* trust BIOS for programming chipset/device for DMA */
1244 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1245 /* host uses VDMA */
1246 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ
1247 /* ATAPI DMA is unsupported */
1248 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
7cab14a7
BZ
1249 /* set if host is a "bootable" controller */
1250 IDE_HFLAG_BOOTABLE = (1 << 13),
47b68788
BZ
1251 /* host doesn't support DMA */
1252 IDE_HFLAG_NO_DMA = (1 << 14),
1253 /* check if host is PCI IDE device before allowing DMA */
1254 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1da177e4
LT
1255};
1256
7cab14a7
BZ
1257#ifdef CONFIG_BLK_DEV_OFFBOARD
1258# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1259#else
1260# define IDE_HFLAG_OFF_BOARD 0
1261#endif
1262
1da177e4
LT
1263typedef struct ide_pci_device_s {
1264 char *name;
1265 int (*init_setup)(struct pci_dev *, struct ide_pci_device_s *);
1266 void (*init_setup_dma)(struct pci_dev *, struct ide_pci_device_s *, ide_hwif_t *);
1267 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1268 void (*init_iops)(ide_hwif_t *);
1269 void (*init_hwif)(ide_hwif_t *);
1270 void (*init_dma)(ide_hwif_t *, unsigned long);
1271 void (*fixup)(ide_hwif_t *);
1da177e4 1272 ide_pci_enablebit_t enablebits[2];
1da177e4
LT
1273 unsigned int extra;
1274 struct ide_pci_device_s *next;
88b2b32b 1275 u16 host_flags;
4099d143 1276 u8 pio_mask;
18137207 1277 u8 udma_mask;
1da177e4
LT
1278} ide_pci_device_t;
1279
1280extern int ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
1281extern int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, ide_pci_device_t *);
1282
1283void ide_map_sg(ide_drive_t *, struct request *);
1284void ide_init_sg_cmd(ide_drive_t *, struct request *);
1285
1286#define BAD_DMA_DRIVE 0
1287#define GOOD_DMA_DRIVE 1
1288
65e5f2e3
JC
1289struct drive_list_entry {
1290 const char *id_model;
1291 const char *id_firmware;
1292};
1293
1294int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ
1295
1296#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1297int __ide_dma_bad_drive(ide_drive_t *);
7670df73
BZ
1298
1299u8 ide_find_dma_mode(ide_drive_t *, u8);
1300
1301static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1302{
1303 return ide_find_dma_mode(drive, XFER_UDMA_6);
1304}
1305
7469aaf6 1306void ide_dma_off(ide_drive_t *);
1da177e4 1307void ide_dma_verbose(ide_drive_t *);
3608b5d7 1308int ide_set_dma(ide_drive_t *);
1da177e4
LT
1309ide_startstop_t ide_dma_intr(ide_drive_t *);
1310
1311#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1312extern int ide_build_sglist(ide_drive_t *, struct request *);
1313extern int ide_build_dmatable(ide_drive_t *, struct request *);
1314extern void ide_destroy_dmatable(ide_drive_t *);
1315extern int ide_release_dma(ide_hwif_t *);
1316extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
1317
7469aaf6
BZ
1318void ide_dma_host_off(ide_drive_t *);
1319void ide_dma_off_quietly(ide_drive_t *);
ccf35289 1320void ide_dma_host_on(ide_drive_t *);
1da177e4 1321extern int __ide_dma_on(ide_drive_t *);
1da177e4
LT
1322extern int ide_dma_setup(ide_drive_t *);
1323extern void ide_dma_start(ide_drive_t *);
1324extern int __ide_dma_end(ide_drive_t *);
841d2a9b 1325extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1326extern void ide_dma_timeout(ide_drive_t *);
1da177e4
LT
1327#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1328
1329#else
7670df73 1330static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1331static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
7469aaf6 1332static inline void ide_dma_off(ide_drive_t *drive) { ; }
1da177e4 1333static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1334static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1da177e4
LT
1335#endif /* CONFIG_BLK_DEV_IDEDMA */
1336
1337#ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1338static inline void ide_release_dma(ide_hwif_t *drive) {;}
1339#endif
1340
e3a59b4d
HR
1341#ifdef CONFIG_BLK_DEV_IDEACPI
1342extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1343extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1344extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1345extern void ide_acpi_init(ide_hwif_t *hwif);
5e32132b 1346extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1347#else
1348static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1349static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1350static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1351static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
5e32132b 1352static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1353#endif
1354
1da177e4
LT
1355extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1356extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1357extern void ide_unregister (unsigned int index);
1358
1359void ide_register_region(struct gendisk *);
1360void ide_unregister_region(struct gendisk *);
1361
1362void ide_undecoded_slave(ide_hwif_t *);
1363
1364int probe_hwif_init_with_fixup(ide_hwif_t *, void (*)(ide_hwif_t *));
1365extern int probe_hwif_init(ide_hwif_t *);
1366
1367static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1368{
1369 return hwif->hwif_data;
1370}
1371
1372static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1373{
1374 hwif->hwif_data = data;
1375}
1376
1377/* ide-lib.c */
1da177e4
LT
1378extern char *ide_xfer_verbose(u8 xfer_rate);
1379extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1380extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1381
2229833c
BZ
1382static inline int ide_dev_has_iordy(struct hd_driveid *id)
1383{
1384 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1385}
1386
6c3c22f3
SS
1387static inline int ide_dev_is_sata(struct hd_driveid *id)
1388{
1389 /*
1390 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1391 * verifying that word 80 by casting it to a signed type --
1392 * this trick allows us to filter out the reserved values of
1393 * 0x0000 and 0xffff along with the earlier ATA revisions...
1394 */
1395 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1396 return 1;
1397 return 0;
1398}
1399
1da177e4
LT
1400u8 ide_dump_status(ide_drive_t *, const char *, u8);
1401
1402typedef struct ide_pio_timings_s {
1403 int setup_time; /* Address setup (ns) minimum */
1404 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS
1405 int cycle_time; /* Cycle time (ns) minimum = */
1406 /* active + recovery (+ setup for some chips) */
1da177e4
LT
1407} ide_pio_timings_t;
1408
7dd00083 1409unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1410u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT
1411extern const ide_pio_timings_t ide_pio_timings[6];
1412
88b2b32b
BZ
1413int ide_set_pio_mode(ide_drive_t *, u8);
1414int ide_set_dma_mode(ide_drive_t *, u8);
1415
26bcb879
BZ
1416void ide_set_pio(ide_drive_t *, u8);
1417
1418static inline void ide_set_max_pio(ide_drive_t *drive)
1419{
1420 ide_set_pio(drive, 255);
1421}
1da177e4
LT
1422
1423extern spinlock_t ide_lock;
ef29888e 1424extern struct mutex ide_cfg_mtx;
1da177e4
LT
1425/*
1426 * Structure locking:
1427 *
ef29888e 1428 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1429 * ide_hwif_t->{next,hwgroup}
1430 * ide_drive_t->next
1431 *
1432 * ide_hwgroup_t->busy: ide_lock
1433 * ide_hwgroup_t->hwif: ide_lock
1434 * ide_hwif_t->mate: constant, no locking
1435 * ide_drive_t->hwif: constant, no locking
1436 */
1437
366c7f55 1438#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1439
1440extern struct bus_type ide_bus_type;
1441
1442/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1443#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1444
1445/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1446#define ide_id_has_flush_cache_ext(id) \
1447 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1448
86b37860
CL
1449static inline int hwif_to_node(ide_hwif_t *hwif)
1450{
1451 struct pci_dev *dev = hwif->pci_dev;
1452 return dev ? pcibus_to_node(dev->bus) : -1;
1453}
1454
1b678347
BH
1455static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1456{
1457 ide_hwif_t *hwif = HWIF(drive);
1458
1459 return &hwif->drives[(drive->dn ^ 1) & 1];
1460}
1461
1da177e4 1462#endif /* _IDE_H */