ide: remove ide_auto_reduce_xfer()
[linux-2.6-block.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
e3a59b4d
HR
20#ifdef CONFIG_BLK_DEV_IDEACPI
21#include <acpi/acpi.h>
22#endif
1da177e4
LT
23#include <asm/byteorder.h>
24#include <asm/system.h>
25#include <asm/io.h>
26#include <asm/semaphore.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
4ee06b7e
BZ
29#if defined(CRIS) || defined(FRV)
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
35/*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40#define IDE_NO_IRQ (-1)
41
1da177e4
LT
42typedef unsigned char byte; /* used everywhere */
43
44/*
45 * Probably not wise to fiddle with these
46 */
47#define ERROR_MAX 8 /* Max read/write errors per sector */
48#define ERROR_RESET 3 /* Reset controller every 4th retry */
49#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
51/*
52 * Tune flags
53 */
54#define IDE_TUNE_NOAUTO 2
55#define IDE_TUNE_AUTO 1
56#define IDE_TUNE_DEFAULT 0
57
58/*
59 * state flags
60 */
61
62#define DMA_PIO_RETRY 1 /* retrying in PIO */
63
64#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
66
67/*
68 * Definitions for accessing IDE controller registers
69 */
70#define IDE_NR_PORTS (10)
71
72#define IDE_DATA_OFFSET (0)
73#define IDE_ERROR_OFFSET (1)
74#define IDE_NSECTOR_OFFSET (2)
75#define IDE_SECTOR_OFFSET (3)
76#define IDE_LCYL_OFFSET (4)
77#define IDE_HCYL_OFFSET (5)
78#define IDE_SELECT_OFFSET (6)
79#define IDE_STATUS_OFFSET (7)
80#define IDE_CONTROL_OFFSET (8)
81#define IDE_IRQ_OFFSET (9)
82
83#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
85
1da177e4
LT
86#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
87#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
88#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
89#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
90#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
91#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
92#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
93#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
94#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
95#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
96
97#define IDE_FEATURE_REG IDE_ERROR_REG
98#define IDE_COMMAND_REG IDE_STATUS_REG
99#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
100#define IDE_IREASON_REG IDE_NSECTOR_REG
101#define IDE_BCOUNTL_REG IDE_LCYL_REG
102#define IDE_BCOUNTH_REG IDE_HCYL_REG
103
104#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
105#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
106#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
107#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
108#define DRIVE_READY (READY_STAT | SEEK_STAT)
1da177e4
LT
109
110#define BAD_CRC (ABRT_ERR | ICRC_ERR)
111
112#define SATA_NR_PORTS (3) /* 16 possible ?? */
113
114#define SATA_STATUS_OFFSET (0)
1da177e4 115#define SATA_ERROR_OFFSET (1)
1da177e4 116#define SATA_CONTROL_OFFSET (2)
1da177e4
LT
117
118#define SATA_MISC_OFFSET (0)
1da177e4 119#define SATA_PHY_OFFSET (1)
1da177e4 120#define SATA_IEN_OFFSET (2)
1da177e4
LT
121
122/*
123 * Our Physical Region Descriptor (PRD) table should be large enough
124 * to handle the biggest I/O request we are likely to see. Since requests
125 * can have no more than 256 sectors, and since the typical blocksize is
126 * two or more sectors, we could get by with a limit of 128 entries here for
127 * the usual worst case. Most requests seem to include some contiguous blocks,
128 * further reducing the number of table entries required.
129 *
130 * The driver reverts to PIO mode for individual requests that exceed
131 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
132 * 100% of all crazy scenarios here is not necessary.
133 *
134 * As it turns out though, we must allocate a full 4KB page for this,
135 * so the two PRD tables (ide0 & ide1) will each get half of that,
136 * allowing each to have about 256 entries (8 bytes each) from this.
137 */
138#define PRD_BYTES 8
139#define PRD_ENTRIES 256
140
141/*
142 * Some more useful definitions
143 */
144#define PARTN_BITS 6 /* number of minor dev bits for partitions */
145#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
146#define SECTOR_SIZE 512
147#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
148#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
149
150/*
151 * Timeouts for various operations:
152 */
153#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
154#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
155#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
156#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
157#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
158#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
159
1da177e4
LT
160/*
161 * Check for an interrupt and acknowledge the interrupt status
162 */
163struct hwif_s;
164typedef int (ide_ack_intr_t)(struct hwif_s *);
165
1da177e4
LT
166/*
167 * hwif_chipset_t is used to keep track of the specific hardware
168 * chipset used by each IDE interface, if known.
169 */
528a572d 170enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
171 ide_cmd640, ide_dtc2278, ide_ali14xx,
172 ide_qd65xx, ide_umc8672, ide_ht6560b,
173 ide_rz1000, ide_trm290,
174 ide_cmd646, ide_cy82c693, ide_4drives,
175 ide_pmac, ide_etrax100, ide_acorn,
26a940e2 176 ide_au1xxx, ide_forced
528a572d
BZ
177};
178
179typedef u8 hwif_chipset_t;
1da177e4
LT
180
181/*
182 * Structure to hold all information about the location of this port
183 */
184typedef struct hw_regs_s {
185 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
186 int irq; /* our irq number */
1da177e4
LT
187 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
188 hwif_chipset_t chipset;
4349d5cd 189 struct device *dev;
1da177e4
LT
190} hw_regs_t;
191
baa8f3e9 192struct hwif_s * ide_find_port(unsigned long);
9e016a71 193struct hwif_s *ide_deprecated_find_port(unsigned long);
cbb010c1 194void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 195void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 196
f01393e4 197struct ide_drive_s;
cbb010c1 198int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *),
fd9bb539 199 struct hwif_s **);
1da177e4 200
1da177e4
LT
201void ide_setup_ports( hw_regs_t *hw,
202 unsigned long base,
203 int *offsets,
204 unsigned long ctrl,
205 unsigned long intr,
206 ide_ack_intr_t *ack_intr,
207#if 0
208 ide_io_ops_t *iops,
209#endif
210 int irq);
211
212static inline void ide_std_init_ports(hw_regs_t *hw,
213 unsigned long io_addr,
214 unsigned long ctl_addr)
215{
216 unsigned int i;
217
218 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
219 hw->io_ports[i] = io_addr++;
220
221 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
222}
223
224#include <asm/ide.h>
225
83d7dbc4
MM
226#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
227#undef MAX_HWIFS
83ae20c8
BH
228#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
229#endif
230
1da177e4
LT
231/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
232#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
233# define ide_default_io_base(index) (0)
234# define ide_default_irq(base) (0)
235# define ide_init_default_irq(base) (0)
236#endif
237
847ddd2b 238#ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
1da177e4
LT
239static inline void ide_init_hwif_ports(hw_regs_t *hw,
240 unsigned long io_addr,
241 unsigned long ctl_addr,
242 int *irq)
243{
244 if (!ctl_addr)
245 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
246 else
247 ide_std_init_ports(hw, io_addr, ctl_addr);
248
249 if (irq)
250 *irq = 0;
251
252 hw->io_ports[IDE_IRQ_OFFSET] = 0;
253
254#ifdef CONFIG_PPC32
255 if (ppc_ide_md.ide_init_hwif)
256 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
257#endif
258}
259#else
260static inline void ide_init_hwif_ports(hw_regs_t *hw,
261 unsigned long io_addr,
262 unsigned long ctl_addr,
263 int *irq)
264{
265 if (io_addr || ctl_addr)
266 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
267}
847ddd2b 268#endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
1da177e4
LT
269
270/* Currently only m68k, apus and m8xx need it */
271#ifndef IDE_ARCH_ACK_INTR
272# define ide_ack_intr(hwif) (1)
273#endif
274
275/* Currently only Atari needs it */
276#ifndef IDE_ARCH_LOCK
277# define ide_release_lock() do {} while (0)
278# define ide_get_lock(hdlr, data) do {} while (0)
279#endif /* IDE_ARCH_LOCK */
280
281/*
282 * Now for the data we need to maintain per-drive: ide_drive_t
283 */
284
285#define ide_scsi 0x21
286#define ide_disk 0x20
287#define ide_optical 0x7
288#define ide_cdrom 0x5
289#define ide_tape 0x1
290#define ide_floppy 0x0
291
292/*
293 * Special Driver Flags
294 *
295 * set_geometry : respecify drive geometry
296 * recalibrate : seek to cyl 0
297 * set_multmode : set multmode count
298 * set_tune : tune interface for drive
299 * serviced : service command
300 * reserved : unused
301 */
302typedef union {
303 unsigned all : 8;
304 struct {
1da177e4
LT
305 unsigned set_geometry : 1;
306 unsigned recalibrate : 1;
307 unsigned set_multmode : 1;
308 unsigned set_tune : 1;
309 unsigned serviced : 1;
310 unsigned reserved : 3;
1da177e4
LT
311 } b;
312} special_t;
313
1da177e4
LT
314/*
315 * ATA-IDE Select Register, aka Device-Head
316 *
317 * head : always zeros here
318 * unit : drive select number: 0/1
319 * bit5 : always 1
320 * lba : using LBA instead of CHS
321 * bit7 : always 1
322 */
323typedef union {
324 unsigned all : 8;
325 struct {
326#if defined(__LITTLE_ENDIAN_BITFIELD)
327 unsigned head : 4;
328 unsigned unit : 1;
329 unsigned bit5 : 1;
330 unsigned lba : 1;
331 unsigned bit7 : 1;
332#elif defined(__BIG_ENDIAN_BITFIELD)
333 unsigned bit7 : 1;
334 unsigned lba : 1;
335 unsigned bit5 : 1;
336 unsigned unit : 1;
337 unsigned head : 4;
338#else
339#error "Please fix <asm/byteorder.h>"
340#endif
341 } b;
342} select_t, ata_select_t;
343
1da177e4
LT
344/*
345 * Status returned from various ide_ functions
346 */
347typedef enum {
348 ide_stopped, /* no drive operation was started */
349 ide_started, /* a drive operation was started, handler was set */
350} ide_startstop_t;
351
352struct ide_driver_s;
353struct ide_settings_s;
354
e3a59b4d
HR
355#ifdef CONFIG_BLK_DEV_IDEACPI
356struct ide_acpi_drive_link;
357struct ide_acpi_hwif_link;
358#endif
359
1da177e4
LT
360typedef struct ide_drive_s {
361 char name[4]; /* drive name, such as "hda" */
362 char driver_req[10]; /* requests specific driver */
363
165125e1 364 struct request_queue *queue; /* request queue */
1da177e4
LT
365
366 struct request *rq; /* current request */
367 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT
368 void *driver_data; /* extra driver data */
369 struct hd_driveid *id; /* drive model identification info */
7662d046 370#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
371 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
372 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 373#endif
1da177e4
LT
374 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
375
376 unsigned long sleep; /* sleep until this time */
377 unsigned long service_start; /* time we started last request */
378 unsigned long service_time; /* service time of last request */
379 unsigned long timeout; /* max time to wait for irq */
380
381 special_t special; /* special action flags */
382 select_t select; /* basic drive/head select reg value */
383
384 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT
385 u8 using_dma; /* disk is using dma for read/write */
386 u8 retry_pio; /* retrying dma capable host in pio */
387 u8 state; /* retry state */
388 u8 waiting_for_dma; /* dma currently in progress */
389 u8 unmask; /* okay to unmask other irqs */
36193484 390 u8 noflush; /* don't attempt flushes */
1da177e4
LT
391 u8 dsc_overlap; /* DSC overlap */
392 u8 nice1; /* give potential excess bandwidth */
393
394 unsigned present : 1; /* drive is physically present */
395 unsigned dead : 1; /* device ejected hint */
396 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
397 unsigned noprobe : 1; /* from: hdx=noprobe */
398 unsigned removable : 1; /* 1 if need to do check_media_change */
399 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT
400 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
401 unsigned no_unmask : 1; /* disallow setting unmask bit */
402 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
403 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
1da177e4 404 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 405 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT
406 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
407 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
408 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
409 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT
410 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
411 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
412 unsigned post_reset : 1;
7f8f48af 413 unsigned udma33_warned : 1;
1da177e4 414
1497943e 415 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT
416 u8 quirk_list; /* considered quirky, set for a specific host */
417 u8 init_speed; /* transfer rate set at boot */
1da177e4 418 u8 current_speed; /* current transfer rate set */
513daadd 419 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT
420 u8 dn; /* now wide spread use */
421 u8 wcache; /* status of write cache */
422 u8 acoustic; /* acoustic management */
423 u8 media; /* disk, cdrom, tape, floppy, ... */
424 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
425 u8 ready_stat; /* min status value for drive ready */
426 u8 mult_count; /* current multiple sector setting */
427 u8 mult_req; /* requested multiple sector setting */
428 u8 tune_req; /* requested drive tuning setting */
429 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
430 u8 bad_wstat; /* used for ignoring WRERR_STAT */
431 u8 nowerr; /* used for ignoring WRERR_STAT */
432 u8 sect0; /* offset of first sector for DM6:DDO */
433 u8 head; /* "real" number of heads */
434 u8 sect; /* "real" sectors per track */
435 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
436 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
437
438 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
439 unsigned int cyl; /* "real" number of cyls */
26bcb879 440 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
441 unsigned int failures; /* current failure count */
442 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 443 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
444
445 u64 capacity64; /* total number of sectors */
446
447 int lun; /* logical unit */
448 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR
449#ifdef CONFIG_BLK_DEV_IDEACPI
450 struct ide_acpi_drive_link *acpidata;
451#endif
1da177e4
LT
452 struct list_head list;
453 struct device gendev;
f36d4024 454 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT
455} ide_drive_t;
456
8604affd
BZ
457#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
458
1da177e4
LT
459#define IDE_CHIPSET_PCI_MASK \
460 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
461#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
462
039788e1 463struct ide_port_info;
1da177e4
LT
464
465typedef struct hwif_s {
466 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
467 struct hwif_s *mate; /* other hwif from same PCI chip */
468 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
469 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
470
471 char name[6]; /* name of interface, eg. "ide0" */
472
473 /* task file registers for pata and sata */
474 unsigned long io_ports[IDE_NR_PORTS];
475 unsigned long sata_scr[SATA_NR_PORTS];
476 unsigned long sata_misc[SATA_NR_PORTS];
477
1da177e4
LT
478 ide_drive_t drives[MAX_DRIVES]; /* drive info */
479
480 u8 major; /* our major number */
481 u8 index; /* 0 for ide0; 1 for ide1; ... */
482 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4
LT
483 u8 bus_state; /* power state of the IDE bus */
484
e95d9c6b 485 u32 host_flags;
6a824c92 486
4099d143
BZ
487 u8 pio_mask;
488
1da177e4
LT
489 u8 ultra_mask;
490 u8 mwdma_mask;
491 u8 swdma_mask;
492
49521f97
BZ
493 u8 cbl; /* cable type */
494
1da177e4
LT
495 hwif_chipset_t chipset; /* sub-module for tuning.. */
496
36501650
BZ
497 struct device *dev;
498
85620436 499 const struct ide_port_info *cds; /* chipset device struct */
1da177e4 500
18e181fe
BZ
501 ide_ack_intr_t *ack_intr;
502
1da177e4
LT
503 void (*rw_disk)(ide_drive_t *, struct request *);
504
505#if 0
506 ide_hwif_ops_t *hwifops;
507#else
1f2cf8b0
BZ
508 /* host specific initialization of devices on a port */
509 void (*port_init_devs)(struct hwif_s *);
88b2b32b 510 /* routine to program host for PIO mode */
26bcb879 511 void (*set_pio_mode)(ide_drive_t *, const u8);
88b2b32b
BZ
512 /* routine to program host for DMA mode */
513 void (*set_dma_mode)(ide_drive_t *, const u8);
1da177e4
LT
514 /* tweaks hardware to select drive */
515 void (*selectproc)(ide_drive_t *);
516 /* chipset polling based on hba specifics */
517 int (*reset_poll)(ide_drive_t *);
518 /* chipset specific changes to default for device-hba resets */
519 void (*pre_reset)(ide_drive_t *);
520 /* routine to reset controller after a disk reset */
521 void (*resetproc)(ide_drive_t *);
1da177e4
LT
522 /* special host masking for drive selection */
523 void (*maskproc)(ide_drive_t *, int);
524 /* check host's drive quirk list */
f01393e4 525 void (*quirkproc)(ide_drive_t *);
1da177e4
LT
526 /* driver soft-power interface */
527 int (*busproc)(ide_drive_t *, int);
1da177e4 528#endif
b4e44369 529 u8 (*mdma_filter)(ide_drive_t *);
2d5eaa6d 530 u8 (*udma_filter)(ide_drive_t *);
1da177e4 531
bfa14b42
BZ
532 u8 (*cable_detect)(struct hwif_s *);
533
1da177e4
LT
534 void (*ata_input_data)(ide_drive_t *, void *, u32);
535 void (*ata_output_data)(ide_drive_t *, void *, u32);
536
537 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
538 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
539
15ce926a 540 void (*dma_host_set)(ide_drive_t *, int);
1da177e4
LT
541 int (*dma_setup)(ide_drive_t *);
542 void (*dma_exec_cmd)(ide_drive_t *, u8);
543 void (*dma_start)(ide_drive_t *);
544 int (*ide_dma_end)(ide_drive_t *drive);
1da177e4 545 int (*ide_dma_test_irq)(ide_drive_t *drive);
f0dd8712 546 void (*ide_dma_clear_irq)(ide_drive_t *drive);
841d2a9b 547 void (*dma_lost_irq)(ide_drive_t *drive);
c283f5db 548 void (*dma_timeout)(ide_drive_t *drive);
1da177e4
LT
549
550 void (*OUTB)(u8 addr, unsigned long port);
551 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
552 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT
553 void (*OUTSW)(unsigned long port, void *addr, u32 count);
554 void (*OUTSL)(unsigned long port, void *addr, u32 count);
555
556 u8 (*INB)(unsigned long port);
557 u16 (*INW)(unsigned long port);
1da177e4
LT
558 void (*INSW)(unsigned long port, void *addr, u32 count);
559 void (*INSL)(unsigned long port, void *addr, u32 count);
560
561 /* dma physical region descriptor table (cpu view) */
562 unsigned int *dmatable_cpu;
563 /* dma physical region descriptor table (dma view) */
564 dma_addr_t dmatable_dma;
565 /* Scatter-gather list used to build the above */
566 struct scatterlist *sg_table;
567 int sg_max_nents; /* Maximum number of entries in it */
568 int sg_nents; /* Current number of entries in it */
569 int sg_dma_direction; /* dma transfer direction */
570
571 /* data phase of the active command (currently only valid for PIO/DMA) */
572 int data_phase;
573
574 unsigned int nsect;
575 unsigned int nleft;
55c16a70 576 struct scatterlist *cursg;
1da177e4
LT
577 unsigned int cursg_ofs;
578
1da177e4
LT
579 int rqsize; /* max sectors per request */
580 int irq; /* our irq number */
581
1da177e4
LT
582 unsigned long dma_base; /* base addr for dma ports */
583 unsigned long dma_command; /* dma command register */
584 unsigned long dma_vendor1; /* dma vendor 1 register */
585 unsigned long dma_status; /* dma status register */
586 unsigned long dma_vendor3; /* dma vendor 3 register */
587 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 588
1da177e4
LT
589 unsigned long config_data; /* for use by chipset-specific code */
590 unsigned long select_data; /* for use by chipset-specific code */
591
020e322d
SS
592 unsigned long extra_base; /* extra addr for dma ports */
593 unsigned extra_ports; /* number of extra dma ports */
594
1da177e4
LT
595 unsigned noprobe : 1; /* don't probe for this interface */
596 unsigned present : 1; /* this interface exists */
597 unsigned hold : 1; /* this interface is always present */
598 unsigned serialized : 1; /* serialized all channel operation */
599 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
600 unsigned reset : 1; /* reset after probe */
1da177e4 601 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
2ad1e558 602 unsigned mmio : 1; /* host uses MMIO */
b034304a 603 unsigned straight8 : 1; /* Alan's straight 8 check */
1da177e4
LT
604
605 struct device gendev;
f36d4024 606 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
607
608 void *hwif_data; /* extra hwif data */
609
610 unsigned dma;
e3a59b4d
HR
611
612#ifdef CONFIG_BLK_DEV_IDEACPI
613 struct ide_acpi_hwif_link *acpidata;
614#endif
22fc6ecc 615} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT
616
617/*
618 * internal ide interrupt handler type
619 */
1da177e4
LT
620typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
621typedef int (ide_expiry_t)(ide_drive_t *);
622
0eea6458
BP
623/* used by ide-cd, ide-floppy, etc. */
624typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
625
1da177e4
LT
626typedef struct hwgroup_s {
627 /* irq handler, if active */
628 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 629
1da177e4
LT
630 /* BOOL: protects all fields below */
631 volatile int busy;
632 /* BOOL: wake us up on timer expiry */
633 unsigned int sleeping : 1;
634 /* BOOL: polling active & poll_timeout field valid */
635 unsigned int polling : 1;
913759ac
AC
636 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
637 unsigned int resetting : 1;
638
1da177e4
LT
639 /* current drive */
640 ide_drive_t *drive;
641 /* ptr to current hwif in linked-list */
642 ide_hwif_t *hwif;
643
1da177e4
LT
644 /* current request */
645 struct request *rq;
a6fbb1c8 646
1da177e4
LT
647 /* failsafe timer */
648 struct timer_list timer;
1da177e4
LT
649 /* timeout value during long polls */
650 unsigned long poll_timeout;
651 /* queried upon timeouts */
652 int (*expiry)(ide_drive_t *);
a6fbb1c8 653
23450319
SS
654 int req_gen;
655 int req_gen_timer;
1da177e4
LT
656} ide_hwgroup_t;
657
7662d046
BZ
658typedef struct ide_driver_s ide_driver_t;
659
f9383c42 660extern struct mutex ide_setting_mtx;
1da177e4 661
7662d046
BZ
662int set_io_32bit(ide_drive_t *, int);
663int set_pio_mode(ide_drive_t *, int);
664int set_using_dma(ide_drive_t *, int);
665
666#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
667/*
668 * configurable drive settings
669 */
670
671#define TYPE_INT 0
1497943e
BZ
672#define TYPE_BYTE 1
673#define TYPE_SHORT 2
1da177e4
LT
674
675#define SETTING_READ (1 << 0)
676#define SETTING_WRITE (1 << 1)
677#define SETTING_RW (SETTING_READ | SETTING_WRITE)
678
679typedef int (ide_procset_t)(ide_drive_t *, int);
680typedef struct ide_settings_s {
681 char *name;
682 int rw;
1da177e4
LT
683 int data_type;
684 int min;
685 int max;
686 int mul_factor;
687 int div_factor;
688 void *data;
689 ide_procset_t *set;
690 int auto_remove;
691 struct ide_settings_s *next;
692} ide_settings_t;
693
1497943e 694int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT
695
696/*
697 * /proc/ide interface
698 */
699typedef struct {
700 const char *name;
701 mode_t mode;
702 read_proc_t *read_proc;
703 write_proc_t *write_proc;
704} ide_proc_entry_t;
705
ecfd80e4
BZ
706void proc_ide_create(void);
707void proc_ide_destroy(void);
5cbf79cd 708void ide_proc_register_port(ide_hwif_t *);
d9270a3f 709void ide_proc_port_register_devices(ide_hwif_t *);
5cbf79cd 710void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
711void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
712void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
713
714void ide_add_generic_settings(ide_drive_t *);
715
1da177e4
LT
716read_proc_t proc_ide_read_capacity;
717read_proc_t proc_ide_read_geometry;
718
719#ifdef CONFIG_BLK_DEV_IDEPCI
720void ide_pci_create_host_proc(const char *, get_info_t *);
721#endif
722
723/*
724 * Standard exit stuff:
725 */
726#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
727{ \
728 len -= off; \
729 if (len < count) { \
730 *eof = 1; \
731 if (len <= 0) \
732 return 0; \
733 } else \
734 len = count; \
735 *start = page + off; \
736 return len; \
737}
738#else
ecfd80e4
BZ
739static inline void proc_ide_create(void) { ; }
740static inline void proc_ide_destroy(void) { ; }
5cbf79cd 741static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 742static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5cbf79cd 743static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
744static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
745static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
746static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT
747#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
748#endif
749
750/*
751 * Power Management step value (rq->pm->pm_step).
752 *
753 * The step value starts at 0 (ide_pm_state_start_suspend) for a
754 * suspend operation or 1000 (ide_pm_state_start_resume) for a
755 * resume operation.
756 *
757 * For each step, the core calls the subdriver start_power_step() first.
758 * This can return:
759 * - ide_stopped : In this case, the core calls us back again unless
760 * step have been set to ide_power_state_completed.
761 * - ide_started : In this case, the channel is left busy until an
762 * async event (interrupt) occurs.
763 * Typically, start_power_step() will issue a taskfile request with
764 * do_rw_taskfile().
765 *
766 * Upon reception of the interrupt, the core will call complete_power_step()
767 * with the error code if any. This routine should update the step value
768 * and return. It should not start a new request. The core will call
769 * start_power_step for the new step value, unless step have been set to
770 * ide_power_state_completed.
771 *
772 * Subdrivers are expected to define their own additional power
773 * steps from 1..999 for suspend and from 1001..1999 for resume,
774 * other values are reserved for future use.
775 */
776
777enum {
778 ide_pm_state_completed = -1,
779 ide_pm_state_start_suspend = 0,
780 ide_pm_state_start_resume = 1000,
781};
782
783/*
784 * Subdrivers support.
4ef3b8f4
LR
785 *
786 * The gendriver.owner field should be set to the module owner of this driver.
787 * The gendriver.name field should be set to the name of this driver
1da177e4 788 */
7662d046 789struct ide_driver_s {
1da177e4
LT
790 const char *version;
791 u8 media;
1da177e4 792 unsigned supports_dsc_overlap : 1;
1da177e4
LT
793 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
794 int (*end_request)(ide_drive_t *, int, int);
795 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
796 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 797 struct device_driver gen_driver;
4031bbe4
RK
798 int (*probe)(ide_drive_t *);
799 void (*remove)(ide_drive_t *);
0d2157f7 800 void (*resume)(ide_drive_t *);
4031bbe4 801 void (*shutdown)(ide_drive_t *);
7662d046
BZ
802#ifdef CONFIG_IDE_PROC_FS
803 ide_proc_entry_t *proc;
804#endif
805};
1da177e4 806
4031bbe4
RK
807#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
808
1da177e4
LT
809int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
810
811/*
812 * ide_hwifs[] is the master data structure used to keep track
813 * of just about everything in ide.c. Whenever possible, routines
814 * should be using pointers to a drive (ide_drive_t *) or
815 * pointers to a hwif (ide_hwif_t *), rather than indexing this
816 * structure directly (the allocation/layout may change!).
817 *
818 */
819#ifndef _IDE_C
820extern ide_hwif_t ide_hwifs[]; /* master data repository */
821#endif
822extern int noautodma;
823
824extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
825int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
826 int uptodate, int nr_sectors);
1da177e4 827
1da177e4
LT
828extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
829
cd2a2d96
BZ
830void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
831 ide_expiry_t *);
1da177e4
LT
832
833ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
834
1da177e4
LT
835ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
836
837ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
838
1da177e4
LT
839extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
840
841extern void ide_fix_driveid(struct hd_driveid *);
01745112 842
1da177e4
LT
843extern void ide_fixstring(u8 *, const int, const int);
844
74af21cf 845int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 846
1da177e4
LT
847extern ide_startstop_t ide_do_reset (ide_drive_t *);
848
1da177e4
LT
849extern void ide_init_drive_cmd (struct request *rq);
850
1da177e4
LT
851/*
852 * "action" parameter type for ide_do_drive_cmd() below.
853 */
854typedef enum {
855 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT
856 ide_preempt, /* insert rq in front of current request */
857 ide_head_wait, /* insert rq in front of current request and wait for it */
858 ide_end /* insert rq at end of list, but don't wait for it */
859} ide_action_t;
860
1da177e4
LT
861extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
862
1da177e4
LT
863extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
864
9e42237f
BZ
865enum {
866 IDE_TFLAG_LBA48 = (1 << 0),
867 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
74095a91
BZ
868 IDE_TFLAG_FLAGGED = (1 << 2),
869 IDE_TFLAG_OUT_DATA = (1 << 3),
870 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
871 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
872 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
873 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
874 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
875 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
876 IDE_TFLAG_OUT_HOB_NSECT |
877 IDE_TFLAG_OUT_HOB_LBAL |
878 IDE_TFLAG_OUT_HOB_LBAM |
879 IDE_TFLAG_OUT_HOB_LBAH,
880 IDE_TFLAG_OUT_FEATURE = (1 << 9),
881 IDE_TFLAG_OUT_NSECT = (1 << 10),
882 IDE_TFLAG_OUT_LBAL = (1 << 11),
883 IDE_TFLAG_OUT_LBAM = (1 << 12),
884 IDE_TFLAG_OUT_LBAH = (1 << 13),
885 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
886 IDE_TFLAG_OUT_NSECT |
887 IDE_TFLAG_OUT_LBAL |
888 IDE_TFLAG_OUT_LBAM |
889 IDE_TFLAG_OUT_LBAH,
807e35d6 890 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 891 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ
892 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
893 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 894 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 895 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ
896 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
897 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
898 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
899 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
900 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
901 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
902 IDE_TFLAG_IN_HOB_LBAM |
903 IDE_TFLAG_IN_HOB_LBAH,
904 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
905 IDE_TFLAG_IN_HOB_NSECT |
906 IDE_TFLAG_IN_HOB_LBA,
907 IDE_TFLAG_IN_NSECT = (1 << 25),
908 IDE_TFLAG_IN_LBAL = (1 << 26),
909 IDE_TFLAG_IN_LBAM = (1 << 27),
910 IDE_TFLAG_IN_LBAH = (1 << 28),
911 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
912 IDE_TFLAG_IN_LBAM |
913 IDE_TFLAG_IN_LBAH,
914 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
915 IDE_TFLAG_IN_LBA,
916 IDE_TFLAG_IN_DEVICE = (1 << 29),
657cc1a8
BZ
917 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
918 IDE_TFLAG_IN_HOB,
919 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
920 IDE_TFLAG_IN_TF,
921 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
922 IDE_TFLAG_IN_DEVICE,
35cf2b94
TH
923 /* force 16-bit I/O operations */
924 IDE_TFLAG_IO_16BIT = (1 << 30),
9e42237f
BZ
925};
926
650d841d
BZ
927struct ide_taskfile {
928 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
929
930 u8 hob_feature; /* 1-5: additional data to support LBA48 */
931 u8 hob_nsect;
932 u8 hob_lbal;
933 u8 hob_lbam;
934 u8 hob_lbah;
935
936 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
937
938 union { /*  7: */
939 u8 error; /* read: error */
940 u8 feature; /* write: feature */
941 };
942
943 u8 nsect; /* 8: number of sectors */
944 u8 lbal; /* 9: LBA low */
945 u8 lbam; /* 10: LBA mid */
946 u8 lbah; /* 11: LBA high */
947
948 u8 device; /* 12: device select */
949
950 union { /* 13: */
951 u8 status; /*  read: status  */
952 u8 command; /* write: command */
953 };
954};
955
1da177e4 956typedef struct ide_task_s {
650d841d
BZ
957 union {
958 struct ide_taskfile tf;
959 u8 tf_array[14];
960 };
866e2ec9 961 u32 tf_flags;
1da177e4 962 int data_phase;
1da177e4
LT
963 struct request *rq; /* copy of request */
964 void *special; /* valid_t generally */
965} ide_task_t;
966
9e42237f 967void ide_tf_load(ide_drive_t *, ide_task_t *);
c2b57cdc 968void ide_tf_read(ide_drive_t *, ide_task_t *);
1da177e4
LT
969
970extern void SELECT_DRIVE(ide_drive_t *);
1da177e4 971extern void SELECT_MASK(ide_drive_t *, int);
1da177e4
LT
972
973extern int drive_is_ready(ide_drive_t *);
1da177e4 974
2fc57388
BZ
975void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
976
f6e29e35 977ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 978
4d7a984b
TH
979void task_end_request(ide_drive_t *, struct request *, u8);
980
ac026ff2 981int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
982int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
983
1da177e4
LT
984int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
985int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
986int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
987
988extern int system_bus_clock(void);
989
990extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
991extern int ide_config_drive_speed(ide_drive_t *, u8);
992extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
993extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
994
995extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
996
1da177e4
LT
997extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
998
999extern int ide_spin_wait_hwgroup(ide_drive_t *);
1000extern void ide_timer_expiry(unsigned long);
7d12e780 1001extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1002extern void do_ide_request(struct request_queue *);
1da177e4
LT
1003
1004void ide_init_disk(struct gendisk *, ide_drive_t *);
1005
6d208b39 1006#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
ade2daf9 1007extern int ide_scan_direction;
725522b5
GKH
1008extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1009#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1010#else
1011#define ide_pci_register_driver(d) pci_register_driver(d)
1012#endif
1013
85620436
BZ
1014void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1015void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1016
c413b9b9
BZ
1017#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1018void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1019#else
1020static inline void ide_hwif_setup_dma(ide_hwif_t *hwif,
1021 const struct ide_port_info *d) { }
1022#endif
1023
1da177e4
LT
1024extern void default_hwif_iops(ide_hwif_t *);
1025extern void default_hwif_mmiops(ide_hwif_t *);
1026extern void default_hwif_transport(ide_hwif_t *);
1027
1da177e4
LT
1028typedef struct ide_pci_enablebit_s {
1029 u8 reg; /* byte pci reg holding the enable-bit */
1030 u8 mask; /* mask to isolate the enable-bit */
1031 u8 val; /* value of masked reg when "enabled" */
1032} ide_pci_enablebit_t;
1033
1034enum {
1035 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1036 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1037 /* single port device */
a5d8c5c8 1038 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1039 /* don't use legacy PIO blacklist */
1040 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1041 /* don't use conservative PIO "downgrade" */
1042 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
26bcb879
BZ
1043 /* use PIO8/9 for prefetch off/on */
1044 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1045 /* use PIO6/7 for fast-devsel off/on */
1046 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1047 /* use 100-102 and 200-202 PIO values to set DMA modes */
1048 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1049 /*
1050 * keep DMA setting when programming PIO mode, may be used only
1051 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1052 */
1053 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1054 /* program host for the transfer mode after programming device */
1055 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1056 /* don't program host/device for the transfer mode ("smart" hosts) */
1057 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1058 /* trust BIOS for programming chipset/device for DMA */
1059 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
807b90d0 1060 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
0ae2e178 1061 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ
1062 /* ATAPI DMA is unsupported */
1063 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
7cab14a7
BZ
1064 /* set if host is a "bootable" controller */
1065 IDE_HFLAG_BOOTABLE = (1 << 13),
47b68788
BZ
1066 /* host doesn't support DMA */
1067 IDE_HFLAG_NO_DMA = (1 << 14),
1068 /* check if host is PCI IDE device before allowing DMA */
1069 IDE_HFLAG_NO_AUTODMA = (1 << 15),
807b90d0
BZ
1070 /* don't autotune PIO */
1071 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
9ffcf364 1072 /* host is CS5510/CS5520 */
807b90d0 1073 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
238e4f14
BZ
1074 /* no LBA48 */
1075 IDE_HFLAG_NO_LBA48 = (1 << 17),
1076 /* no LBA48 DMA */
1077 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1078 /* data FIFO is cleared by an error */
1079 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1080 /* serialize ports */
1081 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1082 /* use legacy IRQs */
1083 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1084 /* force use of legacy IRQs */
1085 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ
1086 /* limit LBA48 requests to 256 sectors */
1087 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ
1088 /* use 32-bit I/O ops */
1089 IDE_HFLAG_IO_32BIT = (1 << 24),
1090 /* unmask IRQs */
1091 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
4db90a14 1092 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
8704de8f
BZ
1093 /* host is CY82C693 */
1094 IDE_HFLAG_CY82C693 = (1 << 27),
8ac2b42a
BZ
1095 /* force host out of "simplex" mode */
1096 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1097 /* DSC overlap is unsupported */
1098 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1099 /* never use 32-bit I/O ops */
1100 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1101 /* never unmask IRQs */
1102 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1103};
1104
7cab14a7
BZ
1105#ifdef CONFIG_BLK_DEV_OFFBOARD
1106# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1107#else
1108# define IDE_HFLAG_OFF_BOARD 0
1109#endif
1110
039788e1 1111struct ide_port_info {
1da177e4 1112 char *name;
1da177e4
LT
1113 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1114 void (*init_iops)(ide_hwif_t *);
1115 void (*init_hwif)(ide_hwif_t *);
1116 void (*init_dma)(ide_hwif_t *, unsigned long);
1da177e4 1117 ide_pci_enablebit_t enablebits[2];
528a572d 1118 hwif_chipset_t chipset;
3071a9d0 1119 u8 extra;
9ffcf364 1120 u32 host_flags;
4099d143 1121 u8 pio_mask;
5f8b6c34
BZ
1122 u8 swdma_mask;
1123 u8 mwdma_mask;
18137207 1124 u8 udma_mask;
039788e1 1125};
1da177e4 1126
85620436
BZ
1127int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1128int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT
1129
1130void ide_map_sg(ide_drive_t *, struct request *);
1131void ide_init_sg_cmd(ide_drive_t *, struct request *);
1132
1133#define BAD_DMA_DRIVE 0
1134#define GOOD_DMA_DRIVE 1
1135
65e5f2e3
JC
1136struct drive_list_entry {
1137 const char *id_model;
1138 const char *id_firmware;
1139};
1140
1141int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ
1142
1143#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1144int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1145int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1146
1147u8 ide_find_dma_mode(ide_drive_t *, u8);
1148
1149static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1150{
1151 return ide_find_dma_mode(drive, XFER_UDMA_6);
1152}
1153
4a546e04 1154void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1155void ide_dma_off(ide_drive_t *);
4a546e04 1156void ide_dma_on(ide_drive_t *);
3608b5d7 1157int ide_set_dma(ide_drive_t *);
1da177e4
LT
1158ide_startstop_t ide_dma_intr(ide_drive_t *);
1159
062f9f02
BZ
1160int ide_build_sglist(ide_drive_t *, struct request *);
1161void ide_destroy_dmatable(ide_drive_t *);
1162
1da177e4 1163#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1da177e4 1164extern int ide_build_dmatable(ide_drive_t *, struct request *);
1da177e4 1165extern int ide_release_dma(ide_hwif_t *);
ecf32796 1166extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1da177e4 1167
15ce926a 1168void ide_dma_host_set(ide_drive_t *, int);
1da177e4
LT
1169extern int ide_dma_setup(ide_drive_t *);
1170extern void ide_dma_start(ide_drive_t *);
1171extern int __ide_dma_end(ide_drive_t *);
841d2a9b 1172extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1173extern void ide_dma_timeout(ide_drive_t *);
1da177e4
LT
1174#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1175
1176#else
3ab7efe8 1177static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1178static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1179static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1180static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1181static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1182static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1183static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1184static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1da177e4
LT
1185#endif /* CONFIG_BLK_DEV_IDEDMA */
1186
1187#ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1188static inline void ide_release_dma(ide_hwif_t *drive) {;}
1189#endif
1190
e3a59b4d
HR
1191#ifdef CONFIG_BLK_DEV_IDEACPI
1192extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1193extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1194extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1195extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1196void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1197extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1198#else
1199static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1200static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1201static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1202static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1203static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1204static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1205#endif
1206
fbd13088 1207void ide_remove_port_from_hwgroup(ide_hwif_t *);
1da177e4
LT
1208extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1209extern void ide_hwif_release_regions(ide_hwif_t* hwif);
f82c2b17 1210void ide_unregister(unsigned int, int, int);
1da177e4
LT
1211
1212void ide_register_region(struct gendisk *);
1213void ide_unregister_region(struct gendisk *);
1214
f01393e4 1215void ide_undecoded_slave(ide_drive_t *);
1da177e4 1216
c413b9b9
BZ
1217int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1218int ide_device_add(u8 idx[4], const struct ide_port_info *);
1da177e4
LT
1219
1220static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1221{
1222 return hwif->hwif_data;
1223}
1224
1225static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1226{
1227 hwif->hwif_data = data;
1228}
1229
3ab7efe8 1230const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1231extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1232extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1233
2229833c
BZ
1234static inline int ide_dev_has_iordy(struct hd_driveid *id)
1235{
1236 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1237}
1238
6c3c22f3
SS
1239static inline int ide_dev_is_sata(struct hd_driveid *id)
1240{
1241 /*
1242 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1243 * verifying that word 80 by casting it to a signed type --
1244 * this trick allows us to filter out the reserved values of
1245 * 0x0000 and 0xffff along with the earlier ATA revisions...
1246 */
1247 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1248 return 1;
1249 return 0;
1250}
1251
a501633c 1252u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1253u8 ide_dump_status(ide_drive_t *, const char *, u8);
1254
1255typedef struct ide_pio_timings_s {
1256 int setup_time; /* Address setup (ns) minimum */
1257 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS
1258 int cycle_time; /* Cycle time (ns) minimum = */
1259 /* active + recovery (+ setup for some chips) */
1da177e4
LT
1260} ide_pio_timings_t;
1261
7dd00083 1262unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1263u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT
1264extern const ide_pio_timings_t ide_pio_timings[6];
1265
88b2b32b
BZ
1266int ide_set_pio_mode(ide_drive_t *, u8);
1267int ide_set_dma_mode(ide_drive_t *, u8);
1268
26bcb879
BZ
1269void ide_set_pio(ide_drive_t *, u8);
1270
1271static inline void ide_set_max_pio(ide_drive_t *drive)
1272{
1273 ide_set_pio(drive, 255);
1274}
1da177e4
LT
1275
1276extern spinlock_t ide_lock;
ef29888e 1277extern struct mutex ide_cfg_mtx;
1da177e4
LT
1278/*
1279 * Structure locking:
1280 *
ef29888e 1281 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1282 * ide_hwif_t->{next,hwgroup}
1283 * ide_drive_t->next
1284 *
1285 * ide_hwgroup_t->busy: ide_lock
1286 * ide_hwgroup_t->hwif: ide_lock
1287 * ide_hwif_t->mate: constant, no locking
1288 * ide_drive_t->hwif: constant, no locking
1289 */
1290
366c7f55 1291#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1292
1293extern struct bus_type ide_bus_type;
1294
1295/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1296#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1297
1298/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1299#define ide_id_has_flush_cache_ext(id) \
1300 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1301
7b9f25b5
BZ
1302static inline void ide_dump_identify(u8 *id)
1303{
1304 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1305}
1306
86b37860
CL
1307static inline int hwif_to_node(ide_hwif_t *hwif)
1308{
36501650 1309 struct pci_dev *dev = to_pci_dev(hwif->dev);
86b37860
CL
1310 return dev ? pcibus_to_node(dev->bus) : -1;
1311}
1312
1b678347
BH
1313static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1314{
1315 ide_hwif_t *hwif = HWIF(drive);
1316
1317 return &hwif->drives[(drive->dn ^ 1) & 1];
1318}
1319
81ca6919
BZ
1320static inline void ide_set_irq(ide_drive_t *drive, int on)
1321{
1322 drive->hwif->OUTB(drive->ctl | (on ? 0 : 2), IDE_CONTROL_REG);
1323}
1324
1da177e4 1325#endif /* _IDE_H */