[linux-2.6-block.git] / include / linux / fsl_devices.h

/*
 * include/linux/fsl_devices.h
 *
 * Definitions for any platform device related flags or structures for
 * Freescale processor devices
 *
 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
 *
 * Copyright 2004,2012 Freescale Semiconductor, Inc
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#ifndef _FSL_DEVICE_H_
#define _FSL_DEVICE_H_

#define FSL_UTMI_PHY_DLY	10	/*As per P1010RM, delay for UTMI
				PHY CLK to become stable - 10ms*/
#define FSL_USB_PHY_CLK_TIMEOUT	10000	/* uSec */

#include <linux/types.h>

/*
 * Some conventions on how we handle peripherals on Freescale chips
 *
 * unique device: a platform_device entry in fsl_plat_devs[] plus
 * associated device information in its platform_data structure.
 *
 * A chip is described by a set of unique devices.
 *
 * Each sub-arch has its own master list of unique devices and
 * enumerates them by enum fsl_devices in a sub-arch specific header
 *
 * The platform data structure is broken into two parts.  The
 * first is device specific information that help identify any
 * unique features of a peripheral.  The second is any
 * information that may be defined by the board or how the device
 * is connected externally of the chip.
 *
 * naming conventions:
 * - platform data structures: <driver>_platform_data
 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
 *
 */

enum fsl_usb2_controller_ver {
	FSL_USB_VER_NONE = -1,
	FSL_USB_VER_OLD = 0,
	FSL_USB_VER_1_6 = 1,
	FSL_USB_VER_2_2 = 2,
	FSL_USB_VER_2_4 = 3,
	FSL_USB_VER_2_5 = 4,
};

enum fsl_usb2_operating_modes {
	FSL_USB2_MPH_HOST,
	FSL_USB2_DR_HOST,
	FSL_USB2_DR_DEVICE,
	FSL_USB2_DR_OTG,
};

enum fsl_usb2_phy_modes {
	FSL_USB2_PHY_NONE,
	FSL_USB2_PHY_ULPI,
	FSL_USB2_PHY_UTMI,
	FSL_USB2_PHY_UTMI_WIDE,
	FSL_USB2_PHY_SERIAL,
	FSL_USB2_PHY_UTMI_DUAL,
};

struct clk;
struct platform_device;

struct fsl_usb2_platform_data {
	/* board specific information */
	enum fsl_usb2_controller_ver	controller_ver;
	enum fsl_usb2_operating_modes	operating_mode;
	enum fsl_usb2_phy_modes		phy_mode;
	unsigned int			port_enables;
	unsigned int			workaround;

	int		(*init)(struct platform_device *);
	void		(*exit)(struct platform_device *);
	void __iomem	*regs;		/* ioremap'd register base */
	struct clk	*clk;
	unsigned	power_budget;	/* hcd->power_budget */
	unsigned	big_endian_mmio:1;
	unsigned	big_endian_desc:1;
	unsigned	es:1;		/* need USBMODE:ES */
	unsigned	le_setup_buf:1;
	unsigned	have_sysif_regs:1;
	unsigned	invert_drvvbus:1;
	unsigned	invert_pwr_fault:1;

	unsigned	suspended:1;
	unsigned	already_suspended:1;
	unsigned        has_fsl_erratum_a007792:1;
	unsigned        has_fsl_erratum_a005275:1;
	unsigned        check_phy_clk_valid:1;

	/* register save area for suspend/resume */
	u32		pm_command;
	u32		pm_status;
	u32		pm_intr_enable;
	u32		pm_frame_index;
	u32		pm_segment;
	u32		pm_frame_list;
	u32		pm_async_next;
	u32		pm_configured_flag;
	u32		pm_portsc;
	u32		pm_usbgenctrl;
};

/* Flags in fsl_usb2_mph_platform_data */
#define FSL_USB2_PORT0_ENABLED	0x00000001
#define FSL_USB2_PORT1_ENABLED	0x00000002

#define FLS_USB2_WORKAROUND_ENGCM09152	(1 << 0)

struct spi_device;

struct fsl_spi_platform_data {
	u32 	initial_spmode;	/* initial SPMODE value */
	s16	bus_num;
	unsigned int flags;
#define SPI_QE_CPU_MODE		(1 << 0) /* QE CPU ("PIO") mode */
#define SPI_CPM_MODE		(1 << 1) /* CPM/QE ("DMA") mode */
#define SPI_CPM1		(1 << 2) /* SPI unit is in CPM1 block */
#define SPI_CPM2		(1 << 3) /* SPI unit is in CPM2 block */
#define SPI_QE			(1 << 4) /* SPI unit is in QE block */
	/* board specific information */
	u16	max_chipselect;
	void	(*cs_control)(struct spi_device *spi, bool on);
	u32	sysclk;
};

struct mpc8xx_pcmcia_ops {
	void(*hw_ctrl)(int slot, int enable);
	int(*voltage_set)(int slot, int vcc, int vpp);
};

/* Returns non-zero if the current suspend operation would
 * lead to a deep sleep (i.e. power removed from the core,
 * instead of just the clock).
 */
#if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
int fsl_deep_sleep(void);
#else
static inline int fsl_deep_sleep(void) { return 0; }
#endif

#endif /* _FSL_DEVICE_H_ */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/linux/fsl_devices.h
	3	*
	4	* Definitions for any platform device related flags or structures for
	5	* Freescale processor devices
	6	*
4c8d3d99	7	* Maintainer: Kumar Gala <galak@kernel.crashing.org>
1da177e4	8	*
58c559e6	9	* Copyright 2004,2012 Freescale Semiconductor, Inc
1da177e4 LT	10	*
	11	* This program is free software; you can redistribute it and/or modify it
	12	* under the terms of the GNU General Public License as published by the
	13	* Free Software Foundation; either version 2 of the License, or (at your
	14	* option) any later version.
	15	*/
	16
1da177e4 LT	17	#ifndef _FSL_DEVICE_H_
	18	#define _FSL_DEVICE_H_
	19
58c559e6 RM	20	#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
58c559e6 RM	21	PHY CLK to become stable - 10ms*/
5ed33877	22	#define FSL_USB_PHY_CLK_TIMEOUT 10000 /* uSec */
58c559e6	23
1da177e4 LT	24	#include <linux/types.h>
	25
	26	/*
	27	* Some conventions on how we handle peripherals on Freescale chips
	28	*
	29	* unique device: a platform_device entry in fsl_plat_devs[] plus
	30	* associated device information in its platform_data structure.
	31	*
	32	* A chip is described by a set of unique devices.
	33	*
	34	* Each sub-arch has its own master list of unique devices and
	35	* enumerates them by enum fsl_devices in a sub-arch specific header
	36	*
	37	* The platform data structure is broken into two parts. The
	38	* first is device specific information that help identify any
	39	* unique features of a peripheral. The second is any
	40	* information that may be defined by the board or how the device
	41	* is connected externally of the chip.
	42	*
	43	* naming conventions:
	44	* - platform data structures: <driver>_platform_data
	45	* - platform data device flags: FSL_<driver>_DEV_<FLAG>
	46	* - platform data board flags: FSL_<driver>_BRD_<FLAG>
	47	*
	48	*/
	49
38aa4200 NB	50	enum fsl_usb2_controller_ver {
	51	FSL_USB_VER_NONE = -1,
	52	FSL_USB_VER_OLD = 0,
	53	FSL_USB_VER_1_6 = 1,
	54	FSL_USB_VER_2_2 = 2,
	55	FSL_USB_VER_2_4 = 3,
	56	FSL_USB_VER_2_5 = 4,
	57	};
	58
80cb9aee RV	59	enum fsl_usb2_operating_modes {
	60	FSL_USB2_MPH_HOST,
	61	FSL_USB2_DR_HOST,
	62	FSL_USB2_DR_DEVICE,
	63	FSL_USB2_DR_OTG,
	64	};
	65
	66	enum fsl_usb2_phy_modes {
	67	FSL_USB2_PHY_NONE,
	68	FSL_USB2_PHY_ULPI,
	69	FSL_USB2_PHY_UTMI,
	70	FSL_USB2_PHY_UTMI_WIDE,
	71	FSL_USB2_PHY_SERIAL,
6009d95e	72	FSL_USB2_PHY_UTMI_DUAL,
80cb9aee RV	73	};
80cb9aee RV	74
230f7ede AG	75	struct clk;
	76	struct platform_device;
	77
80cb9aee RV	78	struct fsl_usb2_platform_data {
80cb9aee RV	79	/* board specific information */
38aa4200	80	enum fsl_usb2_controller_ver controller_ver;
98658538 LY	81	enum fsl_usb2_operating_modes operating_mode;
	82	enum fsl_usb2_phy_modes phy_mode;
	83	unsigned int port_enables;
69cb1ec4	84	unsigned int workaround;
230f7ede AG	85
	86	int (init)(struct platform_device );
	87	void (exit)(struct platform_device );
	88	void __iomem regs; / ioremap'd register base */
	89	struct clk *clk;
83722bc9	90	unsigned power_budget; /* hcd->power_budget */
230f7ede AG	91	unsigned big_endian_mmio:1;
	92	unsigned big_endian_desc:1;
	93	unsigned es:1; /* need USBMODE:ES */
	94	unsigned le_setup_buf:1;
	95	unsigned have_sysif_regs:1;
	96	unsigned invert_drvvbus:1;
	97	unsigned invert_pwr_fault:1;
13b7ee2a AG	98
	99	unsigned suspended:1;
	100	unsigned already_suspended:1;
523f1dec	101	unsigned has_fsl_erratum_a007792:1;
f8786a91	102	unsigned has_fsl_erratum_a005275:1;
f4fdfaa2	103	unsigned check_phy_clk_valid:1;
13b7ee2a AG	104
	105	/* register save area for suspend/resume */
	106	u32 pm_command;
	107	u32 pm_status;
	108	u32 pm_intr_enable;
	109	u32 pm_frame_index;
	110	u32 pm_segment;
	111	u32 pm_frame_list;
	112	u32 pm_async_next;
	113	u32 pm_configured_flag;
	114	u32 pm_portsc;
	115	u32 pm_usbgenctrl;
80cb9aee RV	116	};
	117
	118	/* Flags in fsl_usb2_mph_platform_data */
	119	#define FSL_USB2_PORT0_ENABLED 0x00000001
	120	#define FSL_USB2_PORT1_ENABLED 0x00000002
	121
69cb1ec4 EB	122	#define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0)
69cb1ec4 EB	123
364fdbc0 AV	124	struct spi_device;
364fdbc0 AV	125
ccf06998 KG	126	struct fsl_spi_platform_data {
ccf06998 KG	127	u32 initial_spmode; /* initial SPMODE value */
35b4b3c0	128	s16 bus_num;
87ec0e98	129	unsigned int flags;
7d6709a2 BH	130	#define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */
	131	#define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */
	132	#define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */
	133	#define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */
	134	#define SPI_QE (1 << 4) /* SPI unit is in QE block */
ccf06998 KG	135	/* board specific information */
ccf06998 KG	136	u16 max_chipselect;
364fdbc0	137	void (cs_control)(struct spi_device spi, bool on);
ccf06998 KG	138	u32 sysclk;
	139	};
	140
80128ff7 VB	141	struct mpc8xx_pcmcia_ops {
	142	void(*hw_ctrl)(int slot, int enable);
	143	int(*voltage_set)(int slot, int vcc, int vpp);
	144	};
	145
d49747bd SW	146	/* Returns non-zero if the current suspend operation would
	147	* lead to a deep sleep (i.e. power removed from the core,
	148	* instead of just the clock).
	149	*/
2e9d546e	150	#if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
d49747bd	151	int fsl_deep_sleep(void);
2e9d546e AV	152	#else
	153	static inline int fsl_deep_sleep(void) { return 0; }
	154	#endif
d49747bd	155
98658538	156	#endif /* _FSL_DEVICE_H_ */