[linux-2.6-block.git] / include / asm-mips / processor.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 Waldorf GMBH
 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
 * Copyright (C) 1996 Paul M. Antoine
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 */
#ifndef _ASM_PROCESSOR_H
#define _ASM_PROCESSOR_H

#include <linux/config.h>
#include <linux/threads.h>

#include <asm/cachectl.h>
#include <asm/cpu.h>
#include <asm/cpu-info.h>
#include <asm/mipsregs.h>
#include <asm/prefetch.h>
#include <asm/system.h>

/*
 * Return current * instruction pointer ("program counter").
 */
#define current_text_addr() ({ __label__ _l; _l: &&_l;})

/*
 * System setup and hardware flags..
 */
extern void (*cpu_wait)(void);

extern unsigned int vced_count, vcei_count;

#ifdef CONFIG_32BIT
/*
 * User space process size: 2GB. This is hardcoded into a few places,
 * so don't change it unless you know what you are doing.
 */
#define TASK_SIZE	0x7fff8000UL

/*
 * This decides where the kernel will search for a free chunk of vm
 * space during mmap's.
 */
#define TASK_UNMAPPED_BASE	(PAGE_ALIGN(TASK_SIZE / 3))
#endif

#ifdef CONFIG_64BIT
/*
 * User space process size: 1TB. This is hardcoded into a few places,
 * so don't change it unless you know what you are doing.  TASK_SIZE
 * is limited to 1TB by the R4000 architecture; R10000 and better can
 * support 16TB; the architectural reserve for future expansion is
 * 8192EB ...
 */
#define TASK_SIZE32	0x7fff8000UL
#define TASK_SIZE	0x10000000000UL

/*
 * This decides where the kernel will search for a free chunk of vm
 * space during mmap's.
 */
#define TASK_UNMAPPED_BASE	((current->thread.mflags & MF_32BIT_ADDR) ? \
	PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
#endif

#define NUM_FPU_REGS	32

typedef __u64 fpureg_t;

struct mips_fpu_hard_struct {
	fpureg_t	fpr[NUM_FPU_REGS];
	unsigned int	fcr31;
};

/*
 * It would be nice to add some more fields for emulator statistics, but there
 * are a number of fixed offsets in offset.h and elsewhere that would have to
 * be recalculated by hand.  So the additional information will be private to
 * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
 */

struct mips_fpu_soft_struct {
	fpureg_t	fpr[NUM_FPU_REGS];
	unsigned int	fcr31;
};

union mips_fpu_union {
        struct mips_fpu_hard_struct hard;
        struct mips_fpu_soft_struct soft;
};

#define INIT_FPU { \
	{{0,},} \
}

#define NUM_DSP_REGS   6

typedef __u32 dspreg_t;

struct mips_dsp_state {
	dspreg_t        dspr[NUM_DSP_REGS];
	unsigned int    dspcontrol;
};

#define INIT_DSP {{0,},}

typedef struct {
	unsigned long seg;
} mm_segment_t;

#define ARCH_MIN_TASKALIGN	8

struct mips_abi;

/*
 * If you change thread_struct remember to change the #defines below too!
 */
struct thread_struct {
	/* Saved main processor registers. */
	unsigned long reg16;
	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
	unsigned long reg29, reg30, reg31;

	/* Saved cp0 stuff. */
	unsigned long cp0_status;

	/* Saved fpu/fpu emulator stuff. */
	union mips_fpu_union fpu;

	/* Saved state of the DSP ASE, if available. */
	struct mips_dsp_state dsp;

	/* Other stuff associated with the thread. */
	unsigned long cp0_badvaddr;	/* Last user fault */
	unsigned long cp0_baduaddr;	/* Last kernel fault accessing USEG */
	unsigned long error_code;
	unsigned long trap_no;
#define MF_FIXADE	1		/* Fix address errors in software */
#define MF_LOGADE	2		/* Log address errors to syslog */
#define MF_32BIT_REGS	4		/* also implies 16/32 fprs */
#define MF_32BIT_ADDR	8		/* 32-bit address space (o32/n32) */
	unsigned long mflags;
	unsigned long irix_trampoline;  /* Wheee... */
	unsigned long irix_oldctx;
	struct mips_abi *abi;
};

#define MF_ABI_MASK	(MF_32BIT_REGS | MF_32BIT_ADDR)
#define MF_O32		(MF_32BIT_REGS | MF_32BIT_ADDR)
#define MF_N32		MF_32BIT_ADDR
#define MF_N64		0

#define INIT_THREAD  { \
        /* \
         * saved main processor registers \
         */ \
	0, 0, 0, 0, 0, 0, 0, 0, \
	               0, 0, 0, \
	/* \
	 * saved cp0 stuff \
	 */ \
	0, \
	/* \
	 * saved fpu/fpu emulator stuff \
	 */ \
	INIT_FPU, \
	/* \
	 * saved dsp/dsp emulator stuff \
	 */ \
	INIT_DSP, \
	/* \
	 * Other stuff associated with the process \
	 */ \
	0, 0, 0, 0, \
	/* \
	 * For now the default is to fix address errors \
	 */ \
	MF_FIXADE, 0, 0 \
}

struct task_struct;

/* Free all resources held by a thread. */
#define release_thread(thread) do { } while(0)

/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk)	do { } while (0)

extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);

extern unsigned long thread_saved_pc(struct task_struct *tsk);

/*
 * Do necessary setup to start up a newly executed thread.
 */
extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);

unsigned long get_wchan(struct task_struct *p);

#define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs))
#define __KSTK_TOS(tsk) ((unsigned long)(tsk->thread_info) + THREAD_SIZE - 32)
#define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc)))
#define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29])))
#define KSTK_STATUS(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_status)))

#define cpu_relax()	barrier()

/*
 * Return_address is a replacement for __builtin_return_address(count)
 * which on certain architectures cannot reasonably be implemented in GCC
 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
 * Note that __builtin_return_address(x>=1) is forbidden because GCC
 * aborts compilation on some CPUs.  It's simply not possible to unwind
 * some CPU's stackframes.
 *
 * __builtin_return_address works only for non-leaf functions.  We avoid the
 * overhead of a function call by forcing the compiler to save the return
 * address register on the stack.
 */
#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})

#ifdef CONFIG_CPU_HAS_PREFETCH

#define ARCH_HAS_PREFETCH

extern inline void prefetch(const void *addr)
{
	__asm__ __volatile__(
	"	.set	mips4		\n"
	"	pref	%0, (%1)	\n"
	"	.set	mips0		\n"
	:
	: "i" (Pref_Load), "r" (addr));
}

#endif

#endif /* _ASM_PROCESSOR_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994 Waldorf GMBH
	7	* Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
	8	* Copyright (C) 1996 Paul M. Antoine
	9	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
	10	*/
	11	#ifndef _ASM_PROCESSOR_H
	12	#define _ASM_PROCESSOR_H
	13
	14	#include <linux/config.h>
	15	#include <linux/threads.h>
	16
	17	#include <asm/cachectl.h>
	18	#include <asm/cpu.h>
	19	#include <asm/cpu-info.h>
	20	#include <asm/mipsregs.h>
	21	#include <asm/prefetch.h>
	22	#include <asm/system.h>
	23
	24	/*
	25	* Return current * instruction pointer ("program counter").
	26	*/
	27	#define current_text_addr() ({ __label__ _l; _l: &&_l;})
	28
	29	/*
	30	* System setup and hardware flags..
	31	*/
	32	extern void (*cpu_wait)(void);
	33
	34	extern unsigned int vced_count, vcei_count;
	35
875d43e7	36	#ifdef CONFIG_32BIT
1da177e4 LT	37	/*
	38	* User space process size: 2GB. This is hardcoded into a few places,
	39	* so don't change it unless you know what you are doing.
	40	*/
	41	#define TASK_SIZE 0x7fff8000UL
	42
	43	/*
	44	* This decides where the kernel will search for a free chunk of vm
	45	* space during mmap's.
	46	*/
	47	#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
	48	#endif
	49
875d43e7	50	#ifdef CONFIG_64BIT
1da177e4 LT	51	/*
	52	* User space process size: 1TB. This is hardcoded into a few places,
	53	* so don't change it unless you know what you are doing. TASK_SIZE
	54	* is limited to 1TB by the R4000 architecture; R10000 and better can
	55	* support 16TB; the architectural reserve for future expansion is
	56	* 8192EB ...
	57	*/
	58	#define TASK_SIZE32 0x7fff8000UL
	59	#define TASK_SIZE 0x10000000000UL
	60
	61	/*
	62	* This decides where the kernel will search for a free chunk of vm
	63	* space during mmap's.
	64	*/
	65	#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \
	66	PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
	67	#endif
	68
	69	#define NUM_FPU_REGS 32
	70
	71	typedef __u64 fpureg_t;
	72
	73	struct mips_fpu_hard_struct {
	74	fpureg_t fpr[NUM_FPU_REGS];
	75	unsigned int fcr31;
	76	};
	77
	78	/*
	79	* It would be nice to add some more fields for emulator statistics, but there
	80	* are a number of fixed offsets in offset.h and elsewhere that would have to
	81	* be recalculated by hand. So the additional information will be private to
	82	* the FPU emulator for now. See asm-mips/fpu_emulator.h.
	83	*/
	84
	85	struct mips_fpu_soft_struct {
	86	fpureg_t fpr[NUM_FPU_REGS];
	87	unsigned int fcr31;
	88	};
	89
	90	union mips_fpu_union {
	91	struct mips_fpu_hard_struct hard;
	92	struct mips_fpu_soft_struct soft;
	93	};
	94
	95	#define INIT_FPU { \
	96	{{0,},} \
	97	}
	98
e50c0a8f RB	99	#define NUM_DSP_REGS 6
	100
	101	typedef __u32 dspreg_t;
	102
	103	struct mips_dsp_state {
	104	dspreg_t dspr[NUM_DSP_REGS];
	105	unsigned int dspcontrol;
e50c0a8f RB	106	};
	107
	108	#define INIT_DSP {{0,},}
	109
1da177e4 LT	110	typedef struct {
	111	unsigned long seg;
	112	} mm_segment_t;
	113
	114	#define ARCH_MIN_TASKALIGN 8
	115
e50c0a8f RB	116	struct mips_abi;
e50c0a8f RB	117
1da177e4 LT	118	/*
	119	* If you change thread_struct remember to change the #defines below too!
	120	*/
	121	struct thread_struct {
	122	/* Saved main processor registers. */
	123	unsigned long reg16;
	124	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
	125	unsigned long reg29, reg30, reg31;
	126
	127	/* Saved cp0 stuff. */
	128	unsigned long cp0_status;
	129
	130	/* Saved fpu/fpu emulator stuff. */
	131	union mips_fpu_union fpu;
	132
e50c0a8f RB	133	/* Saved state of the DSP ASE, if available. */
	134	struct mips_dsp_state dsp;
	135
1da177e4 LT	136	/* Other stuff associated with the thread. */
	137	unsigned long cp0_badvaddr; /* Last user fault */
	138	unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
	139	unsigned long error_code;
	140	unsigned long trap_no;
	141	#define MF_FIXADE 1 /* Fix address errors in software */
	142	#define MF_LOGADE 2 /* Log address errors to syslog */
	143	#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
	144	#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
	145	unsigned long mflags;
	146	unsigned long irix_trampoline; /* Wheee... */
	147	unsigned long irix_oldctx;
e50c0a8f	148	struct mips_abi *abi;
1da177e4 LT	149	};
	150
	151	#define MF_ABI_MASK (MF_32BIT_REGS \| MF_32BIT_ADDR)
	152	#define MF_O32 (MF_32BIT_REGS \| MF_32BIT_ADDR)
	153	#define MF_N32 MF_32BIT_ADDR
	154	#define MF_N64 0
	155
	156	#define INIT_THREAD { \
	157	/* \
	158	* saved main processor registers \
	159	*/ \
	160	0, 0, 0, 0, 0, 0, 0, 0, \
	161	0, 0, 0, \
	162	/* \
	163	* saved cp0 stuff \
	164	*/ \
	165	0, \
	166	/* \
	167	* saved fpu/fpu emulator stuff \
	168	*/ \
	169	INIT_FPU, \
e50c0a8f RB	170	/* \
	171	* saved dsp/dsp emulator stuff \
	172	*/ \
	173	INIT_DSP, \
1da177e4 LT	174	/* \
	175	* Other stuff associated with the process \
	176	*/ \
	177	0, 0, 0, 0, \
	178	/* \
	179	* For now the default is to fix address errors \
	180	*/ \
	181	MF_FIXADE, 0, 0 \
	182	}
	183
	184	struct task_struct;
	185
	186	/* Free all resources held by a thread. */
	187	#define release_thread(thread) do { } while(0)
	188
	189	/* Prepare to copy thread state - unlazy all lazy status */
	190	#define prepare_to_copy(tsk) do { } while (0)
	191
	192	extern long kernel_thread(int (fn)(void ), void * arg, unsigned long flags);
	193
	194	extern unsigned long thread_saved_pc(struct task_struct *tsk);
	195
	196	/*
	197	* Do necessary setup to start up a newly executed thread.
	198	*/
	199	extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
	200
	201	unsigned long get_wchan(struct task_struct *p);
	202
	203	#define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs))
	204	#define __KSTK_TOS(tsk) ((unsigned long)(tsk->thread_info) + THREAD_SIZE - 32)
	205	#define KSTK_EIP(tsk) ((unsigned long )(__KSTK_TOS(tsk) + __PT_REG(cp0_epc)))
	206	#define KSTK_ESP(tsk) ((unsigned long )(__KSTK_TOS(tsk) + __PT_REG(regs[29])))
	207	#define KSTK_STATUS(tsk) ((unsigned long )(__KSTK_TOS(tsk) + __PT_REG(cp0_status)))
	208
	209	#define cpu_relax() barrier()
	210
	211	/*
	212	* Return_address is a replacement for __builtin_return_address(count)
	213	* which on certain architectures cannot reasonably be implemented in GCC
	214	* (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
	215	* Note that __builtin_return_address(x>=1) is forbidden because GCC
	216	* aborts compilation on some CPUs. It's simply not possible to unwind
	217	* some CPU's stackframes.
	218	*
	219	* __builtin_return_address works only for non-leaf functions. We avoid the
	220	* overhead of a function call by forcing the compiler to save the return
	221	* address register on the stack.
	222	*/
	223	#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
	224
	225	#ifdef CONFIG_CPU_HAS_PREFETCH
	226
	227	#define ARCH_HAS_PREFETCH
	228
	229	extern inline void prefetch(const void *addr)
	230	{
	231	__asm__ __volatile__(
	232	" .set mips4 \n"
	233	" pref %0, (%1) \n"
	234	" .set mips0 \n"
	235	:
	236	: "i" (Pref_Load), "r" (addr));
	237	}
238
239	#endif
240
241	#endif /* _ASM_PROCESSOR_H */