Commit | Line | Data |
---|---|---|
58d08319 JN |
1 | #ifndef __pinmux_defs_h |
2 | #define __pinmux_defs_h | |
3 | ||
4 | /* | |
5 | * This file is autogenerated from | |
6 | * file: ../../inst/pinmux/rtl/guinness/pinmux_regs.r | |
7 | * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp | |
8 | * last modfied: Mon Apr 11 16:09:11 2005 | |
9 | * | |
10 | * by /n/asic/design/tools/rdesc/src/rdes2c --outfile pinmux_defs.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r | |
11 | * id: $Id: pinmux_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $ | |
12 | * Any changes here will be lost. | |
13 | * | |
14 | * -*- buffer-read-only: t -*- | |
15 | */ | |
16 | /* Main access macros */ | |
17 | #ifndef REG_RD | |
18 | #define REG_RD( scope, inst, reg ) \ | |
19 | REG_READ( reg_##scope##_##reg, \ | |
20 | (inst) + REG_RD_ADDR_##scope##_##reg ) | |
21 | #endif | |
22 | ||
23 | #ifndef REG_WR | |
24 | #define REG_WR( scope, inst, reg, val ) \ | |
25 | REG_WRITE( reg_##scope##_##reg, \ | |
26 | (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) | |
27 | #endif | |
28 | ||
29 | #ifndef REG_RD_VECT | |
30 | #define REG_RD_VECT( scope, inst, reg, index ) \ | |
31 | REG_READ( reg_##scope##_##reg, \ | |
32 | (inst) + REG_RD_ADDR_##scope##_##reg + \ | |
33 | (index) * STRIDE_##scope##_##reg ) | |
34 | #endif | |
35 | ||
36 | #ifndef REG_WR_VECT | |
37 | #define REG_WR_VECT( scope, inst, reg, index, val ) \ | |
38 | REG_WRITE( reg_##scope##_##reg, \ | |
39 | (inst) + REG_WR_ADDR_##scope##_##reg + \ | |
40 | (index) * STRIDE_##scope##_##reg, (val) ) | |
41 | #endif | |
42 | ||
43 | #ifndef REG_RD_INT | |
44 | #define REG_RD_INT( scope, inst, reg ) \ | |
45 | REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) | |
46 | #endif | |
47 | ||
48 | #ifndef REG_WR_INT | |
49 | #define REG_WR_INT( scope, inst, reg, val ) \ | |
50 | REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) | |
51 | #endif | |
52 | ||
53 | #ifndef REG_RD_INT_VECT | |
54 | #define REG_RD_INT_VECT( scope, inst, reg, index ) \ | |
55 | REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ | |
56 | (index) * STRIDE_##scope##_##reg ) | |
57 | #endif | |
58 | ||
59 | #ifndef REG_WR_INT_VECT | |
60 | #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ | |
61 | REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ | |
62 | (index) * STRIDE_##scope##_##reg, (val) ) | |
63 | #endif | |
64 | ||
65 | #ifndef REG_TYPE_CONV | |
66 | #define REG_TYPE_CONV( type, orgtype, val ) \ | |
67 | ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) | |
68 | #endif | |
69 | ||
70 | #ifndef reg_page_size | |
71 | #define reg_page_size 8192 | |
72 | #endif | |
73 | ||
74 | #ifndef REG_ADDR | |
75 | #define REG_ADDR( scope, inst, reg ) \ | |
76 | ( (inst) + REG_RD_ADDR_##scope##_##reg ) | |
77 | #endif | |
78 | ||
79 | #ifndef REG_ADDR_VECT | |
80 | #define REG_ADDR_VECT( scope, inst, reg, index ) \ | |
81 | ( (inst) + REG_RD_ADDR_##scope##_##reg + \ | |
82 | (index) * STRIDE_##scope##_##reg ) | |
83 | #endif | |
84 | ||
85 | /* C-code for register scope pinmux */ | |
86 | ||
87 | /* Register rw_pa, scope pinmux, type rw */ | |
88 | typedef struct { | |
89 | unsigned int pa0 : 1; | |
90 | unsigned int pa1 : 1; | |
91 | unsigned int pa2 : 1; | |
92 | unsigned int pa3 : 1; | |
93 | unsigned int pa4 : 1; | |
94 | unsigned int pa5 : 1; | |
95 | unsigned int pa6 : 1; | |
96 | unsigned int pa7 : 1; | |
97 | unsigned int csp2_n : 1; | |
98 | unsigned int csp3_n : 1; | |
99 | unsigned int csp5_n : 1; | |
100 | unsigned int csp6_n : 1; | |
101 | unsigned int hsh4 : 1; | |
102 | unsigned int hsh5 : 1; | |
103 | unsigned int hsh6 : 1; | |
104 | unsigned int hsh7 : 1; | |
105 | unsigned int dummy1 : 16; | |
106 | } reg_pinmux_rw_pa; | |
107 | #define REG_RD_ADDR_pinmux_rw_pa 0 | |
108 | #define REG_WR_ADDR_pinmux_rw_pa 0 | |
109 | ||
110 | /* Register rw_hwprot, scope pinmux, type rw */ | |
111 | typedef struct { | |
112 | unsigned int ser1 : 1; | |
113 | unsigned int ser2 : 1; | |
114 | unsigned int ser3 : 1; | |
115 | unsigned int sser0 : 1; | |
116 | unsigned int sser1 : 1; | |
117 | unsigned int ata0 : 1; | |
118 | unsigned int ata1 : 1; | |
119 | unsigned int ata2 : 1; | |
120 | unsigned int ata3 : 1; | |
121 | unsigned int ata : 1; | |
122 | unsigned int eth1 : 1; | |
123 | unsigned int eth1_mgm : 1; | |
124 | unsigned int timer : 1; | |
125 | unsigned int p21 : 1; | |
126 | unsigned int dummy1 : 18; | |
127 | } reg_pinmux_rw_hwprot; | |
128 | #define REG_RD_ADDR_pinmux_rw_hwprot 4 | |
129 | #define REG_WR_ADDR_pinmux_rw_hwprot 4 | |
130 | ||
131 | /* Register rw_pb_gio, scope pinmux, type rw */ | |
132 | typedef struct { | |
133 | unsigned int pb0 : 1; | |
134 | unsigned int pb1 : 1; | |
135 | unsigned int pb2 : 1; | |
136 | unsigned int pb3 : 1; | |
137 | unsigned int pb4 : 1; | |
138 | unsigned int pb5 : 1; | |
139 | unsigned int pb6 : 1; | |
140 | unsigned int pb7 : 1; | |
141 | unsigned int pb8 : 1; | |
142 | unsigned int pb9 : 1; | |
143 | unsigned int pb10 : 1; | |
144 | unsigned int pb11 : 1; | |
145 | unsigned int pb12 : 1; | |
146 | unsigned int pb13 : 1; | |
147 | unsigned int pb14 : 1; | |
148 | unsigned int pb15 : 1; | |
149 | unsigned int pb16 : 1; | |
150 | unsigned int pb17 : 1; | |
151 | unsigned int dummy1 : 14; | |
152 | } reg_pinmux_rw_pb_gio; | |
153 | #define REG_RD_ADDR_pinmux_rw_pb_gio 8 | |
154 | #define REG_WR_ADDR_pinmux_rw_pb_gio 8 | |
155 | ||
156 | /* Register rw_pb_iop, scope pinmux, type rw */ | |
157 | typedef struct { | |
158 | unsigned int pb0 : 1; | |
159 | unsigned int pb1 : 1; | |
160 | unsigned int pb2 : 1; | |
161 | unsigned int pb3 : 1; | |
162 | unsigned int pb4 : 1; | |
163 | unsigned int pb5 : 1; | |
164 | unsigned int pb6 : 1; | |
165 | unsigned int pb7 : 1; | |
166 | unsigned int pb8 : 1; | |
167 | unsigned int pb9 : 1; | |
168 | unsigned int pb10 : 1; | |
169 | unsigned int pb11 : 1; | |
170 | unsigned int pb12 : 1; | |
171 | unsigned int pb13 : 1; | |
172 | unsigned int pb14 : 1; | |
173 | unsigned int pb15 : 1; | |
174 | unsigned int pb16 : 1; | |
175 | unsigned int pb17 : 1; | |
176 | unsigned int dummy1 : 14; | |
177 | } reg_pinmux_rw_pb_iop; | |
178 | #define REG_RD_ADDR_pinmux_rw_pb_iop 12 | |
179 | #define REG_WR_ADDR_pinmux_rw_pb_iop 12 | |
180 | ||
181 | /* Register rw_pc_gio, scope pinmux, type rw */ | |
182 | typedef struct { | |
183 | unsigned int pc0 : 1; | |
184 | unsigned int pc1 : 1; | |
185 | unsigned int pc2 : 1; | |
186 | unsigned int pc3 : 1; | |
187 | unsigned int pc4 : 1; | |
188 | unsigned int pc5 : 1; | |
189 | unsigned int pc6 : 1; | |
190 | unsigned int pc7 : 1; | |
191 | unsigned int pc8 : 1; | |
192 | unsigned int pc9 : 1; | |
193 | unsigned int pc10 : 1; | |
194 | unsigned int pc11 : 1; | |
195 | unsigned int pc12 : 1; | |
196 | unsigned int pc13 : 1; | |
197 | unsigned int pc14 : 1; | |
198 | unsigned int pc15 : 1; | |
199 | unsigned int pc16 : 1; | |
200 | unsigned int pc17 : 1; | |
201 | unsigned int dummy1 : 14; | |
202 | } reg_pinmux_rw_pc_gio; | |
203 | #define REG_RD_ADDR_pinmux_rw_pc_gio 16 | |
204 | #define REG_WR_ADDR_pinmux_rw_pc_gio 16 | |
205 | ||
206 | /* Register rw_pc_iop, scope pinmux, type rw */ | |
207 | typedef struct { | |
208 | unsigned int pc0 : 1; | |
209 | unsigned int pc1 : 1; | |
210 | unsigned int pc2 : 1; | |
211 | unsigned int pc3 : 1; | |
212 | unsigned int pc4 : 1; | |
213 | unsigned int pc5 : 1; | |
214 | unsigned int pc6 : 1; | |
215 | unsigned int pc7 : 1; | |
216 | unsigned int pc8 : 1; | |
217 | unsigned int pc9 : 1; | |
218 | unsigned int pc10 : 1; | |
219 | unsigned int pc11 : 1; | |
220 | unsigned int pc12 : 1; | |
221 | unsigned int pc13 : 1; | |
222 | unsigned int pc14 : 1; | |
223 | unsigned int pc15 : 1; | |
224 | unsigned int pc16 : 1; | |
225 | unsigned int pc17 : 1; | |
226 | unsigned int dummy1 : 14; | |
227 | } reg_pinmux_rw_pc_iop; | |
228 | #define REG_RD_ADDR_pinmux_rw_pc_iop 20 | |
229 | #define REG_WR_ADDR_pinmux_rw_pc_iop 20 | |
230 | ||
231 | /* Register rw_pd_gio, scope pinmux, type rw */ | |
232 | typedef struct { | |
233 | unsigned int pd0 : 1; | |
234 | unsigned int pd1 : 1; | |
235 | unsigned int pd2 : 1; | |
236 | unsigned int pd3 : 1; | |
237 | unsigned int pd4 : 1; | |
238 | unsigned int pd5 : 1; | |
239 | unsigned int pd6 : 1; | |
240 | unsigned int pd7 : 1; | |
241 | unsigned int pd8 : 1; | |
242 | unsigned int pd9 : 1; | |
243 | unsigned int pd10 : 1; | |
244 | unsigned int pd11 : 1; | |
245 | unsigned int pd12 : 1; | |
246 | unsigned int pd13 : 1; | |
247 | unsigned int pd14 : 1; | |
248 | unsigned int pd15 : 1; | |
249 | unsigned int pd16 : 1; | |
250 | unsigned int pd17 : 1; | |
251 | unsigned int dummy1 : 14; | |
252 | } reg_pinmux_rw_pd_gio; | |
253 | #define REG_RD_ADDR_pinmux_rw_pd_gio 24 | |
254 | #define REG_WR_ADDR_pinmux_rw_pd_gio 24 | |
255 | ||
256 | /* Register rw_pd_iop, scope pinmux, type rw */ | |
257 | typedef struct { | |
258 | unsigned int pd0 : 1; | |
259 | unsigned int pd1 : 1; | |
260 | unsigned int pd2 : 1; | |
261 | unsigned int pd3 : 1; | |
262 | unsigned int pd4 : 1; | |
263 | unsigned int pd5 : 1; | |
264 | unsigned int pd6 : 1; | |
265 | unsigned int pd7 : 1; | |
266 | unsigned int pd8 : 1; | |
267 | unsigned int pd9 : 1; | |
268 | unsigned int pd10 : 1; | |
269 | unsigned int pd11 : 1; | |
270 | unsigned int pd12 : 1; | |
271 | unsigned int pd13 : 1; | |
272 | unsigned int pd14 : 1; | |
273 | unsigned int pd15 : 1; | |
274 | unsigned int pd16 : 1; | |
275 | unsigned int pd17 : 1; | |
276 | unsigned int dummy1 : 14; | |
277 | } reg_pinmux_rw_pd_iop; | |
278 | #define REG_RD_ADDR_pinmux_rw_pd_iop 28 | |
279 | #define REG_WR_ADDR_pinmux_rw_pd_iop 28 | |
280 | ||
281 | /* Register rw_pe_gio, scope pinmux, type rw */ | |
282 | typedef struct { | |
283 | unsigned int pe0 : 1; | |
284 | unsigned int pe1 : 1; | |
285 | unsigned int pe2 : 1; | |
286 | unsigned int pe3 : 1; | |
287 | unsigned int pe4 : 1; | |
288 | unsigned int pe5 : 1; | |
289 | unsigned int pe6 : 1; | |
290 | unsigned int pe7 : 1; | |
291 | unsigned int pe8 : 1; | |
292 | unsigned int pe9 : 1; | |
293 | unsigned int pe10 : 1; | |
294 | unsigned int pe11 : 1; | |
295 | unsigned int pe12 : 1; | |
296 | unsigned int pe13 : 1; | |
297 | unsigned int pe14 : 1; | |
298 | unsigned int pe15 : 1; | |
299 | unsigned int pe16 : 1; | |
300 | unsigned int pe17 : 1; | |
301 | unsigned int dummy1 : 14; | |
302 | } reg_pinmux_rw_pe_gio; | |
303 | #define REG_RD_ADDR_pinmux_rw_pe_gio 32 | |
304 | #define REG_WR_ADDR_pinmux_rw_pe_gio 32 | |
305 | ||
306 | /* Register rw_pe_iop, scope pinmux, type rw */ | |
307 | typedef struct { | |
308 | unsigned int pe0 : 1; | |
309 | unsigned int pe1 : 1; | |
310 | unsigned int pe2 : 1; | |
311 | unsigned int pe3 : 1; | |
312 | unsigned int pe4 : 1; | |
313 | unsigned int pe5 : 1; | |
314 | unsigned int pe6 : 1; | |
315 | unsigned int pe7 : 1; | |
316 | unsigned int pe8 : 1; | |
317 | unsigned int pe9 : 1; | |
318 | unsigned int pe10 : 1; | |
319 | unsigned int pe11 : 1; | |
320 | unsigned int pe12 : 1; | |
321 | unsigned int pe13 : 1; | |
322 | unsigned int pe14 : 1; | |
323 | unsigned int pe15 : 1; | |
324 | unsigned int pe16 : 1; | |
325 | unsigned int pe17 : 1; | |
326 | unsigned int dummy1 : 14; | |
327 | } reg_pinmux_rw_pe_iop; | |
328 | #define REG_RD_ADDR_pinmux_rw_pe_iop 36 | |
329 | #define REG_WR_ADDR_pinmux_rw_pe_iop 36 | |
330 | ||
331 | /* Register rw_usb_phy, scope pinmux, type rw */ | |
332 | typedef struct { | |
333 | unsigned int en_usb0 : 1; | |
334 | unsigned int en_usb1 : 1; | |
335 | unsigned int dummy1 : 30; | |
336 | } reg_pinmux_rw_usb_phy; | |
337 | #define REG_RD_ADDR_pinmux_rw_usb_phy 40 | |
338 | #define REG_WR_ADDR_pinmux_rw_usb_phy 40 | |
339 | ||
340 | ||
341 | /* Constants */ | |
342 | enum { | |
343 | regk_pinmux_no = 0x00000000, | |
344 | regk_pinmux_rw_hwprot_default = 0x00000000, | |
345 | regk_pinmux_rw_pa_default = 0x00000000, | |
346 | regk_pinmux_rw_pb_gio_default = 0x00000000, | |
347 | regk_pinmux_rw_pb_iop_default = 0x00000000, | |
348 | regk_pinmux_rw_pc_gio_default = 0x00000000, | |
349 | regk_pinmux_rw_pc_iop_default = 0x00000000, | |
350 | regk_pinmux_rw_pd_gio_default = 0x00000000, | |
351 | regk_pinmux_rw_pd_iop_default = 0x00000000, | |
352 | regk_pinmux_rw_pe_gio_default = 0x00000000, | |
353 | regk_pinmux_rw_pe_iop_default = 0x00000000, | |
354 | regk_pinmux_rw_usb_phy_default = 0x00000000, | |
355 | regk_pinmux_yes = 0x00000001 | |
356 | }; | |
357 | #endif /* __pinmux_defs_h */ |