mm: rcu-protected get_mm_exe_file()
[linux-2.6-block.git] / drivers / watchdog / max63xx_wdt.c
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1/*
2 * drivers/char/watchdog/max63xx_wdt.c
3 *
4 * Driver for max63{69,70,71,72,73,74} watchdog timers
5 *
6 * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * This driver assumes the watchdog pins are memory mapped (as it is
13 * the case for the Arcom Zeus). Should it be connected over GPIOs or
14 * another interface, some abstraction will have to be introduced.
15 */
16
4c271bb6 17#include <linux/err.h>
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18#include <linux/module.h>
19#include <linux/moduleparam.h>
20#include <linux/types.h>
21#include <linux/kernel.h>
66aaa7a5 22#include <linux/watchdog.h>
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23#include <linux/bitops.h>
24#include <linux/platform_device.h>
25#include <linux/spinlock.h>
66aaa7a5 26#include <linux/io.h>
5a0e3ad6 27#include <linux/slab.h>
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28
29#define DEFAULT_HEARTBEAT 60
30#define MAX_HEARTBEAT 60
31
a0f36833 32static unsigned int heartbeat = DEFAULT_HEARTBEAT;
86a1e189 33static bool nowayout = WATCHDOG_NOWAYOUT;
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34
35/*
36 * Memory mapping: a single byte, 3 first lower bits to select bit 3
37 * to ping the watchdog.
38 */
39#define MAX6369_WDSET (7 << 0)
5f3b2756 40#define MAX6369_WDI (1 << 3)
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41
42static DEFINE_SPINLOCK(io_lock);
43
66aaa7a5 44static int nodelay;
66aaa7a5 45static void __iomem *wdt_base;
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46
47/*
48 * The timeout values used are actually the absolute minimum the chip
49 * offers. Typical values on my board are slightly over twice as long
50 * (10s setting ends up with a 25s timeout), and can be up to 3 times
51 * the nominal setting (according to the datasheet). So please take
52 * these values with a grain of salt. Same goes for the initial delay
53 * "feature". Only max6373/74 have a few settings without this initial
54 * delay (selected with the "nodelay" parameter).
55 *
56 * I also decided to remove from the tables any timeout smaller than a
57 * second, as it looked completly overkill...
58 */
59
60/* Timeouts in second */
61struct max63xx_timeout {
62 u8 wdset;
63 u8 tdelay;
64 u8 twd;
65};
66
67static struct max63xx_timeout max6369_table[] = {
68 { 5, 1, 1 },
69 { 6, 10, 10 },
70 { 7, 60, 60 },
71 { },
72};
73
74static struct max63xx_timeout max6371_table[] = {
75 { 6, 60, 3 },
76 { 7, 60, 60 },
77 { },
78};
79
80static struct max63xx_timeout max6373_table[] = {
81 { 2, 60, 1 },
82 { 5, 0, 1 },
83 { 1, 3, 3 },
84 { 7, 60, 10 },
85 { 6, 0, 10 },
86 { },
87};
88
89static struct max63xx_timeout *current_timeout;
90
91static struct max63xx_timeout *
92max63xx_select_timeout(struct max63xx_timeout *table, int value)
93{
94 while (table->twd) {
95 if (value <= table->twd) {
96 if (nodelay && table->tdelay == 0)
97 return table;
98
99 if (!nodelay)
100 return table;
101 }
102
103 table++;
104 }
105
106 return NULL;
107}
108
a0f36833 109static int max63xx_wdt_ping(struct watchdog_device *wdd)
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110{
111 u8 val;
112
113 spin_lock(&io_lock);
114
115 val = __raw_readb(wdt_base);
116
117 __raw_writeb(val | MAX6369_WDI, wdt_base);
118 __raw_writeb(val & ~MAX6369_WDI, wdt_base);
119
120 spin_unlock(&io_lock);
a0f36833 121 return 0;
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122}
123
a0f36833 124static int max63xx_wdt_start(struct watchdog_device *wdd)
66aaa7a5 125{
a0f36833 126 struct max63xx_timeout *entry = watchdog_get_drvdata(wdd);
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127 u8 val;
128
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129 spin_lock(&io_lock);
130
131 val = __raw_readb(wdt_base);
132 val &= ~MAX6369_WDSET;
133 val |= entry->wdset;
134 __raw_writeb(val, wdt_base);
135
136 spin_unlock(&io_lock);
137
138 /* check for a edge triggered startup */
139 if (entry->tdelay == 0)
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140 max63xx_wdt_ping(wdd);
141 return 0;
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142}
143
a0f36833 144static int max63xx_wdt_stop(struct watchdog_device *wdd)
66aaa7a5 145{
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146 u8 val;
147
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148 spin_lock(&io_lock);
149
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150 val = __raw_readb(wdt_base);
151 val &= ~MAX6369_WDSET;
152 val |= 3;
153 __raw_writeb(val, wdt_base);
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154
155 spin_unlock(&io_lock);
a0f36833 156 return 0;
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157}
158
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159static const struct watchdog_info max63xx_wdt_info = {
160 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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161 .identity = "max63xx Watchdog",
162};
163
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164static const struct watchdog_ops max63xx_wdt_ops = {
165 .owner = THIS_MODULE,
166 .start = max63xx_wdt_start,
167 .stop = max63xx_wdt_stop,
168 .ping = max63xx_wdt_ping,
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169};
170
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171static struct watchdog_device max63xx_wdt_dev = {
172 .info = &max63xx_wdt_info,
173 .ops = &max63xx_wdt_ops,
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174};
175
2d991a16 176static int max63xx_wdt_probe(struct platform_device *pdev)
66aaa7a5 177{
a0f36833 178 struct resource *wdt_mem;
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179 struct max63xx_timeout *table;
180
181 table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
182
183 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
184 heartbeat = DEFAULT_HEARTBEAT;
185
a0f36833 186 dev_info(&pdev->dev, "requesting %ds heartbeat\n", heartbeat);
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187 current_timeout = max63xx_select_timeout(table, heartbeat);
188
189 if (!current_timeout) {
a0f36833 190 dev_err(&pdev->dev, "unable to satisfy heartbeat request\n");
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191 return -EINVAL;
192 }
193
a0f36833 194 dev_info(&pdev->dev, "using %ds heartbeat with %ds initial delay\n",
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195 current_timeout->twd, current_timeout->tdelay);
196
197 heartbeat = current_timeout->twd;
198
f712eacf 199 wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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200 wdt_base = devm_ioremap_resource(&pdev->dev, wdt_mem);
201 if (IS_ERR(wdt_base))
202 return PTR_ERR(wdt_base);
66aaa7a5 203
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204 max63xx_wdt_dev.timeout = heartbeat;
205 watchdog_set_nowayout(&max63xx_wdt_dev, nowayout);
206 watchdog_set_drvdata(&max63xx_wdt_dev, current_timeout);
66aaa7a5 207
a0f36833 208 return watchdog_register_device(&max63xx_wdt_dev);
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209}
210
4b12b896 211static int max63xx_wdt_remove(struct platform_device *pdev)
66aaa7a5 212{
a0f36833 213 watchdog_unregister_device(&max63xx_wdt_dev);
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214 return 0;
215}
216
217static struct platform_device_id max63xx_id_table[] = {
218 { "max6369_wdt", (kernel_ulong_t)max6369_table, },
219 { "max6370_wdt", (kernel_ulong_t)max6369_table, },
220 { "max6371_wdt", (kernel_ulong_t)max6371_table, },
221 { "max6372_wdt", (kernel_ulong_t)max6371_table, },
222 { "max6373_wdt", (kernel_ulong_t)max6373_table, },
223 { "max6374_wdt", (kernel_ulong_t)max6373_table, },
224 { },
225};
226MODULE_DEVICE_TABLE(platform, max63xx_id_table);
227
228static struct platform_driver max63xx_wdt_driver = {
229 .probe = max63xx_wdt_probe,
82268714 230 .remove = max63xx_wdt_remove,
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231 .id_table = max63xx_id_table,
232 .driver = {
233 .name = "max63xx_wdt",
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234 },
235};
236
b8ec6118 237module_platform_driver(max63xx_wdt_driver);
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238
239MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
240MODULE_DESCRIPTION("max63xx Watchdog Driver");
241
242module_param(heartbeat, int, 0);
243MODULE_PARM_DESC(heartbeat,
244 "Watchdog heartbeat period in seconds from 1 to "
245 __MODULE_STRING(MAX_HEARTBEAT) ", default "
246 __MODULE_STRING(DEFAULT_HEARTBEAT));
247
86a1e189 248module_param(nowayout, bool, 0);
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249MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
250 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
251
252module_param(nodelay, int, 0);
253MODULE_PARM_DESC(nodelay,
254 "Force selection of a timeout setting without initial delay "
255 "(max6373/74 only, default=0)");
256
257MODULE_LICENSE("GPL");