USB: xhci: Wait for host to start running.
[linux-2.6-block.git] / drivers / usb / host / xhci-pci.c
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1/*
2 * xHCI host controller driver PCI Bus Glue.
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/pci.h>
24
25#include "xhci.h"
26
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27/* Device for a quirk */
28#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
29#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
30
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31static const char hcd_name[] = "xhci_hcd";
32
33/* called after powerup, by probe or system-pm "wakeup" */
34static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
35{
36 /*
37 * TODO: Implement finding debug ports later.
38 * TODO: see if there are any quirks that need to be added to handle
39 * new extended capabilities.
40 */
41
42 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
43 if (!pci_set_mwi(pdev))
44 xhci_dbg(xhci, "MWI active\n");
45
46 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
47 return 0;
48}
49
50/* called during probe() after chip reset completes */
51static int xhci_pci_setup(struct usb_hcd *hcd)
52{
53 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
54 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
55 int retval;
56
bc88d2eb 57 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
4c1bd3d7 58
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59 xhci->cap_regs = hcd->regs;
60 xhci->op_regs = hcd->regs +
61 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
62 xhci->run_regs = hcd->regs +
63 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
64 /* Cache read-only capability registers */
65 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
66 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
67 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
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68 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
69 xhci->hci_version = HC_VERSION(xhci->hcc_params);
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70 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
71 xhci_print_registers(xhci);
72
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73 /* Look for vendor-specific quirks */
74 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
75 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
76 pdev->revision == 0x0) {
77 xhci->quirks |= XHCI_RESET_EP_QUIRK;
78 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
79 " endpoint cmd after reset endpoint\n");
80 }
81
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82 /* Make sure the HC is halted. */
83 retval = xhci_halt(xhci);
84 if (retval)
85 return retval;
86
87 xhci_dbg(xhci, "Resetting HCD\n");
88 /* Reset the internal HC memory state and registers. */
89 retval = xhci_reset(xhci);
90 if (retval)
91 return retval;
92 xhci_dbg(xhci, "Reset complete\n");
93
94 xhci_dbg(xhci, "Calling HCD init\n");
95 /* Initialize HCD and host controller data structures. */
96 retval = xhci_init(hcd);
97 if (retval)
98 return retval;
99 xhci_dbg(xhci, "Called HCD init\n");
100
101 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
102 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
103
104 /* Find any debug ports */
105 return xhci_pci_reinit(xhci, pdev);
106}
107
108static const struct hc_driver xhci_pci_hc_driver = {
109 .description = hcd_name,
110 .product_desc = "xHCI Host Controller",
111 .hcd_priv_size = sizeof(struct xhci_hcd),
112
113 /*
114 * generic hardware linkage
115 */
7f84eef0 116 .irq = xhci_irq,
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117 .flags = HCD_MEMORY | HCD_USB3,
118
119 /*
120 * basic lifecycle operations
121 */
122 .reset = xhci_pci_setup,
123 .start = xhci_run,
124 /* suspend and resume implemented later */
125 .stop = xhci_stop,
126 .shutdown = xhci_shutdown,
127
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128 /*
129 * managing i/o requests and associated device resources
130 */
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131 .urb_enqueue = xhci_urb_enqueue,
132 .urb_dequeue = xhci_urb_dequeue,
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133 .alloc_dev = xhci_alloc_dev,
134 .free_dev = xhci_free_dev,
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135 .alloc_streams = xhci_alloc_streams,
136 .free_streams = xhci_free_streams,
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137 .add_endpoint = xhci_add_endpoint,
138 .drop_endpoint = xhci_drop_endpoint,
a1587d97 139 .endpoint_reset = xhci_endpoint_reset,
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140 .check_bandwidth = xhci_check_bandwidth,
141 .reset_bandwidth = xhci_reset_bandwidth,
3ffbba95 142 .address_device = xhci_address_device,
b356b7c7 143 .update_hub_device = xhci_update_hub_device,
a5f0efab 144 .reset_device = xhci_reset_device,
3ffbba95 145
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146 /*
147 * scheduling support
148 */
149 .get_frame_number = xhci_get_frame,
150
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151 /* Root hub support */
152 .hub_control = xhci_hub_control,
153 .hub_status_data = xhci_hub_status_data,
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154};
155
156/*-------------------------------------------------------------------------*/
157
158/* PCI driver selection metadata; PCI hotplugging uses this */
159static const struct pci_device_id pci_ids[] = { {
160 /* handle any USB 3.0 xHCI controller */
161 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
162 .driver_data = (unsigned long) &xhci_pci_hc_driver,
163 },
164 { /* end: all zeroes */ }
165};
166MODULE_DEVICE_TABLE(pci, pci_ids);
167
168/* pci driver glue; this is a "new style" PCI driver module */
169static struct pci_driver xhci_pci_driver = {
170 .name = (char *) hcd_name,
171 .id_table = pci_ids,
172
173 .probe = usb_hcd_pci_probe,
174 .remove = usb_hcd_pci_remove,
175 /* suspend and resume implemented later */
176
177 .shutdown = usb_hcd_pci_shutdown,
178};
179
326b4810 180int xhci_register_pci(void)
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181{
182 return pci_register_driver(&xhci_pci_driver);
183}
184
326b4810 185void xhci_unregister_pci(void)
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186{
187 pci_unregister_driver(&xhci_pci_driver);
188}