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usb: at91_udc: linux/prefetch.h included twice
[linux-2.6-block.git] / drivers / usb / gadget / fsl_qe_udc.c
CommitLineData
3948f0e0
LY		 1/*
2 * driver/usb/gadget/fsl_qe_udc.c
3 *
4 * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
5 *
6 * Xie Xiaobo <X.Xie@freescale.com>
7 * Li Yang <leoli@freescale.com>
8 * Based on bareboard code from Shlomi Gridish.
9 *
10 * Description:
11 * Freescle QE/CPM USB Pheripheral Controller Driver
12 * The controller can be found on MPC8360, MPC8272, and etc.
13 * MPC8360 Rev 1.1 may need QE mircocode update
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20
21#undef USB_TRACE
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <linux/ioport.h>
27#include <linux/types.h>
28#include <linux/errno.h>
cd40c4c4 29#include <linux/err.h>
3948f0e0
LY		 30#include <linux/slab.h>
31#include <linux/list.h>
32#include <linux/interrupt.h>
33#include <linux/io.h>
34#include <linux/moduleparam.h>
22ae782f 35#include <linux/of_address.h>
3948f0e0
LY		 36#include <linux/of_platform.h>
37#include <linux/dma-mapping.h>
38#include <linux/usb/ch9.h>
39#include <linux/usb/gadget.h>
40#include <linux/usb/otg.h>
41#include <asm/qe.h>
42#include <asm/cpm.h>
43#include <asm/dma.h>
44#include <asm/reg.h>
45#include "fsl_qe_udc.h"
46
47#define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
48#define DRIVER_AUTHOR "Xie XiaoBo"
49#define DRIVER_VERSION "1.0"
50
51#define DMA_ADDR_INVALID (~(dma_addr_t)0)
52
53static const char driver_name[] = "fsl_qe_udc";
54static const char driver_desc[] = DRIVER_DESC;
55
56/*ep name is important in gadget, it should obey the convention of ep_match()*/
57static const char *const ep_name[] = {
58 "ep0-control", /* everyone has ep0 */
59 /* 3 configurable endpoints */
60 "ep1",
61 "ep2",
62 "ep3",
63};
64
65static struct usb_endpoint_descriptor qe_ep0_desc = {
66 .bLength = USB_DT_ENDPOINT_SIZE,
67 .bDescriptorType = USB_DT_ENDPOINT,
68
69 .bEndpointAddress = 0,
70 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
71 .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
72};
73
74/* it is initialized in probe() */
75static struct qe_udc *udc_controller;
76
77/********************************************************************
78 * Internal Used Function Start
79********************************************************************/
80/*-----------------------------------------------------------------
81 * done() - retire a request; caller blocked irqs
82 *--------------------------------------------------------------*/
83static void done(struct qe_ep *ep, struct qe_req *req, int status)
84{
85 struct qe_udc *udc = ep->udc;
86 unsigned char stopped = ep->stopped;
87
88 /* the req->queue pointer is used by ep_queue() func, in which
89 * the request will be added into a udc_ep->queue 'd tail
90 * so here the req will be dropped from the ep->queue
91 */
92 list_del_init(&req->queue);
93
94 /* req.status should be set as -EINPROGRESS in ep_queue() */
95 if (req->req.status == -EINPROGRESS)
96 req->req.status = status;
97 else
98 status = req->req.status;
99
100 if (req->mapped) {
101 dma_unmap_single(udc->gadget.dev.parent,
102 req->req.dma, req->req.length,
103 ep_is_in(ep)
104 ? DMA_TO_DEVICE
105 : DMA_FROM_DEVICE);
106 req->req.dma = DMA_ADDR_INVALID;
107 req->mapped = 0;
108 } else
109 dma_sync_single_for_cpu(udc->gadget.dev.parent,
110 req->req.dma, req->req.length,
111 ep_is_in(ep)
112 ? DMA_TO_DEVICE
113 : DMA_FROM_DEVICE);
114
115 if (status && (status != -ESHUTDOWN))
116 dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
117 ep->ep.name, &req->req, status,
118 req->req.actual, req->req.length);
119
120 /* don't modify queue heads during completion callback */
121 ep->stopped = 1;
122 spin_unlock(&udc->lock);
123
124 /* this complete() should a func implemented by gadget layer,
125 * eg fsg->bulk_in_complete() */
126 if (req->req.complete)
127 req->req.complete(&ep->ep, &req->req);
128
129 spin_lock(&udc->lock);
130
131 ep->stopped = stopped;
132}
133
134/*-----------------------------------------------------------------
135 * nuke(): delete all requests related to this ep
136 *--------------------------------------------------------------*/
137static void nuke(struct qe_ep *ep, int status)
138{
139 /* Whether this eq has request linked */
140 while (!list_empty(&ep->queue)) {
141 struct qe_req *req = NULL;
142 req = list_entry(ep->queue.next, struct qe_req, queue);
143
144 done(ep, req, status);
145 }
146}
147
148/*---------------------------------------------------------------------------*
149 * USB and Endpoint manipulate process, include parameter and register *
150 *---------------------------------------------------------------------------*/
151/* @value: 1--set stall 0--clean stall */
152static int qe_eprx_stall_change(struct qe_ep *ep, int value)
153{
154 u16 tem_usep;
155 u8 epnum = ep->epnum;
156 struct qe_udc *udc = ep->udc;
157
158 tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
159 tem_usep = tem_usep & ~USB_RHS_MASK;
160 if (value == 1)
161 tem_usep |= USB_RHS_STALL;
162 else if (ep->dir == USB_DIR_IN)
163 tem_usep |= USB_RHS_IGNORE_OUT;
164
165 out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
166 return 0;
167}
168
169static int qe_eptx_stall_change(struct qe_ep *ep, int value)
170{
171 u16 tem_usep;
172 u8 epnum = ep->epnum;
173 struct qe_udc *udc = ep->udc;
174
175 tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
176 tem_usep = tem_usep & ~USB_THS_MASK;
177 if (value == 1)
178 tem_usep |= USB_THS_STALL;
179 else if (ep->dir == USB_DIR_OUT)
180 tem_usep |= USB_THS_IGNORE_IN;
181
182 out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
183
184 return 0;
185}
186
187static int qe_ep0_stall(struct qe_udc *udc)
188{
189 qe_eptx_stall_change(&udc->eps[0], 1);
190 qe_eprx_stall_change(&udc->eps[0], 1);
191 udc_controller->ep0_state = WAIT_FOR_SETUP;
192 udc_controller->ep0_dir = 0;
193 return 0;
194}
195
196static int qe_eprx_nack(struct qe_ep *ep)
197{
198 u8 epnum = ep->epnum;
199 struct qe_udc *udc = ep->udc;
200
201 if (ep->state == EP_STATE_IDLE) {
202 /* Set the ep's nack */
203 clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
204 USB_RHS_MASK, USB_RHS_NACK);
205
206 /* Mask Rx and Busy interrupts */
207 clrbits16(&udc->usb_regs->usb_usbmr,
208 (USB_E_RXB_MASK | USB_E_BSY_MASK));
209
210 ep->state = EP_STATE_NACK;
211 }
212 return 0;
213}
214
215static int qe_eprx_normal(struct qe_ep *ep)
216{
217 struct qe_udc *udc = ep->udc;
218
219 if (ep->state == EP_STATE_NACK) {
220 clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
221 USB_RTHS_MASK, USB_THS_IGNORE_IN);
222
223 /* Unmask RX interrupts */
224 out_be16(&udc->usb_regs->usb_usber,
225 USB_E_BSY_MASK | USB_E_RXB_MASK);
226 setbits16(&udc->usb_regs->usb_usbmr,
227 (USB_E_RXB_MASK | USB_E_BSY_MASK));
228
229 ep->state = EP_STATE_IDLE;
230 ep->has_data = 0;
231 }
232
233 return 0;
234}
235
236static int qe_ep_cmd_stoptx(struct qe_ep *ep)
237{
238 if (ep->udc->soc_type == PORT_CPM)
239 cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
240 CPM_USB_STOP_TX_OPCODE);
241 else
242 qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
243 ep->epnum, 0);
244
245 return 0;
246}
247
248static int qe_ep_cmd_restarttx(struct qe_ep *ep)
249{
250 if (ep->udc->soc_type == PORT_CPM)
251 cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
252 CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
253 else
254 qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
255 ep->epnum, 0);
256
257 return 0;
258}
259
260static int qe_ep_flushtxfifo(struct qe_ep *ep)
261{
262 struct qe_udc *udc = ep->udc;
263 int i;
264
265 i = (int)ep->epnum;
266
267 qe_ep_cmd_stoptx(ep);
268 out_8(&udc->usb_regs->usb_uscom,
269 USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
270 out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
271 out_be32(&udc->ep_param[i]->tstate, 0);
272 out_be16(&udc->ep_param[i]->tbcnt, 0);
273
274 ep->c_txbd = ep->txbase;
275 ep->n_txbd = ep->txbase;
276 qe_ep_cmd_restarttx(ep);
277 return 0;
278}
279
280static int qe_ep_filltxfifo(struct qe_ep *ep)
281{
282 struct qe_udc *udc = ep->udc;
283
284 out_8(&udc->usb_regs->usb_uscom,
285 USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
286 return 0;
287}
288
289static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
290{
291 struct qe_ep *ep;
292 u32 bdring_len;
293 struct qe_bd __iomem *bd;
294 int i;
295
296 ep = &udc->eps[pipe_num];
297
298 if (ep->dir == USB_DIR_OUT)
299 bdring_len = USB_BDRING_LEN_RX;
300 else
301 bdring_len = USB_BDRING_LEN;
302
303 bd = ep->rxbase;
304 for (i = 0; i < (bdring_len - 1); i++) {
305 out_be32((u32 __iomem *)bd, R_E | R_I);
306 bd++;
307 }
308 out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
309
310 bd = ep->txbase;
311 for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
312 out_be32(&bd->buf, 0);
313 out_be32((u32 __iomem *)bd, 0);
314 bd++;
315 }
316 out_be32((u32 __iomem *)bd, T_W);
317
318 return 0;
319}
320
321static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
322{
323 struct qe_ep *ep;
324 u16 tmpusep;
325
326 ep = &udc->eps[pipe_num];
327 tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
328 tmpusep &= ~USB_RTHS_MASK;
329
330 switch (ep->dir) {
331 case USB_DIR_BOTH:
332 qe_ep_flushtxfifo(ep);
333 break;
334 case USB_DIR_OUT:
335 tmpusep |= USB_THS_IGNORE_IN;
336 break;
337 case USB_DIR_IN:
338 qe_ep_flushtxfifo(ep);
339 tmpusep |= USB_RHS_IGNORE_OUT;
340 break;
341 default:
342 break;
343 }
344 out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
345
346 qe_epbds_reset(udc, pipe_num);
347
348 return 0;
349}
350
351static int qe_ep_toggledata01(struct qe_ep *ep)
352{
353 ep->data01 ^= 0x1;
354 return 0;
355}
356
357static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
358{
359 struct qe_ep *ep = &udc->eps[pipe_num];
360 unsigned long tmp_addr = 0;
361 struct usb_ep_para __iomem *epparam;
362 int i;
363 struct qe_bd __iomem *bd;
364 int bdring_len;
365
366 if (ep->dir == USB_DIR_OUT)
367 bdring_len = USB_BDRING_LEN_RX;
368 else
369 bdring_len = USB_BDRING_LEN;
370
371 epparam = udc->ep_param[pipe_num];
372 /* alloc multi-ram for BD rings and set the ep parameters */
373 tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
374 USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
cd40c4c4
AV		 375 if (IS_ERR_VALUE(tmp_addr))
376 return -ENOMEM;
377
3948f0e0
LY		 378 out_be16(&epparam->rbase, (u16)tmp_addr);
379 out_be16(&epparam->tbase, (u16)(tmp_addr +
380 (sizeof(struct qe_bd) * bdring_len)));
381
382 out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
383 out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
384
385 ep->rxbase = cpm_muram_addr(tmp_addr);
386 ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
387 * bdring_len));
388 ep->n_rxbd = ep->rxbase;
389 ep->e_rxbd = ep->rxbase;
390 ep->n_txbd = ep->txbase;
391 ep->c_txbd = ep->txbase;
392 ep->data01 = 0; /* data0 */
393
394 /* Init TX and RX bds */
395 bd = ep->rxbase;
396 for (i = 0; i < bdring_len - 1; i++) {
397 out_be32(&bd->buf, 0);
398 out_be32((u32 __iomem *)bd, 0);
399 bd++;
400 }
401 out_be32(&bd->buf, 0);
402 out_be32((u32 __iomem *)bd, R_W);
403
404 bd = ep->txbase;
405 for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
406 out_be32(&bd->buf, 0);
407 out_be32((u32 __iomem *)bd, 0);
408 bd++;
409 }
410 out_be32(&bd->buf, 0);
411 out_be32((u32 __iomem *)bd, T_W);
412
413 return 0;
414}
415
416static int qe_ep_rxbd_update(struct qe_ep *ep)
417{
418 unsigned int size;
419 int i;
420 unsigned int tmp;
421 struct qe_bd __iomem *bd;
422 unsigned int bdring_len;
423
424 if (ep->rxbase == NULL)
425 return -EINVAL;
426
427 bd = ep->rxbase;
428
429 ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
430 if (ep->rxframe == NULL) {
431 dev_err(ep->udc->dev, "malloc rxframe failed\n");
432 return -ENOMEM;
433 }
434
435 qe_frame_init(ep->rxframe);
436
437 if (ep->dir == USB_DIR_OUT)
438 bdring_len = USB_BDRING_LEN_RX;
439 else
440 bdring_len = USB_BDRING_LEN;
441
442 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
443 ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
444 if (ep->rxbuffer == NULL) {
445 dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
446 size);
447 kfree(ep->rxframe);
448 return -ENOMEM;
449 }
450
451 ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
452 if (ep->rxbuf_d == DMA_ADDR_INVALID) {
453 ep->rxbuf_d = dma_map_single(udc_controller->gadget.dev.parent,
454 ep->rxbuffer,
455 size,
456 DMA_FROM_DEVICE);
457 ep->rxbufmap = 1;
458 } else {
459 dma_sync_single_for_device(udc_controller->gadget.dev.parent,
460 ep->rxbuf_d, size,
461 DMA_FROM_DEVICE);
462 ep->rxbufmap = 0;
463 }
464
465 size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
466 tmp = ep->rxbuf_d;
467 tmp = (u32)(((tmp >> 2) << 2) + 4);
468
469 for (i = 0; i < bdring_len - 1; i++) {
470 out_be32(&bd->buf, tmp);
471 out_be32((u32 __iomem *)bd, (R_E | R_I));
472 tmp = tmp + size;
473 bd++;
474 }
475 out_be32(&bd->buf, tmp);
476 out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
477
478 return 0;
479}
480
481static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
482{
483 struct qe_ep *ep = &udc->eps[pipe_num];
484 struct usb_ep_para __iomem *epparam;
485 u16 usep, logepnum;
486 u16 tmp;
487 u8 rtfcr = 0;
488
489 epparam = udc->ep_param[pipe_num];
490
491 usep = 0;
492 logepnum = (ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
493 usep |= (logepnum << USB_EPNUM_SHIFT);
494
495 switch (ep->desc->bmAttributes & 0x03) {
496 case USB_ENDPOINT_XFER_BULK:
497 usep |= USB_TRANS_BULK;
498 break;
499 case USB_ENDPOINT_XFER_ISOC:
500 usep |= USB_TRANS_ISO;
501 break;
502 case USB_ENDPOINT_XFER_INT:
503 usep |= USB_TRANS_INT;
504 break;
505 default:
506 usep |= USB_TRANS_CTR;
507 break;
508 }
509
510 switch (ep->dir) {
511 case USB_DIR_OUT:
512 usep |= USB_THS_IGNORE_IN;
513 break;
514 case USB_DIR_IN:
515 usep |= USB_RHS_IGNORE_OUT;
516 break;
517 default:
518 break;
519 }
520 out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
521
522 rtfcr = 0x30;
523 out_8(&epparam->rbmr, rtfcr);
524 out_8(&epparam->tbmr, rtfcr);
525
526 tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
527 /* MRBLR must be divisble by 4 */
528 tmp = (u16)(((tmp >> 2) << 2) + 4);
529 out_be16(&epparam->mrblr, tmp);
530
531 return 0;
532}
533
534static int qe_ep_init(struct qe_udc *udc,
535 unsigned char pipe_num,
536 const struct usb_endpoint_descriptor *desc)
537{
538 struct qe_ep *ep = &udc->eps[pipe_num];
539 unsigned long flags;
540 int reval = 0;
541 u16 max = 0;
542
29cc8897 543 max = usb_endpoint_maxp(desc);
3948f0e0
LY		 544
545 /* check the max package size validate for this endpoint */
546 /* Refer to USB2.0 spec table 9-13,
547 */
548 if (pipe_num != 0) {
549 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
550 case USB_ENDPOINT_XFER_BULK:
551 if (strstr(ep->ep.name, "-iso")
552 || strstr(ep->ep.name, "-int"))
553 goto en_done;
554 switch (udc->gadget.speed) {
555 case USB_SPEED_HIGH:
556 if ((max == 128) || (max == 256) || (max == 512))
557 break;
558 default:
559 switch (max) {
560 case 4:
561 case 8:
562 case 16:
563 case 32:
564 case 64:
565 break;
566 default:
567 case USB_SPEED_LOW:
568 goto en_done;
569 }
570 }
571 break;
572 case USB_ENDPOINT_XFER_INT:
573 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
574 goto en_done;
575 switch (udc->gadget.speed) {
576 case USB_SPEED_HIGH:
577 if (max <= 1024)
578 break;
579 case USB_SPEED_FULL:
580 if (max <= 64)
581 break;
582 default:
583 if (max <= 8)
584 break;
585 goto en_done;
586 }
587 break;
588 case USB_ENDPOINT_XFER_ISOC:
589 if (strstr(ep->ep.name, "-bulk")
590 || strstr(ep->ep.name, "-int"))
591 goto en_done;
592 switch (udc->gadget.speed) {
593 case USB_SPEED_HIGH:
594 if (max <= 1024)
595 break;
596 case USB_SPEED_FULL:
597 if (max <= 1023)
598 break;
599 default:
600 goto en_done;
601 }
602 break;
603 case USB_ENDPOINT_XFER_CONTROL:
604 if (strstr(ep->ep.name, "-iso")
605 || strstr(ep->ep.name, "-int"))
606 goto en_done;
607 switch (udc->gadget.speed) {
608 case USB_SPEED_HIGH:
609 case USB_SPEED_FULL:
610 switch (max) {
611 case 1:
612 case 2:
613 case 4:
614 case 8:
615 case 16:
616 case 32:
617 case 64:
618 break;
619 default:
620 goto en_done;
621 }
622 case USB_SPEED_LOW:
623 switch (max) {
624 case 1:
625 case 2:
626 case 4:
627 case 8:
628 break;
629 default:
630 goto en_done;
631 }
632 default:
633 goto en_done;
634 }
635 break;
636
637 default:
638 goto en_done;
639 }
640 } /* if ep0*/
641
642 spin_lock_irqsave(&udc->lock, flags);
643
644 /* initialize ep structure */
645 ep->ep.maxpacket = max;
646 ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
647 ep->desc = desc;
648 ep->stopped = 0;
649 ep->init = 1;
650
651 if (pipe_num == 0) {
652 ep->dir = USB_DIR_BOTH;
653 udc->ep0_dir = USB_DIR_OUT;
654 udc->ep0_state = WAIT_FOR_SETUP;
655 } else {
656 switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
657 case USB_DIR_OUT:
658 ep->dir = USB_DIR_OUT;
659 break;
660 case USB_DIR_IN:
661 ep->dir = USB_DIR_IN;
662 default:
663 break;
664 }
665 }
666
667 /* hardware special operation */
668 qe_ep_bd_init(udc, pipe_num);
669 if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
670 reval = qe_ep_rxbd_update(ep);
671 if (reval)
672 goto en_done1;
673 }
674
675 if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
676 ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
677 if (ep->txframe == NULL) {
678 dev_err(udc->dev, "malloc txframe failed\n");
679 goto en_done2;
680 }
681 qe_frame_init(ep->txframe);
682 }
683
684 qe_ep_register_init(udc, pipe_num);
685
686 /* Now HW will be NAKing transfers to that EP,
687 * until a buffer is queued to it. */
688 spin_unlock_irqrestore(&udc->lock, flags);
689
690 return 0;
691en_done2:
692 kfree(ep->rxbuffer);
693 kfree(ep->rxframe);
694en_done1:
695 spin_unlock_irqrestore(&udc->lock, flags);
696en_done:
cd40c4c4 697 dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
3948f0e0
LY		 698 return -ENODEV;
699}
700
701static inline void qe_usb_enable(void)
702{
703 setbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
704}
705
706static inline void qe_usb_disable(void)
707{
708 clrbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
709}
710
711/*----------------------------------------------------------------------------*
712 * USB and EP basic manipulate function end *
713 *----------------------------------------------------------------------------*/
714
715
716/******************************************************************************
717 UDC transmit and receive process
718 ******************************************************************************/
719static void recycle_one_rxbd(struct qe_ep *ep)
720{
721 u32 bdstatus;
722
723 bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
724 bdstatus = R_I | R_E | (bdstatus & R_W);
725 out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
726
727 if (bdstatus & R_W)
728 ep->e_rxbd = ep->rxbase;
729 else
730 ep->e_rxbd++;
731}
732
733static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
734{
735 u32 bdstatus;
736 struct qe_bd __iomem *bd, *nextbd;
737 unsigned char stop = 0;
738
739 nextbd = ep->n_rxbd;
740 bd = ep->e_rxbd;
741 bdstatus = in_be32((u32 __iomem *)bd);
742
743 while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
744 bdstatus = R_E | R_I | (bdstatus & R_W);
745 out_be32((u32 __iomem *)bd, bdstatus);
746
747 if (bdstatus & R_W)
748 bd = ep->rxbase;
749 else
750 bd++;
751
752 bdstatus = in_be32((u32 __iomem *)bd);
753 if (stopatnext && (bd == nextbd))
754 stop = 1;
755 }
756
757 ep->e_rxbd = bd;
758}
759
760static void ep_recycle_rxbds(struct qe_ep *ep)
761{
762 struct qe_bd __iomem *bd = ep->n_rxbd;
763 u32 bdstatus;
764 u8 epnum = ep->epnum;
765 struct qe_udc *udc = ep->udc;
766
767 bdstatus = in_be32((u32 __iomem *)bd);
768 if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
769 bd = ep->rxbase +
770 ((in_be16(&udc->ep_param[epnum]->rbptr) -
771 in_be16(&udc->ep_param[epnum]->rbase))
772 >> 3);
773 bdstatus = in_be32((u32 __iomem *)bd);
774
775 if (bdstatus & R_W)
776 bd = ep->rxbase;
777 else
778 bd++;
779
780 ep->e_rxbd = bd;
781 recycle_rxbds(ep, 0);
782 ep->e_rxbd = ep->n_rxbd;
783 } else
784 recycle_rxbds(ep, 1);
785
786 if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
787 out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
788
789 if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
790 qe_eprx_normal(ep);
791
792 ep->localnack = 0;
793}
794
795static void setup_received_handle(struct qe_udc *udc,
796 struct usb_ctrlrequest *setup);
797static int qe_ep_rxframe_handle(struct qe_ep *ep);
798static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
799/* when BD PID is setup, handle the packet */
800static int ep0_setup_handle(struct qe_udc *udc)
801{
802 struct qe_ep *ep = &udc->eps[0];
803 struct qe_frame *pframe;
804 unsigned int fsize;
805 u8 *cp;
806
807 pframe = ep->rxframe;
808 if ((frame_get_info(pframe) & PID_SETUP)
809 && (udc->ep0_state == WAIT_FOR_SETUP)) {
810 fsize = frame_get_length(pframe);
811 if (unlikely(fsize != 8))
812 return -EINVAL;
813 cp = (u8 *)&udc->local_setup_buff;
814 memcpy(cp, pframe->data, fsize);
815 ep->data01 = 1;
816
817 /* handle the usb command base on the usb_ctrlrequest */
818 setup_received_handle(udc, &udc->local_setup_buff);
819 return 0;
820 }
821 return -EINVAL;
822}
823
824static int qe_ep0_rx(struct qe_udc *udc)
825{
826 struct qe_ep *ep = &udc->eps[0];
827 struct qe_frame *pframe;
828 struct qe_bd __iomem *bd;
829 u32 bdstatus, length;
830 u32 vaddr;
831
832 pframe = ep->rxframe;
833
834 if (ep->dir == USB_DIR_IN) {
835 dev_err(udc->dev, "ep0 not a control endpoint\n");
836 return -EINVAL;
837 }
838
839 bd = ep->n_rxbd;
840 bdstatus = in_be32((u32 __iomem *)bd);
841 length = bdstatus & BD_LENGTH_MASK;
842
843 while (!(bdstatus & R_E) && length) {
844 if ((bdstatus & R_F) && (bdstatus & R_L)
845 && !(bdstatus & R_ERROR)) {
846 if (length == USB_CRC_SIZE) {
847 udc->ep0_state = WAIT_FOR_SETUP;
848 dev_vdbg(udc->dev,
849 "receive a ZLP in status phase\n");
850 } else {
851 qe_frame_clean(pframe);
852 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
853 frame_set_data(pframe, (u8 *)vaddr);
854 frame_set_length(pframe,
855 (length - USB_CRC_SIZE));
856 frame_set_status(pframe, FRAME_OK);
857 switch (bdstatus & R_PID) {
858 case R_PID_SETUP:
859 frame_set_info(pframe, PID_SETUP);
860 break;
861 case R_PID_DATA1:
862 frame_set_info(pframe, PID_DATA1);
863 break;
864 default:
865 frame_set_info(pframe, PID_DATA0);
866 break;
867 }
868
869 if ((bdstatus & R_PID) == R_PID_SETUP)
870 ep0_setup_handle(udc);
871 else
872 qe_ep_rxframe_handle(ep);
873 }
874 } else {
875 dev_err(udc->dev, "The receive frame with error!\n");
876 }
877
878 /* note: don't clear the rxbd's buffer address */
879 recycle_one_rxbd(ep);
880
881 /* Get next BD */
882 if (bdstatus & R_W)
883 bd = ep->rxbase;
884 else
885 bd++;
886
887 bdstatus = in_be32((u32 __iomem *)bd);
888 length = bdstatus & BD_LENGTH_MASK;
889
890 }
891
892 ep->n_rxbd = bd;
893
894 return 0;
895}
896
897static int qe_ep_rxframe_handle(struct qe_ep *ep)
898{
899 struct qe_frame *pframe;
900 u8 framepid = 0;
901 unsigned int fsize;
902 u8 *cp;
903 struct qe_req *req;
904
905 pframe = ep->rxframe;
906
907 if (frame_get_info(pframe) & PID_DATA1)
908 framepid = 0x1;
909
910 if (framepid != ep->data01) {
911 dev_err(ep->udc->dev, "the data01 error!\n");
912 return -EIO;
913 }
914
915 fsize = frame_get_length(pframe);
916 if (list_empty(&ep->queue)) {
917 dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
918 } else {
919 req = list_entry(ep->queue.next, struct qe_req, queue);
920
921 cp = (u8 *)(req->req.buf) + req->req.actual;
922 if (cp) {
923 memcpy(cp, pframe->data, fsize);
924 req->req.actual += fsize;
925 if ((fsize < ep->ep.maxpacket) ||
926 (req->req.actual >= req->req.length)) {
927 if (ep->epnum == 0)
928 ep0_req_complete(ep->udc, req);
929 else
930 done(ep, req, 0);
931 if (list_empty(&ep->queue) && ep->epnum != 0)
932 qe_eprx_nack(ep);
933 }
934 }
935 }
936
937 qe_ep_toggledata01(ep);
938
939 return 0;
940}
941
942static void ep_rx_tasklet(unsigned long data)
943{
944 struct qe_udc *udc = (struct qe_udc *)data;
945 struct qe_ep *ep;
946 struct qe_frame *pframe;
947 struct qe_bd __iomem *bd;
948 unsigned long flags;
949 u32 bdstatus, length;
950 u32 vaddr, i;
951
952 spin_lock_irqsave(&udc->lock, flags);
953
954 for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
955 ep = &udc->eps[i];
956
957 if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
958 dev_dbg(udc->dev,
959 "This is a transmit ep or disable tasklet!\n");
960 continue;
961 }
962
963 pframe = ep->rxframe;
964 bd = ep->n_rxbd;
965 bdstatus = in_be32((u32 __iomem *)bd);
966 length = bdstatus & BD_LENGTH_MASK;
967
968 while (!(bdstatus & R_E) && length) {
969 if (list_empty(&ep->queue)) {
970 qe_eprx_nack(ep);
971 dev_dbg(udc->dev,
972 "The rxep have noreq %d\n",
973 ep->has_data);
974 break;
975 }
976
977 if ((bdstatus & R_F) && (bdstatus & R_L)
978 && !(bdstatus & R_ERROR)) {
979 qe_frame_clean(pframe);
980 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
981 frame_set_data(pframe, (u8 *)vaddr);
982 frame_set_length(pframe,
983 (length - USB_CRC_SIZE));
984 frame_set_status(pframe, FRAME_OK);
985 switch (bdstatus & R_PID) {
986 case R_PID_DATA1:
987 frame_set_info(pframe, PID_DATA1);
988 break;
989 case R_PID_SETUP:
990 frame_set_info(pframe, PID_SETUP);
991 break;
992 default:
993 frame_set_info(pframe, PID_DATA0);
994 break;
995 }
996 /* handle the rx frame */
997 qe_ep_rxframe_handle(ep);
998 } else {
999 dev_err(udc->dev,
1000 "error in received frame\n");
1001 }
1002 /* note: don't clear the rxbd's buffer address */
1003 /*clear the length */
1004 out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
1005 ep->has_data--;
1006 if (!(ep->localnack))
1007 recycle_one_rxbd(ep);
1008
1009 /* Get next BD */
1010 if (bdstatus & R_W)
1011 bd = ep->rxbase;
1012 else
1013 bd++;
1014
1015 bdstatus = in_be32((u32 __iomem *)bd);
1016 length = bdstatus & BD_LENGTH_MASK;
1017 }
1018
1019 ep->n_rxbd = bd;
1020
1021 if (ep->localnack)
1022 ep_recycle_rxbds(ep);
1023
1024 ep->enable_tasklet = 0;
1025 } /* for i=1 */
1026
1027 spin_unlock_irqrestore(&udc->lock, flags);
1028}
1029
1030static int qe_ep_rx(struct qe_ep *ep)
1031{
1032 struct qe_udc *udc;
1033 struct qe_frame *pframe;
1034 struct qe_bd __iomem *bd;
1035 u16 swoffs, ucoffs, emptybds;
1036
1037 udc = ep->udc;
1038 pframe = ep->rxframe;
1039
1040 if (ep->dir == USB_DIR_IN) {
1041 dev_err(udc->dev, "transmit ep in rx function\n");
1042 return -EINVAL;
1043 }
1044
1045 bd = ep->n_rxbd;
1046
1047 swoffs = (u16)(bd - ep->rxbase);
1048 ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
1049 in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
1050 if (swoffs < ucoffs)
1051 emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
1052 else
1053 emptybds = swoffs - ucoffs;
1054
1055 if (emptybds < MIN_EMPTY_BDS) {
1056 qe_eprx_nack(ep);
1057 ep->localnack = 1;
1058 dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
1059 }
1060 ep->has_data = USB_BDRING_LEN_RX - emptybds;
1061
1062 if (list_empty(&ep->queue)) {
1063 qe_eprx_nack(ep);
1064 dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
1065 ep->has_data);
1066 return 0;
1067 }
1068
1069 tasklet_schedule(&udc->rx_tasklet);
1070 ep->enable_tasklet = 1;
1071
1072 return 0;
1073}
1074
1075/* send data from a frame, no matter what tx_req */
1076static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
1077{
1078 struct qe_udc *udc = ep->udc;
1079 struct qe_bd __iomem *bd;
1080 u16 saveusbmr;
1081 u32 bdstatus, pidmask;
1082 u32 paddr;
1083
1084 if (ep->dir == USB_DIR_OUT) {
1085 dev_err(udc->dev, "receive ep passed to tx function\n");
1086 return -EINVAL;
1087 }
1088
1089 /* Disable the Tx interrupt */
1090 saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
1091 out_be16(&udc->usb_regs->usb_usbmr,
1092 saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
1093
1094 bd = ep->n_txbd;
1095 bdstatus = in_be32((u32 __iomem *)bd);
1096
1097 if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
1098 if (frame_get_length(frame) == 0) {
1099 frame_set_data(frame, udc->nullbuf);
1100 frame_set_length(frame, 2);
1101 frame->info |= (ZLP | NO_CRC);
1102 dev_vdbg(udc->dev, "the frame size = 0\n");
1103 }
1104 paddr = virt_to_phys((void *)frame->data);
1105 out_be32(&bd->buf, paddr);
1106 bdstatus = (bdstatus&T_W);
1107 if (!(frame_get_info(frame) & NO_CRC))
1108 bdstatus |= T_R | T_I | T_L | T_TC
1109 | frame_get_length(frame);
1110 else
1111 bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
1112
1113 /* if the packet is a ZLP in status phase */
1114 if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
1115 ep->data01 = 0x1;
1116
1117 if (ep->data01) {
1118 pidmask = T_PID_DATA1;
1119 frame->info |= PID_DATA1;
1120 } else {
1121 pidmask = T_PID_DATA0;
1122 frame->info |= PID_DATA0;
1123 }
1124 bdstatus |= T_CNF;
1125 bdstatus |= pidmask;
1126 out_be32((u32 __iomem *)bd, bdstatus);
1127 qe_ep_filltxfifo(ep);
1128
1129 /* enable the TX interrupt */
1130 out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
1131
1132 qe_ep_toggledata01(ep);
1133 if (bdstatus & T_W)
1134 ep->n_txbd = ep->txbase;
1135 else
1136 ep->n_txbd++;
1137
1138 return 0;
1139 } else {
1140 out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
1141 dev_vdbg(udc->dev, "The tx bd is not ready!\n");
1142 return -EBUSY;
1143 }
1144}
1145
928dfa6c 1146/* when a bd was transmitted, the function can
3948f0e0
LY		 1147 * handle the tx_req, not include ep0 */
1148static int txcomplete(struct qe_ep *ep, unsigned char restart)
1149{
1150 if (ep->tx_req != NULL) {
d834508e
VL		 1151 struct qe_req *req = ep->tx_req;
1152 unsigned zlp = 0, last_len = 0;
1153
1154 last_len = min_t(unsigned, req->req.length - ep->sent,
1155 ep->ep.maxpacket);
1156
3948f0e0
LY		 1157 if (!restart) {
1158 int asent = ep->last;
1159 ep->sent += asent;
1160 ep->last -= asent;
1161 } else {
1162 ep->last = 0;
1163 }
1164
d834508e
VL		 1165 /* zlp needed when req->re.zero is set */
1166 if (req->req.zero) {
1167 if (last_len == 0 ||
1168 (req->req.length % ep->ep.maxpacket) != 0)
1169 zlp = 0;
1170 else
1171 zlp = 1;
1172 } else
1173 zlp = 0;
1174
3948f0e0 1175 /* a request already were transmitted completely */
d834508e 1176 if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
3948f0e0
LY		 1177 done(ep, ep->tx_req, 0);
1178 ep->tx_req = NULL;
1179 ep->last = 0;
1180 ep->sent = 0;
1181 }
1182 }
1183
1184 /* we should gain a new tx_req fot this endpoint */
1185 if (ep->tx_req == NULL) {
1186 if (!list_empty(&ep->queue)) {
1187 ep->tx_req = list_entry(ep->queue.next, struct qe_req,
1188 queue);
1189 ep->last = 0;
1190 ep->sent = 0;
1191 }
1192 }
1193
1194 return 0;
1195}
1196
928dfa6c 1197/* give a frame and a tx_req, send some data */
3948f0e0
LY		 1198static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
1199{
1200 unsigned int size;
1201 u8 *buf;
1202
1203 qe_frame_clean(frame);
1204 size = min_t(u32, (ep->tx_req->req.length - ep->sent),
1205 ep->ep.maxpacket);
1206 buf = (u8 *)ep->tx_req->req.buf + ep->sent;
1207 if (buf && size) {
1208 ep->last = size;
d834508e 1209 ep->tx_req->req.actual += size;
3948f0e0
LY		 1210 frame_set_data(frame, buf);
1211 frame_set_length(frame, size);
1212 frame_set_status(frame, FRAME_OK);
1213 frame_set_info(frame, 0);
1214 return qe_ep_tx(ep, frame);
1215 }
1216 return -EIO;
1217}
1218
1219/* give a frame struct,send a ZLP */
1220static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
1221{
1222 struct qe_udc *udc = ep->udc;
1223
1224 if (frame == NULL)
1225 return -ENODEV;
1226
1227 qe_frame_clean(frame);
1228 frame_set_data(frame, (u8 *)udc->nullbuf);
1229 frame_set_length(frame, 2);
1230 frame_set_status(frame, FRAME_OK);
1231 frame_set_info(frame, (ZLP | NO_CRC | infor));
1232
1233 return qe_ep_tx(ep, frame);
1234}
1235
1236static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
1237{
1238 struct qe_req *req = ep->tx_req;
1239 int reval;
1240
1241 if (req == NULL)
1242 return -ENODEV;
1243
1244 if ((req->req.length - ep->sent) > 0)
1245 reval = qe_usb_senddata(ep, frame);
1246 else
1247 reval = sendnulldata(ep, frame, 0);
1248
1249 return reval;
1250}
1251
1252/* if direction is DIR_IN, the status is Device->Host
1253 * if direction is DIR_OUT, the status transaction is Device<-Host
1254 * in status phase, udc create a request and gain status */
1255static int ep0_prime_status(struct qe_udc *udc, int direction)
1256{
1257
1258 struct qe_ep *ep = &udc->eps[0];
1259
1260 if (direction == USB_DIR_IN) {
1261 udc->ep0_state = DATA_STATE_NEED_ZLP;
1262 udc->ep0_dir = USB_DIR_IN;
1263 sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
1264 } else {
1265 udc->ep0_dir = USB_DIR_OUT;
1266 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1267 }
1268
1269 return 0;
1270}
1271
1272/* a request complete in ep0, whether gadget request or udc request */
1273static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
1274{
1275 struct qe_ep *ep = &udc->eps[0];
1276 /* because usb and ep's status already been set in ch9setaddress() */
1277
1278 switch (udc->ep0_state) {
1279 case DATA_STATE_XMIT:
1280 done(ep, req, 0);
1281 /* receive status phase */
1282 if (ep0_prime_status(udc, USB_DIR_OUT))
1283 qe_ep0_stall(udc);
1284 break;
1285
1286 case DATA_STATE_NEED_ZLP:
1287 done(ep, req, 0);
1288 udc->ep0_state = WAIT_FOR_SETUP;
1289 break;
1290
1291 case DATA_STATE_RECV:
1292 done(ep, req, 0);
1293 /* send status phase */
1294 if (ep0_prime_status(udc, USB_DIR_IN))
1295 qe_ep0_stall(udc);
1296 break;
1297
1298 case WAIT_FOR_OUT_STATUS:
1299 done(ep, req, 0);
1300 udc->ep0_state = WAIT_FOR_SETUP;
1301 break;
1302
1303 case WAIT_FOR_SETUP:
1304 dev_vdbg(udc->dev, "Unexpected interrupt\n");
1305 break;
1306
1307 default:
1308 qe_ep0_stall(udc);
1309 break;
1310 }
1311}
1312
1313static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
1314{
1315 struct qe_req *tx_req = NULL;
1316 struct qe_frame *frame = ep->txframe;
1317
1318 if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
1319 if (!restart)
1320 ep->udc->ep0_state = WAIT_FOR_SETUP;
1321 else
1322 sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
1323 return 0;
1324 }
1325
1326 tx_req = ep->tx_req;
1327 if (tx_req != NULL) {
1328 if (!restart) {
1329 int asent = ep->last;
1330 ep->sent += asent;
1331 ep->last -= asent;
1332 } else {
1333 ep->last = 0;
1334 }
1335
1336 /* a request already were transmitted completely */
1337 if ((ep->tx_req->req.length - ep->sent) <= 0) {
1338 ep->tx_req->req.actual = (unsigned int)ep->sent;
1339 ep0_req_complete(ep->udc, ep->tx_req);
1340 ep->tx_req = NULL;
1341 ep->last = 0;
1342 ep->sent = 0;
1343 }
1344 } else {
1345 dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
1346 }
1347
1348 return 0;
1349}
1350
1351static int ep0_txframe_handle(struct qe_ep *ep)
1352{
1353 /* if have error, transmit again */
1354 if (frame_get_status(ep->txframe) & FRAME_ERROR) {
1355 qe_ep_flushtxfifo(ep);
1356 dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
1357 if (frame_get_info(ep->txframe) & PID_DATA0)
1358 ep->data01 = 0;
1359 else
1360 ep->data01 = 1;
1361
1362 ep0_txcomplete(ep, 1);
1363 } else
1364 ep0_txcomplete(ep, 0);
1365
1366 frame_create_tx(ep, ep->txframe);
1367 return 0;
1368}
1369
1370static int qe_ep0_txconf(struct qe_ep *ep)
1371{
1372 struct qe_bd __iomem *bd;
1373 struct qe_frame *pframe;
1374 u32 bdstatus;
1375
1376 bd = ep->c_txbd;
1377 bdstatus = in_be32((u32 __iomem *)bd);
1378 while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
1379 pframe = ep->txframe;
1380
1381 /* clear and recycle the BD */
1382 out_be32((u32 __iomem *)bd, bdstatus & T_W);
1383 out_be32(&bd->buf, 0);
1384 if (bdstatus & T_W)
1385 ep->c_txbd = ep->txbase;
1386 else
1387 ep->c_txbd++;
1388
1389 if (ep->c_txbd == ep->n_txbd) {
1390 if (bdstatus & DEVICE_T_ERROR) {
1391 frame_set_status(pframe, FRAME_ERROR);
1392 if (bdstatus & T_TO)
1393 pframe->status |= TX_ER_TIMEOUT;
1394 if (bdstatus & T_UN)
1395 pframe->status |= TX_ER_UNDERUN;
1396 }
1397 ep0_txframe_handle(ep);
1398 }
1399
1400 bd = ep->c_txbd;
1401 bdstatus = in_be32((u32 __iomem *)bd);
1402 }
1403
1404 return 0;
1405}
1406
1407static int ep_txframe_handle(struct qe_ep *ep)
1408{
1409 if (frame_get_status(ep->txframe) & FRAME_ERROR) {
1410 qe_ep_flushtxfifo(ep);
1411 dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
1412 if (frame_get_info(ep->txframe) & PID_DATA0)
1413 ep->data01 = 0;
1414 else
1415 ep->data01 = 1;
1416
1417 txcomplete(ep, 1);
1418 } else
1419 txcomplete(ep, 0);
1420
1421 frame_create_tx(ep, ep->txframe); /* send the data */
1422 return 0;
1423}
1424
1425/* confirm the already trainsmited bd */
1426static int qe_ep_txconf(struct qe_ep *ep)
1427{
1428 struct qe_bd __iomem *bd;
1429 struct qe_frame *pframe = NULL;
1430 u32 bdstatus;
1431 unsigned char breakonrxinterrupt = 0;
1432
1433 bd = ep->c_txbd;
1434 bdstatus = in_be32((u32 __iomem *)bd);
1435 while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
1436 pframe = ep->txframe;
1437 if (bdstatus & DEVICE_T_ERROR) {
1438 frame_set_status(pframe, FRAME_ERROR);
1439 if (bdstatus & T_TO)
1440 pframe->status |= TX_ER_TIMEOUT;
1441 if (bdstatus & T_UN)
1442 pframe->status |= TX_ER_UNDERUN;
1443 }
1444
1445 /* clear and recycle the BD */
1446 out_be32((u32 __iomem *)bd, bdstatus & T_W);
1447 out_be32(&bd->buf, 0);
1448 if (bdstatus & T_W)
1449 ep->c_txbd = ep->txbase;
1450 else
1451 ep->c_txbd++;
1452
1453 /* handle the tx frame */
1454 ep_txframe_handle(ep);
1455 bd = ep->c_txbd;
1456 bdstatus = in_be32((u32 __iomem *)bd);
1457 }
1458 if (breakonrxinterrupt)
1459 return -EIO;
1460 else
1461 return 0;
1462}
1463
1464/* Add a request in queue, and try to transmit a packet */
1465static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
1466{
1467 int reval = 0;
1468
1469 if (ep->tx_req == NULL) {
1470 ep->sent = 0;
1471 ep->last = 0;
1472 txcomplete(ep, 0); /* can gain a new tx_req */
1473 reval = frame_create_tx(ep, ep->txframe);
1474 }
1475 return reval;
1476}
1477
1478/* Maybe this is a good ideal */
1479static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
1480{
1481 struct qe_udc *udc = ep->udc;
1482 struct qe_frame *pframe = NULL;
1483 struct qe_bd __iomem *bd;
1484 u32 bdstatus, length;
1485 u32 vaddr, fsize;
1486 u8 *cp;
1487 u8 finish_req = 0;
1488 u8 framepid;
1489
1490 if (list_empty(&ep->queue)) {
1491 dev_vdbg(udc->dev, "the req already finish!\n");
1492 return 0;
1493 }
1494 pframe = ep->rxframe;
1495
1496 bd = ep->n_rxbd;
1497 bdstatus = in_be32((u32 __iomem *)bd);
1498 length = bdstatus & BD_LENGTH_MASK;
1499
1500 while (!(bdstatus & R_E) && length) {
1501 if (finish_req)
1502 break;
1503 if ((bdstatus & R_F) && (bdstatus & R_L)
1504 && !(bdstatus & R_ERROR)) {
1505 qe_frame_clean(pframe);
1506 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
1507 frame_set_data(pframe, (u8 *)vaddr);
1508 frame_set_length(pframe, (length - USB_CRC_SIZE));
1509 frame_set_status(pframe, FRAME_OK);
1510 switch (bdstatus & R_PID) {
1511 case R_PID_DATA1:
1512 frame_set_info(pframe, PID_DATA1); break;
1513 default:
1514 frame_set_info(pframe, PID_DATA0); break;
1515 }
1516 /* handle the rx frame */
1517
1518 if (frame_get_info(pframe) & PID_DATA1)
1519 framepid = 0x1;
1520 else
1521 framepid = 0;
1522
1523 if (framepid != ep->data01) {
1524 dev_vdbg(udc->dev, "the data01 error!\n");
1525 } else {
1526 fsize = frame_get_length(pframe);
1527
1528 cp = (u8 *)(req->req.buf) + req->req.actual;
1529 if (cp) {
1530 memcpy(cp, pframe->data, fsize);
1531 req->req.actual += fsize;
1532 if ((fsize < ep->ep.maxpacket)
1533 || (req->req.actual >=
1534 req->req.length)) {
1535 finish_req = 1;
1536 done(ep, req, 0);
1537 if (list_empty(&ep->queue))
1538 qe_eprx_nack(ep);
1539 }
1540 }
1541 qe_ep_toggledata01(ep);
1542 }
1543 } else {
1544 dev_err(udc->dev, "The receive frame with error!\n");
1545 }
1546
1547 /* note: don't clear the rxbd's buffer address *
1548 * only Clear the length */
1549 out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
1550 ep->has_data--;
1551
1552 /* Get next BD */
1553 if (bdstatus & R_W)
1554 bd = ep->rxbase;
1555 else
1556 bd++;
1557
1558 bdstatus = in_be32((u32 __iomem *)bd);
1559 length = bdstatus & BD_LENGTH_MASK;
1560 }
1561
1562 ep->n_rxbd = bd;
1563 ep_recycle_rxbds(ep);
1564
1565 return 0;
1566}
1567
1568/* only add the request in queue */
1569static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
1570{
1571 if (ep->state == EP_STATE_NACK) {
1572 if (ep->has_data <= 0) {
1573 /* Enable rx and unmask rx interrupt */
1574 qe_eprx_normal(ep);
1575 } else {
1576 /* Copy the exist BD data */
1577 ep_req_rx(ep, req);
1578 }
1579 }
1580
1581 return 0;
1582}
1583
1584/********************************************************************
1585 Internal Used Function End
1586********************************************************************/
1587
1588/*-----------------------------------------------------------------------
1589 Endpoint Management Functions For Gadget
1590 -----------------------------------------------------------------------*/
1591static int qe_ep_enable(struct usb_ep *_ep,
1592 const struct usb_endpoint_descriptor *desc)
1593{
1594 struct qe_udc *udc;
1595 struct qe_ep *ep;
1596 int retval = 0;
1597 unsigned char epnum;
1598
1599 ep = container_of(_ep, struct qe_ep, ep);
1600
1601 /* catch various bogus parameters */
1602 if (!_ep || !desc || ep->desc || _ep->name == ep_name[0] ||
1603 (desc->bDescriptorType != USB_DT_ENDPOINT))
1604 return -EINVAL;
1605
1606 udc = ep->udc;
1607 if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
1608 return -ESHUTDOWN;
1609
1610 epnum = (u8)desc->bEndpointAddress & 0xF;
1611
1612 retval = qe_ep_init(udc, epnum, desc);
1613 if (retval != 0) {
1614 cpm_muram_free(cpm_muram_offset(ep->rxbase));
1615 dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
1616 return -EINVAL;
1617 }
1618 dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
1619 return 0;
1620}
1621
1622static int qe_ep_disable(struct usb_ep *_ep)
1623{
1624 struct qe_udc *udc;
1625 struct qe_ep *ep;
1626 unsigned long flags;
1627 unsigned int size;
1628
1629 ep = container_of(_ep, struct qe_ep, ep);
1630 udc = ep->udc;
1631
1632 if (!_ep || !ep->desc) {
1633 dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
1634 return -EINVAL;
1635 }
1636
1637 spin_lock_irqsave(&udc->lock, flags);
1638 /* Nuke all pending requests (does flush) */
1639 nuke(ep, -ESHUTDOWN);
1640 ep->desc = NULL;
1641 ep->stopped = 1;
af3ddbd7 1642 ep->tx_req = NULL;
82341b36 1643 qe_ep_reset(udc, ep->epnum);
3948f0e0
LY		 1644 spin_unlock_irqrestore(&udc->lock, flags);
1645
1646 cpm_muram_free(cpm_muram_offset(ep->rxbase));
1647
1648 if (ep->dir == USB_DIR_OUT)
1649 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
1650 (USB_BDRING_LEN_RX + 1);
1651 else
1652 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
1653 (USB_BDRING_LEN + 1);
1654
1655 if (ep->dir != USB_DIR_IN) {
1656 kfree(ep->rxframe);
1657 if (ep->rxbufmap) {
1658 dma_unmap_single(udc_controller->gadget.dev.parent,
1659 ep->rxbuf_d, size,
1660 DMA_FROM_DEVICE);
1661 ep->rxbuf_d = DMA_ADDR_INVALID;
1662 } else {
1663 dma_sync_single_for_cpu(
1664 udc_controller->gadget.dev.parent,
1665 ep->rxbuf_d, size,
1666 DMA_FROM_DEVICE);
1667 }
1668 kfree(ep->rxbuffer);
1669 }
1670
1671 if (ep->dir != USB_DIR_OUT)
1672 kfree(ep->txframe);
1673
1674 dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
1675 return 0;
1676}
1677
1678static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
1679{
1680 struct qe_req *req;
1681
1682 req = kzalloc(sizeof(*req), gfp_flags);
1683 if (!req)
1684 return NULL;
1685
1686 req->req.dma = DMA_ADDR_INVALID;
1687
1688 INIT_LIST_HEAD(&req->queue);
1689
1690 return &req->req;
1691}
1692
1693static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
1694{
1695 struct qe_req *req;
1696
1697 req = container_of(_req, struct qe_req, req);
1698
1699 if (_req)
1700 kfree(req);
1701}
1702
a30551db 1703static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
3948f0e0
LY		 1704{
1705 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1706 struct qe_req *req = container_of(_req, struct qe_req, req);
1707 struct qe_udc *udc;
3948f0e0
LY		 1708 int reval;
1709
1710 udc = ep->udc;
1711 /* catch various bogus parameters */
1712 if (!_req || !req->req.complete || !req->req.buf
1713 || !list_empty(&req->queue)) {
1714 dev_dbg(udc->dev, "bad params\n");
1715 return -EINVAL;
1716 }
1717 if (!_ep || (!ep->desc && ep_index(ep))) {
1718 dev_dbg(udc->dev, "bad ep\n");
1719 return -EINVAL;
1720 }
1721
1722 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
1723 return -ESHUTDOWN;
1724
1725 req->ep = ep;
1726
1727 /* map virtual address to hardware */
1728 if (req->req.dma == DMA_ADDR_INVALID) {
1729 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
1730 req->req.buf,
1731 req->req.length,
1732 ep_is_in(ep)
1733 ? DMA_TO_DEVICE :
1734 DMA_FROM_DEVICE);
1735 req->mapped = 1;
1736 } else {
1737 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
1738 req->req.dma, req->req.length,
1739 ep_is_in(ep)
1740 ? DMA_TO_DEVICE :
1741 DMA_FROM_DEVICE);
1742 req->mapped = 0;
1743 }
1744
1745 req->req.status = -EINPROGRESS;
1746 req->req.actual = 0;
1747
1748 list_add_tail(&req->queue, &ep->queue);
1749 dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
1750 ep->name, req->req.length);
a30551db 1751
3948f0e0
LY		 1752 /* push the request to device */
1753 if (ep_is_in(ep))
1754 reval = ep_req_send(ep, req);
1755
1756 /* EP0 */
1757 if (ep_index(ep) == 0 && req->req.length > 0) {
1758 if (ep_is_in(ep))
1759 udc->ep0_state = DATA_STATE_XMIT;
1760 else
1761 udc->ep0_state = DATA_STATE_RECV;
1762 }
1763
1764 if (ep->dir == USB_DIR_OUT)
1765 reval = ep_req_receive(ep, req);
1766
3948f0e0
LY		 1767 return 0;
1768}
1769
a30551db
AV		 1770/* queues (submits) an I/O request to an endpoint */
1771static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1772 gfp_t gfp_flags)
1773{
1774 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1775 struct qe_udc *udc = ep->udc;
1776 unsigned long flags;
1777 int ret;
1778
1779 spin_lock_irqsave(&udc->lock, flags);
1780 ret = __qe_ep_queue(_ep, _req);
1781 spin_unlock_irqrestore(&udc->lock, flags);
1782 return ret;
1783}
1784
3948f0e0
LY		 1785/* dequeues (cancels, unlinks) an I/O request from an endpoint */
1786static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1787{
1788 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1789 struct qe_req *req;
1790 unsigned long flags;
1791
1792 if (!_ep || !_req)
1793 return -EINVAL;
1794
1795 spin_lock_irqsave(&ep->udc->lock, flags);
1796
1797 /* make sure it's actually queued on this endpoint */
1798 list_for_each_entry(req, &ep->queue, queue) {
1799 if (&req->req == _req)
1800 break;
1801 }
1802
1803 if (&req->req != _req) {
1804 spin_unlock_irqrestore(&ep->udc->lock, flags);
1805 return -EINVAL;
1806 }
1807
1808 done(ep, req, -ECONNRESET);
1809
1810 spin_unlock_irqrestore(&ep->udc->lock, flags);
1811 return 0;
1812}
1813
1814/*-----------------------------------------------------------------
1815 * modify the endpoint halt feature
1816 * @ep: the non-isochronous endpoint being stalled
1817 * @value: 1--set halt 0--clear halt
1818 * Returns zero, or a negative error code.
1819*----------------------------------------------------------------*/
1820static int qe_ep_set_halt(struct usb_ep *_ep, int value)
1821{
1822 struct qe_ep *ep;
1823 unsigned long flags;
1824 int status = -EOPNOTSUPP;
1825 struct qe_udc *udc;
1826
1827 ep = container_of(_ep, struct qe_ep, ep);
1828 if (!_ep || !ep->desc) {
1829 status = -EINVAL;
1830 goto out;
1831 }
1832
3948f0e0
LY		 1833 udc = ep->udc;
1834 /* Attempt to halt IN ep will fail if any transfer requests
1835 * are still queue */
1836 if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
1837 status = -EAGAIN;
1838 goto out;
1839 }
1840
1841 status = 0;
1842 spin_lock_irqsave(&ep->udc->lock, flags);
1843 qe_eptx_stall_change(ep, value);
1844 qe_eprx_stall_change(ep, value);
1845 spin_unlock_irqrestore(&ep->udc->lock, flags);
1846
1847 if (ep->epnum == 0) {
1848 udc->ep0_state = WAIT_FOR_SETUP;
1849 udc->ep0_dir = 0;
1850 }
15d5a9ac
LY		 1851
1852 /* set data toggle to DATA0 on clear halt */
1853 if (value == 0)
1854 ep->data01 = 0;
3948f0e0 1855out:
928dfa6c 1856 dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
3948f0e0
LY		 1857 value ? "set" : "clear", status);
1858
1859 return status;
1860}
1861
1862static struct usb_ep_ops qe_ep_ops = {
1863 .enable = qe_ep_enable,
1864 .disable = qe_ep_disable,
1865
1866 .alloc_request = qe_alloc_request,
1867 .free_request = qe_free_request,
1868
1869 .queue = qe_ep_queue,
1870 .dequeue = qe_ep_dequeue,
1871
1872 .set_halt = qe_ep_set_halt,
1873};
1874
1875/*------------------------------------------------------------------------
1876 Gadget Driver Layer Operations
1877 ------------------------------------------------------------------------*/
1878
1879/* Get the current frame number */
1880static int qe_get_frame(struct usb_gadget *gadget)
1881{
1882 u16 tmp;
1883
1884 tmp = in_be16(&udc_controller->usb_param->frame_n);
1885 if (tmp & 0x8000)
1886 tmp = tmp & 0x07ff;
1887 else
1888 tmp = -EINVAL;
1889
1890 return (int)tmp;
1891}
1892
1893/* Tries to wake up the host connected to this gadget
1894 *
1895 * Return : 0-success
1896 * Negative-this feature not enabled by host or not supported by device hw
1897 */
1898static int qe_wakeup(struct usb_gadget *gadget)
1899{
1900 return -ENOTSUPP;
1901}
1902
1903/* Notify controller that VBUS is powered, Called by whatever
1904 detects VBUS sessions */
1905static int qe_vbus_session(struct usb_gadget *gadget, int is_active)
1906{
1907 return -ENOTSUPP;
1908}
1909
1910/* constrain controller's VBUS power usage
1911 * This call is used by gadget drivers during SET_CONFIGURATION calls,
1912 * reporting how much power the device may consume. For example, this
1913 * could affect how quickly batteries are recharged.
1914 *
1915 * Returns zero on success, else negative errno.
1916 */
1917static int qe_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1918{
1919 return -ENOTSUPP;
1920}
1921
1922/* Change Data+ pullup status
1923 * this func is used by usb_gadget_connect/disconnect
1924 */
1925static int qe_pullup(struct usb_gadget *gadget, int is_on)
1926{
1927 return -ENOTSUPP;
1928}
1929
0f91349b
SAS		 1930static int fsl_qe_start(struct usb_gadget_driver *driver,
1931 int (*bind)(struct usb_gadget *));
1932static int fsl_qe_stop(struct usb_gadget_driver *driver);
1933
3948f0e0
LY		 1934/* defined in usb_gadget.h */
1935static struct usb_gadget_ops qe_gadget_ops = {
1936 .get_frame = qe_get_frame,
1937 .wakeup = qe_wakeup,
1938/* .set_selfpowered = qe_set_selfpowered,*/ /* always selfpowered */
1939 .vbus_session = qe_vbus_session,
1940 .vbus_draw = qe_vbus_draw,
1941 .pullup = qe_pullup,
0f91349b
SAS		 1942 .start = fsl_qe_start,
1943 .stop = fsl_qe_stop,
3948f0e0
LY		 1944};
1945
1946/*-------------------------------------------------------------------------
1947 USB ep0 Setup process in BUS Enumeration
1948 -------------------------------------------------------------------------*/
1949static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
1950{
1951 struct qe_ep *ep = &udc->eps[pipe];
1952
1953 nuke(ep, -ECONNRESET);
1954 ep->tx_req = NULL;
1955 return 0;
1956}
1957
1958static int reset_queues(struct qe_udc *udc)
1959{
1960 u8 pipe;
1961
1962 for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
1963 udc_reset_ep_queue(udc, pipe);
1964
1965 /* report disconnect; the driver is already quiesced */
1966 spin_unlock(&udc->lock);
1967 udc->driver->disconnect(&udc->gadget);
1968 spin_lock(&udc->lock);
1969
1970 return 0;
1971}
1972
1973static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
1974 u16 length)
1975{
1976 /* Save the new address to device struct */
1977 udc->device_address = (u8) value;
1978 /* Update usb state */
1979 udc->usb_state = USB_STATE_ADDRESS;
1980
1981 /* Status phase , send a ZLP */
1982 if (ep0_prime_status(udc, USB_DIR_IN))
1983 qe_ep0_stall(udc);
1984}
1985
1986static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
1987{
1988 struct qe_req *req = container_of(_req, struct qe_req, req);
1989
1990 req->req.buf = NULL;
1991 kfree(req);
1992}
1993
928dfa6c
LY		 1994static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
1995 u16 index, u16 length)
3948f0e0 1996{
928dfa6c 1997 u16 usb_status = 0;
3948f0e0
LY		 1998 struct qe_req *req;
1999 struct qe_ep *ep;
2000 int status = 0;
2001
2002 ep = &udc->eps[0];
928dfa6c
LY		 2003 if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
2004 /* Get device status */
2005 usb_status = 1 << USB_DEVICE_SELF_POWERED;
2006 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
2007 /* Get interface status */
2008 /* We don't have interface information in udc driver */
2009 usb_status = 0;
2010 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
2011 /* Get endpoint status */
2012 int pipe = index & USB_ENDPOINT_NUMBER_MASK;
2013 struct qe_ep *target_ep = &udc->eps[pipe];
2014 u16 usep;
2015
2016 /* stall if endpoint doesn't exist */
2017 if (!target_ep->desc)
2018 goto stall;
2019
2020 usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
2021 if (index & USB_DIR_IN) {
2022 if (target_ep->dir != USB_DIR_IN)
2023 goto stall;
2024 if ((usep & USB_THS_MASK) == USB_THS_STALL)
2025 usb_status = 1 << USB_ENDPOINT_HALT;
2026 } else {
2027 if (target_ep->dir != USB_DIR_OUT)
2028 goto stall;
2029 if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
2030 usb_status = 1 << USB_ENDPOINT_HALT;
2031 }
2032 }
3948f0e0
LY		 2033
2034 req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
2035 struct qe_req, req);
2036 req->req.length = 2;
928dfa6c
LY		 2037 req->req.buf = udc->statusbuf;
2038 *(u16 *)req->req.buf = cpu_to_le16(usb_status);
3948f0e0
LY		 2039 req->req.status = -EINPROGRESS;
2040 req->req.actual = 0;
2041 req->req.complete = ownercomplete;
2042
2043 udc->ep0_dir = USB_DIR_IN;
2044
2045 /* data phase */
a30551db 2046 status = __qe_ep_queue(&ep->ep, &req->req);
3948f0e0 2047
928dfa6c
LY		 2048 if (status == 0)
2049 return;
2050stall:
2051 dev_err(udc->dev, "Can't respond to getstatus request \n");
2052 qe_ep0_stall(udc);
3948f0e0
LY		 2053}
2054
2055/* only handle the setup request, suppose the device in normal status */
2056static void setup_received_handle(struct qe_udc *udc,
2057 struct usb_ctrlrequest *setup)
2058{
2059 /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
2060 u16 wValue = le16_to_cpu(setup->wValue);
2061 u16 wIndex = le16_to_cpu(setup->wIndex);
2062 u16 wLength = le16_to_cpu(setup->wLength);
2063
2064 /* clear the previous request in the ep0 */
2065 udc_reset_ep_queue(udc, 0);
2066
2067 if (setup->bRequestType & USB_DIR_IN)
2068 udc->ep0_dir = USB_DIR_IN;
2069 else
2070 udc->ep0_dir = USB_DIR_OUT;
2071
2072 switch (setup->bRequest) {
2073 case USB_REQ_GET_STATUS:
2074 /* Data+Status phase form udc */
2075 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2076 != (USB_DIR_IN | USB_TYPE_STANDARD))
2077 break;
928dfa6c
LY		 2078 ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
2079 wLength);
3948f0e0
LY		 2080 return;
2081
2082 case USB_REQ_SET_ADDRESS:
2083 /* Status phase from udc */
2084 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
2085 USB_RECIP_DEVICE))
2086 break;
2087 ch9setaddress(udc, wValue, wIndex, wLength);
2088 return;
2089
2090 case USB_REQ_CLEAR_FEATURE:
2091 case USB_REQ_SET_FEATURE:
2092 /* Requests with no data phase, status phase from udc */
928dfa6c 2093 if ((setup->bRequestType & USB_TYPE_MASK)
3948f0e0
LY		 2094 != USB_TYPE_STANDARD)
2095 break;
2096
2097 if ((setup->bRequestType & USB_RECIP_MASK)
2098 == USB_RECIP_ENDPOINT) {
2099 int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
2100 struct qe_ep *ep;
2101
2102 if (wValue != 0 || wLength != 0
2103 || pipe > USB_MAX_ENDPOINTS)
2104 break;
2105 ep = &udc->eps[pipe];
2106
2107 spin_unlock(&udc->lock);
2108 qe_ep_set_halt(&ep->ep,
2109 (setup->bRequest == USB_REQ_SET_FEATURE)
2110 ? 1 : 0);
2111 spin_lock(&udc->lock);
2112 }
2113
2114 ep0_prime_status(udc, USB_DIR_IN);
2115
2116 return;
2117
2118 default:
2119 break;
2120 }
2121
2122 if (wLength) {
2123 /* Data phase from gadget, status phase from udc */
2124 if (setup->bRequestType & USB_DIR_IN) {
2125 udc->ep0_state = DATA_STATE_XMIT;
2126 udc->ep0_dir = USB_DIR_IN;
928dfa6c 2127 } else {
3948f0e0
LY		 2128 udc->ep0_state = DATA_STATE_RECV;
2129 udc->ep0_dir = USB_DIR_OUT;
2130 }
2131 spin_unlock(&udc->lock);
2132 if (udc->driver->setup(&udc->gadget,
2133 &udc->local_setup_buff) < 0)
2134 qe_ep0_stall(udc);
2135 spin_lock(&udc->lock);
2136 } else {
2137 /* No data phase, IN status from gadget */
2138 udc->ep0_dir = USB_DIR_IN;
2139 spin_unlock(&udc->lock);
2140 if (udc->driver->setup(&udc->gadget,
2141 &udc->local_setup_buff) < 0)
2142 qe_ep0_stall(udc);
2143 spin_lock(&udc->lock);
2144 udc->ep0_state = DATA_STATE_NEED_ZLP;
2145 }
2146}
2147
2148/*-------------------------------------------------------------------------
2149 USB Interrupt handlers
2150 -------------------------------------------------------------------------*/
2151static void suspend_irq(struct qe_udc *udc)
2152{
2153 udc->resume_state = udc->usb_state;
2154 udc->usb_state = USB_STATE_SUSPENDED;
2155
2156 /* report suspend to the driver ,serial.c not support this*/
2157 if (udc->driver->suspend)
2158 udc->driver->suspend(&udc->gadget);
2159}
2160
2161static void resume_irq(struct qe_udc *udc)
2162{
2163 udc->usb_state = udc->resume_state;
2164 udc->resume_state = 0;
2165
2166 /* report resume to the driver , serial.c not support this*/
2167 if (udc->driver->resume)
2168 udc->driver->resume(&udc->gadget);
2169}
2170
2171static void idle_irq(struct qe_udc *udc)
2172{
2173 u8 usbs;
2174
2175 usbs = in_8(&udc->usb_regs->usb_usbs);
2176 if (usbs & USB_IDLE_STATUS_MASK) {
2177 if ((udc->usb_state) != USB_STATE_SUSPENDED)
2178 suspend_irq(udc);
2179 } else {
2180 if (udc->usb_state == USB_STATE_SUSPENDED)
2181 resume_irq(udc);
2182 }
2183}
2184
2185static int reset_irq(struct qe_udc *udc)
2186{
2187 unsigned char i;
2188
ef84e405
AV		 2189 if (udc->usb_state == USB_STATE_DEFAULT)
2190 return 0;
2191
3948f0e0
LY		 2192 qe_usb_disable();
2193 out_8(&udc->usb_regs->usb_usadr, 0);
2194
2195 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2196 if (udc->eps[i].init)
2197 qe_ep_reset(udc, i);
2198 }
2199
2200 reset_queues(udc);
2201 udc->usb_state = USB_STATE_DEFAULT;
2202 udc->ep0_state = WAIT_FOR_SETUP;
2203 udc->ep0_dir = USB_DIR_OUT;
2204 qe_usb_enable();
2205 return 0;
2206}
2207
2208static int bsy_irq(struct qe_udc *udc)
2209{
2210 return 0;
2211}
2212
2213static int txe_irq(struct qe_udc *udc)
2214{
2215 return 0;
2216}
2217
2218/* ep0 tx interrupt also in here */
2219static int tx_irq(struct qe_udc *udc)
2220{
2221 struct qe_ep *ep;
2222 struct qe_bd __iomem *bd;
2223 int i, res = 0;
2224
2225 if ((udc->usb_state == USB_STATE_ADDRESS)
2226 && (in_8(&udc->usb_regs->usb_usadr) == 0))
2227 out_8(&udc->usb_regs->usb_usadr, udc->device_address);
2228
2229 for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
2230 ep = &udc->eps[i];
2231 if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
2232 bd = ep->c_txbd;
2233 if (!(in_be32((u32 __iomem *)bd) & T_R)
2234 && (in_be32(&bd->buf))) {
928dfa6c 2235 /* confirm the transmitted bd */
3948f0e0
LY		 2236 if (ep->epnum == 0)
2237 res = qe_ep0_txconf(ep);
2238 else
2239 res = qe_ep_txconf(ep);
3948f0e0
LY		 2240 }
2241 }
2242 }
2243 return res;
2244}
2245
2246
2247/* setup packect's rx is handle in the function too */
2248static void rx_irq(struct qe_udc *udc)
2249{
2250 struct qe_ep *ep;
2251 struct qe_bd __iomem *bd;
2252 int i;
2253
2254 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2255 ep = &udc->eps[i];
2256 if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
2257 bd = ep->n_rxbd;
2258 if (!(in_be32((u32 __iomem *)bd) & R_E)
2259 && (in_be32(&bd->buf))) {
2260 if (ep->epnum == 0) {
2261 qe_ep0_rx(udc);
2262 } else {
2263 /*non-setup package receive*/
2264 qe_ep_rx(ep);
2265 }
2266 }
2267 }
2268 }
2269}
2270
2271static irqreturn_t qe_udc_irq(int irq, void *_udc)
2272{
2273 struct qe_udc *udc = (struct qe_udc *)_udc;
2274 u16 irq_src;
2275 irqreturn_t status = IRQ_NONE;
2276 unsigned long flags;
2277
3948f0e0
LY		 2278 spin_lock_irqsave(&udc->lock, flags);
2279
2280 irq_src = in_be16(&udc->usb_regs->usb_usber) &
2281 in_be16(&udc->usb_regs->usb_usbmr);
2282 /* Clear notification bits */
2283 out_be16(&udc->usb_regs->usb_usber, irq_src);
2284 /* USB Interrupt */
2285 if (irq_src & USB_E_IDLE_MASK) {
2286 idle_irq(udc);
2287 irq_src &= ~USB_E_IDLE_MASK;
2288 status = IRQ_HANDLED;
2289 }
2290
2291 if (irq_src & USB_E_TXB_MASK) {
2292 tx_irq(udc);
2293 irq_src &= ~USB_E_TXB_MASK;
2294 status = IRQ_HANDLED;
2295 }
2296
2297 if (irq_src & USB_E_RXB_MASK) {
2298 rx_irq(udc);
2299 irq_src &= ~USB_E_RXB_MASK;
2300 status = IRQ_HANDLED;
2301 }
2302
2303 if (irq_src & USB_E_RESET_MASK) {
2304 reset_irq(udc);
2305 irq_src &= ~USB_E_RESET_MASK;
2306 status = IRQ_HANDLED;
2307 }
2308
2309 if (irq_src & USB_E_BSY_MASK) {
2310 bsy_irq(udc);
2311 irq_src &= ~USB_E_BSY_MASK;
2312 status = IRQ_HANDLED;
2313 }
2314
2315 if (irq_src & USB_E_TXE_MASK) {
2316 txe_irq(udc);
2317 irq_src &= ~USB_E_TXE_MASK;
2318 status = IRQ_HANDLED;
2319 }
2320
2321 spin_unlock_irqrestore(&udc->lock, flags);
2322
2323 return status;
2324}
2325
2326/*-------------------------------------------------------------------------
b0fca50f 2327 Gadget driver probe and unregister.
3948f0e0 2328 --------------------------------------------------------------------------*/
0f91349b 2329static int fsl_qe_start(struct usb_gadget_driver *driver,
b0fca50f 2330 int (*bind)(struct usb_gadget *))
3948f0e0
LY		 2331{
2332 int retval;
2333 unsigned long flags = 0;
2334
2335 /* standard operations */
2336 if (!udc_controller)
2337 return -ENODEV;
2338
7177aed4 2339 if (!driver || driver->max_speed < USB_SPEED_FULL
b0fca50f 2340 || !bind || !driver->disconnect || !driver->setup)
3948f0e0
LY		 2341 return -EINVAL;
2342
2343 if (udc_controller->driver)
2344 return -EBUSY;
2345
2346 /* lock is needed but whether should use this lock or another */
2347 spin_lock_irqsave(&udc_controller->lock, flags);
2348
2349 driver->driver.bus = NULL;
2350 /* hook up the driver */
2351 udc_controller->driver = driver;
2352 udc_controller->gadget.dev.driver = &driver->driver;
7177aed4 2353 udc_controller->gadget.speed = driver->max_speed;
3948f0e0
LY		 2354 spin_unlock_irqrestore(&udc_controller->lock, flags);
2355
b0fca50f 2356 retval = bind(&udc_controller->gadget);
3948f0e0
LY		 2357 if (retval) {
2358 dev_err(udc_controller->dev, "bind to %s --> %d",
2359 driver->driver.name, retval);
2360 udc_controller->gadget.dev.driver = NULL;
2361 udc_controller->driver = NULL;
2362 return retval;
2363 }
2364
2365 /* Enable IRQ reg and Set usbcmd reg EN bit */
2366 qe_usb_enable();
2367
2368 out_be16(&udc_controller->usb_regs->usb_usber, 0xffff);
2369 out_be16(&udc_controller->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
2370 udc_controller->usb_state = USB_STATE_ATTACHED;
2371 udc_controller->ep0_state = WAIT_FOR_SETUP;
2372 udc_controller->ep0_dir = USB_DIR_OUT;
2373 dev_info(udc_controller->dev, "%s bind to driver %s \n",
2374 udc_controller->gadget.name, driver->driver.name);
2375 return 0;
2376}
3948f0e0 2377
0f91349b 2378static int fsl_qe_stop(struct usb_gadget_driver *driver)
3948f0e0
LY		 2379{
2380 struct qe_ep *loop_ep;
2381 unsigned long flags;
2382
2383 if (!udc_controller)
2384 return -ENODEV;
2385
2386 if (!driver || driver != udc_controller->driver)
2387 return -EINVAL;
2388
2389 /* stop usb controller, disable intr */
2390 qe_usb_disable();
2391
2392 /* in fact, no needed */
2393 udc_controller->usb_state = USB_STATE_ATTACHED;
2394 udc_controller->ep0_state = WAIT_FOR_SETUP;
2395 udc_controller->ep0_dir = 0;
2396
2397 /* stand operation */
2398 spin_lock_irqsave(&udc_controller->lock, flags);
2399 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2400 nuke(&udc_controller->eps[0], -ESHUTDOWN);
2401 list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
2402 ep.ep_list)
2403 nuke(loop_ep, -ESHUTDOWN);
2404 spin_unlock_irqrestore(&udc_controller->lock, flags);
2405
9ac36da3
AV		 2406 /* report disconnect; the controller is already quiesced */
2407 driver->disconnect(&udc_controller->gadget);
2408
3948f0e0
LY		 2409 /* unbind gadget and unhook driver. */
2410 driver->unbind(&udc_controller->gadget);
2411 udc_controller->gadget.dev.driver = NULL;
2412 udc_controller->driver = NULL;
2413
2414 dev_info(udc_controller->dev, "unregistered gadget driver '%s'\r\n",
2415 driver->driver.name);
2416 return 0;
2417}
3948f0e0
LY		 2418
2419/* udc structure's alloc and setup, include ep-param alloc */
2dc11581 2420static struct qe_udc __devinit *qe_udc_config(struct platform_device *ofdev)
3948f0e0
LY		 2421{
2422 struct qe_udc *udc;
3ed38802 2423 struct device_node *np = ofdev->dev.of_node;
3948f0e0
LY		 2424 unsigned int tmp_addr = 0;
2425 struct usb_device_para __iomem *usbpram;
2426 unsigned int i;
2427 u64 size;
2428 u32 offset;
2429
2430 udc = kzalloc(sizeof(*udc), GFP_KERNEL);
2431 if (udc == NULL) {
2432 dev_err(&ofdev->dev, "malloc udc failed\n");
2433 goto cleanup;
2434 }
2435
2436 udc->dev = &ofdev->dev;
2437
2438 /* get default address of usb parameter in MURAM from device tree */
2439 offset = *of_get_address(np, 1, &size, NULL);
2440 udc->usb_param = cpm_muram_addr(offset);
2441 memset_io(udc->usb_param, 0, size);
2442
2443 usbpram = udc->usb_param;
2444 out_be16(&usbpram->frame_n, 0);
2445 out_be32(&usbpram->rstate, 0);
2446
2447 tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
2448 sizeof(struct usb_ep_para)),
2449 USB_EP_PARA_ALIGNMENT);
cd40c4c4
AV		 2450 if (IS_ERR_VALUE(tmp_addr))
2451 goto cleanup;
3948f0e0
LY		 2452
2453 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2454 out_be16(&usbpram->epptr[i], (u16)tmp_addr);
2455 udc->ep_param[i] = cpm_muram_addr(tmp_addr);
2456 tmp_addr += 32;
2457 }
2458
2459 memset_io(udc->ep_param[0], 0,
2460 USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
2461
2462 udc->resume_state = USB_STATE_NOTATTACHED;
2463 udc->usb_state = USB_STATE_POWERED;
2464 udc->ep0_dir = 0;
2465
2466 spin_lock_init(&udc->lock);
2467 return udc;
2468
2469cleanup:
2470 kfree(udc);
2471 return NULL;
2472}
2473
2474/* USB Controller register init */
2475static int __devinit qe_udc_reg_init(struct qe_udc *udc)
2476{
2477 struct usb_ctlr __iomem *qe_usbregs;
2478 qe_usbregs = udc->usb_regs;
2479
2247818a 2480 /* Spec says that we must enable the USB controller to change mode. */
3948f0e0 2481 out_8(&qe_usbregs->usb_usmod, 0x01);
2247818a
AV		 2482 /* Mode changed, now disable it, since muram isn't initialized yet. */
2483 out_8(&qe_usbregs->usb_usmod, 0x00);
2484
2485 /* Initialize the rest. */
3948f0e0
LY		 2486 out_be16(&qe_usbregs->usb_usbmr, 0);
2487 out_8(&qe_usbregs->usb_uscom, 0);
2488 out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
2489
2490 return 0;
2491}
2492
2493static int __devinit qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
2494{
2495 struct qe_ep *ep = &udc->eps[pipe_num];
2496
2497 ep->udc = udc;
2498 strcpy(ep->name, ep_name[pipe_num]);
2499 ep->ep.name = ep_name[pipe_num];
2500
2501 ep->ep.ops = &qe_ep_ops;
2502 ep->stopped = 1;
2503 ep->ep.maxpacket = (unsigned short) ~0;
2504 ep->desc = NULL;
2505 ep->dir = 0xff;
2506 ep->epnum = (u8)pipe_num;
2507 ep->sent = 0;
2508 ep->last = 0;
2509 ep->init = 0;
2510 ep->rxframe = NULL;
2511 ep->txframe = NULL;
2512 ep->tx_req = NULL;
2513 ep->state = EP_STATE_IDLE;
2514 ep->has_data = 0;
2515
2516 /* the queue lists any req for this ep */
2517 INIT_LIST_HEAD(&ep->queue);
2518
2519 /* gagdet.ep_list used for ep_autoconfig so no ep0*/
2520 if (pipe_num != 0)
2521 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2522
2523 ep->gadget = &udc->gadget;
2524
2525 return 0;
2526}
2527
2528/*-----------------------------------------------------------------------
2529 * UDC device Driver operation functions *
2530 *----------------------------------------------------------------------*/
2531static void qe_udc_release(struct device *dev)
2532{
2533 int i = 0;
2534
2535 complete(udc_controller->done);
2536 cpm_muram_free(cpm_muram_offset(udc_controller->ep_param[0]));
2537 for (i = 0; i < USB_MAX_ENDPOINTS; i++)
2538 udc_controller->ep_param[i] = NULL;
2539
2540 kfree(udc_controller);
2541 udc_controller = NULL;
2542}
2543
2544/* Driver probe functions */
b1608d69 2545static const struct of_device_id qe_udc_match[];
d35fb641 2546static int __devinit qe_udc_probe(struct platform_device *ofdev)
3948f0e0 2547{
b1608d69 2548 const struct of_device_id *match;
3ed38802 2549 struct device_node *np = ofdev->dev.of_node;
3948f0e0
LY		 2550 struct qe_ep *ep;
2551 unsigned int ret = 0;
2552 unsigned int i;
2553 const void *prop;
2554
b1608d69
GL		 2555 match = of_match_device(qe_udc_match, &ofdev->dev);
2556 if (!match)
d35fb641
GL		 2557 return -EINVAL;
2558
3948f0e0
LY		 2559 prop = of_get_property(np, "mode", NULL);
2560 if (!prop || strcmp(prop, "peripheral"))
2561 return -ENODEV;
2562
2563 /* Initialize the udc structure including QH member and other member */
2564 udc_controller = qe_udc_config(ofdev);
2565 if (!udc_controller) {
cd40c4c4 2566 dev_err(&ofdev->dev, "failed to initialize\n");
3948f0e0
LY		 2567 return -ENOMEM;
2568 }
2569
b1608d69 2570 udc_controller->soc_type = (unsigned long)match->data;
3948f0e0
LY		 2571 udc_controller->usb_regs = of_iomap(np, 0);
2572 if (!udc_controller->usb_regs) {
2573 ret = -ENOMEM;
2574 goto err1;
2575 }
2576
2577 /* initialize usb hw reg except for regs for EP,
2578 * leave usbintr reg untouched*/
2579 qe_udc_reg_init(udc_controller);
2580
2581 /* here comes the stand operations for probe
2582 * set the qe_udc->gadget.xxx */
2583 udc_controller->gadget.ops = &qe_gadget_ops;
2584
2585 /* gadget.ep0 is a pointer */
2586 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2587
2588 INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2589
2590 /* modify in register gadget process */
2591 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2592
2593 /* name: Identifies the controller hardware type. */
2594 udc_controller->gadget.name = driver_name;
2595
2596 device_initialize(&udc_controller->gadget.dev);
2597
c682b170 2598 dev_set_name(&udc_controller->gadget.dev, "gadget");
3948f0e0
LY		 2599
2600 udc_controller->gadget.dev.release = qe_udc_release;
2601 udc_controller->gadget.dev.parent = &ofdev->dev;
2602
928dfa6c 2603 /* initialize qe_ep struct */
3948f0e0 2604 for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
928dfa6c 2605 /* because the ep type isn't decide here so
3948f0e0
LY		 2606 * qe_ep_init() should be called in ep_enable() */
2607
2608 /* setup the qe_ep struct and link ep.ep.list
2609 * into gadget.ep_list */
2610 qe_ep_config(udc_controller, (unsigned char)i);
2611 }
2612
2613 /* ep0 initialization in here */
2614 ret = qe_ep_init(udc_controller, 0, &qe_ep0_desc);
2615 if (ret)
2616 goto err2;
2617
928dfa6c 2618 /* create a buf for ZLP send, need to remain zeroed */
3948f0e0
LY		 2619 udc_controller->nullbuf = kzalloc(256, GFP_KERNEL);
2620 if (udc_controller->nullbuf == NULL) {
cd40c4c4 2621 dev_err(udc_controller->dev, "cannot alloc nullbuf\n");
3948f0e0
LY		 2622 ret = -ENOMEM;
2623 goto err3;
2624 }
2625
928dfa6c
LY		 2626 /* buffer for data of get_status request */
2627 udc_controller->statusbuf = kzalloc(2, GFP_KERNEL);
2628 if (udc_controller->statusbuf == NULL) {
2629 ret = -ENOMEM;
2630 goto err4;
2631 }
2632
3948f0e0
LY		 2633 udc_controller->nullp = virt_to_phys((void *)udc_controller->nullbuf);
2634 if (udc_controller->nullp == DMA_ADDR_INVALID) {
2635 udc_controller->nullp = dma_map_single(
2636 udc_controller->gadget.dev.parent,
2637 udc_controller->nullbuf,
2638 256,
2639 DMA_TO_DEVICE);
2640 udc_controller->nullmap = 1;
2641 } else {
2642 dma_sync_single_for_device(udc_controller->gadget.dev.parent,
2643 udc_controller->nullp, 256,
2644 DMA_TO_DEVICE);
2645 }
2646
2647 tasklet_init(&udc_controller->rx_tasklet, ep_rx_tasklet,
2648 (unsigned long)udc_controller);
2649 /* request irq and disable DR */
2650 udc_controller->usb_irq = irq_of_parse_and_map(np, 0);
94f341db
AV		 2651 if (!udc_controller->usb_irq) {
2652 ret = -EINVAL;
2653 goto err_noirq;
2654 }
3948f0e0
LY		 2655
2656 ret = request_irq(udc_controller->usb_irq, qe_udc_irq, 0,
2657 driver_name, udc_controller);
2658 if (ret) {
2659 dev_err(udc_controller->dev, "cannot request irq %d err %d \n",
2660 udc_controller->usb_irq, ret);
928dfa6c 2661 goto err5;
3948f0e0
LY		 2662 }
2663
2664 ret = device_add(&udc_controller->gadget.dev);
2665 if (ret)
928dfa6c 2666 goto err6;
3948f0e0 2667
0f91349b
SAS		 2668 ret = usb_add_gadget_udc(&ofdev->dev, &udc_controller->gadget);
2669 if (ret)
2670 goto err7;
2671
3948f0e0 2672 dev_info(udc_controller->dev,
928dfa6c
LY		 2673 "%s USB controller initialized as device\n",
2674 (udc_controller->soc_type == PORT_QE) ? "QE" : "CPM");
3948f0e0
LY		 2675 return 0;
2676
0f91349b
SAS		 2677err7:
2678 device_unregister(&udc_controller->gadget.dev);
928dfa6c 2679err6:
3948f0e0 2680 free_irq(udc_controller->usb_irq, udc_controller);
928dfa6c 2681err5:
94f341db
AV		 2682 irq_dispose_mapping(udc_controller->usb_irq);
2683err_noirq:
3948f0e0
LY		 2684 if (udc_controller->nullmap) {
2685 dma_unmap_single(udc_controller->gadget.dev.parent,
2686 udc_controller->nullp, 256,
2687 DMA_TO_DEVICE);
2688 udc_controller->nullp = DMA_ADDR_INVALID;
2689 } else {
2690 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2691 udc_controller->nullp, 256,
2692 DMA_TO_DEVICE);
2693 }
928dfa6c
LY		 2694 kfree(udc_controller->statusbuf);
2695err4:
3948f0e0
LY		 2696 kfree(udc_controller->nullbuf);
2697err3:
2698 ep = &udc_controller->eps[0];
2699 cpm_muram_free(cpm_muram_offset(ep->rxbase));
2700 kfree(ep->rxframe);
2701 kfree(ep->rxbuffer);
2702 kfree(ep->txframe);
2703err2:
2704 iounmap(udc_controller->usb_regs);
2705err1:
2706 kfree(udc_controller);
94f341db 2707 udc_controller = NULL;
3948f0e0
LY		 2708 return ret;
2709}
2710
2711#ifdef CONFIG_PM
2dc11581 2712static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
3948f0e0
LY		 2713{
2714 return -ENOTSUPP;
2715}
2716
2dc11581 2717static int qe_udc_resume(struct platform_device *dev)
3948f0e0
LY		 2718{
2719 return -ENOTSUPP;
2720}
2721#endif
2722
2dc11581 2723static int __devexit qe_udc_remove(struct platform_device *ofdev)
3948f0e0
LY		 2724{
2725 struct qe_ep *ep;
2726 unsigned int size;
2727
2728 DECLARE_COMPLETION(done);
2729
2730 if (!udc_controller)
2731 return -ENODEV;
2732
0f91349b
SAS		 2733 usb_del_gadget_udc(&udc_controller->gadget);
2734
3948f0e0
LY		 2735 udc_controller->done = &done;
2736 tasklet_disable(&udc_controller->rx_tasklet);
2737
2738 if (udc_controller->nullmap) {
2739 dma_unmap_single(udc_controller->gadget.dev.parent,
2740 udc_controller->nullp, 256,
2741 DMA_TO_DEVICE);
2742 udc_controller->nullp = DMA_ADDR_INVALID;
2743 } else {
2744 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2745 udc_controller->nullp, 256,
2746 DMA_TO_DEVICE);
2747 }
928dfa6c 2748 kfree(udc_controller->statusbuf);
3948f0e0
LY		 2749 kfree(udc_controller->nullbuf);
2750
2751 ep = &udc_controller->eps[0];
2752 cpm_muram_free(cpm_muram_offset(ep->rxbase));
2753 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
2754
2755 kfree(ep->rxframe);
2756 if (ep->rxbufmap) {
2757 dma_unmap_single(udc_controller->gadget.dev.parent,
2758 ep->rxbuf_d, size,
2759 DMA_FROM_DEVICE);
2760 ep->rxbuf_d = DMA_ADDR_INVALID;
2761 } else {
2762 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2763 ep->rxbuf_d, size,
2764 DMA_FROM_DEVICE);
2765 }
2766
2767 kfree(ep->rxbuffer);
2768 kfree(ep->txframe);
2769
2770 free_irq(udc_controller->usb_irq, udc_controller);
94f341db 2771 irq_dispose_mapping(udc_controller->usb_irq);
3948f0e0
LY		 2772
2773 tasklet_kill(&udc_controller->rx_tasklet);
2774
2775 iounmap(udc_controller->usb_regs);
2776
2777 device_unregister(&udc_controller->gadget.dev);
2778 /* wait for release() of gadget.dev to free udc */
2779 wait_for_completion(&done);
2780
2781 return 0;
2782}
2783
2784/*-------------------------------------------------------------------------*/
07824d3d 2785static const struct of_device_id qe_udc_match[] __devinitconst = {
04c4ab17
AV		 2786 {
2787 .compatible = "fsl,mpc8323-qe-usb",
2788 .data = (void *)PORT_QE,
2789 },
3948f0e0
LY		 2790 {
2791 .compatible = "fsl,mpc8360-qe-usb",
2792 .data = (void *)PORT_QE,
2793 },
2794 {
2795 .compatible = "fsl,mpc8272-cpm-usb",
2796 .data = (void *)PORT_CPM,
2797 },
2798 {},
2799};
2800
2801MODULE_DEVICE_TABLE(of, qe_udc_match);
2802
d35fb641 2803static struct platform_driver udc_driver = {
4018294b
GL		 2804 .driver = {
2805 .name = (char *)driver_name,
2806 .owner = THIS_MODULE,
2807 .of_match_table = qe_udc_match,
2808 },
3948f0e0
LY		 2809 .probe = qe_udc_probe,
2810 .remove = __devexit_p(qe_udc_remove),
2811#ifdef CONFIG_PM
2812 .suspend = qe_udc_suspend,
2813 .resume = qe_udc_resume,
2814#endif
2815};
2816
cc27c96c 2817module_platform_driver(udc_driver);
3948f0e0
LY		 2818
2819MODULE_DESCRIPTION(DRIVER_DESC);
2820MODULE_AUTHOR(DRIVER_AUTHOR);
2821MODULE_LICENSE("GPL");
2822
Linux 6.x block layer and io_uring tree(s)