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usb: gadget: Update atmel_usba_udc to use usb_endpoint_descriptor inside the struct...
[linux-2.6-block.git] / drivers / usb / gadget / fsl_qe_udc.c
CommitLineData
3948f0e0
LY		 1/*
2 * driver/usb/gadget/fsl_qe_udc.c
3 *
4 * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
5 *
6 * Xie Xiaobo <X.Xie@freescale.com>
7 * Li Yang <leoli@freescale.com>
8 * Based on bareboard code from Shlomi Gridish.
9 *
10 * Description:
11 * Freescle QE/CPM USB Pheripheral Controller Driver
12 * The controller can be found on MPC8360, MPC8272, and etc.
13 * MPC8360 Rev 1.1 may need QE mircocode update
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20
21#undef USB_TRACE
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <linux/ioport.h>
27#include <linux/types.h>
28#include <linux/errno.h>
cd40c4c4 29#include <linux/err.h>
3948f0e0
LY		 30#include <linux/slab.h>
31#include <linux/list.h>
32#include <linux/interrupt.h>
33#include <linux/io.h>
34#include <linux/moduleparam.h>
22ae782f 35#include <linux/of_address.h>
3948f0e0
LY		 36#include <linux/of_platform.h>
37#include <linux/dma-mapping.h>
38#include <linux/usb/ch9.h>
39#include <linux/usb/gadget.h>
40#include <linux/usb/otg.h>
41#include <asm/qe.h>
42#include <asm/cpm.h>
43#include <asm/dma.h>
44#include <asm/reg.h>
45#include "fsl_qe_udc.h"
46
47#define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
48#define DRIVER_AUTHOR "Xie XiaoBo"
49#define DRIVER_VERSION "1.0"
50
51#define DMA_ADDR_INVALID (~(dma_addr_t)0)
52
53static const char driver_name[] = "fsl_qe_udc";
54static const char driver_desc[] = DRIVER_DESC;
55
56/*ep name is important in gadget, it should obey the convention of ep_match()*/
57static const char *const ep_name[] = {
58 "ep0-control", /* everyone has ep0 */
59 /* 3 configurable endpoints */
60 "ep1",
61 "ep2",
62 "ep3",
63};
64
65static struct usb_endpoint_descriptor qe_ep0_desc = {
66 .bLength = USB_DT_ENDPOINT_SIZE,
67 .bDescriptorType = USB_DT_ENDPOINT,
68
69 .bEndpointAddress = 0,
70 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
71 .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
72};
73
74/* it is initialized in probe() */
75static struct qe_udc *udc_controller;
76
77/********************************************************************
78 * Internal Used Function Start
79********************************************************************/
80/*-----------------------------------------------------------------
81 * done() - retire a request; caller blocked irqs
82 *--------------------------------------------------------------*/
83static void done(struct qe_ep *ep, struct qe_req *req, int status)
84{
85 struct qe_udc *udc = ep->udc;
86 unsigned char stopped = ep->stopped;
87
88 /* the req->queue pointer is used by ep_queue() func, in which
89 * the request will be added into a udc_ep->queue 'd tail
90 * so here the req will be dropped from the ep->queue
91 */
92 list_del_init(&req->queue);
93
94 /* req.status should be set as -EINPROGRESS in ep_queue() */
95 if (req->req.status == -EINPROGRESS)
96 req->req.status = status;
97 else
98 status = req->req.status;
99
100 if (req->mapped) {
101 dma_unmap_single(udc->gadget.dev.parent,
102 req->req.dma, req->req.length,
103 ep_is_in(ep)
104 ? DMA_TO_DEVICE
105 : DMA_FROM_DEVICE);
106 req->req.dma = DMA_ADDR_INVALID;
107 req->mapped = 0;
108 } else
109 dma_sync_single_for_cpu(udc->gadget.dev.parent,
110 req->req.dma, req->req.length,
111 ep_is_in(ep)
112 ? DMA_TO_DEVICE
113 : DMA_FROM_DEVICE);
114
115 if (status && (status != -ESHUTDOWN))
116 dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
117 ep->ep.name, &req->req, status,
118 req->req.actual, req->req.length);
119
120 /* don't modify queue heads during completion callback */
121 ep->stopped = 1;
122 spin_unlock(&udc->lock);
123
124 /* this complete() should a func implemented by gadget layer,
125 * eg fsg->bulk_in_complete() */
126 if (req->req.complete)
127 req->req.complete(&ep->ep, &req->req);
128
129 spin_lock(&udc->lock);
130
131 ep->stopped = stopped;
132}
133
134/*-----------------------------------------------------------------
135 * nuke(): delete all requests related to this ep
136 *--------------------------------------------------------------*/
137static void nuke(struct qe_ep *ep, int status)
138{
139 /* Whether this eq has request linked */
140 while (!list_empty(&ep->queue)) {
141 struct qe_req *req = NULL;
142 req = list_entry(ep->queue.next, struct qe_req, queue);
143
144 done(ep, req, status);
145 }
146}
147
148/*---------------------------------------------------------------------------*
149 * USB and Endpoint manipulate process, include parameter and register *
150 *---------------------------------------------------------------------------*/
151/* @value: 1--set stall 0--clean stall */
152static int qe_eprx_stall_change(struct qe_ep *ep, int value)
153{
154 u16 tem_usep;
155 u8 epnum = ep->epnum;
156 struct qe_udc *udc = ep->udc;
157
158 tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
159 tem_usep = tem_usep & ~USB_RHS_MASK;
160 if (value == 1)
161 tem_usep |= USB_RHS_STALL;
162 else if (ep->dir == USB_DIR_IN)
163 tem_usep |= USB_RHS_IGNORE_OUT;
164
165 out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
166 return 0;
167}
168
169static int qe_eptx_stall_change(struct qe_ep *ep, int value)
170{
171 u16 tem_usep;
172 u8 epnum = ep->epnum;
173 struct qe_udc *udc = ep->udc;
174
175 tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
176 tem_usep = tem_usep & ~USB_THS_MASK;
177 if (value == 1)
178 tem_usep |= USB_THS_STALL;
179 else if (ep->dir == USB_DIR_OUT)
180 tem_usep |= USB_THS_IGNORE_IN;
181
182 out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
183
184 return 0;
185}
186
187static int qe_ep0_stall(struct qe_udc *udc)
188{
189 qe_eptx_stall_change(&udc->eps[0], 1);
190 qe_eprx_stall_change(&udc->eps[0], 1);
191 udc_controller->ep0_state = WAIT_FOR_SETUP;
192 udc_controller->ep0_dir = 0;
193 return 0;
194}
195
196static int qe_eprx_nack(struct qe_ep *ep)
197{
198 u8 epnum = ep->epnum;
199 struct qe_udc *udc = ep->udc;
200
201 if (ep->state == EP_STATE_IDLE) {
202 /* Set the ep's nack */
203 clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
204 USB_RHS_MASK, USB_RHS_NACK);
205
206 /* Mask Rx and Busy interrupts */
207 clrbits16(&udc->usb_regs->usb_usbmr,
208 (USB_E_RXB_MASK | USB_E_BSY_MASK));
209
210 ep->state = EP_STATE_NACK;
211 }
212 return 0;
213}
214
215static int qe_eprx_normal(struct qe_ep *ep)
216{
217 struct qe_udc *udc = ep->udc;
218
219 if (ep->state == EP_STATE_NACK) {
220 clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
221 USB_RTHS_MASK, USB_THS_IGNORE_IN);
222
223 /* Unmask RX interrupts */
224 out_be16(&udc->usb_regs->usb_usber,
225 USB_E_BSY_MASK | USB_E_RXB_MASK);
226 setbits16(&udc->usb_regs->usb_usbmr,
227 (USB_E_RXB_MASK | USB_E_BSY_MASK));
228
229 ep->state = EP_STATE_IDLE;
230 ep->has_data = 0;
231 }
232
233 return 0;
234}
235
236static int qe_ep_cmd_stoptx(struct qe_ep *ep)
237{
238 if (ep->udc->soc_type == PORT_CPM)
239 cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
240 CPM_USB_STOP_TX_OPCODE);
241 else
242 qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
243 ep->epnum, 0);
244
245 return 0;
246}
247
248static int qe_ep_cmd_restarttx(struct qe_ep *ep)
249{
250 if (ep->udc->soc_type == PORT_CPM)
251 cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
252 CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
253 else
254 qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
255 ep->epnum, 0);
256
257 return 0;
258}
259
260static int qe_ep_flushtxfifo(struct qe_ep *ep)
261{
262 struct qe_udc *udc = ep->udc;
263 int i;
264
265 i = (int)ep->epnum;
266
267 qe_ep_cmd_stoptx(ep);
268 out_8(&udc->usb_regs->usb_uscom,
269 USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
270 out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
271 out_be32(&udc->ep_param[i]->tstate, 0);
272 out_be16(&udc->ep_param[i]->tbcnt, 0);
273
274 ep->c_txbd = ep->txbase;
275 ep->n_txbd = ep->txbase;
276 qe_ep_cmd_restarttx(ep);
277 return 0;
278}
279
280static int qe_ep_filltxfifo(struct qe_ep *ep)
281{
282 struct qe_udc *udc = ep->udc;
283
284 out_8(&udc->usb_regs->usb_uscom,
285 USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
286 return 0;
287}
288
289static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
290{
291 struct qe_ep *ep;
292 u32 bdring_len;
293 struct qe_bd __iomem *bd;
294 int i;
295
296 ep = &udc->eps[pipe_num];
297
298 if (ep->dir == USB_DIR_OUT)
299 bdring_len = USB_BDRING_LEN_RX;
300 else
301 bdring_len = USB_BDRING_LEN;
302
303 bd = ep->rxbase;
304 for (i = 0; i < (bdring_len - 1); i++) {
305 out_be32((u32 __iomem *)bd, R_E | R_I);
306 bd++;
307 }
308 out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
309
310 bd = ep->txbase;
311 for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
312 out_be32(&bd->buf, 0);
313 out_be32((u32 __iomem *)bd, 0);
314 bd++;
315 }
316 out_be32((u32 __iomem *)bd, T_W);
317
318 return 0;
319}
320
321static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
322{
323 struct qe_ep *ep;
324 u16 tmpusep;
325
326 ep = &udc->eps[pipe_num];
327 tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
328 tmpusep &= ~USB_RTHS_MASK;
329
330 switch (ep->dir) {
331 case USB_DIR_BOTH:
332 qe_ep_flushtxfifo(ep);
333 break;
334 case USB_DIR_OUT:
335 tmpusep |= USB_THS_IGNORE_IN;
336 break;
337 case USB_DIR_IN:
338 qe_ep_flushtxfifo(ep);
339 tmpusep |= USB_RHS_IGNORE_OUT;
340 break;
341 default:
342 break;
343 }
344 out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
345
346 qe_epbds_reset(udc, pipe_num);
347
348 return 0;
349}
350
351static int qe_ep_toggledata01(struct qe_ep *ep)
352{
353 ep->data01 ^= 0x1;
354 return 0;
355}
356
357static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
358{
359 struct qe_ep *ep = &udc->eps[pipe_num];
360 unsigned long tmp_addr = 0;
361 struct usb_ep_para __iomem *epparam;
362 int i;
363 struct qe_bd __iomem *bd;
364 int bdring_len;
365
366 if (ep->dir == USB_DIR_OUT)
367 bdring_len = USB_BDRING_LEN_RX;
368 else
369 bdring_len = USB_BDRING_LEN;
370
371 epparam = udc->ep_param[pipe_num];
372 /* alloc multi-ram for BD rings and set the ep parameters */
373 tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
374 USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
cd40c4c4
AV		 375 if (IS_ERR_VALUE(tmp_addr))
376 return -ENOMEM;
377
3948f0e0
LY		 378 out_be16(&epparam->rbase, (u16)tmp_addr);
379 out_be16(&epparam->tbase, (u16)(tmp_addr +
380 (sizeof(struct qe_bd) * bdring_len)));
381
382 out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
383 out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
384
385 ep->rxbase = cpm_muram_addr(tmp_addr);
386 ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
387 * bdring_len));
388 ep->n_rxbd = ep->rxbase;
389 ep->e_rxbd = ep->rxbase;
390 ep->n_txbd = ep->txbase;
391 ep->c_txbd = ep->txbase;
392 ep->data01 = 0; /* data0 */
393
394 /* Init TX and RX bds */
395 bd = ep->rxbase;
396 for (i = 0; i < bdring_len - 1; i++) {
397 out_be32(&bd->buf, 0);
398 out_be32((u32 __iomem *)bd, 0);
399 bd++;
400 }
401 out_be32(&bd->buf, 0);
402 out_be32((u32 __iomem *)bd, R_W);
403
404 bd = ep->txbase;
405 for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
406 out_be32(&bd->buf, 0);
407 out_be32((u32 __iomem *)bd, 0);
408 bd++;
409 }
410 out_be32(&bd->buf, 0);
411 out_be32((u32 __iomem *)bd, T_W);
412
413 return 0;
414}
415
416static int qe_ep_rxbd_update(struct qe_ep *ep)
417{
418 unsigned int size;
419 int i;
420 unsigned int tmp;
421 struct qe_bd __iomem *bd;
422 unsigned int bdring_len;
423
424 if (ep->rxbase == NULL)
425 return -EINVAL;
426
427 bd = ep->rxbase;
428
429 ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
430 if (ep->rxframe == NULL) {
431 dev_err(ep->udc->dev, "malloc rxframe failed\n");
432 return -ENOMEM;
433 }
434
435 qe_frame_init(ep->rxframe);
436
437 if (ep->dir == USB_DIR_OUT)
438 bdring_len = USB_BDRING_LEN_RX;
439 else
440 bdring_len = USB_BDRING_LEN;
441
442 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
443 ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
444 if (ep->rxbuffer == NULL) {
445 dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
446 size);
447 kfree(ep->rxframe);
448 return -ENOMEM;
449 }
450
451 ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
452 if (ep->rxbuf_d == DMA_ADDR_INVALID) {
453 ep->rxbuf_d = dma_map_single(udc_controller->gadget.dev.parent,
454 ep->rxbuffer,
455 size,
456 DMA_FROM_DEVICE);
457 ep->rxbufmap = 1;
458 } else {
459 dma_sync_single_for_device(udc_controller->gadget.dev.parent,
460 ep->rxbuf_d, size,
461 DMA_FROM_DEVICE);
462 ep->rxbufmap = 0;
463 }
464
465 size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
466 tmp = ep->rxbuf_d;
467 tmp = (u32)(((tmp >> 2) << 2) + 4);
468
469 for (i = 0; i < bdring_len - 1; i++) {
470 out_be32(&bd->buf, tmp);
471 out_be32((u32 __iomem *)bd, (R_E | R_I));
472 tmp = tmp + size;
473 bd++;
474 }
475 out_be32(&bd->buf, tmp);
476 out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
477
478 return 0;
479}
480
481static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
482{
483 struct qe_ep *ep = &udc->eps[pipe_num];
484 struct usb_ep_para __iomem *epparam;
485 u16 usep, logepnum;
486 u16 tmp;
487 u8 rtfcr = 0;
488
489 epparam = udc->ep_param[pipe_num];
490
491 usep = 0;
492 logepnum = (ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
493 usep |= (logepnum << USB_EPNUM_SHIFT);
494
495 switch (ep->desc->bmAttributes & 0x03) {
496 case USB_ENDPOINT_XFER_BULK:
497 usep |= USB_TRANS_BULK;
498 break;
499 case USB_ENDPOINT_XFER_ISOC:
500 usep |= USB_TRANS_ISO;
501 break;
502 case USB_ENDPOINT_XFER_INT:
503 usep |= USB_TRANS_INT;
504 break;
505 default:
506 usep |= USB_TRANS_CTR;
507 break;
508 }
509
510 switch (ep->dir) {
511 case USB_DIR_OUT:
512 usep |= USB_THS_IGNORE_IN;
513 break;
514 case USB_DIR_IN:
515 usep |= USB_RHS_IGNORE_OUT;
516 break;
517 default:
518 break;
519 }
520 out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
521
522 rtfcr = 0x30;
523 out_8(&epparam->rbmr, rtfcr);
524 out_8(&epparam->tbmr, rtfcr);
525
526 tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
527 /* MRBLR must be divisble by 4 */
528 tmp = (u16)(((tmp >> 2) << 2) + 4);
529 out_be16(&epparam->mrblr, tmp);
530
531 return 0;
532}
533
534static int qe_ep_init(struct qe_udc *udc,
535 unsigned char pipe_num,
536 const struct usb_endpoint_descriptor *desc)
537{
538 struct qe_ep *ep = &udc->eps[pipe_num];
539 unsigned long flags;
540 int reval = 0;
541 u16 max = 0;
542
29cc8897 543 max = usb_endpoint_maxp(desc);
3948f0e0
LY		 544
545 /* check the max package size validate for this endpoint */
546 /* Refer to USB2.0 spec table 9-13,
547 */
548 if (pipe_num != 0) {
549 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
550 case USB_ENDPOINT_XFER_BULK:
551 if (strstr(ep->ep.name, "-iso")
552 || strstr(ep->ep.name, "-int"))
553 goto en_done;
554 switch (udc->gadget.speed) {
555 case USB_SPEED_HIGH:
556 if ((max == 128) || (max == 256) || (max == 512))
557 break;
558 default:
559 switch (max) {
560 case 4:
561 case 8:
562 case 16:
563 case 32:
564 case 64:
565 break;
566 default:
567 case USB_SPEED_LOW:
568 goto en_done;
569 }
570 }
571 break;
572 case USB_ENDPOINT_XFER_INT:
573 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
574 goto en_done;
575 switch (udc->gadget.speed) {
576 case USB_SPEED_HIGH:
577 if (max <= 1024)
578 break;
579 case USB_SPEED_FULL:
580 if (max <= 64)
581 break;
582 default:
583 if (max <= 8)
584 break;
585 goto en_done;
586 }
587 break;
588 case USB_ENDPOINT_XFER_ISOC:
589 if (strstr(ep->ep.name, "-bulk")
590 || strstr(ep->ep.name, "-int"))
591 goto en_done;
592 switch (udc->gadget.speed) {
593 case USB_SPEED_HIGH:
594 if (max <= 1024)
595 break;
596 case USB_SPEED_FULL:
597 if (max <= 1023)
598 break;
599 default:
600 goto en_done;
601 }
602 break;
603 case USB_ENDPOINT_XFER_CONTROL:
604 if (strstr(ep->ep.name, "-iso")
605 || strstr(ep->ep.name, "-int"))
606 goto en_done;
607 switch (udc->gadget.speed) {
608 case USB_SPEED_HIGH:
609 case USB_SPEED_FULL:
610 switch (max) {
611 case 1:
612 case 2:
613 case 4:
614 case 8:
615 case 16:
616 case 32:
617 case 64:
618 break;
619 default:
620 goto en_done;
621 }
622 case USB_SPEED_LOW:
623 switch (max) {
624 case 1:
625 case 2:
626 case 4:
627 case 8:
628 break;
629 default:
630 goto en_done;
631 }
632 default:
633 goto en_done;
634 }
635 break;
636
637 default:
638 goto en_done;
639 }
640 } /* if ep0*/
641
642 spin_lock_irqsave(&udc->lock, flags);
643
644 /* initialize ep structure */
645 ep->ep.maxpacket = max;
646 ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
647 ep->desc = desc;
648 ep->stopped = 0;
649 ep->init = 1;
650
651 if (pipe_num == 0) {
652 ep->dir = USB_DIR_BOTH;
653 udc->ep0_dir = USB_DIR_OUT;
654 udc->ep0_state = WAIT_FOR_SETUP;
655 } else {
656 switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
657 case USB_DIR_OUT:
658 ep->dir = USB_DIR_OUT;
659 break;
660 case USB_DIR_IN:
661 ep->dir = USB_DIR_IN;
662 default:
663 break;
664 }
665 }
666
667 /* hardware special operation */
668 qe_ep_bd_init(udc, pipe_num);
669 if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
670 reval = qe_ep_rxbd_update(ep);
671 if (reval)
672 goto en_done1;
673 }
674
675 if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
676 ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
677 if (ep->txframe == NULL) {
678 dev_err(udc->dev, "malloc txframe failed\n");
679 goto en_done2;
680 }
681 qe_frame_init(ep->txframe);
682 }
683
684 qe_ep_register_init(udc, pipe_num);
685
686 /* Now HW will be NAKing transfers to that EP,
687 * until a buffer is queued to it. */
688 spin_unlock_irqrestore(&udc->lock, flags);
689
690 return 0;
691en_done2:
692 kfree(ep->rxbuffer);
693 kfree(ep->rxframe);
694en_done1:
695 spin_unlock_irqrestore(&udc->lock, flags);
696en_done:
cd40c4c4 697 dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
3948f0e0
LY		 698 return -ENODEV;
699}
700
701static inline void qe_usb_enable(void)
702{
703 setbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
704}
705
706static inline void qe_usb_disable(void)
707{
708 clrbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
709}
710
711/*----------------------------------------------------------------------------*
712 * USB and EP basic manipulate function end *
713 *----------------------------------------------------------------------------*/
714
715
716/******************************************************************************
717 UDC transmit and receive process
718 ******************************************************************************/
719static void recycle_one_rxbd(struct qe_ep *ep)
720{
721 u32 bdstatus;
722
723 bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
724 bdstatus = R_I | R_E | (bdstatus & R_W);
725 out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
726
727 if (bdstatus & R_W)
728 ep->e_rxbd = ep->rxbase;
729 else
730 ep->e_rxbd++;
731}
732
733static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
734{
735 u32 bdstatus;
736 struct qe_bd __iomem *bd, *nextbd;
737 unsigned char stop = 0;
738
739 nextbd = ep->n_rxbd;
740 bd = ep->e_rxbd;
741 bdstatus = in_be32((u32 __iomem *)bd);
742
743 while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
744 bdstatus = R_E | R_I | (bdstatus & R_W);
745 out_be32((u32 __iomem *)bd, bdstatus);
746
747 if (bdstatus & R_W)
748 bd = ep->rxbase;
749 else
750 bd++;
751
752 bdstatus = in_be32((u32 __iomem *)bd);
753 if (stopatnext && (bd == nextbd))
754 stop = 1;
755 }
756
757 ep->e_rxbd = bd;
758}
759
760static void ep_recycle_rxbds(struct qe_ep *ep)
761{
762 struct qe_bd __iomem *bd = ep->n_rxbd;
763 u32 bdstatus;
764 u8 epnum = ep->epnum;
765 struct qe_udc *udc = ep->udc;
766
767 bdstatus = in_be32((u32 __iomem *)bd);
768 if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
769 bd = ep->rxbase +
770 ((in_be16(&udc->ep_param[epnum]->rbptr) -
771 in_be16(&udc->ep_param[epnum]->rbase))
772 >> 3);
773 bdstatus = in_be32((u32 __iomem *)bd);
774
775 if (bdstatus & R_W)
776 bd = ep->rxbase;
777 else
778 bd++;
779
780 ep->e_rxbd = bd;
781 recycle_rxbds(ep, 0);
782 ep->e_rxbd = ep->n_rxbd;
783 } else
784 recycle_rxbds(ep, 1);
785
786 if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
787 out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
788
789 if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
790 qe_eprx_normal(ep);
791
792 ep->localnack = 0;
793}
794
795static void setup_received_handle(struct qe_udc *udc,
796 struct usb_ctrlrequest *setup);
797static int qe_ep_rxframe_handle(struct qe_ep *ep);
798static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
799/* when BD PID is setup, handle the packet */
800static int ep0_setup_handle(struct qe_udc *udc)
801{
802 struct qe_ep *ep = &udc->eps[0];
803 struct qe_frame *pframe;
804 unsigned int fsize;
805 u8 *cp;
806
807 pframe = ep->rxframe;
808 if ((frame_get_info(pframe) & PID_SETUP)
809 && (udc->ep0_state == WAIT_FOR_SETUP)) {
810 fsize = frame_get_length(pframe);
811 if (unlikely(fsize != 8))
812 return -EINVAL;
813 cp = (u8 *)&udc->local_setup_buff;
814 memcpy(cp, pframe->data, fsize);
815 ep->data01 = 1;
816
817 /* handle the usb command base on the usb_ctrlrequest */
818 setup_received_handle(udc, &udc->local_setup_buff);
819 return 0;
820 }
821 return -EINVAL;
822}
823
824static int qe_ep0_rx(struct qe_udc *udc)
825{
826 struct qe_ep *ep = &udc->eps[0];
827 struct qe_frame *pframe;
828 struct qe_bd __iomem *bd;
829 u32 bdstatus, length;
830 u32 vaddr;
831
832 pframe = ep->rxframe;
833
834 if (ep->dir == USB_DIR_IN) {
835 dev_err(udc->dev, "ep0 not a control endpoint\n");
836 return -EINVAL;
837 }
838
839 bd = ep->n_rxbd;
840 bdstatus = in_be32((u32 __iomem *)bd);
841 length = bdstatus & BD_LENGTH_MASK;
842
843 while (!(bdstatus & R_E) && length) {
844 if ((bdstatus & R_F) && (bdstatus & R_L)
845 && !(bdstatus & R_ERROR)) {
846 if (length == USB_CRC_SIZE) {
847 udc->ep0_state = WAIT_FOR_SETUP;
848 dev_vdbg(udc->dev,
849 "receive a ZLP in status phase\n");
850 } else {
851 qe_frame_clean(pframe);
852 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
853 frame_set_data(pframe, (u8 *)vaddr);
854 frame_set_length(pframe,
855 (length - USB_CRC_SIZE));
856 frame_set_status(pframe, FRAME_OK);
857 switch (bdstatus & R_PID) {
858 case R_PID_SETUP:
859 frame_set_info(pframe, PID_SETUP);
860 break;
861 case R_PID_DATA1:
862 frame_set_info(pframe, PID_DATA1);
863 break;
864 default:
865 frame_set_info(pframe, PID_DATA0);
866 break;
867 }
868
869 if ((bdstatus & R_PID) == R_PID_SETUP)
870 ep0_setup_handle(udc);
871 else
872 qe_ep_rxframe_handle(ep);
873 }
874 } else {
875 dev_err(udc->dev, "The receive frame with error!\n");
876 }
877
878 /* note: don't clear the rxbd's buffer address */
879 recycle_one_rxbd(ep);
880
881 /* Get next BD */
882 if (bdstatus & R_W)
883 bd = ep->rxbase;
884 else
885 bd++;
886
887 bdstatus = in_be32((u32 __iomem *)bd);
888 length = bdstatus & BD_LENGTH_MASK;
889
890 }
891
892 ep->n_rxbd = bd;
893
894 return 0;
895}
896
897static int qe_ep_rxframe_handle(struct qe_ep *ep)
898{
899 struct qe_frame *pframe;
900 u8 framepid = 0;
901 unsigned int fsize;
902 u8 *cp;
903 struct qe_req *req;
904
905 pframe = ep->rxframe;
906
907 if (frame_get_info(pframe) & PID_DATA1)
908 framepid = 0x1;
909
910 if (framepid != ep->data01) {
911 dev_err(ep->udc->dev, "the data01 error!\n");
912 return -EIO;
913 }
914
915 fsize = frame_get_length(pframe);
916 if (list_empty(&ep->queue)) {
917 dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
918 } else {
919 req = list_entry(ep->queue.next, struct qe_req, queue);
920
921 cp = (u8 *)(req->req.buf) + req->req.actual;
922 if (cp) {
923 memcpy(cp, pframe->data, fsize);
924 req->req.actual += fsize;
925 if ((fsize < ep->ep.maxpacket) ||
926 (req->req.actual >= req->req.length)) {
927 if (ep->epnum == 0)
928 ep0_req_complete(ep->udc, req);
929 else
930 done(ep, req, 0);
931 if (list_empty(&ep->queue) && ep->epnum != 0)
932 qe_eprx_nack(ep);
933 }
934 }
935 }
936
937 qe_ep_toggledata01(ep);
938
939 return 0;
940}
941
942static void ep_rx_tasklet(unsigned long data)
943{
944 struct qe_udc *udc = (struct qe_udc *)data;
945 struct qe_ep *ep;
946 struct qe_frame *pframe;
947 struct qe_bd __iomem *bd;
948 unsigned long flags;
949 u32 bdstatus, length;
950 u32 vaddr, i;
951
952 spin_lock_irqsave(&udc->lock, flags);
953
954 for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
955 ep = &udc->eps[i];
956
957 if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
958 dev_dbg(udc->dev,
959 "This is a transmit ep or disable tasklet!\n");
960 continue;
961 }
962
963 pframe = ep->rxframe;
964 bd = ep->n_rxbd;
965 bdstatus = in_be32((u32 __iomem *)bd);
966 length = bdstatus & BD_LENGTH_MASK;
967
968 while (!(bdstatus & R_E) && length) {
969 if (list_empty(&ep->queue)) {
970 qe_eprx_nack(ep);
971 dev_dbg(udc->dev,
972 "The rxep have noreq %d\n",
973 ep->has_data);
974 break;
975 }
976
977 if ((bdstatus & R_F) && (bdstatus & R_L)
978 && !(bdstatus & R_ERROR)) {
979 qe_frame_clean(pframe);
980 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
981 frame_set_data(pframe, (u8 *)vaddr);
982 frame_set_length(pframe,
983 (length - USB_CRC_SIZE));
984 frame_set_status(pframe, FRAME_OK);
985 switch (bdstatus & R_PID) {
986 case R_PID_DATA1:
987 frame_set_info(pframe, PID_DATA1);
988 break;
989 case R_PID_SETUP:
990 frame_set_info(pframe, PID_SETUP);
991 break;
992 default:
993 frame_set_info(pframe, PID_DATA0);
994 break;
995 }
996 /* handle the rx frame */
997 qe_ep_rxframe_handle(ep);
998 } else {
999 dev_err(udc->dev,
1000 "error in received frame\n");
1001 }
1002 /* note: don't clear the rxbd's buffer address */
1003 /*clear the length */
1004 out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
1005 ep->has_data--;
1006 if (!(ep->localnack))
1007 recycle_one_rxbd(ep);
1008
1009 /* Get next BD */
1010 if (bdstatus & R_W)
1011 bd = ep->rxbase;
1012 else
1013 bd++;
1014
1015 bdstatus = in_be32((u32 __iomem *)bd);
1016 length = bdstatus & BD_LENGTH_MASK;
1017 }
1018
1019 ep->n_rxbd = bd;
1020
1021 if (ep->localnack)
1022 ep_recycle_rxbds(ep);
1023
1024 ep->enable_tasklet = 0;
1025 } /* for i=1 */
1026
1027 spin_unlock_irqrestore(&udc->lock, flags);
1028}
1029
1030static int qe_ep_rx(struct qe_ep *ep)
1031{
1032 struct qe_udc *udc;
1033 struct qe_frame *pframe;
1034 struct qe_bd __iomem *bd;
1035 u16 swoffs, ucoffs, emptybds;
1036
1037 udc = ep->udc;
1038 pframe = ep->rxframe;
1039
1040 if (ep->dir == USB_DIR_IN) {
1041 dev_err(udc->dev, "transmit ep in rx function\n");
1042 return -EINVAL;
1043 }
1044
1045 bd = ep->n_rxbd;
1046
1047 swoffs = (u16)(bd - ep->rxbase);
1048 ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
1049 in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
1050 if (swoffs < ucoffs)
1051 emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
1052 else
1053 emptybds = swoffs - ucoffs;
1054
1055 if (emptybds < MIN_EMPTY_BDS) {
1056 qe_eprx_nack(ep);
1057 ep->localnack = 1;
1058 dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
1059 }
1060 ep->has_data = USB_BDRING_LEN_RX - emptybds;
1061
1062 if (list_empty(&ep->queue)) {
1063 qe_eprx_nack(ep);
1064 dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
1065 ep->has_data);
1066 return 0;
1067 }
1068
1069 tasklet_schedule(&udc->rx_tasklet);
1070 ep->enable_tasklet = 1;
1071
1072 return 0;
1073}
1074
1075/* send data from a frame, no matter what tx_req */
1076static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
1077{
1078 struct qe_udc *udc = ep->udc;
1079 struct qe_bd __iomem *bd;
1080 u16 saveusbmr;
1081 u32 bdstatus, pidmask;
1082 u32 paddr;
1083
1084 if (ep->dir == USB_DIR_OUT) {
1085 dev_err(udc->dev, "receive ep passed to tx function\n");
1086 return -EINVAL;
1087 }
1088
1089 /* Disable the Tx interrupt */
1090 saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
1091 out_be16(&udc->usb_regs->usb_usbmr,
1092 saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
1093
1094 bd = ep->n_txbd;
1095 bdstatus = in_be32((u32 __iomem *)bd);
1096
1097 if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
1098 if (frame_get_length(frame) == 0) {
1099 frame_set_data(frame, udc->nullbuf);
1100 frame_set_length(frame, 2);
1101 frame->info |= (ZLP | NO_CRC);
1102 dev_vdbg(udc->dev, "the frame size = 0\n");
1103 }
1104 paddr = virt_to_phys((void *)frame->data);
1105 out_be32(&bd->buf, paddr);
1106 bdstatus = (bdstatus&T_W);
1107 if (!(frame_get_info(frame) & NO_CRC))
1108 bdstatus |= T_R | T_I | T_L | T_TC
1109 | frame_get_length(frame);
1110 else
1111 bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
1112
1113 /* if the packet is a ZLP in status phase */
1114 if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
1115 ep->data01 = 0x1;
1116
1117 if (ep->data01) {
1118 pidmask = T_PID_DATA1;
1119 frame->info |= PID_DATA1;
1120 } else {
1121 pidmask = T_PID_DATA0;
1122 frame->info |= PID_DATA0;
1123 }
1124 bdstatus |= T_CNF;
1125 bdstatus |= pidmask;
1126 out_be32((u32 __iomem *)bd, bdstatus);
1127 qe_ep_filltxfifo(ep);
1128
1129 /* enable the TX interrupt */
1130 out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
1131
1132 qe_ep_toggledata01(ep);
1133 if (bdstatus & T_W)
1134 ep->n_txbd = ep->txbase;
1135 else
1136 ep->n_txbd++;
1137
1138 return 0;
1139 } else {
1140 out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
1141 dev_vdbg(udc->dev, "The tx bd is not ready!\n");
1142 return -EBUSY;
1143 }
1144}
1145
928dfa6c 1146/* when a bd was transmitted, the function can
3948f0e0
LY		 1147 * handle the tx_req, not include ep0 */
1148static int txcomplete(struct qe_ep *ep, unsigned char restart)
1149{
1150 if (ep->tx_req != NULL) {
d834508e
VL		 1151 struct qe_req *req = ep->tx_req;
1152 unsigned zlp = 0, last_len = 0;
1153
1154 last_len = min_t(unsigned, req->req.length - ep->sent,
1155 ep->ep.maxpacket);
1156
3948f0e0
LY		 1157 if (!restart) {
1158 int asent = ep->last;
1159 ep->sent += asent;
1160 ep->last -= asent;
1161 } else {
1162 ep->last = 0;
1163 }
1164
d834508e
VL		 1165 /* zlp needed when req->re.zero is set */
1166 if (req->req.zero) {
1167 if (last_len == 0 ||
1168 (req->req.length % ep->ep.maxpacket) != 0)
1169 zlp = 0;
1170 else
1171 zlp = 1;
1172 } else
1173 zlp = 0;
1174
3948f0e0 1175 /* a request already were transmitted completely */
d834508e 1176 if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
3948f0e0
LY		 1177 done(ep, ep->tx_req, 0);
1178 ep->tx_req = NULL;
1179 ep->last = 0;
1180 ep->sent = 0;
1181 }
1182 }
1183
1184 /* we should gain a new tx_req fot this endpoint */
1185 if (ep->tx_req == NULL) {
1186 if (!list_empty(&ep->queue)) {
1187 ep->tx_req = list_entry(ep->queue.next, struct qe_req,
1188 queue);
1189 ep->last = 0;
1190 ep->sent = 0;
1191 }
1192 }
1193
1194 return 0;
1195}
1196
928dfa6c 1197/* give a frame and a tx_req, send some data */
3948f0e0
LY		 1198static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
1199{
1200 unsigned int size;
1201 u8 *buf;
1202
1203 qe_frame_clean(frame);
1204 size = min_t(u32, (ep->tx_req->req.length - ep->sent),
1205 ep->ep.maxpacket);
1206 buf = (u8 *)ep->tx_req->req.buf + ep->sent;
1207 if (buf && size) {
1208 ep->last = size;
d834508e 1209 ep->tx_req->req.actual += size;
3948f0e0
LY		 1210 frame_set_data(frame, buf);
1211 frame_set_length(frame, size);
1212 frame_set_status(frame, FRAME_OK);
1213 frame_set_info(frame, 0);
1214 return qe_ep_tx(ep, frame);
1215 }
1216 return -EIO;
1217}
1218
1219/* give a frame struct,send a ZLP */
1220static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
1221{
1222 struct qe_udc *udc = ep->udc;
1223
1224 if (frame == NULL)
1225 return -ENODEV;
1226
1227 qe_frame_clean(frame);
1228 frame_set_data(frame, (u8 *)udc->nullbuf);
1229 frame_set_length(frame, 2);
1230 frame_set_status(frame, FRAME_OK);
1231 frame_set_info(frame, (ZLP | NO_CRC | infor));
1232
1233 return qe_ep_tx(ep, frame);
1234}
1235
1236static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
1237{
1238 struct qe_req *req = ep->tx_req;
1239 int reval;
1240
1241 if (req == NULL)
1242 return -ENODEV;
1243
1244 if ((req->req.length - ep->sent) > 0)
1245 reval = qe_usb_senddata(ep, frame);
1246 else
1247 reval = sendnulldata(ep, frame, 0);
1248
1249 return reval;
1250}
1251
1252/* if direction is DIR_IN, the status is Device->Host
1253 * if direction is DIR_OUT, the status transaction is Device<-Host
1254 * in status phase, udc create a request and gain status */
1255static int ep0_prime_status(struct qe_udc *udc, int direction)
1256{
1257
1258 struct qe_ep *ep = &udc->eps[0];
1259
1260 if (direction == USB_DIR_IN) {
1261 udc->ep0_state = DATA_STATE_NEED_ZLP;
1262 udc->ep0_dir = USB_DIR_IN;
1263 sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
1264 } else {
1265 udc->ep0_dir = USB_DIR_OUT;
1266 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1267 }
1268
1269 return 0;
1270}
1271
1272/* a request complete in ep0, whether gadget request or udc request */
1273static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
1274{
1275 struct qe_ep *ep = &udc->eps[0];
1276 /* because usb and ep's status already been set in ch9setaddress() */
1277
1278 switch (udc->ep0_state) {
1279 case DATA_STATE_XMIT:
1280 done(ep, req, 0);
1281 /* receive status phase */
1282 if (ep0_prime_status(udc, USB_DIR_OUT))
1283 qe_ep0_stall(udc);
1284 break;
1285
1286 case DATA_STATE_NEED_ZLP:
1287 done(ep, req, 0);
1288 udc->ep0_state = WAIT_FOR_SETUP;
1289 break;
1290
1291 case DATA_STATE_RECV:
1292 done(ep, req, 0);
1293 /* send status phase */
1294 if (ep0_prime_status(udc, USB_DIR_IN))
1295 qe_ep0_stall(udc);
1296 break;
1297
1298 case WAIT_FOR_OUT_STATUS:
1299 done(ep, req, 0);
1300 udc->ep0_state = WAIT_FOR_SETUP;
1301 break;
1302
1303 case WAIT_FOR_SETUP:
1304 dev_vdbg(udc->dev, "Unexpected interrupt\n");
1305 break;
1306
1307 default:
1308 qe_ep0_stall(udc);
1309 break;
1310 }
1311}
1312
1313static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
1314{
1315 struct qe_req *tx_req = NULL;
1316 struct qe_frame *frame = ep->txframe;
1317
1318 if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
1319 if (!restart)
1320 ep->udc->ep0_state = WAIT_FOR_SETUP;
1321 else
1322 sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
1323 return 0;
1324 }
1325
1326 tx_req = ep->tx_req;
1327 if (tx_req != NULL) {
1328 if (!restart) {
1329 int asent = ep->last;
1330 ep->sent += asent;
1331 ep->last -= asent;
1332 } else {
1333 ep->last = 0;
1334 }
1335
1336 /* a request already were transmitted completely */
1337 if ((ep->tx_req->req.length - ep->sent) <= 0) {
1338 ep->tx_req->req.actual = (unsigned int)ep->sent;
1339 ep0_req_complete(ep->udc, ep->tx_req);
1340 ep->tx_req = NULL;
1341 ep->last = 0;
1342 ep->sent = 0;
1343 }
1344 } else {
1345 dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
1346 }
1347
1348 return 0;
1349}
1350
1351static int ep0_txframe_handle(struct qe_ep *ep)
1352{
1353 /* if have error, transmit again */
1354 if (frame_get_status(ep->txframe) & FRAME_ERROR) {
1355 qe_ep_flushtxfifo(ep);
1356 dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
1357 if (frame_get_info(ep->txframe) & PID_DATA0)
1358 ep->data01 = 0;
1359 else
1360 ep->data01 = 1;
1361
1362 ep0_txcomplete(ep, 1);
1363 } else
1364 ep0_txcomplete(ep, 0);
1365
1366 frame_create_tx(ep, ep->txframe);
1367 return 0;
1368}
1369
1370static int qe_ep0_txconf(struct qe_ep *ep)
1371{
1372 struct qe_bd __iomem *bd;
1373 struct qe_frame *pframe;
1374 u32 bdstatus;
1375
1376 bd = ep->c_txbd;
1377 bdstatus = in_be32((u32 __iomem *)bd);
1378 while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
1379 pframe = ep->txframe;
1380
1381 /* clear and recycle the BD */
1382 out_be32((u32 __iomem *)bd, bdstatus & T_W);
1383 out_be32(&bd->buf, 0);
1384 if (bdstatus & T_W)
1385 ep->c_txbd = ep->txbase;
1386 else
1387 ep->c_txbd++;
1388
1389 if (ep->c_txbd == ep->n_txbd) {
1390 if (bdstatus & DEVICE_T_ERROR) {
1391 frame_set_status(pframe, FRAME_ERROR);
1392 if (bdstatus & T_TO)
1393 pframe->status |= TX_ER_TIMEOUT;
1394 if (bdstatus & T_UN)
1395 pframe->status |= TX_ER_UNDERUN;
1396 }
1397 ep0_txframe_handle(ep);
1398 }
1399
1400 bd = ep->c_txbd;
1401 bdstatus = in_be32((u32 __iomem *)bd);
1402 }
1403
1404 return 0;
1405}
1406
1407static int ep_txframe_handle(struct qe_ep *ep)
1408{
1409 if (frame_get_status(ep->txframe) & FRAME_ERROR) {
1410 qe_ep_flushtxfifo(ep);
1411 dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
1412 if (frame_get_info(ep->txframe) & PID_DATA0)
1413 ep->data01 = 0;
1414 else
1415 ep->data01 = 1;
1416
1417 txcomplete(ep, 1);
1418 } else
1419 txcomplete(ep, 0);
1420
1421 frame_create_tx(ep, ep->txframe); /* send the data */
1422 return 0;
1423}
1424
1425/* confirm the already trainsmited bd */
1426static int qe_ep_txconf(struct qe_ep *ep)
1427{
1428 struct qe_bd __iomem *bd;
1429 struct qe_frame *pframe = NULL;
1430 u32 bdstatus;
1431 unsigned char breakonrxinterrupt = 0;
1432
1433 bd = ep->c_txbd;
1434 bdstatus = in_be32((u32 __iomem *)bd);
1435 while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
1436 pframe = ep->txframe;
1437 if (bdstatus & DEVICE_T_ERROR) {
1438 frame_set_status(pframe, FRAME_ERROR);
1439 if (bdstatus & T_TO)
1440 pframe->status |= TX_ER_TIMEOUT;
1441 if (bdstatus & T_UN)
1442 pframe->status |= TX_ER_UNDERUN;
1443 }
1444
1445 /* clear and recycle the BD */
1446 out_be32((u32 __iomem *)bd, bdstatus & T_W);
1447 out_be32(&bd->buf, 0);
1448 if (bdstatus & T_W)
1449 ep->c_txbd = ep->txbase;
1450 else
1451 ep->c_txbd++;
1452
1453 /* handle the tx frame */
1454 ep_txframe_handle(ep);
1455 bd = ep->c_txbd;
1456 bdstatus = in_be32((u32 __iomem *)bd);
1457 }
1458 if (breakonrxinterrupt)
1459 return -EIO;
1460 else
1461 return 0;
1462}
1463
1464/* Add a request in queue, and try to transmit a packet */
1465static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
1466{
1467 int reval = 0;
1468
1469 if (ep->tx_req == NULL) {
1470 ep->sent = 0;
1471 ep->last = 0;
1472 txcomplete(ep, 0); /* can gain a new tx_req */
1473 reval = frame_create_tx(ep, ep->txframe);
1474 }
1475 return reval;
1476}
1477
1478/* Maybe this is a good ideal */
1479static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
1480{
1481 struct qe_udc *udc = ep->udc;
1482 struct qe_frame *pframe = NULL;
1483 struct qe_bd __iomem *bd;
1484 u32 bdstatus, length;
1485 u32 vaddr, fsize;
1486 u8 *cp;
1487 u8 finish_req = 0;
1488 u8 framepid;
1489
1490 if (list_empty(&ep->queue)) {
1491 dev_vdbg(udc->dev, "the req already finish!\n");
1492 return 0;
1493 }
1494 pframe = ep->rxframe;
1495
1496 bd = ep->n_rxbd;
1497 bdstatus = in_be32((u32 __iomem *)bd);
1498 length = bdstatus & BD_LENGTH_MASK;
1499
1500 while (!(bdstatus & R_E) && length) {
1501 if (finish_req)
1502 break;
1503 if ((bdstatus & R_F) && (bdstatus & R_L)
1504 && !(bdstatus & R_ERROR)) {
1505 qe_frame_clean(pframe);
1506 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
1507 frame_set_data(pframe, (u8 *)vaddr);
1508 frame_set_length(pframe, (length - USB_CRC_SIZE));
1509 frame_set_status(pframe, FRAME_OK);
1510 switch (bdstatus & R_PID) {
1511 case R_PID_DATA1:
1512 frame_set_info(pframe, PID_DATA1); break;
1513 default:
1514 frame_set_info(pframe, PID_DATA0); break;
1515 }
1516 /* handle the rx frame */
1517
1518 if (frame_get_info(pframe) & PID_DATA1)
1519 framepid = 0x1;
1520 else
1521 framepid = 0;
1522
1523 if (framepid != ep->data01) {
1524 dev_vdbg(udc->dev, "the data01 error!\n");
1525 } else {
1526 fsize = frame_get_length(pframe);
1527
1528 cp = (u8 *)(req->req.buf) + req->req.actual;
1529 if (cp) {
1530 memcpy(cp, pframe->data, fsize);
1531 req->req.actual += fsize;
1532 if ((fsize < ep->ep.maxpacket)
1533 || (req->req.actual >=
1534 req->req.length)) {
1535 finish_req = 1;
1536 done(ep, req, 0);
1537 if (list_empty(&ep->queue))
1538 qe_eprx_nack(ep);
1539 }
1540 }
1541 qe_ep_toggledata01(ep);
1542 }
1543 } else {
1544 dev_err(udc->dev, "The receive frame with error!\n");
1545 }
1546
1547 /* note: don't clear the rxbd's buffer address *
1548 * only Clear the length */
1549 out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
1550 ep->has_data--;
1551
1552 /* Get next BD */
1553 if (bdstatus & R_W)
1554 bd = ep->rxbase;
1555 else
1556 bd++;
1557
1558 bdstatus = in_be32((u32 __iomem *)bd);
1559 length = bdstatus & BD_LENGTH_MASK;
1560 }
1561
1562 ep->n_rxbd = bd;
1563 ep_recycle_rxbds(ep);
1564
1565 return 0;
1566}
1567
1568/* only add the request in queue */
1569static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
1570{
1571 if (ep->state == EP_STATE_NACK) {
1572 if (ep->has_data <= 0) {
1573 /* Enable rx and unmask rx interrupt */
1574 qe_eprx_normal(ep);
1575 } else {
1576 /* Copy the exist BD data */
1577 ep_req_rx(ep, req);
1578 }
1579 }
1580
1581 return 0;
1582}
1583
1584/********************************************************************
1585 Internal Used Function End
1586********************************************************************/
1587
1588/*-----------------------------------------------------------------------
1589 Endpoint Management Functions For Gadget
1590 -----------------------------------------------------------------------*/
1591static int qe_ep_enable(struct usb_ep *_ep,
1592 const struct usb_endpoint_descriptor *desc)
1593{
1594 struct qe_udc *udc;
1595 struct qe_ep *ep;
1596 int retval = 0;
1597 unsigned char epnum;
1598
1599 ep = container_of(_ep, struct qe_ep, ep);
1600
1601 /* catch various bogus parameters */
1602 if (!_ep || !desc || ep->desc || _ep->name == ep_name[0] ||
1603 (desc->bDescriptorType != USB_DT_ENDPOINT))
1604 return -EINVAL;
1605
1606 udc = ep->udc;
1607 if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
1608 return -ESHUTDOWN;
1609
1610 epnum = (u8)desc->bEndpointAddress & 0xF;
1611
1612 retval = qe_ep_init(udc, epnum, desc);
1613 if (retval != 0) {
1614 cpm_muram_free(cpm_muram_offset(ep->rxbase));
1615 dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
1616 return -EINVAL;
1617 }
1618 dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
1619 return 0;
1620}
1621
1622static int qe_ep_disable(struct usb_ep *_ep)
1623{
1624 struct qe_udc *udc;
1625 struct qe_ep *ep;
1626 unsigned long flags;
1627 unsigned int size;
1628
1629 ep = container_of(_ep, struct qe_ep, ep);
1630 udc = ep->udc;
1631
1632 if (!_ep || !ep->desc) {
1633 dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
1634 return -EINVAL;
1635 }
1636
1637 spin_lock_irqsave(&udc->lock, flags);
1638 /* Nuke all pending requests (does flush) */
1639 nuke(ep, -ESHUTDOWN);
1640 ep->desc = NULL;
f9c56cdd 1641 ep->ep.desc = NULL;
3948f0e0 1642 ep->stopped = 1;
af3ddbd7 1643 ep->tx_req = NULL;
82341b36 1644 qe_ep_reset(udc, ep->epnum);
3948f0e0
LY		 1645 spin_unlock_irqrestore(&udc->lock, flags);
1646
1647 cpm_muram_free(cpm_muram_offset(ep->rxbase));
1648
1649 if (ep->dir == USB_DIR_OUT)
1650 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
1651 (USB_BDRING_LEN_RX + 1);
1652 else
1653 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
1654 (USB_BDRING_LEN + 1);
1655
1656 if (ep->dir != USB_DIR_IN) {
1657 kfree(ep->rxframe);
1658 if (ep->rxbufmap) {
1659 dma_unmap_single(udc_controller->gadget.dev.parent,
1660 ep->rxbuf_d, size,
1661 DMA_FROM_DEVICE);
1662 ep->rxbuf_d = DMA_ADDR_INVALID;
1663 } else {
1664 dma_sync_single_for_cpu(
1665 udc_controller->gadget.dev.parent,
1666 ep->rxbuf_d, size,
1667 DMA_FROM_DEVICE);
1668 }
1669 kfree(ep->rxbuffer);
1670 }
1671
1672 if (ep->dir != USB_DIR_OUT)
1673 kfree(ep->txframe);
1674
1675 dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
1676 return 0;
1677}
1678
1679static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
1680{
1681 struct qe_req *req;
1682
1683 req = kzalloc(sizeof(*req), gfp_flags);
1684 if (!req)
1685 return NULL;
1686
1687 req->req.dma = DMA_ADDR_INVALID;
1688
1689 INIT_LIST_HEAD(&req->queue);
1690
1691 return &req->req;
1692}
1693
1694static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
1695{
1696 struct qe_req *req;
1697
1698 req = container_of(_req, struct qe_req, req);
1699
1700 if (_req)
1701 kfree(req);
1702}
1703
a30551db 1704static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
3948f0e0
LY		 1705{
1706 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1707 struct qe_req *req = container_of(_req, struct qe_req, req);
1708 struct qe_udc *udc;
3948f0e0
LY		 1709 int reval;
1710
1711 udc = ep->udc;
1712 /* catch various bogus parameters */
1713 if (!_req || !req->req.complete || !req->req.buf
1714 || !list_empty(&req->queue)) {
1715 dev_dbg(udc->dev, "bad params\n");
1716 return -EINVAL;
1717 }
1718 if (!_ep || (!ep->desc && ep_index(ep))) {
1719 dev_dbg(udc->dev, "bad ep\n");
1720 return -EINVAL;
1721 }
1722
1723 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
1724 return -ESHUTDOWN;
1725
1726 req->ep = ep;
1727
1728 /* map virtual address to hardware */
1729 if (req->req.dma == DMA_ADDR_INVALID) {
1730 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
1731 req->req.buf,
1732 req->req.length,
1733 ep_is_in(ep)
1734 ? DMA_TO_DEVICE :
1735 DMA_FROM_DEVICE);
1736 req->mapped = 1;
1737 } else {
1738 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
1739 req->req.dma, req->req.length,
1740 ep_is_in(ep)
1741 ? DMA_TO_DEVICE :
1742 DMA_FROM_DEVICE);
1743 req->mapped = 0;
1744 }
1745
1746 req->req.status = -EINPROGRESS;
1747 req->req.actual = 0;
1748
1749 list_add_tail(&req->queue, &ep->queue);
1750 dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
1751 ep->name, req->req.length);
a30551db 1752
3948f0e0
LY		 1753 /* push the request to device */
1754 if (ep_is_in(ep))
1755 reval = ep_req_send(ep, req);
1756
1757 /* EP0 */
1758 if (ep_index(ep) == 0 && req->req.length > 0) {
1759 if (ep_is_in(ep))
1760 udc->ep0_state = DATA_STATE_XMIT;
1761 else
1762 udc->ep0_state = DATA_STATE_RECV;
1763 }
1764
1765 if (ep->dir == USB_DIR_OUT)
1766 reval = ep_req_receive(ep, req);
1767
3948f0e0
LY		 1768 return 0;
1769}
1770
a30551db
AV		 1771/* queues (submits) an I/O request to an endpoint */
1772static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1773 gfp_t gfp_flags)
1774{
1775 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1776 struct qe_udc *udc = ep->udc;
1777 unsigned long flags;
1778 int ret;
1779
1780 spin_lock_irqsave(&udc->lock, flags);
1781 ret = __qe_ep_queue(_ep, _req);
1782 spin_unlock_irqrestore(&udc->lock, flags);
1783 return ret;
1784}
1785
3948f0e0
LY		 1786/* dequeues (cancels, unlinks) an I/O request from an endpoint */
1787static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1788{
1789 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1790 struct qe_req *req;
1791 unsigned long flags;
1792
1793 if (!_ep || !_req)
1794 return -EINVAL;
1795
1796 spin_lock_irqsave(&ep->udc->lock, flags);
1797
1798 /* make sure it's actually queued on this endpoint */
1799 list_for_each_entry(req, &ep->queue, queue) {
1800 if (&req->req == _req)
1801 break;
1802 }
1803
1804 if (&req->req != _req) {
1805 spin_unlock_irqrestore(&ep->udc->lock, flags);
1806 return -EINVAL;
1807 }
1808
1809 done(ep, req, -ECONNRESET);
1810
1811 spin_unlock_irqrestore(&ep->udc->lock, flags);
1812 return 0;
1813}
1814
1815/*-----------------------------------------------------------------
1816 * modify the endpoint halt feature
1817 * @ep: the non-isochronous endpoint being stalled
1818 * @value: 1--set halt 0--clear halt
1819 * Returns zero, or a negative error code.
1820*----------------------------------------------------------------*/
1821static int qe_ep_set_halt(struct usb_ep *_ep, int value)
1822{
1823 struct qe_ep *ep;
1824 unsigned long flags;
1825 int status = -EOPNOTSUPP;
1826 struct qe_udc *udc;
1827
1828 ep = container_of(_ep, struct qe_ep, ep);
1829 if (!_ep || !ep->desc) {
1830 status = -EINVAL;
1831 goto out;
1832 }
1833
3948f0e0
LY		 1834 udc = ep->udc;
1835 /* Attempt to halt IN ep will fail if any transfer requests
1836 * are still queue */
1837 if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
1838 status = -EAGAIN;
1839 goto out;
1840 }
1841
1842 status = 0;
1843 spin_lock_irqsave(&ep->udc->lock, flags);
1844 qe_eptx_stall_change(ep, value);
1845 qe_eprx_stall_change(ep, value);
1846 spin_unlock_irqrestore(&ep->udc->lock, flags);
1847
1848 if (ep->epnum == 0) {
1849 udc->ep0_state = WAIT_FOR_SETUP;
1850 udc->ep0_dir = 0;
1851 }
15d5a9ac
LY		 1852
1853 /* set data toggle to DATA0 on clear halt */
1854 if (value == 0)
1855 ep->data01 = 0;
3948f0e0 1856out:
928dfa6c 1857 dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
3948f0e0
LY		 1858 value ? "set" : "clear", status);
1859
1860 return status;
1861}
1862
1863static struct usb_ep_ops qe_ep_ops = {
1864 .enable = qe_ep_enable,
1865 .disable = qe_ep_disable,
1866
1867 .alloc_request = qe_alloc_request,
1868 .free_request = qe_free_request,
1869
1870 .queue = qe_ep_queue,
1871 .dequeue = qe_ep_dequeue,
1872
1873 .set_halt = qe_ep_set_halt,
1874};
1875
1876/*------------------------------------------------------------------------
1877 Gadget Driver Layer Operations
1878 ------------------------------------------------------------------------*/
1879
1880/* Get the current frame number */
1881static int qe_get_frame(struct usb_gadget *gadget)
1882{
1883 u16 tmp;
1884
1885 tmp = in_be16(&udc_controller->usb_param->frame_n);
1886 if (tmp & 0x8000)
1887 tmp = tmp & 0x07ff;
1888 else
1889 tmp = -EINVAL;
1890
1891 return (int)tmp;
1892}
1893
1894/* Tries to wake up the host connected to this gadget
1895 *
1896 * Return : 0-success
1897 * Negative-this feature not enabled by host or not supported by device hw
1898 */
1899static int qe_wakeup(struct usb_gadget *gadget)
1900{
1901 return -ENOTSUPP;
1902}
1903
1904/* Notify controller that VBUS is powered, Called by whatever
1905 detects VBUS sessions */
1906static int qe_vbus_session(struct usb_gadget *gadget, int is_active)
1907{
1908 return -ENOTSUPP;
1909}
1910
1911/* constrain controller's VBUS power usage
1912 * This call is used by gadget drivers during SET_CONFIGURATION calls,
1913 * reporting how much power the device may consume. For example, this
1914 * could affect how quickly batteries are recharged.
1915 *
1916 * Returns zero on success, else negative errno.
1917 */
1918static int qe_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1919{
1920 return -ENOTSUPP;
1921}
1922
1923/* Change Data+ pullup status
1924 * this func is used by usb_gadget_connect/disconnect
1925 */
1926static int qe_pullup(struct usb_gadget *gadget, int is_on)
1927{
1928 return -ENOTSUPP;
1929}
1930
0f91349b
SAS		 1931static int fsl_qe_start(struct usb_gadget_driver *driver,
1932 int (*bind)(struct usb_gadget *));
1933static int fsl_qe_stop(struct usb_gadget_driver *driver);
1934
3948f0e0
LY		 1935/* defined in usb_gadget.h */
1936static struct usb_gadget_ops qe_gadget_ops = {
1937 .get_frame = qe_get_frame,
1938 .wakeup = qe_wakeup,
1939/* .set_selfpowered = qe_set_selfpowered,*/ /* always selfpowered */
1940 .vbus_session = qe_vbus_session,
1941 .vbus_draw = qe_vbus_draw,
1942 .pullup = qe_pullup,
0f91349b
SAS		 1943 .start = fsl_qe_start,
1944 .stop = fsl_qe_stop,
3948f0e0
LY		 1945};
1946
1947/*-------------------------------------------------------------------------
1948 USB ep0 Setup process in BUS Enumeration
1949 -------------------------------------------------------------------------*/
1950static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
1951{
1952 struct qe_ep *ep = &udc->eps[pipe];
1953
1954 nuke(ep, -ECONNRESET);
1955 ep->tx_req = NULL;
1956 return 0;
1957}
1958
1959static int reset_queues(struct qe_udc *udc)
1960{
1961 u8 pipe;
1962
1963 for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
1964 udc_reset_ep_queue(udc, pipe);
1965
1966 /* report disconnect; the driver is already quiesced */
1967 spin_unlock(&udc->lock);
1968 udc->driver->disconnect(&udc->gadget);
1969 spin_lock(&udc->lock);
1970
1971 return 0;
1972}
1973
1974static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
1975 u16 length)
1976{
1977 /* Save the new address to device struct */
1978 udc->device_address = (u8) value;
1979 /* Update usb state */
1980 udc->usb_state = USB_STATE_ADDRESS;
1981
1982 /* Status phase , send a ZLP */
1983 if (ep0_prime_status(udc, USB_DIR_IN))
1984 qe_ep0_stall(udc);
1985}
1986
1987static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
1988{
1989 struct qe_req *req = container_of(_req, struct qe_req, req);
1990
1991 req->req.buf = NULL;
1992 kfree(req);
1993}
1994
928dfa6c
LY		 1995static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
1996 u16 index, u16 length)
3948f0e0 1997{
928dfa6c 1998 u16 usb_status = 0;
3948f0e0
LY		 1999 struct qe_req *req;
2000 struct qe_ep *ep;
2001 int status = 0;
2002
2003 ep = &udc->eps[0];
928dfa6c
LY		 2004 if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
2005 /* Get device status */
2006 usb_status = 1 << USB_DEVICE_SELF_POWERED;
2007 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
2008 /* Get interface status */
2009 /* We don't have interface information in udc driver */
2010 usb_status = 0;
2011 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
2012 /* Get endpoint status */
2013 int pipe = index & USB_ENDPOINT_NUMBER_MASK;
2014 struct qe_ep *target_ep = &udc->eps[pipe];
2015 u16 usep;
2016
2017 /* stall if endpoint doesn't exist */
2018 if (!target_ep->desc)
2019 goto stall;
2020
2021 usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
2022 if (index & USB_DIR_IN) {
2023 if (target_ep->dir != USB_DIR_IN)
2024 goto stall;
2025 if ((usep & USB_THS_MASK) == USB_THS_STALL)
2026 usb_status = 1 << USB_ENDPOINT_HALT;
2027 } else {
2028 if (target_ep->dir != USB_DIR_OUT)
2029 goto stall;
2030 if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
2031 usb_status = 1 << USB_ENDPOINT_HALT;
2032 }
2033 }
3948f0e0
LY		 2034
2035 req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
2036 struct qe_req, req);
2037 req->req.length = 2;
928dfa6c
LY		 2038 req->req.buf = udc->statusbuf;
2039 *(u16 *)req->req.buf = cpu_to_le16(usb_status);
3948f0e0
LY		 2040 req->req.status = -EINPROGRESS;
2041 req->req.actual = 0;
2042 req->req.complete = ownercomplete;
2043
2044 udc->ep0_dir = USB_DIR_IN;
2045
2046 /* data phase */
a30551db 2047 status = __qe_ep_queue(&ep->ep, &req->req);
3948f0e0 2048
928dfa6c
LY		 2049 if (status == 0)
2050 return;
2051stall:
2052 dev_err(udc->dev, "Can't respond to getstatus request \n");
2053 qe_ep0_stall(udc);
3948f0e0
LY		 2054}
2055
2056/* only handle the setup request, suppose the device in normal status */
2057static void setup_received_handle(struct qe_udc *udc,
2058 struct usb_ctrlrequest *setup)
2059{
2060 /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
2061 u16 wValue = le16_to_cpu(setup->wValue);
2062 u16 wIndex = le16_to_cpu(setup->wIndex);
2063 u16 wLength = le16_to_cpu(setup->wLength);
2064
2065 /* clear the previous request in the ep0 */
2066 udc_reset_ep_queue(udc, 0);
2067
2068 if (setup->bRequestType & USB_DIR_IN)
2069 udc->ep0_dir = USB_DIR_IN;
2070 else
2071 udc->ep0_dir = USB_DIR_OUT;
2072
2073 switch (setup->bRequest) {
2074 case USB_REQ_GET_STATUS:
2075 /* Data+Status phase form udc */
2076 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2077 != (USB_DIR_IN | USB_TYPE_STANDARD))
2078 break;
928dfa6c
LY		 2079 ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
2080 wLength);
3948f0e0
LY		 2081 return;
2082
2083 case USB_REQ_SET_ADDRESS:
2084 /* Status phase from udc */
2085 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
2086 USB_RECIP_DEVICE))
2087 break;
2088 ch9setaddress(udc, wValue, wIndex, wLength);
2089 return;
2090
2091 case USB_REQ_CLEAR_FEATURE:
2092 case USB_REQ_SET_FEATURE:
2093 /* Requests with no data phase, status phase from udc */
928dfa6c 2094 if ((setup->bRequestType & USB_TYPE_MASK)
3948f0e0
LY		 2095 != USB_TYPE_STANDARD)
2096 break;
2097
2098 if ((setup->bRequestType & USB_RECIP_MASK)
2099 == USB_RECIP_ENDPOINT) {
2100 int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
2101 struct qe_ep *ep;
2102
2103 if (wValue != 0 || wLength != 0
2104 || pipe > USB_MAX_ENDPOINTS)
2105 break;
2106 ep = &udc->eps[pipe];
2107
2108 spin_unlock(&udc->lock);
2109 qe_ep_set_halt(&ep->ep,
2110 (setup->bRequest == USB_REQ_SET_FEATURE)
2111 ? 1 : 0);
2112 spin_lock(&udc->lock);
2113 }
2114
2115 ep0_prime_status(udc, USB_DIR_IN);
2116
2117 return;
2118
2119 default:
2120 break;
2121 }
2122
2123 if (wLength) {
2124 /* Data phase from gadget, status phase from udc */
2125 if (setup->bRequestType & USB_DIR_IN) {
2126 udc->ep0_state = DATA_STATE_XMIT;
2127 udc->ep0_dir = USB_DIR_IN;
928dfa6c 2128 } else {
3948f0e0
LY		 2129 udc->ep0_state = DATA_STATE_RECV;
2130 udc->ep0_dir = USB_DIR_OUT;
2131 }
2132 spin_unlock(&udc->lock);
2133 if (udc->driver->setup(&udc->gadget,
2134 &udc->local_setup_buff) < 0)
2135 qe_ep0_stall(udc);
2136 spin_lock(&udc->lock);
2137 } else {
2138 /* No data phase, IN status from gadget */
2139 udc->ep0_dir = USB_DIR_IN;
2140 spin_unlock(&udc->lock);
2141 if (udc->driver->setup(&udc->gadget,
2142 &udc->local_setup_buff) < 0)
2143 qe_ep0_stall(udc);
2144 spin_lock(&udc->lock);
2145 udc->ep0_state = DATA_STATE_NEED_ZLP;
2146 }
2147}
2148
2149/*-------------------------------------------------------------------------
2150 USB Interrupt handlers
2151 -------------------------------------------------------------------------*/
2152static void suspend_irq(struct qe_udc *udc)
2153{
2154 udc->resume_state = udc->usb_state;
2155 udc->usb_state = USB_STATE_SUSPENDED;
2156
2157 /* report suspend to the driver ,serial.c not support this*/
2158 if (udc->driver->suspend)
2159 udc->driver->suspend(&udc->gadget);
2160}
2161
2162static void resume_irq(struct qe_udc *udc)
2163{
2164 udc->usb_state = udc->resume_state;
2165 udc->resume_state = 0;
2166
2167 /* report resume to the driver , serial.c not support this*/
2168 if (udc->driver->resume)
2169 udc->driver->resume(&udc->gadget);
2170}
2171
2172static void idle_irq(struct qe_udc *udc)
2173{
2174 u8 usbs;
2175
2176 usbs = in_8(&udc->usb_regs->usb_usbs);
2177 if (usbs & USB_IDLE_STATUS_MASK) {
2178 if ((udc->usb_state) != USB_STATE_SUSPENDED)
2179 suspend_irq(udc);
2180 } else {
2181 if (udc->usb_state == USB_STATE_SUSPENDED)
2182 resume_irq(udc);
2183 }
2184}
2185
2186static int reset_irq(struct qe_udc *udc)
2187{
2188 unsigned char i;
2189
ef84e405
AV		 2190 if (udc->usb_state == USB_STATE_DEFAULT)
2191 return 0;
2192
3948f0e0
LY		 2193 qe_usb_disable();
2194 out_8(&udc->usb_regs->usb_usadr, 0);
2195
2196 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2197 if (udc->eps[i].init)
2198 qe_ep_reset(udc, i);
2199 }
2200
2201 reset_queues(udc);
2202 udc->usb_state = USB_STATE_DEFAULT;
2203 udc->ep0_state = WAIT_FOR_SETUP;
2204 udc->ep0_dir = USB_DIR_OUT;
2205 qe_usb_enable();
2206 return 0;
2207}
2208
2209static int bsy_irq(struct qe_udc *udc)
2210{
2211 return 0;
2212}
2213
2214static int txe_irq(struct qe_udc *udc)
2215{
2216 return 0;
2217}
2218
2219/* ep0 tx interrupt also in here */
2220static int tx_irq(struct qe_udc *udc)
2221{
2222 struct qe_ep *ep;
2223 struct qe_bd __iomem *bd;
2224 int i, res = 0;
2225
2226 if ((udc->usb_state == USB_STATE_ADDRESS)
2227 && (in_8(&udc->usb_regs->usb_usadr) == 0))
2228 out_8(&udc->usb_regs->usb_usadr, udc->device_address);
2229
2230 for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
2231 ep = &udc->eps[i];
2232 if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
2233 bd = ep->c_txbd;
2234 if (!(in_be32((u32 __iomem *)bd) & T_R)
2235 && (in_be32(&bd->buf))) {
928dfa6c 2236 /* confirm the transmitted bd */
3948f0e0
LY		 2237 if (ep->epnum == 0)
2238 res = qe_ep0_txconf(ep);
2239 else
2240 res = qe_ep_txconf(ep);
3948f0e0
LY		 2241 }
2242 }
2243 }
2244 return res;
2245}
2246
2247
2248/* setup packect's rx is handle in the function too */
2249static void rx_irq(struct qe_udc *udc)
2250{
2251 struct qe_ep *ep;
2252 struct qe_bd __iomem *bd;
2253 int i;
2254
2255 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2256 ep = &udc->eps[i];
2257 if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
2258 bd = ep->n_rxbd;
2259 if (!(in_be32((u32 __iomem *)bd) & R_E)
2260 && (in_be32(&bd->buf))) {
2261 if (ep->epnum == 0) {
2262 qe_ep0_rx(udc);
2263 } else {
2264 /*non-setup package receive*/
2265 qe_ep_rx(ep);
2266 }
2267 }
2268 }
2269 }
2270}
2271
2272static irqreturn_t qe_udc_irq(int irq, void *_udc)
2273{
2274 struct qe_udc *udc = (struct qe_udc *)_udc;
2275 u16 irq_src;
2276 irqreturn_t status = IRQ_NONE;
2277 unsigned long flags;
2278
3948f0e0
LY		 2279 spin_lock_irqsave(&udc->lock, flags);
2280
2281 irq_src = in_be16(&udc->usb_regs->usb_usber) &
2282 in_be16(&udc->usb_regs->usb_usbmr);
2283 /* Clear notification bits */
2284 out_be16(&udc->usb_regs->usb_usber, irq_src);
2285 /* USB Interrupt */
2286 if (irq_src & USB_E_IDLE_MASK) {
2287 idle_irq(udc);
2288 irq_src &= ~USB_E_IDLE_MASK;
2289 status = IRQ_HANDLED;
2290 }
2291
2292 if (irq_src & USB_E_TXB_MASK) {
2293 tx_irq(udc);
2294 irq_src &= ~USB_E_TXB_MASK;
2295 status = IRQ_HANDLED;
2296 }
2297
2298 if (irq_src & USB_E_RXB_MASK) {
2299 rx_irq(udc);
2300 irq_src &= ~USB_E_RXB_MASK;
2301 status = IRQ_HANDLED;
2302 }
2303
2304 if (irq_src & USB_E_RESET_MASK) {
2305 reset_irq(udc);
2306 irq_src &= ~USB_E_RESET_MASK;
2307 status = IRQ_HANDLED;
2308 }
2309
2310 if (irq_src & USB_E_BSY_MASK) {
2311 bsy_irq(udc);
2312 irq_src &= ~USB_E_BSY_MASK;
2313 status = IRQ_HANDLED;
2314 }
2315
2316 if (irq_src & USB_E_TXE_MASK) {
2317 txe_irq(udc);
2318 irq_src &= ~USB_E_TXE_MASK;
2319 status = IRQ_HANDLED;
2320 }
2321
2322 spin_unlock_irqrestore(&udc->lock, flags);
2323
2324 return status;
2325}
2326
2327/*-------------------------------------------------------------------------
b0fca50f 2328 Gadget driver probe and unregister.
3948f0e0 2329 --------------------------------------------------------------------------*/
0f91349b 2330static int fsl_qe_start(struct usb_gadget_driver *driver,
b0fca50f 2331 int (*bind)(struct usb_gadget *))
3948f0e0
LY		 2332{
2333 int retval;
2334 unsigned long flags = 0;
2335
2336 /* standard operations */
2337 if (!udc_controller)
2338 return -ENODEV;
2339
7177aed4 2340 if (!driver || driver->max_speed < USB_SPEED_FULL
b0fca50f 2341 || !bind || !driver->disconnect || !driver->setup)
3948f0e0
LY		 2342 return -EINVAL;
2343
2344 if (udc_controller->driver)
2345 return -EBUSY;
2346
2347 /* lock is needed but whether should use this lock or another */
2348 spin_lock_irqsave(&udc_controller->lock, flags);
2349
2350 driver->driver.bus = NULL;
2351 /* hook up the driver */
2352 udc_controller->driver = driver;
2353 udc_controller->gadget.dev.driver = &driver->driver;
7177aed4 2354 udc_controller->gadget.speed = driver->max_speed;
3948f0e0
LY		 2355 spin_unlock_irqrestore(&udc_controller->lock, flags);
2356
b0fca50f 2357 retval = bind(&udc_controller->gadget);
3948f0e0
LY		 2358 if (retval) {
2359 dev_err(udc_controller->dev, "bind to %s --> %d",
2360 driver->driver.name, retval);
2361 udc_controller->gadget.dev.driver = NULL;
2362 udc_controller->driver = NULL;
2363 return retval;
2364 }
2365
2366 /* Enable IRQ reg and Set usbcmd reg EN bit */
2367 qe_usb_enable();
2368
2369 out_be16(&udc_controller->usb_regs->usb_usber, 0xffff);
2370 out_be16(&udc_controller->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
2371 udc_controller->usb_state = USB_STATE_ATTACHED;
2372 udc_controller->ep0_state = WAIT_FOR_SETUP;
2373 udc_controller->ep0_dir = USB_DIR_OUT;
2374 dev_info(udc_controller->dev, "%s bind to driver %s \n",
2375 udc_controller->gadget.name, driver->driver.name);
2376 return 0;
2377}
3948f0e0 2378
0f91349b 2379static int fsl_qe_stop(struct usb_gadget_driver *driver)
3948f0e0
LY		 2380{
2381 struct qe_ep *loop_ep;
2382 unsigned long flags;
2383
2384 if (!udc_controller)
2385 return -ENODEV;
2386
2387 if (!driver || driver != udc_controller->driver)
2388 return -EINVAL;
2389
2390 /* stop usb controller, disable intr */
2391 qe_usb_disable();
2392
2393 /* in fact, no needed */
2394 udc_controller->usb_state = USB_STATE_ATTACHED;
2395 udc_controller->ep0_state = WAIT_FOR_SETUP;
2396 udc_controller->ep0_dir = 0;
2397
2398 /* stand operation */
2399 spin_lock_irqsave(&udc_controller->lock, flags);
2400 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2401 nuke(&udc_controller->eps[0], -ESHUTDOWN);
2402 list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
2403 ep.ep_list)
2404 nuke(loop_ep, -ESHUTDOWN);
2405 spin_unlock_irqrestore(&udc_controller->lock, flags);
2406
9ac36da3
AV		 2407 /* report disconnect; the controller is already quiesced */
2408 driver->disconnect(&udc_controller->gadget);
2409
3948f0e0
LY		 2410 /* unbind gadget and unhook driver. */
2411 driver->unbind(&udc_controller->gadget);
2412 udc_controller->gadget.dev.driver = NULL;
2413 udc_controller->driver = NULL;
2414
2415 dev_info(udc_controller->dev, "unregistered gadget driver '%s'\r\n",
2416 driver->driver.name);
2417 return 0;
2418}
3948f0e0
LY		 2419
2420/* udc structure's alloc and setup, include ep-param alloc */
2dc11581 2421static struct qe_udc __devinit *qe_udc_config(struct platform_device *ofdev)
3948f0e0
LY		 2422{
2423 struct qe_udc *udc;
3ed38802 2424 struct device_node *np = ofdev->dev.of_node;
3948f0e0
LY		 2425 unsigned int tmp_addr = 0;
2426 struct usb_device_para __iomem *usbpram;
2427 unsigned int i;
2428 u64 size;
2429 u32 offset;
2430
2431 udc = kzalloc(sizeof(*udc), GFP_KERNEL);
2432 if (udc == NULL) {
2433 dev_err(&ofdev->dev, "malloc udc failed\n");
2434 goto cleanup;
2435 }
2436
2437 udc->dev = &ofdev->dev;
2438
2439 /* get default address of usb parameter in MURAM from device tree */
2440 offset = *of_get_address(np, 1, &size, NULL);
2441 udc->usb_param = cpm_muram_addr(offset);
2442 memset_io(udc->usb_param, 0, size);
2443
2444 usbpram = udc->usb_param;
2445 out_be16(&usbpram->frame_n, 0);
2446 out_be32(&usbpram->rstate, 0);
2447
2448 tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
2449 sizeof(struct usb_ep_para)),
2450 USB_EP_PARA_ALIGNMENT);
cd40c4c4
AV		 2451 if (IS_ERR_VALUE(tmp_addr))
2452 goto cleanup;
3948f0e0
LY		 2453
2454 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2455 out_be16(&usbpram->epptr[i], (u16)tmp_addr);
2456 udc->ep_param[i] = cpm_muram_addr(tmp_addr);
2457 tmp_addr += 32;
2458 }
2459
2460 memset_io(udc->ep_param[0], 0,
2461 USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
2462
2463 udc->resume_state = USB_STATE_NOTATTACHED;
2464 udc->usb_state = USB_STATE_POWERED;
2465 udc->ep0_dir = 0;
2466
2467 spin_lock_init(&udc->lock);
2468 return udc;
2469
2470cleanup:
2471 kfree(udc);
2472 return NULL;
2473}
2474
2475/* USB Controller register init */
2476static int __devinit qe_udc_reg_init(struct qe_udc *udc)
2477{
2478 struct usb_ctlr __iomem *qe_usbregs;
2479 qe_usbregs = udc->usb_regs;
2480
2247818a 2481 /* Spec says that we must enable the USB controller to change mode. */
3948f0e0 2482 out_8(&qe_usbregs->usb_usmod, 0x01);
2247818a
AV		 2483 /* Mode changed, now disable it, since muram isn't initialized yet. */
2484 out_8(&qe_usbregs->usb_usmod, 0x00);
2485
2486 /* Initialize the rest. */
3948f0e0
LY		 2487 out_be16(&qe_usbregs->usb_usbmr, 0);
2488 out_8(&qe_usbregs->usb_uscom, 0);
2489 out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
2490
2491 return 0;
2492}
2493
2494static int __devinit qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
2495{
2496 struct qe_ep *ep = &udc->eps[pipe_num];
2497
2498 ep->udc = udc;
2499 strcpy(ep->name, ep_name[pipe_num]);
2500 ep->ep.name = ep_name[pipe_num];
2501
2502 ep->ep.ops = &qe_ep_ops;
2503 ep->stopped = 1;
2504 ep->ep.maxpacket = (unsigned short) ~0;
2505 ep->desc = NULL;
2506 ep->dir = 0xff;
2507 ep->epnum = (u8)pipe_num;
2508 ep->sent = 0;
2509 ep->last = 0;
2510 ep->init = 0;
2511 ep->rxframe = NULL;
2512 ep->txframe = NULL;
2513 ep->tx_req = NULL;
2514 ep->state = EP_STATE_IDLE;
2515 ep->has_data = 0;
2516
2517 /* the queue lists any req for this ep */
2518 INIT_LIST_HEAD(&ep->queue);
2519
2520 /* gagdet.ep_list used for ep_autoconfig so no ep0*/
2521 if (pipe_num != 0)
2522 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2523
2524 ep->gadget = &udc->gadget;
2525
2526 return 0;
2527}
2528
2529/*-----------------------------------------------------------------------
2530 * UDC device Driver operation functions *
2531 *----------------------------------------------------------------------*/
2532static void qe_udc_release(struct device *dev)
2533{
2534 int i = 0;
2535
2536 complete(udc_controller->done);
2537 cpm_muram_free(cpm_muram_offset(udc_controller->ep_param[0]));
2538 for (i = 0; i < USB_MAX_ENDPOINTS; i++)
2539 udc_controller->ep_param[i] = NULL;
2540
2541 kfree(udc_controller);
2542 udc_controller = NULL;
2543}
2544
2545/* Driver probe functions */
b1608d69 2546static const struct of_device_id qe_udc_match[];
d35fb641 2547static int __devinit qe_udc_probe(struct platform_device *ofdev)
3948f0e0 2548{
b1608d69 2549 const struct of_device_id *match;
3ed38802 2550 struct device_node *np = ofdev->dev.of_node;
3948f0e0
LY		 2551 struct qe_ep *ep;
2552 unsigned int ret = 0;
2553 unsigned int i;
2554 const void *prop;
2555
b1608d69
GL		 2556 match = of_match_device(qe_udc_match, &ofdev->dev);
2557 if (!match)
d35fb641
GL		 2558 return -EINVAL;
2559
3948f0e0
LY		 2560 prop = of_get_property(np, "mode", NULL);
2561 if (!prop || strcmp(prop, "peripheral"))
2562 return -ENODEV;
2563
2564 /* Initialize the udc structure including QH member and other member */
2565 udc_controller = qe_udc_config(ofdev);
2566 if (!udc_controller) {
cd40c4c4 2567 dev_err(&ofdev->dev, "failed to initialize\n");
3948f0e0
LY		 2568 return -ENOMEM;
2569 }
2570
b1608d69 2571 udc_controller->soc_type = (unsigned long)match->data;
3948f0e0
LY		 2572 udc_controller->usb_regs = of_iomap(np, 0);
2573 if (!udc_controller->usb_regs) {
2574 ret = -ENOMEM;
2575 goto err1;
2576 }
2577
2578 /* initialize usb hw reg except for regs for EP,
2579 * leave usbintr reg untouched*/
2580 qe_udc_reg_init(udc_controller);
2581
2582 /* here comes the stand operations for probe
2583 * set the qe_udc->gadget.xxx */
2584 udc_controller->gadget.ops = &qe_gadget_ops;
2585
2586 /* gadget.ep0 is a pointer */
2587 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2588
2589 INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2590
2591 /* modify in register gadget process */
2592 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2593
2594 /* name: Identifies the controller hardware type. */
2595 udc_controller->gadget.name = driver_name;
2596
2597 device_initialize(&udc_controller->gadget.dev);
2598
c682b170 2599 dev_set_name(&udc_controller->gadget.dev, "gadget");
3948f0e0
LY		 2600
2601 udc_controller->gadget.dev.release = qe_udc_release;
2602 udc_controller->gadget.dev.parent = &ofdev->dev;
2603
928dfa6c 2604 /* initialize qe_ep struct */
3948f0e0 2605 for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
928dfa6c 2606 /* because the ep type isn't decide here so
3948f0e0
LY		 2607 * qe_ep_init() should be called in ep_enable() */
2608
2609 /* setup the qe_ep struct and link ep.ep.list
2610 * into gadget.ep_list */
2611 qe_ep_config(udc_controller, (unsigned char)i);
2612 }
2613
2614 /* ep0 initialization in here */
2615 ret = qe_ep_init(udc_controller, 0, &qe_ep0_desc);
2616 if (ret)
2617 goto err2;
2618
928dfa6c 2619 /* create a buf for ZLP send, need to remain zeroed */
3948f0e0
LY		 2620 udc_controller->nullbuf = kzalloc(256, GFP_KERNEL);
2621 if (udc_controller->nullbuf == NULL) {
cd40c4c4 2622 dev_err(udc_controller->dev, "cannot alloc nullbuf\n");
3948f0e0
LY		 2623 ret = -ENOMEM;
2624 goto err3;
2625 }
2626
928dfa6c
LY		 2627 /* buffer for data of get_status request */
2628 udc_controller->statusbuf = kzalloc(2, GFP_KERNEL);
2629 if (udc_controller->statusbuf == NULL) {
2630 ret = -ENOMEM;
2631 goto err4;
2632 }
2633
3948f0e0
LY		 2634 udc_controller->nullp = virt_to_phys((void *)udc_controller->nullbuf);
2635 if (udc_controller->nullp == DMA_ADDR_INVALID) {
2636 udc_controller->nullp = dma_map_single(
2637 udc_controller->gadget.dev.parent,
2638 udc_controller->nullbuf,
2639 256,
2640 DMA_TO_DEVICE);
2641 udc_controller->nullmap = 1;
2642 } else {
2643 dma_sync_single_for_device(udc_controller->gadget.dev.parent,
2644 udc_controller->nullp, 256,
2645 DMA_TO_DEVICE);
2646 }
2647
2648 tasklet_init(&udc_controller->rx_tasklet, ep_rx_tasklet,
2649 (unsigned long)udc_controller);
2650 /* request irq and disable DR */
2651 udc_controller->usb_irq = irq_of_parse_and_map(np, 0);
94f341db
AV		 2652 if (!udc_controller->usb_irq) {
2653 ret = -EINVAL;
2654 goto err_noirq;
2655 }
3948f0e0
LY		 2656
2657 ret = request_irq(udc_controller->usb_irq, qe_udc_irq, 0,
2658 driver_name, udc_controller);
2659 if (ret) {
2660 dev_err(udc_controller->dev, "cannot request irq %d err %d \n",
2661 udc_controller->usb_irq, ret);
928dfa6c 2662 goto err5;
3948f0e0
LY		 2663 }
2664
2665 ret = device_add(&udc_controller->gadget.dev);
2666 if (ret)
928dfa6c 2667 goto err6;
3948f0e0 2668
0f91349b
SAS		 2669 ret = usb_add_gadget_udc(&ofdev->dev, &udc_controller->gadget);
2670 if (ret)
2671 goto err7;
2672
3948f0e0 2673 dev_info(udc_controller->dev,
928dfa6c
LY		 2674 "%s USB controller initialized as device\n",
2675 (udc_controller->soc_type == PORT_QE) ? "QE" : "CPM");
3948f0e0
LY		 2676 return 0;
2677
0f91349b
SAS		 2678err7:
2679 device_unregister(&udc_controller->gadget.dev);
928dfa6c 2680err6:
3948f0e0 2681 free_irq(udc_controller->usb_irq, udc_controller);
928dfa6c 2682err5:
94f341db
AV		 2683 irq_dispose_mapping(udc_controller->usb_irq);
2684err_noirq:
3948f0e0
LY		 2685 if (udc_controller->nullmap) {
2686 dma_unmap_single(udc_controller->gadget.dev.parent,
2687 udc_controller->nullp, 256,
2688 DMA_TO_DEVICE);
2689 udc_controller->nullp = DMA_ADDR_INVALID;
2690 } else {
2691 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2692 udc_controller->nullp, 256,
2693 DMA_TO_DEVICE);
2694 }
928dfa6c
LY		 2695 kfree(udc_controller->statusbuf);
2696err4:
3948f0e0
LY		 2697 kfree(udc_controller->nullbuf);
2698err3:
2699 ep = &udc_controller->eps[0];
2700 cpm_muram_free(cpm_muram_offset(ep->rxbase));
2701 kfree(ep->rxframe);
2702 kfree(ep->rxbuffer);
2703 kfree(ep->txframe);
2704err2:
2705 iounmap(udc_controller->usb_regs);
2706err1:
2707 kfree(udc_controller);
94f341db 2708 udc_controller = NULL;
3948f0e0
LY		 2709 return ret;
2710}
2711
2712#ifdef CONFIG_PM
2dc11581 2713static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
3948f0e0
LY		 2714{
2715 return -ENOTSUPP;
2716}
2717
2dc11581 2718static int qe_udc_resume(struct platform_device *dev)
3948f0e0
LY		 2719{
2720 return -ENOTSUPP;
2721}
2722#endif
2723
2dc11581 2724static int __devexit qe_udc_remove(struct platform_device *ofdev)
3948f0e0
LY		 2725{
2726 struct qe_ep *ep;
2727 unsigned int size;
2728
2729 DECLARE_COMPLETION(done);
2730
2731 if (!udc_controller)
2732 return -ENODEV;
2733
0f91349b
SAS		 2734 usb_del_gadget_udc(&udc_controller->gadget);
2735
3948f0e0
LY		 2736 udc_controller->done = &done;
2737 tasklet_disable(&udc_controller->rx_tasklet);
2738
2739 if (udc_controller->nullmap) {
2740 dma_unmap_single(udc_controller->gadget.dev.parent,
2741 udc_controller->nullp, 256,
2742 DMA_TO_DEVICE);
2743 udc_controller->nullp = DMA_ADDR_INVALID;
2744 } else {
2745 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2746 udc_controller->nullp, 256,
2747 DMA_TO_DEVICE);
2748 }
928dfa6c 2749 kfree(udc_controller->statusbuf);
3948f0e0
LY		 2750 kfree(udc_controller->nullbuf);
2751
2752 ep = &udc_controller->eps[0];
2753 cpm_muram_free(cpm_muram_offset(ep->rxbase));
2754 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
2755
2756 kfree(ep->rxframe);
2757 if (ep->rxbufmap) {
2758 dma_unmap_single(udc_controller->gadget.dev.parent,
2759 ep->rxbuf_d, size,
2760 DMA_FROM_DEVICE);
2761 ep->rxbuf_d = DMA_ADDR_INVALID;
2762 } else {
2763 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2764 ep->rxbuf_d, size,
2765 DMA_FROM_DEVICE);
2766 }
2767
2768 kfree(ep->rxbuffer);
2769 kfree(ep->txframe);
2770
2771 free_irq(udc_controller->usb_irq, udc_controller);
94f341db 2772 irq_dispose_mapping(udc_controller->usb_irq);
3948f0e0
LY		 2773
2774 tasklet_kill(&udc_controller->rx_tasklet);
2775
2776 iounmap(udc_controller->usb_regs);
2777
2778 device_unregister(&udc_controller->gadget.dev);
2779 /* wait for release() of gadget.dev to free udc */
2780 wait_for_completion(&done);
2781
2782 return 0;
2783}
2784
2785/*-------------------------------------------------------------------------*/
07824d3d 2786static const struct of_device_id qe_udc_match[] __devinitconst = {
04c4ab17
AV		 2787 {
2788 .compatible = "fsl,mpc8323-qe-usb",
2789 .data = (void *)PORT_QE,
2790 },
3948f0e0
LY		 2791 {
2792 .compatible = "fsl,mpc8360-qe-usb",
2793 .data = (void *)PORT_QE,
2794 },
2795 {
2796 .compatible = "fsl,mpc8272-cpm-usb",
2797 .data = (void *)PORT_CPM,
2798 },
2799 {},
2800};
2801
2802MODULE_DEVICE_TABLE(of, qe_udc_match);
2803
d35fb641 2804static struct platform_driver udc_driver = {
4018294b
GL		 2805 .driver = {
2806 .name = (char *)driver_name,
2807 .owner = THIS_MODULE,
2808 .of_match_table = qe_udc_match,
2809 },
3948f0e0
LY		 2810 .probe = qe_udc_probe,
2811 .remove = __devexit_p(qe_udc_remove),
2812#ifdef CONFIG_PM
2813 .suspend = qe_udc_suspend,
2814 .resume = qe_udc_resume,
2815#endif
2816};
2817
cc27c96c 2818module_platform_driver(udc_driver);
3948f0e0
LY		 2819
2820MODULE_DESCRIPTION(DRIVER_DESC);
2821MODULE_AUTHOR(DRIVER_AUTHOR);
2822MODULE_LICENSE("GPL");
2823
Linux 6.x block layer and io_uring tree(s)