usb: gadget: goku: remove unused argument
[linux-2.6-block.git] / drivers / usb / gadget / fsl_qe_udc.c
CommitLineData
3948f0e0
LY
1/*
2 * driver/usb/gadget/fsl_qe_udc.c
3 *
4 * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
5 *
6 * Xie Xiaobo <X.Xie@freescale.com>
7 * Li Yang <leoli@freescale.com>
8 * Based on bareboard code from Shlomi Gridish.
9 *
10 * Description:
11 * Freescle QE/CPM USB Pheripheral Controller Driver
12 * The controller can be found on MPC8360, MPC8272, and etc.
13 * MPC8360 Rev 1.1 may need QE mircocode update
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20
21#undef USB_TRACE
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <linux/ioport.h>
27#include <linux/types.h>
28#include <linux/errno.h>
cd40c4c4 29#include <linux/err.h>
3948f0e0
LY
30#include <linux/slab.h>
31#include <linux/list.h>
32#include <linux/interrupt.h>
33#include <linux/io.h>
34#include <linux/moduleparam.h>
22ae782f 35#include <linux/of_address.h>
5af50730 36#include <linux/of_irq.h>
3948f0e0
LY
37#include <linux/of_platform.h>
38#include <linux/dma-mapping.h>
39#include <linux/usb/ch9.h>
40#include <linux/usb/gadget.h>
41#include <linux/usb/otg.h>
42#include <asm/qe.h>
43#include <asm/cpm.h>
44#include <asm/dma.h>
45#include <asm/reg.h>
46#include "fsl_qe_udc.h"
47
48#define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
49#define DRIVER_AUTHOR "Xie XiaoBo"
50#define DRIVER_VERSION "1.0"
51
52#define DMA_ADDR_INVALID (~(dma_addr_t)0)
53
54static const char driver_name[] = "fsl_qe_udc";
55static const char driver_desc[] = DRIVER_DESC;
56
57/*ep name is important in gadget, it should obey the convention of ep_match()*/
58static const char *const ep_name[] = {
59 "ep0-control", /* everyone has ep0 */
60 /* 3 configurable endpoints */
61 "ep1",
62 "ep2",
63 "ep3",
64};
65
66static struct usb_endpoint_descriptor qe_ep0_desc = {
67 .bLength = USB_DT_ENDPOINT_SIZE,
68 .bDescriptorType = USB_DT_ENDPOINT,
69
70 .bEndpointAddress = 0,
71 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
72 .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
73};
74
3948f0e0
LY
75/********************************************************************
76 * Internal Used Function Start
77********************************************************************/
78/*-----------------------------------------------------------------
79 * done() - retire a request; caller blocked irqs
80 *--------------------------------------------------------------*/
81static void done(struct qe_ep *ep, struct qe_req *req, int status)
82{
83 struct qe_udc *udc = ep->udc;
84 unsigned char stopped = ep->stopped;
85
86 /* the req->queue pointer is used by ep_queue() func, in which
87 * the request will be added into a udc_ep->queue 'd tail
88 * so here the req will be dropped from the ep->queue
89 */
90 list_del_init(&req->queue);
91
92 /* req.status should be set as -EINPROGRESS in ep_queue() */
93 if (req->req.status == -EINPROGRESS)
94 req->req.status = status;
95 else
96 status = req->req.status;
97
98 if (req->mapped) {
99 dma_unmap_single(udc->gadget.dev.parent,
100 req->req.dma, req->req.length,
101 ep_is_in(ep)
102 ? DMA_TO_DEVICE
103 : DMA_FROM_DEVICE);
104 req->req.dma = DMA_ADDR_INVALID;
105 req->mapped = 0;
106 } else
107 dma_sync_single_for_cpu(udc->gadget.dev.parent,
108 req->req.dma, req->req.length,
109 ep_is_in(ep)
110 ? DMA_TO_DEVICE
111 : DMA_FROM_DEVICE);
112
113 if (status && (status != -ESHUTDOWN))
114 dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
115 ep->ep.name, &req->req, status,
116 req->req.actual, req->req.length);
117
118 /* don't modify queue heads during completion callback */
119 ep->stopped = 1;
120 spin_unlock(&udc->lock);
121
122 /* this complete() should a func implemented by gadget layer,
123 * eg fsg->bulk_in_complete() */
124 if (req->req.complete)
125 req->req.complete(&ep->ep, &req->req);
126
127 spin_lock(&udc->lock);
128
129 ep->stopped = stopped;
130}
131
132/*-----------------------------------------------------------------
133 * nuke(): delete all requests related to this ep
134 *--------------------------------------------------------------*/
135static void nuke(struct qe_ep *ep, int status)
136{
137 /* Whether this eq has request linked */
138 while (!list_empty(&ep->queue)) {
139 struct qe_req *req = NULL;
140 req = list_entry(ep->queue.next, struct qe_req, queue);
141
142 done(ep, req, status);
143 }
144}
145
146/*---------------------------------------------------------------------------*
147 * USB and Endpoint manipulate process, include parameter and register *
148 *---------------------------------------------------------------------------*/
149/* @value: 1--set stall 0--clean stall */
150static int qe_eprx_stall_change(struct qe_ep *ep, int value)
151{
152 u16 tem_usep;
153 u8 epnum = ep->epnum;
154 struct qe_udc *udc = ep->udc;
155
156 tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
157 tem_usep = tem_usep & ~USB_RHS_MASK;
158 if (value == 1)
159 tem_usep |= USB_RHS_STALL;
160 else if (ep->dir == USB_DIR_IN)
161 tem_usep |= USB_RHS_IGNORE_OUT;
162
163 out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
164 return 0;
165}
166
167static int qe_eptx_stall_change(struct qe_ep *ep, int value)
168{
169 u16 tem_usep;
170 u8 epnum = ep->epnum;
171 struct qe_udc *udc = ep->udc;
172
173 tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
174 tem_usep = tem_usep & ~USB_THS_MASK;
175 if (value == 1)
176 tem_usep |= USB_THS_STALL;
177 else if (ep->dir == USB_DIR_OUT)
178 tem_usep |= USB_THS_IGNORE_IN;
179
180 out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
181
182 return 0;
183}
184
185static int qe_ep0_stall(struct qe_udc *udc)
186{
187 qe_eptx_stall_change(&udc->eps[0], 1);
188 qe_eprx_stall_change(&udc->eps[0], 1);
d77c1198
SAS
189 udc->ep0_state = WAIT_FOR_SETUP;
190 udc->ep0_dir = 0;
3948f0e0
LY
191 return 0;
192}
193
194static int qe_eprx_nack(struct qe_ep *ep)
195{
196 u8 epnum = ep->epnum;
197 struct qe_udc *udc = ep->udc;
198
199 if (ep->state == EP_STATE_IDLE) {
200 /* Set the ep's nack */
201 clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
202 USB_RHS_MASK, USB_RHS_NACK);
203
204 /* Mask Rx and Busy interrupts */
205 clrbits16(&udc->usb_regs->usb_usbmr,
206 (USB_E_RXB_MASK | USB_E_BSY_MASK));
207
208 ep->state = EP_STATE_NACK;
209 }
210 return 0;
211}
212
213static int qe_eprx_normal(struct qe_ep *ep)
214{
215 struct qe_udc *udc = ep->udc;
216
217 if (ep->state == EP_STATE_NACK) {
218 clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
219 USB_RTHS_MASK, USB_THS_IGNORE_IN);
220
221 /* Unmask RX interrupts */
222 out_be16(&udc->usb_regs->usb_usber,
223 USB_E_BSY_MASK | USB_E_RXB_MASK);
224 setbits16(&udc->usb_regs->usb_usbmr,
225 (USB_E_RXB_MASK | USB_E_BSY_MASK));
226
227 ep->state = EP_STATE_IDLE;
228 ep->has_data = 0;
229 }
230
231 return 0;
232}
233
234static int qe_ep_cmd_stoptx(struct qe_ep *ep)
235{
236 if (ep->udc->soc_type == PORT_CPM)
237 cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
238 CPM_USB_STOP_TX_OPCODE);
239 else
240 qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
241 ep->epnum, 0);
242
243 return 0;
244}
245
246static int qe_ep_cmd_restarttx(struct qe_ep *ep)
247{
248 if (ep->udc->soc_type == PORT_CPM)
249 cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
250 CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
251 else
252 qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
253 ep->epnum, 0);
254
255 return 0;
256}
257
258static int qe_ep_flushtxfifo(struct qe_ep *ep)
259{
260 struct qe_udc *udc = ep->udc;
261 int i;
262
263 i = (int)ep->epnum;
264
265 qe_ep_cmd_stoptx(ep);
266 out_8(&udc->usb_regs->usb_uscom,
267 USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
268 out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
269 out_be32(&udc->ep_param[i]->tstate, 0);
270 out_be16(&udc->ep_param[i]->tbcnt, 0);
271
272 ep->c_txbd = ep->txbase;
273 ep->n_txbd = ep->txbase;
274 qe_ep_cmd_restarttx(ep);
275 return 0;
276}
277
278static int qe_ep_filltxfifo(struct qe_ep *ep)
279{
280 struct qe_udc *udc = ep->udc;
281
282 out_8(&udc->usb_regs->usb_uscom,
283 USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
284 return 0;
285}
286
287static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
288{
289 struct qe_ep *ep;
290 u32 bdring_len;
291 struct qe_bd __iomem *bd;
292 int i;
293
294 ep = &udc->eps[pipe_num];
295
296 if (ep->dir == USB_DIR_OUT)
297 bdring_len = USB_BDRING_LEN_RX;
298 else
299 bdring_len = USB_BDRING_LEN;
300
301 bd = ep->rxbase;
302 for (i = 0; i < (bdring_len - 1); i++) {
303 out_be32((u32 __iomem *)bd, R_E | R_I);
304 bd++;
305 }
306 out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
307
308 bd = ep->txbase;
309 for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
310 out_be32(&bd->buf, 0);
311 out_be32((u32 __iomem *)bd, 0);
312 bd++;
313 }
314 out_be32((u32 __iomem *)bd, T_W);
315
316 return 0;
317}
318
319static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
320{
321 struct qe_ep *ep;
322 u16 tmpusep;
323
324 ep = &udc->eps[pipe_num];
325 tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
326 tmpusep &= ~USB_RTHS_MASK;
327
328 switch (ep->dir) {
329 case USB_DIR_BOTH:
330 qe_ep_flushtxfifo(ep);
331 break;
332 case USB_DIR_OUT:
333 tmpusep |= USB_THS_IGNORE_IN;
334 break;
335 case USB_DIR_IN:
336 qe_ep_flushtxfifo(ep);
337 tmpusep |= USB_RHS_IGNORE_OUT;
338 break;
339 default:
340 break;
341 }
342 out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
343
344 qe_epbds_reset(udc, pipe_num);
345
346 return 0;
347}
348
349static int qe_ep_toggledata01(struct qe_ep *ep)
350{
351 ep->data01 ^= 0x1;
352 return 0;
353}
354
355static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
356{
357 struct qe_ep *ep = &udc->eps[pipe_num];
358 unsigned long tmp_addr = 0;
359 struct usb_ep_para __iomem *epparam;
360 int i;
361 struct qe_bd __iomem *bd;
362 int bdring_len;
363
364 if (ep->dir == USB_DIR_OUT)
365 bdring_len = USB_BDRING_LEN_RX;
366 else
367 bdring_len = USB_BDRING_LEN;
368
369 epparam = udc->ep_param[pipe_num];
370 /* alloc multi-ram for BD rings and set the ep parameters */
371 tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
372 USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
cd40c4c4
AV
373 if (IS_ERR_VALUE(tmp_addr))
374 return -ENOMEM;
375
3948f0e0
LY
376 out_be16(&epparam->rbase, (u16)tmp_addr);
377 out_be16(&epparam->tbase, (u16)(tmp_addr +
378 (sizeof(struct qe_bd) * bdring_len)));
379
380 out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
381 out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
382
383 ep->rxbase = cpm_muram_addr(tmp_addr);
384 ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
385 * bdring_len));
386 ep->n_rxbd = ep->rxbase;
387 ep->e_rxbd = ep->rxbase;
388 ep->n_txbd = ep->txbase;
389 ep->c_txbd = ep->txbase;
390 ep->data01 = 0; /* data0 */
391
392 /* Init TX and RX bds */
393 bd = ep->rxbase;
394 for (i = 0; i < bdring_len - 1; i++) {
395 out_be32(&bd->buf, 0);
396 out_be32((u32 __iomem *)bd, 0);
397 bd++;
398 }
399 out_be32(&bd->buf, 0);
400 out_be32((u32 __iomem *)bd, R_W);
401
402 bd = ep->txbase;
403 for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
404 out_be32(&bd->buf, 0);
405 out_be32((u32 __iomem *)bd, 0);
406 bd++;
407 }
408 out_be32(&bd->buf, 0);
409 out_be32((u32 __iomem *)bd, T_W);
410
411 return 0;
412}
413
414static int qe_ep_rxbd_update(struct qe_ep *ep)
415{
416 unsigned int size;
417 int i;
418 unsigned int tmp;
419 struct qe_bd __iomem *bd;
420 unsigned int bdring_len;
421
422 if (ep->rxbase == NULL)
423 return -EINVAL;
424
425 bd = ep->rxbase;
426
427 ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
428 if (ep->rxframe == NULL) {
429 dev_err(ep->udc->dev, "malloc rxframe failed\n");
430 return -ENOMEM;
431 }
432
433 qe_frame_init(ep->rxframe);
434
435 if (ep->dir == USB_DIR_OUT)
436 bdring_len = USB_BDRING_LEN_RX;
437 else
438 bdring_len = USB_BDRING_LEN;
439
440 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
441 ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
442 if (ep->rxbuffer == NULL) {
443 dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
444 size);
445 kfree(ep->rxframe);
446 return -ENOMEM;
447 }
448
449 ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
450 if (ep->rxbuf_d == DMA_ADDR_INVALID) {
d77c1198 451 ep->rxbuf_d = dma_map_single(ep->udc->gadget.dev.parent,
3948f0e0
LY
452 ep->rxbuffer,
453 size,
454 DMA_FROM_DEVICE);
455 ep->rxbufmap = 1;
456 } else {
d77c1198 457 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
3948f0e0
LY
458 ep->rxbuf_d, size,
459 DMA_FROM_DEVICE);
460 ep->rxbufmap = 0;
461 }
462
463 size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
464 tmp = ep->rxbuf_d;
465 tmp = (u32)(((tmp >> 2) << 2) + 4);
466
467 for (i = 0; i < bdring_len - 1; i++) {
468 out_be32(&bd->buf, tmp);
469 out_be32((u32 __iomem *)bd, (R_E | R_I));
470 tmp = tmp + size;
471 bd++;
472 }
473 out_be32(&bd->buf, tmp);
474 out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
475
476 return 0;
477}
478
479static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
480{
481 struct qe_ep *ep = &udc->eps[pipe_num];
482 struct usb_ep_para __iomem *epparam;
483 u16 usep, logepnum;
484 u16 tmp;
485 u8 rtfcr = 0;
486
487 epparam = udc->ep_param[pipe_num];
488
489 usep = 0;
ec39e2ae 490 logepnum = (ep->ep.desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
3948f0e0
LY
491 usep |= (logepnum << USB_EPNUM_SHIFT);
492
ec39e2ae 493 switch (ep->ep.desc->bmAttributes & 0x03) {
3948f0e0
LY
494 case USB_ENDPOINT_XFER_BULK:
495 usep |= USB_TRANS_BULK;
496 break;
497 case USB_ENDPOINT_XFER_ISOC:
498 usep |= USB_TRANS_ISO;
499 break;
500 case USB_ENDPOINT_XFER_INT:
501 usep |= USB_TRANS_INT;
502 break;
503 default:
504 usep |= USB_TRANS_CTR;
505 break;
506 }
507
508 switch (ep->dir) {
509 case USB_DIR_OUT:
510 usep |= USB_THS_IGNORE_IN;
511 break;
512 case USB_DIR_IN:
513 usep |= USB_RHS_IGNORE_OUT;
514 break;
515 default:
516 break;
517 }
518 out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
519
520 rtfcr = 0x30;
521 out_8(&epparam->rbmr, rtfcr);
522 out_8(&epparam->tbmr, rtfcr);
523
524 tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
525 /* MRBLR must be divisble by 4 */
526 tmp = (u16)(((tmp >> 2) << 2) + 4);
527 out_be16(&epparam->mrblr, tmp);
528
529 return 0;
530}
531
532static int qe_ep_init(struct qe_udc *udc,
533 unsigned char pipe_num,
534 const struct usb_endpoint_descriptor *desc)
535{
536 struct qe_ep *ep = &udc->eps[pipe_num];
537 unsigned long flags;
538 int reval = 0;
539 u16 max = 0;
540
29cc8897 541 max = usb_endpoint_maxp(desc);
3948f0e0
LY
542
543 /* check the max package size validate for this endpoint */
544 /* Refer to USB2.0 spec table 9-13,
545 */
546 if (pipe_num != 0) {
547 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
548 case USB_ENDPOINT_XFER_BULK:
549 if (strstr(ep->ep.name, "-iso")
550 || strstr(ep->ep.name, "-int"))
551 goto en_done;
552 switch (udc->gadget.speed) {
553 case USB_SPEED_HIGH:
554 if ((max == 128) || (max == 256) || (max == 512))
555 break;
556 default:
557 switch (max) {
558 case 4:
559 case 8:
560 case 16:
561 case 32:
562 case 64:
563 break;
564 default:
565 case USB_SPEED_LOW:
566 goto en_done;
567 }
568 }
569 break;
570 case USB_ENDPOINT_XFER_INT:
571 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
572 goto en_done;
573 switch (udc->gadget.speed) {
574 case USB_SPEED_HIGH:
575 if (max <= 1024)
576 break;
577 case USB_SPEED_FULL:
578 if (max <= 64)
579 break;
580 default:
581 if (max <= 8)
582 break;
583 goto en_done;
584 }
585 break;
586 case USB_ENDPOINT_XFER_ISOC:
587 if (strstr(ep->ep.name, "-bulk")
588 || strstr(ep->ep.name, "-int"))
589 goto en_done;
590 switch (udc->gadget.speed) {
591 case USB_SPEED_HIGH:
592 if (max <= 1024)
593 break;
594 case USB_SPEED_FULL:
595 if (max <= 1023)
596 break;
597 default:
598 goto en_done;
599 }
600 break;
601 case USB_ENDPOINT_XFER_CONTROL:
602 if (strstr(ep->ep.name, "-iso")
603 || strstr(ep->ep.name, "-int"))
604 goto en_done;
605 switch (udc->gadget.speed) {
606 case USB_SPEED_HIGH:
607 case USB_SPEED_FULL:
608 switch (max) {
609 case 1:
610 case 2:
611 case 4:
612 case 8:
613 case 16:
614 case 32:
615 case 64:
616 break;
617 default:
618 goto en_done;
619 }
620 case USB_SPEED_LOW:
621 switch (max) {
622 case 1:
623 case 2:
624 case 4:
625 case 8:
626 break;
627 default:
628 goto en_done;
629 }
630 default:
631 goto en_done;
632 }
633 break;
634
635 default:
636 goto en_done;
637 }
638 } /* if ep0*/
639
640 spin_lock_irqsave(&udc->lock, flags);
641
642 /* initialize ep structure */
643 ep->ep.maxpacket = max;
644 ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
ec39e2ae 645 ep->ep.desc = desc;
3948f0e0
LY
646 ep->stopped = 0;
647 ep->init = 1;
648
649 if (pipe_num == 0) {
650 ep->dir = USB_DIR_BOTH;
651 udc->ep0_dir = USB_DIR_OUT;
652 udc->ep0_state = WAIT_FOR_SETUP;
653 } else {
654 switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
655 case USB_DIR_OUT:
656 ep->dir = USB_DIR_OUT;
657 break;
658 case USB_DIR_IN:
659 ep->dir = USB_DIR_IN;
660 default:
661 break;
662 }
663 }
664
665 /* hardware special operation */
666 qe_ep_bd_init(udc, pipe_num);
667 if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
668 reval = qe_ep_rxbd_update(ep);
669 if (reval)
670 goto en_done1;
671 }
672
673 if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
674 ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
675 if (ep->txframe == NULL) {
676 dev_err(udc->dev, "malloc txframe failed\n");
677 goto en_done2;
678 }
679 qe_frame_init(ep->txframe);
680 }
681
682 qe_ep_register_init(udc, pipe_num);
683
684 /* Now HW will be NAKing transfers to that EP,
685 * until a buffer is queued to it. */
686 spin_unlock_irqrestore(&udc->lock, flags);
687
688 return 0;
689en_done2:
690 kfree(ep->rxbuffer);
691 kfree(ep->rxframe);
692en_done1:
693 spin_unlock_irqrestore(&udc->lock, flags);
694en_done:
cd40c4c4 695 dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
3948f0e0
LY
696 return -ENODEV;
697}
698
d77c1198 699static inline void qe_usb_enable(struct qe_udc *udc)
3948f0e0 700{
d77c1198 701 setbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
3948f0e0
LY
702}
703
d77c1198 704static inline void qe_usb_disable(struct qe_udc *udc)
3948f0e0 705{
d77c1198 706 clrbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
3948f0e0
LY
707}
708
709/*----------------------------------------------------------------------------*
710 * USB and EP basic manipulate function end *
711 *----------------------------------------------------------------------------*/
712
713
714/******************************************************************************
715 UDC transmit and receive process
716 ******************************************************************************/
717static void recycle_one_rxbd(struct qe_ep *ep)
718{
719 u32 bdstatus;
720
721 bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
722 bdstatus = R_I | R_E | (bdstatus & R_W);
723 out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
724
725 if (bdstatus & R_W)
726 ep->e_rxbd = ep->rxbase;
727 else
728 ep->e_rxbd++;
729}
730
731static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
732{
733 u32 bdstatus;
734 struct qe_bd __iomem *bd, *nextbd;
735 unsigned char stop = 0;
736
737 nextbd = ep->n_rxbd;
738 bd = ep->e_rxbd;
739 bdstatus = in_be32((u32 __iomem *)bd);
740
741 while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
742 bdstatus = R_E | R_I | (bdstatus & R_W);
743 out_be32((u32 __iomem *)bd, bdstatus);
744
745 if (bdstatus & R_W)
746 bd = ep->rxbase;
747 else
748 bd++;
749
750 bdstatus = in_be32((u32 __iomem *)bd);
751 if (stopatnext && (bd == nextbd))
752 stop = 1;
753 }
754
755 ep->e_rxbd = bd;
756}
757
758static void ep_recycle_rxbds(struct qe_ep *ep)
759{
760 struct qe_bd __iomem *bd = ep->n_rxbd;
761 u32 bdstatus;
762 u8 epnum = ep->epnum;
763 struct qe_udc *udc = ep->udc;
764
765 bdstatus = in_be32((u32 __iomem *)bd);
766 if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
767 bd = ep->rxbase +
768 ((in_be16(&udc->ep_param[epnum]->rbptr) -
769 in_be16(&udc->ep_param[epnum]->rbase))
770 >> 3);
771 bdstatus = in_be32((u32 __iomem *)bd);
772
773 if (bdstatus & R_W)
774 bd = ep->rxbase;
775 else
776 bd++;
777
778 ep->e_rxbd = bd;
779 recycle_rxbds(ep, 0);
780 ep->e_rxbd = ep->n_rxbd;
781 } else
782 recycle_rxbds(ep, 1);
783
784 if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
785 out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
786
787 if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
788 qe_eprx_normal(ep);
789
790 ep->localnack = 0;
791}
792
793static void setup_received_handle(struct qe_udc *udc,
794 struct usb_ctrlrequest *setup);
795static int qe_ep_rxframe_handle(struct qe_ep *ep);
796static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
797/* when BD PID is setup, handle the packet */
798static int ep0_setup_handle(struct qe_udc *udc)
799{
800 struct qe_ep *ep = &udc->eps[0];
801 struct qe_frame *pframe;
802 unsigned int fsize;
803 u8 *cp;
804
805 pframe = ep->rxframe;
806 if ((frame_get_info(pframe) & PID_SETUP)
807 && (udc->ep0_state == WAIT_FOR_SETUP)) {
808 fsize = frame_get_length(pframe);
809 if (unlikely(fsize != 8))
810 return -EINVAL;
811 cp = (u8 *)&udc->local_setup_buff;
812 memcpy(cp, pframe->data, fsize);
813 ep->data01 = 1;
814
815 /* handle the usb command base on the usb_ctrlrequest */
816 setup_received_handle(udc, &udc->local_setup_buff);
817 return 0;
818 }
819 return -EINVAL;
820}
821
822static int qe_ep0_rx(struct qe_udc *udc)
823{
824 struct qe_ep *ep = &udc->eps[0];
825 struct qe_frame *pframe;
826 struct qe_bd __iomem *bd;
827 u32 bdstatus, length;
828 u32 vaddr;
829
830 pframe = ep->rxframe;
831
832 if (ep->dir == USB_DIR_IN) {
833 dev_err(udc->dev, "ep0 not a control endpoint\n");
834 return -EINVAL;
835 }
836
837 bd = ep->n_rxbd;
838 bdstatus = in_be32((u32 __iomem *)bd);
839 length = bdstatus & BD_LENGTH_MASK;
840
841 while (!(bdstatus & R_E) && length) {
842 if ((bdstatus & R_F) && (bdstatus & R_L)
843 && !(bdstatus & R_ERROR)) {
844 if (length == USB_CRC_SIZE) {
845 udc->ep0_state = WAIT_FOR_SETUP;
846 dev_vdbg(udc->dev,
847 "receive a ZLP in status phase\n");
848 } else {
849 qe_frame_clean(pframe);
850 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
851 frame_set_data(pframe, (u8 *)vaddr);
852 frame_set_length(pframe,
853 (length - USB_CRC_SIZE));
854 frame_set_status(pframe, FRAME_OK);
855 switch (bdstatus & R_PID) {
856 case R_PID_SETUP:
857 frame_set_info(pframe, PID_SETUP);
858 break;
859 case R_PID_DATA1:
860 frame_set_info(pframe, PID_DATA1);
861 break;
862 default:
863 frame_set_info(pframe, PID_DATA0);
864 break;
865 }
866
867 if ((bdstatus & R_PID) == R_PID_SETUP)
868 ep0_setup_handle(udc);
869 else
870 qe_ep_rxframe_handle(ep);
871 }
872 } else {
873 dev_err(udc->dev, "The receive frame with error!\n");
874 }
875
876 /* note: don't clear the rxbd's buffer address */
877 recycle_one_rxbd(ep);
878
879 /* Get next BD */
880 if (bdstatus & R_W)
881 bd = ep->rxbase;
882 else
883 bd++;
884
885 bdstatus = in_be32((u32 __iomem *)bd);
886 length = bdstatus & BD_LENGTH_MASK;
887
888 }
889
890 ep->n_rxbd = bd;
891
892 return 0;
893}
894
895static int qe_ep_rxframe_handle(struct qe_ep *ep)
896{
897 struct qe_frame *pframe;
898 u8 framepid = 0;
899 unsigned int fsize;
900 u8 *cp;
901 struct qe_req *req;
902
903 pframe = ep->rxframe;
904
905 if (frame_get_info(pframe) & PID_DATA1)
906 framepid = 0x1;
907
908 if (framepid != ep->data01) {
909 dev_err(ep->udc->dev, "the data01 error!\n");
910 return -EIO;
911 }
912
913 fsize = frame_get_length(pframe);
914 if (list_empty(&ep->queue)) {
915 dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
916 } else {
917 req = list_entry(ep->queue.next, struct qe_req, queue);
918
919 cp = (u8 *)(req->req.buf) + req->req.actual;
920 if (cp) {
921 memcpy(cp, pframe->data, fsize);
922 req->req.actual += fsize;
923 if ((fsize < ep->ep.maxpacket) ||
924 (req->req.actual >= req->req.length)) {
925 if (ep->epnum == 0)
926 ep0_req_complete(ep->udc, req);
927 else
928 done(ep, req, 0);
929 if (list_empty(&ep->queue) && ep->epnum != 0)
930 qe_eprx_nack(ep);
931 }
932 }
933 }
934
935 qe_ep_toggledata01(ep);
936
937 return 0;
938}
939
940static void ep_rx_tasklet(unsigned long data)
941{
942 struct qe_udc *udc = (struct qe_udc *)data;
943 struct qe_ep *ep;
944 struct qe_frame *pframe;
945 struct qe_bd __iomem *bd;
946 unsigned long flags;
947 u32 bdstatus, length;
948 u32 vaddr, i;
949
950 spin_lock_irqsave(&udc->lock, flags);
951
952 for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
953 ep = &udc->eps[i];
954
955 if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
956 dev_dbg(udc->dev,
957 "This is a transmit ep or disable tasklet!\n");
958 continue;
959 }
960
961 pframe = ep->rxframe;
962 bd = ep->n_rxbd;
963 bdstatus = in_be32((u32 __iomem *)bd);
964 length = bdstatus & BD_LENGTH_MASK;
965
966 while (!(bdstatus & R_E) && length) {
967 if (list_empty(&ep->queue)) {
968 qe_eprx_nack(ep);
969 dev_dbg(udc->dev,
970 "The rxep have noreq %d\n",
971 ep->has_data);
972 break;
973 }
974
975 if ((bdstatus & R_F) && (bdstatus & R_L)
976 && !(bdstatus & R_ERROR)) {
977 qe_frame_clean(pframe);
978 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
979 frame_set_data(pframe, (u8 *)vaddr);
980 frame_set_length(pframe,
981 (length - USB_CRC_SIZE));
982 frame_set_status(pframe, FRAME_OK);
983 switch (bdstatus & R_PID) {
984 case R_PID_DATA1:
985 frame_set_info(pframe, PID_DATA1);
986 break;
987 case R_PID_SETUP:
988 frame_set_info(pframe, PID_SETUP);
989 break;
990 default:
991 frame_set_info(pframe, PID_DATA0);
992 break;
993 }
994 /* handle the rx frame */
995 qe_ep_rxframe_handle(ep);
996 } else {
997 dev_err(udc->dev,
998 "error in received frame\n");
999 }
1000 /* note: don't clear the rxbd's buffer address */
1001 /*clear the length */
1002 out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
1003 ep->has_data--;
1004 if (!(ep->localnack))
1005 recycle_one_rxbd(ep);
1006
1007 /* Get next BD */
1008 if (bdstatus & R_W)
1009 bd = ep->rxbase;
1010 else
1011 bd++;
1012
1013 bdstatus = in_be32((u32 __iomem *)bd);
1014 length = bdstatus & BD_LENGTH_MASK;
1015 }
1016
1017 ep->n_rxbd = bd;
1018
1019 if (ep->localnack)
1020 ep_recycle_rxbds(ep);
1021
1022 ep->enable_tasklet = 0;
1023 } /* for i=1 */
1024
1025 spin_unlock_irqrestore(&udc->lock, flags);
1026}
1027
1028static int qe_ep_rx(struct qe_ep *ep)
1029{
1030 struct qe_udc *udc;
1031 struct qe_frame *pframe;
1032 struct qe_bd __iomem *bd;
1033 u16 swoffs, ucoffs, emptybds;
1034
1035 udc = ep->udc;
1036 pframe = ep->rxframe;
1037
1038 if (ep->dir == USB_DIR_IN) {
1039 dev_err(udc->dev, "transmit ep in rx function\n");
1040 return -EINVAL;
1041 }
1042
1043 bd = ep->n_rxbd;
1044
1045 swoffs = (u16)(bd - ep->rxbase);
1046 ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
1047 in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
1048 if (swoffs < ucoffs)
1049 emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
1050 else
1051 emptybds = swoffs - ucoffs;
1052
1053 if (emptybds < MIN_EMPTY_BDS) {
1054 qe_eprx_nack(ep);
1055 ep->localnack = 1;
1056 dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
1057 }
1058 ep->has_data = USB_BDRING_LEN_RX - emptybds;
1059
1060 if (list_empty(&ep->queue)) {
1061 qe_eprx_nack(ep);
1062 dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
1063 ep->has_data);
1064 return 0;
1065 }
1066
1067 tasklet_schedule(&udc->rx_tasklet);
1068 ep->enable_tasklet = 1;
1069
1070 return 0;
1071}
1072
1073/* send data from a frame, no matter what tx_req */
1074static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
1075{
1076 struct qe_udc *udc = ep->udc;
1077 struct qe_bd __iomem *bd;
1078 u16 saveusbmr;
1079 u32 bdstatus, pidmask;
1080 u32 paddr;
1081
1082 if (ep->dir == USB_DIR_OUT) {
1083 dev_err(udc->dev, "receive ep passed to tx function\n");
1084 return -EINVAL;
1085 }
1086
1087 /* Disable the Tx interrupt */
1088 saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
1089 out_be16(&udc->usb_regs->usb_usbmr,
1090 saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
1091
1092 bd = ep->n_txbd;
1093 bdstatus = in_be32((u32 __iomem *)bd);
1094
1095 if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
1096 if (frame_get_length(frame) == 0) {
1097 frame_set_data(frame, udc->nullbuf);
1098 frame_set_length(frame, 2);
1099 frame->info |= (ZLP | NO_CRC);
1100 dev_vdbg(udc->dev, "the frame size = 0\n");
1101 }
1102 paddr = virt_to_phys((void *)frame->data);
1103 out_be32(&bd->buf, paddr);
1104 bdstatus = (bdstatus&T_W);
1105 if (!(frame_get_info(frame) & NO_CRC))
1106 bdstatus |= T_R | T_I | T_L | T_TC
1107 | frame_get_length(frame);
1108 else
1109 bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
1110
1111 /* if the packet is a ZLP in status phase */
1112 if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
1113 ep->data01 = 0x1;
1114
1115 if (ep->data01) {
1116 pidmask = T_PID_DATA1;
1117 frame->info |= PID_DATA1;
1118 } else {
1119 pidmask = T_PID_DATA0;
1120 frame->info |= PID_DATA0;
1121 }
1122 bdstatus |= T_CNF;
1123 bdstatus |= pidmask;
1124 out_be32((u32 __iomem *)bd, bdstatus);
1125 qe_ep_filltxfifo(ep);
1126
1127 /* enable the TX interrupt */
1128 out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
1129
1130 qe_ep_toggledata01(ep);
1131 if (bdstatus & T_W)
1132 ep->n_txbd = ep->txbase;
1133 else
1134 ep->n_txbd++;
1135
1136 return 0;
1137 } else {
1138 out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
1139 dev_vdbg(udc->dev, "The tx bd is not ready!\n");
1140 return -EBUSY;
1141 }
1142}
1143
928dfa6c 1144/* when a bd was transmitted, the function can
3948f0e0
LY
1145 * handle the tx_req, not include ep0 */
1146static int txcomplete(struct qe_ep *ep, unsigned char restart)
1147{
1148 if (ep->tx_req != NULL) {
d834508e
VL
1149 struct qe_req *req = ep->tx_req;
1150 unsigned zlp = 0, last_len = 0;
1151
1152 last_len = min_t(unsigned, req->req.length - ep->sent,
1153 ep->ep.maxpacket);
1154
3948f0e0
LY
1155 if (!restart) {
1156 int asent = ep->last;
1157 ep->sent += asent;
1158 ep->last -= asent;
1159 } else {
1160 ep->last = 0;
1161 }
1162
d834508e
VL
1163 /* zlp needed when req->re.zero is set */
1164 if (req->req.zero) {
1165 if (last_len == 0 ||
1166 (req->req.length % ep->ep.maxpacket) != 0)
1167 zlp = 0;
1168 else
1169 zlp = 1;
1170 } else
1171 zlp = 0;
1172
3948f0e0 1173 /* a request already were transmitted completely */
d834508e 1174 if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
3948f0e0
LY
1175 done(ep, ep->tx_req, 0);
1176 ep->tx_req = NULL;
1177 ep->last = 0;
1178 ep->sent = 0;
1179 }
1180 }
1181
1182 /* we should gain a new tx_req fot this endpoint */
1183 if (ep->tx_req == NULL) {
1184 if (!list_empty(&ep->queue)) {
1185 ep->tx_req = list_entry(ep->queue.next, struct qe_req,
1186 queue);
1187 ep->last = 0;
1188 ep->sent = 0;
1189 }
1190 }
1191
1192 return 0;
1193}
1194
928dfa6c 1195/* give a frame and a tx_req, send some data */
3948f0e0
LY
1196static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
1197{
1198 unsigned int size;
1199 u8 *buf;
1200
1201 qe_frame_clean(frame);
1202 size = min_t(u32, (ep->tx_req->req.length - ep->sent),
1203 ep->ep.maxpacket);
1204 buf = (u8 *)ep->tx_req->req.buf + ep->sent;
1205 if (buf && size) {
1206 ep->last = size;
d834508e 1207 ep->tx_req->req.actual += size;
3948f0e0
LY
1208 frame_set_data(frame, buf);
1209 frame_set_length(frame, size);
1210 frame_set_status(frame, FRAME_OK);
1211 frame_set_info(frame, 0);
1212 return qe_ep_tx(ep, frame);
1213 }
1214 return -EIO;
1215}
1216
1217/* give a frame struct,send a ZLP */
1218static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
1219{
1220 struct qe_udc *udc = ep->udc;
1221
1222 if (frame == NULL)
1223 return -ENODEV;
1224
1225 qe_frame_clean(frame);
1226 frame_set_data(frame, (u8 *)udc->nullbuf);
1227 frame_set_length(frame, 2);
1228 frame_set_status(frame, FRAME_OK);
1229 frame_set_info(frame, (ZLP | NO_CRC | infor));
1230
1231 return qe_ep_tx(ep, frame);
1232}
1233
1234static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
1235{
1236 struct qe_req *req = ep->tx_req;
1237 int reval;
1238
1239 if (req == NULL)
1240 return -ENODEV;
1241
1242 if ((req->req.length - ep->sent) > 0)
1243 reval = qe_usb_senddata(ep, frame);
1244 else
1245 reval = sendnulldata(ep, frame, 0);
1246
1247 return reval;
1248}
1249
1250/* if direction is DIR_IN, the status is Device->Host
1251 * if direction is DIR_OUT, the status transaction is Device<-Host
1252 * in status phase, udc create a request and gain status */
1253static int ep0_prime_status(struct qe_udc *udc, int direction)
1254{
1255
1256 struct qe_ep *ep = &udc->eps[0];
1257
1258 if (direction == USB_DIR_IN) {
1259 udc->ep0_state = DATA_STATE_NEED_ZLP;
1260 udc->ep0_dir = USB_DIR_IN;
1261 sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
1262 } else {
1263 udc->ep0_dir = USB_DIR_OUT;
1264 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1265 }
1266
1267 return 0;
1268}
1269
1270/* a request complete in ep0, whether gadget request or udc request */
1271static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
1272{
1273 struct qe_ep *ep = &udc->eps[0];
1274 /* because usb and ep's status already been set in ch9setaddress() */
1275
1276 switch (udc->ep0_state) {
1277 case DATA_STATE_XMIT:
1278 done(ep, req, 0);
1279 /* receive status phase */
1280 if (ep0_prime_status(udc, USB_DIR_OUT))
1281 qe_ep0_stall(udc);
1282 break;
1283
1284 case DATA_STATE_NEED_ZLP:
1285 done(ep, req, 0);
1286 udc->ep0_state = WAIT_FOR_SETUP;
1287 break;
1288
1289 case DATA_STATE_RECV:
1290 done(ep, req, 0);
1291 /* send status phase */
1292 if (ep0_prime_status(udc, USB_DIR_IN))
1293 qe_ep0_stall(udc);
1294 break;
1295
1296 case WAIT_FOR_OUT_STATUS:
1297 done(ep, req, 0);
1298 udc->ep0_state = WAIT_FOR_SETUP;
1299 break;
1300
1301 case WAIT_FOR_SETUP:
1302 dev_vdbg(udc->dev, "Unexpected interrupt\n");
1303 break;
1304
1305 default:
1306 qe_ep0_stall(udc);
1307 break;
1308 }
1309}
1310
1311static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
1312{
1313 struct qe_req *tx_req = NULL;
1314 struct qe_frame *frame = ep->txframe;
1315
1316 if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
1317 if (!restart)
1318 ep->udc->ep0_state = WAIT_FOR_SETUP;
1319 else
1320 sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
1321 return 0;
1322 }
1323
1324 tx_req = ep->tx_req;
1325 if (tx_req != NULL) {
1326 if (!restart) {
1327 int asent = ep->last;
1328 ep->sent += asent;
1329 ep->last -= asent;
1330 } else {
1331 ep->last = 0;
1332 }
1333
1334 /* a request already were transmitted completely */
1335 if ((ep->tx_req->req.length - ep->sent) <= 0) {
1336 ep->tx_req->req.actual = (unsigned int)ep->sent;
1337 ep0_req_complete(ep->udc, ep->tx_req);
1338 ep->tx_req = NULL;
1339 ep->last = 0;
1340 ep->sent = 0;
1341 }
1342 } else {
1343 dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
1344 }
1345
1346 return 0;
1347}
1348
1349static int ep0_txframe_handle(struct qe_ep *ep)
1350{
1351 /* if have error, transmit again */
1352 if (frame_get_status(ep->txframe) & FRAME_ERROR) {
1353 qe_ep_flushtxfifo(ep);
1354 dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
1355 if (frame_get_info(ep->txframe) & PID_DATA0)
1356 ep->data01 = 0;
1357 else
1358 ep->data01 = 1;
1359
1360 ep0_txcomplete(ep, 1);
1361 } else
1362 ep0_txcomplete(ep, 0);
1363
1364 frame_create_tx(ep, ep->txframe);
1365 return 0;
1366}
1367
1368static int qe_ep0_txconf(struct qe_ep *ep)
1369{
1370 struct qe_bd __iomem *bd;
1371 struct qe_frame *pframe;
1372 u32 bdstatus;
1373
1374 bd = ep->c_txbd;
1375 bdstatus = in_be32((u32 __iomem *)bd);
1376 while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
1377 pframe = ep->txframe;
1378
1379 /* clear and recycle the BD */
1380 out_be32((u32 __iomem *)bd, bdstatus & T_W);
1381 out_be32(&bd->buf, 0);
1382 if (bdstatus & T_W)
1383 ep->c_txbd = ep->txbase;
1384 else
1385 ep->c_txbd++;
1386
1387 if (ep->c_txbd == ep->n_txbd) {
1388 if (bdstatus & DEVICE_T_ERROR) {
1389 frame_set_status(pframe, FRAME_ERROR);
1390 if (bdstatus & T_TO)
1391 pframe->status |= TX_ER_TIMEOUT;
1392 if (bdstatus & T_UN)
1393 pframe->status |= TX_ER_UNDERUN;
1394 }
1395 ep0_txframe_handle(ep);
1396 }
1397
1398 bd = ep->c_txbd;
1399 bdstatus = in_be32((u32 __iomem *)bd);
1400 }
1401
1402 return 0;
1403}
1404
1405static int ep_txframe_handle(struct qe_ep *ep)
1406{
1407 if (frame_get_status(ep->txframe) & FRAME_ERROR) {
1408 qe_ep_flushtxfifo(ep);
1409 dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
1410 if (frame_get_info(ep->txframe) & PID_DATA0)
1411 ep->data01 = 0;
1412 else
1413 ep->data01 = 1;
1414
1415 txcomplete(ep, 1);
1416 } else
1417 txcomplete(ep, 0);
1418
1419 frame_create_tx(ep, ep->txframe); /* send the data */
1420 return 0;
1421}
1422
1423/* confirm the already trainsmited bd */
1424static int qe_ep_txconf(struct qe_ep *ep)
1425{
1426 struct qe_bd __iomem *bd;
1427 struct qe_frame *pframe = NULL;
1428 u32 bdstatus;
1429 unsigned char breakonrxinterrupt = 0;
1430
1431 bd = ep->c_txbd;
1432 bdstatus = in_be32((u32 __iomem *)bd);
1433 while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
1434 pframe = ep->txframe;
1435 if (bdstatus & DEVICE_T_ERROR) {
1436 frame_set_status(pframe, FRAME_ERROR);
1437 if (bdstatus & T_TO)
1438 pframe->status |= TX_ER_TIMEOUT;
1439 if (bdstatus & T_UN)
1440 pframe->status |= TX_ER_UNDERUN;
1441 }
1442
1443 /* clear and recycle the BD */
1444 out_be32((u32 __iomem *)bd, bdstatus & T_W);
1445 out_be32(&bd->buf, 0);
1446 if (bdstatus & T_W)
1447 ep->c_txbd = ep->txbase;
1448 else
1449 ep->c_txbd++;
1450
1451 /* handle the tx frame */
1452 ep_txframe_handle(ep);
1453 bd = ep->c_txbd;
1454 bdstatus = in_be32((u32 __iomem *)bd);
1455 }
1456 if (breakonrxinterrupt)
1457 return -EIO;
1458 else
1459 return 0;
1460}
1461
1462/* Add a request in queue, and try to transmit a packet */
1463static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
1464{
1465 int reval = 0;
1466
1467 if (ep->tx_req == NULL) {
1468 ep->sent = 0;
1469 ep->last = 0;
1470 txcomplete(ep, 0); /* can gain a new tx_req */
1471 reval = frame_create_tx(ep, ep->txframe);
1472 }
1473 return reval;
1474}
1475
1476/* Maybe this is a good ideal */
1477static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
1478{
1479 struct qe_udc *udc = ep->udc;
1480 struct qe_frame *pframe = NULL;
1481 struct qe_bd __iomem *bd;
1482 u32 bdstatus, length;
1483 u32 vaddr, fsize;
1484 u8 *cp;
1485 u8 finish_req = 0;
1486 u8 framepid;
1487
1488 if (list_empty(&ep->queue)) {
1489 dev_vdbg(udc->dev, "the req already finish!\n");
1490 return 0;
1491 }
1492 pframe = ep->rxframe;
1493
1494 bd = ep->n_rxbd;
1495 bdstatus = in_be32((u32 __iomem *)bd);
1496 length = bdstatus & BD_LENGTH_MASK;
1497
1498 while (!(bdstatus & R_E) && length) {
1499 if (finish_req)
1500 break;
1501 if ((bdstatus & R_F) && (bdstatus & R_L)
1502 && !(bdstatus & R_ERROR)) {
1503 qe_frame_clean(pframe);
1504 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
1505 frame_set_data(pframe, (u8 *)vaddr);
1506 frame_set_length(pframe, (length - USB_CRC_SIZE));
1507 frame_set_status(pframe, FRAME_OK);
1508 switch (bdstatus & R_PID) {
1509 case R_PID_DATA1:
1510 frame_set_info(pframe, PID_DATA1); break;
1511 default:
1512 frame_set_info(pframe, PID_DATA0); break;
1513 }
1514 /* handle the rx frame */
1515
1516 if (frame_get_info(pframe) & PID_DATA1)
1517 framepid = 0x1;
1518 else
1519 framepid = 0;
1520
1521 if (framepid != ep->data01) {
1522 dev_vdbg(udc->dev, "the data01 error!\n");
1523 } else {
1524 fsize = frame_get_length(pframe);
1525
1526 cp = (u8 *)(req->req.buf) + req->req.actual;
1527 if (cp) {
1528 memcpy(cp, pframe->data, fsize);
1529 req->req.actual += fsize;
1530 if ((fsize < ep->ep.maxpacket)
1531 || (req->req.actual >=
1532 req->req.length)) {
1533 finish_req = 1;
1534 done(ep, req, 0);
1535 if (list_empty(&ep->queue))
1536 qe_eprx_nack(ep);
1537 }
1538 }
1539 qe_ep_toggledata01(ep);
1540 }
1541 } else {
1542 dev_err(udc->dev, "The receive frame with error!\n");
1543 }
1544
1545 /* note: don't clear the rxbd's buffer address *
1546 * only Clear the length */
1547 out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
1548 ep->has_data--;
1549
1550 /* Get next BD */
1551 if (bdstatus & R_W)
1552 bd = ep->rxbase;
1553 else
1554 bd++;
1555
1556 bdstatus = in_be32((u32 __iomem *)bd);
1557 length = bdstatus & BD_LENGTH_MASK;
1558 }
1559
1560 ep->n_rxbd = bd;
1561 ep_recycle_rxbds(ep);
1562
1563 return 0;
1564}
1565
1566/* only add the request in queue */
1567static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
1568{
1569 if (ep->state == EP_STATE_NACK) {
1570 if (ep->has_data <= 0) {
1571 /* Enable rx and unmask rx interrupt */
1572 qe_eprx_normal(ep);
1573 } else {
1574 /* Copy the exist BD data */
1575 ep_req_rx(ep, req);
1576 }
1577 }
1578
1579 return 0;
1580}
1581
1582/********************************************************************
1583 Internal Used Function End
1584********************************************************************/
1585
1586/*-----------------------------------------------------------------------
1587 Endpoint Management Functions For Gadget
1588 -----------------------------------------------------------------------*/
1589static int qe_ep_enable(struct usb_ep *_ep,
1590 const struct usb_endpoint_descriptor *desc)
1591{
1592 struct qe_udc *udc;
1593 struct qe_ep *ep;
1594 int retval = 0;
1595 unsigned char epnum;
1596
1597 ep = container_of(_ep, struct qe_ep, ep);
1598
1599 /* catch various bogus parameters */
fc065a09 1600 if (!_ep || !desc || _ep->name == ep_name[0] ||
3948f0e0
LY
1601 (desc->bDescriptorType != USB_DT_ENDPOINT))
1602 return -EINVAL;
1603
1604 udc = ep->udc;
1605 if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
1606 return -ESHUTDOWN;
1607
1608 epnum = (u8)desc->bEndpointAddress & 0xF;
1609
1610 retval = qe_ep_init(udc, epnum, desc);
1611 if (retval != 0) {
1612 cpm_muram_free(cpm_muram_offset(ep->rxbase));
1613 dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
1614 return -EINVAL;
1615 }
1616 dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
1617 return 0;
1618}
1619
1620static int qe_ep_disable(struct usb_ep *_ep)
1621{
1622 struct qe_udc *udc;
1623 struct qe_ep *ep;
1624 unsigned long flags;
1625 unsigned int size;
1626
1627 ep = container_of(_ep, struct qe_ep, ep);
1628 udc = ep->udc;
1629
ec39e2ae 1630 if (!_ep || !ep->ep.desc) {
3948f0e0
LY
1631 dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
1632 return -EINVAL;
1633 }
1634
1635 spin_lock_irqsave(&udc->lock, flags);
1636 /* Nuke all pending requests (does flush) */
1637 nuke(ep, -ESHUTDOWN);
f9c56cdd 1638 ep->ep.desc = NULL;
3948f0e0 1639 ep->stopped = 1;
af3ddbd7 1640 ep->tx_req = NULL;
82341b36 1641 qe_ep_reset(udc, ep->epnum);
3948f0e0
LY
1642 spin_unlock_irqrestore(&udc->lock, flags);
1643
1644 cpm_muram_free(cpm_muram_offset(ep->rxbase));
1645
1646 if (ep->dir == USB_DIR_OUT)
1647 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
1648 (USB_BDRING_LEN_RX + 1);
1649 else
1650 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
1651 (USB_BDRING_LEN + 1);
1652
1653 if (ep->dir != USB_DIR_IN) {
1654 kfree(ep->rxframe);
1655 if (ep->rxbufmap) {
d77c1198 1656 dma_unmap_single(udc->gadget.dev.parent,
3948f0e0
LY
1657 ep->rxbuf_d, size,
1658 DMA_FROM_DEVICE);
1659 ep->rxbuf_d = DMA_ADDR_INVALID;
1660 } else {
1661 dma_sync_single_for_cpu(
d77c1198 1662 udc->gadget.dev.parent,
3948f0e0
LY
1663 ep->rxbuf_d, size,
1664 DMA_FROM_DEVICE);
1665 }
1666 kfree(ep->rxbuffer);
1667 }
1668
1669 if (ep->dir != USB_DIR_OUT)
1670 kfree(ep->txframe);
1671
1672 dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
1673 return 0;
1674}
1675
1676static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
1677{
1678 struct qe_req *req;
1679
1680 req = kzalloc(sizeof(*req), gfp_flags);
1681 if (!req)
1682 return NULL;
1683
1684 req->req.dma = DMA_ADDR_INVALID;
1685
1686 INIT_LIST_HEAD(&req->queue);
1687
1688 return &req->req;
1689}
1690
1691static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
1692{
1693 struct qe_req *req;
1694
1695 req = container_of(_req, struct qe_req, req);
1696
1697 if (_req)
1698 kfree(req);
1699}
1700
a30551db 1701static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
3948f0e0
LY
1702{
1703 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1704 struct qe_req *req = container_of(_req, struct qe_req, req);
1705 struct qe_udc *udc;
3948f0e0
LY
1706 int reval;
1707
1708 udc = ep->udc;
1709 /* catch various bogus parameters */
1710 if (!_req || !req->req.complete || !req->req.buf
1711 || !list_empty(&req->queue)) {
1712 dev_dbg(udc->dev, "bad params\n");
1713 return -EINVAL;
1714 }
ec39e2ae 1715 if (!_ep || (!ep->ep.desc && ep_index(ep))) {
3948f0e0
LY
1716 dev_dbg(udc->dev, "bad ep\n");
1717 return -EINVAL;
1718 }
1719
1720 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
1721 return -ESHUTDOWN;
1722
1723 req->ep = ep;
1724
1725 /* map virtual address to hardware */
1726 if (req->req.dma == DMA_ADDR_INVALID) {
1727 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
1728 req->req.buf,
1729 req->req.length,
1730 ep_is_in(ep)
1731 ? DMA_TO_DEVICE :
1732 DMA_FROM_DEVICE);
1733 req->mapped = 1;
1734 } else {
1735 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
1736 req->req.dma, req->req.length,
1737 ep_is_in(ep)
1738 ? DMA_TO_DEVICE :
1739 DMA_FROM_DEVICE);
1740 req->mapped = 0;
1741 }
1742
1743 req->req.status = -EINPROGRESS;
1744 req->req.actual = 0;
1745
1746 list_add_tail(&req->queue, &ep->queue);
1747 dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
1748 ep->name, req->req.length);
a30551db 1749
3948f0e0
LY
1750 /* push the request to device */
1751 if (ep_is_in(ep))
1752 reval = ep_req_send(ep, req);
1753
1754 /* EP0 */
1755 if (ep_index(ep) == 0 && req->req.length > 0) {
1756 if (ep_is_in(ep))
1757 udc->ep0_state = DATA_STATE_XMIT;
1758 else
1759 udc->ep0_state = DATA_STATE_RECV;
1760 }
1761
1762 if (ep->dir == USB_DIR_OUT)
1763 reval = ep_req_receive(ep, req);
1764
3948f0e0
LY
1765 return 0;
1766}
1767
a30551db
AV
1768/* queues (submits) an I/O request to an endpoint */
1769static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1770 gfp_t gfp_flags)
1771{
1772 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1773 struct qe_udc *udc = ep->udc;
1774 unsigned long flags;
1775 int ret;
1776
1777 spin_lock_irqsave(&udc->lock, flags);
1778 ret = __qe_ep_queue(_ep, _req);
1779 spin_unlock_irqrestore(&udc->lock, flags);
1780 return ret;
1781}
1782
3948f0e0
LY
1783/* dequeues (cancels, unlinks) an I/O request from an endpoint */
1784static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1785{
1786 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1787 struct qe_req *req;
1788 unsigned long flags;
1789
1790 if (!_ep || !_req)
1791 return -EINVAL;
1792
1793 spin_lock_irqsave(&ep->udc->lock, flags);
1794
1795 /* make sure it's actually queued on this endpoint */
1796 list_for_each_entry(req, &ep->queue, queue) {
1797 if (&req->req == _req)
1798 break;
1799 }
1800
1801 if (&req->req != _req) {
1802 spin_unlock_irqrestore(&ep->udc->lock, flags);
1803 return -EINVAL;
1804 }
1805
1806 done(ep, req, -ECONNRESET);
1807
1808 spin_unlock_irqrestore(&ep->udc->lock, flags);
1809 return 0;
1810}
1811
1812/*-----------------------------------------------------------------
1813 * modify the endpoint halt feature
1814 * @ep: the non-isochronous endpoint being stalled
1815 * @value: 1--set halt 0--clear halt
1816 * Returns zero, or a negative error code.
1817*----------------------------------------------------------------*/
1818static int qe_ep_set_halt(struct usb_ep *_ep, int value)
1819{
1820 struct qe_ep *ep;
1821 unsigned long flags;
1822 int status = -EOPNOTSUPP;
1823 struct qe_udc *udc;
1824
1825 ep = container_of(_ep, struct qe_ep, ep);
ec39e2ae 1826 if (!_ep || !ep->ep.desc) {
3948f0e0
LY
1827 status = -EINVAL;
1828 goto out;
1829 }
1830
3948f0e0
LY
1831 udc = ep->udc;
1832 /* Attempt to halt IN ep will fail if any transfer requests
1833 * are still queue */
1834 if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
1835 status = -EAGAIN;
1836 goto out;
1837 }
1838
1839 status = 0;
1840 spin_lock_irqsave(&ep->udc->lock, flags);
1841 qe_eptx_stall_change(ep, value);
1842 qe_eprx_stall_change(ep, value);
1843 spin_unlock_irqrestore(&ep->udc->lock, flags);
1844
1845 if (ep->epnum == 0) {
1846 udc->ep0_state = WAIT_FOR_SETUP;
1847 udc->ep0_dir = 0;
1848 }
15d5a9ac
LY
1849
1850 /* set data toggle to DATA0 on clear halt */
1851 if (value == 0)
1852 ep->data01 = 0;
3948f0e0 1853out:
928dfa6c 1854 dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
3948f0e0
LY
1855 value ? "set" : "clear", status);
1856
1857 return status;
1858}
1859
1860static struct usb_ep_ops qe_ep_ops = {
1861 .enable = qe_ep_enable,
1862 .disable = qe_ep_disable,
1863
1864 .alloc_request = qe_alloc_request,
1865 .free_request = qe_free_request,
1866
1867 .queue = qe_ep_queue,
1868 .dequeue = qe_ep_dequeue,
1869
1870 .set_halt = qe_ep_set_halt,
1871};
1872
1873/*------------------------------------------------------------------------
1874 Gadget Driver Layer Operations
1875 ------------------------------------------------------------------------*/
1876
1877/* Get the current frame number */
1878static int qe_get_frame(struct usb_gadget *gadget)
1879{
d77c1198 1880 struct qe_udc *udc = container_of(gadget, struct qe_udc, gadget);
3948f0e0
LY
1881 u16 tmp;
1882
d77c1198 1883 tmp = in_be16(&udc->usb_param->frame_n);
3948f0e0
LY
1884 if (tmp & 0x8000)
1885 tmp = tmp & 0x07ff;
1886 else
1887 tmp = -EINVAL;
1888
1889 return (int)tmp;
1890}
1891
d77c1198
SAS
1892static int fsl_qe_start(struct usb_gadget *gadget,
1893 struct usb_gadget_driver *driver);
1894static int fsl_qe_stop(struct usb_gadget *gadget,
1895 struct usb_gadget_driver *driver);
0f91349b 1896
3948f0e0 1897/* defined in usb_gadget.h */
eeef4587 1898static const struct usb_gadget_ops qe_gadget_ops = {
3948f0e0 1899 .get_frame = qe_get_frame,
d77c1198
SAS
1900 .udc_start = fsl_qe_start,
1901 .udc_stop = fsl_qe_stop,
3948f0e0
LY
1902};
1903
1904/*-------------------------------------------------------------------------
1905 USB ep0 Setup process in BUS Enumeration
1906 -------------------------------------------------------------------------*/
1907static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
1908{
1909 struct qe_ep *ep = &udc->eps[pipe];
1910
1911 nuke(ep, -ECONNRESET);
1912 ep->tx_req = NULL;
1913 return 0;
1914}
1915
1916static int reset_queues(struct qe_udc *udc)
1917{
1918 u8 pipe;
1919
1920 for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
1921 udc_reset_ep_queue(udc, pipe);
1922
1923 /* report disconnect; the driver is already quiesced */
1924 spin_unlock(&udc->lock);
1925 udc->driver->disconnect(&udc->gadget);
1926 spin_lock(&udc->lock);
1927
1928 return 0;
1929}
1930
1931static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
1932 u16 length)
1933{
1934 /* Save the new address to device struct */
1935 udc->device_address = (u8) value;
1936 /* Update usb state */
1937 udc->usb_state = USB_STATE_ADDRESS;
1938
1939 /* Status phase , send a ZLP */
1940 if (ep0_prime_status(udc, USB_DIR_IN))
1941 qe_ep0_stall(udc);
1942}
1943
1944static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
1945{
1946 struct qe_req *req = container_of(_req, struct qe_req, req);
1947
1948 req->req.buf = NULL;
1949 kfree(req);
1950}
1951
928dfa6c
LY
1952static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
1953 u16 index, u16 length)
3948f0e0 1954{
928dfa6c 1955 u16 usb_status = 0;
3948f0e0
LY
1956 struct qe_req *req;
1957 struct qe_ep *ep;
1958 int status = 0;
1959
1960 ep = &udc->eps[0];
928dfa6c
LY
1961 if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1962 /* Get device status */
1963 usb_status = 1 << USB_DEVICE_SELF_POWERED;
1964 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1965 /* Get interface status */
1966 /* We don't have interface information in udc driver */
1967 usb_status = 0;
1968 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1969 /* Get endpoint status */
1970 int pipe = index & USB_ENDPOINT_NUMBER_MASK;
1971 struct qe_ep *target_ep = &udc->eps[pipe];
1972 u16 usep;
1973
1974 /* stall if endpoint doesn't exist */
ec39e2ae 1975 if (!target_ep->ep.desc)
928dfa6c
LY
1976 goto stall;
1977
1978 usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
1979 if (index & USB_DIR_IN) {
1980 if (target_ep->dir != USB_DIR_IN)
1981 goto stall;
1982 if ((usep & USB_THS_MASK) == USB_THS_STALL)
1983 usb_status = 1 << USB_ENDPOINT_HALT;
1984 } else {
1985 if (target_ep->dir != USB_DIR_OUT)
1986 goto stall;
1987 if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
1988 usb_status = 1 << USB_ENDPOINT_HALT;
1989 }
1990 }
3948f0e0
LY
1991
1992 req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
1993 struct qe_req, req);
1994 req->req.length = 2;
928dfa6c
LY
1995 req->req.buf = udc->statusbuf;
1996 *(u16 *)req->req.buf = cpu_to_le16(usb_status);
3948f0e0
LY
1997 req->req.status = -EINPROGRESS;
1998 req->req.actual = 0;
1999 req->req.complete = ownercomplete;
2000
2001 udc->ep0_dir = USB_DIR_IN;
2002
2003 /* data phase */
a30551db 2004 status = __qe_ep_queue(&ep->ep, &req->req);
3948f0e0 2005
928dfa6c
LY
2006 if (status == 0)
2007 return;
2008stall:
2009 dev_err(udc->dev, "Can't respond to getstatus request \n");
2010 qe_ep0_stall(udc);
3948f0e0
LY
2011}
2012
2013/* only handle the setup request, suppose the device in normal status */
2014static void setup_received_handle(struct qe_udc *udc,
2015 struct usb_ctrlrequest *setup)
2016{
2017 /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
2018 u16 wValue = le16_to_cpu(setup->wValue);
2019 u16 wIndex = le16_to_cpu(setup->wIndex);
2020 u16 wLength = le16_to_cpu(setup->wLength);
2021
2022 /* clear the previous request in the ep0 */
2023 udc_reset_ep_queue(udc, 0);
2024
2025 if (setup->bRequestType & USB_DIR_IN)
2026 udc->ep0_dir = USB_DIR_IN;
2027 else
2028 udc->ep0_dir = USB_DIR_OUT;
2029
2030 switch (setup->bRequest) {
2031 case USB_REQ_GET_STATUS:
2032 /* Data+Status phase form udc */
2033 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2034 != (USB_DIR_IN | USB_TYPE_STANDARD))
2035 break;
928dfa6c
LY
2036 ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
2037 wLength);
3948f0e0
LY
2038 return;
2039
2040 case USB_REQ_SET_ADDRESS:
2041 /* Status phase from udc */
2042 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
2043 USB_RECIP_DEVICE))
2044 break;
2045 ch9setaddress(udc, wValue, wIndex, wLength);
2046 return;
2047
2048 case USB_REQ_CLEAR_FEATURE:
2049 case USB_REQ_SET_FEATURE:
2050 /* Requests with no data phase, status phase from udc */
928dfa6c 2051 if ((setup->bRequestType & USB_TYPE_MASK)
3948f0e0
LY
2052 != USB_TYPE_STANDARD)
2053 break;
2054
2055 if ((setup->bRequestType & USB_RECIP_MASK)
2056 == USB_RECIP_ENDPOINT) {
2057 int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
2058 struct qe_ep *ep;
2059
2060 if (wValue != 0 || wLength != 0
2061 || pipe > USB_MAX_ENDPOINTS)
2062 break;
2063 ep = &udc->eps[pipe];
2064
2065 spin_unlock(&udc->lock);
2066 qe_ep_set_halt(&ep->ep,
2067 (setup->bRequest == USB_REQ_SET_FEATURE)
2068 ? 1 : 0);
2069 spin_lock(&udc->lock);
2070 }
2071
2072 ep0_prime_status(udc, USB_DIR_IN);
2073
2074 return;
2075
2076 default:
2077 break;
2078 }
2079
2080 if (wLength) {
2081 /* Data phase from gadget, status phase from udc */
2082 if (setup->bRequestType & USB_DIR_IN) {
2083 udc->ep0_state = DATA_STATE_XMIT;
2084 udc->ep0_dir = USB_DIR_IN;
928dfa6c 2085 } else {
3948f0e0
LY
2086 udc->ep0_state = DATA_STATE_RECV;
2087 udc->ep0_dir = USB_DIR_OUT;
2088 }
2089 spin_unlock(&udc->lock);
2090 if (udc->driver->setup(&udc->gadget,
2091 &udc->local_setup_buff) < 0)
2092 qe_ep0_stall(udc);
2093 spin_lock(&udc->lock);
2094 } else {
2095 /* No data phase, IN status from gadget */
2096 udc->ep0_dir = USB_DIR_IN;
2097 spin_unlock(&udc->lock);
2098 if (udc->driver->setup(&udc->gadget,
2099 &udc->local_setup_buff) < 0)
2100 qe_ep0_stall(udc);
2101 spin_lock(&udc->lock);
2102 udc->ep0_state = DATA_STATE_NEED_ZLP;
2103 }
2104}
2105
2106/*-------------------------------------------------------------------------
2107 USB Interrupt handlers
2108 -------------------------------------------------------------------------*/
2109static void suspend_irq(struct qe_udc *udc)
2110{
2111 udc->resume_state = udc->usb_state;
2112 udc->usb_state = USB_STATE_SUSPENDED;
2113
2114 /* report suspend to the driver ,serial.c not support this*/
2115 if (udc->driver->suspend)
2116 udc->driver->suspend(&udc->gadget);
2117}
2118
2119static void resume_irq(struct qe_udc *udc)
2120{
2121 udc->usb_state = udc->resume_state;
2122 udc->resume_state = 0;
2123
2124 /* report resume to the driver , serial.c not support this*/
2125 if (udc->driver->resume)
2126 udc->driver->resume(&udc->gadget);
2127}
2128
2129static void idle_irq(struct qe_udc *udc)
2130{
2131 u8 usbs;
2132
2133 usbs = in_8(&udc->usb_regs->usb_usbs);
2134 if (usbs & USB_IDLE_STATUS_MASK) {
2135 if ((udc->usb_state) != USB_STATE_SUSPENDED)
2136 suspend_irq(udc);
2137 } else {
2138 if (udc->usb_state == USB_STATE_SUSPENDED)
2139 resume_irq(udc);
2140 }
2141}
2142
2143static int reset_irq(struct qe_udc *udc)
2144{
2145 unsigned char i;
2146
ef84e405
AV
2147 if (udc->usb_state == USB_STATE_DEFAULT)
2148 return 0;
2149
d77c1198 2150 qe_usb_disable(udc);
3948f0e0
LY
2151 out_8(&udc->usb_regs->usb_usadr, 0);
2152
2153 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2154 if (udc->eps[i].init)
2155 qe_ep_reset(udc, i);
2156 }
2157
2158 reset_queues(udc);
2159 udc->usb_state = USB_STATE_DEFAULT;
2160 udc->ep0_state = WAIT_FOR_SETUP;
2161 udc->ep0_dir = USB_DIR_OUT;
d77c1198 2162 qe_usb_enable(udc);
3948f0e0
LY
2163 return 0;
2164}
2165
2166static int bsy_irq(struct qe_udc *udc)
2167{
2168 return 0;
2169}
2170
2171static int txe_irq(struct qe_udc *udc)
2172{
2173 return 0;
2174}
2175
2176/* ep0 tx interrupt also in here */
2177static int tx_irq(struct qe_udc *udc)
2178{
2179 struct qe_ep *ep;
2180 struct qe_bd __iomem *bd;
2181 int i, res = 0;
2182
2183 if ((udc->usb_state == USB_STATE_ADDRESS)
2184 && (in_8(&udc->usb_regs->usb_usadr) == 0))
2185 out_8(&udc->usb_regs->usb_usadr, udc->device_address);
2186
2187 for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
2188 ep = &udc->eps[i];
2189 if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
2190 bd = ep->c_txbd;
2191 if (!(in_be32((u32 __iomem *)bd) & T_R)
2192 && (in_be32(&bd->buf))) {
928dfa6c 2193 /* confirm the transmitted bd */
3948f0e0
LY
2194 if (ep->epnum == 0)
2195 res = qe_ep0_txconf(ep);
2196 else
2197 res = qe_ep_txconf(ep);
3948f0e0
LY
2198 }
2199 }
2200 }
2201 return res;
2202}
2203
2204
2205/* setup packect's rx is handle in the function too */
2206static void rx_irq(struct qe_udc *udc)
2207{
2208 struct qe_ep *ep;
2209 struct qe_bd __iomem *bd;
2210 int i;
2211
2212 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2213 ep = &udc->eps[i];
2214 if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
2215 bd = ep->n_rxbd;
2216 if (!(in_be32((u32 __iomem *)bd) & R_E)
2217 && (in_be32(&bd->buf))) {
2218 if (ep->epnum == 0) {
2219 qe_ep0_rx(udc);
2220 } else {
2221 /*non-setup package receive*/
2222 qe_ep_rx(ep);
2223 }
2224 }
2225 }
2226 }
2227}
2228
2229static irqreturn_t qe_udc_irq(int irq, void *_udc)
2230{
2231 struct qe_udc *udc = (struct qe_udc *)_udc;
2232 u16 irq_src;
2233 irqreturn_t status = IRQ_NONE;
2234 unsigned long flags;
2235
3948f0e0
LY
2236 spin_lock_irqsave(&udc->lock, flags);
2237
2238 irq_src = in_be16(&udc->usb_regs->usb_usber) &
2239 in_be16(&udc->usb_regs->usb_usbmr);
2240 /* Clear notification bits */
2241 out_be16(&udc->usb_regs->usb_usber, irq_src);
2242 /* USB Interrupt */
2243 if (irq_src & USB_E_IDLE_MASK) {
2244 idle_irq(udc);
2245 irq_src &= ~USB_E_IDLE_MASK;
2246 status = IRQ_HANDLED;
2247 }
2248
2249 if (irq_src & USB_E_TXB_MASK) {
2250 tx_irq(udc);
2251 irq_src &= ~USB_E_TXB_MASK;
2252 status = IRQ_HANDLED;
2253 }
2254
2255 if (irq_src & USB_E_RXB_MASK) {
2256 rx_irq(udc);
2257 irq_src &= ~USB_E_RXB_MASK;
2258 status = IRQ_HANDLED;
2259 }
2260
2261 if (irq_src & USB_E_RESET_MASK) {
2262 reset_irq(udc);
2263 irq_src &= ~USB_E_RESET_MASK;
2264 status = IRQ_HANDLED;
2265 }
2266
2267 if (irq_src & USB_E_BSY_MASK) {
2268 bsy_irq(udc);
2269 irq_src &= ~USB_E_BSY_MASK;
2270 status = IRQ_HANDLED;
2271 }
2272
2273 if (irq_src & USB_E_TXE_MASK) {
2274 txe_irq(udc);
2275 irq_src &= ~USB_E_TXE_MASK;
2276 status = IRQ_HANDLED;
2277 }
2278
2279 spin_unlock_irqrestore(&udc->lock, flags);
2280
2281 return status;
2282}
2283
2284/*-------------------------------------------------------------------------
b0fca50f 2285 Gadget driver probe and unregister.
3948f0e0 2286 --------------------------------------------------------------------------*/
d77c1198
SAS
2287static int fsl_qe_start(struct usb_gadget *gadget,
2288 struct usb_gadget_driver *driver)
3948f0e0 2289{
d77c1198
SAS
2290 struct qe_udc *udc;
2291 unsigned long flags;
3948f0e0 2292
d77c1198 2293 udc = container_of(gadget, struct qe_udc, gadget);
3948f0e0 2294 /* lock is needed but whether should use this lock or another */
d77c1198 2295 spin_lock_irqsave(&udc->lock, flags);
3948f0e0
LY
2296
2297 driver->driver.bus = NULL;
2298 /* hook up the driver */
d77c1198 2299 udc->driver = driver;
d77c1198 2300 udc->gadget.speed = driver->max_speed;
3948f0e0
LY
2301
2302 /* Enable IRQ reg and Set usbcmd reg EN bit */
d77c1198
SAS
2303 qe_usb_enable(udc);
2304
2305 out_be16(&udc->usb_regs->usb_usber, 0xffff);
2306 out_be16(&udc->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
2307 udc->usb_state = USB_STATE_ATTACHED;
2308 udc->ep0_state = WAIT_FOR_SETUP;
2309 udc->ep0_dir = USB_DIR_OUT;
2310 spin_unlock_irqrestore(&udc->lock, flags);
2311
2312 dev_info(udc->dev, "%s bind to driver %s\n", udc->gadget.name,
2313 driver->driver.name);
3948f0e0
LY
2314 return 0;
2315}
3948f0e0 2316
d77c1198
SAS
2317static int fsl_qe_stop(struct usb_gadget *gadget,
2318 struct usb_gadget_driver *driver)
3948f0e0 2319{
d77c1198 2320 struct qe_udc *udc;
3948f0e0
LY
2321 struct qe_ep *loop_ep;
2322 unsigned long flags;
2323
d77c1198 2324 udc = container_of(gadget, struct qe_udc, gadget);
3948f0e0 2325 /* stop usb controller, disable intr */
d77c1198 2326 qe_usb_disable(udc);
3948f0e0
LY
2327
2328 /* in fact, no needed */
d77c1198
SAS
2329 udc->usb_state = USB_STATE_ATTACHED;
2330 udc->ep0_state = WAIT_FOR_SETUP;
2331 udc->ep0_dir = 0;
3948f0e0
LY
2332
2333 /* stand operation */
d77c1198
SAS
2334 spin_lock_irqsave(&udc->lock, flags);
2335 udc->gadget.speed = USB_SPEED_UNKNOWN;
2336 nuke(&udc->eps[0], -ESHUTDOWN);
2337 list_for_each_entry(loop_ep, &udc->gadget.ep_list, ep.ep_list)
3948f0e0 2338 nuke(loop_ep, -ESHUTDOWN);
d77c1198 2339 spin_unlock_irqrestore(&udc->lock, flags);
9ac36da3 2340
d77c1198 2341 udc->driver = NULL;
3948f0e0 2342
d77c1198 2343 dev_info(udc->dev, "unregistered gadget driver '%s'\r\n",
3948f0e0
LY
2344 driver->driver.name);
2345 return 0;
2346}
3948f0e0
LY
2347
2348/* udc structure's alloc and setup, include ep-param alloc */
41ac7b3a 2349static struct qe_udc *qe_udc_config(struct platform_device *ofdev)
3948f0e0
LY
2350{
2351 struct qe_udc *udc;
3ed38802 2352 struct device_node *np = ofdev->dev.of_node;
3948f0e0
LY
2353 unsigned int tmp_addr = 0;
2354 struct usb_device_para __iomem *usbpram;
2355 unsigned int i;
2356 u64 size;
2357 u32 offset;
2358
2359 udc = kzalloc(sizeof(*udc), GFP_KERNEL);
2360 if (udc == NULL) {
2361 dev_err(&ofdev->dev, "malloc udc failed\n");
2362 goto cleanup;
2363 }
2364
2365 udc->dev = &ofdev->dev;
2366
2367 /* get default address of usb parameter in MURAM from device tree */
2368 offset = *of_get_address(np, 1, &size, NULL);
2369 udc->usb_param = cpm_muram_addr(offset);
2370 memset_io(udc->usb_param, 0, size);
2371
2372 usbpram = udc->usb_param;
2373 out_be16(&usbpram->frame_n, 0);
2374 out_be32(&usbpram->rstate, 0);
2375
2376 tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
2377 sizeof(struct usb_ep_para)),
2378 USB_EP_PARA_ALIGNMENT);
cd40c4c4
AV
2379 if (IS_ERR_VALUE(tmp_addr))
2380 goto cleanup;
3948f0e0
LY
2381
2382 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2383 out_be16(&usbpram->epptr[i], (u16)tmp_addr);
2384 udc->ep_param[i] = cpm_muram_addr(tmp_addr);
2385 tmp_addr += 32;
2386 }
2387
2388 memset_io(udc->ep_param[0], 0,
2389 USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
2390
2391 udc->resume_state = USB_STATE_NOTATTACHED;
2392 udc->usb_state = USB_STATE_POWERED;
2393 udc->ep0_dir = 0;
2394
2395 spin_lock_init(&udc->lock);
2396 return udc;
2397
2398cleanup:
2399 kfree(udc);
2400 return NULL;
2401}
2402
2403/* USB Controller register init */
41ac7b3a 2404static int qe_udc_reg_init(struct qe_udc *udc)
3948f0e0
LY
2405{
2406 struct usb_ctlr __iomem *qe_usbregs;
2407 qe_usbregs = udc->usb_regs;
2408
2247818a 2409 /* Spec says that we must enable the USB controller to change mode. */
3948f0e0 2410 out_8(&qe_usbregs->usb_usmod, 0x01);
2247818a
AV
2411 /* Mode changed, now disable it, since muram isn't initialized yet. */
2412 out_8(&qe_usbregs->usb_usmod, 0x00);
2413
2414 /* Initialize the rest. */
3948f0e0
LY
2415 out_be16(&qe_usbregs->usb_usbmr, 0);
2416 out_8(&qe_usbregs->usb_uscom, 0);
2417 out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
2418
2419 return 0;
2420}
2421
41ac7b3a 2422static int qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
3948f0e0
LY
2423{
2424 struct qe_ep *ep = &udc->eps[pipe_num];
2425
2426 ep->udc = udc;
2427 strcpy(ep->name, ep_name[pipe_num]);
2428 ep->ep.name = ep_name[pipe_num];
2429
2430 ep->ep.ops = &qe_ep_ops;
2431 ep->stopped = 1;
2432 ep->ep.maxpacket = (unsigned short) ~0;
ec39e2ae 2433 ep->ep.desc = NULL;
3948f0e0
LY
2434 ep->dir = 0xff;
2435 ep->epnum = (u8)pipe_num;
2436 ep->sent = 0;
2437 ep->last = 0;
2438 ep->init = 0;
2439 ep->rxframe = NULL;
2440 ep->txframe = NULL;
2441 ep->tx_req = NULL;
2442 ep->state = EP_STATE_IDLE;
2443 ep->has_data = 0;
2444
2445 /* the queue lists any req for this ep */
2446 INIT_LIST_HEAD(&ep->queue);
2447
2448 /* gagdet.ep_list used for ep_autoconfig so no ep0*/
2449 if (pipe_num != 0)
2450 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2451
2452 ep->gadget = &udc->gadget;
2453
2454 return 0;
2455}
2456
2457/*-----------------------------------------------------------------------
2458 * UDC device Driver operation functions *
2459 *----------------------------------------------------------------------*/
2460static void qe_udc_release(struct device *dev)
2461{
d77c1198
SAS
2462 struct qe_udc *udc = container_of(dev, struct qe_udc, gadget.dev);
2463 int i;
3948f0e0 2464
d77c1198
SAS
2465 complete(udc->done);
2466 cpm_muram_free(cpm_muram_offset(udc->ep_param[0]));
3948f0e0 2467 for (i = 0; i < USB_MAX_ENDPOINTS; i++)
d77c1198 2468 udc->ep_param[i] = NULL;
3948f0e0 2469
d77c1198 2470 kfree(udc);
3948f0e0
LY
2471}
2472
2473/* Driver probe functions */
b1608d69 2474static const struct of_device_id qe_udc_match[];
41ac7b3a 2475static int qe_udc_probe(struct platform_device *ofdev)
3948f0e0 2476{
d77c1198 2477 struct qe_udc *udc;
b1608d69 2478 const struct of_device_id *match;
3ed38802 2479 struct device_node *np = ofdev->dev.of_node;
3948f0e0
LY
2480 struct qe_ep *ep;
2481 unsigned int ret = 0;
2482 unsigned int i;
2483 const void *prop;
2484
b1608d69
GL
2485 match = of_match_device(qe_udc_match, &ofdev->dev);
2486 if (!match)
d35fb641
GL
2487 return -EINVAL;
2488
3948f0e0
LY
2489 prop = of_get_property(np, "mode", NULL);
2490 if (!prop || strcmp(prop, "peripheral"))
2491 return -ENODEV;
2492
2493 /* Initialize the udc structure including QH member and other member */
d77c1198
SAS
2494 udc = qe_udc_config(ofdev);
2495 if (!udc) {
cd40c4c4 2496 dev_err(&ofdev->dev, "failed to initialize\n");
3948f0e0
LY
2497 return -ENOMEM;
2498 }
2499
d77c1198
SAS
2500 udc->soc_type = (unsigned long)match->data;
2501 udc->usb_regs = of_iomap(np, 0);
2502 if (!udc->usb_regs) {
3948f0e0
LY
2503 ret = -ENOMEM;
2504 goto err1;
2505 }
2506
2507 /* initialize usb hw reg except for regs for EP,
2508 * leave usbintr reg untouched*/
d77c1198 2509 qe_udc_reg_init(udc);
3948f0e0
LY
2510
2511 /* here comes the stand operations for probe
2512 * set the qe_udc->gadget.xxx */
d77c1198 2513 udc->gadget.ops = &qe_gadget_ops;
3948f0e0
LY
2514
2515 /* gadget.ep0 is a pointer */
d77c1198 2516 udc->gadget.ep0 = &udc->eps[0].ep;
3948f0e0 2517
d77c1198 2518 INIT_LIST_HEAD(&udc->gadget.ep_list);
3948f0e0
LY
2519
2520 /* modify in register gadget process */
d77c1198 2521 udc->gadget.speed = USB_SPEED_UNKNOWN;
3948f0e0
LY
2522
2523 /* name: Identifies the controller hardware type. */
d77c1198 2524 udc->gadget.name = driver_name;
d77c1198 2525 udc->gadget.dev.parent = &ofdev->dev;
3948f0e0 2526
928dfa6c 2527 /* initialize qe_ep struct */
3948f0e0 2528 for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
928dfa6c 2529 /* because the ep type isn't decide here so
3948f0e0
LY
2530 * qe_ep_init() should be called in ep_enable() */
2531
2532 /* setup the qe_ep struct and link ep.ep.list
2533 * into gadget.ep_list */
d77c1198 2534 qe_ep_config(udc, (unsigned char)i);
3948f0e0
LY
2535 }
2536
2537 /* ep0 initialization in here */
d77c1198 2538 ret = qe_ep_init(udc, 0, &qe_ep0_desc);
3948f0e0
LY
2539 if (ret)
2540 goto err2;
2541
928dfa6c 2542 /* create a buf for ZLP send, need to remain zeroed */
d77c1198
SAS
2543 udc->nullbuf = kzalloc(256, GFP_KERNEL);
2544 if (udc->nullbuf == NULL) {
2545 dev_err(udc->dev, "cannot alloc nullbuf\n");
3948f0e0
LY
2546 ret = -ENOMEM;
2547 goto err3;
2548 }
2549
928dfa6c 2550 /* buffer for data of get_status request */
d77c1198
SAS
2551 udc->statusbuf = kzalloc(2, GFP_KERNEL);
2552 if (udc->statusbuf == NULL) {
928dfa6c
LY
2553 ret = -ENOMEM;
2554 goto err4;
2555 }
2556
d77c1198
SAS
2557 udc->nullp = virt_to_phys((void *)udc->nullbuf);
2558 if (udc->nullp == DMA_ADDR_INVALID) {
2559 udc->nullp = dma_map_single(
2560 udc->gadget.dev.parent,
2561 udc->nullbuf,
3948f0e0
LY
2562 256,
2563 DMA_TO_DEVICE);
d77c1198 2564 udc->nullmap = 1;
3948f0e0 2565 } else {
d77c1198
SAS
2566 dma_sync_single_for_device(udc->gadget.dev.parent,
2567 udc->nullp, 256,
3948f0e0
LY
2568 DMA_TO_DEVICE);
2569 }
2570
d77c1198
SAS
2571 tasklet_init(&udc->rx_tasklet, ep_rx_tasklet,
2572 (unsigned long)udc);
3948f0e0 2573 /* request irq and disable DR */
d77c1198
SAS
2574 udc->usb_irq = irq_of_parse_and_map(np, 0);
2575 if (!udc->usb_irq) {
94f341db
AV
2576 ret = -EINVAL;
2577 goto err_noirq;
2578 }
3948f0e0 2579
d77c1198
SAS
2580 ret = request_irq(udc->usb_irq, qe_udc_irq, 0,
2581 driver_name, udc);
3948f0e0 2582 if (ret) {
d77c1198
SAS
2583 dev_err(udc->dev, "cannot request irq %d err %d\n",
2584 udc->usb_irq, ret);
928dfa6c 2585 goto err5;
3948f0e0
LY
2586 }
2587
29e7dbf3
FB
2588 ret = usb_add_gadget_udc_release(&ofdev->dev, &udc->gadget,
2589 qe_udc_release);
0f91349b 2590 if (ret)
c07d1b63 2591 goto err6;
0f91349b 2592
dae8eadf 2593 platform_set_drvdata(ofdev, udc);
d77c1198 2594 dev_info(udc->dev,
928dfa6c 2595 "%s USB controller initialized as device\n",
d77c1198 2596 (udc->soc_type == PORT_QE) ? "QE" : "CPM");
3948f0e0
LY
2597 return 0;
2598
928dfa6c 2599err6:
d77c1198 2600 free_irq(udc->usb_irq, udc);
928dfa6c 2601err5:
d77c1198 2602 irq_dispose_mapping(udc->usb_irq);
94f341db 2603err_noirq:
d77c1198
SAS
2604 if (udc->nullmap) {
2605 dma_unmap_single(udc->gadget.dev.parent,
2606 udc->nullp, 256,
3948f0e0 2607 DMA_TO_DEVICE);
d77c1198 2608 udc->nullp = DMA_ADDR_INVALID;
3948f0e0 2609 } else {
d77c1198
SAS
2610 dma_sync_single_for_cpu(udc->gadget.dev.parent,
2611 udc->nullp, 256,
3948f0e0
LY
2612 DMA_TO_DEVICE);
2613 }
d77c1198 2614 kfree(udc->statusbuf);
928dfa6c 2615err4:
d77c1198 2616 kfree(udc->nullbuf);
3948f0e0 2617err3:
d77c1198 2618 ep = &udc->eps[0];
3948f0e0
LY
2619 cpm_muram_free(cpm_muram_offset(ep->rxbase));
2620 kfree(ep->rxframe);
2621 kfree(ep->rxbuffer);
2622 kfree(ep->txframe);
2623err2:
d77c1198 2624 iounmap(udc->usb_regs);
3948f0e0 2625err1:
d77c1198 2626 kfree(udc);
3948f0e0
LY
2627 return ret;
2628}
2629
2630#ifdef CONFIG_PM
2dc11581 2631static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
3948f0e0
LY
2632{
2633 return -ENOTSUPP;
2634}
2635
2dc11581 2636static int qe_udc_resume(struct platform_device *dev)
3948f0e0
LY
2637{
2638 return -ENOTSUPP;
2639}
2640#endif
2641
fb4e98ab 2642static int qe_udc_remove(struct platform_device *ofdev)
3948f0e0 2643{
dae8eadf 2644 struct qe_udc *udc = platform_get_drvdata(ofdev);
3948f0e0
LY
2645 struct qe_ep *ep;
2646 unsigned int size;
3948f0e0
LY
2647 DECLARE_COMPLETION(done);
2648
d77c1198 2649 usb_del_gadget_udc(&udc->gadget);
0f91349b 2650
d77c1198
SAS
2651 udc->done = &done;
2652 tasklet_disable(&udc->rx_tasklet);
3948f0e0 2653
d77c1198
SAS
2654 if (udc->nullmap) {
2655 dma_unmap_single(udc->gadget.dev.parent,
2656 udc->nullp, 256,
3948f0e0 2657 DMA_TO_DEVICE);
d77c1198 2658 udc->nullp = DMA_ADDR_INVALID;
3948f0e0 2659 } else {
d77c1198
SAS
2660 dma_sync_single_for_cpu(udc->gadget.dev.parent,
2661 udc->nullp, 256,
3948f0e0
LY
2662 DMA_TO_DEVICE);
2663 }
d77c1198
SAS
2664 kfree(udc->statusbuf);
2665 kfree(udc->nullbuf);
3948f0e0 2666
d77c1198 2667 ep = &udc->eps[0];
3948f0e0
LY
2668 cpm_muram_free(cpm_muram_offset(ep->rxbase));
2669 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
2670
2671 kfree(ep->rxframe);
2672 if (ep->rxbufmap) {
d77c1198 2673 dma_unmap_single(udc->gadget.dev.parent,
3948f0e0
LY
2674 ep->rxbuf_d, size,
2675 DMA_FROM_DEVICE);
2676 ep->rxbuf_d = DMA_ADDR_INVALID;
2677 } else {
d77c1198 2678 dma_sync_single_for_cpu(udc->gadget.dev.parent,
3948f0e0
LY
2679 ep->rxbuf_d, size,
2680 DMA_FROM_DEVICE);
2681 }
2682
2683 kfree(ep->rxbuffer);
2684 kfree(ep->txframe);
2685
d77c1198
SAS
2686 free_irq(udc->usb_irq, udc);
2687 irq_dispose_mapping(udc->usb_irq);
3948f0e0 2688
d77c1198 2689 tasklet_kill(&udc->rx_tasklet);
3948f0e0 2690
d77c1198 2691 iounmap(udc->usb_regs);
3948f0e0 2692
3948f0e0
LY
2693 /* wait for release() of gadget.dev to free udc */
2694 wait_for_completion(&done);
2695
2696 return 0;
2697}
2698
2699/*-------------------------------------------------------------------------*/
2f82686e 2700static const struct of_device_id qe_udc_match[] = {
04c4ab17
AV
2701 {
2702 .compatible = "fsl,mpc8323-qe-usb",
2703 .data = (void *)PORT_QE,
2704 },
3948f0e0
LY
2705 {
2706 .compatible = "fsl,mpc8360-qe-usb",
2707 .data = (void *)PORT_QE,
2708 },
2709 {
2710 .compatible = "fsl,mpc8272-cpm-usb",
2711 .data = (void *)PORT_CPM,
2712 },
2713 {},
2714};
2715
2716MODULE_DEVICE_TABLE(of, qe_udc_match);
2717
d35fb641 2718static struct platform_driver udc_driver = {
4018294b
GL
2719 .driver = {
2720 .name = (char *)driver_name,
2721 .owner = THIS_MODULE,
2722 .of_match_table = qe_udc_match,
2723 },
3948f0e0 2724 .probe = qe_udc_probe,
7690417d 2725 .remove = qe_udc_remove,
3948f0e0
LY
2726#ifdef CONFIG_PM
2727 .suspend = qe_udc_suspend,
2728 .resume = qe_udc_resume,
2729#endif
2730};
2731
cc27c96c 2732module_platform_driver(udc_driver);
3948f0e0
LY
2733
2734MODULE_DESCRIPTION(DRIVER_DESC);
2735MODULE_AUTHOR(DRIVER_AUTHOR);
2736MODULE_LICENSE("GPL");
2737