serial/JSM: change maintainer to myself
[linux-2.6-block.git] / drivers / tty / serial / of_serial.c
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8d38a5b2
AB
1/*
2 * Serial Port driver for Open Firmware platform devices
3 *
4 * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 */
12#include <linux/init.h>
13#include <linux/module.h>
5a0e3ad6 14#include <linux/slab.h>
bf03f65b 15#include <linux/delay.h>
8d38a5b2 16#include <linux/serial_core.h>
bf03f65b 17#include <linux/serial_reg.h>
f1ca09b2 18#include <linux/of_address.h>
73930a85 19#include <linux/of_irq.h>
c401b044 20#include <linux/of_platform.h>
5886188d 21#include <linux/nwpserial.h>
0bbeb3c3 22#include <linux/clk.h>
8d38a5b2 23
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HK
24#include "8250/8250.h"
25
e34b9c94 26struct of_serial_info {
0bbeb3c3 27 struct clk *clk;
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IK
28 int type;
29 int line;
30};
31
bf03f65b
DW
32#ifdef CONFIG_ARCH_TEGRA
33void tegra_serial_handle_break(struct uart_port *p)
34{
35 unsigned int status, tmout = 10000;
36
37 do {
38 status = p->serial_in(p, UART_LSR);
39 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
40 status = p->serial_in(p, UART_RX);
41 else
42 break;
43 if (--tmout == 0)
44 break;
45 udelay(1);
46 } while (1);
47}
f26402e8
SW
48#else
49static inline void tegra_serial_handle_break(struct uart_port *port)
50{
51}
bf03f65b
DW
52#endif
53
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54/*
55 * Fill a struct uart_port for a given device node
56 */
9671f099 57static int of_platform_serial_setup(struct platform_device *ofdev,
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MK
58 int type, struct uart_port *port,
59 struct of_serial_info *info)
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AB
60{
61 struct resource resource;
61c7a080 62 struct device_node *np = ofdev->dev.of_node;
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GL
63 u32 clk, spd, prop;
64 int ret;
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65
66 memset(port, 0, sizeof *port);
b84e7731 67 if (of_property_read_u32(np, "clock-frequency", &clk)) {
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68
69 /* Get clk rate through clk driver if present */
70 info->clk = clk_get(&ofdev->dev, NULL);
76cc4386 71 if (IS_ERR(info->clk)) {
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72 dev_warn(&ofdev->dev,
73 "clk or clock-frequency not defined\n");
76cc4386 74 return PTR_ERR(info->clk);
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75 }
76
77 clk_prepare_enable(info->clk);
78 clk = clk_get_rate(info->clk);
8d38a5b2 79 }
b84e7731
GL
80 /* If current-speed was set, then try not to change it. */
81 if (of_property_read_u32(np, "current-speed", &spd) == 0)
82 port->custom_divisor = clk / (16 * spd);
8d38a5b2
AB
83
84 ret = of_address_to_resource(np, 0, &resource);
85 if (ret) {
86 dev_warn(&ofdev->dev, "invalid address\n");
0bbeb3c3 87 goto out;
8d38a5b2
AB
88 }
89
90 spin_lock_init(&port->lock);
91 port->mapbase = resource.start;
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JL
92
93 /* Check for shifted address mapping */
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94 if (of_property_read_u32(np, "reg-offset", &prop) == 0)
95 port->mapbase += prop;
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JL
96
97 /* Check for registers offset within the devices address range */
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98 if (of_property_read_u32(np, "reg-shift", &prop) == 0)
99 port->regshift = prop;
b912b5e2 100
9f1ca068
HK
101 /* Check for fifo size */
102 if (of_property_read_u32(np, "fifo-size", &prop) == 0)
103 port->fifosize = prop;
104
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AB
105 port->irq = irq_of_parse_and_map(np, 0);
106 port->iotype = UPIO_MEM;
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GL
107 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
108 switch (prop) {
7423734e
JI
109 case 1:
110 port->iotype = UPIO_MEM;
111 break;
112 case 4:
113 port->iotype = UPIO_MEM32;
114 break;
115 default:
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GL
116 dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
117 prop);
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118 ret = -EINVAL;
119 goto out;
7423734e
JI
120 }
121 }
122
8d38a5b2 123 port->type = type;
b84e7731 124 port->uartclk = clk;
abb4a239 125 port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
eedacbf0 126 | UPF_FIXED_PORT | UPF_FIXED_TYPE;
fde8be29
GJ
127
128 if (of_find_property(np, "no-loopback-test", NULL))
129 port->flags |= UPF_SKIP_TEST;
130
8d38a5b2 131 port->dev = &ofdev->dev;
8d38a5b2 132
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DW
133 if (type == PORT_TEGRA)
134 port->handle_break = tegra_serial_handle_break;
135
8d38a5b2 136 return 0;
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137out:
138 if (info->clk)
139 clk_disable_unprepare(info->clk);
140 return ret;
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AB
141}
142
143/*
144 * Try to register a serial port
145 */
b1608d69 146static struct of_device_id of_platform_serial_table[];
9671f099 147static int of_platform_serial_probe(struct platform_device *ofdev)
8d38a5b2 148{
b1608d69 149 const struct of_device_id *match;
e34b9c94 150 struct of_serial_info *info;
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151 struct uart_port port;
152 int port_type;
153 int ret;
154
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GL
155 match = of_match_device(of_platform_serial_table, &ofdev->dev);
156 if (!match)
793218df
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157 return -EINVAL;
158
61c7a080 159 if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
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160 return -EBUSY;
161
e34b9c94
IK
162 info = kmalloc(sizeof(*info), GFP_KERNEL);
163 if (info == NULL)
164 return -ENOMEM;
165
b1608d69 166 port_type = (unsigned long)match->data;
0bbeb3c3 167 ret = of_platform_serial_setup(ofdev, port_type, &port, info);
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168 if (ret)
169 goto out;
170
171 switch (port_type) {
5886188d 172#ifdef CONFIG_SERIAL_8250
8d38a5b2 173 case PORT_8250 ... PORT_MAX_8250:
ce7240e4 174 {
ce7240e4
AC
175 struct uart_8250_port port8250;
176 memset(&port8250, 0, sizeof(port8250));
177 port8250.port = port;
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HK
178
179 if (port.fifosize)
180 port8250.capabilities = UART_CAP_FIFO;
181
182 if (of_property_read_bool(ofdev->dev.of_node,
183 "auto-flow-control"))
184 port8250.capabilities |= UART_CAP_AFE;
185
ce7240e4 186 ret = serial8250_register_8250_port(&port8250);
8d38a5b2 187 break;
ce7240e4 188 }
5886188d
BK
189#endif
190#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
191 case PORT_NWPSERIAL:
192 ret = nwpserial_register_port(&port);
193 break;
194#endif
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195 default:
196 /* need to add code for these */
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IK
197 case PORT_UNKNOWN:
198 dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
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199 ret = -ENODEV;
200 break;
201 }
202 if (ret < 0)
203 goto out;
204
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205 info->type = port_type;
206 info->line = ret;
3cf62a5a 207 dev_set_drvdata(&ofdev->dev, info);
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208 return 0;
209out:
e34b9c94 210 kfree(info);
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211 irq_dispose_mapping(port.irq);
212 return ret;
213}
214
215/*
216 * Release a line
217 */
2dc11581 218static int of_platform_serial_remove(struct platform_device *ofdev)
8d38a5b2 219{
3cf62a5a 220 struct of_serial_info *info = dev_get_drvdata(&ofdev->dev);
e34b9c94 221 switch (info->type) {
5886188d 222#ifdef CONFIG_SERIAL_8250
e34b9c94
IK
223 case PORT_8250 ... PORT_MAX_8250:
224 serial8250_unregister_port(info->line);
225 break;
5886188d
BK
226#endif
227#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
228 case PORT_NWPSERIAL:
229 nwpserial_unregister_port(info->line);
230 break;
231#endif
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232 default:
233 /* need to add code for these */
234 break;
235 }
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MK
236
237 if (info->clk)
238 clk_disable_unprepare(info->clk);
e34b9c94 239 kfree(info);
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240 return 0;
241}
242
243/*
244 * A few common types, add more as needed.
245 */
de88b340 246static struct of_device_id of_platform_serial_table[] = {
8c6e9112
GL
247 { .compatible = "ns8250", .data = (void *)PORT_8250, },
248 { .compatible = "ns16450", .data = (void *)PORT_16450, },
249 { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
250 { .compatible = "ns16550", .data = (void *)PORT_16550, },
251 { .compatible = "ns16750", .data = (void *)PORT_16750, },
252 { .compatible = "ns16850", .data = (void *)PORT_16850, },
2e39e5be 253 { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
e4305f0c 254 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
e06c93ca
LFT
255 { .compatible = "altr,16550-FIFO32",
256 .data = (void *)PORT_ALTR_16550_F32, },
257 { .compatible = "altr,16550-FIFO64",
258 .data = (void *)PORT_ALTR_16550_F64, },
259 { .compatible = "altr,16550-FIFO128",
260 .data = (void *)PORT_ALTR_16550_F128, },
5886188d 261#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
8c6e9112
GL
262 { .compatible = "ibm,qpace-nwp-serial",
263 .data = (void *)PORT_NWPSERIAL, },
5886188d 264#endif
8c6e9112 265 { .type = "serial", .data = (void *)PORT_UNKNOWN, },
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AB
266 { /* end of list */ },
267};
268
793218df 269static struct platform_driver of_platform_serial_driver = {
4018294b
GL
270 .driver = {
271 .name = "of_serial",
272 .owner = THIS_MODULE,
273 .of_match_table = of_platform_serial_table,
274 },
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275 .probe = of_platform_serial_probe,
276 .remove = of_platform_serial_remove,
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AB
277};
278
940ab889 279module_platform_driver(of_platform_serial_driver);
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280
281MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
282MODULE_LICENSE("GPL");
283MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");