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staging: lustre: lustre: osc: modifying seq_printf statements
[linux-2.6-block.git] / drivers / staging / vt6655 / device_main.c
CommitLineData
5449c685
FB		 1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: device_main.c
20 *
21 * Purpose: driver entry for initial, open, close, tx and rx.
22 *
23 * Author: Lyndon Chen
24 *
25 * Date: Jan 8, 2003
26 *
27 * Functions:
28 *
013a468c
CC		 29 * vt6655_probe - module initial (insmod) driver entry
30 * vt6655_remove - module remove entry
31 * vt6655_init_info - device structure resource allocation function
5449c685
FB		 32 * device_free_info - device structure resource free function
33 * device_get_pci_info - get allocated pci io/mem resource
34 * device_print_info - print out resource
5449c685 35 * device_intr - interrupt handle function
5449c685 36 * device_rx_srv - rx service function
5449c685 37 * device_alloc_rx_buf - rx buffer pre-allocated function
5449c685 38 * device_free_tx_buf - free tx buffer function
5449c685
FB		 39 * device_init_rd0_ring- initial rd dma0 ring
40 * device_init_rd1_ring- initial rd dma1 ring
41 * device_init_td0_ring- initial tx dma0 ring buffer
42 * device_init_td1_ring- initial tx dma1 ring buffer
43 * device_init_registers- initial MAC & BBP & RF internal registers.
44 * device_init_rings- initial tx/rx ring buffer
5449c685
FB		 45 * device_free_rings- free all allocated ring buffer
46 * device_tx_srv- tx interrupt service function
47 *
48 * Revision History:
49 */
50#undef __NO_VERSION__
51
f805442e 52#include <linux/file.h>
5449c685 53#include "device.h"
5449c685 54#include "card.h"
79566eb2 55#include "channel.h"
5449c685 56#include "baseband.h"
5449c685 57#include "mac.h"
5449c685 58#include "power.h"
5449c685 59#include "rxtx.h"
5449c685 60#include "dpc.h"
5449c685 61#include "rf.h"
5449c685
FB		 62#include <linux/delay.h>
63#include <linux/kthread.h>
5a0e3ad6 64#include <linux/slab.h>
5449c685 65
5449c685 66/*--------------------- Static Definitions -------------------------*/
5449c685
FB		 67//
68// Define module options
69//
5449c685
FB		 70MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
71MODULE_LICENSE("GPL");
72MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
5449c685 73
915006cd 74#define DEVICE_PARAM(N, D)
5449c685
FB		 75
76#define RX_DESC_MIN0 16
77#define RX_DESC_MAX0 128
78#define RX_DESC_DEF0 32
915006cd 79DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
5449c685
FB		 80
81#define RX_DESC_MIN1 16
82#define RX_DESC_MAX1 128
83#define RX_DESC_DEF1 32
915006cd 84DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
5449c685
FB		 85
86#define TX_DESC_MIN0 16
87#define TX_DESC_MAX0 128
88#define TX_DESC_DEF0 32
915006cd 89DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
5449c685
FB		 90
91#define TX_DESC_MIN1 16
92#define TX_DESC_MAX1 128
93#define TX_DESC_DEF1 64
915006cd 94DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
5449c685 95
5449c685
FB		 96#define INT_WORKS_DEF 20
97#define INT_WORKS_MIN 10
98#define INT_WORKS_MAX 64
99
915006cd 100DEVICE_PARAM(int_works, "Number of packets per interrupt services");
5449c685 101
5449c685
FB		 102#define RTS_THRESH_DEF 2347
103
5449c685
FB		 104#define FRAG_THRESH_DEF 2346
105
5449c685
FB		 106#define SHORT_RETRY_MIN 0
107#define SHORT_RETRY_MAX 31
108#define SHORT_RETRY_DEF 8
109
5449c685
FB		 110DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
111
112#define LONG_RETRY_MIN 0
113#define LONG_RETRY_MAX 15
114#define LONG_RETRY_DEF 4
115
5449c685
FB		 116DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
117
5449c685
FB		 118/* BasebandType[] baseband type selected
119 0: indicate 802.11a type
120 1: indicate 802.11b type
121 2: indicate 802.11g type
122*/
123#define BBP_TYPE_MIN 0
124#define BBP_TYPE_MAX 2
125#define BBP_TYPE_DEF 2
126
127DEVICE_PARAM(BasebandType, "baseband type");
128
5449c685
FB		 129//
130// Static vars definitions
131//
915006cd
JP		 132static CHIP_INFO chip_info_table[] = {
133 { VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ",
134 256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN },
135 {0, NULL}
5449c685
FB		 136};
137
9e4c5c28 138static const struct pci_device_id vt6655_pci_id_table[] = {
db6cb903
JL		 139 { PCI_VDEVICE(VIA, 0x3253), (kernel_ulong_t)chip_info_table},
140 { 0, }
5449c685 141};
5449c685
FB		 142
143/*--------------------- Static Functions --------------------------*/
144
013a468c 145static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
3f8597f4
MP		 146static void vt6655_init_info(struct pci_dev *pcid,
147 struct vnt_private **ppDevice, PCHIP_INFO);
148static void device_free_info(struct vnt_private *pDevice);
149static bool device_get_pci_info(struct vnt_private *, struct pci_dev *pcid);
150static void device_print_info(struct vnt_private *pDevice);
915006cd 151static irqreturn_t device_intr(int irq, void *dev_instance);
5449c685 152
5449c685
FB		 153#ifdef CONFIG_PM
154static int device_notify_reboot(struct notifier_block *, unsigned long event, void *ptr);
9e4c5c28 155static struct notifier_block device_notifier = {
34381c22
PH		 156 .notifier_call = device_notify_reboot,
157 .next = NULL,
158 .priority = 0,
5449c685
FB		 159};
160#endif
5449c685 161
3f8597f4
MP		 162static void device_init_rd0_ring(struct vnt_private *pDevice);
163static void device_init_rd1_ring(struct vnt_private *pDevice);
3f8597f4
MP		 164static void device_init_td0_ring(struct vnt_private *pDevice);
165static void device_init_td1_ring(struct vnt_private *pDevice);
5449c685 166
3f8597f4
MP		 167static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx);
168static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx);
169static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pDesc);
170static void device_init_registers(struct vnt_private *pDevice);
171static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc);
172static void device_free_td0_ring(struct vnt_private *pDevice);
173static void device_free_td1_ring(struct vnt_private *pDevice);
174static void device_free_rd0_ring(struct vnt_private *pDevice);
175static void device_free_rd1_ring(struct vnt_private *pDevice);
176static void device_free_rings(struct vnt_private *pDevice);
5449c685 177
5449c685
FB		 178/*--------------------- Export Variables --------------------------*/
179
180/*--------------------- Export Functions --------------------------*/
181
915006cd 182static char *get_chip_name(int chip_id)
3ac9e0fd
DN		 183{
184 int i;
6b711271 185
3ac9e0fd
DN		 186 for (i = 0; chip_info_table[i].name != NULL; i++)
187 if (chip_info_table[i].chip_id == chip_id)
188 break;
189 return chip_info_table[i].name;
5449c685
FB		 190}
191
f4e1b7c8 192static void vt6655_remove(struct pci_dev *pcid)
5449c685 193{
3f8597f4 194 struct vnt_private *pDevice = pci_get_drvdata(pcid);
5449c685 195
3ac9e0fd
DN		 196 if (pDevice == NULL)
197 return;
198 device_free_info(pDevice);
5449c685
FB		 199}
200
46fa0ec0 201static void device_get_options(struct vnt_private *pDevice)
bf76ebd9
DN		 202{
203 POPTIONS pOpts = &(pDevice->sOpts);
204
205 pOpts->nRxDescs0 = RX_DESC_DEF0;
206 pOpts->nRxDescs1 = RX_DESC_DEF1;
207 pOpts->nTxDescs[0] = TX_DESC_DEF0;
208 pOpts->nTxDescs[1] = TX_DESC_DEF1;
bf76ebd9 209 pOpts->int_works = INT_WORKS_DEF;
bf76ebd9 210
bf76ebd9
DN		 211 pOpts->short_retry = SHORT_RETRY_DEF;
212 pOpts->long_retry = LONG_RETRY_DEF;
213 pOpts->bbp_type = BBP_TYPE_DEF;
5449c685
FB		 214}
215
216static void
3f8597f4
MP		 217device_set_options(struct vnt_private *pDevice)
218{
915006cd
JP		 219 pDevice->byShortRetryLimit = pDevice->sOpts.short_retry;
220 pDevice->byLongRetryLimit = pDevice->sOpts.long_retry;
915006cd 221 pDevice->byBBType = pDevice->sOpts.bbp_type;
bf8918de 222 pDevice->byPacketType = pDevice->byBBType;
5449c685 223 pDevice->byAutoFBCtrl = AUTO_FB_0;
915006cd 224 pDevice->bUpdateBBVGA = true;
915006cd
JP		 225 pDevice->byPreambleType = 0;
226
48caf5a0
JP		 227 pr_debug(" byShortRetryLimit= %d\n", (int)pDevice->byShortRetryLimit);
228 pr_debug(" byLongRetryLimit= %d\n", (int)pDevice->byLongRetryLimit);
229 pr_debug(" byPreambleType= %d\n", (int)pDevice->byPreambleType);
230 pr_debug(" byShortPreamble= %d\n", (int)pDevice->byShortPreamble);
48caf5a0 231 pr_debug(" byBBType= %d\n", (int)pDevice->byBBType);
5449c685
FB		 232}
233
5449c685 234//
789d1aef 235// Initialisation of MAC & BBP registers
5449c685
FB		 236//
237
3f8597f4 238static void device_init_registers(struct vnt_private *pDevice)
5449c685 239{
10d6f1b7 240 unsigned long flags;
915006cd
JP		 241 unsigned int ii;
242 unsigned char byValue;
915006cd
JP		 243 unsigned char byCCKPwrdBm = 0;
244 unsigned char byOFDMPwrdBm = 0;
6b711271 245
915006cd 246 MACbShutdown(pDevice->PortOffset);
a5f0eef3 247 BBvSoftwareReset(pDevice);
915006cd 248
9f34de35
MP		 249 /* Do MACbSoftwareReset in MACvInitialize */
250 MACbSoftwareReset(pDevice->PortOffset);
915006cd 251
9f34de35 252 pDevice->bAES = false;
915006cd 253
9f34de35
MP		 254 /* Only used in 11g type, sync with ERP IE */
255 pDevice->bProtectMode = false;
915006cd 256
9f34de35
MP		 257 pDevice->bNonERPPresent = false;
258 pDevice->bBarkerPreambleMd = false;
259 pDevice->wCurrentRate = RATE_1M;
260 pDevice->byTopOFDMBasicRate = RATE_24M;
261 pDevice->byTopCCKBasicRate = RATE_1M;
915006cd 262
9f34de35
MP		 263 /* Target to IF pin while programming to RF chip. */
264 pDevice->byRevId = 0;
915006cd 265
9f34de35
MP		 266 /* init MAC */
267 MACvInitialize(pDevice->PortOffset);
268
269 /* Get Local ID */
270 VNSvInPortB(pDevice->PortOffset + MAC_REG_LOCALID, &pDevice->byLocalID);
915006cd 271
10d6f1b7 272 spin_lock_irqsave(&pDevice->lock, flags);
915006cd 273
9f34de35 274 SROMvReadAllContents(pDevice->PortOffset, pDevice->abyEEPROM);
915006cd 275
10d6f1b7 276 spin_unlock_irqrestore(&pDevice->lock, flags);
915006cd 277
9f34de35
MP		 278 /* Get Channel range */
279 pDevice->byMinChannel = 1;
280 pDevice->byMaxChannel = CB_MAX_CHANNEL;
915006cd 281
9f34de35
MP		 282 /* Get Antena */
283 byValue = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_ANTENNA);
284 if (byValue & EEP_ANTINV)
285 pDevice->bTxRxAntInv = true;
286 else
287 pDevice->bTxRxAntInv = false;
288
289 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
290 /* if not set default is All */
291 if (byValue == 0)
292 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
293
9f34de35
MP		 294 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
295 pDevice->byAntennaCount = 2;
296 pDevice->byTxAntennaMode = ANT_B;
297 pDevice->dwTxAntennaSel = 1;
298 pDevice->dwRxAntennaSel = 1;
299
300 if (pDevice->bTxRxAntInv)
301 pDevice->byRxAntennaMode = ANT_A;
915006cd 302 else
9f34de35 303 pDevice->byRxAntennaMode = ANT_B;
9f34de35 304 } else {
9f34de35
MP		 305 pDevice->byAntennaCount = 1;
306 pDevice->dwTxAntennaSel = 0;
307 pDevice->dwRxAntennaSel = 0;
915006cd 308
9f34de35
MP		 309 if (byValue & EEP_ANTENNA_AUX) {
310 pDevice->byTxAntennaMode = ANT_A;
915006cd 311
9f34de35
MP		 312 if (pDevice->bTxRxAntInv)
313 pDevice->byRxAntennaMode = ANT_B;
314 else
315 pDevice->byRxAntennaMode = ANT_A;
316 } else {
915006cd 317 pDevice->byTxAntennaMode = ANT_B;
9f34de35 318
1208f14a 319 if (pDevice->bTxRxAntInv)
915006cd
JP		 320 pDevice->byRxAntennaMode = ANT_A;
321 else
322 pDevice->byRxAntennaMode = ANT_B;
915006cd 323 }
9f34de35 324 }
5449c685 325
918185f6
MP		 326 /* Set initial antenna mode */
327 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
328 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
329
9f34de35
MP		 330 /* zonetype initial */
331 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
915006cd 332
9f34de35
MP		 333 /* Get RFType */
334 pDevice->byRFType = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_RFTYPE);
915006cd 335
9f34de35
MP		 336 /* force change RevID for VT3253 emu */
337 if ((pDevice->byRFType & RF_EMU) != 0)
915006cd 338 pDevice->byRevId = 0x80;
915006cd 339
9f34de35 340 pDevice->byRFType &= RF_MASK;
48caf5a0 341 pr_debug("pDevice->byRFType = %x\n", pDevice->byRFType);
915006cd 342
9f34de35
MP		 343 if (!pDevice->bZoneRegExist)
344 pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
bc5cf656 345
48caf5a0 346 pr_debug("pDevice->byZoneType = %x\n", pDevice->byZoneType);
915006cd 347
9f34de35
MP		 348 /* Init RF module */
349 RFbInit(pDevice);
915006cd 350
9f34de35
MP		 351 /* Get Desire Power Value */
352 pDevice->byCurPwr = 0xFF;
353 pDevice->byCCKPwr = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_CCK);
354 pDevice->byOFDMPwrG = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_OFDMG);
f2046f93 355
9f34de35
MP		 356 /* Load power Table */
357 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
358 pDevice->abyCCKPwrTbl[ii + 1] =
359 SROMbyReadEmbedded(pDevice->PortOffset,
360 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
361 if (pDevice->abyCCKPwrTbl[ii + 1] == 0)
362 pDevice->abyCCKPwrTbl[ii+1] = pDevice->byCCKPwr;
5449c685 363
9f34de35
MP		 364 pDevice->abyOFDMPwrTbl[ii + 1] =
365 SROMbyReadEmbedded(pDevice->PortOffset,
366 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
367 if (pDevice->abyOFDMPwrTbl[ii + 1] == 0)
368 pDevice->abyOFDMPwrTbl[ii + 1] = pDevice->byOFDMPwrG;
bc5cf656 369
9f34de35
MP		 370 pDevice->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
371 pDevice->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
372 }
bc5cf656 373
9f34de35 374 /* recover 12,13 ,14channel for EUROPE by 11 channel */
f4cf678f
MP		 375 for (ii = 11; ii < 14; ii++) {
376 pDevice->abyCCKPwrTbl[ii] = pDevice->abyCCKPwrTbl[10];
377 pDevice->abyOFDMPwrTbl[ii] = pDevice->abyOFDMPwrTbl[10];
9f34de35 378 }
5449c685 379
9f34de35
MP		 380 /* Load OFDM A Power Table */
381 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
382 pDevice->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
383 SROMbyReadEmbedded(pDevice->PortOffset,
384 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
5449c685 385
9f34de35
MP		 386 pDevice->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
387 SROMbyReadEmbedded(pDevice->PortOffset,
388 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
389 }
5449c685 390
9f34de35
MP		 391 if (pDevice->byLocalID > REV_ID_VT3253_B1) {
392 MACvSelectPage1(pDevice->PortOffset);
5449c685 393
9f34de35
MP		 394 VNSvOutPortB(pDevice->PortOffset + MAC_REG_MSRCTL + 1,
395 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
5449c685 396
9f34de35
MP		 397 MACvSelectPage0(pDevice->PortOffset);
398 }
5449c685 399
9f34de35
MP		 400 /* use relative tx timeout and 802.11i D4 */
401 MACvWordRegBitsOn(pDevice->PortOffset,
402 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
5449c685 403
9f34de35
MP		 404 /* set performance parameter by registry */
405 MACvSetShortRetryLimit(pDevice->PortOffset, pDevice->byShortRetryLimit);
406 MACvSetLongRetryLimit(pDevice->PortOffset, pDevice->byLongRetryLimit);
5449c685 407
9f34de35
MP		 408 /* reset TSF counter */
409 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
410 /* enable TSF counter */
411 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
5449c685 412
9f34de35
MP		 413 /* initialize BBP registers */
414 BBbVT3253Init(pDevice);
5449c685 415
9f34de35
MP		 416 if (pDevice->bUpdateBBVGA) {
417 pDevice->byBBVGACurrent = pDevice->abyBBVGA[0];
418 pDevice->byBBVGANew = pDevice->byBBVGACurrent;
419 BBvSetVGAGainOffset(pDevice, pDevice->abyBBVGA[0]);
420 }
5449c685 421
a5f0eef3
MP		 422 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
423 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
5449c685 424
9f34de35
MP		 425 /* Set BB and packet type at the same time. */
426 /* Set Short Slot Time, xIFS, and RSPINF. */
bfa4b0fe 427 pDevice->wCurrentRate = RATE_54M;
bc5cf656 428
9f34de35 429 pDevice->bRadioOff = false;
5449c685 430
9f34de35
MP		 431 pDevice->byRadioCtl = SROMbyReadEmbedded(pDevice->PortOffset,
432 EEP_OFS_RADIOCTL);
433 pDevice->bHWRadioOff = false;
5449c685 434
9f34de35
MP		 435 if (pDevice->byRadioCtl & EEP_RADIOCTL_ENABLE) {
436 /* Get GPIO */
437 MACvGPIOIn(pDevice->PortOffset, &pDevice->byGPIO);
438
439 if (((pDevice->byGPIO & GPIO0_DATA) &&
440 !(pDevice->byRadioCtl & EEP_RADIOCTL_INV)) ||
441 (!(pDevice->byGPIO & GPIO0_DATA) &&
442 (pDevice->byRadioCtl & EEP_RADIOCTL_INV)))
915006cd 443 pDevice->bHWRadioOff = true;
915006cd 444 }
9f34de35 445
bc5cf656 446 if (pDevice->bHWRadioOff || pDevice->bRadioControlOff)
915006cd 447 CARDbRadioPowerOff(pDevice);
5449c685 448
3500a1da
MP		 449 /* get Permanent network address */
450 SROMvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr);
48caf5a0 451 pr_debug("Network address = %pM\n", pDevice->abyCurrentNetAddr);
915006cd 452
3500a1da
MP		 453 /* reset Tx pointer */
454 CARDvSafeResetRx(pDevice);
455 /* reset Rx pointer */
456 CARDvSafeResetTx(pDevice);
5449c685 457
3500a1da
MP		 458 if (pDevice->byLocalID <= REV_ID_VT3253_A1)
459 MACvRegBitsOn(pDevice->PortOffset, MAC_REG_RCR, RCR_WPAERR);
5449c685 460
3500a1da
MP		 461 /* Turn On Rx DMA */
462 MACvReceive0(pDevice->PortOffset);
463 MACvReceive1(pDevice->PortOffset);
5449c685 464
3500a1da
MP		 465 /* start the adapter */
466 MACvStart(pDevice->PortOffset);
5449c685
FB		 467}
468
3f8597f4 469static void device_print_info(struct vnt_private *pDevice)
5449c685 470{
bc5d431c 471 dev_info(&pDevice->pcid->dev, "%s\n", get_chip_name(pDevice->chip_id));
5449c685 472
bc5d431c
MP		 473 dev_info(&pDevice->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
474 pDevice->abyCurrentNetAddr, (unsigned long)pDevice->ioaddr,
475 (unsigned long)pDevice->PortOffset, pDevice->pcid->irq);
5449c685
FB		 476}
477
3f8597f4
MP		 478static void vt6655_init_info(struct pci_dev *pcid,
479 struct vnt_private **ppDevice,
480 PCHIP_INFO pChip_info)
481{
1bd63757 482 memset(*ppDevice, 0, sizeof(**ppDevice));
5449c685 483
915006cd
JP		 484 (*ppDevice)->pcid = pcid;
485 (*ppDevice)->chip_id = pChip_info->chip_id;
486 (*ppDevice)->io_size = pChip_info->io_size;
487 (*ppDevice)->nTxQueues = pChip_info->nTxQueue;
488 (*ppDevice)->multicast_limit = 32;
5449c685 489
915006cd 490 spin_lock_init(&((*ppDevice)->lock));
5449c685
FB		 491}
492
3f8597f4
MP		 493static bool device_get_pci_info(struct vnt_private *pDevice,
494 struct pci_dev *pcid)
84b50762 495{
915006cd
JP		 496 u16 pci_cmd;
497 u8 b;
498 unsigned int cis_addr;
5449c685 499
915006cd
JP		 500 pci_read_config_byte(pcid, PCI_REVISION_ID, &pDevice->byRevId);
501 pci_read_config_word(pcid, PCI_SUBSYSTEM_ID, &pDevice->SubSystemID);
502 pci_read_config_word(pcid, PCI_SUBSYSTEM_VENDOR_ID, &pDevice->SubVendorID);
503 pci_read_config_word(pcid, PCI_COMMAND, (u16 *)&(pci_cmd));
5449c685 504
915006cd 505 pci_set_master(pcid);
5449c685 506
915006cd
JP		 507 pDevice->memaddr = pci_resource_start(pcid, 0);
508 pDevice->ioaddr = pci_resource_start(pcid, 1);
5449c685 509
915006cd 510 cis_addr = pci_resource_start(pcid, 2);
5449c685 511
915006cd 512 pDevice->pcid = pcid;
5449c685 513
915006cd
JP		 514 pci_read_config_byte(pcid, PCI_COMMAND, &b);
515 pci_write_config_byte(pcid, PCI_COMMAND, (b|PCI_COMMAND_MASTER));
5449c685 516
915006cd 517 return true;
5449c685
FB		 518}
519
3f8597f4 520static void device_free_info(struct vnt_private *pDevice)
84b50762 521{
14e53006
MP		 522 if (!pDevice)
523 return;
5449c685 524
14e53006
MP		 525 if (pDevice->mac_hw)
526 ieee80211_unregister_hw(pDevice->hw);
5449c685 527
915006cd 528 if (pDevice->PortOffset)
16834405 529 iounmap(pDevice->PortOffset);
5449c685 530
915006cd
JP		 531 if (pDevice->pcid)
532 pci_release_regions(pDevice->pcid);
14e53006
MP		 533
534 if (pDevice->hw)
535 ieee80211_free_hw(pDevice->hw);
5449c685 536}
5449c685 537
3f8597f4 538static bool device_init_rings(struct vnt_private *pDevice)
84b50762 539{
915006cd 540 void *vir_pool;
5449c685 541
915006cd 542 /*allocate all RD/TD rings a single pool*/
8b983be5
JP		 543 vir_pool = pci_zalloc_consistent(pDevice->pcid,
544 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
545 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
546 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
547 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
548 &pDevice->pool_dma);
915006cd 549 if (vir_pool == NULL) {
42f709ef 550 dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n");
915006cd
JP		 551 return false;
552 }
5449c685 553
915006cd
JP		 554 pDevice->aRD0Ring = vir_pool;
555 pDevice->aRD1Ring = vir_pool +
556 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
557
915006cd
JP		 558 pDevice->rd0_pool_dma = pDevice->pool_dma;
559 pDevice->rd1_pool_dma = pDevice->rd0_pool_dma +
560 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
561
8b983be5
JP		 562 pDevice->tx0_bufs = pci_zalloc_consistent(pDevice->pcid,
563 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
564 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
565 CB_BEACON_BUF_SIZE +
566 CB_MAX_BUF_SIZE,
567 &pDevice->tx_bufs_dma0);
915006cd 568 if (pDevice->tx0_bufs == NULL) {
42f709ef
MP		 569 dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n");
570
915006cd
JP		 571 pci_free_consistent(pDevice->pcid,
572 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
573 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
574 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
575 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
576 vir_pool, pDevice->pool_dma
577 );
578 return false;
579 }
5449c685 580
915006cd
JP		 581 pDevice->td0_pool_dma = pDevice->rd1_pool_dma +
582 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
5449c685 583
915006cd
JP		 584 pDevice->td1_pool_dma = pDevice->td0_pool_dma +
585 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
5449c685 586
915006cd
JP		 587 // vir_pool: pvoid type
588 pDevice->apTD0Rings = vir_pool
589 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
590 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
5449c685 591
915006cd
JP		 592 pDevice->apTD1Rings = vir_pool
593 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
594 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc)
595 + pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
5449c685 596
915006cd
JP		 597 pDevice->tx1_bufs = pDevice->tx0_bufs +
598 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
5449c685 599
915006cd
JP		 600 pDevice->tx_beacon_bufs = pDevice->tx1_bufs +
601 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
5449c685 602
915006cd
JP		 603 pDevice->pbyTmpBuff = pDevice->tx_beacon_bufs +
604 CB_BEACON_BUF_SIZE;
5449c685 605
915006cd
JP		 606 pDevice->tx_bufs_dma1 = pDevice->tx_bufs_dma0 +
607 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
5449c685 608
915006cd
JP		 609 pDevice->tx_beacon_dma = pDevice->tx_bufs_dma1 +
610 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
5449c685 611
915006cd 612 return true;
5449c685
FB		 613}
614
3f8597f4 615static void device_free_rings(struct vnt_private *pDevice)
84b50762 616{
915006cd
JP		 617 pci_free_consistent(pDevice->pcid,
618 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
619 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
620 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
621 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc)
622 ,
623 pDevice->aRD0Ring, pDevice->pool_dma
624 );
625
626 if (pDevice->tx0_bufs)
627 pci_free_consistent(pDevice->pcid,
628 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
629 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
630 CB_BEACON_BUF_SIZE +
631 CB_MAX_BUF_SIZE,
632 pDevice->tx0_bufs, pDevice->tx_bufs_dma0
633 );
5449c685
FB		 634}
635
3f8597f4 636static void device_init_rd0_ring(struct vnt_private *pDevice)
84b50762 637{
915006cd
JP		 638 int i;
639 dma_addr_t curr = pDevice->rd0_pool_dma;
640 PSRxDesc pDesc;
641
642 /* Init the RD0 ring entries */
643 for (i = 0; i < pDevice->sOpts.nRxDescs0; i ++, curr += sizeof(SRxDesc)) {
644 pDesc = &(pDevice->aRD0Ring[i]);
645 pDesc->pRDInfo = alloc_rd_info();
646 ASSERT(pDesc->pRDInfo);
42f709ef
MP		 647 if (!device_alloc_rx_buf(pDevice, pDesc))
648 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
649
915006cd
JP		 650 pDesc->next = &(pDevice->aRD0Ring[(i+1) % pDevice->sOpts.nRxDescs0]);
651 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
652 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
653 }
654
655 if (i > 0)
656 pDevice->aRD0Ring[i-1].next_desc = cpu_to_le32(pDevice->rd0_pool_dma);
657 pDevice->pCurrRD[0] = &(pDevice->aRD0Ring[0]);
5449c685
FB		 658}
659
3f8597f4 660static void device_init_rd1_ring(struct vnt_private *pDevice)
84b50762 661{
915006cd
JP		 662 int i;
663 dma_addr_t curr = pDevice->rd1_pool_dma;
664 PSRxDesc pDesc;
665
666 /* Init the RD1 ring entries */
667 for (i = 0; i < pDevice->sOpts.nRxDescs1; i ++, curr += sizeof(SRxDesc)) {
668 pDesc = &(pDevice->aRD1Ring[i]);
669 pDesc->pRDInfo = alloc_rd_info();
670 ASSERT(pDesc->pRDInfo);
42f709ef
MP		 671 if (!device_alloc_rx_buf(pDevice, pDesc))
672 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
673
915006cd
JP		 674 pDesc->next = &(pDevice->aRD1Ring[(i+1) % pDevice->sOpts.nRxDescs1]);
675 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
676 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
677 }
678
679 if (i > 0)
680 pDevice->aRD1Ring[i-1].next_desc = cpu_to_le32(pDevice->rd1_pool_dma);
681 pDevice->pCurrRD[1] = &(pDevice->aRD1Ring[0]);
5449c685
FB		 682}
683
3f8597f4 684static void device_free_rd0_ring(struct vnt_private *pDevice)
84b50762 685{
915006cd 686 int i;
5449c685 687
915006cd
JP		 688 for (i = 0; i < pDevice->sOpts.nRxDescs0; i++) {
689 PSRxDesc pDesc = &(pDevice->aRD0Ring[i]);
690 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
5449c685 691
915006cd
JP		 692 pci_unmap_single(pDevice->pcid, pRDInfo->skb_dma,
693 pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
5449c685 694
915006cd 695 dev_kfree_skb(pRDInfo->skb);
5449c685 696
61d566a5 697 kfree(pDesc->pRDInfo);
915006cd 698 }
5449c685
FB		 699}
700
3f8597f4 701static void device_free_rd1_ring(struct vnt_private *pDevice)
84b50762 702{
915006cd 703 int i;
5449c685 704
915006cd
JP		 705 for (i = 0; i < pDevice->sOpts.nRxDescs1; i++) {
706 PSRxDesc pDesc = &(pDevice->aRD1Ring[i]);
707 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
5449c685 708
915006cd
JP		 709 pci_unmap_single(pDevice->pcid, pRDInfo->skb_dma,
710 pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
5449c685 711
915006cd 712 dev_kfree_skb(pRDInfo->skb);
5449c685 713
61d566a5 714 kfree(pDesc->pRDInfo);
915006cd 715 }
5449c685
FB		 716}
717
3f8597f4 718static void device_init_td0_ring(struct vnt_private *pDevice)
84b50762 719{
915006cd
JP		 720 int i;
721 dma_addr_t curr;
722 PSTxDesc pDesc;
723
724 curr = pDevice->td0_pool_dma;
725 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++, curr += sizeof(STxDesc)) {
726 pDesc = &(pDevice->apTD0Rings[i]);
727 pDesc->pTDInfo = alloc_td_info();
728 ASSERT(pDesc->pTDInfo);
729 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
730 pDesc->pTDInfo->buf = pDevice->tx0_bufs + (i)*PKT_BUF_SZ;
731 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma0 + (i)*PKT_BUF_SZ;
732 }
733 pDesc->next = &(pDevice->apTD0Rings[(i+1) % pDevice->sOpts.nTxDescs[0]]);
734 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
735 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
736 }
737
738 if (i > 0)
739 pDevice->apTD0Rings[i-1].next_desc = cpu_to_le32(pDevice->td0_pool_dma);
740 pDevice->apTailTD[0] = pDevice->apCurrTD[0] = &(pDevice->apTD0Rings[0]);
5449c685
FB		 741}
742
3f8597f4 743static void device_init_td1_ring(struct vnt_private *pDevice)
84b50762 744{
915006cd
JP		 745 int i;
746 dma_addr_t curr;
747 PSTxDesc pDesc;
748
749 /* Init the TD ring entries */
750 curr = pDevice->td1_pool_dma;
751 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++, curr += sizeof(STxDesc)) {
752 pDesc = &(pDevice->apTD1Rings[i]);
753 pDesc->pTDInfo = alloc_td_info();
754 ASSERT(pDesc->pTDInfo);
755 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
756 pDesc->pTDInfo->buf = pDevice->tx1_bufs + (i) * PKT_BUF_SZ;
757 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma1 + (i) * PKT_BUF_SZ;
758 }
759 pDesc->next = &(pDevice->apTD1Rings[(i + 1) % pDevice->sOpts.nTxDescs[1]]);
760 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
761 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
762 }
763
764 if (i > 0)
765 pDevice->apTD1Rings[i-1].next_desc = cpu_to_le32(pDevice->td1_pool_dma);
766 pDevice->apTailTD[1] = pDevice->apCurrTD[1] = &(pDevice->apTD1Rings[0]);
5449c685
FB		 767}
768
3f8597f4 769static void device_free_td0_ring(struct vnt_private *pDevice)
84b50762 770{
915006cd 771 int i;
6b711271 772
915006cd
JP		 773 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++) {
774 PSTxDesc pDesc = &(pDevice->apTD0Rings[i]);
775 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
5449c685 776
915006cd
JP		 777 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
778 pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma,
779 pTDInfo->skb->len, PCI_DMA_TODEVICE);
5449c685 780
915006cd
JP		 781 if (pTDInfo->skb)
782 dev_kfree_skb(pTDInfo->skb);
5449c685 783
61d566a5 784 kfree(pDesc->pTDInfo);
915006cd 785 }
5449c685
FB		 786}
787
3f8597f4 788static void device_free_td1_ring(struct vnt_private *pDevice)
84b50762 789{
915006cd 790 int i;
5449c685 791
915006cd
JP		 792 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++) {
793 PSTxDesc pDesc = &(pDevice->apTD1Rings[i]);
794 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
5449c685 795
915006cd
JP		 796 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
797 pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma,
798 pTDInfo->skb->len, PCI_DMA_TODEVICE);
5449c685 799
915006cd
JP		 800 if (pTDInfo->skb)
801 dev_kfree_skb(pTDInfo->skb);
5449c685 802
61d566a5 803 kfree(pDesc->pTDInfo);
915006cd 804 }
5449c685
FB		 805}
806
5449c685
FB		 807/*-----------------------------------------------------------------*/
808
3f8597f4 809static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx)
84b50762 810{
915006cd
JP		 811 PSRxDesc pRD;
812 int works = 0;
5449c685 813
915006cd
JP		 814 for (pRD = pDevice->pCurrRD[uIdx];
815 pRD->m_rd0RD0.f1Owner == OWNED_BY_HOST;
816 pRD = pRD->next) {
915006cd
JP		 817 if (works++ > 15)
818 break;
33b1c8c1 819 if (vnt_receive_frame(pDevice, pRD)) {
915006cd 820 if (!device_alloc_rx_buf(pDevice, pRD)) {
42f709ef
MP		 821 dev_err(&pDevice->pcid->dev,
822 "can not allocate rx buf\n");
915006cd
JP		 823 break;
824 }
825 }
826 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
915006cd
JP		 827 }
828
829 pDevice->pCurrRD[uIdx] = pRD;
830
831 return works;
5449c685
FB		 832}
833
3f8597f4 834static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pRD)
84b50762 835{
915006cd 836 PDEVICE_RD_INFO pRDInfo = pRD->pRDInfo;
5449c685 837
915006cd 838 pRDInfo->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
915006cd
JP		 839 if (pRDInfo->skb == NULL)
840 return false;
841 ASSERT(pRDInfo->skb);
33b1c8c1
MP		 842
843 pRDInfo->skb_dma =
844 pci_map_single(pDevice->pcid,
845 skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)),
846 pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
847
915006cd
JP		 848 *((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */
849
850 pRD->m_rd0RD0.wResCount = cpu_to_le16(pDevice->rx_buf_sz);
851 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
852 pRD->m_rd1RD1.wReqCount = cpu_to_le16(pDevice->rx_buf_sz);
853 pRD->buff_addr = cpu_to_le32(pRDInfo->skb_dma);
854
855 return true;
5449c685
FB		 856}
857
59918bea
MP		 858static const u8 fallback_rate0[5][5] = {
859 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
860 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
861 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
862 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
863 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
864};
865
866static const u8 fallback_rate1[5][5] = {
867 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
868 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
869 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
870 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
871 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
872};
873
874static int vnt_int_report_rate(struct vnt_private *priv,
875 PDEVICE_TD_INFO context, u8 tsr0, u8 tsr1)
876{
877 struct vnt_tx_fifo_head *fifo_head;
878 struct ieee80211_tx_info *info;
879 struct ieee80211_rate *rate;
880 u16 fb_option;
881 u8 tx_retry = (tsr0 & TSR0_NCR);
882 s8 idx;
883
884 if (!context)
885 return -ENOMEM;
886
887 if (!context->skb)
888 return -EINVAL;
889
890 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
891 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
892 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
893
894 info = IEEE80211_SKB_CB(context->skb);
895 idx = info->control.rates[0].idx;
896
897 if (fb_option && !(tsr1 & TSR1_TERR)) {
898 u8 tx_rate;
899 u8 retry = tx_retry;
900
901 rate = ieee80211_get_tx_rate(priv->hw, info);
902 tx_rate = rate->hw_value - RATE_18M;
903
904 if (retry > 4)
905 retry = 4;
906
907 if (fb_option & FIFOCTL_AUTO_FB_0)
908 tx_rate = fallback_rate0[tx_rate][retry];
909 else if (fb_option & FIFOCTL_AUTO_FB_1)
910 tx_rate = fallback_rate1[tx_rate][retry];
911
912 if (info->band == IEEE80211_BAND_5GHZ)
913 idx = tx_rate - RATE_6M;
914 else
915 idx = tx_rate;
916 }
917
918 ieee80211_tx_info_clear_status(info);
919
920 info->status.rates[0].count = tx_retry;
921
922 if (!(tsr1 & TSR1_TERR)) {
923 info->status.rates[0].idx = idx;
924 info->flags |= IEEE80211_TX_STAT_ACK;
925 }
926
927 return 0;
928}
929
3f8597f4 930static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx)
84b50762 931{
915006cd 932 PSTxDesc pTD;
915006cd
JP		 933 int works = 0;
934 unsigned char byTsr0;
935 unsigned char byTsr1;
915006cd 936
915006cd 937 for (pTD = pDevice->apTailTD[uIdx]; pDevice->iTDUsed[uIdx] > 0; pTD = pTD->next) {
915006cd
JP		 938 if (pTD->m_td0TD0.f1Owner == OWNED_BY_NIC)
939 break;
940 if (works++ > 15)
941 break;
942
943 byTsr0 = pTD->m_td0TD0.byTSR0;
944 byTsr1 = pTD->m_td0TD0.byTSR1;
945
946 //Only the status of first TD in the chain is correct
947 if (pTD->m_td1TD1.byTCR & TCR_STP) {
915006cd 948 if ((pTD->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) != 0) {
59918bea
MP		 949
950 vnt_int_report_rate(pDevice, pTD->pTDInfo, byTsr0, byTsr1);
915006cd
JP		 951
952 if (!(byTsr1 & TSR1_TERR)) {
953 if (byTsr0 != 0) {
48caf5a0
JP		 954 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
955 (int)uIdx, byTsr1,
956 byTsr0);
915006cd 957 }
5e0cc8a2 958 } else {
48caf5a0
JP		 959 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
960 (int)uIdx, byTsr1, byTsr0);
915006cd
JP		 961 }
962 }
963
964 if (byTsr1 & TSR1_TERR) {
965 if ((pTD->pTDInfo->byFlags & TD_FLAGS_PRIV_SKB) != 0) {
48caf5a0
JP		 966 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
967 (int)uIdx, byTsr1, byTsr0);
915006cd 968 }
915006cd
JP		 969 }
970 device_free_tx_buf(pDevice, pTD);
971 pDevice->iTDUsed[uIdx]--;
915006cd 972 }
915006cd
JP		 973 }
974
915006cd
JP		 975 pDevice->apTailTD[uIdx] = pTD;
976
977 return works;
5449c685
FB		 978}
979
3f8597f4 980static void device_error(struct vnt_private *pDevice, unsigned short status)
84b50762 981{
915006cd 982 if (status & ISR_FETALERR) {
42f709ef
MP		 983 dev_err(&pDevice->pcid->dev, "Hardware fatal error\n");
984
915006cd
JP		 985 MACbShutdown(pDevice->PortOffset);
986 return;
987 }
5449c685
FB		 988}
989
3f8597f4 990static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc)
84b50762 991{
915006cd
JP		 992 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
993 struct sk_buff *skb = pTDInfo->skb;
5449c685 994
915006cd
JP		 995 // pre-allocated buf_dma can't be unmapped.
996 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) {
997 pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma, skb->len,
998 PCI_DMA_TODEVICE);
999 }
5449c685 1000
59918bea
MP		 1001 if (pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
1002 ieee80211_tx_status_irqsafe(pDevice->hw, skb);
1003 else
915006cd 1004 dev_kfree_skb_irq(skb);
5449c685 1005
915006cd 1006 pTDInfo->skb_dma = 0;
70ae543b 1007 pTDInfo->skb = NULL;
915006cd 1008 pTDInfo->byFlags = 0;
5449c685
FB		 1009}
1010
84b50762
GC		 1011static irqreturn_t device_intr(int irq, void *dev_instance)
1012{
e70abceb 1013 struct vnt_private *pDevice = dev_instance;
915006cd
JP		 1014 int max_count = 0;
1015 unsigned long dwMIBCounter = 0;
915006cd
JP		 1016 unsigned char byOrgPageSel = 0;
1017 int handled = 0;
915006cd 1018 int ii = 0;
6cff1f6a 1019 unsigned long flags;
915006cd 1020
915006cd
JP		 1021 MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
1022
1023 if (pDevice->dwIsr == 0)
1024 return IRQ_RETVAL(handled);
1025
1026 if (pDevice->dwIsr == 0xffffffff) {
48caf5a0 1027 pr_debug("dwIsr = 0xffff\n");
915006cd
JP		 1028 return IRQ_RETVAL(handled);
1029 }
915006cd
JP		 1030
1031 handled = 1;
1032 MACvIntDisable(pDevice->PortOffset);
6cff1f6a
MP		 1033
1034 spin_lock_irqsave(&pDevice->lock, flags);
915006cd
JP		 1035
1036 //Make sure current page is 0
1037 VNSvInPortB(pDevice->PortOffset + MAC_REG_PAGE1SEL, &byOrgPageSel);
bc5cf656 1038 if (byOrgPageSel == 1)
915006cd 1039 MACvSelectPage0(pDevice->PortOffset);
bc5cf656 1040 else
915006cd
JP		 1041 byOrgPageSel = 0;
1042
1043 MACvReadMIBCounter(pDevice->PortOffset, &dwMIBCounter);
1044 // TBD....
1045 // Must do this after doing rx/tx, cause ISR bit is slow
1046 // than RD/TD write back
1047 // update ISR counter
2a0a7b3d 1048 STAvUpdate802_11Counter(&pDevice->s802_11Counter, &pDevice->scStatistic, dwMIBCounter);
915006cd 1049 while (pDevice->dwIsr != 0) {
915006cd
JP		 1050 STAvUpdateIsrStatCounter(&pDevice->scStatistic, pDevice->dwIsr);
1051 MACvWriteISR(pDevice->PortOffset, pDevice->dwIsr);
1052
1053 if (pDevice->dwIsr & ISR_FETALERR) {
48caf5a0 1054 pr_debug(" ISR_FETALERR\n");
915006cd
JP		 1055 VNSvOutPortB(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1056 VNSvOutPortW(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1057 device_error(pDevice, pDevice->dwIsr);
1058 }
1059
915006cd 1060 if (pDevice->dwIsr & ISR_TBTT) {
59918bea
MP		 1061 if (pDevice->vif &&
1062 pDevice->op_mode != NL80211_IFTYPE_ADHOC) {
1063 if (pDevice->bUpdateBBVGA &&
d855802b 1064 !(pDevice->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
59918bea
MP		 1065 pDevice->vif->bss_conf.assoc &&
1066 pDevice->uCurrRSSI) {
915006cd
JP		 1067 long ldBm;
1068
1069 RFvRSSITodBm(pDevice, (unsigned char) pDevice->uCurrRSSI, &ldBm);
1070 for (ii = 0; ii < BB_VGA_LEVEL; ii++) {
1071 if (ldBm < pDevice->ldBmThreshold[ii]) {
1072 pDevice->byBBVGANew = pDevice->abyBBVGA[ii];
1073 break;
1074 }
1075 }
1076 if (pDevice->byBBVGANew != pDevice->byBBVGACurrent) {
1077 pDevice->uBBVGADiffCount++;
1078 if (pDevice->uBBVGADiffCount == 1) {
1079 // first VGA diff gain
1080 BBvSetVGAGainOffset(pDevice, pDevice->byBBVGANew);
48caf5a0
JP		 1081 pr_debug("First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1082 (int)ldBm,
1083 pDevice->byBBVGANew,
1084 pDevice->byBBVGACurrent,
1085 (int)pDevice->uBBVGADiffCount);
915006cd
JP		 1086 }
1087 if (pDevice->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
48caf5a0
JP		 1088 pr_debug("RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1089 (int)ldBm,
1090 pDevice->byBBVGANew,
1091 pDevice->byBBVGACurrent,
1092 (int)pDevice->uBBVGADiffCount);
915006cd
JP		 1093 BBvSetVGAGainOffset(pDevice, pDevice->byBBVGANew);
1094 }
1095 } else {
1096 pDevice->uBBVGADiffCount = 1;
1097 }
1098 }
1099 }
1100
1101 pDevice->bBeaconSent = false;
bc5cf656 1102 if (pDevice->bEnablePSMode)
915006cd 1103 PSbIsNextTBTTWakeUp((void *)pDevice);
915006cd 1104
e70abceb
MP		 1105 if ((pDevice->op_mode == NL80211_IFTYPE_AP ||
1106 pDevice->op_mode == NL80211_IFTYPE_ADHOC) &&
1107 pDevice->vif->bss_conf.enable_beacon) {
915006cd 1108 MACvOneShotTimer1MicroSec(pDevice->PortOffset,
e70abceb 1109 (pDevice->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
915006cd
JP		 1110 }
1111
4e8a7e5f 1112 /* TODO: adhoc PS mode */
915006cd
JP		 1113
1114 }
1115
1116 if (pDevice->dwIsr & ISR_BNTX) {
a9873673 1117 if (pDevice->op_mode == NL80211_IFTYPE_ADHOC) {
915006cd
JP		 1118 pDevice->bIsBeaconBufReadySet = false;
1119 pDevice->cbBeaconBufReadySetCnt = 0;
1120 }
1121
915006cd 1122 pDevice->bBeaconSent = true;
915006cd
JP		 1123 }
1124
bc5cf656 1125 if (pDevice->dwIsr & ISR_RXDMA0)
915006cd 1126 max_count += device_rx_srv(pDevice, TYPE_RXDMA0);
bc5cf656
GM		 1127
1128 if (pDevice->dwIsr & ISR_RXDMA1)
915006cd 1129 max_count += device_rx_srv(pDevice, TYPE_RXDMA1);
bc5cf656
GM		 1130
1131 if (pDevice->dwIsr & ISR_TXDMA0)
915006cd 1132 max_count += device_tx_srv(pDevice, TYPE_TXDMA0);
bc5cf656
GM		 1133
1134 if (pDevice->dwIsr & ISR_AC0DMA)
915006cd 1135 max_count += device_tx_srv(pDevice, TYPE_AC0DMA);
bc5cf656 1136
915006cd 1137 if (pDevice->dwIsr & ISR_SOFTTIMER1) {
e70abceb
MP		 1138 if (pDevice->vif) {
1139 if (pDevice->vif->bss_conf.enable_beacon)
1140 vnt_beacon_make(pDevice, pDevice->vif);
915006cd 1141 }
915006cd
JP		 1142 }
1143
54fbb2da
MP		 1144 /* If both buffers available wake the queue */
1145 if (pDevice->vif) {
1146 if (AVAIL_TD(pDevice, TYPE_TXDMA0) &&
1147 AVAIL_TD(pDevice, TYPE_AC0DMA) &&
1148 ieee80211_queue_stopped(pDevice->hw, 0))
1149 ieee80211_wake_queues(pDevice->hw);
1150 }
1151
915006cd
JP		 1152 MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
1153
1154 MACvReceive0(pDevice->PortOffset);
1155 MACvReceive1(pDevice->PortOffset);
1156
1157 if (max_count > pDevice->sOpts.int_works)
1158 break;
1159 }
1160
bc5cf656 1161 if (byOrgPageSel == 1)
915006cd 1162 MACvSelectPage1(pDevice->PortOffset);
915006cd 1163
6cff1f6a
MP		 1164 spin_unlock_irqrestore(&pDevice->lock, flags);
1165
915006cd
JP		 1166 MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE);
1167
1168 return IRQ_RETVAL(handled);
5449c685 1169}
915006cd 1170
67013f2c
MP		 1171static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1172{
1173 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1174 PSTxDesc head_td;
1175 u32 dma_idx = TYPE_AC0DMA;
1176 unsigned long flags;
1177
1178 spin_lock_irqsave(&priv->lock, flags);
1179
1180 if (!ieee80211_is_data(hdr->frame_control))
1181 dma_idx = TYPE_TXDMA0;
1182
1183 if (AVAIL_TD(priv, dma_idx) < 1) {
1184 spin_unlock_irqrestore(&priv->lock, flags);
1185 return -ENOMEM;
1186 }
1187
1188 head_td = priv->apCurrTD[dma_idx];
1189
b5745290 1190 head_td->m_td1TD1.byTCR = 0;
67013f2c
MP		 1191
1192 head_td->pTDInfo->skb = skb;
1193
1194 priv->iTDUsed[dma_idx]++;
1195
1196 /* Take ownership */
1197 wmb();
1198 head_td->m_td0TD0.f1Owner = OWNED_BY_NIC;
1199
1200 /* get Next */
1201 wmb();
1202 priv->apCurrTD[dma_idx] = head_td->next;
1203
1204 spin_unlock_irqrestore(&priv->lock, flags);
1205
1206 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1207
1208 if (MACbIsRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_PS))
1209 MACbPSWakeup(priv->PortOffset);
1210
1211 spin_lock_irqsave(&priv->lock, flags);
1212
1213 priv->bPWBitOn = false;
1214
b5745290
MP		 1215 /* Set TSR1 & ReqCount in TxDescHead */
1216 head_td->m_td1TD1.byTCR |= (TCR_STP | TCR_EDP | EDMSDU);
1217 head_td->m_td1TD1.wReqCount =
1218 cpu_to_le16((u16)head_td->pTDInfo->dwReqCount);
1219
67013f2c
MP		 1220 head_td->pTDInfo->byFlags = TD_FLAGS_NETIF_SKB;
1221
1222 if (dma_idx == TYPE_AC0DMA)
1223 MACvTransmitAC0(priv->PortOffset);
1224 else
1225 MACvTransmit0(priv->PortOffset);
1226
1227 spin_unlock_irqrestore(&priv->lock, flags);
1228
1229 return 0;
1230}
1231
1232static void vnt_tx_80211(struct ieee80211_hw *hw,
1233 struct ieee80211_tx_control *control,
1234 struct sk_buff *skb)
1235{
1236 struct vnt_private *priv = hw->priv;
1237
1238 ieee80211_stop_queues(hw);
1239
1240 if (vnt_tx_packet(priv, skb)) {
1241 ieee80211_free_txskb(hw, skb);
1242
1243 ieee80211_wake_queues(hw);
1244 }
1245}
1246
1247static int vnt_start(struct ieee80211_hw *hw)
1248{
1249 struct vnt_private *priv = hw->priv;
1250 int ret;
1251
1252 priv->rx_buf_sz = PKT_BUF_SZ;
1253 if (!device_init_rings(priv))
1254 return -ENOMEM;
1255
1256 ret = request_irq(priv->pcid->irq, &device_intr,
1257 IRQF_SHARED, "vt6655", priv);
1258 if (ret) {
1259 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1260 return ret;
1261 }
1262
1263 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1264 device_init_rd0_ring(priv);
1265 device_init_rd1_ring(priv);
67013f2c
MP		 1266 device_init_td0_ring(priv);
1267 device_init_td1_ring(priv);
1268
1269 device_init_registers(priv);
1270
1271 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1272 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1273
1274 ieee80211_wake_queues(hw);
1275
1276 return 0;
1277}
1278
1279static void vnt_stop(struct ieee80211_hw *hw)
1280{
1281 struct vnt_private *priv = hw->priv;
1282
1283 ieee80211_stop_queues(hw);
1284
1285 MACbShutdown(priv->PortOffset);
1286 MACbSoftwareReset(priv->PortOffset);
1287 CARDbRadioPowerOff(priv);
1288
1289 device_free_td0_ring(priv);
1290 device_free_td1_ring(priv);
1291 device_free_rd0_ring(priv);
1292 device_free_rd1_ring(priv);
67013f2c
MP		 1293 device_free_rings(priv);
1294
1295 free_irq(priv->pcid->irq, priv);
1296}
1297
1298static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1299{
1300 struct vnt_private *priv = hw->priv;
1301
1302 priv->vif = vif;
1303
1304 switch (vif->type) {
1305 case NL80211_IFTYPE_STATION:
67013f2c
MP		 1306 break;
1307 case NL80211_IFTYPE_ADHOC:
1308 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1309
1310 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1311
1312 break;
1313 case NL80211_IFTYPE_AP:
1314 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1315
1316 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1317
1318 break;
1319 default:
1320 return -EOPNOTSUPP;
1321 }
1322
1323 priv->op_mode = vif->type;
1324
1325 return 0;
1326}
1327
1328static void vnt_remove_interface(struct ieee80211_hw *hw,
1329 struct ieee80211_vif *vif)
1330{
1331 struct vnt_private *priv = hw->priv;
1332
1333 switch (vif->type) {
1334 case NL80211_IFTYPE_STATION:
67013f2c
MP		 1335 break;
1336 case NL80211_IFTYPE_ADHOC:
1337 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1338 MACvRegBitsOff(priv->PortOffset,
1339 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1340 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1341 break;
1342 case NL80211_IFTYPE_AP:
1343 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1344 MACvRegBitsOff(priv->PortOffset,
1345 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1346 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1347 break;
1348 default:
1349 break;
1350 }
1351
1352 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1353}
1354
1355
1356static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1357{
1358 struct vnt_private *priv = hw->priv;
1359 struct ieee80211_conf *conf = &hw->conf;
1360 u8 bb_type;
1361
1362 if (changed & IEEE80211_CONF_CHANGE_PS) {
1363 if (conf->flags & IEEE80211_CONF_PS)
1364 PSvEnablePowerSaving(priv, conf->listen_interval);
1365 else
1366 PSvDisablePowerSaving(priv);
1367 }
1368
1369 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1370 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
d7a4cfa8 1371 set_channel(priv, conf->chandef.chan);
67013f2c
MP		 1372
1373 if (conf->chandef.chan->band == IEEE80211_BAND_5GHZ)
1374 bb_type = BB_TYPE_11A;
1375 else
1376 bb_type = BB_TYPE_11G;
1377
1378 if (priv->byBBType != bb_type) {
1379 priv->byBBType = bb_type;
1380
bfb6c863 1381 CARDbSetPhyParameter(priv, priv->byBBType);
67013f2c
MP		 1382 }
1383 }
1384
1385 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1386 if (priv->byBBType == BB_TYPE_11B)
1387 priv->wCurrentRate = RATE_1M;
1388 else
1389 priv->wCurrentRate = RATE_54M;
1390
1391 RFbSetPower(priv, priv->wCurrentRate,
1392 conf->chandef.chan->hw_value);
1393 }
1394
1395 return 0;
1396}
1397
1398static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1399 struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf,
1400 u32 changed)
1401{
1402 struct vnt_private *priv = hw->priv;
1403
1404 priv->current_aid = conf->aid;
1405
1406 if (changed & BSS_CHANGED_BSSID)
1407 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1408
1409 if (changed & BSS_CHANGED_BASIC_RATES) {
1410 priv->basic_rates = conf->basic_rates;
1411
1412 CARDvUpdateBasicTopRate(priv);
1413
1414 dev_dbg(&priv->pcid->dev,
1415 "basic rates %x\n", conf->basic_rates);
1416 }
1417
1418 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1419 if (conf->use_short_preamble) {
1420 MACvEnableBarkerPreambleMd(priv->PortOffset);
1421 priv->byPreambleType = true;
1422 } else {
1423 MACvDisableBarkerPreambleMd(priv->PortOffset);
1424 priv->byPreambleType = false;
1425 }
1426 }
1427
1428 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1429 if (conf->use_cts_prot)
1430 MACvEnableProtectMD(priv->PortOffset);
1431 else
1432 MACvDisableProtectMD(priv->PortOffset);
1433 }
1434
1435 if (changed & BSS_CHANGED_ERP_SLOT) {
1436 if (conf->use_short_slot)
1437 priv->bShortSlotTime = true;
1438 else
1439 priv->bShortSlotTime = false;
1440
bfb6c863 1441 CARDbSetPhyParameter(priv, priv->byBBType);
67013f2c
MP		 1442 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1443 }
1444
1445 if (changed & BSS_CHANGED_TXPOWER)
1446 RFbSetPower(priv, priv->wCurrentRate,
1447 conf->chandef.chan->hw_value);
1448
1449 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1450 dev_dbg(&priv->pcid->dev,
1451 "Beacon enable %d\n", conf->enable_beacon);
1452
1453 if (conf->enable_beacon) {
1454 vnt_beacon_enable(priv, vif, conf);
1455
84c00afe
MK		 1456 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1457 TCR_AUTOBCNTX);
67013f2c 1458 } else {
84c00afe
MK		 1459 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1460 TCR_AUTOBCNTX);
67013f2c
MP		 1461 }
1462 }
1463
1464 if (changed & BSS_CHANGED_ASSOC && priv->op_mode != NL80211_IFTYPE_AP) {
1465 if (conf->assoc) {
1466 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1467 conf->sync_device_ts, conf->sync_tsf);
1468
1469 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1470
738487ff 1471 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
c7b14ea0
MP		 1472 } else {
1473 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1474 TFTCTL_TSFCNTRST);
1475 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1476 TFTCTL_TSFCNTREN);
67013f2c
MP		 1477 }
1478 }
1479}
1480
1481static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1482 struct netdev_hw_addr_list *mc_list)
1483{
1484 struct vnt_private *priv = hw->priv;
1485 struct netdev_hw_addr *ha;
1486 u64 mc_filter = 0;
1487 u32 bit_nr = 0;
1488
1489 netdev_hw_addr_list_for_each(ha, mc_list) {
1490 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1491
1492 mc_filter |= 1ULL << (bit_nr & 0x3f);
1493 }
1494
1495 priv->mc_list_count = mc_list->count;
1496
1497 return mc_filter;
1498}
1499
1500static void vnt_configure(struct ieee80211_hw *hw,
1501 unsigned int changed_flags, unsigned int *total_flags, u64 multicast)
1502{
1503 struct vnt_private *priv = hw->priv;
1504 u8 rx_mode = 0;
1505
1506 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_PROMISC_IN_BSS |
1507 FIF_BCN_PRBRESP_PROMISC;
1508
1509 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1510
1511 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1512
1513 if (changed_flags & FIF_PROMISC_IN_BSS) {
1514 /* unconditionally log net taps */
1515 if (*total_flags & FIF_PROMISC_IN_BSS)
1516 rx_mode |= RCR_UNICAST;
1517 else
1518 rx_mode &= ~RCR_UNICAST;
1519 }
1520
1521 if (changed_flags & FIF_ALLMULTI) {
1522 if (*total_flags & FIF_ALLMULTI) {
95775d12
MP		 1523 unsigned long flags;
1524
1525 spin_lock_irqsave(&priv->lock, flags);
1526
67013f2c
MP		 1527 if (priv->mc_list_count > 2) {
1528 MACvSelectPage1(priv->PortOffset);
1529
1530 VNSvOutPortD(priv->PortOffset +
1531 MAC_REG_MAR0, 0xffffffff);
1532 VNSvOutPortD(priv->PortOffset +
1533 MAC_REG_MAR0 + 4, 0xffffffff);
1534
1535 MACvSelectPage0(priv->PortOffset);
1536 } else {
1537 MACvSelectPage1(priv->PortOffset);
1538
1539 VNSvOutPortD(priv->PortOffset +
1540 MAC_REG_MAR0, (u32)multicast);
1541 VNSvOutPortD(priv->PortOffset +
1542 MAC_REG_MAR0 + 4,
1543 (u32)(multicast >> 32));
1544
1545 MACvSelectPage0(priv->PortOffset);
1546 }
1547
95775d12
MP		 1548 spin_unlock_irqrestore(&priv->lock, flags);
1549
67013f2c
MP		 1550 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1551 } else {
1552 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1553 }
1554 }
1555
1556 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1557 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1558
1559 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1560 rx_mode &= ~RCR_BSSID;
1561 else
1562 rx_mode |= RCR_BSSID;
1563 }
1564
1565 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1566
1567 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1568}
1569
1570static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1571 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1572 struct ieee80211_key_conf *key)
1573{
1574 struct vnt_private *priv = hw->priv;
1575
1576 switch (cmd) {
1577 case SET_KEY:
1578 if (vnt_set_keys(hw, sta, vif, key))
1579 return -EOPNOTSUPP;
1580 break;
1581 case DISABLE_KEY:
1582 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1583 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1584 default:
1585 break;
1586 }
1587
1588 return 0;
1589}
1590
1591static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1592{
1593 struct vnt_private *priv = hw->priv;
1594 u64 tsf;
1595
738487ff 1596 CARDbGetCurrentTSF(priv, &tsf);
67013f2c
MP		 1597
1598 return tsf;
1599}
1600
1601static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1602 u64 tsf)
1603{
1604 struct vnt_private *priv = hw->priv;
1605
738487ff 1606 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
67013f2c
MP		 1607}
1608
1609static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1610{
1611 struct vnt_private *priv = hw->priv;
1612
1613 /* reset TSF counter */
1614 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1615}
1616
1617static const struct ieee80211_ops vnt_mac_ops = {
1618 .tx = vnt_tx_80211,
1619 .start = vnt_start,
1620 .stop = vnt_stop,
1621 .add_interface = vnt_add_interface,
1622 .remove_interface = vnt_remove_interface,
1623 .config = vnt_config,
1624 .bss_info_changed = vnt_bss_info_changed,
1625 .prepare_multicast = vnt_prepare_multicast,
1626 .configure_filter = vnt_configure,
1627 .set_key = vnt_set_key,
1628 .get_tsf = vnt_get_tsf,
1629 .set_tsf = vnt_set_tsf,
1630 .reset_tsf = vnt_reset_tsf,
1631};
1632
b7c9cd45 1633static int vnt_init(struct vnt_private *priv)
67013f2c
MP		 1634{
1635 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1636
3d75b9e2
MP		 1637 vnt_init_bands(priv);
1638
67013f2c
MP		 1639 if (ieee80211_register_hw(priv->hw))
1640 return -ENODEV;
1641
1642 priv->mac_hw = true;
1643
1644 CARDbRadioPowerOff(priv);
1645
1646 return 0;
1647}
1648
1649static int
1650vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1651{
1652 PCHIP_INFO pChip_info = (PCHIP_INFO)ent->driver_data;
1653 struct vnt_private *priv;
1654 struct ieee80211_hw *hw;
1655 struct wiphy *wiphy;
1656 int rc;
1657
1658 dev_notice(&pcid->dev,
1659 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1660
1661 dev_notice(&pcid->dev,
1662 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1663
1664 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1665 if (!hw) {
1666 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1667 return -ENOMEM;
1668 }
1669
1670 priv = hw->priv;
1671
1672 vt6655_init_info(pcid, &priv, pChip_info);
1673
1674 priv->hw = hw;
1675
1676 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1677
1678 if (pci_enable_device(pcid)) {
1679 device_free_info(priv);
1680 return -ENODEV;
1681 }
1682
1683 dev_dbg(&pcid->dev,
1684 "Before get pci_info memaddr is %x\n", priv->memaddr);
1685
1686 if (!device_get_pci_info(priv, pcid)) {
1687 dev_err(&pcid->dev, ": Failed to find PCI device.\n");
1688 device_free_info(priv);
1689 return -ENODEV;
1690 }
1691
1692#ifdef DEBUG
1693 dev_dbg(&pcid->dev,
1694 "after get pci_info memaddr is %x, io addr is %x,io_size is %d\n",
1695 priv->memaddr, priv->ioaddr, priv->io_size);
1696 {
1697 int i;
1698 u32 bar, len;
1699 u32 address[] = {
1700 PCI_BASE_ADDRESS_0,
1701 PCI_BASE_ADDRESS_1,
1702 PCI_BASE_ADDRESS_2,
1703 PCI_BASE_ADDRESS_3,
1704 PCI_BASE_ADDRESS_4,
1705 PCI_BASE_ADDRESS_5,
1706 0};
1707 for (i = 0; address[i]; i++) {
1708 pci_read_config_dword(pcid, address[i], &bar);
1709
1710 dev_dbg(&pcid->dev, "bar %d is %x\n", i, bar);
1711
1712 if (!bar) {
1713 dev_dbg(&pcid->dev,
1714 "bar %d not implemented\n", i);
1715 continue;
1716 }
1717
1718 if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
1719 /* This is IO */
1720
1721 len = bar & (PCI_BASE_ADDRESS_IO_MASK & 0xffff);
1722 len = len & ~(len - 1);
1723
1724 dev_dbg(&pcid->dev,
1725 "IO space: len in IO %x, BAR %d\n",
1726 len, i);
1727 } else {
1728 len = bar & 0xfffffff0;
1729 len = ~len + 1;
1730
1731 dev_dbg(&pcid->dev,
1732 "len in MEM %x, BAR %d\n", len, i);
1733 }
1734 }
1735 }
1736#endif
1737
1738 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1739 priv->io_size);
1740 if (!priv->PortOffset) {
1741 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1742 device_free_info(priv);
1743 return -ENODEV;
1744 }
1745
1746 rc = pci_request_regions(pcid, DEVICE_NAME);
1747 if (rc) {
1748 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1749 device_free_info(priv);
1750 return -ENODEV;
1751 }
1752
1753 /* do reset */
1754 if (!MACbSoftwareReset(priv->PortOffset)) {
1755 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1756 device_free_info(priv);
1757 return -ENODEV;
1758 }
1759 /* initial to reload eeprom */
1760 MACvInitialize(priv->PortOffset);
1761 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1762
1763 device_get_options(priv);
1764 device_set_options(priv);
1765 /* Mask out the options cannot be set to the chip */
1766 priv->sOpts.flags &= pChip_info->flags;
1767
1768 /* Enable the chip specified capabilities */
1769 priv->flags = priv->sOpts.flags | (pChip_info->flags & 0xff000000UL);
67013f2c
MP		 1770
1771 wiphy = priv->hw->wiphy;
1772
1773 wiphy->frag_threshold = FRAG_THRESH_DEF;
1774 wiphy->rts_threshold = RTS_THRESH_DEF;
1775 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1776 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1777
1778 priv->hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1779 IEEE80211_HW_REPORTS_TX_ACK_STATUS |
1780 IEEE80211_HW_SIGNAL_DBM |
1781 IEEE80211_HW_TIMING_BEACON_ONLY;
1782
1783 priv->hw->max_signal = 100;
1784
1785 if (vnt_init(priv))
1786 return -ENODEV;
1787
1788 device_print_info(priv);
1789 pci_set_drvdata(pcid, priv);
1790
1791 return 0;
1792}
1793
5449c685 1794/*------------------------------------------------------------------*/
5449c685 1795
000fe0f5
MP		 1796#ifdef CONFIG_PM
1797static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1798{
1799 struct vnt_private *priv = pci_get_drvdata(pcid);
1800 unsigned long flags;
1801
1802 spin_lock_irqsave(&priv->lock, flags);
1803
1804 pci_save_state(pcid);
1805
1806 MACbShutdown(priv->PortOffset);
1807
1808 pci_disable_device(pcid);
1809 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1810
1811 spin_unlock_irqrestore(&priv->lock, flags);
1812
1813 return 0;
1814}
1815
1816static int vt6655_resume(struct pci_dev *pcid)
1817{
1818
1819 pci_set_power_state(pcid, PCI_D0);
1820 pci_enable_wake(pcid, PCI_D0, 0);
1821 pci_restore_state(pcid);
1822
1823 return 0;
1824}
1825#endif
1826
013a468c 1827MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
5449c685
FB		 1828
1829static struct pci_driver device_driver = {
34381c22
PH		 1830 .name = DEVICE_NAME,
1831 .id_table = vt6655_pci_id_table,
1832 .probe = vt6655_probe,
1833 .remove = vt6655_remove,
5449c685 1834#ifdef CONFIG_PM
000fe0f5
MP		 1835 .suspend = vt6655_suspend,
1836 .resume = vt6655_resume,
5449c685 1837#endif
5449c685
FB		 1838};
1839
013a468c 1840static int __init vt6655_init_module(void)
5449c685 1841{
915006cd 1842 int ret;
5449c685 1843
5449c685 1844 ret = pci_register_driver(&device_driver);
5449c685 1845#ifdef CONFIG_PM
915006cd
JP		 1846 if (ret >= 0)
1847 register_reboot_notifier(&device_notifier);
5449c685
FB		 1848#endif
1849
915006cd 1850 return ret;
5449c685
FB		 1851}
1852
013a468c 1853static void __exit vt6655_cleanup_module(void)
5449c685 1854{
5449c685 1855#ifdef CONFIG_PM
915006cd 1856 unregister_reboot_notifier(&device_notifier);
5449c685 1857#endif
915006cd 1858 pci_unregister_driver(&device_driver);
5449c685
FB		 1859}
1860
013a468c
CC		 1861module_init(vt6655_init_module);
1862module_exit(vt6655_cleanup_module);
5449c685 1863
5449c685
FB		 1864#ifdef CONFIG_PM
1865static int
1866device_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
1867{
915006cd 1868 struct pci_dev *pdev = NULL;
6b711271 1869
915006cd
JP		 1870 switch (event) {
1871 case SYS_DOWN:
1872 case SYS_HALT:
1873 case SYS_POWER_OFF:
1874 for_each_pci_dev(pdev) {
1875 if (pci_dev_driver(pdev) == &device_driver) {
1876 if (pci_get_drvdata(pdev))
000fe0f5 1877 vt6655_suspend(pdev, PMSG_HIBERNATE);
915006cd
JP		 1878 }
1879 }
1880 }
1881 return NOTIFY_DONE;
5449c685 1882}
5449c685 1883#endif
Linux 6.x block layer and io_uring tree(s)