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staging: vt6655: remove mib.c/h dead code.
[linux-2.6-block.git] / drivers / staging / vt6655 / device_main.c
CommitLineData
5449c685
FB		 1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: device_main.c
20 *
21 * Purpose: driver entry for initial, open, close, tx and rx.
22 *
23 * Author: Lyndon Chen
24 *
25 * Date: Jan 8, 2003
26 *
27 * Functions:
28 *
013a468c
CC		 29 * vt6655_probe - module initial (insmod) driver entry
30 * vt6655_remove - module remove entry
31 * vt6655_init_info - device structure resource allocation function
5449c685
FB		 32 * device_free_info - device structure resource free function
33 * device_get_pci_info - get allocated pci io/mem resource
34 * device_print_info - print out resource
5449c685 35 * device_intr - interrupt handle function
5449c685 36 * device_rx_srv - rx service function
5449c685 37 * device_alloc_rx_buf - rx buffer pre-allocated function
5449c685 38 * device_free_tx_buf - free tx buffer function
5449c685
FB		 39 * device_init_rd0_ring- initial rd dma0 ring
40 * device_init_rd1_ring- initial rd dma1 ring
41 * device_init_td0_ring- initial tx dma0 ring buffer
42 * device_init_td1_ring- initial tx dma1 ring buffer
43 * device_init_registers- initial MAC & BBP & RF internal registers.
44 * device_init_rings- initial tx/rx ring buffer
5449c685
FB		 45 * device_free_rings- free all allocated ring buffer
46 * device_tx_srv- tx interrupt service function
47 *
48 * Revision History:
49 */
50#undef __NO_VERSION__
51
f805442e 52#include <linux/file.h>
5449c685 53#include "device.h"
5449c685 54#include "card.h"
79566eb2 55#include "channel.h"
5449c685 56#include "baseband.h"
5449c685 57#include "mac.h"
5449c685 58#include "power.h"
5449c685 59#include "rxtx.h"
5449c685 60#include "dpc.h"
5449c685 61#include "rf.h"
5449c685
FB		 62#include <linux/delay.h>
63#include <linux/kthread.h>
5a0e3ad6 64#include <linux/slab.h>
5449c685 65
5449c685 66/*--------------------- Static Definitions -------------------------*/
bb72dd53
AS		 67/*
68 * Define module options
69 */
5449c685
FB		 70MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
71MODULE_LICENSE("GPL");
72MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
5449c685 73
915006cd 74#define DEVICE_PARAM(N, D)
5449c685
FB		 75
76#define RX_DESC_MIN0 16
77#define RX_DESC_MAX0 128
78#define RX_DESC_DEF0 32
915006cd 79DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
5449c685
FB		 80
81#define RX_DESC_MIN1 16
82#define RX_DESC_MAX1 128
83#define RX_DESC_DEF1 32
915006cd 84DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
5449c685
FB		 85
86#define TX_DESC_MIN0 16
87#define TX_DESC_MAX0 128
88#define TX_DESC_DEF0 32
915006cd 89DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
5449c685
FB		 90
91#define TX_DESC_MIN1 16
92#define TX_DESC_MAX1 128
93#define TX_DESC_DEF1 64
915006cd 94DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
5449c685 95
5449c685
FB		 96#define INT_WORKS_DEF 20
97#define INT_WORKS_MIN 10
98#define INT_WORKS_MAX 64
99
915006cd 100DEVICE_PARAM(int_works, "Number of packets per interrupt services");
5449c685 101
5449c685
FB		 102#define RTS_THRESH_DEF 2347
103
5449c685
FB		 104#define FRAG_THRESH_DEF 2346
105
5449c685
FB		 106#define SHORT_RETRY_MIN 0
107#define SHORT_RETRY_MAX 31
108#define SHORT_RETRY_DEF 8
109
5449c685
FB		 110DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
111
112#define LONG_RETRY_MIN 0
113#define LONG_RETRY_MAX 15
114#define LONG_RETRY_DEF 4
115
5449c685
FB		 116DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
117
5449c685
FB		 118/* BasebandType[] baseband type selected
119 0: indicate 802.11a type
120 1: indicate 802.11b type
121 2: indicate 802.11g type
122*/
123#define BBP_TYPE_MIN 0
124#define BBP_TYPE_MAX 2
125#define BBP_TYPE_DEF 2
126
127DEVICE_PARAM(BasebandType, "baseband type");
128
bb72dd53
AS		 129/*
130 * Static vars definitions
131 */
915006cd
JP		 132static CHIP_INFO chip_info_table[] = {
133 { VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ",
134 256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN },
135 {0, NULL}
5449c685
FB		 136};
137
9e4c5c28 138static const struct pci_device_id vt6655_pci_id_table[] = {
db6cb903
JL		 139 { PCI_VDEVICE(VIA, 0x3253), (kernel_ulong_t)chip_info_table},
140 { 0, }
5449c685 141};
5449c685
FB		 142
143/*--------------------- Static Functions --------------------------*/
144
013a468c 145static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
3f8597f4
MP		 146static void vt6655_init_info(struct pci_dev *pcid,
147 struct vnt_private **ppDevice, PCHIP_INFO);
148static void device_free_info(struct vnt_private *pDevice);
149static bool device_get_pci_info(struct vnt_private *, struct pci_dev *pcid);
150static void device_print_info(struct vnt_private *pDevice);
915006cd 151static irqreturn_t device_intr(int irq, void *dev_instance);
5449c685 152
5449c685
FB		 153#ifdef CONFIG_PM
154static int device_notify_reboot(struct notifier_block *, unsigned long event, void *ptr);
9e4c5c28 155static struct notifier_block device_notifier = {
34381c22
PH		 156 .notifier_call = device_notify_reboot,
157 .next = NULL,
158 .priority = 0,
5449c685
FB		 159};
160#endif
5449c685 161
3f8597f4
MP		 162static void device_init_rd0_ring(struct vnt_private *pDevice);
163static void device_init_rd1_ring(struct vnt_private *pDevice);
3f8597f4
MP		 164static void device_init_td0_ring(struct vnt_private *pDevice);
165static void device_init_td1_ring(struct vnt_private *pDevice);
5449c685 166
3f8597f4
MP		 167static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx);
168static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx);
169static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pDesc);
170static void device_init_registers(struct vnt_private *pDevice);
171static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc);
172static void device_free_td0_ring(struct vnt_private *pDevice);
173static void device_free_td1_ring(struct vnt_private *pDevice);
174static void device_free_rd0_ring(struct vnt_private *pDevice);
175static void device_free_rd1_ring(struct vnt_private *pDevice);
176static void device_free_rings(struct vnt_private *pDevice);
5449c685 177
5449c685
FB		 178/*--------------------- Export Variables --------------------------*/
179
180/*--------------------- Export Functions --------------------------*/
181
915006cd 182static char *get_chip_name(int chip_id)
3ac9e0fd
DN		 183{
184 int i;
6b711271 185
3ac9e0fd
DN		 186 for (i = 0; chip_info_table[i].name != NULL; i++)
187 if (chip_info_table[i].chip_id == chip_id)
188 break;
189 return chip_info_table[i].name;
5449c685
FB		 190}
191
f4e1b7c8 192static void vt6655_remove(struct pci_dev *pcid)
5449c685 193{
3f8597f4 194 struct vnt_private *pDevice = pci_get_drvdata(pcid);
5449c685 195
3ac9e0fd
DN		 196 if (pDevice == NULL)
197 return;
198 device_free_info(pDevice);
5449c685
FB		 199}
200
46fa0ec0 201static void device_get_options(struct vnt_private *pDevice)
bf76ebd9
DN		 202{
203 POPTIONS pOpts = &(pDevice->sOpts);
204
205 pOpts->nRxDescs0 = RX_DESC_DEF0;
206 pOpts->nRxDescs1 = RX_DESC_DEF1;
207 pOpts->nTxDescs[0] = TX_DESC_DEF0;
208 pOpts->nTxDescs[1] = TX_DESC_DEF1;
bf76ebd9 209 pOpts->int_works = INT_WORKS_DEF;
bf76ebd9 210
bf76ebd9
DN		 211 pOpts->short_retry = SHORT_RETRY_DEF;
212 pOpts->long_retry = LONG_RETRY_DEF;
213 pOpts->bbp_type = BBP_TYPE_DEF;
5449c685
FB		 214}
215
216static void
3f8597f4
MP		 217device_set_options(struct vnt_private *pDevice)
218{
915006cd
JP		 219 pDevice->byShortRetryLimit = pDevice->sOpts.short_retry;
220 pDevice->byLongRetryLimit = pDevice->sOpts.long_retry;
915006cd 221 pDevice->byBBType = pDevice->sOpts.bbp_type;
bf8918de 222 pDevice->byPacketType = pDevice->byBBType;
5449c685 223 pDevice->byAutoFBCtrl = AUTO_FB_0;
915006cd 224 pDevice->bUpdateBBVGA = true;
915006cd
JP		 225 pDevice->byPreambleType = 0;
226
48caf5a0
JP		 227 pr_debug(" byShortRetryLimit= %d\n", (int)pDevice->byShortRetryLimit);
228 pr_debug(" byLongRetryLimit= %d\n", (int)pDevice->byLongRetryLimit);
229 pr_debug(" byPreambleType= %d\n", (int)pDevice->byPreambleType);
230 pr_debug(" byShortPreamble= %d\n", (int)pDevice->byShortPreamble);
48caf5a0 231 pr_debug(" byBBType= %d\n", (int)pDevice->byBBType);
5449c685
FB		 232}
233
bb72dd53
AS		 234/*
235 * Initialisation of MAC & BBP registers
236 */
5449c685 237
3f8597f4 238static void device_init_registers(struct vnt_private *pDevice)
5449c685 239{
10d6f1b7 240 unsigned long flags;
915006cd
JP		 241 unsigned int ii;
242 unsigned char byValue;
915006cd
JP		 243 unsigned char byCCKPwrdBm = 0;
244 unsigned char byOFDMPwrdBm = 0;
6b711271 245
915006cd 246 MACbShutdown(pDevice->PortOffset);
a5f0eef3 247 BBvSoftwareReset(pDevice);
915006cd 248
9f34de35
MP		 249 /* Do MACbSoftwareReset in MACvInitialize */
250 MACbSoftwareReset(pDevice->PortOffset);
915006cd 251
9f34de35 252 pDevice->bAES = false;
915006cd 253
9f34de35
MP		 254 /* Only used in 11g type, sync with ERP IE */
255 pDevice->bProtectMode = false;
915006cd 256
9f34de35
MP		 257 pDevice->bNonERPPresent = false;
258 pDevice->bBarkerPreambleMd = false;
259 pDevice->wCurrentRate = RATE_1M;
260 pDevice->byTopOFDMBasicRate = RATE_24M;
261 pDevice->byTopCCKBasicRate = RATE_1M;
915006cd 262
9f34de35
MP		 263 /* Target to IF pin while programming to RF chip. */
264 pDevice->byRevId = 0;
915006cd 265
9f34de35
MP		 266 /* init MAC */
267 MACvInitialize(pDevice->PortOffset);
268
269 /* Get Local ID */
270 VNSvInPortB(pDevice->PortOffset + MAC_REG_LOCALID, &pDevice->byLocalID);
915006cd 271
10d6f1b7 272 spin_lock_irqsave(&pDevice->lock, flags);
915006cd 273
9f34de35 274 SROMvReadAllContents(pDevice->PortOffset, pDevice->abyEEPROM);
915006cd 275
10d6f1b7 276 spin_unlock_irqrestore(&pDevice->lock, flags);
915006cd 277
9f34de35
MP		 278 /* Get Channel range */
279 pDevice->byMinChannel = 1;
280 pDevice->byMaxChannel = CB_MAX_CHANNEL;
915006cd 281
9f34de35
MP		 282 /* Get Antena */
283 byValue = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_ANTENNA);
284 if (byValue & EEP_ANTINV)
285 pDevice->bTxRxAntInv = true;
286 else
287 pDevice->bTxRxAntInv = false;
288
289 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
290 /* if not set default is All */
291 if (byValue == 0)
292 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
293
9f34de35
MP		 294 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
295 pDevice->byAntennaCount = 2;
296 pDevice->byTxAntennaMode = ANT_B;
297 pDevice->dwTxAntennaSel = 1;
298 pDevice->dwRxAntennaSel = 1;
299
300 if (pDevice->bTxRxAntInv)
301 pDevice->byRxAntennaMode = ANT_A;
915006cd 302 else
9f34de35 303 pDevice->byRxAntennaMode = ANT_B;
9f34de35 304 } else {
9f34de35
MP		 305 pDevice->byAntennaCount = 1;
306 pDevice->dwTxAntennaSel = 0;
307 pDevice->dwRxAntennaSel = 0;
915006cd 308
9f34de35
MP		 309 if (byValue & EEP_ANTENNA_AUX) {
310 pDevice->byTxAntennaMode = ANT_A;
915006cd 311
9f34de35
MP		 312 if (pDevice->bTxRxAntInv)
313 pDevice->byRxAntennaMode = ANT_B;
314 else
315 pDevice->byRxAntennaMode = ANT_A;
316 } else {
915006cd 317 pDevice->byTxAntennaMode = ANT_B;
9f34de35 318
1208f14a 319 if (pDevice->bTxRxAntInv)
915006cd
JP		 320 pDevice->byRxAntennaMode = ANT_A;
321 else
322 pDevice->byRxAntennaMode = ANT_B;
915006cd 323 }
9f34de35 324 }
5449c685 325
918185f6
MP		 326 /* Set initial antenna mode */
327 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
328 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
329
9f34de35
MP		 330 /* zonetype initial */
331 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
915006cd 332
9f34de35
MP		 333 if (!pDevice->bZoneRegExist)
334 pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
bc5cf656 335
48caf5a0 336 pr_debug("pDevice->byZoneType = %x\n", pDevice->byZoneType);
915006cd 337
9f34de35
MP		 338 /* Init RF module */
339 RFbInit(pDevice);
915006cd 340
9f34de35
MP		 341 /* Get Desire Power Value */
342 pDevice->byCurPwr = 0xFF;
343 pDevice->byCCKPwr = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_CCK);
344 pDevice->byOFDMPwrG = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_OFDMG);
f2046f93 345
9f34de35
MP		 346 /* Load power Table */
347 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
348 pDevice->abyCCKPwrTbl[ii + 1] =
349 SROMbyReadEmbedded(pDevice->PortOffset,
350 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
351 if (pDevice->abyCCKPwrTbl[ii + 1] == 0)
352 pDevice->abyCCKPwrTbl[ii+1] = pDevice->byCCKPwr;
5449c685 353
9f34de35
MP		 354 pDevice->abyOFDMPwrTbl[ii + 1] =
355 SROMbyReadEmbedded(pDevice->PortOffset,
356 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
357 if (pDevice->abyOFDMPwrTbl[ii + 1] == 0)
358 pDevice->abyOFDMPwrTbl[ii + 1] = pDevice->byOFDMPwrG;
bc5cf656 359
9f34de35
MP		 360 pDevice->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
361 pDevice->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
362 }
bc5cf656 363
9f34de35 364 /* recover 12,13 ,14channel for EUROPE by 11 channel */
f4cf678f
MP		 365 for (ii = 11; ii < 14; ii++) {
366 pDevice->abyCCKPwrTbl[ii] = pDevice->abyCCKPwrTbl[10];
367 pDevice->abyOFDMPwrTbl[ii] = pDevice->abyOFDMPwrTbl[10];
9f34de35 368 }
5449c685 369
9f34de35
MP		 370 /* Load OFDM A Power Table */
371 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
372 pDevice->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
373 SROMbyReadEmbedded(pDevice->PortOffset,
374 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
5449c685 375
9f34de35
MP		 376 pDevice->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
377 SROMbyReadEmbedded(pDevice->PortOffset,
378 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
379 }
5449c685 380
9f34de35
MP		 381 if (pDevice->byLocalID > REV_ID_VT3253_B1) {
382 MACvSelectPage1(pDevice->PortOffset);
5449c685 383
9f34de35
MP		 384 VNSvOutPortB(pDevice->PortOffset + MAC_REG_MSRCTL + 1,
385 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
5449c685 386
9f34de35
MP		 387 MACvSelectPage0(pDevice->PortOffset);
388 }
5449c685 389
9f34de35
MP		 390 /* use relative tx timeout and 802.11i D4 */
391 MACvWordRegBitsOn(pDevice->PortOffset,
392 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
5449c685 393
9f34de35
MP		 394 /* set performance parameter by registry */
395 MACvSetShortRetryLimit(pDevice->PortOffset, pDevice->byShortRetryLimit);
396 MACvSetLongRetryLimit(pDevice->PortOffset, pDevice->byLongRetryLimit);
5449c685 397
9f34de35
MP		 398 /* reset TSF counter */
399 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
400 /* enable TSF counter */
401 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
5449c685 402
9f34de35
MP		 403 /* initialize BBP registers */
404 BBbVT3253Init(pDevice);
5449c685 405
9f34de35
MP		 406 if (pDevice->bUpdateBBVGA) {
407 pDevice->byBBVGACurrent = pDevice->abyBBVGA[0];
408 pDevice->byBBVGANew = pDevice->byBBVGACurrent;
409 BBvSetVGAGainOffset(pDevice, pDevice->abyBBVGA[0]);
410 }
5449c685 411
a5f0eef3
MP		 412 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
413 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
5449c685 414
9f34de35
MP		 415 /* Set BB and packet type at the same time. */
416 /* Set Short Slot Time, xIFS, and RSPINF. */
bfa4b0fe 417 pDevice->wCurrentRate = RATE_54M;
bc5cf656 418
9f34de35 419 pDevice->bRadioOff = false;
5449c685 420
9f34de35
MP		 421 pDevice->byRadioCtl = SROMbyReadEmbedded(pDevice->PortOffset,
422 EEP_OFS_RADIOCTL);
423 pDevice->bHWRadioOff = false;
5449c685 424
9f34de35
MP		 425 if (pDevice->byRadioCtl & EEP_RADIOCTL_ENABLE) {
426 /* Get GPIO */
427 MACvGPIOIn(pDevice->PortOffset, &pDevice->byGPIO);
428
429 if (((pDevice->byGPIO & GPIO0_DATA) &&
430 !(pDevice->byRadioCtl & EEP_RADIOCTL_INV)) ||
431 (!(pDevice->byGPIO & GPIO0_DATA) &&
432 (pDevice->byRadioCtl & EEP_RADIOCTL_INV)))
915006cd 433 pDevice->bHWRadioOff = true;
915006cd 434 }
9f34de35 435
bc5cf656 436 if (pDevice->bHWRadioOff || pDevice->bRadioControlOff)
915006cd 437 CARDbRadioPowerOff(pDevice);
5449c685 438
3500a1da
MP		 439 /* get Permanent network address */
440 SROMvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr);
48caf5a0 441 pr_debug("Network address = %pM\n", pDevice->abyCurrentNetAddr);
915006cd 442
3500a1da
MP		 443 /* reset Tx pointer */
444 CARDvSafeResetRx(pDevice);
445 /* reset Rx pointer */
446 CARDvSafeResetTx(pDevice);
5449c685 447
3500a1da
MP		 448 if (pDevice->byLocalID <= REV_ID_VT3253_A1)
449 MACvRegBitsOn(pDevice->PortOffset, MAC_REG_RCR, RCR_WPAERR);
5449c685 450
3500a1da
MP		 451 /* Turn On Rx DMA */
452 MACvReceive0(pDevice->PortOffset);
453 MACvReceive1(pDevice->PortOffset);
5449c685 454
3500a1da
MP		 455 /* start the adapter */
456 MACvStart(pDevice->PortOffset);
5449c685
FB		 457}
458
3f8597f4 459static void device_print_info(struct vnt_private *pDevice)
5449c685 460{
bc5d431c 461 dev_info(&pDevice->pcid->dev, "%s\n", get_chip_name(pDevice->chip_id));
5449c685 462
bc5d431c
MP		 463 dev_info(&pDevice->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
464 pDevice->abyCurrentNetAddr, (unsigned long)pDevice->ioaddr,
465 (unsigned long)pDevice->PortOffset, pDevice->pcid->irq);
5449c685
FB		 466}
467
3f8597f4
MP		 468static void vt6655_init_info(struct pci_dev *pcid,
469 struct vnt_private **ppDevice,
470 PCHIP_INFO pChip_info)
471{
1bd63757 472 memset(*ppDevice, 0, sizeof(**ppDevice));
5449c685 473
915006cd
JP		 474 (*ppDevice)->pcid = pcid;
475 (*ppDevice)->chip_id = pChip_info->chip_id;
476 (*ppDevice)->io_size = pChip_info->io_size;
477 (*ppDevice)->nTxQueues = pChip_info->nTxQueue;
478 (*ppDevice)->multicast_limit = 32;
5449c685 479
915006cd 480 spin_lock_init(&((*ppDevice)->lock));
5449c685
FB		 481}
482
3f8597f4
MP		 483static bool device_get_pci_info(struct vnt_private *pDevice,
484 struct pci_dev *pcid)
84b50762 485{
915006cd
JP		 486 u16 pci_cmd;
487 u8 b;
488 unsigned int cis_addr;
5449c685 489
915006cd
JP		 490 pci_read_config_byte(pcid, PCI_REVISION_ID, &pDevice->byRevId);
491 pci_read_config_word(pcid, PCI_SUBSYSTEM_ID, &pDevice->SubSystemID);
492 pci_read_config_word(pcid, PCI_SUBSYSTEM_VENDOR_ID, &pDevice->SubVendorID);
493 pci_read_config_word(pcid, PCI_COMMAND, (u16 *)&(pci_cmd));
5449c685 494
915006cd 495 pci_set_master(pcid);
5449c685 496
915006cd
JP		 497 pDevice->memaddr = pci_resource_start(pcid, 0);
498 pDevice->ioaddr = pci_resource_start(pcid, 1);
5449c685 499
915006cd 500 cis_addr = pci_resource_start(pcid, 2);
5449c685 501
915006cd 502 pDevice->pcid = pcid;
5449c685 503
915006cd
JP		 504 pci_read_config_byte(pcid, PCI_COMMAND, &b);
505 pci_write_config_byte(pcid, PCI_COMMAND, (b|PCI_COMMAND_MASTER));
5449c685 506
915006cd 507 return true;
5449c685
FB		 508}
509
3f8597f4 510static void device_free_info(struct vnt_private *pDevice)
84b50762 511{
14e53006
MP		 512 if (!pDevice)
513 return;
5449c685 514
14e53006
MP		 515 if (pDevice->mac_hw)
516 ieee80211_unregister_hw(pDevice->hw);
5449c685 517
915006cd 518 if (pDevice->PortOffset)
16834405 519 iounmap(pDevice->PortOffset);
5449c685 520
915006cd
JP		 521 if (pDevice->pcid)
522 pci_release_regions(pDevice->pcid);
14e53006
MP		 523
524 if (pDevice->hw)
525 ieee80211_free_hw(pDevice->hw);
5449c685 526}
5449c685 527
3f8597f4 528static bool device_init_rings(struct vnt_private *pDevice)
84b50762 529{
915006cd 530 void *vir_pool;
5449c685 531
915006cd 532 /*allocate all RD/TD rings a single pool*/
a1c6dcda 533 vir_pool = dma_zalloc_coherent(&pDevice->pcid->dev,
8b983be5
JP		 534 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
535 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
536 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
537 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
a1c6dcda 538 &pDevice->pool_dma, GFP_ATOMIC);
915006cd 539 if (vir_pool == NULL) {
42f709ef 540 dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n");
915006cd
JP		 541 return false;
542 }
5449c685 543
915006cd
JP		 544 pDevice->aRD0Ring = vir_pool;
545 pDevice->aRD1Ring = vir_pool +
546 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
547
915006cd
JP		 548 pDevice->rd0_pool_dma = pDevice->pool_dma;
549 pDevice->rd1_pool_dma = pDevice->rd0_pool_dma +
550 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
551
a1c6dcda 552 pDevice->tx0_bufs = dma_zalloc_coherent(&pDevice->pcid->dev,
8b983be5
JP		 553 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
554 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
555 CB_BEACON_BUF_SIZE +
556 CB_MAX_BUF_SIZE,
a1c6dcda
QL		 557 &pDevice->tx_bufs_dma0,
558 GFP_ATOMIC);
915006cd 559 if (pDevice->tx0_bufs == NULL) {
42f709ef
MP		 560 dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n");
561
a1c6dcda 562 dma_free_coherent(&pDevice->pcid->dev,
915006cd
JP		 563 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
564 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
565 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
566 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
567 vir_pool, pDevice->pool_dma
568 );
569 return false;
570 }
5449c685 571
915006cd
JP		 572 pDevice->td0_pool_dma = pDevice->rd1_pool_dma +
573 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
5449c685 574
915006cd
JP		 575 pDevice->td1_pool_dma = pDevice->td0_pool_dma +
576 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
5449c685 577
bb72dd53 578 /* vir_pool: pvoid type */
915006cd
JP		 579 pDevice->apTD0Rings = vir_pool
580 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
581 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
5449c685 582
915006cd
JP		 583 pDevice->apTD1Rings = vir_pool
584 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
585 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc)
586 + pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
5449c685 587
915006cd
JP		 588 pDevice->tx1_bufs = pDevice->tx0_bufs +
589 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
5449c685 590
915006cd
JP		 591 pDevice->tx_beacon_bufs = pDevice->tx1_bufs +
592 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
5449c685 593
915006cd
JP		 594 pDevice->pbyTmpBuff = pDevice->tx_beacon_bufs +
595 CB_BEACON_BUF_SIZE;
5449c685 596
915006cd
JP		 597 pDevice->tx_bufs_dma1 = pDevice->tx_bufs_dma0 +
598 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
5449c685 599
915006cd
JP		 600 pDevice->tx_beacon_dma = pDevice->tx_bufs_dma1 +
601 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
5449c685 602
915006cd 603 return true;
5449c685
FB		 604}
605
3f8597f4 606static void device_free_rings(struct vnt_private *pDevice)
84b50762 607{
a1c6dcda 608 dma_free_coherent(&pDevice->pcid->dev,
915006cd
JP		 609 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
610 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
611 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
612 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc)
613 ,
614 pDevice->aRD0Ring, pDevice->pool_dma
615 );
616
617 if (pDevice->tx0_bufs)
a1c6dcda 618 dma_free_coherent(&pDevice->pcid->dev,
915006cd
JP		 619 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
620 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
621 CB_BEACON_BUF_SIZE +
622 CB_MAX_BUF_SIZE,
623 pDevice->tx0_bufs, pDevice->tx_bufs_dma0
624 );
5449c685
FB		 625}
626
3f8597f4 627static void device_init_rd0_ring(struct vnt_private *pDevice)
84b50762 628{
915006cd
JP		 629 int i;
630 dma_addr_t curr = pDevice->rd0_pool_dma;
631 PSRxDesc pDesc;
632
633 /* Init the RD0 ring entries */
634 for (i = 0; i < pDevice->sOpts.nRxDescs0; i ++, curr += sizeof(SRxDesc)) {
635 pDesc = &(pDevice->aRD0Ring[i]);
636 pDesc->pRDInfo = alloc_rd_info();
637 ASSERT(pDesc->pRDInfo);
42f709ef
MP		 638 if (!device_alloc_rx_buf(pDevice, pDesc))
639 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
640
915006cd
JP		 641 pDesc->next = &(pDevice->aRD0Ring[(i+1) % pDevice->sOpts.nRxDescs0]);
642 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
643 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
644 }
645
646 if (i > 0)
647 pDevice->aRD0Ring[i-1].next_desc = cpu_to_le32(pDevice->rd0_pool_dma);
648 pDevice->pCurrRD[0] = &(pDevice->aRD0Ring[0]);
5449c685
FB		 649}
650
3f8597f4 651static void device_init_rd1_ring(struct vnt_private *pDevice)
84b50762 652{
915006cd
JP		 653 int i;
654 dma_addr_t curr = pDevice->rd1_pool_dma;
655 PSRxDesc pDesc;
656
657 /* Init the RD1 ring entries */
658 for (i = 0; i < pDevice->sOpts.nRxDescs1; i ++, curr += sizeof(SRxDesc)) {
659 pDesc = &(pDevice->aRD1Ring[i]);
660 pDesc->pRDInfo = alloc_rd_info();
661 ASSERT(pDesc->pRDInfo);
42f709ef
MP		 662 if (!device_alloc_rx_buf(pDevice, pDesc))
663 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
664
915006cd
JP		 665 pDesc->next = &(pDevice->aRD1Ring[(i+1) % pDevice->sOpts.nRxDescs1]);
666 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
667 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
668 }
669
670 if (i > 0)
671 pDevice->aRD1Ring[i-1].next_desc = cpu_to_le32(pDevice->rd1_pool_dma);
672 pDevice->pCurrRD[1] = &(pDevice->aRD1Ring[0]);
5449c685
FB		 673}
674
3f8597f4 675static void device_free_rd0_ring(struct vnt_private *pDevice)
84b50762 676{
915006cd 677 int i;
5449c685 678
915006cd
JP		 679 for (i = 0; i < pDevice->sOpts.nRxDescs0; i++) {
680 PSRxDesc pDesc = &(pDevice->aRD0Ring[i]);
681 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
5449c685 682
a1c6dcda
QL		 683 dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
684 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
5449c685 685
915006cd 686 dev_kfree_skb(pRDInfo->skb);
5449c685 687
61d566a5 688 kfree(pDesc->pRDInfo);
915006cd 689 }
5449c685
FB		 690}
691
3f8597f4 692static void device_free_rd1_ring(struct vnt_private *pDevice)
84b50762 693{
915006cd 694 int i;
5449c685 695
915006cd
JP		 696 for (i = 0; i < pDevice->sOpts.nRxDescs1; i++) {
697 PSRxDesc pDesc = &(pDevice->aRD1Ring[i]);
698 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
5449c685 699
a1c6dcda
QL		 700 dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
701 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
5449c685 702
915006cd 703 dev_kfree_skb(pRDInfo->skb);
5449c685 704
61d566a5 705 kfree(pDesc->pRDInfo);
915006cd 706 }
5449c685
FB		 707}
708
3f8597f4 709static void device_init_td0_ring(struct vnt_private *pDevice)
84b50762 710{
915006cd
JP		 711 int i;
712 dma_addr_t curr;
713 PSTxDesc pDesc;
714
715 curr = pDevice->td0_pool_dma;
716 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++, curr += sizeof(STxDesc)) {
717 pDesc = &(pDevice->apTD0Rings[i]);
718 pDesc->pTDInfo = alloc_td_info();
719 ASSERT(pDesc->pTDInfo);
720 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
721 pDesc->pTDInfo->buf = pDevice->tx0_bufs + (i)*PKT_BUF_SZ;
722 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma0 + (i)*PKT_BUF_SZ;
723 }
724 pDesc->next = &(pDevice->apTD0Rings[(i+1) % pDevice->sOpts.nTxDescs[0]]);
725 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
726 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
727 }
728
729 if (i > 0)
730 pDevice->apTD0Rings[i-1].next_desc = cpu_to_le32(pDevice->td0_pool_dma);
731 pDevice->apTailTD[0] = pDevice->apCurrTD[0] = &(pDevice->apTD0Rings[0]);
5449c685
FB		 732}
733
3f8597f4 734static void device_init_td1_ring(struct vnt_private *pDevice)
84b50762 735{
915006cd
JP		 736 int i;
737 dma_addr_t curr;
738 PSTxDesc pDesc;
739
740 /* Init the TD ring entries */
741 curr = pDevice->td1_pool_dma;
742 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++, curr += sizeof(STxDesc)) {
743 pDesc = &(pDevice->apTD1Rings[i]);
744 pDesc->pTDInfo = alloc_td_info();
745 ASSERT(pDesc->pTDInfo);
746 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
747 pDesc->pTDInfo->buf = pDevice->tx1_bufs + (i) * PKT_BUF_SZ;
748 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma1 + (i) * PKT_BUF_SZ;
749 }
750 pDesc->next = &(pDevice->apTD1Rings[(i + 1) % pDevice->sOpts.nTxDescs[1]]);
751 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
752 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
753 }
754
755 if (i > 0)
756 pDevice->apTD1Rings[i-1].next_desc = cpu_to_le32(pDevice->td1_pool_dma);
757 pDevice->apTailTD[1] = pDevice->apCurrTD[1] = &(pDevice->apTD1Rings[0]);
5449c685
FB		 758}
759
3f8597f4 760static void device_free_td0_ring(struct vnt_private *pDevice)
84b50762 761{
915006cd 762 int i;
6b711271 763
915006cd
JP		 764 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++) {
765 PSTxDesc pDesc = &(pDevice->apTD0Rings[i]);
766 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
5449c685 767
915006cd 768 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
a1c6dcda
QL		 769 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
770 pTDInfo->skb->len, DMA_TO_DEVICE);
5449c685 771
915006cd
JP		 772 if (pTDInfo->skb)
773 dev_kfree_skb(pTDInfo->skb);
5449c685 774
61d566a5 775 kfree(pDesc->pTDInfo);
915006cd 776 }
5449c685
FB		 777}
778
3f8597f4 779static void device_free_td1_ring(struct vnt_private *pDevice)
84b50762 780{
915006cd 781 int i;
5449c685 782
915006cd
JP		 783 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++) {
784 PSTxDesc pDesc = &(pDevice->apTD1Rings[i]);
785 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
5449c685 786
915006cd 787 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
a1c6dcda
QL		 788 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
789 pTDInfo->skb->len, DMA_TO_DEVICE);
5449c685 790
915006cd
JP		 791 if (pTDInfo->skb)
792 dev_kfree_skb(pTDInfo->skb);
5449c685 793
61d566a5 794 kfree(pDesc->pTDInfo);
915006cd 795 }
5449c685
FB		 796}
797
5449c685
FB		 798/*-----------------------------------------------------------------*/
799
3f8597f4 800static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx)
84b50762 801{
915006cd
JP		 802 PSRxDesc pRD;
803 int works = 0;
5449c685 804
915006cd
JP		 805 for (pRD = pDevice->pCurrRD[uIdx];
806 pRD->m_rd0RD0.f1Owner == OWNED_BY_HOST;
807 pRD = pRD->next) {
915006cd
JP		 808 if (works++ > 15)
809 break;
33b1c8c1 810 if (vnt_receive_frame(pDevice, pRD)) {
915006cd 811 if (!device_alloc_rx_buf(pDevice, pRD)) {
42f709ef
MP		 812 dev_err(&pDevice->pcid->dev,
813 "can not allocate rx buf\n");
915006cd
JP		 814 break;
815 }
816 }
817 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
915006cd
JP		 818 }
819
820 pDevice->pCurrRD[uIdx] = pRD;
821
822 return works;
5449c685
FB		 823}
824
3f8597f4 825static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pRD)
84b50762 826{
915006cd 827 PDEVICE_RD_INFO pRDInfo = pRD->pRDInfo;
5449c685 828
915006cd 829 pRDInfo->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
915006cd
JP		 830 if (pRDInfo->skb == NULL)
831 return false;
832 ASSERT(pRDInfo->skb);
33b1c8c1
MP		 833
834 pRDInfo->skb_dma =
a1c6dcda 835 dma_map_single(&pDevice->pcid->dev,
33b1c8c1 836 skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)),
a1c6dcda 837 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
33b1c8c1 838
915006cd
JP		 839 *((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */
840
841 pRD->m_rd0RD0.wResCount = cpu_to_le16(pDevice->rx_buf_sz);
842 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
843 pRD->m_rd1RD1.wReqCount = cpu_to_le16(pDevice->rx_buf_sz);
844 pRD->buff_addr = cpu_to_le32(pRDInfo->skb_dma);
845
846 return true;
5449c685
FB		 847}
848
59918bea
MP		 849static const u8 fallback_rate0[5][5] = {
850 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
851 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
852 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
853 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
854 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
855};
856
857static const u8 fallback_rate1[5][5] = {
858 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
859 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
860 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
861 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
862 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
863};
864
865static int vnt_int_report_rate(struct vnt_private *priv,
866 PDEVICE_TD_INFO context, u8 tsr0, u8 tsr1)
867{
868 struct vnt_tx_fifo_head *fifo_head;
869 struct ieee80211_tx_info *info;
870 struct ieee80211_rate *rate;
871 u16 fb_option;
872 u8 tx_retry = (tsr0 & TSR0_NCR);
873 s8 idx;
874
875 if (!context)
876 return -ENOMEM;
877
878 if (!context->skb)
879 return -EINVAL;
880
881 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
882 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
883 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
884
885 info = IEEE80211_SKB_CB(context->skb);
886 idx = info->control.rates[0].idx;
887
888 if (fb_option && !(tsr1 & TSR1_TERR)) {
889 u8 tx_rate;
890 u8 retry = tx_retry;
891
892 rate = ieee80211_get_tx_rate(priv->hw, info);
893 tx_rate = rate->hw_value - RATE_18M;
894
895 if (retry > 4)
896 retry = 4;
897
898 if (fb_option & FIFOCTL_AUTO_FB_0)
899 tx_rate = fallback_rate0[tx_rate][retry];
900 else if (fb_option & FIFOCTL_AUTO_FB_1)
901 tx_rate = fallback_rate1[tx_rate][retry];
902
903 if (info->band == IEEE80211_BAND_5GHZ)
904 idx = tx_rate - RATE_6M;
905 else
906 idx = tx_rate;
907 }
908
909 ieee80211_tx_info_clear_status(info);
910
911 info->status.rates[0].count = tx_retry;
912
913 if (!(tsr1 & TSR1_TERR)) {
914 info->status.rates[0].idx = idx;
6e44dc4b
MP		 915
916 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
917 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
918 else
919 info->flags |= IEEE80211_TX_STAT_ACK;
59918bea
MP		 920 }
921
922 return 0;
923}
924
3f8597f4 925static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx)
84b50762 926{
915006cd 927 PSTxDesc pTD;
915006cd
JP		 928 int works = 0;
929 unsigned char byTsr0;
930 unsigned char byTsr1;
915006cd 931
915006cd 932 for (pTD = pDevice->apTailTD[uIdx]; pDevice->iTDUsed[uIdx] > 0; pTD = pTD->next) {
915006cd
JP		 933 if (pTD->m_td0TD0.f1Owner == OWNED_BY_NIC)
934 break;
935 if (works++ > 15)
936 break;
937
938 byTsr0 = pTD->m_td0TD0.byTSR0;
939 byTsr1 = pTD->m_td0TD0.byTSR1;
940
bb72dd53 941 /* Only the status of first TD in the chain is correct */
915006cd 942 if (pTD->m_td1TD1.byTCR & TCR_STP) {
915006cd 943 if ((pTD->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) != 0) {
915006cd
JP		 944 if (!(byTsr1 & TSR1_TERR)) {
945 if (byTsr0 != 0) {
48caf5a0
JP		 946 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
947 (int)uIdx, byTsr1,
948 byTsr0);
915006cd 949 }
5e0cc8a2 950 } else {
48caf5a0
JP		 951 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
952 (int)uIdx, byTsr1, byTsr0);
915006cd
JP		 953 }
954 }
955
956 if (byTsr1 & TSR1_TERR) {
957 if ((pTD->pTDInfo->byFlags & TD_FLAGS_PRIV_SKB) != 0) {
48caf5a0
JP		 958 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
959 (int)uIdx, byTsr1, byTsr0);
915006cd 960 }
915006cd 961 }
ad3fee9b
MP		 962
963 vnt_int_report_rate(pDevice, pTD->pTDInfo, byTsr0, byTsr1);
964
915006cd
JP		 965 device_free_tx_buf(pDevice, pTD);
966 pDevice->iTDUsed[uIdx]--;
915006cd 967 }
915006cd
JP		 968 }
969
915006cd
JP		 970 pDevice->apTailTD[uIdx] = pTD;
971
972 return works;
5449c685
FB		 973}
974
3f8597f4 975static void device_error(struct vnt_private *pDevice, unsigned short status)
84b50762 976{
915006cd 977 if (status & ISR_FETALERR) {
42f709ef
MP		 978 dev_err(&pDevice->pcid->dev, "Hardware fatal error\n");
979
915006cd
JP		 980 MACbShutdown(pDevice->PortOffset);
981 return;
982 }
5449c685
FB		 983}
984
3f8597f4 985static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc)
84b50762 986{
915006cd
JP		 987 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
988 struct sk_buff *skb = pTDInfo->skb;
5449c685 989
bb72dd53 990 /* pre-allocated buf_dma can't be unmapped. */
915006cd 991 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) {
a1c6dcda
QL		 992 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
993 skb->len, DMA_TO_DEVICE);
915006cd 994 }
5449c685 995
3fa0917b 996 if (skb)
59918bea 997 ieee80211_tx_status_irqsafe(pDevice->hw, skb);
5449c685 998
915006cd 999 pTDInfo->skb_dma = 0;
70ae543b 1000 pTDInfo->skb = NULL;
915006cd 1001 pTDInfo->byFlags = 0;
5449c685
FB		 1002}
1003
64e4fd51
MP		 1004static void vnt_check_bb_vga(struct vnt_private *priv)
1005{
1006 long dbm;
1007 int i;
1008
1009 if (!priv->bUpdateBBVGA)
1010 return;
1011
1012 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1013 return;
1014
1015 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
1016 return;
1017
1018 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
1019
1020 for (i = 0; i < BB_VGA_LEVEL; i++) {
1021 if (dbm < priv->ldBmThreshold[i]) {
1022 priv->byBBVGANew = priv->abyBBVGA[i];
1023 break;
1024 }
1025 }
1026
1027 if (priv->byBBVGANew == priv->byBBVGACurrent) {
1028 priv->uBBVGADiffCount = 1;
1029 return;
1030 }
1031
1032 priv->uBBVGADiffCount++;
1033
1034 if (priv->uBBVGADiffCount == 1) {
1035 /* first VGA diff gain */
1036 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1037
1038 dev_dbg(&priv->pcid->dev,
1039 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1040 (int)dbm, priv->byBBVGANew,
1041 priv->byBBVGACurrent,
1042 (int)priv->uBBVGADiffCount);
1043 }
1044
1045 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
1046 dev_dbg(&priv->pcid->dev,
1047 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1048 (int)dbm, priv->byBBVGANew,
1049 priv->byBBVGACurrent,
1050 (int)priv->uBBVGADiffCount);
1051
1052 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1053 }
1054}
1055
84b50762
GC		 1056static irqreturn_t device_intr(int irq, void *dev_instance)
1057{
e70abceb 1058 struct vnt_private *pDevice = dev_instance;
700f6c02 1059 struct ieee80211_low_level_stats *low_stats = &pDevice->low_stats;
915006cd 1060 int max_count = 0;
700f6c02 1061 u32 mib_counter;
915006cd
JP		 1062 unsigned char byOrgPageSel = 0;
1063 int handled = 0;
6cff1f6a 1064 unsigned long flags;
915006cd 1065
915006cd
JP		 1066 MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
1067
1068 if (pDevice->dwIsr == 0)
1069 return IRQ_RETVAL(handled);
1070
1071 if (pDevice->dwIsr == 0xffffffff) {
48caf5a0 1072 pr_debug("dwIsr = 0xffff\n");
915006cd
JP		 1073 return IRQ_RETVAL(handled);
1074 }
915006cd
JP		 1075
1076 handled = 1;
1077 MACvIntDisable(pDevice->PortOffset);
6cff1f6a
MP		 1078
1079 spin_lock_irqsave(&pDevice->lock, flags);
915006cd 1080
bb72dd53 1081 /* Make sure current page is 0 */
915006cd 1082 VNSvInPortB(pDevice->PortOffset + MAC_REG_PAGE1SEL, &byOrgPageSel);
bc5cf656 1083 if (byOrgPageSel == 1)
915006cd 1084 MACvSelectPage0(pDevice->PortOffset);
bc5cf656 1085 else
915006cd
JP		 1086 byOrgPageSel = 0;
1087
700f6c02
MP		 1088 /* Read low level stats */
1089 MACvReadMIBCounter(pDevice->PortOffset, &mib_counter);
1090
1091 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
1092 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
1093 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
1094 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
1095
bb72dd53
AS		 1096 /*
1097 * TBD....
1098 * Must do this after doing rx/tx, cause ISR bit is slow
1099 * than RD/TD write back
1100 * update ISR counter
1101 */
32b249b0 1102 while (pDevice->dwIsr && pDevice->vif) {
915006cd
JP		 1103 MACvWriteISR(pDevice->PortOffset, pDevice->dwIsr);
1104
1105 if (pDevice->dwIsr & ISR_FETALERR) {
48caf5a0 1106 pr_debug(" ISR_FETALERR\n");
915006cd
JP		 1107 VNSvOutPortB(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1108 VNSvOutPortW(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1109 device_error(pDevice, pDevice->dwIsr);
1110 }
1111
915006cd 1112 if (pDevice->dwIsr & ISR_TBTT) {
32b249b0 1113 if (pDevice->op_mode != NL80211_IFTYPE_ADHOC)
64e4fd51 1114 vnt_check_bb_vga(pDevice);
915006cd
JP		 1115
1116 pDevice->bBeaconSent = false;
bc5cf656 1117 if (pDevice->bEnablePSMode)
915006cd 1118 PSbIsNextTBTTWakeUp((void *)pDevice);
915006cd 1119
e70abceb
MP		 1120 if ((pDevice->op_mode == NL80211_IFTYPE_AP ||
1121 pDevice->op_mode == NL80211_IFTYPE_ADHOC) &&
1122 pDevice->vif->bss_conf.enable_beacon) {
915006cd 1123 MACvOneShotTimer1MicroSec(pDevice->PortOffset,
e70abceb 1124 (pDevice->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
915006cd
JP		 1125 }
1126
4e8a7e5f 1127 /* TODO: adhoc PS mode */
915006cd
JP		 1128
1129 }
1130
1131 if (pDevice->dwIsr & ISR_BNTX) {
a9873673 1132 if (pDevice->op_mode == NL80211_IFTYPE_ADHOC) {
915006cd
JP		 1133 pDevice->bIsBeaconBufReadySet = false;
1134 pDevice->cbBeaconBufReadySetCnt = 0;
1135 }
1136
915006cd 1137 pDevice->bBeaconSent = true;
915006cd
JP		 1138 }
1139
bc5cf656 1140 if (pDevice->dwIsr & ISR_RXDMA0)
915006cd 1141 max_count += device_rx_srv(pDevice, TYPE_RXDMA0);
bc5cf656
GM		 1142
1143 if (pDevice->dwIsr & ISR_RXDMA1)
915006cd 1144 max_count += device_rx_srv(pDevice, TYPE_RXDMA1);
bc5cf656
GM		 1145
1146 if (pDevice->dwIsr & ISR_TXDMA0)
915006cd 1147 max_count += device_tx_srv(pDevice, TYPE_TXDMA0);
bc5cf656
GM		 1148
1149 if (pDevice->dwIsr & ISR_AC0DMA)
915006cd 1150 max_count += device_tx_srv(pDevice, TYPE_AC0DMA);
bc5cf656 1151
915006cd 1152 if (pDevice->dwIsr & ISR_SOFTTIMER1) {
32b249b0
MP		 1153 if (pDevice->vif->bss_conf.enable_beacon)
1154 vnt_beacon_make(pDevice, pDevice->vif);
915006cd
JP		 1155 }
1156
54fbb2da 1157 /* If both buffers available wake the queue */
32b249b0
MP		 1158 if (AVAIL_TD(pDevice, TYPE_TXDMA0) &&
1159 AVAIL_TD(pDevice, TYPE_AC0DMA) &&
1160 ieee80211_queue_stopped(pDevice->hw, 0))
1161 ieee80211_wake_queues(pDevice->hw);
54fbb2da 1162
915006cd
JP		 1163 MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
1164
1165 MACvReceive0(pDevice->PortOffset);
1166 MACvReceive1(pDevice->PortOffset);
1167
1168 if (max_count > pDevice->sOpts.int_works)
1169 break;
1170 }
1171
bc5cf656 1172 if (byOrgPageSel == 1)
915006cd 1173 MACvSelectPage1(pDevice->PortOffset);
915006cd 1174
6cff1f6a
MP		 1175 spin_unlock_irqrestore(&pDevice->lock, flags);
1176
915006cd
JP		 1177 MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE);
1178
1179 return IRQ_RETVAL(handled);
5449c685 1180}
915006cd 1181
67013f2c
MP		 1182static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1183{
1184 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1185 PSTxDesc head_td;
c3125305 1186 u32 dma_idx;
67013f2c
MP		 1187 unsigned long flags;
1188
1189 spin_lock_irqsave(&priv->lock, flags);
1190
c3125305
MP		 1191 if (ieee80211_is_data(hdr->frame_control))
1192 dma_idx = TYPE_AC0DMA;
1193 else
67013f2c
MP		 1194 dma_idx = TYPE_TXDMA0;
1195
1196 if (AVAIL_TD(priv, dma_idx) < 1) {
1197 spin_unlock_irqrestore(&priv->lock, flags);
1198 return -ENOMEM;
1199 }
1200
1201 head_td = priv->apCurrTD[dma_idx];
1202
b5745290 1203 head_td->m_td1TD1.byTCR = 0;
67013f2c
MP		 1204
1205 head_td->pTDInfo->skb = skb;
1206
c3125305
MP		 1207 if (dma_idx == TYPE_AC0DMA)
1208 head_td->pTDInfo->byFlags = TD_FLAGS_NETIF_SKB;
1209
67013f2c
MP		 1210 priv->apCurrTD[dma_idx] = head_td->next;
1211
1212 spin_unlock_irqrestore(&priv->lock, flags);
1213
1214 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1215
1216 if (MACbIsRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_PS))
1217 MACbPSWakeup(priv->PortOffset);
1218
1219 spin_lock_irqsave(&priv->lock, flags);
1220
1221 priv->bPWBitOn = false;
1222
b5745290
MP		 1223 /* Set TSR1 & ReqCount in TxDescHead */
1224 head_td->m_td1TD1.byTCR |= (TCR_STP | TCR_EDP | EDMSDU);
1225 head_td->m_td1TD1.wReqCount =
1226 cpu_to_le16((u16)head_td->pTDInfo->dwReqCount);
1227
187e2a81
MP		 1228 head_td->buff_addr = cpu_to_le32(head_td->pTDInfo->skb_dma);
1229
d65d2b25
MP		 1230 /* Poll Transmit the adapter */
1231 wmb();
1232 head_td->m_td0TD0.f1Owner = OWNED_BY_NIC;
1233 wmb(); /* second memory barrier */
1234
c3125305 1235 if (head_td->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
67013f2c 1236 MACvTransmitAC0(priv->PortOffset);
c3125305 1237 else
67013f2c
MP		 1238 MACvTransmit0(priv->PortOffset);
1239
d65d2b25
MP		 1240 priv->iTDUsed[dma_idx]++;
1241
67013f2c
MP		 1242 spin_unlock_irqrestore(&priv->lock, flags);
1243
1244 return 0;
1245}
1246
1247static void vnt_tx_80211(struct ieee80211_hw *hw,
1248 struct ieee80211_tx_control *control,
1249 struct sk_buff *skb)
1250{
1251 struct vnt_private *priv = hw->priv;
1252
1253 ieee80211_stop_queues(hw);
1254
1255 if (vnt_tx_packet(priv, skb)) {
1256 ieee80211_free_txskb(hw, skb);
1257
1258 ieee80211_wake_queues(hw);
1259 }
1260}
1261
1262static int vnt_start(struct ieee80211_hw *hw)
1263{
1264 struct vnt_private *priv = hw->priv;
1265 int ret;
1266
1267 priv->rx_buf_sz = PKT_BUF_SZ;
1268 if (!device_init_rings(priv))
1269 return -ENOMEM;
1270
1271 ret = request_irq(priv->pcid->irq, &device_intr,
1272 IRQF_SHARED, "vt6655", priv);
1273 if (ret) {
1274 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1275 return ret;
1276 }
1277
1278 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1279 device_init_rd0_ring(priv);
1280 device_init_rd1_ring(priv);
67013f2c
MP		 1281 device_init_td0_ring(priv);
1282 device_init_td1_ring(priv);
1283
1284 device_init_registers(priv);
1285
1286 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1287 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1288
1289 ieee80211_wake_queues(hw);
1290
1291 return 0;
1292}
1293
1294static void vnt_stop(struct ieee80211_hw *hw)
1295{
1296 struct vnt_private *priv = hw->priv;
1297
1298 ieee80211_stop_queues(hw);
1299
1300 MACbShutdown(priv->PortOffset);
1301 MACbSoftwareReset(priv->PortOffset);
1302 CARDbRadioPowerOff(priv);
1303
1304 device_free_td0_ring(priv);
1305 device_free_td1_ring(priv);
1306 device_free_rd0_ring(priv);
1307 device_free_rd1_ring(priv);
67013f2c
MP		 1308 device_free_rings(priv);
1309
1310 free_irq(priv->pcid->irq, priv);
1311}
1312
1313static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1314{
1315 struct vnt_private *priv = hw->priv;
1316
1317 priv->vif = vif;
1318
1319 switch (vif->type) {
1320 case NL80211_IFTYPE_STATION:
67013f2c
MP		 1321 break;
1322 case NL80211_IFTYPE_ADHOC:
1323 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1324
1325 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1326
1327 break;
1328 case NL80211_IFTYPE_AP:
1329 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1330
1331 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1332
1333 break;
1334 default:
1335 return -EOPNOTSUPP;
1336 }
1337
1338 priv->op_mode = vif->type;
1339
1340 return 0;
1341}
1342
1343static void vnt_remove_interface(struct ieee80211_hw *hw,
1344 struct ieee80211_vif *vif)
1345{
1346 struct vnt_private *priv = hw->priv;
1347
1348 switch (vif->type) {
1349 case NL80211_IFTYPE_STATION:
67013f2c
MP		 1350 break;
1351 case NL80211_IFTYPE_ADHOC:
1352 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1353 MACvRegBitsOff(priv->PortOffset,
1354 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1355 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1356 break;
1357 case NL80211_IFTYPE_AP:
1358 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1359 MACvRegBitsOff(priv->PortOffset,
1360 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1361 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1362 break;
1363 default:
1364 break;
1365 }
1366
1367 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1368}
1369
1370
1371static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1372{
1373 struct vnt_private *priv = hw->priv;
1374 struct ieee80211_conf *conf = &hw->conf;
1375 u8 bb_type;
1376
1377 if (changed & IEEE80211_CONF_CHANGE_PS) {
1378 if (conf->flags & IEEE80211_CONF_PS)
1379 PSvEnablePowerSaving(priv, conf->listen_interval);
1380 else
1381 PSvDisablePowerSaving(priv);
1382 }
1383
1384 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1385 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
d7a4cfa8 1386 set_channel(priv, conf->chandef.chan);
67013f2c
MP		 1387
1388 if (conf->chandef.chan->band == IEEE80211_BAND_5GHZ)
1389 bb_type = BB_TYPE_11A;
1390 else
1391 bb_type = BB_TYPE_11G;
1392
1393 if (priv->byBBType != bb_type) {
1394 priv->byBBType = bb_type;
1395
bfb6c863 1396 CARDbSetPhyParameter(priv, priv->byBBType);
67013f2c
MP		 1397 }
1398 }
1399
1400 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1401 if (priv->byBBType == BB_TYPE_11B)
1402 priv->wCurrentRate = RATE_1M;
1403 else
1404 priv->wCurrentRate = RATE_54M;
1405
1406 RFbSetPower(priv, priv->wCurrentRate,
1407 conf->chandef.chan->hw_value);
1408 }
1409
1410 return 0;
1411}
1412
1413static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1414 struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf,
1415 u32 changed)
1416{
1417 struct vnt_private *priv = hw->priv;
1418
1419 priv->current_aid = conf->aid;
1420
664a5c1d
MP		 1421 if (changed & BSS_CHANGED_BSSID) {
1422 unsigned long flags;
1423
1424 spin_lock_irqsave(&priv->lock, flags);
1425
67013f2c
MP		 1426 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1427
664a5c1d
MP		 1428 spin_unlock_irqrestore(&priv->lock, flags);
1429 }
1430
67013f2c
MP		 1431 if (changed & BSS_CHANGED_BASIC_RATES) {
1432 priv->basic_rates = conf->basic_rates;
1433
1434 CARDvUpdateBasicTopRate(priv);
1435
1436 dev_dbg(&priv->pcid->dev,
1437 "basic rates %x\n", conf->basic_rates);
1438 }
1439
1440 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1441 if (conf->use_short_preamble) {
1442 MACvEnableBarkerPreambleMd(priv->PortOffset);
1443 priv->byPreambleType = true;
1444 } else {
1445 MACvDisableBarkerPreambleMd(priv->PortOffset);
1446 priv->byPreambleType = false;
1447 }
1448 }
1449
1450 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1451 if (conf->use_cts_prot)
1452 MACvEnableProtectMD(priv->PortOffset);
1453 else
1454 MACvDisableProtectMD(priv->PortOffset);
1455 }
1456
1457 if (changed & BSS_CHANGED_ERP_SLOT) {
1458 if (conf->use_short_slot)
1459 priv->bShortSlotTime = true;
1460 else
1461 priv->bShortSlotTime = false;
1462
bfb6c863 1463 CARDbSetPhyParameter(priv, priv->byBBType);
67013f2c
MP		 1464 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1465 }
1466
1467 if (changed & BSS_CHANGED_TXPOWER)
1468 RFbSetPower(priv, priv->wCurrentRate,
1469 conf->chandef.chan->hw_value);
1470
1471 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1472 dev_dbg(&priv->pcid->dev,
1473 "Beacon enable %d\n", conf->enable_beacon);
1474
1475 if (conf->enable_beacon) {
1476 vnt_beacon_enable(priv, vif, conf);
1477
84c00afe
MK		 1478 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1479 TCR_AUTOBCNTX);
67013f2c 1480 } else {
84c00afe
MK		 1481 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1482 TCR_AUTOBCNTX);
67013f2c
MP		 1483 }
1484 }
1485
1486 if (changed & BSS_CHANGED_ASSOC && priv->op_mode != NL80211_IFTYPE_AP) {
1487 if (conf->assoc) {
1488 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
032ed34a 1489 conf->sync_tsf);
67013f2c
MP		 1490
1491 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1492
738487ff 1493 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
c7b14ea0
MP		 1494 } else {
1495 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1496 TFTCTL_TSFCNTRST);
1497 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1498 TFTCTL_TSFCNTREN);
67013f2c
MP		 1499 }
1500 }
1501}
1502
1503static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1504 struct netdev_hw_addr_list *mc_list)
1505{
1506 struct vnt_private *priv = hw->priv;
1507 struct netdev_hw_addr *ha;
1508 u64 mc_filter = 0;
1509 u32 bit_nr = 0;
1510
1511 netdev_hw_addr_list_for_each(ha, mc_list) {
1512 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1513
1514 mc_filter |= 1ULL << (bit_nr & 0x3f);
1515 }
1516
1517 priv->mc_list_count = mc_list->count;
1518
1519 return mc_filter;
1520}
1521
1522static void vnt_configure(struct ieee80211_hw *hw,
1523 unsigned int changed_flags, unsigned int *total_flags, u64 multicast)
1524{
1525 struct vnt_private *priv = hw->priv;
1526 u8 rx_mode = 0;
1527
1528 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_PROMISC_IN_BSS |
1529 FIF_BCN_PRBRESP_PROMISC;
1530
1531 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1532
1533 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1534
1535 if (changed_flags & FIF_PROMISC_IN_BSS) {
1536 /* unconditionally log net taps */
1537 if (*total_flags & FIF_PROMISC_IN_BSS)
1538 rx_mode |= RCR_UNICAST;
1539 else
1540 rx_mode &= ~RCR_UNICAST;
1541 }
1542
1543 if (changed_flags & FIF_ALLMULTI) {
1544 if (*total_flags & FIF_ALLMULTI) {
95775d12
MP		 1545 unsigned long flags;
1546
1547 spin_lock_irqsave(&priv->lock, flags);
1548
67013f2c
MP		 1549 if (priv->mc_list_count > 2) {
1550 MACvSelectPage1(priv->PortOffset);
1551
1552 VNSvOutPortD(priv->PortOffset +
1553 MAC_REG_MAR0, 0xffffffff);
1554 VNSvOutPortD(priv->PortOffset +
1555 MAC_REG_MAR0 + 4, 0xffffffff);
1556
1557 MACvSelectPage0(priv->PortOffset);
1558 } else {
1559 MACvSelectPage1(priv->PortOffset);
1560
1561 VNSvOutPortD(priv->PortOffset +
1562 MAC_REG_MAR0, (u32)multicast);
1563 VNSvOutPortD(priv->PortOffset +
1564 MAC_REG_MAR0 + 4,
1565 (u32)(multicast >> 32));
1566
1567 MACvSelectPage0(priv->PortOffset);
1568 }
1569
95775d12
MP		 1570 spin_unlock_irqrestore(&priv->lock, flags);
1571
67013f2c
MP		 1572 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1573 } else {
1574 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1575 }
1576 }
1577
1578 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1579 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1580
1581 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1582 rx_mode &= ~RCR_BSSID;
1583 else
1584 rx_mode |= RCR_BSSID;
1585 }
1586
1587 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1588
1589 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1590}
1591
1592static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1593 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1594 struct ieee80211_key_conf *key)
1595{
1596 struct vnt_private *priv = hw->priv;
1597
1598 switch (cmd) {
1599 case SET_KEY:
1600 if (vnt_set_keys(hw, sta, vif, key))
1601 return -EOPNOTSUPP;
1602 break;
1603 case DISABLE_KEY:
1604 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1605 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1606 default:
1607 break;
1608 }
1609
1610 return 0;
1611}
1612
700f6c02
MP		 1613static int vnt_get_stats(struct ieee80211_hw *hw,
1614 struct ieee80211_low_level_stats *stats)
1615{
1616 struct vnt_private *priv = hw->priv;
1617
1618 memcpy(stats, &priv->low_stats, sizeof(*stats));
1619
1620 return 0;
1621}
1622
67013f2c
MP		 1623static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1624{
1625 struct vnt_private *priv = hw->priv;
1626 u64 tsf;
1627
738487ff 1628 CARDbGetCurrentTSF(priv, &tsf);
67013f2c
MP		 1629
1630 return tsf;
1631}
1632
1633static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1634 u64 tsf)
1635{
1636 struct vnt_private *priv = hw->priv;
1637
738487ff 1638 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
67013f2c
MP		 1639}
1640
1641static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1642{
1643 struct vnt_private *priv = hw->priv;
1644
1645 /* reset TSF counter */
1646 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1647}
1648
1649static const struct ieee80211_ops vnt_mac_ops = {
1650 .tx = vnt_tx_80211,
1651 .start = vnt_start,
1652 .stop = vnt_stop,
1653 .add_interface = vnt_add_interface,
1654 .remove_interface = vnt_remove_interface,
1655 .config = vnt_config,
1656 .bss_info_changed = vnt_bss_info_changed,
1657 .prepare_multicast = vnt_prepare_multicast,
1658 .configure_filter = vnt_configure,
1659 .set_key = vnt_set_key,
700f6c02 1660 .get_stats = vnt_get_stats,
67013f2c
MP		 1661 .get_tsf = vnt_get_tsf,
1662 .set_tsf = vnt_set_tsf,
1663 .reset_tsf = vnt_reset_tsf,
1664};
1665
b7c9cd45 1666static int vnt_init(struct vnt_private *priv)
67013f2c
MP		 1667{
1668 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1669
3d75b9e2
MP		 1670 vnt_init_bands(priv);
1671
67013f2c
MP		 1672 if (ieee80211_register_hw(priv->hw))
1673 return -ENODEV;
1674
1675 priv->mac_hw = true;
1676
1677 CARDbRadioPowerOff(priv);
1678
1679 return 0;
1680}
1681
1682static int
1683vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1684{
1685 PCHIP_INFO pChip_info = (PCHIP_INFO)ent->driver_data;
1686 struct vnt_private *priv;
1687 struct ieee80211_hw *hw;
1688 struct wiphy *wiphy;
1689 int rc;
1690
1691 dev_notice(&pcid->dev,
1692 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1693
1694 dev_notice(&pcid->dev,
1695 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1696
1697 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1698 if (!hw) {
1699 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1700 return -ENOMEM;
1701 }
1702
1703 priv = hw->priv;
1704
1705 vt6655_init_info(pcid, &priv, pChip_info);
1706
1707 priv->hw = hw;
1708
1709 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1710
1711 if (pci_enable_device(pcid)) {
1712 device_free_info(priv);
1713 return -ENODEV;
1714 }
1715
1716 dev_dbg(&pcid->dev,
1717 "Before get pci_info memaddr is %x\n", priv->memaddr);
1718
1719 if (!device_get_pci_info(priv, pcid)) {
1720 dev_err(&pcid->dev, ": Failed to find PCI device.\n");
1721 device_free_info(priv);
1722 return -ENODEV;
1723 }
1724
1725#ifdef DEBUG
1726 dev_dbg(&pcid->dev,
1727 "after get pci_info memaddr is %x, io addr is %x,io_size is %d\n",
1728 priv->memaddr, priv->ioaddr, priv->io_size);
1729 {
1730 int i;
1731 u32 bar, len;
1732 u32 address[] = {
1733 PCI_BASE_ADDRESS_0,
1734 PCI_BASE_ADDRESS_1,
1735 PCI_BASE_ADDRESS_2,
1736 PCI_BASE_ADDRESS_3,
1737 PCI_BASE_ADDRESS_4,
1738 PCI_BASE_ADDRESS_5,
1739 0};
1740 for (i = 0; address[i]; i++) {
1741 pci_read_config_dword(pcid, address[i], &bar);
1742
1743 dev_dbg(&pcid->dev, "bar %d is %x\n", i, bar);
1744
1745 if (!bar) {
1746 dev_dbg(&pcid->dev,
1747 "bar %d not implemented\n", i);
1748 continue;
1749 }
1750
1751 if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
1752 /* This is IO */
1753
1754 len = bar & (PCI_BASE_ADDRESS_IO_MASK & 0xffff);
1755 len = len & ~(len - 1);
1756
1757 dev_dbg(&pcid->dev,
1758 "IO space: len in IO %x, BAR %d\n",
1759 len, i);
1760 } else {
1761 len = bar & 0xfffffff0;
1762 len = ~len + 1;
1763
1764 dev_dbg(&pcid->dev,
1765 "len in MEM %x, BAR %d\n", len, i);
1766 }
1767 }
1768 }
1769#endif
1770
1771 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1772 priv->io_size);
1773 if (!priv->PortOffset) {
1774 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1775 device_free_info(priv);
1776 return -ENODEV;
1777 }
1778
1779 rc = pci_request_regions(pcid, DEVICE_NAME);
1780 if (rc) {
1781 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1782 device_free_info(priv);
1783 return -ENODEV;
1784 }
1785
1786 /* do reset */
1787 if (!MACbSoftwareReset(priv->PortOffset)) {
1788 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1789 device_free_info(priv);
1790 return -ENODEV;
1791 }
1792 /* initial to reload eeprom */
1793 MACvInitialize(priv->PortOffset);
1794 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1795
1f51d580
MP		 1796 /* Get RFType */
1797 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1798 priv->byRFType &= RF_MASK;
1799
1800 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1801
67013f2c
MP		 1802 device_get_options(priv);
1803 device_set_options(priv);
1804 /* Mask out the options cannot be set to the chip */
1805 priv->sOpts.flags &= pChip_info->flags;
1806
1807 /* Enable the chip specified capabilities */
1808 priv->flags = priv->sOpts.flags | (pChip_info->flags & 0xff000000UL);
67013f2c
MP		 1809
1810 wiphy = priv->hw->wiphy;
1811
1812 wiphy->frag_threshold = FRAG_THRESH_DEF;
1813 wiphy->rts_threshold = RTS_THRESH_DEF;
1814 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1815 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1816
1817 priv->hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1818 IEEE80211_HW_REPORTS_TX_ACK_STATUS |
1819 IEEE80211_HW_SIGNAL_DBM |
1820 IEEE80211_HW_TIMING_BEACON_ONLY;
1821
1822 priv->hw->max_signal = 100;
1823
1824 if (vnt_init(priv))
1825 return -ENODEV;
1826
1827 device_print_info(priv);
1828 pci_set_drvdata(pcid, priv);
1829
1830 return 0;
1831}
1832
5449c685 1833/*------------------------------------------------------------------*/
5449c685 1834
000fe0f5
MP		 1835#ifdef CONFIG_PM
1836static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1837{
1838 struct vnt_private *priv = pci_get_drvdata(pcid);
1839 unsigned long flags;
1840
1841 spin_lock_irqsave(&priv->lock, flags);
1842
1843 pci_save_state(pcid);
1844
1845 MACbShutdown(priv->PortOffset);
1846
1847 pci_disable_device(pcid);
1848 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1849
1850 spin_unlock_irqrestore(&priv->lock, flags);
1851
1852 return 0;
1853}
1854
1855static int vt6655_resume(struct pci_dev *pcid)
1856{
1857
1858 pci_set_power_state(pcid, PCI_D0);
1859 pci_enable_wake(pcid, PCI_D0, 0);
1860 pci_restore_state(pcid);
1861
1862 return 0;
1863}
1864#endif
1865
013a468c 1866MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
5449c685
FB		 1867
1868static struct pci_driver device_driver = {
34381c22
PH		 1869 .name = DEVICE_NAME,
1870 .id_table = vt6655_pci_id_table,
1871 .probe = vt6655_probe,
1872 .remove = vt6655_remove,
5449c685 1873#ifdef CONFIG_PM
000fe0f5
MP		 1874 .suspend = vt6655_suspend,
1875 .resume = vt6655_resume,
5449c685 1876#endif
5449c685
FB		 1877};
1878
013a468c 1879static int __init vt6655_init_module(void)
5449c685 1880{
915006cd 1881 int ret;
5449c685 1882
5449c685 1883 ret = pci_register_driver(&device_driver);
5449c685 1884#ifdef CONFIG_PM
915006cd
JP		 1885 if (ret >= 0)
1886 register_reboot_notifier(&device_notifier);
5449c685
FB		 1887#endif
1888
915006cd 1889 return ret;
5449c685
FB		 1890}
1891
013a468c 1892static void __exit vt6655_cleanup_module(void)
5449c685 1893{
5449c685 1894#ifdef CONFIG_PM
915006cd 1895 unregister_reboot_notifier(&device_notifier);
5449c685 1896#endif
915006cd 1897 pci_unregister_driver(&device_driver);
5449c685
FB		 1898}
1899
013a468c
CC		 1900module_init(vt6655_init_module);
1901module_exit(vt6655_cleanup_module);
5449c685 1902
5449c685
FB		 1903#ifdef CONFIG_PM
1904static int
1905device_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
1906{
915006cd 1907 struct pci_dev *pdev = NULL;
6b711271 1908
915006cd
JP		 1909 switch (event) {
1910 case SYS_DOWN:
1911 case SYS_HALT:
1912 case SYS_POWER_OFF:
1913 for_each_pci_dev(pdev) {
1914 if (pci_dev_driver(pdev) == &device_driver) {
1915 if (pci_get_drvdata(pdev))
000fe0f5 1916 vt6655_suspend(pdev, PMSG_HIBERNATE);
915006cd
JP		 1917 }
1918 }
1919 }
1920 return NOTIFY_DONE;
5449c685 1921}
5449c685 1922#endif
Linux 6.x block layer and io_uring tree(s)