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staging: slicoss Use dev->stats rather than adapter->stats.
[linux-2.6-block.git] / drivers / staging / slicoss / slicoss.c
CommitLineData
4d6f6af8
GKH		 1/**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39/*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
4d6f6af8 57
4d6f6af8
GKH		 58#define KLUDGE_FOR_4GB_BOUNDARY 1
59#define DEBUG_MICROCODE 1
4d6f6af8 60#define DBG 1
4d6f6af8 61#define SLIC_INTERRUPT_PROCESS_LIMIT 1
4d6f6af8
GKH		 62#define SLIC_OFFLOAD_IP_CHECKSUM 1
63#define STATS_TIMER_INTERVAL 2
64#define PING_TIMER_INTERVAL 1
65
66#include <linux/kernel.h>
67#include <linux/string.h>
68#include <linux/errno.h>
69#include <linux/ioport.h>
70#include <linux/slab.h>
71#include <linux/interrupt.h>
72#include <linux/timer.h>
73#include <linux/pci.h>
74#include <linux/spinlock.h>
75#include <linux/init.h>
76#include <linux/bitops.h>
77#include <linux/io.h>
78#include <linux/netdevice.h>
79#include <linux/etherdevice.h>
80#include <linux/skbuff.h>
81#include <linux/delay.h>
82#include <linux/debugfs.h>
83#include <linux/seq_file.h>
84#include <linux/kthread.h>
85#include <linux/module.h>
86#include <linux/moduleparam.h>
87
470c5736 88#include <linux/firmware.h>
4d6f6af8 89#include <linux/types.h>
4d6f6af8 90#include <linux/dma-mapping.h>
4d6f6af8
GKH		 91#include <linux/mii.h>
92#include <linux/if_vlan.h>
4d6f6af8
GKH		 93#include <asm/unaligned.h>
94
95#include <linux/ethtool.h>
4d6f6af8 96#include <linux/uaccess.h>
77faefa3
GKH		 97#include "slichw.h"
98#include "slic.h"
99
77faefa3 100static struct net_device_stats *slic_get_stats(struct net_device *dev);
77faefa3
GKH		 101static int slic_entry_open(struct net_device *dev);
102static int slic_entry_halt(struct net_device *dev);
103static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
203fe0d2 104static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev);
77faefa3
GKH		 105static void slic_xmit_fail(struct adapter *adapter, struct sk_buff *skb,
106 void *cmd, u32 skbtype, u32 status);
107static void slic_config_pci(struct pci_dev *pcidev);
108static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter);
109static int slic_mac_set_address(struct net_device *dev, void *ptr);
110static void slic_link_event_handler(struct adapter *adapter);
111static void slic_upr_request_complete(struct adapter *adapter, u32 isr);
112static int slic_rspqueue_init(struct adapter *adapter);
77faefa3
GKH		 113static void slic_rspqueue_free(struct adapter *adapter);
114static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter);
115static int slic_cmdq_init(struct adapter *adapter);
116static void slic_cmdq_free(struct adapter *adapter);
117static void slic_cmdq_reset(struct adapter *adapter);
118static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page);
119static void slic_cmdq_getdone(struct adapter *adapter);
120static void slic_cmdq_putdone_irq(struct adapter *adapter,
121 struct slic_hostcmd *cmd);
122static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter);
123static int slic_rcvqueue_init(struct adapter *adapter);
77faefa3
GKH		 124static int slic_rcvqueue_fill(struct adapter *adapter);
125static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb);
126static void slic_rcvqueue_free(struct adapter *adapter);
127static void slic_adapter_set_hwaddr(struct adapter *adapter);
128static int slic_card_init(struct sliccard *card, struct adapter *adapter);
129static void slic_intagg_set(struct adapter *adapter, u32 value);
130static int slic_card_download(struct adapter *adapter);
131static u32 slic_card_locate(struct adapter *adapter);
132static int slic_if_init(struct adapter *adapter);
133static int slic_adapter_allocresources(struct adapter *adapter);
134static void slic_adapter_freeresources(struct adapter *adapter);
135static void slic_link_config(struct adapter *adapter, u32 linkspeed,
136 u32 linkduplex);
137static void slic_unmap_mmio_space(struct adapter *adapter);
138static void slic_card_cleanup(struct sliccard *card);
139static void slic_soft_reset(struct adapter *adapter);
140static bool slic_mac_filter(struct adapter *adapter,
141 struct ether_header *ether_frame);
142static void slic_mac_address_config(struct adapter *adapter);
143static void slic_mac_config(struct adapter *adapter);
144static void slic_mcast_set_mask(struct adapter *adapter);
145static void slic_config_set(struct adapter *adapter, bool linkchange);
146static void slic_config_clear(struct adapter *adapter);
147static void slic_config_get(struct adapter *adapter, u32 config,
148 u32 configh);
149static void slic_timer_load_check(ulong context);
150static void slic_assert_fail(void);
151static ushort slic_eeprom_cksum(char *m, int len);
152static void slic_upr_start(struct adapter *adapter);
153static void slic_link_upr_complete(struct adapter *adapter, u32 Isr);
154static int slic_upr_request(struct adapter *adapter, u32 upr_request,
155 u32 upr_data, u32 upr_data_h, u32 upr_buffer,
156 u32 upr_buffer_h);
157static void slic_mcast_set_list(struct net_device *dev);
158
4d6f6af8 159
4d6f6af8
GKH		 160static uint slic_first_init = 1;
161static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
e9ef456e 162 "and Storage Accelerator (Non-Accelerated)";
4d6f6af8
GKH		 163
164static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
165static char *slic_product_name = "SLIC Technology(tm) Server "\
166 "and Storage Accelerator (Non-Accelerated)";
167static char *slic_vendor = "Alacritech, Inc.";
168
169static int slic_debug = 1;
170static int debug = -1;
171static struct net_device *head_netdevice;
172
e9eff9d6 173static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
4d6f6af8
GKH		 174static int intagg_delay = 100;
175static u32 dynamic_intagg;
4d6f6af8
GKH		 176static unsigned int rcv_count;
177static struct dentry *slic_debugfs;
178
179#define DRV_NAME "slicoss"
180#define DRV_VERSION "2.0.1"
181#define DRV_AUTHOR "Alacritech, Inc. Engineering"
182#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
183 "Non-Accelerated Driver"
184#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
185 "All rights reserved."
186#define PFX DRV_NAME " "
187
188MODULE_AUTHOR(DRV_AUTHOR);
189MODULE_DESCRIPTION(DRV_DESCRIPTION);
190MODULE_LICENSE("Dual BSD/GPL");
191
192module_param(dynamic_intagg, int, 0);
193MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
194module_param(intagg_delay, int, 0);
195MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
196
197static struct pci_device_id slic_pci_tbl[] __devinitdata = {
198 {PCI_VENDOR_ID_ALACRITECH,
199 SLIC_1GB_DEVICE_ID,
200 PCI_ANY_ID, PCI_ANY_ID,},
201 {PCI_VENDOR_ID_ALACRITECH,
202 SLIC_2GB_DEVICE_ID,
203 PCI_ANY_ID, PCI_ANY_ID,},
204 {0,}
205};
206
207MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
208
a750c1c5
GKH		 209#ifdef ASSERT
210#undef ASSERT
211#endif
212
213#ifndef ASSERT
214#define ASSERT(a) do { \
215 if (!(a)) { \
216 printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \
217 "line %d\n", __func__, __LINE__); \
218 slic_assert_fail(); \
219 } \
220} while (0)
221#endif
222
223
4d6f6af8
GKH		 224#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
225{ \
e9eff9d6
LD		 226 spin_lock_irqsave(&_adapter->handle_lock.lock, \
227 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 228 _pslic_handle = _adapter->pfree_slic_handles; \
229 if (_pslic_handle) { \
230 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
231 _adapter->pfree_slic_handles = _pslic_handle->next; \
232 } \
e9eff9d6
LD		 233 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
234 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 235}
236
237#define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
238{ \
239 _pslic_handle->type = SLIC_HANDLE_FREE; \
e9eff9d6
LD		 240 spin_lock_irqsave(&_adapter->handle_lock.lock, \
241 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 242 _pslic_handle->next = _adapter->pfree_slic_handles; \
243 _adapter->pfree_slic_handles = _pslic_handle; \
e9eff9d6
LD		 244 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
245 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 246}
247
248static void slic_debug_init(void);
249static void slic_debug_cleanup(void);
e9eff9d6
LD		 250static void slic_debug_adapter_create(struct adapter *adapter);
251static void slic_debug_adapter_destroy(struct adapter *adapter);
252static void slic_debug_card_create(struct sliccard *card);
253static void slic_debug_card_destroy(struct sliccard *card);
4d6f6af8 254
62f691a3 255static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
4d6f6af8
GKH		 256{
257 writel(value, reg);
258 if (flush)
259 mb();
260}
261
28980a3c
GKH		 262static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
263 u32 value, void __iomem *regh, u32 paddrh,
264 bool flush)
4d6f6af8 265{
e9eff9d6
LD		 266 spin_lock_irqsave(&adapter->bit64reglock.lock,
267 adapter->bit64reglock.flags);
4d6f6af8
GKH		 268 if (paddrh != adapter->curaddrupper) {
269 adapter->curaddrupper = paddrh;
270 writel(paddrh, regh);
271 }
272 writel(value, reg);
273 if (flush)
274 mb();
e9eff9d6
LD		 275 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
276 adapter->bit64reglock.flags);
4d6f6af8
GKH		 277}
278
e9eff9d6 279static void slic_init_driver(void)
4d6f6af8
GKH		 280{
281 if (slic_first_init) {
4d6f6af8 282 slic_first_init = 0;
e9eff9d6 283 spin_lock_init(&slic_global.driver_lock.lock);
4d6f6af8
GKH		 284 slic_debug_init();
285 }
286}
287
4d6f6af8
GKH		 288static void slic_init_adapter(struct net_device *netdev,
289 struct pci_dev *pcidev,
290 const struct pci_device_id *pci_tbl_entry,
291 void __iomem *memaddr, int chip_idx)
292{
293 ushort index;
e9eff9d6 294 struct slic_handle *pslic_handle;
f8771fa6 295 struct adapter *adapter = netdev_priv(netdev);
e8bc9b7a 296
4d6f6af8
GKH		 297/* adapter->pcidev = pcidev;*/
298 adapter->vendid = pci_tbl_entry->vendor;
299 adapter->devid = pci_tbl_entry->device;
300 adapter->subsysid = pci_tbl_entry->subdevice;
301 adapter->busnumber = pcidev->bus->number;
302 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
303 adapter->functionnumber = (pcidev->devfn & 0x7);
304 adapter->memorylength = pci_resource_len(pcidev, 0);
e9eff9d6 305 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
4d6f6af8
GKH		 306 adapter->irq = pcidev->irq;
307/* adapter->netdev = netdev;*/
308 adapter->next_netdevice = head_netdevice;
309 head_netdevice = netdev;
310 adapter->chipid = chip_idx;
311 adapter->port = 0; /*adapter->functionnumber;*/
312 adapter->cardindex = adapter->port;
313 adapter->memorybase = memaddr;
e9eff9d6
LD		 314 spin_lock_init(&adapter->upr_lock.lock);
315 spin_lock_init(&adapter->bit64reglock.lock);
316 spin_lock_init(&adapter->adapter_lock.lock);
317 spin_lock_init(&adapter->reset_lock.lock);
318 spin_lock_init(&adapter->handle_lock.lock);
4d6f6af8
GKH		 319
320 adapter->card_size = 1;
321 /*
322 Initialize slic_handle array
323 */
324 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
325 /*
326 Start with 1. 0 is an invalid host handle.
327 */
328 for (index = 1, pslic_handle = &adapter->slic_handles[1];
329 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
330
331 pslic_handle->token.handle_index = index;
332 pslic_handle->type = SLIC_HANDLE_FREE;
333 pslic_handle->next = adapter->pfree_slic_handles;
334 adapter->pfree_slic_handles = pslic_handle;
335 }
e9eff9d6
LD		 336 adapter->pshmem = (struct slic_shmem *)
337 pci_alloc_consistent(adapter->pcidev,
66615321 338 sizeof(struct slic_shmem),
e9eff9d6
LD		 339 &adapter->
340 phys_shmem);
4d6f6af8
GKH		 341 ASSERT(adapter->pshmem);
342
e9eff9d6 343 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
4d6f6af8
GKH		 344
345 return;
346}
347
79bd1096
AB		 348static const struct net_device_ops slic_netdev_ops = {
349 .ndo_open = slic_entry_open,
350 .ndo_stop = slic_entry_halt,
351 .ndo_start_xmit = slic_xmit_start,
352 .ndo_do_ioctl = slic_ioctl,
353 .ndo_set_mac_address = slic_mac_set_address,
354 .ndo_get_stats = slic_get_stats,
355 .ndo_set_multicast_list = slic_mcast_set_list,
356 .ndo_validate_addr = eth_validate_addr,
79bd1096
AB		 357 .ndo_change_mtu = eth_change_mtu,
358};
359
e9eff9d6 360static int __devinit slic_entry_probe(struct pci_dev *pcidev,
4d6f6af8
GKH		 361 const struct pci_device_id *pci_tbl_entry)
362{
363 static int cards_found;
364 static int did_version;
1025744a 365 int err = -ENODEV;
4d6f6af8 366 struct net_device *netdev;
e9eff9d6 367 struct adapter *adapter;
4d6f6af8 368 void __iomem *memmapped_ioaddr = NULL;
e9eff9d6 369 u32 status = 0;
4d6f6af8
GKH		 370 ulong mmio_start = 0;
371 ulong mmio_len = 0;
e9eff9d6 372 struct sliccard *card = NULL;
4d6f6af8 373
4d6f6af8
GKH		 374 slic_global.dynamic_intagg = dynamic_intagg;
375
376 err = pci_enable_device(pcidev);
377
4d6f6af8
GKH		 378 if (err)
379 return err;
380
381 if (slic_debug > 0 && did_version++ == 0) {
e9ef456e
GKH		 382 printk(KERN_DEBUG "%s\n", slic_banner);
383 printk(KERN_DEBUG "%s\n", slic_proc_version);
4d6f6af8
GKH		 384 }
385
6a35528a 386 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
e8bc9b7a 387 if (err) {
6a35528a 388 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
e8bc9b7a 389 if (err)
1025744a 390 goto err_out_disable_pci;
4d6f6af8
GKH		 391 }
392
4d6f6af8 393 err = pci_request_regions(pcidev, DRV_NAME);
e8bc9b7a 394 if (err)
1025744a 395 goto err_out_disable_pci;
4d6f6af8 396
4d6f6af8
GKH		 397 pci_set_master(pcidev);
398
e9eff9d6 399 netdev = alloc_etherdev(sizeof(struct adapter));
4d6f6af8
GKH		 400 if (!netdev) {
401 err = -ENOMEM;
402 goto err_out_exit_slic_probe;
403 }
4d6f6af8
GKH		 404
405 SET_NETDEV_DEV(netdev, &pcidev->dev);
406
407 pci_set_drvdata(pcidev, netdev);
408 adapter = netdev_priv(netdev);
409 adapter->netdev = netdev;
410 adapter->pcidev = pcidev;
411
412 mmio_start = pci_resource_start(pcidev, 0);
413 mmio_len = pci_resource_len(pcidev, 0);
414
4d6f6af8 415
e8bc9b7a 416/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
4d6f6af8 417 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
4d6f6af8 418 if (!memmapped_ioaddr) {
4bee4f60
GKH		 419 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
420 mmio_len, mmio_start);
1025744a 421 goto err_out_free_netdev;
4d6f6af8
GKH		 422 }
423
4d6f6af8
GKH		 424 slic_config_pci(pcidev);
425
426 slic_init_driver();
427
428 slic_init_adapter(netdev,
429 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
430
431 status = slic_card_locate(adapter);
432 if (status) {
4bee4f60 433 dev_err(&pcidev->dev, "cannot locate card\n");
4d6f6af8
GKH		 434 goto err_out_free_mmio_region;
435 }
436
437 card = adapter->card;
438
439 if (!adapter->allocated) {
440 card->adapters_allocated++;
441 adapter->allocated = 1;
442 }
443
4d6f6af8
GKH		 444 status = slic_card_init(card, adapter);
445
446 if (status != STATUS_SUCCESS) {
447 card->state = CARD_FAIL;
448 adapter->state = ADAPT_FAIL;
449 adapter->linkstate = LINK_DOWN;
4bee4f60 450 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
4d6f6af8
GKH		 451 } else {
452 slic_adapter_set_hwaddr(adapter);
453 }
454
455 netdev->base_addr = (unsigned long)adapter->memorybase;
456 netdev->irq = adapter->irq;
79bd1096 457 netdev->netdev_ops = &slic_netdev_ops;
4d6f6af8
GKH		 458
459 slic_debug_adapter_create(adapter);
460
461 strcpy(netdev->name, "eth%d");
462 err = register_netdev(netdev);
463 if (err) {
4bee4f60 464 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
4d6f6af8
GKH		 465 goto err_out_unmap;
466 }
467
4d6f6af8 468 cards_found++;
4d6f6af8
GKH		 469
470 return status;
471
472err_out_unmap:
473 iounmap(memmapped_ioaddr);
4d6f6af8
GKH		 474err_out_free_mmio_region:
475 release_mem_region(mmio_start, mmio_len);
1025744a
LD		 476err_out_free_netdev:
477 free_netdev(netdev);
4d6f6af8 478err_out_exit_slic_probe:
f25fda72 479 pci_release_regions(pcidev);
1025744a
LD		 480err_out_disable_pci:
481 pci_disable_device(pcidev);
482 return err;
4d6f6af8
GKH		 483}
484
e9eff9d6 485static int slic_entry_open(struct net_device *dev)
4d6f6af8 486{
f8771fa6 487 struct adapter *adapter = netdev_priv(dev);
e9eff9d6
LD		 488 struct sliccard *card = adapter->card;
489 u32 locked = 0;
4d6f6af8
GKH		 490 int status;
491
492 ASSERT(adapter);
493 ASSERT(card);
4d6f6af8
GKH		 494
495 netif_stop_queue(adapter->netdev);
496
e9eff9d6
LD		 497 spin_lock_irqsave(&slic_global.driver_lock.lock,
498 slic_global.driver_lock.flags);
4d6f6af8
GKH		 499 locked = 1;
500 if (!adapter->activated) {
501 card->adapters_activated++;
502 slic_global.num_slic_ports_active++;
503 adapter->activated = 1;
504 }
505 status = slic_if_init(adapter);
506
507 if (status != STATUS_SUCCESS) {
508 if (adapter->activated) {
509 card->adapters_activated--;
510 slic_global.num_slic_ports_active--;
511 adapter->activated = 0;
512 }
513 if (locked) {
e9eff9d6
LD		 514 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
515 slic_global.driver_lock.flags);
4d6f6af8
GKH		 516 locked = 0;
517 }
518 return status;
519 }
4d6f6af8
GKH		 520 if (!card->master)
521 card->master = adapter;
4d6f6af8
GKH		 522
523 if (locked) {
e9eff9d6
LD		 524 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
525 slic_global.driver_lock.flags);
4d6f6af8
GKH		 526 locked = 0;
527 }
4d6f6af8
GKH		 528
529 return STATUS_SUCCESS;
530}
531
e9eff9d6 532static void __devexit slic_entry_remove(struct pci_dev *pcidev)
4d6f6af8
GKH		 533{
534 struct net_device *dev = pci_get_drvdata(pcidev);
e9eff9d6 535 u32 mmio_start = 0;
4d6f6af8 536 uint mmio_len = 0;
f8771fa6 537 struct adapter *adapter = netdev_priv(dev);
e9eff9d6 538 struct sliccard *card;
786ed801 539 struct mcast_address *mcaddr, *mlist;
4d6f6af8
GKH		 540
541 ASSERT(adapter);
4d6f6af8
GKH		 542 slic_adapter_freeresources(adapter);
543 slic_unmap_mmio_space(adapter);
4d6f6af8
GKH		 544 unregister_netdev(dev);
545
546 mmio_start = pci_resource_start(pcidev, 0);
547 mmio_len = pci_resource_len(pcidev, 0);
548
4d6f6af8
GKH		 549 release_mem_region(mmio_start, mmio_len);
550
4d6f6af8 551 iounmap((void __iomem *)dev->base_addr);
786ed801
LD		 552 /* free multicast addresses */
553 mlist = adapter->mcastaddrs;
554 while (mlist) {
555 mcaddr = mlist;
556 mlist = mlist->next;
557 kfree(mcaddr);
558 }
4d6f6af8
GKH		 559 ASSERT(adapter->card);
560 card = adapter->card;
561 ASSERT(card->adapters_allocated);
562 card->adapters_allocated--;
563 adapter->allocated = 0;
4d6f6af8 564 if (!card->adapters_allocated) {
e9eff9d6 565 struct sliccard *curr_card = slic_global.slic_card;
4d6f6af8
GKH		 566 if (curr_card == card) {
567 slic_global.slic_card = card->next;
568 } else {
569 while (curr_card->next != card)
570 curr_card = curr_card->next;
571 ASSERT(curr_card);
572 curr_card->next = card->next;
573 }
574 ASSERT(slic_global.num_slic_cards);
575 slic_global.num_slic_cards--;
576 slic_card_cleanup(card);
577 }
e9eff9d6 578 kfree(dev);
f25fda72 579 pci_release_regions(pcidev);
4d6f6af8
GKH		 580}
581
e9eff9d6 582static int slic_entry_halt(struct net_device *dev)
4d6f6af8 583{
f8771fa6 584 struct adapter *adapter = netdev_priv(dev);
e9eff9d6
LD		 585 struct sliccard *card = adapter->card;
586 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 587
e9eff9d6
LD		 588 spin_lock_irqsave(&slic_global.driver_lock.lock,
589 slic_global.driver_lock.flags);
4d6f6af8 590 ASSERT(card);
77faefa3 591 netif_stop_queue(adapter->netdev);
4d6f6af8
GKH		 592 adapter->state = ADAPT_DOWN;
593 adapter->linkstate = LINK_DOWN;
594 adapter->upr_list = NULL;
595 adapter->upr_busy = 0;
596 adapter->devflags_prev = 0;
4d6f6af8 597 ASSERT(card->adapter[adapter->cardindex] == adapter);
62f691a3 598 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
4d6f6af8
GKH		 599 adapter->all_reg_writes++;
600 adapter->icr_reg_writes++;
601 slic_config_clear(adapter);
4d6f6af8
GKH		 602 if (adapter->activated) {
603 card->adapters_activated--;
604 slic_global.num_slic_ports_active--;
605 adapter->activated = 0;
606 }
607#ifdef AUTOMATIC_RESET
62f691a3 608 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
4d6f6af8
GKH		 609#endif
610 /*
e8bc9b7a 611 * Reset the adapter's cmd queues
4d6f6af8
GKH		 612 */
613 slic_cmdq_reset(adapter);
4d6f6af8
GKH		 614
615#ifdef AUTOMATIC_RESET
e8bc9b7a 616 if (!card->adapters_activated)
4d6f6af8 617 slic_card_init(card, adapter);
4d6f6af8
GKH		 618#endif
619
e9eff9d6
LD		 620 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
621 slic_global.driver_lock.flags);
4d6f6af8
GKH		 622 return STATUS_SUCCESS;
623}
624
e9eff9d6 625static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
4d6f6af8 626{
f8771fa6 627 struct adapter *adapter = netdev_priv(dev);
e52011e4
GKH		 628 struct ethtool_cmd edata;
629 struct ethtool_cmd ecmd;
630 u32 data[7];
631 u32 intagg;
632
4d6f6af8 633 ASSERT(rq);
4d6f6af8
GKH		 634 switch (cmd) {
635 case SIOCSLICSETINTAGG:
e52011e4
GKH		 636 if (copy_from_user(data, rq->ifr_data, 28))
637 return -EFAULT;
638 intagg = data[0];
4bee4f60
GKH		 639 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
640 __func__, intagg);
e52011e4
GKH		 641 slic_intagg_set(adapter, intagg);
642 return 0;
4d6f6af8
GKH		 643
644#ifdef SLIC_TRACE_DUMP_ENABLED
645 case SIOCSLICTRACEDUMP:
646 {
e52011e4 647 u32 value;
4d6f6af8
GKH		 648 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
649
650 if (copy_from_user(data, rq->ifr_data, 28)) {
651 PRINT_ERROR
652 ("slic: copy_from_user FAILED getting \
653 initial simba param\n");
654 return -EFAULT;
655 }
656
657 value = data[0];
658 if (tracemon_request == SLIC_DUMP_DONE) {
659 PRINT_ERROR
660 ("ATK Diagnostic Trace Dump Requested\n");
661 tracemon_request = SLIC_DUMP_REQUESTED;
662 tracemon_request_type = value;
663 tracemon_timestamp = jiffies;
664 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
665 (tracemon_request ==
666 SLIC_DUMP_IN_PROGRESS)) {
667 PRINT_ERROR
668 ("ATK Diagnostic Trace Dump Requested but \
669 already in progress... ignore\n");
670 } else {
671 PRINT_ERROR
672 ("ATK Diagnostic Trace Dump Requested\n");
673 tracemon_request = SLIC_DUMP_REQUESTED;
674 tracemon_request_type = value;
675 tracemon_timestamp = jiffies;
676 }
677 return 0;
678 }
679#endif
4d6f6af8 680 case SIOCETHTOOL:
e52011e4
GKH		 681 ASSERT(adapter);
682 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
683 return -EFAULT;
684
685 if (ecmd.cmd == ETHTOOL_GSET) {
686 edata.supported = (SUPPORTED_10baseT_Half |
687 SUPPORTED_10baseT_Full |
688 SUPPORTED_100baseT_Half |
689 SUPPORTED_100baseT_Full |
690 SUPPORTED_Autoneg | SUPPORTED_MII);
691 edata.port = PORT_MII;
692 edata.transceiver = XCVR_INTERNAL;
693 edata.phy_address = 0;
694 if (adapter->linkspeed == LINK_100MB)
695 edata.speed = SPEED_100;
696 else if (adapter->linkspeed == LINK_10MB)
697 edata.speed = SPEED_10;
698 else
699 edata.speed = 0;
700
701 if (adapter->linkduplex == LINK_FULLD)
702 edata.duplex = DUPLEX_FULL;
703 else
704 edata.duplex = DUPLEX_HALF;
705
706 edata.autoneg = AUTONEG_ENABLE;
707 edata.maxtxpkt = 1;
708 edata.maxrxpkt = 1;
709 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
4d6f6af8
GKH		 710 return -EFAULT;
711
e52011e4
GKH		 712 } else if (ecmd.cmd == ETHTOOL_SSET) {
713 if (!capable(CAP_NET_ADMIN))
714 return -EPERM;
715
716 if (adapter->linkspeed == LINK_100MB)
717 edata.speed = SPEED_100;
718 else if (adapter->linkspeed == LINK_10MB)
719 edata.speed = SPEED_10;
720 else
721 edata.speed = 0;
722
723 if (adapter->linkduplex == LINK_FULLD)
724 edata.duplex = DUPLEX_FULL;
725 else
726 edata.duplex = DUPLEX_HALF;
727
728 edata.autoneg = AUTONEG_ENABLE;
729 edata.maxtxpkt = 1;
730 edata.maxrxpkt = 1;
731 if ((ecmd.speed != edata.speed) ||
732 (ecmd.duplex != edata.duplex)) {
733 u32 speed;
734 u32 duplex;
735
736 if (ecmd.speed == SPEED_10)
737 speed = 0;
4d6f6af8 738 else
e52011e4
GKH		 739 speed = PCR_SPEED_100;
740 if (ecmd.duplex == DUPLEX_FULL)
741 duplex = PCR_DUPLEX_FULL;
4d6f6af8 742 else
e52011e4
GKH		 743 duplex = 0;
744 slic_link_config(adapter, speed, duplex);
745 slic_link_event_handler(adapter);
4d6f6af8 746 }
4d6f6af8 747 }
e52011e4 748 return 0;
4d6f6af8 749 default:
4d6f6af8
GKH		 750 return -EOPNOTSUPP;
751 }
752}
753
754#define XMIT_FAIL_LINK_STATE 1
755#define XMIT_FAIL_ZERO_LENGTH 2
756#define XMIT_FAIL_HOSTCMD_FAIL 3
757
e9eff9d6
LD		 758static void slic_xmit_build_request(struct adapter *adapter,
759 struct slic_hostcmd *hcmd, struct sk_buff *skb)
4d6f6af8 760{
e9eff9d6 761 struct slic_host64_cmd *ihcmd;
4d6f6af8
GKH		 762 ulong phys_addr;
763
764 ihcmd = &hcmd->cmd64;
765
766 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
767 ihcmd->command = IHCMD_XMT_REQ;
768 ihcmd->u.slic_buffers.totlen = skb->len;
e9eff9d6
LD		 769 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
770 PCI_DMA_TODEVICE);
4d6f6af8
GKH		 771 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
772 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
773 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
774#if defined(CONFIG_X86_64)
e9eff9d6
LD		 775 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
776 (u64) hcmd) + 31) >> 5);
4d6f6af8 777#elif defined(CONFIG_X86)
e9eff9d6
LD		 778 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
779 (u32) hcmd) + 31) >> 5);
4d6f6af8
GKH		 780#else
781 Stop Compilation;
782#endif
783}
784
785#define NORMAL_ETHFRAME 0
786
203fe0d2 787static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
4d6f6af8 788{
e9eff9d6 789 struct sliccard *card;
f8771fa6 790 struct adapter *adapter = netdev_priv(dev);
e9eff9d6
LD		 791 struct slic_hostcmd *hcmd = NULL;
792 u32 status = 0;
793 u32 skbtype = NORMAL_ETHFRAME;
794 void *offloadcmd = NULL;
4d6f6af8
GKH		 795
796 card = adapter->card;
797 ASSERT(card);
4d6f6af8
GKH		 798 if ((adapter->linkstate != LINK_UP) ||
799 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
800 status = XMIT_FAIL_LINK_STATE;
801 goto xmit_fail;
802
803 } else if (skb->len == 0) {
804 status = XMIT_FAIL_ZERO_LENGTH;
805 goto xmit_fail;
806 }
807
808 if (skbtype == NORMAL_ETHFRAME) {
809 hcmd = slic_cmdq_getfree(adapter);
810 if (!hcmd) {
811 adapter->xmitq_full = 1;
812 status = XMIT_FAIL_HOSTCMD_FAIL;
813 goto xmit_fail;
814 }
815 ASSERT(hcmd->pslic_handle);
816 ASSERT(hcmd->cmd64.hosthandle ==
817 hcmd->pslic_handle->token.handle_token);
818 hcmd->skb = skb;
819 hcmd->busy = 1;
820 hcmd->type = SLIC_CMD_DUMB;
821 if (skbtype == NORMAL_ETHFRAME)
822 slic_xmit_build_request(adapter, hcmd, skb);
823 }
824 adapter->stats.tx_packets++;
825 adapter->stats.tx_bytes += skb->len;
826
827#ifdef DEBUG_DUMP
828 if (adapter->kill_card) {
68cf95f3 829 struct slic_host64_cmd ihcmd;
4d6f6af8
GKH		 830
831 ihcmd = &hcmd->cmd64;
832
833 ihcmd->flags |= 0x40;
834 adapter->kill_card = 0; /* only do this once */
835 }
836#endif
837 if (hcmd->paddrh == 0) {
62f691a3
GKH		 838 slic_reg32_write(&adapter->slic_regs->slic_cbar,
839 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
4d6f6af8 840 } else {
28980a3c
GKH		 841 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
842 (hcmd->paddrl | hcmd->cmdsize),
843 &adapter->slic_regs->slic_addr_upper,
844 hcmd->paddrh, DONT_FLUSH);
4d6f6af8
GKH		 845 }
846xmit_done:
6ed10654 847 return NETDEV_TX_OK;
4d6f6af8
GKH		 848xmit_fail:
849 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
850 goto xmit_done;
851}
852
e9eff9d6 853static void slic_xmit_fail(struct adapter *adapter,
4d6f6af8 854 struct sk_buff *skb,
e9eff9d6 855 void *cmd, u32 skbtype, u32 status)
4d6f6af8
GKH		 856{
857 if (adapter->xmitq_full)
77faefa3 858 netif_stop_queue(adapter->netdev);
4d6f6af8
GKH		 859 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
860 switch (status) {
861 case XMIT_FAIL_LINK_STATE:
4bee4f60
GKH		 862 dev_err(&adapter->netdev->dev,
863 "reject xmit skb[%p: %x] linkstate[%s] "
864 "adapter[%s:%d] card[%s:%d]\n",
865 skb, skb->pkt_type,
866 SLIC_LINKSTATE(adapter->linkstate),
867 SLIC_ADAPTER_STATE(adapter->state),
868 adapter->state,
869 SLIC_CARD_STATE(adapter->card->state),
870 adapter->card->state);
4d6f6af8
GKH		 871 break;
872 case XMIT_FAIL_ZERO_LENGTH:
4bee4f60
GKH		 873 dev_err(&adapter->netdev->dev,
874 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
875 skb, skb->pkt_type);
4d6f6af8
GKH		 876 break;
877 case XMIT_FAIL_HOSTCMD_FAIL:
4bee4f60
GKH		 878 dev_err(&adapter->netdev->dev,
879 "xmit_start skb[%p] type[%x] No host commands "
880 "available\n", skb, skb->pkt_type);
4d6f6af8
GKH		 881 break;
882 default:
883 ASSERT(0);
884 }
885 }
886 dev_kfree_skb(skb);
887 adapter->stats.tx_dropped++;
888}
889
e9eff9d6
LD		 890static void slic_rcv_handle_error(struct adapter *adapter,
891 struct slic_rcvbuf *rcvbuf)
4d6f6af8 892{
e9eff9d6 893 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
4d6f6af8
GKH		 894
895 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
896 if (hdr->frame_status14 & VRHSTAT_802OE)
897 adapter->if_events.oflow802++;
898 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
899 adapter->if_events.Tprtoflow++;
900 if (hdr->frame_status_b14 & VRHSTATB_802UE)
901 adapter->if_events.uflow802++;
902 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
903 adapter->if_events.rcvearly++;
904 adapter->stats.rx_fifo_errors++;
905 }
906 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
907 adapter->if_events.Bufov++;
908 adapter->stats.rx_over_errors++;
909 }
910 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
911 adapter->if_events.Carre++;
912 adapter->stats.tx_carrier_errors++;
913 }
914 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
915 adapter->if_events.Longe++;
916 if (hdr->frame_status_b14 & VRHSTATB_PREA)
917 adapter->if_events.Invp++;
918 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
919 adapter->if_events.Crc++;
920 adapter->stats.rx_crc_errors++;
921 }
922 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
923 adapter->if_events.Drbl++;
924 if (hdr->frame_status_b14 & VRHSTATB_CODE)
925 adapter->if_events.Code++;
926 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
927 adapter->if_events.TpCsum++;
928 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
929 adapter->if_events.TpHlen++;
930 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
931 adapter->if_events.IpCsum++;
932 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
933 adapter->if_events.IpLen++;
934 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
935 adapter->if_events.IpHlen++;
936 } else {
937 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
e9eff9d6 938 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
4d6f6af8
GKH		 939
940 if (xerr == VGBSTAT_XCSERR)
941 adapter->if_events.TpCsum++;
942 if (xerr == VGBSTAT_XUFLOW)
943 adapter->if_events.Tprtoflow++;
944 if (xerr == VGBSTAT_XHLEN)
945 adapter->if_events.TpHlen++;
946 }
947 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
e9eff9d6 948 u32 nerr =
4d6f6af8
GKH		 949 (hdr->
950 frame_statusGB >> VGBSTAT_NERRSHFT) &
951 VGBSTAT_NERRMSK;
952 if (nerr == VGBSTAT_NCSERR)
953 adapter->if_events.IpCsum++;
954 if (nerr == VGBSTAT_NUFLOW)
955 adapter->if_events.IpLen++;
956 if (nerr == VGBSTAT_NHLEN)
957 adapter->if_events.IpHlen++;
958 }
959 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
e9eff9d6 960 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
4d6f6af8
GKH		 961
962 if (lerr == VGBSTAT_LDEARLY)
963 adapter->if_events.rcvearly++;
964 if (lerr == VGBSTAT_LBOFLO)
965 adapter->if_events.Bufov++;
966 if (lerr == VGBSTAT_LCODERR)
967 adapter->if_events.Code++;
968 if (lerr == VGBSTAT_LDBLNBL)
969 adapter->if_events.Drbl++;
970 if (lerr == VGBSTAT_LCRCERR)
971 adapter->if_events.Crc++;
972 if (lerr == VGBSTAT_LOFLO)
973 adapter->if_events.oflow802++;
974 if (lerr == VGBSTAT_LUFLO)
975 adapter->if_events.uflow802++;
976 }
977 }
978 return;
979}
980
981#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
982#define M_FAST_PATH 0x0040
983
e9eff9d6 984static void slic_rcv_handler(struct adapter *adapter)
4d6f6af8
GKH		 985{
986 struct sk_buff *skb;
e9eff9d6
LD		 987 struct slic_rcvbuf *rcvbuf;
988 u32 frames = 0;
4d6f6af8
GKH		 989
990 while ((skb = slic_rcvqueue_getnext(adapter))) {
e9eff9d6 991 u32 rx_bytes;
4d6f6af8
GKH		 992
993 ASSERT(skb->head);
e9eff9d6 994 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8
GKH		 995 adapter->card->events++;
996 if (rcvbuf->status & IRHDDR_ERR) {
997 adapter->rx_errors++;
998 slic_rcv_handle_error(adapter, rcvbuf);
999 slic_rcvqueue_reinsert(adapter, skb);
1000 continue;
1001 }
1002
e9eff9d6
LD		 1003 if (!slic_mac_filter(adapter, (struct ether_header *)
1004 rcvbuf->data)) {
4d6f6af8
GKH		 1005 slic_rcvqueue_reinsert(adapter, skb);
1006 continue;
1007 }
1008 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1009 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1010 skb_put(skb, rx_bytes);
1011 adapter->stats.rx_packets++;
1012 adapter->stats.rx_bytes += rx_bytes;
1013#if SLIC_OFFLOAD_IP_CHECKSUM
1014 skb->ip_summed = CHECKSUM_UNNECESSARY;
1015#endif
1016
1017 skb->dev = adapter->netdev;
1018 skb->protocol = eth_type_trans(skb, skb->dev);
1019 netif_rx(skb);
1020
1021 ++frames;
1022#if SLIC_INTERRUPT_PROCESS_LIMIT
1023 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1024 adapter->rcv_interrupt_yields++;
1025 break;
1026 }
1027#endif
1028 }
1029 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1030}
1031
e9eff9d6 1032static void slic_xmit_complete(struct adapter *adapter)
4d6f6af8 1033{
e9eff9d6
LD		 1034 struct slic_hostcmd *hcmd;
1035 struct slic_rspbuf *rspbuf;
1036 u32 frames = 0;
1037 struct slic_handle_word slic_handle_word;
4d6f6af8
GKH		 1038
1039 do {
1040 rspbuf = slic_rspqueue_getnext(adapter);
1041 if (!rspbuf)
1042 break;
1043 adapter->xmit_completes++;
1044 adapter->card->events++;
1045 /*
1046 Get the complete host command buffer
1047 */
1048 slic_handle_word.handle_token = rspbuf->hosthandle;
1049 ASSERT(slic_handle_word.handle_index);
1050 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1051 hcmd =
e9eff9d6
LD		 1052 (struct slic_hostcmd *)
1053 adapter->slic_handles[slic_handle_word.handle_index].
1054 address;
1055/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
4d6f6af8
GKH		 1056 ASSERT(hcmd);
1057 ASSERT(hcmd->pslic_handle ==
1058 &adapter->slic_handles[slic_handle_word.handle_index]);
4d6f6af8
GKH		 1059 if (hcmd->type == SLIC_CMD_DUMB) {
1060 if (hcmd->skb)
1061 dev_kfree_skb_irq(hcmd->skb);
1062 slic_cmdq_putdone_irq(adapter, hcmd);
1063 }
1064 rspbuf->status = 0;
1065 rspbuf->hosthandle = 0;
1066 frames++;
1067 } while (1);
1068 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1069}
1070
1071static irqreturn_t slic_interrupt(int irq, void *dev_id)
1072{
e9eff9d6 1073 struct net_device *dev = (struct net_device *)dev_id;
f8771fa6 1074 struct adapter *adapter = netdev_priv(dev);
e9eff9d6 1075 u32 isr;
4d6f6af8
GKH		 1076
1077 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
62f691a3
GKH		 1078 slic_reg32_write(&adapter->slic_regs->slic_icr,
1079 ICR_INT_MASK, FLUSH);
4d6f6af8
GKH		 1080 isr = adapter->isrcopy = adapter->pshmem->isr;
1081 adapter->pshmem->isr = 0;
1082 adapter->num_isrs++;
1083 switch (adapter->card->state) {
1084 case CARD_UP:
1085 if (isr & ~ISR_IO) {
1086 if (isr & ISR_ERR) {
1087 adapter->error_interrupts++;
1088 if (isr & ISR_RMISS) {
1089 int count;
1090 int pre_count;
1091 int errors;
1092
e9eff9d6 1093 struct slic_rcvqueue *rcvq =
4d6f6af8
GKH		 1094 &adapter->rcvqueue;
1095
1096 adapter->
1097 error_rmiss_interrupts++;
1098 if (!rcvq->errors)
1099 rcv_count = rcvq->count;
1100 pre_count = rcvq->count;
1101 errors = rcvq->errors;
1102
1103 while (rcvq->count <
1104 SLIC_RCVQ_FILLTHRESH) {
1105 count =
1106 slic_rcvqueue_fill
1107 (adapter);
1108 if (!count)
1109 break;
1110 }
4d6f6af8 1111 } else if (isr & ISR_XDROP) {
4bee4f60
GKH		 1112 dev_err(&dev->dev,
1113 "isr & ISR_ERR [%x] "
1114 "ISR_XDROP \n", isr);
4d6f6af8 1115 } else {
4bee4f60
GKH		 1116 dev_err(&dev->dev,
1117 "isr & ISR_ERR [%x]\n",
1118 isr);
4d6f6af8
GKH		 1119 }
1120 }
1121
1122 if (isr & ISR_LEVENT) {
4d6f6af8
GKH		 1123 adapter->linkevent_interrupts++;
1124 slic_link_event_handler(adapter);
1125 }
1126
1127 if ((isr & ISR_UPC) ||
1128 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1129 adapter->upr_interrupts++;
1130 slic_upr_request_complete(adapter, isr);
1131 }
1132 }
1133
1134 if (isr & ISR_RCV) {
1135 adapter->rcv_interrupts++;
1136 slic_rcv_handler(adapter);
1137 }
1138
1139 if (isr & ISR_CMD) {
1140 adapter->xmit_interrupts++;
1141 slic_xmit_complete(adapter);
1142 }
1143 break;
1144
1145 case CARD_DOWN:
1146 if ((isr & ISR_UPC) ||
1147 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1148 adapter->upr_interrupts++;
1149 slic_upr_request_complete(adapter, isr);
1150 }
1151 break;
1152
1153 default:
1154 break;
1155 }
1156
1157 adapter->isrcopy = 0;
1158 adapter->all_reg_writes += 2;
1159 adapter->isr_reg_writes++;
62f691a3 1160 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
4d6f6af8
GKH		 1161 } else {
1162 adapter->false_interrupts++;
1163 }
1164 return IRQ_HANDLED;
1165}
1166
1167/*
1168 * slic_link_event_handler -
1169 *
1170 * Initiate a link configuration sequence. The link configuration begins
1171 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1172 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1173 * routine will follow it up witha UP configuration write command, which
1174 * will also complete asynchronously.
1175 *
1176 */
e9eff9d6 1177static void slic_link_event_handler(struct adapter *adapter)
4d6f6af8
GKH		 1178{
1179 int status;
e9eff9d6 1180 struct slic_shmem *pshmem;
4d6f6af8
GKH		 1181
1182 if (adapter->state != ADAPT_UP) {
1183 /* Adapter is not operational. Ignore. */
1184 return;
1185 }
1186
e9eff9d6 1187 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8
GKH		 1188
1189#if defined(CONFIG_X86_64)
4d6f6af8
GKH		 1190 status = slic_upr_request(adapter,
1191 SLIC_UPR_RLSR,
1192 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1193 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1194 0, 0);
1195#elif defined(CONFIG_X86)
1196 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
e9eff9d6 1197 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
4d6f6af8
GKH		 1198 0, 0, 0);
1199#else
1200 Stop compilation;
1201#endif
1202 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1203}
1204
e9eff9d6 1205static void slic_init_cleanup(struct adapter *adapter)
4d6f6af8 1206{
4d6f6af8 1207 if (adapter->intrregistered) {
4d6f6af8
GKH		 1208 adapter->intrregistered = 0;
1209 free_irq(adapter->netdev->irq, adapter->netdev);
1210
1211 }
1212 if (adapter->pshmem) {
4d6f6af8 1213 pci_free_consistent(adapter->pcidev,
66615321 1214 sizeof(struct slic_shmem),
4d6f6af8
GKH		 1215 adapter->pshmem, adapter->phys_shmem);
1216 adapter->pshmem = NULL;
1217 adapter->phys_shmem = (dma_addr_t) NULL;
1218 }
a0a1cbef 1219
4d6f6af8 1220 if (adapter->pingtimerset) {
4d6f6af8
GKH		 1221 adapter->pingtimerset = 0;
1222 del_timer(&adapter->pingtimer);
1223 }
a0a1cbef 1224
4d6f6af8
GKH		 1225 slic_rspqueue_free(adapter);
1226 slic_cmdq_free(adapter);
1227 slic_rcvqueue_free(adapter);
4d6f6af8
GKH		 1228}
1229
e9eff9d6 1230static struct net_device_stats *slic_get_stats(struct net_device *dev)
4d6f6af8 1231{
f8771fa6 1232 struct adapter *adapter = netdev_priv(dev);
4d6f6af8
GKH		 1233
1234 ASSERT(adapter);
6c7aeb65 1235 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
1236 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
1237 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
1238 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1239 dev->stats.tx_heartbeat_errors = 0;
1240 dev->stats.tx_aborted_errors = 0;
1241 dev->stats.tx_window_errors = 0;
1242 dev->stats.tx_fifo_errors = 0;
1243 dev->stats.rx_frame_errors = 0;
1244 dev->stats.rx_length_errors = 0;
1245
1246 return &dev->stats;
4d6f6af8 1247}
4d6f6af8
GKH		 1248
1249/*
1250 * Allocate a mcast_address structure to hold the multicast address.
1251 * Link it in.
1252 */
e9eff9d6 1253static int slic_mcast_add_list(struct adapter *adapter, char *address)
4d6f6af8 1254{
e9eff9d6
LD		 1255 struct mcast_address *mcaddr, *mlist;
1256 bool equaladdr;
4d6f6af8
GKH		 1257
1258 /* Check to see if it already exists */
1259 mlist = adapter->mcastaddrs;
1260 while (mlist) {
1261 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1262 if (equaladdr)
1263 return STATUS_SUCCESS;
1264 mlist = mlist->next;
1265 }
1266
1267 /* Doesn't already exist. Allocate a structure to hold it */
f7ed550b 1268 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
4d6f6af8
GKH		 1269 if (mcaddr == NULL)
1270 return 1;
1271
1272 memcpy(mcaddr->address, address, 6);
1273
1274 mcaddr->next = adapter->mcastaddrs;
1275 adapter->mcastaddrs = mcaddr;
1276
1277 return STATUS_SUCCESS;
1278}
1279
1280/*
1281 * Functions to obtain the CRC corresponding to the destination mac address.
1282 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1283 * the polynomial:
1284 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1285 * x^4 + x^2 + x^1.
1286 *
1287 * After the CRC for the 6 bytes is generated (but before the value is
1288 * complemented),
1289 * we must then transpose the value and return bits 30-23.
1290 *
1291 */
1292static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1293static u32 slic_crc_init; /* Is table initialized */
1294
1295/*
1296 * Contruct the CRC32 table
1297 */
e9eff9d6 1298static void slic_mcast_init_crc32(void)
4d6f6af8 1299{
e9eff9d6
LD		 1300 u32 c; /* CRC shit reg */
1301 u32 e = 0; /* Poly X-or pattern */
4d6f6af8
GKH		 1302 int i; /* counter */
1303 int k; /* byte being shifted into crc */
1304
1305 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1306
b6ac1613 1307 for (i = 0; i < ARRAY_SIZE(p); i++)
4d6f6af8
GKH		 1308 e |= 1L << (31 - p[i]);
1309
1310 for (i = 1; i < 256; i++) {
1311 c = i;
1312 for (k = 8; k; k--)
1313 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1314 slic_crc_table[i] = c;
1315 }
1316}
1317
1318/*
1319 * Return the MAC hast as described above.
1320 */
e9eff9d6 1321static unsigned char slic_mcast_get_mac_hash(char *macaddr)
4d6f6af8 1322{
e9eff9d6
LD		 1323 u32 crc;
1324 char *p;
4d6f6af8 1325 int i;
e9eff9d6 1326 unsigned char machash = 0;
4d6f6af8
GKH		 1327
1328 if (!slic_crc_init) {
1329 slic_mcast_init_crc32();
1330 slic_crc_init = 1;
1331 }
1332
1333 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1334 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1335 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1336
1337 /* Return bits 1-8, transposed */
1338 for (i = 1; i < 9; i++)
1339 machash |= (((crc >> i) & 1) << (8 - i));
1340
1341 return machash;
1342}
1343
e9eff9d6 1344static void slic_mcast_set_bit(struct adapter *adapter, char *address)
4d6f6af8 1345{
e9eff9d6 1346 unsigned char crcpoly;
4d6f6af8
GKH		 1347
1348 /* Get the CRC polynomial for the mac address */
1349 crcpoly = slic_mcast_get_mac_hash(address);
1350
1351 /* We only have space on the SLIC for 64 entries. Lop
1352 * off the top two bits. (2^6 = 64)
1353 */
1354 crcpoly &= 0x3F;
1355
1356 /* OR in the new bit into our 64 bit mask. */
e9eff9d6 1357 adapter->mcastmask |= (u64) 1 << crcpoly;
4d6f6af8
GKH		 1358}
1359
e9eff9d6 1360static void slic_mcast_set_list(struct net_device *dev)
4d6f6af8 1361{
f8771fa6 1362 struct adapter *adapter = netdev_priv(dev);
4d6f6af8
GKH		 1363 int status = STATUS_SUCCESS;
1364 int i;
e9eff9d6 1365 char *addresses;
4d6f6af8
GKH		 1366 struct dev_mc_list *mc_list = dev->mc_list;
1367 int mc_count = dev->mc_count;
1368
1369 ASSERT(adapter);
1370
1371 for (i = 1; i <= mc_count; i++) {
e9eff9d6 1372 addresses = (char *) &mc_list->dmi_addr;
4d6f6af8
GKH		 1373 if (mc_list->dmi_addrlen == 6) {
1374 status = slic_mcast_add_list(adapter, addresses);
1375 if (status != STATUS_SUCCESS)
1376 break;
1377 } else {
1378 status = -EINVAL;
1379 break;
1380 }
1381 slic_mcast_set_bit(adapter, addresses);
1382 mc_list = mc_list->next;
1383 }
1384
4d6f6af8
GKH		 1385 if (adapter->devflags_prev != dev->flags) {
1386 adapter->macopts = MAC_DIRECTED;
1387 if (dev->flags) {
1388 if (dev->flags & IFF_BROADCAST)
1389 adapter->macopts |= MAC_BCAST;
1390 if (dev->flags & IFF_PROMISC)
1391 adapter->macopts |= MAC_PROMISC;
1392 if (dev->flags & IFF_ALLMULTI)
1393 adapter->macopts |= MAC_ALLMCAST;
1394 if (dev->flags & IFF_MULTICAST)
1395 adapter->macopts |= MAC_MCAST;
1396 }
1397 adapter->devflags_prev = dev->flags;
b574488e 1398 slic_config_set(adapter, true);
4d6f6af8
GKH		 1399 } else {
1400 if (status == STATUS_SUCCESS)
1401 slic_mcast_set_mask(adapter);
1402 }
1403 return;
1404}
1405
e9eff9d6 1406static void slic_mcast_set_mask(struct adapter *adapter)
4d6f6af8 1407{
e9eff9d6 1408 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 1409
4d6f6af8
GKH		 1410 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1411 /* Turn on all multicast addresses. We have to do this for
1412 * promiscuous mode as well as ALLMCAST mode. It saves the
1413 * Microcode from having to keep state about the MAC
1414 * configuration.
1415 */
62f691a3
GKH		 1416 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1417 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
1418 FLUSH);
4d6f6af8
GKH		 1419 } else {
1420 /* Commit our multicast mast to the SLIC by writing to the
1421 * multicast address mask registers
1422 */
62f691a3
GKH		 1423 slic_reg32_write(&slic_regs->slic_mcastlow,
1424 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1425 slic_reg32_write(&slic_regs->slic_mcasthigh,
1426 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
4d6f6af8
GKH		 1427 }
1428}
1429
e9eff9d6 1430static void slic_timer_ping(ulong dev)
4d6f6af8 1431{
e9eff9d6
LD		 1432 struct adapter *adapter;
1433 struct sliccard *card;
4d6f6af8
GKH		 1434
1435 ASSERT(dev);
4bcd4267 1436 adapter = netdev_priv((struct net_device *)dev);
4d6f6af8
GKH		 1437 ASSERT(adapter);
1438 card = adapter->card;
1439 ASSERT(card);
4d6f6af8 1440
db7a673a 1441 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
4d6f6af8
GKH		 1442 add_timer(&adapter->pingtimer);
1443}
1444
4d6f6af8
GKH		 1445/*
1446 * slic_if_init
1447 *
1448 * Perform initialization of our slic interface.
1449 *
1450 */
e9eff9d6 1451static int slic_if_init(struct adapter *adapter)
4d6f6af8 1452{
e9eff9d6 1453 struct sliccard *card = adapter->card;
4d6f6af8 1454 struct net_device *dev = adapter->netdev;
e9eff9d6
LD		 1455 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1456 struct slic_shmem *pshmem;
4d6f6af8
GKH		 1457 int status = 0;
1458
1459 ASSERT(card);
4d6f6af8
GKH		 1460
1461 /* adapter should be down at this point */
1462 if (adapter->state != ADAPT_DOWN) {
4bee4f60
GKH		 1463 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
1464 __func__);
4d6f6af8
GKH		 1465 return -EIO;
1466 }
1467 ASSERT(adapter->linkstate == LINK_DOWN);
1468
1469 adapter->devflags_prev = dev->flags;
1470 adapter->macopts = MAC_DIRECTED;
1471 if (dev->flags) {
e8bc9b7a 1472 if (dev->flags & IFF_BROADCAST)
4d6f6af8 1473 adapter->macopts |= MAC_BCAST;
e8bc9b7a 1474 if (dev->flags & IFF_PROMISC)
4d6f6af8 1475 adapter->macopts |= MAC_PROMISC;
e8bc9b7a 1476 if (dev->flags & IFF_ALLMULTI)
4d6f6af8 1477 adapter->macopts |= MAC_ALLMCAST;
e8bc9b7a 1478 if (dev->flags & IFF_MULTICAST)
4d6f6af8 1479 adapter->macopts |= MAC_MCAST;
4d6f6af8
GKH		 1480 }
1481 status = slic_adapter_allocresources(adapter);
1482 if (status != STATUS_SUCCESS) {
4bee4f60
GKH		 1483 dev_err(&dev->dev,
1484 "%s: slic_adapter_allocresources FAILED %x\n",
1485 __func__, status);
4d6f6af8
GKH		 1486 slic_adapter_freeresources(adapter);
1487 return status;
1488 }
1489
1490 if (!adapter->queues_initialized) {
4d6f6af8
GKH		 1491 if (slic_rspqueue_init(adapter))
1492 return -ENOMEM;
4d6f6af8
GKH		 1493 if (slic_cmdq_init(adapter))
1494 return -ENOMEM;
4d6f6af8
GKH		 1495 if (slic_rcvqueue_init(adapter))
1496 return -ENOMEM;
1497 adapter->queues_initialized = 1;
1498 }
4d6f6af8 1499
62f691a3 1500 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
e9eff9d6 1501 mdelay(1);
4d6f6af8
GKH		 1502
1503 if (!adapter->isp_initialized) {
e9eff9d6 1504 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8 1505
e9eff9d6
LD		 1506 spin_lock_irqsave(&adapter->bit64reglock.lock,
1507 adapter->bit64reglock.flags);
4d6f6af8
GKH		 1508
1509#if defined(CONFIG_X86_64)
62f691a3
GKH		 1510 slic_reg32_write(&slic_regs->slic_addr_upper,
1511 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1512 slic_reg32_write(&slic_regs->slic_isp,
1513 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
4d6f6af8 1514#elif defined(CONFIG_X86)
62f691a3
GKH		 1515 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1516 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
4d6f6af8
GKH		 1517#else
1518 Stop Compilations
1519#endif
e9eff9d6
LD		 1520 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1521 adapter->bit64reglock.flags);
4d6f6af8
GKH		 1522 adapter->isp_initialized = 1;
1523 }
1524
1525 adapter->state = ADAPT_UP;
1526 if (!card->loadtimerset) {
1527 init_timer(&card->loadtimer);
1528 card->loadtimer.expires =
db7a673a 1529 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
4d6f6af8
GKH		 1530 card->loadtimer.data = (ulong) card;
1531 card->loadtimer.function = &slic_timer_load_check;
1532 add_timer(&card->loadtimer);
1533
1534 card->loadtimerset = 1;
1535 }
a0a1cbef 1536
4d6f6af8 1537 if (!adapter->pingtimerset) {
4d6f6af8
GKH		 1538 init_timer(&adapter->pingtimer);
1539 adapter->pingtimer.expires =
db7a673a 1540 jiffies + (PING_TIMER_INTERVAL * HZ);
4d6f6af8
GKH		 1541 adapter->pingtimer.data = (ulong) dev;
1542 adapter->pingtimer.function = &slic_timer_ping;
1543 add_timer(&adapter->pingtimer);
1544 adapter->pingtimerset = 1;
1545 adapter->card->pingstatus = ISR_PINGMASK;
1546 }
4d6f6af8
GKH		 1547
1548 /*
1549 * clear any pending events, then enable interrupts
1550 */
4d6f6af8
GKH		 1551 adapter->isrcopy = 0;
1552 adapter->pshmem->isr = 0;
62f691a3
GKH		 1553 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
1554 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
4d6f6af8 1555
4d6f6af8
GKH		 1556 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1557 slic_link_event_handler(adapter);
1558
4d6f6af8
GKH		 1559 return STATUS_SUCCESS;
1560}
1561
e9eff9d6 1562static void slic_unmap_mmio_space(struct adapter *adapter)
4d6f6af8 1563{
4d6f6af8
GKH		 1564 if (adapter->slic_regs)
1565 iounmap(adapter->slic_regs);
1566 adapter->slic_regs = NULL;
4d6f6af8
GKH		 1567}
1568
e9eff9d6 1569static int slic_adapter_allocresources(struct adapter *adapter)
4d6f6af8
GKH		 1570{
1571 if (!adapter->intrregistered) {
1572 int retval;
1573
e9eff9d6
LD		 1574 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1575 slic_global.driver_lock.flags);
4d6f6af8
GKH		 1576
1577 retval = request_irq(adapter->netdev->irq,
1578 &slic_interrupt,
1579 IRQF_SHARED,
1580 adapter->netdev->name, adapter->netdev);
1581
e9eff9d6
LD		 1582 spin_lock_irqsave(&slic_global.driver_lock.lock,
1583 slic_global.driver_lock.flags);
4d6f6af8
GKH		 1584
1585 if (retval) {
4bee4f60
GKH		 1586 dev_err(&adapter->netdev->dev,
1587 "request_irq (%s) FAILED [%x]\n",
1588 adapter->netdev->name, retval);
4d6f6af8
GKH		 1589 return retval;
1590 }
1591 adapter->intrregistered = 1;
4d6f6af8
GKH		 1592 }
1593 return STATUS_SUCCESS;
1594}
1595
e9eff9d6 1596static void slic_config_pci(struct pci_dev *pcidev)
4d6f6af8
GKH		 1597{
1598 u16 pci_command;
1599 u16 new_command;
1600
1601 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
4d6f6af8
GKH		 1602
1603 new_command = pci_command | PCI_COMMAND_MASTER
1604 | PCI_COMMAND_MEMORY
1605 | PCI_COMMAND_INVALIDATE
1606 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
e8bc9b7a 1607 if (pci_command != new_command)
4d6f6af8 1608 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
4d6f6af8
GKH		 1609}
1610
e9eff9d6 1611static void slic_adapter_freeresources(struct adapter *adapter)
4d6f6af8 1612{
4d6f6af8 1613 slic_init_cleanup(adapter);
e9eff9d6 1614 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
4d6f6af8
GKH		 1615 adapter->error_interrupts = 0;
1616 adapter->rcv_interrupts = 0;
1617 adapter->xmit_interrupts = 0;
1618 adapter->linkevent_interrupts = 0;
1619 adapter->upr_interrupts = 0;
1620 adapter->num_isrs = 0;
1621 adapter->xmit_completes = 0;
1622 adapter->rcv_broadcasts = 0;
1623 adapter->rcv_multicasts = 0;
1624 adapter->rcv_unicasts = 0;
4d6f6af8
GKH		 1625}
1626
1627/*
1628 * slic_link_config
1629 *
1630 * Write phy control to configure link duplex/speed
1631 *
1632 */
e9eff9d6
LD		 1633static void slic_link_config(struct adapter *adapter,
1634 u32 linkspeed, u32 linkduplex)
4d6f6af8 1635{
62f691a3 1636 u32 __iomem *wphy;
e9eff9d6
LD		 1637 u32 speed;
1638 u32 duplex;
1639 u32 phy_config;
1640 u32 phy_advreg;
1641 u32 phy_gctlreg;
4d6f6af8 1642
e8bc9b7a 1643 if (adapter->state != ADAPT_UP)
4d6f6af8 1644 return;
4d6f6af8
GKH		 1645
1646 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1647 || (adapter->devid == SLIC_2GB_DEVICE_ID));
1648
1649 if (linkspeed > LINK_1000MB)
1650 linkspeed = LINK_AUTOSPEED;
1651 if (linkduplex > LINK_AUTOD)
1652 linkduplex = LINK_AUTOD;
1653
62f691a3
GKH		 1654 wphy = &adapter->slic_regs->slic_wphy;
1655
4d6f6af8
GKH		 1656 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
1657 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
1658 /* We've got a fiber gigabit interface, and register
1659 * 4 is different in fiber mode than in copper mode
1660 */
1661
1662 /* advertise FD only @1000 Mb */
1663 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
1664 /* enable PAUSE frames */
1665 phy_advreg |= PAR_ASYMPAUSE_FIBER;
62f691a3 1666 slic_reg32_write(wphy, phy_advreg, FLUSH);
4d6f6af8
GKH		 1667
1668 if (linkspeed == LINK_AUTOSPEED) {
1669 /* reset phy, enable auto-neg */
1670 phy_config =
1671 (MIICR_REG_PCR |
1672 (PCR_RESET | PCR_AUTONEG |
1673 PCR_AUTONEG_RST));
62f691a3 1674 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1675 } else { /* forced 1000 Mb FD*/
1676 /* power down phy to break link
1677 this may not work) */
1678 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
62f691a3 1679 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1680 /* wait, Marvell says 1 sec,
1681 try to get away with 10 ms */
e9eff9d6 1682 mdelay(10);
4d6f6af8
GKH		 1683
1684 /* disable auto-neg, set speed/duplex,
1685 soft reset phy, powerup */
1686 phy_config =
1687 (MIICR_REG_PCR |
1688 (PCR_RESET | PCR_SPEED_1000 |
1689 PCR_DUPLEX_FULL));
62f691a3 1690 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1691 }
1692 } else { /* copper gigabit */
1693
1694 /* Auto-Negotiate or 1000 Mb must be auto negotiated
1695 * We've got a copper gigabit interface, and
1696 * register 4 is different in copper mode than
1697 * in fiber mode
1698 */
1699 if (linkspeed == LINK_AUTOSPEED) {
1700 /* advertise 10/100 Mb modes */
1701 phy_advreg =
1702 (MIICR_REG_4 |
1703 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
1704 | PAR_ADV10HD));
1705 } else {
1706 /* linkspeed == LINK_1000MB -
1707 don't advertise 10/100 Mb modes */
1708 phy_advreg = MIICR_REG_4;
1709 }
1710 /* enable PAUSE frames */
1711 phy_advreg |= PAR_ASYMPAUSE;
1712 /* required by the Cicada PHY */
1713 phy_advreg |= PAR_802_3;
62f691a3 1714 slic_reg32_write(wphy, phy_advreg, FLUSH);
4d6f6af8
GKH		 1715 /* advertise FD only @1000 Mb */
1716 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
62f691a3 1717 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
4d6f6af8
GKH		 1718
1719 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1720 /* if a Marvell PHY
1721 enable auto crossover */
1722 phy_config =
1723 (MIICR_REG_16 | (MRV_REG16_XOVERON));
62f691a3 1724 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1725
1726 /* reset phy, enable auto-neg */
1727 phy_config =
1728 (MIICR_REG_PCR |
1729 (PCR_RESET | PCR_AUTONEG |
1730 PCR_AUTONEG_RST));
62f691a3 1731 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1732 } else { /* it's a Cicada PHY */
1733 /* enable and restart auto-neg (don't reset) */
1734 phy_config =
1735 (MIICR_REG_PCR |
1736 (PCR_AUTONEG | PCR_AUTONEG_RST));
62f691a3 1737 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1738 }
1739 }
1740 } else {
1741 /* Forced 10/100 */
1742 if (linkspeed == LINK_10MB)
1743 speed = 0;
1744 else
1745 speed = PCR_SPEED_100;
1746 if (linkduplex == LINK_HALFD)
1747 duplex = 0;
1748 else
1749 duplex = PCR_DUPLEX_FULL;
1750
1751 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1752 /* if a Marvell PHY
1753 disable auto crossover */
1754 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
62f691a3 1755 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1756 }
1757
1758 /* power down phy to break link (this may not work) */
1759 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
62f691a3 1760 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1761
1762 /* wait, Marvell says 1 sec, try to get away with 10 ms */
e9eff9d6 1763 mdelay(10);
4d6f6af8
GKH		 1764
1765 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1766 /* if a Marvell PHY
1767 disable auto-neg, set speed,
1768 soft reset phy, powerup */
1769 phy_config =
1770 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
62f691a3 1771 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1772 } else { /* it's a Cicada PHY */
1773 /* disable auto-neg, set speed, powerup */
1774 phy_config = (MIICR_REG_PCR | (speed | duplex));
62f691a3 1775 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1776 }
1777 }
4d6f6af8
GKH		 1778}
1779
e9eff9d6 1780static void slic_card_cleanup(struct sliccard *card)
4d6f6af8 1781{
4d6f6af8
GKH		 1782 if (card->loadtimerset) {
1783 card->loadtimerset = 0;
1784 del_timer(&card->loadtimer);
1785 }
1786
1787 slic_debug_card_destroy(card);
1788
e9eff9d6 1789 kfree(card);
4d6f6af8
GKH		 1790}
1791
e9eff9d6 1792static int slic_card_download_gbrcv(struct adapter *adapter)
4d6f6af8 1793{
470c5736
LD		 1794 const struct firmware *fw;
1795 const char *file = "";
1796 int ret;
e9eff9d6
LD		 1797 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1798 u32 codeaddr;
874073ea
LD		 1799 u32 instruction;
1800 int index = 0;
e9eff9d6 1801 u32 rcvucodelen = 0;
4d6f6af8
GKH		 1802
1803 switch (adapter->devid) {
1804 case SLIC_2GB_DEVICE_ID:
a390c479 1805 file = "slicoss/oasisrcvucode.sys";
4d6f6af8
GKH		 1806 break;
1807 case SLIC_1GB_DEVICE_ID:
a390c479 1808 file = "slicoss/gbrcvucode.sys";
470c5736
LD		 1809 break;
1810 default:
1811 ASSERT(0);
1812 break;
1813 }
1814
1815 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1816 if (ret) {
4bee4f60
GKH		 1817 dev_err(&adapter->pcidev->dev,
1818 "SLICOSS: Failed to load firmware %s\n", file);
470c5736
LD		 1819 return ret;
1820 }
1821
874073ea
LD		 1822 rcvucodelen = *(u32 *)(fw->data + index);
1823 index += 4;
470c5736
LD		 1824 switch (adapter->devid) {
1825 case SLIC_2GB_DEVICE_ID:
1826 if (rcvucodelen != OasisRcvUCodeLen)
1827 return -EINVAL;
1828 break;
1829 case SLIC_1GB_DEVICE_ID:
1830 if (rcvucodelen != GBRcvUCodeLen)
1831 return -EINVAL;
4d6f6af8
GKH		 1832 break;
1833 default:
1834 ASSERT(0);
1835 break;
1836 }
4d6f6af8 1837 /* start download */
62f691a3 1838 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
4d6f6af8
GKH		 1839 /* download the rcv sequencer ucode */
1840 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
1841 /* write out instruction address */
62f691a3 1842 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
4d6f6af8 1843
874073ea
LD		 1844 instruction = *(u32 *)(fw->data + index);
1845 index += 4;
4d6f6af8 1846 /* write out the instruction data low addr */
62f691a3 1847 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
4d6f6af8 1848
874073ea
LD		 1849 instruction = *(u8 *)(fw->data + index);
1850 index++;
4d6f6af8 1851 /* write out the instruction data high addr */
62f691a3
GKH		 1852 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
1853 FLUSH);
4d6f6af8
GKH		 1854 }
1855
1856 /* download finished */
470c5736 1857 release_firmware(fw);
62f691a3 1858 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
4d6f6af8
GKH		 1859 return 0;
1860}
1861
e9eff9d6 1862static int slic_card_download(struct adapter *adapter)
4d6f6af8 1863{
470c5736
LD		 1864 const struct firmware *fw;
1865 const char *file = "";
1866 int ret;
e9eff9d6 1867 u32 section;
4d6f6af8
GKH		 1868 int thissectionsize;
1869 int codeaddr;
e9eff9d6 1870 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
874073ea 1871 u32 instruction;
e9eff9d6 1872 u32 baseaddress;
e9eff9d6
LD		 1873 u32 i;
1874 u32 numsects = 0;
1875 u32 sectsize[3];
1876 u32 sectstart[3];
874073ea 1877 int ucode_start, index = 0;
4d6f6af8 1878
4d6f6af8
GKH		 1879 switch (adapter->devid) {
1880 case SLIC_2GB_DEVICE_ID:
a390c479 1881 file = "slicoss/oasisdownload.sys";
4d6f6af8
GKH		 1882 break;
1883 case SLIC_1GB_DEVICE_ID:
a390c479 1884 file = "slicoss/gbdownload.sys";
4d6f6af8
GKH		 1885 break;
1886 default:
1887 ASSERT(0);
1888 break;
1889 }
470c5736
LD		 1890 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1891 if (ret) {
4bee4f60
GKH		 1892 dev_err(&adapter->pcidev->dev,
1893 "SLICOSS: Failed to load firmware %s\n", file);
470c5736
LD		 1894 return ret;
1895 }
874073ea
LD		 1896 numsects = *(u32 *)(fw->data + index);
1897 index += 4;
4d6f6af8 1898 ASSERT(numsects <= 3);
874073ea
LD		 1899 for (i = 0; i < numsects; i++) {
1900 sectsize[i] = *(u32 *)(fw->data + index);
1901 index += 4;
1902 }
1903 for (i = 0; i < numsects; i++) {
1904 sectstart[i] = *(u32 *)(fw->data + index);
1905 index += 4;
1906 }
1907 ucode_start = index;
1908 instruction = *(u32 *)(fw->data + index);
1909 index += 4;
4d6f6af8 1910 for (section = 0; section < numsects; section++) {
4d6f6af8
GKH		 1911 baseaddress = sectstart[section];
1912 thissectionsize = sectsize[section] >> 3;
1913
1914 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
4d6f6af8 1915 /* Write out instruction address */
62f691a3
GKH		 1916 slic_reg32_write(&slic_regs->slic_wcs,
1917 baseaddress + codeaddr, FLUSH);
4d6f6af8 1918 /* Write out instruction to low addr */
62f691a3 1919 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
874073ea
LD		 1920 instruction = *(u32 *)(fw->data + index);
1921 index += 4;
1922
4d6f6af8 1923 /* Write out instruction to high addr */
62f691a3 1924 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
874073ea
LD		 1925 instruction = *(u32 *)(fw->data + index);
1926 index += 4;
4d6f6af8
GKH		 1927 }
1928 }
874073ea 1929 index = ucode_start;
4d6f6af8 1930 for (section = 0; section < numsects; section++) {
874073ea 1931 instruction = *(u32 *)(fw->data + index);
4d6f6af8
GKH		 1932 baseaddress = sectstart[section];
1933 if (baseaddress < 0x8000)
1934 continue;
1935 thissectionsize = sectsize[section] >> 3;
1936
4d6f6af8
GKH		 1937 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
1938 /* Write out instruction address */
62f691a3
GKH		 1939 slic_reg32_write(&slic_regs->slic_wcs,
1940 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
1941 FLUSH);
4d6f6af8 1942 /* Write out instruction to low addr */
62f691a3
GKH		 1943 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1944 FLUSH);
874073ea
LD		 1945 instruction = *(u32 *)(fw->data + index);
1946 index += 4;
4d6f6af8 1947 /* Write out instruction to high addr */
62f691a3
GKH		 1948 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1949 FLUSH);
874073ea
LD		 1950 instruction = *(u32 *)(fw->data + index);
1951 index += 4;
1952
4d6f6af8 1953 /* Check SRAM location zero. If it is non-zero. Abort.*/
874073ea 1954/* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
4d6f6af8 1955 if (failure) {
470c5736 1956 release_firmware(fw);
4d6f6af8 1957 return -EIO;
874073ea 1958 }*/
4d6f6af8
GKH		 1959 }
1960 }
470c5736 1961 release_firmware(fw);
4d6f6af8 1962 /* Everything OK, kick off the card */
e9eff9d6 1963 mdelay(10);
62f691a3 1964 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
4d6f6af8
GKH		 1965
1966 /* stall for 20 ms, long enough for ucode to init card
1967 and reach mainloop */
e9eff9d6 1968 mdelay(20);
4d6f6af8 1969
4d6f6af8
GKH		 1970 return STATUS_SUCCESS;
1971}
1972
e9eff9d6 1973static void slic_adapter_set_hwaddr(struct adapter *adapter)
4d6f6af8 1974{
e9eff9d6 1975 struct sliccard *card = adapter->card;
4d6f6af8 1976
4d6f6af8
GKH		 1977 if ((adapter->card) && (card->config_set)) {
1978 memcpy(adapter->macaddr,
1979 card->config.MacInfo[adapter->functionnumber].macaddrA,
e9eff9d6 1980 sizeof(struct slic_config_mac));
4d6f6af8
GKH		 1981 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
1982 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
1983 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
1984 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
1985 }
1986 if (adapter->netdev) {
1987 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
1988 6);
1989 }
1990 }
4d6f6af8
GKH		 1991}
1992
e9eff9d6 1993static void slic_intagg_set(struct adapter *adapter, u32 value)
4d6f6af8 1994{
62f691a3 1995 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
4d6f6af8
GKH		 1996 adapter->card->loadlevel_current = value;
1997}
1998
e9eff9d6 1999static int slic_card_init(struct sliccard *card, struct adapter *adapter)
4d6f6af8 2000{
e9eff9d6
LD		 2001 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2002 struct slic_eeprom *peeprom;
2003 struct oslic_eeprom *pOeeprom;
4d6f6af8 2004 dma_addr_t phys_config;
e9eff9d6
LD		 2005 u32 phys_configh;
2006 u32 phys_configl;
2007 u32 i = 0;
2008 struct slic_shmem *pshmem;
4d6f6af8
GKH		 2009 int status;
2010 uint macaddrs = card->card_size;
2011 ushort eecodesize;
2012 ushort dramsize;
2013 ushort ee_chksum;
2014 ushort calc_chksum;
e9eff9d6
LD		 2015 struct slic_config_mac *pmac;
2016 unsigned char fruformat;
2017 unsigned char oemfruformat;
2018 struct atk_fru *patkfru;
68cf95f3 2019 union oemfru *poemfru;
4d6f6af8 2020
4d6f6af8
GKH		 2021 /* Reset everything except PCI configuration space */
2022 slic_soft_reset(adapter);
2023
2024 /* Download the microcode */
2025 status = slic_card_download(adapter);
2026
2027 if (status != STATUS_SUCCESS) {
4bee4f60
GKH		 2028 dev_err(&adapter->pcidev->dev,
2029 "download failed bus %d slot %d\n",
2030 adapter->busnumber, adapter->slotnumber);
4d6f6af8
GKH		 2031 return status;
2032 }
2033
2034 if (!card->config_set) {
2035 peeprom = pci_alloc_consistent(adapter->pcidev,
e9eff9d6 2036 sizeof(struct slic_eeprom),
4d6f6af8
GKH		 2037 &phys_config);
2038
2039 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2040 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2041
4d6f6af8 2042 if (!peeprom) {
4bee4f60
GKH		 2043 dev_err(&adapter->pcidev->dev,
2044 "eeprom read failed to get memory "
2045 "bus %d slot %d\n", adapter->busnumber,
2046 adapter->slotnumber);
4d6f6af8
GKH		 2047 return -ENOMEM;
2048 } else {
e9eff9d6 2049 memset(peeprom, 0, sizeof(struct slic_eeprom));
4d6f6af8 2050 }
62f691a3 2051 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
e9eff9d6
LD		 2052 mdelay(1);
2053 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8 2054
e9eff9d6
LD		 2055 spin_lock_irqsave(&adapter->bit64reglock.lock,
2056 adapter->bit64reglock.flags);
62f691a3
GKH		 2057 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2058 slic_reg32_write(&slic_regs->slic_isp,
2059 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
e9eff9d6
LD		 2060 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2061 adapter->bit64reglock.flags);
4d6f6af8
GKH		 2062
2063 slic_config_get(adapter, phys_configl, phys_configh);
2064
2065 for (;;) {
2066 if (adapter->pshmem->isr) {
4d6f6af8
GKH		 2067 if (adapter->pshmem->isr & ISR_UPC) {
2068 adapter->pshmem->isr = 0;
28980a3c
GKH		 2069 slic_reg64_write(adapter,
2070 &slic_regs->slic_isp, 0,
2071 &slic_regs->slic_addr_upper,
2072 0, FLUSH);
62f691a3
GKH		 2073 slic_reg32_write(&slic_regs->slic_isr,
2074 0, FLUSH);
4d6f6af8
GKH		 2075
2076 slic_upr_request_complete(adapter, 0);
2077 break;
2078 } else {
2079 adapter->pshmem->isr = 0;
62f691a3
GKH		 2080 slic_reg32_write(&slic_regs->slic_isr,
2081 0, FLUSH);
4d6f6af8
GKH		 2082 }
2083 } else {
e9eff9d6 2084 mdelay(1);
4d6f6af8
GKH		 2085 i++;
2086 if (i > 5000) {
4bee4f60
GKH		 2087 dev_err(&adapter->pcidev->dev,
2088 "%d config data fetch timed out!\n",
2089 adapter->port);
28980a3c
GKH		 2090 slic_reg64_write(adapter,
2091 &slic_regs->slic_isp, 0,
2092 &slic_regs->slic_addr_upper,
2093 0, FLUSH);
4d6f6af8
GKH		 2094 return -EINVAL;
2095 }
2096 }
2097 }
2098
2099 switch (adapter->devid) {
2100 /* Oasis card */
2101 case SLIC_2GB_DEVICE_ID:
2102 /* extract EEPROM data and pointers to EEPROM data */
e9eff9d6 2103 pOeeprom = (struct oslic_eeprom *) peeprom;
4d6f6af8
GKH		 2104 eecodesize = pOeeprom->EecodeSize;
2105 dramsize = pOeeprom->DramSize;
2106 pmac = pOeeprom->MacInfo;
2107 fruformat = pOeeprom->FruFormat;
2108 patkfru = &pOeeprom->AtkFru;
2109 oemfruformat = pOeeprom->OemFruFormat;
2110 poemfru = &pOeeprom->OemFru;
2111 macaddrs = 2;
2112 /* Minor kludge for Oasis card
2113 get 2 MAC addresses from the
2114 EEPROM to ensure that function 1
2115 gets the Port 1 MAC address */
2116 break;
2117 default:
2118 /* extract EEPROM data and pointers to EEPROM data */
2119 eecodesize = peeprom->EecodeSize;
2120 dramsize = peeprom->DramSize;
2121 pmac = peeprom->u2.mac.MacInfo;
2122 fruformat = peeprom->FruFormat;
2123 patkfru = &peeprom->AtkFru;
2124 oemfruformat = peeprom->OemFruFormat;
2125 poemfru = &peeprom->OemFru;
2126 break;
2127 }
2128
b574488e 2129 card->config.EepromValid = false;
4d6f6af8
GKH		 2130
2131 /* see if the EEPROM is valid by checking it's checksum */
2132 if ((eecodesize <= MAX_EECODE_SIZE) &&
2133 (eecodesize >= MIN_EECODE_SIZE)) {
2134
2135 ee_chksum =
e9eff9d6 2136 *(u16 *) ((char *) peeprom + (eecodesize - 2));
4d6f6af8
GKH		 2137 /*
2138 calculate the EEPROM checksum
2139 */
2140 calc_chksum =
e9eff9d6 2141 ~slic_eeprom_cksum((char *) peeprom,
4d6f6af8
GKH		 2142 (eecodesize - 2));
2143 /*
2144 if the ucdoe chksum flag bit worked,
2145 we wouldn't need this shit
2146 */
2147 if (ee_chksum == calc_chksum)
b574488e 2148 card->config.EepromValid = true;
4d6f6af8
GKH		 2149 }
2150 /* copy in the DRAM size */
2151 card->config.DramSize = dramsize;
2152
2153 /* copy in the MAC address(es) */
2154 for (i = 0; i < macaddrs; i++) {
2155 memcpy(&card->config.MacInfo[i],
e9eff9d6 2156 &pmac[i], sizeof(struct slic_config_mac));
4d6f6af8 2157 }
4d6f6af8
GKH		 2158
2159 /* copy the Alacritech FRU information */
2160 card->config.FruFormat = fruformat;
e9eff9d6
LD		 2161 memcpy(&card->config.AtkFru, patkfru,
2162 sizeof(struct atk_fru));
4d6f6af8
GKH		 2163
2164 pci_free_consistent(adapter->pcidev,
e9eff9d6 2165 sizeof(struct slic_eeprom),
4d6f6af8 2166 peeprom, phys_config);
4d6f6af8
GKH		 2167
2168 if ((!card->config.EepromValid) &&
2169 (adapter->reg_params.fail_on_bad_eeprom)) {
28980a3c
GKH		 2170 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2171 &slic_regs->slic_addr_upper,
2172 0, FLUSH);
4bee4f60
GKH		 2173 dev_err(&adapter->pcidev->dev,
2174 "unsupported CONFIGURATION EEPROM invalid\n");
4d6f6af8
GKH		 2175 return -EINVAL;
2176 }
2177
2178 card->config_set = 1;
2179 }
2180
2181 if (slic_card_download_gbrcv(adapter)) {
4bee4f60
GKH		 2182 dev_err(&adapter->pcidev->dev,
2183 "unable to download GB receive microcode\n");
4d6f6af8
GKH		 2184 return -EINVAL;
2185 }
2186
e8bc9b7a 2187 if (slic_global.dynamic_intagg)
4d6f6af8 2188 slic_intagg_set(adapter, 0);
e8bc9b7a 2189 else
4d6f6af8 2190 slic_intagg_set(adapter, intagg_delay);
4d6f6af8
GKH		 2191
2192 /*
2193 * Initialize ping status to "ok"
2194 */
2195 card->pingstatus = ISR_PINGMASK;
2196
4d6f6af8
GKH		 2197 /*
2198 * Lastly, mark our card state as up and return success
2199 */
2200 card->state = CARD_UP;
2201 card->reset_in_progress = 0;
4d6f6af8
GKH		 2202
2203 return STATUS_SUCCESS;
2204}
2205
e9eff9d6 2206static u32 slic_card_locate(struct adapter *adapter)
4d6f6af8 2207{
e9eff9d6
LD		 2208 struct sliccard *card = slic_global.slic_card;
2209 struct physcard *physcard = slic_global.phys_card;
4d6f6af8
GKH		 2210 ushort card_hostid;
2211 u16 __iomem *hostid_reg;
2212 uint i;
2213 uint rdhostid_offset = 0;
2214
4d6f6af8
GKH		 2215 switch (adapter->devid) {
2216 case SLIC_2GB_DEVICE_ID:
2217 rdhostid_offset = SLIC_RDHOSTID_2GB;
2218 break;
2219 case SLIC_1GB_DEVICE_ID:
2220 rdhostid_offset = SLIC_RDHOSTID_1GB;
2221 break;
2222 default:
2223 ASSERT(0);
2224 break;
2225 }
2226
2227 hostid_reg =
2228 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2229 rdhostid_offset);
4d6f6af8
GKH		 2230
2231 /* read the 16 bit hostid from SRAM */
4d6f6af8 2232 card_hostid = (ushort) readw(hostid_reg);
4d6f6af8
GKH		 2233
2234 /* Initialize a new card structure if need be */
2235 if (card_hostid == SLIC_HOSTID_DEFAULT) {
e9eff9d6 2236 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
4d6f6af8
GKH		 2237 if (card == NULL)
2238 return -ENOMEM;
2239
2240 card->next = slic_global.slic_card;
2241 slic_global.slic_card = card;
4d6f6af8
GKH		 2242 card->busnumber = adapter->busnumber;
2243 card->slotnumber = adapter->slotnumber;
2244
2245 /* Find an available cardnum */
2246 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2247 if (slic_global.cardnuminuse[i] == 0) {
2248 slic_global.cardnuminuse[i] = 1;
2249 card->cardnum = i;
2250 break;
2251 }
2252 }
2253 slic_global.num_slic_cards++;
4d6f6af8
GKH		 2254
2255 slic_debug_card_create(card);
2256 } else {
4d6f6af8
GKH		 2257 /* Card exists, find the card this adapter belongs to */
2258 while (card) {
4d6f6af8
GKH		 2259 if (card->cardnum == card_hostid)
2260 break;
2261 card = card->next;
2262 }
2263 }
2264
2265 ASSERT(card);
2266 if (!card)
2267 return STATUS_FAILURE;
2268 /* Put the adapter in the card's adapter list */
2269 ASSERT(card->adapter[adapter->port] == NULL);
2270 if (!card->adapter[adapter->port]) {
2271 card->adapter[adapter->port] = adapter;
2272 adapter->card = card;
2273 }
2274
2275 card->card_size = 1; /* one port per *logical* card */
2276
2277 while (physcard) {
2278 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2279 if (!physcard->adapter[i])
2280 continue;
2281 else
2282 break;
2283 }
2284 ASSERT(i != SLIC_MAX_PORTS);
2285 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2286 break;
2287 physcard = physcard->next;
2288 }
2289 if (!physcard) {
2290 /* no structure allocated for this physical card yet */
f7ed550b 2291 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
4d6f6af8 2292 ASSERT(physcard);
4d6f6af8 2293
4d6f6af8
GKH		 2294 physcard->next = slic_global.phys_card;
2295 slic_global.phys_card = physcard;
2296 physcard->adapters_allocd = 1;
2297 } else {
2298 physcard->adapters_allocd++;
2299 }
2300 /* Note - this is ZERO relative */
2301 adapter->physport = physcard->adapters_allocd - 1;
2302
2303 ASSERT(physcard->adapter[adapter->physport] == NULL);
2304 physcard->adapter[adapter->physport] = adapter;
2305 adapter->physcard = physcard;
4d6f6af8
GKH		 2306
2307 return 0;
2308}
2309
e9eff9d6 2310static void slic_soft_reset(struct adapter *adapter)
4d6f6af8
GKH		 2311{
2312 if (adapter->card->state == CARD_UP) {
62f691a3 2313 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
e9eff9d6 2314 mdelay(1);
4d6f6af8 2315 }
4d6f6af8 2316
62f691a3
GKH		 2317 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
2318 FLUSH);
e9eff9d6 2319 mdelay(1);
4d6f6af8
GKH		 2320}
2321
e9eff9d6 2322static void slic_config_set(struct adapter *adapter, bool linkchange)
4d6f6af8 2323{
e9eff9d6
LD		 2324 u32 value;
2325 u32 RcrReset;
2326 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 2327
4d6f6af8
GKH		 2328 if (linkchange) {
2329 /* Setup MAC */
2330 slic_mac_config(adapter);
2331 RcrReset = GRCR_RESET;
2332 } else {
2333 slic_mac_address_config(adapter);
2334 RcrReset = 0;
2335 }
2336
2337 if (adapter->linkduplex == LINK_FULLD) {
2338 /* setup xmtcfg */
2339 value = (GXCR_RESET | /* Always reset */
2340 GXCR_XMTEN | /* Enable transmit */
2341 GXCR_PAUSEEN); /* Enable pause */
2342
62f691a3 2343 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8
GKH		 2344
2345 /* Setup rcvcfg last */
2346 value = (RcrReset | /* Reset, if linkchange */
2347 GRCR_CTLEN | /* Enable CTL frames */
2348 GRCR_ADDRAEN | /* Address A enable */
2349 GRCR_RCVBAD | /* Rcv bad frames */
2350 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2351 } else {
2352 /* setup xmtcfg */
2353 value = (GXCR_RESET | /* Always reset */
2354 GXCR_XMTEN); /* Enable transmit */
2355
62f691a3 2356 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8
GKH		 2357
2358 /* Setup rcvcfg last */
2359 value = (RcrReset | /* Reset, if linkchange */
2360 GRCR_ADDRAEN | /* Address A enable */
2361 GRCR_RCVBAD | /* Rcv bad frames */
2362 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2363 }
2364
2365 if (adapter->state != ADAPT_DOWN) {
2366 /* Only enable receive if we are restarting or running */
2367 value |= GRCR_RCVEN;
2368 }
2369
2370 if (adapter->macopts & MAC_PROMISC)
2371 value |= GRCR_RCVALL;
2372
62f691a3 2373 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
4d6f6af8
GKH		 2374}
2375
2376/*
2377 * Turn off RCV and XMT, power down PHY
2378 */
e9eff9d6 2379static void slic_config_clear(struct adapter *adapter)
4d6f6af8 2380{
e9eff9d6
LD		 2381 u32 value;
2382 u32 phy_config;
2383 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8
GKH		 2384
2385 /* Setup xmtcfg */
2386 value = (GXCR_RESET | /* Always reset */
2387 GXCR_PAUSEEN); /* Enable pause */
2388
62f691a3 2389 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8
GKH		 2390
2391 value = (GRCR_RESET | /* Always reset */
2392 GRCR_CTLEN | /* Enable CTL frames */
2393 GRCR_ADDRAEN | /* Address A enable */
2394 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2395
62f691a3 2396 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
4d6f6af8
GKH		 2397
2398 /* power down phy */
2399 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
62f691a3 2400 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
4d6f6af8
GKH		 2401}
2402
e9eff9d6
LD		 2403static void slic_config_get(struct adapter *adapter, u32 config,
2404 u32 config_h)
4d6f6af8
GKH		 2405{
2406 int status;
2407
2408 status = slic_upr_request(adapter,
2409 SLIC_UPR_RCONFIG,
e9eff9d6 2410 (u32) config, (u32) config_h, 0, 0);
4d6f6af8
GKH		 2411 ASSERT(status == 0);
2412}
2413
e9eff9d6 2414static void slic_mac_address_config(struct adapter *adapter)
4d6f6af8 2415{
e9eff9d6
LD		 2416 u32 value;
2417 u32 value2;
2418 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 2419
e9eff9d6 2420 value = *(u32 *) &adapter->currmacaddr[2];
4d6f6af8 2421 value = ntohl(value);
62f691a3
GKH		 2422 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
2423 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
4d6f6af8 2424
e9eff9d6 2425 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
4d6f6af8
GKH		 2426 adapter->currmacaddr[1]) & 0xFFFF);
2427
62f691a3
GKH		 2428 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
2429 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
4d6f6af8 2430
4d6f6af8
GKH		 2431 /* Write our multicast mask out to the card. This is done */
2432 /* here in addition to the slic_mcast_addr_set routine */
2433 /* because ALL_MCAST may have been enabled or disabled */
2434 slic_mcast_set_mask(adapter);
2435}
2436
e9eff9d6 2437static void slic_mac_config(struct adapter *adapter)
4d6f6af8 2438{
e9eff9d6
LD		 2439 u32 value;
2440 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8
GKH		 2441
2442 /* Setup GMAC gaps */
2443 if (adapter->linkspeed == LINK_1000MB) {
2444 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
2445 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
2446 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
2447 } else {
2448 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
2449 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
2450 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
2451 }
2452
2453 /* enable GMII */
2454 if (adapter->linkspeed == LINK_1000MB)
2455 value |= GMCR_GBIT;
2456
2457 /* enable fullduplex */
2458 if ((adapter->linkduplex == LINK_FULLD)
2459 || (adapter->macopts & MAC_LOOPBACK)) {
2460 value |= GMCR_FULLD;
2461 }
2462
2463 /* write mac config */
62f691a3 2464 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
4d6f6af8
GKH		 2465
2466 /* setup mac addresses */
2467 slic_mac_address_config(adapter);
2468}
2469
e9eff9d6
LD		 2470static bool slic_mac_filter(struct adapter *adapter,
2471 struct ether_header *ether_frame)
4d6f6af8 2472{
e9eff9d6
LD		 2473 u32 opts = adapter->macopts;
2474 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
2475 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
2476 bool equaladdr;
4d6f6af8 2477
e8bc9b7a 2478 if (opts & MAC_PROMISC)
b574488e 2479 return true;
4d6f6af8
GKH		 2480
2481 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
2482 if (opts & MAC_BCAST) {
2483 adapter->rcv_broadcasts++;
b574488e 2484 return true;
4d6f6af8 2485 } else {
b574488e 2486 return false;
4d6f6af8
GKH		 2487 }
2488 }
2489
2490 if (ether_frame->ether_dhost[0] & 0x01) {
2491 if (opts & MAC_ALLMCAST) {
2492 adapter->rcv_multicasts++;
2493 adapter->stats.multicast++;
b574488e 2494 return true;
4d6f6af8
GKH		 2495 }
2496 if (opts & MAC_MCAST) {
e9eff9d6 2497 struct mcast_address *mcaddr = adapter->mcastaddrs;
4d6f6af8
GKH		 2498
2499 while (mcaddr) {
2500 ETHER_EQ_ADDR(mcaddr->address,
2501 ether_frame->ether_dhost,
2502 equaladdr);
2503 if (equaladdr) {
2504 adapter->rcv_multicasts++;
2505 adapter->stats.multicast++;
b574488e 2506 return true;
4d6f6af8
GKH		 2507 }
2508 mcaddr = mcaddr->next;
2509 }
b574488e 2510 return false;
4d6f6af8 2511 } else {
b574488e 2512 return false;
4d6f6af8
GKH		 2513 }
2514 }
2515 if (opts & MAC_DIRECTED) {
2516 adapter->rcv_unicasts++;
b574488e 2517 return true;
4d6f6af8 2518 }
b574488e 2519 return false;
4d6f6af8
GKH		 2520
2521}
2522
e9eff9d6 2523static int slic_mac_set_address(struct net_device *dev, void *ptr)
4d6f6af8 2524{
f8771fa6 2525 struct adapter *adapter = netdev_priv(dev);
4d6f6af8
GKH		 2526 struct sockaddr *addr = ptr;
2527
4d6f6af8
GKH		 2528 if (netif_running(dev))
2529 return -EBUSY;
2530 if (!adapter)
2531 return -EBUSY;
e8bc9b7a 2532
a71b9978 2533 if (!is_valid_ether_addr(addr->sa_data))
2534 return -EINVAL;
2535
4d6f6af8
GKH		 2536 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2537 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
4d6f6af8 2538
b574488e 2539 slic_config_set(adapter, true);
4d6f6af8
GKH		 2540 return 0;
2541}
2542
e9eff9d6 2543static void slic_timer_load_check(ulong cardaddr)
4d6f6af8 2544{
e9eff9d6
LD		 2545 struct sliccard *card = (struct sliccard *)cardaddr;
2546 struct adapter *adapter = card->master;
62f691a3 2547 u32 __iomem *intagg;
e9eff9d6
LD		 2548 u32 load = card->events;
2549 u32 level = 0;
4d6f6af8 2550
62f691a3
GKH		 2551 intagg = &adapter->slic_regs->slic_intagg;
2552
4d6f6af8
GKH		 2553 if ((adapter) && (adapter->state == ADAPT_UP) &&
2554 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
2555 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
2556 if (adapter->linkspeed == LINK_1000MB)
2557 level = 100;
2558 else {
2559 if (load > SLIC_LOAD_5)
2560 level = SLIC_INTAGG_5;
2561 else if (load > SLIC_LOAD_4)
2562 level = SLIC_INTAGG_4;
2563 else if (load > SLIC_LOAD_3)
2564 level = SLIC_INTAGG_3;
2565 else if (load > SLIC_LOAD_2)
2566 level = SLIC_INTAGG_2;
2567 else if (load > SLIC_LOAD_1)
2568 level = SLIC_INTAGG_1;
2569 else
2570 level = SLIC_INTAGG_0;
2571 }
2572 if (card->loadlevel_current != level) {
2573 card->loadlevel_current = level;
62f691a3 2574 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8
GKH		 2575 }
2576 } else {
2577 if (load > SLIC_LOAD_5)
2578 level = SLIC_INTAGG_5;
2579 else if (load > SLIC_LOAD_4)
2580 level = SLIC_INTAGG_4;
2581 else if (load > SLIC_LOAD_3)
2582 level = SLIC_INTAGG_3;
2583 else if (load > SLIC_LOAD_2)
2584 level = SLIC_INTAGG_2;
2585 else if (load > SLIC_LOAD_1)
2586 level = SLIC_INTAGG_1;
2587 else
2588 level = SLIC_INTAGG_0;
2589 if (card->loadlevel_current != level) {
2590 card->loadlevel_current = level;
62f691a3 2591 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8
GKH		 2592 }
2593 }
2594 }
2595 card->events = 0;
db7a673a 2596 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
4d6f6af8
GKH		 2597 add_timer(&card->loadtimer);
2598}
2599
e9eff9d6 2600static void slic_assert_fail(void)
4d6f6af8 2601{
e9eff9d6
LD		 2602 u32 cpuid;
2603 u32 curr_pid;
4d6f6af8
GKH		 2604 cpuid = smp_processor_id();
2605 curr_pid = current->pid;
2606
4bee4f60
GKH		 2607 printk(KERN_ERR "%s CPU # %d ---- PID # %d\n",
2608 __func__, cpuid, curr_pid);
4d6f6af8
GKH		 2609}
2610
e9eff9d6
LD		 2611static int slic_upr_queue_request(struct adapter *adapter,
2612 u32 upr_request,
2613 u32 upr_data,
2614 u32 upr_data_h,
2615 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8 2616{
e9eff9d6
LD		 2617 struct slic_upr *upr;
2618 struct slic_upr *uprqueue;
4d6f6af8 2619
e9eff9d6 2620 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
e8bc9b7a 2621 if (!upr)
4d6f6af8 2622 return -ENOMEM;
e8bc9b7a 2623
4d6f6af8
GKH		 2624 upr->adapter = adapter->port;
2625 upr->upr_request = upr_request;
2626 upr->upr_data = upr_data;
2627 upr->upr_buffer = upr_buffer;
2628 upr->upr_data_h = upr_data_h;
2629 upr->upr_buffer_h = upr_buffer_h;
2630 upr->next = NULL;
2631 if (adapter->upr_list) {
2632 uprqueue = adapter->upr_list;
2633
2634 while (uprqueue->next)
2635 uprqueue = uprqueue->next;
2636 uprqueue->next = upr;
2637 } else {
2638 adapter->upr_list = upr;
2639 }
2640 return STATUS_SUCCESS;
2641}
2642
e9eff9d6
LD		 2643static int slic_upr_request(struct adapter *adapter,
2644 u32 upr_request,
2645 u32 upr_data,
2646 u32 upr_data_h,
2647 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8
GKH		 2648{
2649 int status;
2650
e9eff9d6 2651 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
4d6f6af8
GKH		 2652 status = slic_upr_queue_request(adapter,
2653 upr_request,
2654 upr_data,
2655 upr_data_h, upr_buffer, upr_buffer_h);
2656 if (status != STATUS_SUCCESS) {
e9eff9d6
LD		 2657 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2658 adapter->upr_lock.flags);
4d6f6af8
GKH		 2659 return status;
2660 }
2661 slic_upr_start(adapter);
e9eff9d6
LD		 2662 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2663 adapter->upr_lock.flags);
4d6f6af8
GKH		 2664 return STATUS_PENDING;
2665}
2666
e9eff9d6 2667static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
4d6f6af8 2668{
e9eff9d6
LD		 2669 struct sliccard *card = adapter->card;
2670 struct slic_upr *upr;
4d6f6af8 2671
e9eff9d6 2672 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
4d6f6af8
GKH		 2673 upr = adapter->upr_list;
2674 if (!upr) {
2675 ASSERT(0);
e9eff9d6
LD		 2676 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2677 adapter->upr_lock.flags);
4d6f6af8
GKH		 2678 return;
2679 }
2680 adapter->upr_list = upr->next;
2681 upr->next = NULL;
2682 adapter->upr_busy = 0;
2683 ASSERT(adapter->port == upr->adapter);
2684 switch (upr->upr_request) {
2685 case SLIC_UPR_STATS:
2686 {
e9eff9d6
LD		 2687 struct slic_stats *slicstats =
2688 (struct slic_stats *) &adapter->pshmem->inicstats;
2689 struct slic_stats *newstats = slicstats;
2690 struct slic_stats *old = &adapter->inicstats_prev;
2691 struct slicnet_stats *stst = &adapter->slic_stats;
3467db10 2692
4d6f6af8 2693 if (isr & ISR_UPCERR) {
4bee4f60
GKH		 2694 dev_err(&adapter->netdev->dev,
2695 "SLIC_UPR_STATS command failed isr[%x]\n",
2696 isr);
4d6f6af8
GKH		 2697
2698 break;
2699 }
4d6f6af8
GKH		 2700 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
2701 newstats->xmit_tcp_segs_gb,
2702 old->xmit_tcp_segs_gb);
2703
2704 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
2705 newstats->xmit_tcp_bytes_gb,
2706 old->xmit_tcp_bytes_gb);
2707
2708 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
2709 newstats->rcv_tcp_segs_gb,
2710 old->rcv_tcp_segs_gb);
2711
2712 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
2713 newstats->rcv_tcp_bytes_gb,
2714 old->rcv_tcp_bytes_gb);
2715
2716 UPDATE_STATS_GB(stst->iface.xmt_bytes,
2717 newstats->xmit_bytes_gb,
2718 old->xmit_bytes_gb);
2719
2720 UPDATE_STATS_GB(stst->iface.xmt_ucast,
2721 newstats->xmit_unicasts_gb,
2722 old->xmit_unicasts_gb);
2723
2724 UPDATE_STATS_GB(stst->iface.rcv_bytes,
2725 newstats->rcv_bytes_gb,
2726 old->rcv_bytes_gb);
2727
2728 UPDATE_STATS_GB(stst->iface.rcv_ucast,
2729 newstats->rcv_unicasts_gb,
2730 old->rcv_unicasts_gb);
2731
2732 UPDATE_STATS_GB(stst->iface.xmt_errors,
2733 newstats->xmit_collisions_gb,
2734 old->xmit_collisions_gb);
2735
2736 UPDATE_STATS_GB(stst->iface.xmt_errors,
2737 newstats->xmit_excess_collisions_gb,
2738 old->xmit_excess_collisions_gb);
2739
2740 UPDATE_STATS_GB(stst->iface.xmt_errors,
2741 newstats->xmit_other_error_gb,
2742 old->xmit_other_error_gb);
2743
2744 UPDATE_STATS_GB(stst->iface.rcv_errors,
2745 newstats->rcv_other_error_gb,
2746 old->rcv_other_error_gb);
2747
2748 UPDATE_STATS_GB(stst->iface.rcv_discards,
2749 newstats->rcv_drops_gb,
2750 old->rcv_drops_gb);
2751
2752 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
2753 adapter->rcv_drops +=
2754 (newstats->rcv_drops_gb -
2755 old->rcv_drops_gb);
2756 }
e9eff9d6 2757 memcpy(old, newstats, sizeof(struct slic_stats));
4d6f6af8
GKH		 2758 break;
2759 }
2760 case SLIC_UPR_RLSR:
2761 slic_link_upr_complete(adapter, isr);
2762 break;
2763 case SLIC_UPR_RCONFIG:
2764 break;
2765 case SLIC_UPR_RPHY:
2766 ASSERT(0);
2767 break;
2768 case SLIC_UPR_ENLB:
2769 ASSERT(0);
2770 break;
2771 case SLIC_UPR_ENCT:
2772 ASSERT(0);
2773 break;
2774 case SLIC_UPR_PDWN:
2775 ASSERT(0);
2776 break;
2777 case SLIC_UPR_PING:
2778 card->pingstatus |= (isr & ISR_PINGDSMASK);
2779 break;
4d6f6af8
GKH		 2780 default:
2781 ASSERT(0);
2782 }
e9eff9d6 2783 kfree(upr);
4d6f6af8 2784 slic_upr_start(adapter);
e9eff9d6
LD		 2785 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2786 adapter->upr_lock.flags);
4d6f6af8
GKH		 2787}
2788
e9eff9d6 2789static void slic_upr_start(struct adapter *adapter)
4d6f6af8 2790{
e9eff9d6
LD		 2791 struct slic_upr *upr;
2792 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8
GKH		 2793/*
2794 char * ptr1;
2795 char * ptr2;
2796 uint cmdoffset;
2797*/
2798 upr = adapter->upr_list;
2799 if (!upr)
2800 return;
2801 if (adapter->upr_busy)
2802 return;
2803 adapter->upr_busy = 1;
2804
2805 switch (upr->upr_request) {
2806 case SLIC_UPR_STATS:
2807 if (upr->upr_data_h == 0) {
62f691a3
GKH		 2808 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
2809 FLUSH);
4d6f6af8 2810 } else {
28980a3c
GKH		 2811 slic_reg64_write(adapter, &slic_regs->slic_stats64,
2812 upr->upr_data,
2813 &slic_regs->slic_addr_upper,
2814 upr->upr_data_h, FLUSH);
4d6f6af8
GKH		 2815 }
2816 break;
2817
2818 case SLIC_UPR_RLSR:
28980a3c
GKH		 2819 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
2820 &slic_regs->slic_addr_upper, upr->upr_data_h,
2821 FLUSH);
4d6f6af8
GKH		 2822 break;
2823
2824 case SLIC_UPR_RCONFIG:
28980a3c
GKH		 2825 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
2826 upr->upr_data, &slic_regs->slic_addr_upper,
2827 upr->upr_data_h, FLUSH);
4d6f6af8 2828 break;
4d6f6af8 2829 case SLIC_UPR_PING:
62f691a3 2830 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
4d6f6af8
GKH		 2831 break;
2832 default:
2833 ASSERT(0);
2834 }
2835}
2836
e9eff9d6 2837static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
4d6f6af8 2838{
e9eff9d6 2839 u32 linkstatus = adapter->pshmem->linkstatus;
4d6f6af8 2840 uint linkup;
e9eff9d6
LD		 2841 unsigned char linkspeed;
2842 unsigned char linkduplex;
4d6f6af8 2843
4d6f6af8 2844 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
e9eff9d6 2845 struct slic_shmem *pshmem;
4d6f6af8 2846
e9eff9d6 2847 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8
GKH		 2848#if defined(CONFIG_X86_64)
2849 slic_upr_queue_request(adapter,
2850 SLIC_UPR_RLSR,
2851 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2852 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2853 0, 0);
2854#elif defined(CONFIG_X86)
2855 slic_upr_queue_request(adapter,
2856 SLIC_UPR_RLSR,
e9eff9d6 2857 (u32) &pshmem->linkstatus,
4d6f6af8
GKH		 2858 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
2859#else
2860 Stop Compilation;
2861#endif
2862 return;
2863 }
2864 if (adapter->state != ADAPT_UP)
2865 return;
2866
2867 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
2868 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2869
2870 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
e8bc9b7a 2871 if (linkstatus & GIG_SPEED_1000)
4d6f6af8 2872 linkspeed = LINK_1000MB;
e8bc9b7a 2873 else if (linkstatus & GIG_SPEED_100)
4d6f6af8 2874 linkspeed = LINK_100MB;
e8bc9b7a 2875 else
4d6f6af8 2876 linkspeed = LINK_10MB;
e8bc9b7a
GKH		 2877
2878 if (linkstatus & GIG_FULLDUPLEX)
4d6f6af8 2879 linkduplex = LINK_FULLD;
e8bc9b7a 2880 else
4d6f6af8 2881 linkduplex = LINK_HALFD;
4d6f6af8 2882
e8bc9b7a 2883 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
4d6f6af8 2884 return;
4d6f6af8
GKH		 2885
2886 /* link up event, but nothing has changed */
2887 if ((adapter->linkstate == LINK_UP) &&
2888 (linkup == LINK_UP) &&
2889 (adapter->linkspeed == linkspeed) &&
e8bc9b7a 2890 (adapter->linkduplex == linkduplex))
4d6f6af8 2891 return;
4d6f6af8
GKH		 2892
2893 /* link has changed at this point */
2894
2895 /* link has gone from up to down */
2896 if (linkup == LINK_DOWN) {
2897 adapter->linkstate = LINK_DOWN;
4d6f6af8
GKH		 2898 return;
2899 }
2900
2901 /* link has gone from down to up */
2902 adapter->linkspeed = linkspeed;
2903 adapter->linkduplex = linkduplex;
2904
2905 if (adapter->linkstate != LINK_UP) {
2906 /* setup the mac */
b574488e 2907 slic_config_set(adapter, true);
4d6f6af8 2908 adapter->linkstate = LINK_UP;
77faefa3 2909 netif_start_queue(adapter->netdev);
4d6f6af8 2910 }
4d6f6af8
GKH		 2911}
2912
2913/*
2914 * this is here to checksum the eeprom, there is some ucode bug
2915 * which prevens us from using the ucode result.
2916 * remove this once ucode is fixed.
2917 */
e9eff9d6 2918static ushort slic_eeprom_cksum(char *m, int len)
4d6f6af8
GKH		 2919{
2920#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
2921#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
2922 }
2923
e9eff9d6
LD		 2924 u16 *w;
2925 u32 sum = 0;
2926 u32 byte_swapped = 0;
2927 u32 w_int;
4d6f6af8
GKH		 2928
2929 union {
2930 char c[2];
2931 ushort s;
2932 } s_util;
2933
2934 union {
2935 ushort s[2];
2936 int l;
2937 } l_util;
2938
2939 l_util.l = 0;
2940 s_util.s = 0;
2941
e9eff9d6 2942 w = (u16 *)m;
4d6f6af8 2943#ifdef CONFIG_X86_64
e9eff9d6 2944 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
4d6f6af8 2945#else
e9eff9d6 2946 w_int = (u32) (w);
4d6f6af8
GKH		 2947#endif
2948 if ((1 & w_int) && (len > 0)) {
2949 REDUCE;
2950 sum <<= 8;
e9eff9d6
LD		 2951 s_util.c[0] = *(unsigned char *)w;
2952 w = (u16 *)((char *)w + 1);
4d6f6af8
GKH		 2953 len--;
2954 byte_swapped = 1;
2955 }
2956
2957 /* Unroll the loop to make overhead from branches &c small. */
2958 while ((len -= 32) >= 0) {
2959 sum += w[0];
2960 sum += w[1];
2961 sum += w[2];
2962 sum += w[3];
2963 sum += w[4];
2964 sum += w[5];
2965 sum += w[6];
2966 sum += w[7];
2967 sum += w[8];
2968 sum += w[9];
2969 sum += w[10];
2970 sum += w[11];
2971 sum += w[12];
2972 sum += w[13];
2973 sum += w[14];
2974 sum += w[15];
e9eff9d6 2975 w = (u16 *)((ulong) w + 16); /* verify */
4d6f6af8
GKH		 2976 }
2977 len += 32;
2978 while ((len -= 8) >= 0) {
2979 sum += w[0];
2980 sum += w[1];
2981 sum += w[2];
2982 sum += w[3];
e9eff9d6 2983 w = (u16 *)((ulong) w + 4); /* verify */
4d6f6af8
GKH		 2984 }
2985 len += 8;
2986 if (len != 0 || byte_swapped != 0) {
2987 REDUCE;
2988 while ((len -= 2) >= 0)
2989 sum += *w++; /* verify */
2990 if (byte_swapped) {
2991 REDUCE;
2992 sum <<= 8;
2993 byte_swapped = 0;
2994 if (len == -1) {
e9eff9d6 2995 s_util.c[1] = *(char *) w;
4d6f6af8
GKH		 2996 sum += s_util.s;
2997 len = 0;
2998 } else {
2999 len = -1;
3000 }
3001
3002 } else if (len == -1) {
e9eff9d6 3003 s_util.c[0] = *(char *) w;
4d6f6af8
GKH		 3004 }
3005
3006 if (len == -1) {
3007 s_util.c[1] = 0;
3008 sum += s_util.s;
3009 }
3010 }
3011 REDUCE;
3012 return (ushort) sum;
3013}
3014
e9eff9d6 3015static int slic_rspqueue_init(struct adapter *adapter)
4d6f6af8
GKH		 3016{
3017 int i;
e9eff9d6
LD		 3018 struct slic_rspqueue *rspq = &adapter->rspqueue;
3019 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3020 u32 paddrh = 0;
4d6f6af8 3021
4d6f6af8 3022 ASSERT(adapter->state == ADAPT_DOWN);
e9eff9d6 3023 memset(rspq, 0, sizeof(struct slic_rspqueue));
4d6f6af8
GKH		 3024
3025 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3026
3027 for (i = 0; i < rspq->num_pages; i++) {
4bee4f60
GKH		 3028 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
3029 PAGE_SIZE,
3030 &rspq->paddr[i]);
4d6f6af8 3031 if (!rspq->vaddr[i]) {
4bee4f60
GKH		 3032 dev_err(&adapter->pcidev->dev,
3033 "pci_alloc_consistent failed\n");
4d6f6af8
GKH		 3034 slic_rspqueue_free(adapter);
3035 return STATUS_FAILURE;
3036 }
3037#ifndef CONFIG_X86_64
e9eff9d6
LD		 3038 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3039 (u32) rspq->vaddr[i]);
3040 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3041 (u32) rspq->paddr[i]);
4d6f6af8 3042#endif
e9eff9d6 3043 memset(rspq->vaddr[i], 0, PAGE_SIZE);
4d6f6af8
GKH		 3044
3045 if (paddrh == 0) {
62f691a3
GKH		 3046 slic_reg32_write(&slic_regs->slic_rbar,
3047 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3048 DONT_FLUSH);
4d6f6af8 3049 } else {
28980a3c
GKH		 3050 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
3051 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3052 &slic_regs->slic_addr_upper,
3053 paddrh, DONT_FLUSH);
4d6f6af8
GKH		 3054 }
3055 }
3056 rspq->offset = 0;
3057 rspq->pageindex = 0;
e9eff9d6 3058 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
4d6f6af8
GKH		 3059 return STATUS_SUCCESS;
3060}
3061
e9eff9d6 3062static void slic_rspqueue_free(struct adapter *adapter)
4d6f6af8
GKH		 3063{
3064 int i;
e9eff9d6 3065 struct slic_rspqueue *rspq = &adapter->rspqueue;
4d6f6af8 3066
4d6f6af8
GKH		 3067 for (i = 0; i < rspq->num_pages; i++) {
3068 if (rspq->vaddr[i]) {
4d6f6af8
GKH		 3069 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3070 rspq->vaddr[i], rspq->paddr[i]);
3071 }
3072 rspq->vaddr[i] = NULL;
3073 rspq->paddr[i] = 0;
3074 }
3075 rspq->offset = 0;
3076 rspq->pageindex = 0;
3077 rspq->rspbuf = NULL;
3078}
3079
e9eff9d6 3080static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
4d6f6af8 3081{
e9eff9d6
LD		 3082 struct slic_rspqueue *rspq = &adapter->rspqueue;
3083 struct slic_rspbuf *buf;
4d6f6af8
GKH		 3084
3085 if (!(rspq->rspbuf->status))
3086 return NULL;
3087
3088 buf = rspq->rspbuf;
3089#ifndef CONFIG_X86_64
3090 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3091#endif
3092 ASSERT(buf->hosthandle);
3093 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3094 rspq->rspbuf++;
3095#ifndef CONFIG_X86_64
e9eff9d6
LD		 3096 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3097 (u32) rspq->rspbuf);
4d6f6af8
GKH		 3098#endif
3099 } else {
3100 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
28980a3c
GKH		 3101 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
3102 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3103 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
4d6f6af8
GKH		 3104 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3105 rspq->offset = 0;
e9eff9d6
LD		 3106 rspq->rspbuf = (struct slic_rspbuf *)
3107 rspq->vaddr[rspq->pageindex];
4d6f6af8 3108#ifndef CONFIG_X86_64
e9eff9d6
LD		 3109 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3110 (u32) rspq->rspbuf);
4d6f6af8
GKH		 3111#endif
3112 }
3113#ifndef CONFIG_X86_64
e9eff9d6 3114 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
4d6f6af8
GKH		 3115#endif
3116 return buf;
3117}
3118
e9eff9d6 3119static void slic_cmdqmem_init(struct adapter *adapter)
4d6f6af8 3120{
e9eff9d6 3121 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
4d6f6af8 3122
e9eff9d6 3123 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
4d6f6af8
GKH		 3124}
3125
e9eff9d6 3126static void slic_cmdqmem_free(struct adapter *adapter)
4d6f6af8 3127{
e9eff9d6 3128 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
4d6f6af8
GKH		 3129 int i;
3130
4d6f6af8
GKH		 3131 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3132 if (cmdqmem->pages[i]) {
4d6f6af8
GKH		 3133 pci_free_consistent(adapter->pcidev,
3134 PAGE_SIZE,
e9eff9d6 3135 (void *) cmdqmem->pages[i],
4d6f6af8
GKH		 3136 cmdqmem->dma_pages[i]);
3137 }
3138 }
e9eff9d6 3139 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
4d6f6af8
GKH		 3140}
3141
e9eff9d6 3142static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
4d6f6af8 3143{
e9eff9d6
LD		 3144 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3145 u32 *pageaddr;
4d6f6af8
GKH		 3146
3147 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3148 return NULL;
3149 pageaddr = pci_alloc_consistent(adapter->pcidev,
3150 PAGE_SIZE,
3151 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3152 if (!pageaddr)
3153 return NULL;
3154#ifndef CONFIG_X86_64
e9eff9d6 3155 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
4d6f6af8
GKH		 3156#endif
3157 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3158 cmdqmem->pagecnt++;
3159 return pageaddr;
3160}
3161
e9eff9d6 3162static int slic_cmdq_init(struct adapter *adapter)
4d6f6af8
GKH		 3163{
3164 int i;
e9eff9d6 3165 u32 *pageaddr;
4d6f6af8 3166
4d6f6af8 3167 ASSERT(adapter->state == ADAPT_DOWN);
e9eff9d6
LD		 3168 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3169 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3170 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3171 spin_lock_init(&adapter->cmdq_all.lock.lock);
3172 spin_lock_init(&adapter->cmdq_free.lock.lock);
3173 spin_lock_init(&adapter->cmdq_done.lock.lock);
4d6f6af8
GKH		 3174 slic_cmdqmem_init(adapter);
3175 adapter->slic_handle_ix = 1;
3176 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3177 pageaddr = slic_cmdqmem_addpage(adapter);
3178#ifndef CONFIG_X86_64
e9eff9d6 3179 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
4d6f6af8
GKH		 3180#endif
3181 if (!pageaddr) {
3182 slic_cmdq_free(adapter);
3183 return STATUS_FAILURE;
3184 }
3185 slic_cmdq_addcmdpage(adapter, pageaddr);
3186 }
3187 adapter->slic_handle_ix = 1;
4d6f6af8
GKH		 3188
3189 return STATUS_SUCCESS;
3190}
3191
e9eff9d6 3192static void slic_cmdq_free(struct adapter *adapter)
4d6f6af8 3193{
e9eff9d6 3194 struct slic_hostcmd *cmd;
4d6f6af8 3195
4d6f6af8
GKH		 3196 cmd = adapter->cmdq_all.head;
3197 while (cmd) {
3198 if (cmd->busy) {
3199 struct sk_buff *tempskb;
3200
3201 tempskb = cmd->skb;
3202 if (tempskb) {
3203 cmd->skb = NULL;
3204 dev_kfree_skb_irq(tempskb);
3205 }
3206 }
3207 cmd = cmd->next_all;
3208 }
e9eff9d6
LD		 3209 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3210 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3211 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
4d6f6af8
GKH		 3212 slic_cmdqmem_free(adapter);
3213}
3214
e9eff9d6 3215static void slic_cmdq_reset(struct adapter *adapter)
4d6f6af8 3216{
e9eff9d6 3217 struct slic_hostcmd *hcmd;
4d6f6af8 3218 struct sk_buff *skb;
e9eff9d6 3219 u32 outstanding;
4d6f6af8 3220
e9eff9d6
LD		 3221 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
3222 adapter->cmdq_free.lock.flags);
3223 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
3224 adapter->cmdq_done.lock.flags);
4d6f6af8
GKH		 3225 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
3226 outstanding -= adapter->cmdq_free.count;
3227 hcmd = adapter->cmdq_all.head;
3228 while (hcmd) {
3229 if (hcmd->busy) {
3230 skb = hcmd->skb;
3231 ASSERT(skb);
4d6f6af8
GKH		 3232 hcmd->busy = 0;
3233 hcmd->skb = NULL;
4d6f6af8
GKH		 3234 dev_kfree_skb_irq(skb);
3235 }
3236 hcmd = hcmd->next_all;
3237 }
3238 adapter->cmdq_free.count = 0;
3239 adapter->cmdq_free.head = NULL;
3240 adapter->cmdq_free.tail = NULL;
3241 adapter->cmdq_done.count = 0;
3242 adapter->cmdq_done.head = NULL;
3243 adapter->cmdq_done.tail = NULL;
3244 adapter->cmdq_free.head = adapter->cmdq_all.head;
3245 hcmd = adapter->cmdq_all.head;
3246 while (hcmd) {
3247 adapter->cmdq_free.count++;
3248 hcmd->next = hcmd->next_all;
3249 hcmd = hcmd->next_all;
3250 }
3251 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
4bee4f60
GKH		 3252 dev_err(&adapter->netdev->dev,
3253 "free_count %d != all count %d\n",
3254 adapter->cmdq_free.count, adapter->cmdq_all.count);
4d6f6af8 3255 }
e9eff9d6
LD		 3256 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
3257 adapter->cmdq_done.lock.flags);
3258 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
3259 adapter->cmdq_free.lock.flags);
4d6f6af8
GKH		 3260}
3261
e9eff9d6 3262static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
4d6f6af8 3263{
e9eff9d6
LD		 3264 struct slic_hostcmd *cmd;
3265 struct slic_hostcmd *prev;
3266 struct slic_hostcmd *tail;
3267 struct slic_cmdqueue *cmdq;
4d6f6af8 3268 int cmdcnt;
e9eff9d6 3269 void *cmdaddr;
4d6f6af8 3270 ulong phys_addr;
e9eff9d6
LD		 3271 u32 phys_addrl;
3272 u32 phys_addrh;
3273 struct slic_handle *pslic_handle;
4d6f6af8
GKH		 3274
3275 cmdaddr = page;
e9eff9d6 3276 cmd = (struct slic_hostcmd *)cmdaddr;
4d6f6af8
GKH		 3277 cmdcnt = 0;
3278
e9eff9d6 3279 phys_addr = virt_to_bus((void *)page);
4d6f6af8
GKH		 3280 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
3281 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
3282
3283 prev = NULL;
3284 tail = cmd;
3285 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
3286 (adapter->slic_handle_ix < 256)) {
3287 /* Allocate and initialize a SLIC_HANDLE for this command */
3288 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
3289 if (pslic_handle == NULL)
3290 ASSERT(0);
3291 ASSERT(pslic_handle ==
3292 &adapter->slic_handles[pslic_handle->token.
3293 handle_index]);
3294 pslic_handle->type = SLIC_HANDLE_CMD;
e9eff9d6 3295 pslic_handle->address = (void *) cmd;
4d6f6af8
GKH		 3296 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
3297 pslic_handle->other_handle = NULL;
3298 pslic_handle->next = NULL;
3299
3300 cmd->pslic_handle = pslic_handle;
3301 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
b574488e 3302 cmd->busy = false;
4d6f6af8
GKH		 3303 cmd->paddrl = phys_addrl;
3304 cmd->paddrh = phys_addrh;
3305 cmd->next_all = prev;
3306 cmd->next = prev;
3307 prev = cmd;
3308 phys_addrl += SLIC_HOSTCMD_SIZE;
3309 cmdaddr += SLIC_HOSTCMD_SIZE;
3310
e9eff9d6 3311 cmd = (struct slic_hostcmd *)cmdaddr;
4d6f6af8
GKH		 3312 cmdcnt++;
3313 }
3314
3315 cmdq = &adapter->cmdq_all;
3316 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3317 tail->next_all = cmdq->head;
4d6f6af8
GKH		 3318 cmdq->head = prev;
3319 cmdq = &adapter->cmdq_free;
e9eff9d6 3320 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 3321 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3322 tail->next = cmdq->head;
4d6f6af8 3323 cmdq->head = prev;
e9eff9d6 3324 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 3325}
3326
e9eff9d6 3327static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
4d6f6af8 3328{
e9eff9d6
LD		 3329 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
3330 struct slic_hostcmd *cmd = NULL;
4d6f6af8
GKH		 3331
3332lock_and_retry:
e9eff9d6 3333 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 3334retry:
3335 cmd = cmdq->head;
3336 if (cmd) {
3337 cmdq->head = cmd->next;
3338 cmdq->count--;
e9eff9d6 3339 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 3340 } else {
3341 slic_cmdq_getdone(adapter);
3342 cmd = cmdq->head;
3343 if (cmd) {
3344 goto retry;
3345 } else {
e9eff9d6 3346 u32 *pageaddr;
4d6f6af8 3347
e9eff9d6
LD		 3348 spin_unlock_irqrestore(&cmdq->lock.lock,
3349 cmdq->lock.flags);
4d6f6af8
GKH		 3350 pageaddr = slic_cmdqmem_addpage(adapter);
3351 if (pageaddr) {
3352 slic_cmdq_addcmdpage(adapter, pageaddr);
3353 goto lock_and_retry;
3354 }
3355 }
3356 }
3357 return cmd;
3358}
3359
e9eff9d6 3360static void slic_cmdq_getdone(struct adapter *adapter)
4d6f6af8 3361{
e9eff9d6
LD		 3362 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
3363 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4d6f6af8
GKH		 3364
3365 ASSERT(free_cmdq->head == NULL);
e9eff9d6 3366 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4d6f6af8
GKH		 3367
3368 free_cmdq->head = done_cmdq->head;
3369 free_cmdq->count = done_cmdq->count;
3370 done_cmdq->head = NULL;
3371 done_cmdq->tail = NULL;
3372 done_cmdq->count = 0;
e9eff9d6 3373 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4d6f6af8
GKH		 3374}
3375
e9eff9d6
LD		 3376static void slic_cmdq_putdone_irq(struct adapter *adapter,
3377 struct slic_hostcmd *cmd)
4d6f6af8 3378{
e9eff9d6 3379 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4d6f6af8 3380
e9eff9d6 3381 spin_lock(&cmdq->lock.lock);
4d6f6af8 3382 cmd->busy = 0;
4d6f6af8 3383 cmd->next = cmdq->head;
4d6f6af8
GKH		 3384 cmdq->head = cmd;
3385 cmdq->count++;
3386 if ((adapter->xmitq_full) && (cmdq->count > 10))
3387 netif_wake_queue(adapter->netdev);
e9eff9d6 3388 spin_unlock(&cmdq->lock.lock);
4d6f6af8
GKH		 3389}
3390
e9eff9d6 3391static int slic_rcvqueue_init(struct adapter *adapter)
4d6f6af8
GKH		 3392{
3393 int i, count;
e9eff9d6 3394 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 3395
4d6f6af8
GKH		 3396 ASSERT(adapter->state == ADAPT_DOWN);
3397 rcvq->tail = NULL;
3398 rcvq->head = NULL;
3399 rcvq->size = SLIC_RCVQ_ENTRIES;
3400 rcvq->errors = 0;
3401 rcvq->count = 0;
3402 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
3403 count = 0;
3404 while (i) {
3405 count += slic_rcvqueue_fill(adapter);
3406 i--;
3407 }
3408 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
3409 slic_rcvqueue_free(adapter);
3410 return STATUS_FAILURE;
3411 }
4d6f6af8
GKH		 3412 return STATUS_SUCCESS;
3413}
3414
e9eff9d6 3415static void slic_rcvqueue_free(struct adapter *adapter)
4d6f6af8 3416{
e9eff9d6 3417 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8
GKH		 3418 struct sk_buff *skb;
3419
3420 while (rcvq->head) {
3421 skb = rcvq->head;
3422 rcvq->head = rcvq->head->next;
3423 dev_kfree_skb(skb);
3424 }
3425 rcvq->tail = NULL;
3426 rcvq->head = NULL;
3427 rcvq->count = 0;
3428}
3429
e9eff9d6 3430static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
4d6f6af8 3431{
e9eff9d6 3432 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 3433 struct sk_buff *skb;
e9eff9d6 3434 struct slic_rcvbuf *rcvbuf;
4d6f6af8
GKH		 3435 int count;
3436
3437 if (rcvq->count) {
3438 skb = rcvq->head;
e9eff9d6 3439 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8
GKH		 3440 ASSERT(rcvbuf);
3441
3442 if (rcvbuf->status & IRHDDR_SVALID) {
3443 rcvq->head = rcvq->head->next;
3444 skb->next = NULL;
3445 rcvq->count--;
3446 } else {
3447 skb = NULL;
3448 }
3449 } else {
4bee4f60
GKH		 3450 dev_err(&adapter->netdev->dev,
3451 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
4d6f6af8
GKH		 3452 skb = NULL;
3453 }
3454 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
3455 count = slic_rcvqueue_fill(adapter);
3456 if (!count)
3457 break;
3458 }
3459 if (skb)
3460 rcvq->errors = 0;
3461 return skb;
3462}
3463
e9eff9d6 3464static int slic_rcvqueue_fill(struct adapter *adapter)
4d6f6af8 3465{
e9eff9d6
LD		 3466 void *paddr;
3467 u32 paddrl;
3468 u32 paddrh;
3469 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 3470 int i = 0;
4bee4f60 3471 struct device *dev = &adapter->netdev->dev;
4d6f6af8
GKH		 3472
3473 while (i < SLIC_RCVQ_FILLENTRIES) {
e9eff9d6 3474 struct slic_rcvbuf *rcvbuf;
4d6f6af8
GKH		 3475 struct sk_buff *skb;
3476#ifdef KLUDGE_FOR_4GB_BOUNDARY
3477retry_rcvqfill:
3478#endif
3479 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
3480 if (skb) {
e9eff9d6 3481 paddr = (void *)pci_map_single(adapter->pcidev,
4d6f6af8 3482 skb->data,
e9eff9d6
LD		 3483 SLIC_RCVQ_RCVBUFSIZE,
3484 PCI_DMA_FROMDEVICE);
4d6f6af8
GKH		 3485 paddrl = SLIC_GET_ADDR_LOW(paddr);
3486 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3487
3488 skb->len = SLIC_RCVBUF_HEADSIZE;
e9eff9d6 3489 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8
GKH		 3490 rcvbuf->status = 0;
3491 skb->next = NULL;
3492#ifdef KLUDGE_FOR_4GB_BOUNDARY
3493 if (paddrl == 0) {
4bee4f60
GKH		 3494 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3495 __func__);
3496 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3497 dev_err(dev, " skbdata[%p]\n", skb->data);
3498 dev_err(dev, " skblen[%x]\n", skb->len);
3499 dev_err(dev, " paddr[%p]\n", paddr);
3500 dev_err(dev, " paddrl[%x]\n", paddrl);
3501 dev_err(dev, " paddrh[%x]\n", paddrh);
3502 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3503 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3504 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3505 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
4d6f6af8
GKH		 3506 goto retry_rcvqfill;
3507 }
3508#else
3509 if (paddrl == 0) {
4bee4f60
GKH		 3510 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3511 __func__);
3512 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3513 dev_err(dev, " skbdata[%p]\n", skb->data);
3514 dev_err(dev, " skblen[%x]\n", skb->len);
3515 dev_err(dev, " paddr[%p]\n", paddr);
3516 dev_err(dev, " paddrl[%x]\n", paddrl);
3517 dev_err(dev, " paddrh[%x]\n", paddrh);
3518 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3519 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3520 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3521 dev_err(dev, "GIVE TO CARD ANYWAY\n");
4d6f6af8
GKH		 3522 }
3523#endif
3524 if (paddrh == 0) {
62f691a3
GKH		 3525 slic_reg32_write(&adapter->slic_regs->slic_hbar,
3526 (u32)paddrl, DONT_FLUSH);
4d6f6af8 3527 } else {
28980a3c
GKH		 3528 slic_reg64_write(adapter,
3529 &adapter->slic_regs->slic_hbar64,
3530 paddrl,
3531 &adapter->slic_regs->slic_addr_upper,
3532 paddrh, DONT_FLUSH);
4d6f6af8
GKH		 3533 }
3534 if (rcvq->head)
3535 rcvq->tail->next = skb;
3536 else
3537 rcvq->head = skb;
3538 rcvq->tail = skb;
3539 rcvq->count++;
3540 i++;
3541 } else {
4bee4f60
GKH		 3542 dev_err(&adapter->netdev->dev,
3543 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
3544 i);
4d6f6af8
GKH		 3545 break;
3546 }
3547 }
3548 return i;
3549}
3550
e9eff9d6 3551static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
4d6f6af8 3552{
e9eff9d6
LD		 3553 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3554 void *paddr;
3555 u32 paddrl;
3556 u32 paddrh;
3557 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
4bee4f60 3558 struct device *dev;
4d6f6af8
GKH		 3559
3560 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
e9eff9d6
LD		 3561
3562 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
3563 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
4d6f6af8
GKH		 3564 rcvbuf->status = 0;
3565 skb->next = NULL;
3566
3567 paddrl = SLIC_GET_ADDR_LOW(paddr);
3568 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3569
3570 if (paddrl == 0) {
4bee4f60
GKH		 3571 dev = &adapter->netdev->dev;
3572 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3573 __func__);
3574 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3575 dev_err(dev, " skbdata[%p]\n", skb->data);
3576 dev_err(dev, " skblen[%x]\n", skb->len);
3577 dev_err(dev, " paddr[%p]\n", paddr);
3578 dev_err(dev, " paddrl[%x]\n", paddrl);
3579 dev_err(dev, " paddrh[%x]\n", paddrh);
3580 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3581 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3582 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
4d6f6af8
GKH		 3583 }
3584 if (paddrh == 0) {
62f691a3
GKH		 3585 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
3586 DONT_FLUSH);
4d6f6af8 3587 } else {
28980a3c
GKH		 3588 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
3589 paddrl, &adapter->slic_regs->slic_addr_upper,
3590 paddrh, DONT_FLUSH);
4d6f6af8
GKH		 3591 }
3592 if (rcvq->head)
3593 rcvq->tail->next = skb;
3594 else
3595 rcvq->head = skb;
3596 rcvq->tail = skb;
3597 rcvq->count++;
3598 return rcvq->count;
3599}
3600
3601static int slic_debug_card_show(struct seq_file *seq, void *v)
3602{
3603#ifdef MOOKTODO
3604 int i;
e9eff9d6 3605 struct sliccard *card = seq->private;
68cf95f3 3606 struct slic_config *config = &card->config;
e9eff9d6
LD		 3607 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
3608 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
4d6f6af8
GKH		 3609#endif
3610
874073ea 3611 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
4d6f6af8
GKH		 3612 seq_printf(seq, "Microcode versions: \n");
3613 seq_printf(seq, " Gigabit (gb) : %s %s\n",
3614 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
3615 seq_printf(seq, " Gigabit Receiver : %s %s\n",
3616 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
3617 seq_printf(seq, "Vendor : %s\n", slic_vendor);
3618 seq_printf(seq, "Product Name : %s\n", slic_product_name);
3619#ifdef MOOKTODO
3620 seq_printf(seq, "VendorId : %4.4X\n",
3621 config->VendorId);
3622 seq_printf(seq, "DeviceId : %4.4X\n",
3623 config->DeviceId);
3624 seq_printf(seq, "RevisionId : %2.2x\n",
3625 config->RevisionId);
3626 seq_printf(seq, "Bus # : %d\n", card->busnumber);
3627 seq_printf(seq, "Device # : %d\n", card->slotnumber);
3628 seq_printf(seq, "Interfaces : %d\n", card->card_size);
3629 seq_printf(seq, " Initialized : %d\n",
3630 card->adapters_activated);
3631 seq_printf(seq, " Allocated : %d\n",
3632 card->adapters_allocated);
3633 ASSERT(card->card_size <= SLIC_NBR_MACS);
3634 for (i = 0; i < card->card_size; i++) {
3635 seq_printf(seq,
3636 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
3637 i, config->macinfo[i].macaddrA[0],
3638 config->macinfo[i].macaddrA[1],
3639 config->macinfo[i].macaddrA[2],
3640 config->macinfo[i].macaddrA[3],
3641 config->macinfo[i].macaddrA[4],
3642 config->macinfo[i].macaddrA[5]);
3643 }
3644 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
3645 seq_printf(seq, " -------------------------------\n");
3646 for (i = 0; i < card->adapters_allocated; i++) {
e9eff9d6 3647 struct adapter *adapter;
4d6f6af8
GKH		 3648
3649 adapter = card->adapter[i];
3650 if (adapter) {
3651 seq_printf(seq,
3652 " %d %d %s %s %s 0x%X\n",
3653 adapter->physport, adapter->state,
3654 SLIC_LINKSTATE(adapter->linkstate),
3655 SLIC_DUPLEX(adapter->linkduplex),
3656 SLIC_SPEED(adapter->linkspeed),
3657 (uint) adapter->irq);
3658 }
3659 }
3660 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
3661 seq_printf(seq, "RcvQ max entries : %4.4X\n",
3662 SLIC_RCVQ_ENTRIES);
3663 seq_printf(seq, "Ping Status : %8.8X\n",
3664 card->pingstatus);
3665 seq_printf(seq, "Minimum grant : %2.2x\n",
3666 config->MinGrant);
3667 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
3668 seq_printf(seq, "PciStatus : %4.4x\n",
3669 config->Pcistatus);
3670 seq_printf(seq, "Debug Device Id : %4.4x\n",
3671 config->DbgDevId);
3672 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
3673 config->DramRomFn);
3674 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
3675 config->NetIntPin1);
3676 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
3677 config->NetIntPin1);
3678 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
3679 config->NetIntPin1);
3680 seq_printf(seq, "PM capabilities : %4.4X\n",
3681 config->PMECapab);
3682 seq_printf(seq, "Network Clock Controls : %4.4X\n",
3683 config->NwClkCtrls);
3684
3685 switch (config->FruFormat) {
3686 case ATK_FRU_FORMAT:
3687 {
3688 seq_printf(seq,
3689 "Vendor : Alacritech, Inc.\n");
3690 seq_printf(seq,
3691 "Assembly # : %c%c%c%c%c%c\n",
3692 fru[0], fru[1], fru[2], fru[3], fru[4],
3693 fru[5]);
3694 seq_printf(seq,
3695 "Revision # : %c%c\n",
3696 fru[6], fru[7]);
3697
3698 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
3699 seq_printf(seq,
3700 "Serial # : "
3701 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
3702 fru[8], fru[9], fru[10],
3703 fru[11], fru[12], fru[13],
3704 fru[16], fru[17], fru[18],
3705 fru[19], fru[20], fru[21]);
3706 } else {
3707 seq_printf(seq,
3708 "Serial # : "
3709 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
3710 fru[8], fru[9], fru[10],
3711 fru[11], fru[12], fru[13],
3712 fru[14], fru[15], fru[16],
3713 fru[17], fru[18], fru[19],
3714 fru[20], fru[21]);
3715 }
3716 break;
3717 }
3718
3719 default:
3720 {
3721 seq_printf(seq,
3722 "Vendor : Alacritech, Inc.\n");
3723 seq_printf(seq,
3724 "Serial # : Empty FRU\n");
3725 break;
3726 }
3727 }
3728
3729 switch (config->OEMFruFormat) {
3730 case VENDOR1_FRU_FORMAT:
3731 {
3732 seq_printf(seq, "FRU Information:\n");
3733 seq_printf(seq, " Commodity # : %c\n",
3734 oemfru[0]);
3735 seq_printf(seq,
3736 " Assembly # : %c%c%c%c\n",
3737 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
3738 seq_printf(seq,
3739 " Revision # : %c%c\n",
3740 oemfru[5], oemfru[6]);
3741 seq_printf(seq,
3742 " Supplier # : %c%c\n",
3743 oemfru[7], oemfru[8]);
3744 seq_printf(seq,
3745 " Date : %c%c\n",
3746 oemfru[9], oemfru[10]);
3747 seq_sprintf(seq,
3748 " Sequence # : %c%c%c\n",
3749 oemfru[11], oemfru[12], oemfru[13]);
3750 break;
3751 }
3752
3753 case VENDOR2_FRU_FORMAT:
3754 {
3755 seq_printf(seq, "FRU Information:\n");
3756 seq_printf(seq,
3757 " Part # : "
3758 "%c%c%c%c%c%c%c%c\n",
3759 oemfru[0], oemfru[1], oemfru[2],
3760 oemfru[3], oemfru[4], oemfru[5],
3761 oemfru[6], oemfru[7]);
3762 seq_printf(seq,
3763 " Supplier # : %c%c%c%c%c\n",
3764 oemfru[8], oemfru[9], oemfru[10],
3765 oemfru[11], oemfru[12]);
3766 seq_printf(seq,
3767 " Date : %c%c%c\n",
3768 oemfru[13], oemfru[14], oemfru[15]);
3769 seq_sprintf(seq,
3770 " Sequence # : %c%c%c%c\n",
3771 oemfru[16], oemfru[17], oemfru[18],
3772 oemfru[19]);
3773 break;
3774 }
3775
3776 case VENDOR3_FRU_FORMAT:
3777 {
3778 seq_printf(seq, "FRU Information:\n");
3779 }
3780
3781 case VENDOR4_FRU_FORMAT:
3782 {
3783 seq_printf(seq, "FRU Information:\n");
3784 seq_printf(seq,
3785 " FRU Number : "
3786 "%c%c%c%c%c%c%c%c\n",
3787 oemfru[0], oemfru[1], oemfru[2],
3788 oemfru[3], oemfru[4], oemfru[5],
3789 oemfru[6], oemfru[7]);
3790 seq_sprintf(seq,
3791 " Part Number : "
3792 "%c%c%c%c%c%c%c%c\n",
3793 oemfru[8], oemfru[9], oemfru[10],
3794 oemfru[11], oemfru[12], oemfru[13],
3795 oemfru[14], oemfru[15]);
3796 seq_printf(seq,
3797 " EC Level : "
3798 "%c%c%c%c%c%c%c%c\n",
3799 oemfru[16], oemfru[17], oemfru[18],
3800 oemfru[19], oemfru[20], oemfru[21],
3801 oemfru[22], oemfru[23]);
3802 break;
3803 }
3804
3805 default:
3806 break;
3807 }
3808#endif
3809
3810 return 0;
3811}
3812
3813static int slic_debug_adapter_show(struct seq_file *seq, void *v)
3814{
e9eff9d6 3815 struct adapter *adapter = seq->private;
4d6f6af8
GKH		 3816
3817 if ((adapter->netdev) && (adapter->netdev->name)) {
3818 seq_printf(seq, "info: interface : %s\n",
3819 adapter->netdev->name);
3820 }
3821 seq_printf(seq, "info: status : %s\n",
3822 SLIC_LINKSTATE(adapter->linkstate));
3823 seq_printf(seq, "info: port : %d\n",
3824 adapter->physport);
3825 seq_printf(seq, "info: speed : %s\n",
3826 SLIC_SPEED(adapter->linkspeed));
3827 seq_printf(seq, "info: duplex : %s\n",
3828 SLIC_DUPLEX(adapter->linkduplex));
3829 seq_printf(seq, "info: irq : 0x%X\n",
3830 (uint) adapter->irq);
3831 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
3832 adapter->card->loadlevel_current);
3833 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
3834 SLIC_RCVQ_ENTRIES);
3835 seq_printf(seq, "info: RcvQ current : %4.4X\n",
3836 adapter->rcvqueue.count);
3837 seq_printf(seq, "rx stats: packets : %8.8lX\n",
3838 adapter->stats.rx_packets);
3839 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
3840 adapter->stats.rx_bytes);
3841 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
3842 adapter->rcv_broadcasts);
3843 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
3844 adapter->rcv_multicasts);
3845 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
3846 adapter->rcv_unicasts);
3847 seq_printf(seq, "rx stats: errors : %8.8X\n",
e9eff9d6 3848 (u32) adapter->slic_stats.iface.rcv_errors);
4d6f6af8 3849 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
e9eff9d6 3850 (u32) adapter->slic_stats.iface.rcv_discards);
4d6f6af8 3851 seq_printf(seq, "rx stats: drops : %8.8X\n",
e9eff9d6 3852 (u32) adapter->rcv_drops);
4d6f6af8
GKH		 3853 seq_printf(seq, "tx stats: packets : %8.8lX\n",
3854 adapter->stats.tx_packets);
3855 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
3856 adapter->stats.tx_bytes);
3857 seq_printf(seq, "tx stats: errors : %8.8X\n",
e9eff9d6 3858 (u32) adapter->slic_stats.iface.xmt_errors);
4d6f6af8
GKH		 3859 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
3860 adapter->stats.multicast);
3861 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
e9eff9d6 3862 (u32) adapter->slic_stats.iface.xmit_collisions);
4d6f6af8
GKH		 3863 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
3864 adapter->max_isr_rcvs);
3865 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
3866 adapter->rcv_interrupt_yields);
3867 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
3868 adapter->max_isr_xmits);
3869 seq_printf(seq, "perf: error interrupts : %8.8X\n",
3870 adapter->error_interrupts);
3871 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
3872 adapter->error_rmiss_interrupts);
3873 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
3874 adapter->rcv_interrupts);
3875 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
3876 adapter->xmit_interrupts);
3877 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
3878 adapter->linkevent_interrupts);
3879 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
3880 adapter->upr_interrupts);
3881 seq_printf(seq, "perf: interrupt count : %8.8X\n",
3882 adapter->num_isrs);
3883 seq_printf(seq, "perf: false interrupts : %8.8X\n",
3884 adapter->false_interrupts);
3885 seq_printf(seq, "perf: All register writes : %8.8X\n",
3886 adapter->all_reg_writes);
3887 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
3888 adapter->icr_reg_writes);
3889 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
3890 adapter->isr_reg_writes);
3891 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
3892 adapter->if_events.oflow802);
3893 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
3894 adapter->if_events.Tprtoflow);
3895 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
3896 adapter->if_events.uflow802);
3897 seq_printf(seq, "ifevents: receive early : %8.8X\n",
3898 adapter->if_events.rcvearly);
3899 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
3900 adapter->if_events.Bufov);
3901 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
3902 adapter->if_events.Carre);
3903 seq_printf(seq, "ifevents: Long : %8.8X\n",
3904 adapter->if_events.Longe);
3905 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
3906 adapter->if_events.Invp);
3907 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
3908 adapter->if_events.Crc);
3909 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
3910 adapter->if_events.Drbl);
3911 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
3912 adapter->if_events.Code);
3913 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
3914 adapter->if_events.TpCsum);
3915 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
3916 adapter->if_events.TpHlen);
3917 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
3918 adapter->if_events.IpCsum);
3919 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
3920 adapter->if_events.IpLen);
3921 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
3922 adapter->if_events.IpHlen);
3923
3924 return 0;
3925}
3926static int slic_debug_adapter_open(struct inode *inode, struct file *file)
3927{
3928 return single_open(file, slic_debug_adapter_show, inode->i_private);
3929}
3930
3931static int slic_debug_card_open(struct inode *inode, struct file *file)
3932{
3933 return single_open(file, slic_debug_card_show, inode->i_private);
3934}
3935
3936static const struct file_operations slic_debug_adapter_fops = {
3937 .owner = THIS_MODULE,
3938 .open = slic_debug_adapter_open,
3939 .read = seq_read,
3940 .llseek = seq_lseek,
3941 .release = single_release,
3942};
3943
3944static const struct file_operations slic_debug_card_fops = {
3945 .owner = THIS_MODULE,
3946 .open = slic_debug_card_open,
3947 .read = seq_read,
3948 .llseek = seq_lseek,
3949 .release = single_release,
3950};
3951
e9eff9d6 3952static void slic_debug_adapter_create(struct adapter *adapter)
4d6f6af8
GKH		 3953{
3954 struct dentry *d;
3955 char name[7];
e9eff9d6 3956 struct sliccard *card = adapter->card;
4d6f6af8
GKH		 3957
3958 if (!card->debugfs_dir)
3959 return;
3960
3961 sprintf(name, "port%d", adapter->port);
3962 d = debugfs_create_file(name, S_IRUGO,
3963 card->debugfs_dir, adapter,
3964 &slic_debug_adapter_fops);
3965 if (!d || IS_ERR(d))
3966 pr_info(PFX "%s: debugfs create failed\n", name);
3967 else
3968 adapter->debugfs_entry = d;
3969}
3970
e9eff9d6 3971static void slic_debug_adapter_destroy(struct adapter *adapter)
4d6f6af8 3972{
d9c057ab 3973 debugfs_remove(adapter->debugfs_entry);
3974 adapter->debugfs_entry = NULL;
4d6f6af8
GKH		 3975}
3976
e9eff9d6 3977static void slic_debug_card_create(struct sliccard *card)
4d6f6af8
GKH		 3978{
3979 struct dentry *d;
3980 char name[IFNAMSIZ];
3981
3982 snprintf(name, sizeof(name), "slic%d", card->cardnum);
3983 d = debugfs_create_dir(name, slic_debugfs);
3984 if (!d || IS_ERR(d))
3985 pr_info(PFX "%s: debugfs create dir failed\n",
3986 name);
3987 else {
3988 card->debugfs_dir = d;
3989 d = debugfs_create_file("cardinfo", S_IRUGO,
3990 slic_debugfs, card,
3991 &slic_debug_card_fops);
3992 if (!d || IS_ERR(d))
3993 pr_info(PFX "%s: debugfs create failed\n",
3994 name);
3995 else
3996 card->debugfs_cardinfo = d;
3997 }
3998}
3999
e9eff9d6 4000static void slic_debug_card_destroy(struct sliccard *card)
4d6f6af8
GKH		 4001{
4002 int i;
4003
4004 for (i = 0; i < card->card_size; i++) {
e9eff9d6 4005 struct adapter *adapter;
4d6f6af8
GKH		 4006
4007 adapter = card->adapter[i];
4008 if (adapter)
4009 slic_debug_adapter_destroy(adapter);
4010 }
4011 if (card->debugfs_cardinfo) {
4012 debugfs_remove(card->debugfs_cardinfo);
4013 card->debugfs_cardinfo = NULL;
4014 }
4015 if (card->debugfs_dir) {
4016 debugfs_remove(card->debugfs_dir);
4017 card->debugfs_dir = NULL;
4018 }
4019}
4020
4021static void slic_debug_init(void)
4022{
4023 struct dentry *ent;
4024
4025 ent = debugfs_create_dir("slic", NULL);
4026 if (!ent || IS_ERR(ent)) {
4027 pr_info(PFX "debugfs create directory failed\n");
4028 return;
4029 }
4030
4031 slic_debugfs = ent;
4032}
4033
4034static void slic_debug_cleanup(void)
4035{
4036 if (slic_debugfs) {
4037 debugfs_remove(slic_debugfs);
4038 slic_debugfs = NULL;
4039 }
4040}
4041
4d6f6af8
GKH		 4042/******************************************************************************/
4043/**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
4044/******************************************************************************/
4045
4046static struct pci_driver slic_driver = {
4047 .name = DRV_NAME,
4048 .id_table = slic_pci_tbl,
4049 .probe = slic_entry_probe,
b0f434a7 4050 .remove = __devexit_p(slic_entry_remove),
4d6f6af8
GKH		 4051};
4052
4053static int __init slic_module_init(void)
4054{
4d6f6af8
GKH		 4055 slic_init_driver();
4056
4057 if (debug >= 0 && slic_debug != debug)
e5bac598
GKH		 4058 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n",
4059 debug);
4d6f6af8
GKH		 4060 if (debug >= 0)
4061 slic_debug = debug;
4062
e8bc9b7a 4063 return pci_register_driver(&slic_driver);
4d6f6af8
GKH		 4064}
4065
4066static void __exit slic_module_cleanup(void)
4067{
4d6f6af8
GKH		 4068 pci_unregister_driver(&slic_driver);
4069 slic_debug_cleanup();
4d6f6af8
GKH		 4070}
4071
4072module_init(slic_module_init);
4073module_exit(slic_module_cleanup);
Linux 6.x block layer and io_uring tree(s)