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staging: slicoss Use PCI_DEVICE_TABLE.
[linux-2.6-block.git] / drivers / staging / slicoss / slicoss.c
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4d6f6af8
GKH		 1/**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39/*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
4d6f6af8 57
4d6f6af8
GKH		 58#define KLUDGE_FOR_4GB_BOUNDARY 1
59#define DEBUG_MICROCODE 1
4d6f6af8 60#define DBG 1
4d6f6af8 61#define SLIC_INTERRUPT_PROCESS_LIMIT 1
4d6f6af8
GKH		 62#define SLIC_OFFLOAD_IP_CHECKSUM 1
63#define STATS_TIMER_INTERVAL 2
64#define PING_TIMER_INTERVAL 1
65
66#include <linux/kernel.h>
67#include <linux/string.h>
68#include <linux/errno.h>
69#include <linux/ioport.h>
70#include <linux/slab.h>
71#include <linux/interrupt.h>
72#include <linux/timer.h>
73#include <linux/pci.h>
74#include <linux/spinlock.h>
75#include <linux/init.h>
76#include <linux/bitops.h>
77#include <linux/io.h>
78#include <linux/netdevice.h>
79#include <linux/etherdevice.h>
80#include <linux/skbuff.h>
81#include <linux/delay.h>
82#include <linux/debugfs.h>
83#include <linux/seq_file.h>
84#include <linux/kthread.h>
85#include <linux/module.h>
86#include <linux/moduleparam.h>
87
470c5736 88#include <linux/firmware.h>
4d6f6af8 89#include <linux/types.h>
4d6f6af8 90#include <linux/dma-mapping.h>
4d6f6af8
GKH		 91#include <linux/mii.h>
92#include <linux/if_vlan.h>
4d6f6af8
GKH		 93#include <asm/unaligned.h>
94
95#include <linux/ethtool.h>
4d6f6af8 96#include <linux/uaccess.h>
77faefa3
GKH		 97#include "slichw.h"
98#include "slic.h"
99
77faefa3 100static struct net_device_stats *slic_get_stats(struct net_device *dev);
77faefa3
GKH		 101static int slic_entry_open(struct net_device *dev);
102static int slic_entry_halt(struct net_device *dev);
103static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
203fe0d2 104static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev);
77faefa3
GKH		 105static void slic_xmit_fail(struct adapter *adapter, struct sk_buff *skb,
106 void *cmd, u32 skbtype, u32 status);
107static void slic_config_pci(struct pci_dev *pcidev);
108static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter);
109static int slic_mac_set_address(struct net_device *dev, void *ptr);
110static void slic_link_event_handler(struct adapter *adapter);
111static void slic_upr_request_complete(struct adapter *adapter, u32 isr);
112static int slic_rspqueue_init(struct adapter *adapter);
77faefa3
GKH		 113static void slic_rspqueue_free(struct adapter *adapter);
114static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter);
115static int slic_cmdq_init(struct adapter *adapter);
116static void slic_cmdq_free(struct adapter *adapter);
117static void slic_cmdq_reset(struct adapter *adapter);
118static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page);
119static void slic_cmdq_getdone(struct adapter *adapter);
120static void slic_cmdq_putdone_irq(struct adapter *adapter,
121 struct slic_hostcmd *cmd);
122static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter);
123static int slic_rcvqueue_init(struct adapter *adapter);
77faefa3
GKH		 124static int slic_rcvqueue_fill(struct adapter *adapter);
125static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb);
126static void slic_rcvqueue_free(struct adapter *adapter);
127static void slic_adapter_set_hwaddr(struct adapter *adapter);
128static int slic_card_init(struct sliccard *card, struct adapter *adapter);
129static void slic_intagg_set(struct adapter *adapter, u32 value);
130static int slic_card_download(struct adapter *adapter);
131static u32 slic_card_locate(struct adapter *adapter);
132static int slic_if_init(struct adapter *adapter);
133static int slic_adapter_allocresources(struct adapter *adapter);
134static void slic_adapter_freeresources(struct adapter *adapter);
135static void slic_link_config(struct adapter *adapter, u32 linkspeed,
136 u32 linkduplex);
137static void slic_unmap_mmio_space(struct adapter *adapter);
138static void slic_card_cleanup(struct sliccard *card);
139static void slic_soft_reset(struct adapter *adapter);
140static bool slic_mac_filter(struct adapter *adapter,
141 struct ether_header *ether_frame);
142static void slic_mac_address_config(struct adapter *adapter);
143static void slic_mac_config(struct adapter *adapter);
144static void slic_mcast_set_mask(struct adapter *adapter);
145static void slic_config_set(struct adapter *adapter, bool linkchange);
146static void slic_config_clear(struct adapter *adapter);
147static void slic_config_get(struct adapter *adapter, u32 config,
148 u32 configh);
149static void slic_timer_load_check(ulong context);
150static void slic_assert_fail(void);
151static ushort slic_eeprom_cksum(char *m, int len);
152static void slic_upr_start(struct adapter *adapter);
153static void slic_link_upr_complete(struct adapter *adapter, u32 Isr);
154static int slic_upr_request(struct adapter *adapter, u32 upr_request,
155 u32 upr_data, u32 upr_data_h, u32 upr_buffer,
156 u32 upr_buffer_h);
157static void slic_mcast_set_list(struct net_device *dev);
158
4d6f6af8 159
4d6f6af8
GKH		 160static uint slic_first_init = 1;
161static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
e9ef456e 162 "and Storage Accelerator (Non-Accelerated)";
4d6f6af8
GKH		 163
164static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
165static char *slic_product_name = "SLIC Technology(tm) Server "\
166 "and Storage Accelerator (Non-Accelerated)";
167static char *slic_vendor = "Alacritech, Inc.";
168
169static int slic_debug = 1;
170static int debug = -1;
171static struct net_device *head_netdevice;
172
e9eff9d6 173static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
4d6f6af8
GKH		 174static int intagg_delay = 100;
175static u32 dynamic_intagg;
4d6f6af8
GKH		 176static unsigned int rcv_count;
177static struct dentry *slic_debugfs;
178
179#define DRV_NAME "slicoss"
180#define DRV_VERSION "2.0.1"
181#define DRV_AUTHOR "Alacritech, Inc. Engineering"
182#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
183 "Non-Accelerated Driver"
184#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
185 "All rights reserved."
186#define PFX DRV_NAME " "
187
188MODULE_AUTHOR(DRV_AUTHOR);
189MODULE_DESCRIPTION(DRV_DESCRIPTION);
190MODULE_LICENSE("Dual BSD/GPL");
191
192module_param(dynamic_intagg, int, 0);
193MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
194module_param(intagg_delay, int, 0);
195MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
196
5d372900 197static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = {
198 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
199 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
200 { 0 }
4d6f6af8
GKH		 201};
202
203MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
204
a750c1c5
GKH		 205#ifdef ASSERT
206#undef ASSERT
207#endif
208
209#ifndef ASSERT
210#define ASSERT(a) do { \
211 if (!(a)) { \
212 printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \
213 "line %d\n", __func__, __LINE__); \
214 slic_assert_fail(); \
215 } \
216} while (0)
217#endif
218
219
4d6f6af8
GKH		 220#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
221{ \
e9eff9d6
LD		 222 spin_lock_irqsave(&_adapter->handle_lock.lock, \
223 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 224 _pslic_handle = _adapter->pfree_slic_handles; \
225 if (_pslic_handle) { \
226 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
227 _adapter->pfree_slic_handles = _pslic_handle->next; \
228 } \
e9eff9d6
LD		 229 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
230 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 231}
232
233#define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
234{ \
235 _pslic_handle->type = SLIC_HANDLE_FREE; \
e9eff9d6
LD		 236 spin_lock_irqsave(&_adapter->handle_lock.lock, \
237 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 238 _pslic_handle->next = _adapter->pfree_slic_handles; \
239 _adapter->pfree_slic_handles = _pslic_handle; \
e9eff9d6
LD		 240 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
241 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 242}
243
244static void slic_debug_init(void);
245static void slic_debug_cleanup(void);
e9eff9d6
LD		 246static void slic_debug_adapter_create(struct adapter *adapter);
247static void slic_debug_adapter_destroy(struct adapter *adapter);
248static void slic_debug_card_create(struct sliccard *card);
249static void slic_debug_card_destroy(struct sliccard *card);
4d6f6af8 250
62f691a3 251static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
4d6f6af8
GKH		 252{
253 writel(value, reg);
254 if (flush)
255 mb();
256}
257
28980a3c
GKH		 258static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
259 u32 value, void __iomem *regh, u32 paddrh,
260 bool flush)
4d6f6af8 261{
e9eff9d6
LD		 262 spin_lock_irqsave(&adapter->bit64reglock.lock,
263 adapter->bit64reglock.flags);
4d6f6af8
GKH		 264 if (paddrh != adapter->curaddrupper) {
265 adapter->curaddrupper = paddrh;
266 writel(paddrh, regh);
267 }
268 writel(value, reg);
269 if (flush)
270 mb();
e9eff9d6
LD		 271 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
272 adapter->bit64reglock.flags);
4d6f6af8
GKH		 273}
274
e9eff9d6 275static void slic_init_driver(void)
4d6f6af8
GKH		 276{
277 if (slic_first_init) {
4d6f6af8 278 slic_first_init = 0;
e9eff9d6 279 spin_lock_init(&slic_global.driver_lock.lock);
4d6f6af8
GKH		 280 slic_debug_init();
281 }
282}
283
4d6f6af8
GKH		 284static void slic_init_adapter(struct net_device *netdev,
285 struct pci_dev *pcidev,
286 const struct pci_device_id *pci_tbl_entry,
287 void __iomem *memaddr, int chip_idx)
288{
289 ushort index;
e9eff9d6 290 struct slic_handle *pslic_handle;
f8771fa6 291 struct adapter *adapter = netdev_priv(netdev);
e8bc9b7a 292
4d6f6af8
GKH		 293/* adapter->pcidev = pcidev;*/
294 adapter->vendid = pci_tbl_entry->vendor;
295 adapter->devid = pci_tbl_entry->device;
296 adapter->subsysid = pci_tbl_entry->subdevice;
297 adapter->busnumber = pcidev->bus->number;
298 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
299 adapter->functionnumber = (pcidev->devfn & 0x7);
300 adapter->memorylength = pci_resource_len(pcidev, 0);
e9eff9d6 301 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
4d6f6af8
GKH		 302 adapter->irq = pcidev->irq;
303/* adapter->netdev = netdev;*/
304 adapter->next_netdevice = head_netdevice;
305 head_netdevice = netdev;
306 adapter->chipid = chip_idx;
307 adapter->port = 0; /*adapter->functionnumber;*/
308 adapter->cardindex = adapter->port;
309 adapter->memorybase = memaddr;
e9eff9d6
LD		 310 spin_lock_init(&adapter->upr_lock.lock);
311 spin_lock_init(&adapter->bit64reglock.lock);
312 spin_lock_init(&adapter->adapter_lock.lock);
313 spin_lock_init(&adapter->reset_lock.lock);
314 spin_lock_init(&adapter->handle_lock.lock);
4d6f6af8
GKH		 315
316 adapter->card_size = 1;
317 /*
318 Initialize slic_handle array
319 */
320 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
321 /*
322 Start with 1. 0 is an invalid host handle.
323 */
324 for (index = 1, pslic_handle = &adapter->slic_handles[1];
325 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
326
327 pslic_handle->token.handle_index = index;
328 pslic_handle->type = SLIC_HANDLE_FREE;
329 pslic_handle->next = adapter->pfree_slic_handles;
330 adapter->pfree_slic_handles = pslic_handle;
331 }
e9eff9d6
LD		 332 adapter->pshmem = (struct slic_shmem *)
333 pci_alloc_consistent(adapter->pcidev,
66615321 334 sizeof(struct slic_shmem),
e9eff9d6
LD		 335 &adapter->
336 phys_shmem);
4d6f6af8
GKH		 337 ASSERT(adapter->pshmem);
338
e9eff9d6 339 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
4d6f6af8
GKH		 340
341 return;
342}
343
79bd1096
AB		 344static const struct net_device_ops slic_netdev_ops = {
345 .ndo_open = slic_entry_open,
346 .ndo_stop = slic_entry_halt,
347 .ndo_start_xmit = slic_xmit_start,
348 .ndo_do_ioctl = slic_ioctl,
349 .ndo_set_mac_address = slic_mac_set_address,
350 .ndo_get_stats = slic_get_stats,
351 .ndo_set_multicast_list = slic_mcast_set_list,
352 .ndo_validate_addr = eth_validate_addr,
79bd1096
AB		 353 .ndo_change_mtu = eth_change_mtu,
354};
355
e9eff9d6 356static int __devinit slic_entry_probe(struct pci_dev *pcidev,
4d6f6af8
GKH		 357 const struct pci_device_id *pci_tbl_entry)
358{
359 static int cards_found;
360 static int did_version;
1025744a 361 int err = -ENODEV;
4d6f6af8 362 struct net_device *netdev;
e9eff9d6 363 struct adapter *adapter;
4d6f6af8 364 void __iomem *memmapped_ioaddr = NULL;
e9eff9d6 365 u32 status = 0;
4d6f6af8
GKH		 366 ulong mmio_start = 0;
367 ulong mmio_len = 0;
e9eff9d6 368 struct sliccard *card = NULL;
4d6f6af8 369
4d6f6af8
GKH		 370 slic_global.dynamic_intagg = dynamic_intagg;
371
372 err = pci_enable_device(pcidev);
373
4d6f6af8
GKH		 374 if (err)
375 return err;
376
377 if (slic_debug > 0 && did_version++ == 0) {
e9ef456e
GKH		 378 printk(KERN_DEBUG "%s\n", slic_banner);
379 printk(KERN_DEBUG "%s\n", slic_proc_version);
4d6f6af8
GKH		 380 }
381
6a35528a 382 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
e8bc9b7a 383 if (err) {
6a35528a 384 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
e8bc9b7a 385 if (err)
1025744a 386 goto err_out_disable_pci;
4d6f6af8
GKH		 387 }
388
4d6f6af8 389 err = pci_request_regions(pcidev, DRV_NAME);
e8bc9b7a 390 if (err)
1025744a 391 goto err_out_disable_pci;
4d6f6af8 392
4d6f6af8
GKH		 393 pci_set_master(pcidev);
394
e9eff9d6 395 netdev = alloc_etherdev(sizeof(struct adapter));
4d6f6af8
GKH		 396 if (!netdev) {
397 err = -ENOMEM;
398 goto err_out_exit_slic_probe;
399 }
4d6f6af8
GKH		 400
401 SET_NETDEV_DEV(netdev, &pcidev->dev);
402
403 pci_set_drvdata(pcidev, netdev);
404 adapter = netdev_priv(netdev);
405 adapter->netdev = netdev;
406 adapter->pcidev = pcidev;
407
408 mmio_start = pci_resource_start(pcidev, 0);
409 mmio_len = pci_resource_len(pcidev, 0);
410
4d6f6af8 411
e8bc9b7a 412/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
4d6f6af8 413 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
4d6f6af8 414 if (!memmapped_ioaddr) {
4bee4f60
GKH		 415 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
416 mmio_len, mmio_start);
1025744a 417 goto err_out_free_netdev;
4d6f6af8
GKH		 418 }
419
4d6f6af8
GKH		 420 slic_config_pci(pcidev);
421
422 slic_init_driver();
423
424 slic_init_adapter(netdev,
425 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
426
427 status = slic_card_locate(adapter);
428 if (status) {
4bee4f60 429 dev_err(&pcidev->dev, "cannot locate card\n");
4d6f6af8
GKH		 430 goto err_out_free_mmio_region;
431 }
432
433 card = adapter->card;
434
435 if (!adapter->allocated) {
436 card->adapters_allocated++;
437 adapter->allocated = 1;
438 }
439
4d6f6af8
GKH		 440 status = slic_card_init(card, adapter);
441
442 if (status != STATUS_SUCCESS) {
443 card->state = CARD_FAIL;
444 adapter->state = ADAPT_FAIL;
445 adapter->linkstate = LINK_DOWN;
4bee4f60 446 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
4d6f6af8
GKH		 447 } else {
448 slic_adapter_set_hwaddr(adapter);
449 }
450
451 netdev->base_addr = (unsigned long)adapter->memorybase;
452 netdev->irq = adapter->irq;
79bd1096 453 netdev->netdev_ops = &slic_netdev_ops;
4d6f6af8
GKH		 454
455 slic_debug_adapter_create(adapter);
456
457 strcpy(netdev->name, "eth%d");
458 err = register_netdev(netdev);
459 if (err) {
4bee4f60 460 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
4d6f6af8
GKH		 461 goto err_out_unmap;
462 }
463
4d6f6af8 464 cards_found++;
4d6f6af8
GKH		 465
466 return status;
467
468err_out_unmap:
469 iounmap(memmapped_ioaddr);
4d6f6af8
GKH		 470err_out_free_mmio_region:
471 release_mem_region(mmio_start, mmio_len);
1025744a
LD		 472err_out_free_netdev:
473 free_netdev(netdev);
4d6f6af8 474err_out_exit_slic_probe:
f25fda72 475 pci_release_regions(pcidev);
1025744a
LD		 476err_out_disable_pci:
477 pci_disable_device(pcidev);
478 return err;
4d6f6af8
GKH		 479}
480
e9eff9d6 481static int slic_entry_open(struct net_device *dev)
4d6f6af8 482{
f8771fa6 483 struct adapter *adapter = netdev_priv(dev);
e9eff9d6
LD		 484 struct sliccard *card = adapter->card;
485 u32 locked = 0;
4d6f6af8
GKH		 486 int status;
487
488 ASSERT(adapter);
489 ASSERT(card);
4d6f6af8
GKH		 490
491 netif_stop_queue(adapter->netdev);
492
e9eff9d6
LD		 493 spin_lock_irqsave(&slic_global.driver_lock.lock,
494 slic_global.driver_lock.flags);
4d6f6af8
GKH		 495 locked = 1;
496 if (!adapter->activated) {
497 card->adapters_activated++;
498 slic_global.num_slic_ports_active++;
499 adapter->activated = 1;
500 }
501 status = slic_if_init(adapter);
502
503 if (status != STATUS_SUCCESS) {
504 if (adapter->activated) {
505 card->adapters_activated--;
506 slic_global.num_slic_ports_active--;
507 adapter->activated = 0;
508 }
509 if (locked) {
e9eff9d6
LD		 510 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
511 slic_global.driver_lock.flags);
4d6f6af8
GKH		 512 locked = 0;
513 }
514 return status;
515 }
4d6f6af8
GKH		 516 if (!card->master)
517 card->master = adapter;
4d6f6af8
GKH		 518
519 if (locked) {
e9eff9d6
LD		 520 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
521 slic_global.driver_lock.flags);
4d6f6af8
GKH		 522 locked = 0;
523 }
4d6f6af8
GKH		 524
525 return STATUS_SUCCESS;
526}
527
e9eff9d6 528static void __devexit slic_entry_remove(struct pci_dev *pcidev)
4d6f6af8
GKH		 529{
530 struct net_device *dev = pci_get_drvdata(pcidev);
e9eff9d6 531 u32 mmio_start = 0;
4d6f6af8 532 uint mmio_len = 0;
f8771fa6 533 struct adapter *adapter = netdev_priv(dev);
e9eff9d6 534 struct sliccard *card;
786ed801 535 struct mcast_address *mcaddr, *mlist;
4d6f6af8
GKH		 536
537 ASSERT(adapter);
4d6f6af8
GKH		 538 slic_adapter_freeresources(adapter);
539 slic_unmap_mmio_space(adapter);
4d6f6af8
GKH		 540 unregister_netdev(dev);
541
542 mmio_start = pci_resource_start(pcidev, 0);
543 mmio_len = pci_resource_len(pcidev, 0);
544
4d6f6af8
GKH		 545 release_mem_region(mmio_start, mmio_len);
546
4d6f6af8 547 iounmap((void __iomem *)dev->base_addr);
786ed801
LD		 548 /* free multicast addresses */
549 mlist = adapter->mcastaddrs;
550 while (mlist) {
551 mcaddr = mlist;
552 mlist = mlist->next;
553 kfree(mcaddr);
554 }
4d6f6af8
GKH		 555 ASSERT(adapter->card);
556 card = adapter->card;
557 ASSERT(card->adapters_allocated);
558 card->adapters_allocated--;
559 adapter->allocated = 0;
4d6f6af8 560 if (!card->adapters_allocated) {
e9eff9d6 561 struct sliccard *curr_card = slic_global.slic_card;
4d6f6af8
GKH		 562 if (curr_card == card) {
563 slic_global.slic_card = card->next;
564 } else {
565 while (curr_card->next != card)
566 curr_card = curr_card->next;
567 ASSERT(curr_card);
568 curr_card->next = card->next;
569 }
570 ASSERT(slic_global.num_slic_cards);
571 slic_global.num_slic_cards--;
572 slic_card_cleanup(card);
573 }
e9eff9d6 574 kfree(dev);
f25fda72 575 pci_release_regions(pcidev);
4d6f6af8
GKH		 576}
577
e9eff9d6 578static int slic_entry_halt(struct net_device *dev)
4d6f6af8 579{
f8771fa6 580 struct adapter *adapter = netdev_priv(dev);
e9eff9d6
LD		 581 struct sliccard *card = adapter->card;
582 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 583
e9eff9d6
LD		 584 spin_lock_irqsave(&slic_global.driver_lock.lock,
585 slic_global.driver_lock.flags);
4d6f6af8 586 ASSERT(card);
77faefa3 587 netif_stop_queue(adapter->netdev);
4d6f6af8
GKH		 588 adapter->state = ADAPT_DOWN;
589 adapter->linkstate = LINK_DOWN;
590 adapter->upr_list = NULL;
591 adapter->upr_busy = 0;
592 adapter->devflags_prev = 0;
4d6f6af8 593 ASSERT(card->adapter[adapter->cardindex] == adapter);
62f691a3 594 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
4d6f6af8
GKH		 595 adapter->all_reg_writes++;
596 adapter->icr_reg_writes++;
597 slic_config_clear(adapter);
4d6f6af8
GKH		 598 if (adapter->activated) {
599 card->adapters_activated--;
600 slic_global.num_slic_ports_active--;
601 adapter->activated = 0;
602 }
603#ifdef AUTOMATIC_RESET
62f691a3 604 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
4d6f6af8
GKH		 605#endif
606 /*
e8bc9b7a 607 * Reset the adapter's cmd queues
4d6f6af8
GKH		 608 */
609 slic_cmdq_reset(adapter);
4d6f6af8
GKH		 610
611#ifdef AUTOMATIC_RESET
e8bc9b7a 612 if (!card->adapters_activated)
4d6f6af8 613 slic_card_init(card, adapter);
4d6f6af8
GKH		 614#endif
615
e9eff9d6
LD		 616 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
617 slic_global.driver_lock.flags);
4d6f6af8
GKH		 618 return STATUS_SUCCESS;
619}
620
e9eff9d6 621static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
4d6f6af8 622{
f8771fa6 623 struct adapter *adapter = netdev_priv(dev);
e52011e4
GKH		 624 struct ethtool_cmd edata;
625 struct ethtool_cmd ecmd;
626 u32 data[7];
627 u32 intagg;
628
4d6f6af8 629 ASSERT(rq);
4d6f6af8
GKH		 630 switch (cmd) {
631 case SIOCSLICSETINTAGG:
e52011e4
GKH		 632 if (copy_from_user(data, rq->ifr_data, 28))
633 return -EFAULT;
634 intagg = data[0];
4bee4f60
GKH		 635 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
636 __func__, intagg);
e52011e4
GKH		 637 slic_intagg_set(adapter, intagg);
638 return 0;
4d6f6af8
GKH		 639
640#ifdef SLIC_TRACE_DUMP_ENABLED
641 case SIOCSLICTRACEDUMP:
642 {
e52011e4 643 u32 value;
4d6f6af8
GKH		 644 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
645
646 if (copy_from_user(data, rq->ifr_data, 28)) {
647 PRINT_ERROR
648 ("slic: copy_from_user FAILED getting \
649 initial simba param\n");
650 return -EFAULT;
651 }
652
653 value = data[0];
654 if (tracemon_request == SLIC_DUMP_DONE) {
655 PRINT_ERROR
656 ("ATK Diagnostic Trace Dump Requested\n");
657 tracemon_request = SLIC_DUMP_REQUESTED;
658 tracemon_request_type = value;
659 tracemon_timestamp = jiffies;
660 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
661 (tracemon_request ==
662 SLIC_DUMP_IN_PROGRESS)) {
663 PRINT_ERROR
664 ("ATK Diagnostic Trace Dump Requested but \
665 already in progress... ignore\n");
666 } else {
667 PRINT_ERROR
668 ("ATK Diagnostic Trace Dump Requested\n");
669 tracemon_request = SLIC_DUMP_REQUESTED;
670 tracemon_request_type = value;
671 tracemon_timestamp = jiffies;
672 }
673 return 0;
674 }
675#endif
4d6f6af8 676 case SIOCETHTOOL:
e52011e4
GKH		 677 ASSERT(adapter);
678 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
679 return -EFAULT;
680
681 if (ecmd.cmd == ETHTOOL_GSET) {
682 edata.supported = (SUPPORTED_10baseT_Half |
683 SUPPORTED_10baseT_Full |
684 SUPPORTED_100baseT_Half |
685 SUPPORTED_100baseT_Full |
686 SUPPORTED_Autoneg | SUPPORTED_MII);
687 edata.port = PORT_MII;
688 edata.transceiver = XCVR_INTERNAL;
689 edata.phy_address = 0;
690 if (adapter->linkspeed == LINK_100MB)
691 edata.speed = SPEED_100;
692 else if (adapter->linkspeed == LINK_10MB)
693 edata.speed = SPEED_10;
694 else
695 edata.speed = 0;
696
697 if (adapter->linkduplex == LINK_FULLD)
698 edata.duplex = DUPLEX_FULL;
699 else
700 edata.duplex = DUPLEX_HALF;
701
702 edata.autoneg = AUTONEG_ENABLE;
703 edata.maxtxpkt = 1;
704 edata.maxrxpkt = 1;
705 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
4d6f6af8
GKH		 706 return -EFAULT;
707
e52011e4
GKH		 708 } else if (ecmd.cmd == ETHTOOL_SSET) {
709 if (!capable(CAP_NET_ADMIN))
710 return -EPERM;
711
712 if (adapter->linkspeed == LINK_100MB)
713 edata.speed = SPEED_100;
714 else if (adapter->linkspeed == LINK_10MB)
715 edata.speed = SPEED_10;
716 else
717 edata.speed = 0;
718
719 if (adapter->linkduplex == LINK_FULLD)
720 edata.duplex = DUPLEX_FULL;
721 else
722 edata.duplex = DUPLEX_HALF;
723
724 edata.autoneg = AUTONEG_ENABLE;
725 edata.maxtxpkt = 1;
726 edata.maxrxpkt = 1;
727 if ((ecmd.speed != edata.speed) ||
728 (ecmd.duplex != edata.duplex)) {
729 u32 speed;
730 u32 duplex;
731
732 if (ecmd.speed == SPEED_10)
733 speed = 0;
4d6f6af8 734 else
e52011e4
GKH		 735 speed = PCR_SPEED_100;
736 if (ecmd.duplex == DUPLEX_FULL)
737 duplex = PCR_DUPLEX_FULL;
4d6f6af8 738 else
e52011e4
GKH		 739 duplex = 0;
740 slic_link_config(adapter, speed, duplex);
741 slic_link_event_handler(adapter);
4d6f6af8 742 }
4d6f6af8 743 }
e52011e4 744 return 0;
4d6f6af8 745 default:
4d6f6af8
GKH		 746 return -EOPNOTSUPP;
747 }
748}
749
750#define XMIT_FAIL_LINK_STATE 1
751#define XMIT_FAIL_ZERO_LENGTH 2
752#define XMIT_FAIL_HOSTCMD_FAIL 3
753
e9eff9d6
LD		 754static void slic_xmit_build_request(struct adapter *adapter,
755 struct slic_hostcmd *hcmd, struct sk_buff *skb)
4d6f6af8 756{
e9eff9d6 757 struct slic_host64_cmd *ihcmd;
4d6f6af8
GKH		 758 ulong phys_addr;
759
760 ihcmd = &hcmd->cmd64;
761
762 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
763 ihcmd->command = IHCMD_XMT_REQ;
764 ihcmd->u.slic_buffers.totlen = skb->len;
e9eff9d6
LD		 765 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
766 PCI_DMA_TODEVICE);
4d6f6af8
GKH		 767 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
768 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
769 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
770#if defined(CONFIG_X86_64)
e9eff9d6
LD		 771 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
772 (u64) hcmd) + 31) >> 5);
4d6f6af8 773#elif defined(CONFIG_X86)
e9eff9d6
LD		 774 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
775 (u32) hcmd) + 31) >> 5);
4d6f6af8
GKH		 776#else
777 Stop Compilation;
778#endif
779}
780
781#define NORMAL_ETHFRAME 0
782
203fe0d2 783static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
4d6f6af8 784{
e9eff9d6 785 struct sliccard *card;
f8771fa6 786 struct adapter *adapter = netdev_priv(dev);
e9eff9d6
LD		 787 struct slic_hostcmd *hcmd = NULL;
788 u32 status = 0;
789 u32 skbtype = NORMAL_ETHFRAME;
790 void *offloadcmd = NULL;
4d6f6af8
GKH		 791
792 card = adapter->card;
793 ASSERT(card);
4d6f6af8
GKH		 794 if ((adapter->linkstate != LINK_UP) ||
795 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
796 status = XMIT_FAIL_LINK_STATE;
797 goto xmit_fail;
798
799 } else if (skb->len == 0) {
800 status = XMIT_FAIL_ZERO_LENGTH;
801 goto xmit_fail;
802 }
803
804 if (skbtype == NORMAL_ETHFRAME) {
805 hcmd = slic_cmdq_getfree(adapter);
806 if (!hcmd) {
807 adapter->xmitq_full = 1;
808 status = XMIT_FAIL_HOSTCMD_FAIL;
809 goto xmit_fail;
810 }
811 ASSERT(hcmd->pslic_handle);
812 ASSERT(hcmd->cmd64.hosthandle ==
813 hcmd->pslic_handle->token.handle_token);
814 hcmd->skb = skb;
815 hcmd->busy = 1;
816 hcmd->type = SLIC_CMD_DUMB;
817 if (skbtype == NORMAL_ETHFRAME)
818 slic_xmit_build_request(adapter, hcmd, skb);
819 }
820 adapter->stats.tx_packets++;
821 adapter->stats.tx_bytes += skb->len;
822
823#ifdef DEBUG_DUMP
824 if (adapter->kill_card) {
68cf95f3 825 struct slic_host64_cmd ihcmd;
4d6f6af8
GKH		 826
827 ihcmd = &hcmd->cmd64;
828
829 ihcmd->flags |= 0x40;
830 adapter->kill_card = 0; /* only do this once */
831 }
832#endif
833 if (hcmd->paddrh == 0) {
62f691a3
GKH		 834 slic_reg32_write(&adapter->slic_regs->slic_cbar,
835 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
4d6f6af8 836 } else {
28980a3c
GKH		 837 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
838 (hcmd->paddrl | hcmd->cmdsize),
839 &adapter->slic_regs->slic_addr_upper,
840 hcmd->paddrh, DONT_FLUSH);
4d6f6af8
GKH		 841 }
842xmit_done:
6ed10654 843 return NETDEV_TX_OK;
4d6f6af8
GKH		 844xmit_fail:
845 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
846 goto xmit_done;
847}
848
e9eff9d6 849static void slic_xmit_fail(struct adapter *adapter,
4d6f6af8 850 struct sk_buff *skb,
e9eff9d6 851 void *cmd, u32 skbtype, u32 status)
4d6f6af8
GKH		 852{
853 if (adapter->xmitq_full)
77faefa3 854 netif_stop_queue(adapter->netdev);
4d6f6af8
GKH		 855 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
856 switch (status) {
857 case XMIT_FAIL_LINK_STATE:
4bee4f60
GKH		 858 dev_err(&adapter->netdev->dev,
859 "reject xmit skb[%p: %x] linkstate[%s] "
860 "adapter[%s:%d] card[%s:%d]\n",
861 skb, skb->pkt_type,
862 SLIC_LINKSTATE(adapter->linkstate),
863 SLIC_ADAPTER_STATE(adapter->state),
864 adapter->state,
865 SLIC_CARD_STATE(adapter->card->state),
866 adapter->card->state);
4d6f6af8
GKH		 867 break;
868 case XMIT_FAIL_ZERO_LENGTH:
4bee4f60
GKH		 869 dev_err(&adapter->netdev->dev,
870 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
871 skb, skb->pkt_type);
4d6f6af8
GKH		 872 break;
873 case XMIT_FAIL_HOSTCMD_FAIL:
4bee4f60
GKH		 874 dev_err(&adapter->netdev->dev,
875 "xmit_start skb[%p] type[%x] No host commands "
876 "available\n", skb, skb->pkt_type);
4d6f6af8
GKH		 877 break;
878 default:
879 ASSERT(0);
880 }
881 }
882 dev_kfree_skb(skb);
883 adapter->stats.tx_dropped++;
884}
885
e9eff9d6
LD		 886static void slic_rcv_handle_error(struct adapter *adapter,
887 struct slic_rcvbuf *rcvbuf)
4d6f6af8 888{
e9eff9d6 889 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
4d6f6af8
GKH		 890
891 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
892 if (hdr->frame_status14 & VRHSTAT_802OE)
893 adapter->if_events.oflow802++;
894 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
895 adapter->if_events.Tprtoflow++;
896 if (hdr->frame_status_b14 & VRHSTATB_802UE)
897 adapter->if_events.uflow802++;
898 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
899 adapter->if_events.rcvearly++;
900 adapter->stats.rx_fifo_errors++;
901 }
902 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
903 adapter->if_events.Bufov++;
904 adapter->stats.rx_over_errors++;
905 }
906 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
907 adapter->if_events.Carre++;
908 adapter->stats.tx_carrier_errors++;
909 }
910 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
911 adapter->if_events.Longe++;
912 if (hdr->frame_status_b14 & VRHSTATB_PREA)
913 adapter->if_events.Invp++;
914 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
915 adapter->if_events.Crc++;
916 adapter->stats.rx_crc_errors++;
917 }
918 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
919 adapter->if_events.Drbl++;
920 if (hdr->frame_status_b14 & VRHSTATB_CODE)
921 adapter->if_events.Code++;
922 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
923 adapter->if_events.TpCsum++;
924 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
925 adapter->if_events.TpHlen++;
926 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
927 adapter->if_events.IpCsum++;
928 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
929 adapter->if_events.IpLen++;
930 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
931 adapter->if_events.IpHlen++;
932 } else {
933 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
e9eff9d6 934 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
4d6f6af8
GKH		 935
936 if (xerr == VGBSTAT_XCSERR)
937 adapter->if_events.TpCsum++;
938 if (xerr == VGBSTAT_XUFLOW)
939 adapter->if_events.Tprtoflow++;
940 if (xerr == VGBSTAT_XHLEN)
941 adapter->if_events.TpHlen++;
942 }
943 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
e9eff9d6 944 u32 nerr =
4d6f6af8
GKH		 945 (hdr->
946 frame_statusGB >> VGBSTAT_NERRSHFT) &
947 VGBSTAT_NERRMSK;
948 if (nerr == VGBSTAT_NCSERR)
949 adapter->if_events.IpCsum++;
950 if (nerr == VGBSTAT_NUFLOW)
951 adapter->if_events.IpLen++;
952 if (nerr == VGBSTAT_NHLEN)
953 adapter->if_events.IpHlen++;
954 }
955 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
e9eff9d6 956 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
4d6f6af8
GKH		 957
958 if (lerr == VGBSTAT_LDEARLY)
959 adapter->if_events.rcvearly++;
960 if (lerr == VGBSTAT_LBOFLO)
961 adapter->if_events.Bufov++;
962 if (lerr == VGBSTAT_LCODERR)
963 adapter->if_events.Code++;
964 if (lerr == VGBSTAT_LDBLNBL)
965 adapter->if_events.Drbl++;
966 if (lerr == VGBSTAT_LCRCERR)
967 adapter->if_events.Crc++;
968 if (lerr == VGBSTAT_LOFLO)
969 adapter->if_events.oflow802++;
970 if (lerr == VGBSTAT_LUFLO)
971 adapter->if_events.uflow802++;
972 }
973 }
974 return;
975}
976
977#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
978#define M_FAST_PATH 0x0040
979
e9eff9d6 980static void slic_rcv_handler(struct adapter *adapter)
4d6f6af8
GKH		 981{
982 struct sk_buff *skb;
e9eff9d6
LD		 983 struct slic_rcvbuf *rcvbuf;
984 u32 frames = 0;
4d6f6af8
GKH		 985
986 while ((skb = slic_rcvqueue_getnext(adapter))) {
e9eff9d6 987 u32 rx_bytes;
4d6f6af8
GKH		 988
989 ASSERT(skb->head);
e9eff9d6 990 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8
GKH		 991 adapter->card->events++;
992 if (rcvbuf->status & IRHDDR_ERR) {
993 adapter->rx_errors++;
994 slic_rcv_handle_error(adapter, rcvbuf);
995 slic_rcvqueue_reinsert(adapter, skb);
996 continue;
997 }
998
e9eff9d6
LD		 999 if (!slic_mac_filter(adapter, (struct ether_header *)
1000 rcvbuf->data)) {
4d6f6af8
GKH		 1001 slic_rcvqueue_reinsert(adapter, skb);
1002 continue;
1003 }
1004 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1005 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1006 skb_put(skb, rx_bytes);
1007 adapter->stats.rx_packets++;
1008 adapter->stats.rx_bytes += rx_bytes;
1009#if SLIC_OFFLOAD_IP_CHECKSUM
1010 skb->ip_summed = CHECKSUM_UNNECESSARY;
1011#endif
1012
1013 skb->dev = adapter->netdev;
1014 skb->protocol = eth_type_trans(skb, skb->dev);
1015 netif_rx(skb);
1016
1017 ++frames;
1018#if SLIC_INTERRUPT_PROCESS_LIMIT
1019 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1020 adapter->rcv_interrupt_yields++;
1021 break;
1022 }
1023#endif
1024 }
1025 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1026}
1027
e9eff9d6 1028static void slic_xmit_complete(struct adapter *adapter)
4d6f6af8 1029{
e9eff9d6
LD		 1030 struct slic_hostcmd *hcmd;
1031 struct slic_rspbuf *rspbuf;
1032 u32 frames = 0;
1033 struct slic_handle_word slic_handle_word;
4d6f6af8
GKH		 1034
1035 do {
1036 rspbuf = slic_rspqueue_getnext(adapter);
1037 if (!rspbuf)
1038 break;
1039 adapter->xmit_completes++;
1040 adapter->card->events++;
1041 /*
1042 Get the complete host command buffer
1043 */
1044 slic_handle_word.handle_token = rspbuf->hosthandle;
1045 ASSERT(slic_handle_word.handle_index);
1046 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1047 hcmd =
e9eff9d6
LD		 1048 (struct slic_hostcmd *)
1049 adapter->slic_handles[slic_handle_word.handle_index].
1050 address;
1051/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
4d6f6af8
GKH		 1052 ASSERT(hcmd);
1053 ASSERT(hcmd->pslic_handle ==
1054 &adapter->slic_handles[slic_handle_word.handle_index]);
4d6f6af8
GKH		 1055 if (hcmd->type == SLIC_CMD_DUMB) {
1056 if (hcmd->skb)
1057 dev_kfree_skb_irq(hcmd->skb);
1058 slic_cmdq_putdone_irq(adapter, hcmd);
1059 }
1060 rspbuf->status = 0;
1061 rspbuf->hosthandle = 0;
1062 frames++;
1063 } while (1);
1064 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1065}
1066
1067static irqreturn_t slic_interrupt(int irq, void *dev_id)
1068{
e9eff9d6 1069 struct net_device *dev = (struct net_device *)dev_id;
f8771fa6 1070 struct adapter *adapter = netdev_priv(dev);
e9eff9d6 1071 u32 isr;
4d6f6af8
GKH		 1072
1073 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
62f691a3
GKH		 1074 slic_reg32_write(&adapter->slic_regs->slic_icr,
1075 ICR_INT_MASK, FLUSH);
4d6f6af8
GKH		 1076 isr = adapter->isrcopy = adapter->pshmem->isr;
1077 adapter->pshmem->isr = 0;
1078 adapter->num_isrs++;
1079 switch (adapter->card->state) {
1080 case CARD_UP:
1081 if (isr & ~ISR_IO) {
1082 if (isr & ISR_ERR) {
1083 adapter->error_interrupts++;
1084 if (isr & ISR_RMISS) {
1085 int count;
1086 int pre_count;
1087 int errors;
1088
e9eff9d6 1089 struct slic_rcvqueue *rcvq =
4d6f6af8
GKH		 1090 &adapter->rcvqueue;
1091
1092 adapter->
1093 error_rmiss_interrupts++;
1094 if (!rcvq->errors)
1095 rcv_count = rcvq->count;
1096 pre_count = rcvq->count;
1097 errors = rcvq->errors;
1098
1099 while (rcvq->count <
1100 SLIC_RCVQ_FILLTHRESH) {
1101 count =
1102 slic_rcvqueue_fill
1103 (adapter);
1104 if (!count)
1105 break;
1106 }
4d6f6af8 1107 } else if (isr & ISR_XDROP) {
4bee4f60
GKH		 1108 dev_err(&dev->dev,
1109 "isr & ISR_ERR [%x] "
1110 "ISR_XDROP \n", isr);
4d6f6af8 1111 } else {
4bee4f60
GKH		 1112 dev_err(&dev->dev,
1113 "isr & ISR_ERR [%x]\n",
1114 isr);
4d6f6af8
GKH		 1115 }
1116 }
1117
1118 if (isr & ISR_LEVENT) {
4d6f6af8
GKH		 1119 adapter->linkevent_interrupts++;
1120 slic_link_event_handler(adapter);
1121 }
1122
1123 if ((isr & ISR_UPC) ||
1124 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1125 adapter->upr_interrupts++;
1126 slic_upr_request_complete(adapter, isr);
1127 }
1128 }
1129
1130 if (isr & ISR_RCV) {
1131 adapter->rcv_interrupts++;
1132 slic_rcv_handler(adapter);
1133 }
1134
1135 if (isr & ISR_CMD) {
1136 adapter->xmit_interrupts++;
1137 slic_xmit_complete(adapter);
1138 }
1139 break;
1140
1141 case CARD_DOWN:
1142 if ((isr & ISR_UPC) ||
1143 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1144 adapter->upr_interrupts++;
1145 slic_upr_request_complete(adapter, isr);
1146 }
1147 break;
1148
1149 default:
1150 break;
1151 }
1152
1153 adapter->isrcopy = 0;
1154 adapter->all_reg_writes += 2;
1155 adapter->isr_reg_writes++;
62f691a3 1156 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
4d6f6af8
GKH		 1157 } else {
1158 adapter->false_interrupts++;
1159 }
1160 return IRQ_HANDLED;
1161}
1162
1163/*
1164 * slic_link_event_handler -
1165 *
1166 * Initiate a link configuration sequence. The link configuration begins
1167 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1168 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1169 * routine will follow it up witha UP configuration write command, which
1170 * will also complete asynchronously.
1171 *
1172 */
e9eff9d6 1173static void slic_link_event_handler(struct adapter *adapter)
4d6f6af8
GKH		 1174{
1175 int status;
e9eff9d6 1176 struct slic_shmem *pshmem;
4d6f6af8
GKH		 1177
1178 if (adapter->state != ADAPT_UP) {
1179 /* Adapter is not operational. Ignore. */
1180 return;
1181 }
1182
e9eff9d6 1183 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8
GKH		 1184
1185#if defined(CONFIG_X86_64)
4d6f6af8
GKH		 1186 status = slic_upr_request(adapter,
1187 SLIC_UPR_RLSR,
1188 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1189 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1190 0, 0);
1191#elif defined(CONFIG_X86)
1192 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
e9eff9d6 1193 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
4d6f6af8
GKH		 1194 0, 0, 0);
1195#else
1196 Stop compilation;
1197#endif
1198 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1199}
1200
e9eff9d6 1201static void slic_init_cleanup(struct adapter *adapter)
4d6f6af8 1202{
4d6f6af8 1203 if (adapter->intrregistered) {
4d6f6af8
GKH		 1204 adapter->intrregistered = 0;
1205 free_irq(adapter->netdev->irq, adapter->netdev);
1206
1207 }
1208 if (adapter->pshmem) {
4d6f6af8 1209 pci_free_consistent(adapter->pcidev,
66615321 1210 sizeof(struct slic_shmem),
4d6f6af8
GKH		 1211 adapter->pshmem, adapter->phys_shmem);
1212 adapter->pshmem = NULL;
1213 adapter->phys_shmem = (dma_addr_t) NULL;
1214 }
a0a1cbef 1215
4d6f6af8 1216 if (adapter->pingtimerset) {
4d6f6af8
GKH		 1217 adapter->pingtimerset = 0;
1218 del_timer(&adapter->pingtimer);
1219 }
a0a1cbef 1220
4d6f6af8
GKH		 1221 slic_rspqueue_free(adapter);
1222 slic_cmdq_free(adapter);
1223 slic_rcvqueue_free(adapter);
4d6f6af8
GKH		 1224}
1225
e9eff9d6 1226static struct net_device_stats *slic_get_stats(struct net_device *dev)
4d6f6af8 1227{
f8771fa6 1228 struct adapter *adapter = netdev_priv(dev);
4d6f6af8
GKH		 1229
1230 ASSERT(adapter);
6c7aeb65 1231 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
1232 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
1233 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
1234 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1235 dev->stats.tx_heartbeat_errors = 0;
1236 dev->stats.tx_aborted_errors = 0;
1237 dev->stats.tx_window_errors = 0;
1238 dev->stats.tx_fifo_errors = 0;
1239 dev->stats.rx_frame_errors = 0;
1240 dev->stats.rx_length_errors = 0;
1241
1242 return &dev->stats;
4d6f6af8 1243}
4d6f6af8
GKH		 1244
1245/*
1246 * Allocate a mcast_address structure to hold the multicast address.
1247 * Link it in.
1248 */
e9eff9d6 1249static int slic_mcast_add_list(struct adapter *adapter, char *address)
4d6f6af8 1250{
e9eff9d6
LD		 1251 struct mcast_address *mcaddr, *mlist;
1252 bool equaladdr;
4d6f6af8
GKH		 1253
1254 /* Check to see if it already exists */
1255 mlist = adapter->mcastaddrs;
1256 while (mlist) {
1257 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1258 if (equaladdr)
1259 return STATUS_SUCCESS;
1260 mlist = mlist->next;
1261 }
1262
1263 /* Doesn't already exist. Allocate a structure to hold it */
f7ed550b 1264 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
4d6f6af8
GKH		 1265 if (mcaddr == NULL)
1266 return 1;
1267
1268 memcpy(mcaddr->address, address, 6);
1269
1270 mcaddr->next = adapter->mcastaddrs;
1271 adapter->mcastaddrs = mcaddr;
1272
1273 return STATUS_SUCCESS;
1274}
1275
1276/*
1277 * Functions to obtain the CRC corresponding to the destination mac address.
1278 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1279 * the polynomial:
1280 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1281 * x^4 + x^2 + x^1.
1282 *
1283 * After the CRC for the 6 bytes is generated (but before the value is
1284 * complemented),
1285 * we must then transpose the value and return bits 30-23.
1286 *
1287 */
1288static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1289static u32 slic_crc_init; /* Is table initialized */
1290
1291/*
1292 * Contruct the CRC32 table
1293 */
e9eff9d6 1294static void slic_mcast_init_crc32(void)
4d6f6af8 1295{
e9eff9d6
LD		 1296 u32 c; /* CRC shit reg */
1297 u32 e = 0; /* Poly X-or pattern */
4d6f6af8
GKH		 1298 int i; /* counter */
1299 int k; /* byte being shifted into crc */
1300
1301 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1302
b6ac1613 1303 for (i = 0; i < ARRAY_SIZE(p); i++)
4d6f6af8
GKH		 1304 e |= 1L << (31 - p[i]);
1305
1306 for (i = 1; i < 256; i++) {
1307 c = i;
1308 for (k = 8; k; k--)
1309 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1310 slic_crc_table[i] = c;
1311 }
1312}
1313
1314/*
1315 * Return the MAC hast as described above.
1316 */
e9eff9d6 1317static unsigned char slic_mcast_get_mac_hash(char *macaddr)
4d6f6af8 1318{
e9eff9d6
LD		 1319 u32 crc;
1320 char *p;
4d6f6af8 1321 int i;
e9eff9d6 1322 unsigned char machash = 0;
4d6f6af8
GKH		 1323
1324 if (!slic_crc_init) {
1325 slic_mcast_init_crc32();
1326 slic_crc_init = 1;
1327 }
1328
1329 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1330 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1331 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1332
1333 /* Return bits 1-8, transposed */
1334 for (i = 1; i < 9; i++)
1335 machash |= (((crc >> i) & 1) << (8 - i));
1336
1337 return machash;
1338}
1339
e9eff9d6 1340static void slic_mcast_set_bit(struct adapter *adapter, char *address)
4d6f6af8 1341{
e9eff9d6 1342 unsigned char crcpoly;
4d6f6af8
GKH		 1343
1344 /* Get the CRC polynomial for the mac address */
1345 crcpoly = slic_mcast_get_mac_hash(address);
1346
1347 /* We only have space on the SLIC for 64 entries. Lop
1348 * off the top two bits. (2^6 = 64)
1349 */
1350 crcpoly &= 0x3F;
1351
1352 /* OR in the new bit into our 64 bit mask. */
e9eff9d6 1353 adapter->mcastmask |= (u64) 1 << crcpoly;
4d6f6af8
GKH		 1354}
1355
e9eff9d6 1356static void slic_mcast_set_list(struct net_device *dev)
4d6f6af8 1357{
f8771fa6 1358 struct adapter *adapter = netdev_priv(dev);
4d6f6af8
GKH		 1359 int status = STATUS_SUCCESS;
1360 int i;
e9eff9d6 1361 char *addresses;
4d6f6af8
GKH		 1362 struct dev_mc_list *mc_list = dev->mc_list;
1363 int mc_count = dev->mc_count;
1364
1365 ASSERT(adapter);
1366
1367 for (i = 1; i <= mc_count; i++) {
e9eff9d6 1368 addresses = (char *) &mc_list->dmi_addr;
4d6f6af8
GKH		 1369 if (mc_list->dmi_addrlen == 6) {
1370 status = slic_mcast_add_list(adapter, addresses);
1371 if (status != STATUS_SUCCESS)
1372 break;
1373 } else {
1374 status = -EINVAL;
1375 break;
1376 }
1377 slic_mcast_set_bit(adapter, addresses);
1378 mc_list = mc_list->next;
1379 }
1380
4d6f6af8
GKH		 1381 if (adapter->devflags_prev != dev->flags) {
1382 adapter->macopts = MAC_DIRECTED;
1383 if (dev->flags) {
1384 if (dev->flags & IFF_BROADCAST)
1385 adapter->macopts |= MAC_BCAST;
1386 if (dev->flags & IFF_PROMISC)
1387 adapter->macopts |= MAC_PROMISC;
1388 if (dev->flags & IFF_ALLMULTI)
1389 adapter->macopts |= MAC_ALLMCAST;
1390 if (dev->flags & IFF_MULTICAST)
1391 adapter->macopts |= MAC_MCAST;
1392 }
1393 adapter->devflags_prev = dev->flags;
b574488e 1394 slic_config_set(adapter, true);
4d6f6af8
GKH		 1395 } else {
1396 if (status == STATUS_SUCCESS)
1397 slic_mcast_set_mask(adapter);
1398 }
1399 return;
1400}
1401
e9eff9d6 1402static void slic_mcast_set_mask(struct adapter *adapter)
4d6f6af8 1403{
e9eff9d6 1404 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 1405
4d6f6af8
GKH		 1406 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1407 /* Turn on all multicast addresses. We have to do this for
1408 * promiscuous mode as well as ALLMCAST mode. It saves the
1409 * Microcode from having to keep state about the MAC
1410 * configuration.
1411 */
62f691a3
GKH		 1412 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1413 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
1414 FLUSH);
4d6f6af8
GKH		 1415 } else {
1416 /* Commit our multicast mast to the SLIC by writing to the
1417 * multicast address mask registers
1418 */
62f691a3
GKH		 1419 slic_reg32_write(&slic_regs->slic_mcastlow,
1420 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1421 slic_reg32_write(&slic_regs->slic_mcasthigh,
1422 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
4d6f6af8
GKH		 1423 }
1424}
1425
e9eff9d6 1426static void slic_timer_ping(ulong dev)
4d6f6af8 1427{
e9eff9d6
LD		 1428 struct adapter *adapter;
1429 struct sliccard *card;
4d6f6af8
GKH		 1430
1431 ASSERT(dev);
4bcd4267 1432 adapter = netdev_priv((struct net_device *)dev);
4d6f6af8
GKH		 1433 ASSERT(adapter);
1434 card = adapter->card;
1435 ASSERT(card);
4d6f6af8 1436
db7a673a 1437 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
4d6f6af8
GKH		 1438 add_timer(&adapter->pingtimer);
1439}
1440
4d6f6af8
GKH		 1441/*
1442 * slic_if_init
1443 *
1444 * Perform initialization of our slic interface.
1445 *
1446 */
e9eff9d6 1447static int slic_if_init(struct adapter *adapter)
4d6f6af8 1448{
e9eff9d6 1449 struct sliccard *card = adapter->card;
4d6f6af8 1450 struct net_device *dev = adapter->netdev;
e9eff9d6
LD		 1451 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1452 struct slic_shmem *pshmem;
4d6f6af8
GKH		 1453 int status = 0;
1454
1455 ASSERT(card);
4d6f6af8
GKH		 1456
1457 /* adapter should be down at this point */
1458 if (adapter->state != ADAPT_DOWN) {
4bee4f60
GKH		 1459 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
1460 __func__);
4d6f6af8
GKH		 1461 return -EIO;
1462 }
1463 ASSERT(adapter->linkstate == LINK_DOWN);
1464
1465 adapter->devflags_prev = dev->flags;
1466 adapter->macopts = MAC_DIRECTED;
1467 if (dev->flags) {
e8bc9b7a 1468 if (dev->flags & IFF_BROADCAST)
4d6f6af8 1469 adapter->macopts |= MAC_BCAST;
e8bc9b7a 1470 if (dev->flags & IFF_PROMISC)
4d6f6af8 1471 adapter->macopts |= MAC_PROMISC;
e8bc9b7a 1472 if (dev->flags & IFF_ALLMULTI)
4d6f6af8 1473 adapter->macopts |= MAC_ALLMCAST;
e8bc9b7a 1474 if (dev->flags & IFF_MULTICAST)
4d6f6af8 1475 adapter->macopts |= MAC_MCAST;
4d6f6af8
GKH		 1476 }
1477 status = slic_adapter_allocresources(adapter);
1478 if (status != STATUS_SUCCESS) {
4bee4f60
GKH		 1479 dev_err(&dev->dev,
1480 "%s: slic_adapter_allocresources FAILED %x\n",
1481 __func__, status);
4d6f6af8
GKH		 1482 slic_adapter_freeresources(adapter);
1483 return status;
1484 }
1485
1486 if (!adapter->queues_initialized) {
4d6f6af8
GKH		 1487 if (slic_rspqueue_init(adapter))
1488 return -ENOMEM;
4d6f6af8
GKH		 1489 if (slic_cmdq_init(adapter))
1490 return -ENOMEM;
4d6f6af8
GKH		 1491 if (slic_rcvqueue_init(adapter))
1492 return -ENOMEM;
1493 adapter->queues_initialized = 1;
1494 }
4d6f6af8 1495
62f691a3 1496 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
e9eff9d6 1497 mdelay(1);
4d6f6af8
GKH		 1498
1499 if (!adapter->isp_initialized) {
e9eff9d6 1500 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8 1501
e9eff9d6
LD		 1502 spin_lock_irqsave(&adapter->bit64reglock.lock,
1503 adapter->bit64reglock.flags);
4d6f6af8
GKH		 1504
1505#if defined(CONFIG_X86_64)
62f691a3
GKH		 1506 slic_reg32_write(&slic_regs->slic_addr_upper,
1507 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1508 slic_reg32_write(&slic_regs->slic_isp,
1509 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
4d6f6af8 1510#elif defined(CONFIG_X86)
62f691a3
GKH		 1511 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1512 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
4d6f6af8
GKH		 1513#else
1514 Stop Compilations
1515#endif
e9eff9d6
LD		 1516 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1517 adapter->bit64reglock.flags);
4d6f6af8
GKH		 1518 adapter->isp_initialized = 1;
1519 }
1520
1521 adapter->state = ADAPT_UP;
1522 if (!card->loadtimerset) {
1523 init_timer(&card->loadtimer);
1524 card->loadtimer.expires =
db7a673a 1525 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
4d6f6af8
GKH		 1526 card->loadtimer.data = (ulong) card;
1527 card->loadtimer.function = &slic_timer_load_check;
1528 add_timer(&card->loadtimer);
1529
1530 card->loadtimerset = 1;
1531 }
a0a1cbef 1532
4d6f6af8 1533 if (!adapter->pingtimerset) {
4d6f6af8
GKH		 1534 init_timer(&adapter->pingtimer);
1535 adapter->pingtimer.expires =
db7a673a 1536 jiffies + (PING_TIMER_INTERVAL * HZ);
4d6f6af8
GKH		 1537 adapter->pingtimer.data = (ulong) dev;
1538 adapter->pingtimer.function = &slic_timer_ping;
1539 add_timer(&adapter->pingtimer);
1540 adapter->pingtimerset = 1;
1541 adapter->card->pingstatus = ISR_PINGMASK;
1542 }
4d6f6af8
GKH		 1543
1544 /*
1545 * clear any pending events, then enable interrupts
1546 */
4d6f6af8
GKH		 1547 adapter->isrcopy = 0;
1548 adapter->pshmem->isr = 0;
62f691a3
GKH		 1549 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
1550 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
4d6f6af8 1551
4d6f6af8
GKH		 1552 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1553 slic_link_event_handler(adapter);
1554
4d6f6af8
GKH		 1555 return STATUS_SUCCESS;
1556}
1557
e9eff9d6 1558static void slic_unmap_mmio_space(struct adapter *adapter)
4d6f6af8 1559{
4d6f6af8
GKH		 1560 if (adapter->slic_regs)
1561 iounmap(adapter->slic_regs);
1562 adapter->slic_regs = NULL;
4d6f6af8
GKH		 1563}
1564
e9eff9d6 1565static int slic_adapter_allocresources(struct adapter *adapter)
4d6f6af8
GKH		 1566{
1567 if (!adapter->intrregistered) {
1568 int retval;
1569
e9eff9d6
LD		 1570 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1571 slic_global.driver_lock.flags);
4d6f6af8
GKH		 1572
1573 retval = request_irq(adapter->netdev->irq,
1574 &slic_interrupt,
1575 IRQF_SHARED,
1576 adapter->netdev->name, adapter->netdev);
1577
e9eff9d6
LD		 1578 spin_lock_irqsave(&slic_global.driver_lock.lock,
1579 slic_global.driver_lock.flags);
4d6f6af8
GKH		 1580
1581 if (retval) {
4bee4f60
GKH		 1582 dev_err(&adapter->netdev->dev,
1583 "request_irq (%s) FAILED [%x]\n",
1584 adapter->netdev->name, retval);
4d6f6af8
GKH		 1585 return retval;
1586 }
1587 adapter->intrregistered = 1;
4d6f6af8
GKH		 1588 }
1589 return STATUS_SUCCESS;
1590}
1591
e9eff9d6 1592static void slic_config_pci(struct pci_dev *pcidev)
4d6f6af8
GKH		 1593{
1594 u16 pci_command;
1595 u16 new_command;
1596
1597 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
4d6f6af8
GKH		 1598
1599 new_command = pci_command | PCI_COMMAND_MASTER
1600 | PCI_COMMAND_MEMORY
1601 | PCI_COMMAND_INVALIDATE
1602 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
e8bc9b7a 1603 if (pci_command != new_command)
4d6f6af8 1604 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
4d6f6af8
GKH		 1605}
1606
e9eff9d6 1607static void slic_adapter_freeresources(struct adapter *adapter)
4d6f6af8 1608{
4d6f6af8 1609 slic_init_cleanup(adapter);
e9eff9d6 1610 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
4d6f6af8
GKH		 1611 adapter->error_interrupts = 0;
1612 adapter->rcv_interrupts = 0;
1613 adapter->xmit_interrupts = 0;
1614 adapter->linkevent_interrupts = 0;
1615 adapter->upr_interrupts = 0;
1616 adapter->num_isrs = 0;
1617 adapter->xmit_completes = 0;
1618 adapter->rcv_broadcasts = 0;
1619 adapter->rcv_multicasts = 0;
1620 adapter->rcv_unicasts = 0;
4d6f6af8
GKH		 1621}
1622
1623/*
1624 * slic_link_config
1625 *
1626 * Write phy control to configure link duplex/speed
1627 *
1628 */
e9eff9d6
LD		 1629static void slic_link_config(struct adapter *adapter,
1630 u32 linkspeed, u32 linkduplex)
4d6f6af8 1631{
62f691a3 1632 u32 __iomem *wphy;
e9eff9d6
LD		 1633 u32 speed;
1634 u32 duplex;
1635 u32 phy_config;
1636 u32 phy_advreg;
1637 u32 phy_gctlreg;
4d6f6af8 1638
e8bc9b7a 1639 if (adapter->state != ADAPT_UP)
4d6f6af8 1640 return;
4d6f6af8
GKH		 1641
1642 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1643 || (adapter->devid == SLIC_2GB_DEVICE_ID));
1644
1645 if (linkspeed > LINK_1000MB)
1646 linkspeed = LINK_AUTOSPEED;
1647 if (linkduplex > LINK_AUTOD)
1648 linkduplex = LINK_AUTOD;
1649
62f691a3
GKH		 1650 wphy = &adapter->slic_regs->slic_wphy;
1651
4d6f6af8
GKH		 1652 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
1653 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
1654 /* We've got a fiber gigabit interface, and register
1655 * 4 is different in fiber mode than in copper mode
1656 */
1657
1658 /* advertise FD only @1000 Mb */
1659 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
1660 /* enable PAUSE frames */
1661 phy_advreg |= PAR_ASYMPAUSE_FIBER;
62f691a3 1662 slic_reg32_write(wphy, phy_advreg, FLUSH);
4d6f6af8
GKH		 1663
1664 if (linkspeed == LINK_AUTOSPEED) {
1665 /* reset phy, enable auto-neg */
1666 phy_config =
1667 (MIICR_REG_PCR |
1668 (PCR_RESET | PCR_AUTONEG |
1669 PCR_AUTONEG_RST));
62f691a3 1670 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1671 } else { /* forced 1000 Mb FD*/
1672 /* power down phy to break link
1673 this may not work) */
1674 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
62f691a3 1675 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1676 /* wait, Marvell says 1 sec,
1677 try to get away with 10 ms */
e9eff9d6 1678 mdelay(10);
4d6f6af8
GKH		 1679
1680 /* disable auto-neg, set speed/duplex,
1681 soft reset phy, powerup */
1682 phy_config =
1683 (MIICR_REG_PCR |
1684 (PCR_RESET | PCR_SPEED_1000 |
1685 PCR_DUPLEX_FULL));
62f691a3 1686 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1687 }
1688 } else { /* copper gigabit */
1689
1690 /* Auto-Negotiate or 1000 Mb must be auto negotiated
1691 * We've got a copper gigabit interface, and
1692 * register 4 is different in copper mode than
1693 * in fiber mode
1694 */
1695 if (linkspeed == LINK_AUTOSPEED) {
1696 /* advertise 10/100 Mb modes */
1697 phy_advreg =
1698 (MIICR_REG_4 |
1699 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
1700 | PAR_ADV10HD));
1701 } else {
1702 /* linkspeed == LINK_1000MB -
1703 don't advertise 10/100 Mb modes */
1704 phy_advreg = MIICR_REG_4;
1705 }
1706 /* enable PAUSE frames */
1707 phy_advreg |= PAR_ASYMPAUSE;
1708 /* required by the Cicada PHY */
1709 phy_advreg |= PAR_802_3;
62f691a3 1710 slic_reg32_write(wphy, phy_advreg, FLUSH);
4d6f6af8
GKH		 1711 /* advertise FD only @1000 Mb */
1712 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
62f691a3 1713 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
4d6f6af8
GKH		 1714
1715 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1716 /* if a Marvell PHY
1717 enable auto crossover */
1718 phy_config =
1719 (MIICR_REG_16 | (MRV_REG16_XOVERON));
62f691a3 1720 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1721
1722 /* reset phy, enable auto-neg */
1723 phy_config =
1724 (MIICR_REG_PCR |
1725 (PCR_RESET | PCR_AUTONEG |
1726 PCR_AUTONEG_RST));
62f691a3 1727 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1728 } else { /* it's a Cicada PHY */
1729 /* enable and restart auto-neg (don't reset) */
1730 phy_config =
1731 (MIICR_REG_PCR |
1732 (PCR_AUTONEG | PCR_AUTONEG_RST));
62f691a3 1733 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1734 }
1735 }
1736 } else {
1737 /* Forced 10/100 */
1738 if (linkspeed == LINK_10MB)
1739 speed = 0;
1740 else
1741 speed = PCR_SPEED_100;
1742 if (linkduplex == LINK_HALFD)
1743 duplex = 0;
1744 else
1745 duplex = PCR_DUPLEX_FULL;
1746
1747 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1748 /* if a Marvell PHY
1749 disable auto crossover */
1750 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
62f691a3 1751 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1752 }
1753
1754 /* power down phy to break link (this may not work) */
1755 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
62f691a3 1756 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1757
1758 /* wait, Marvell says 1 sec, try to get away with 10 ms */
e9eff9d6 1759 mdelay(10);
4d6f6af8
GKH		 1760
1761 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1762 /* if a Marvell PHY
1763 disable auto-neg, set speed,
1764 soft reset phy, powerup */
1765 phy_config =
1766 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
62f691a3 1767 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1768 } else { /* it's a Cicada PHY */
1769 /* disable auto-neg, set speed, powerup */
1770 phy_config = (MIICR_REG_PCR | (speed | duplex));
62f691a3 1771 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8
GKH		 1772 }
1773 }
4d6f6af8
GKH		 1774}
1775
e9eff9d6 1776static void slic_card_cleanup(struct sliccard *card)
4d6f6af8 1777{
4d6f6af8
GKH		 1778 if (card->loadtimerset) {
1779 card->loadtimerset = 0;
1780 del_timer(&card->loadtimer);
1781 }
1782
1783 slic_debug_card_destroy(card);
1784
e9eff9d6 1785 kfree(card);
4d6f6af8
GKH		 1786}
1787
e9eff9d6 1788static int slic_card_download_gbrcv(struct adapter *adapter)
4d6f6af8 1789{
470c5736
LD		 1790 const struct firmware *fw;
1791 const char *file = "";
1792 int ret;
e9eff9d6
LD		 1793 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1794 u32 codeaddr;
874073ea
LD		 1795 u32 instruction;
1796 int index = 0;
e9eff9d6 1797 u32 rcvucodelen = 0;
4d6f6af8
GKH		 1798
1799 switch (adapter->devid) {
1800 case SLIC_2GB_DEVICE_ID:
a390c479 1801 file = "slicoss/oasisrcvucode.sys";
4d6f6af8
GKH		 1802 break;
1803 case SLIC_1GB_DEVICE_ID:
a390c479 1804 file = "slicoss/gbrcvucode.sys";
470c5736
LD		 1805 break;
1806 default:
1807 ASSERT(0);
1808 break;
1809 }
1810
1811 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1812 if (ret) {
4bee4f60
GKH		 1813 dev_err(&adapter->pcidev->dev,
1814 "SLICOSS: Failed to load firmware %s\n", file);
470c5736
LD		 1815 return ret;
1816 }
1817
874073ea
LD		 1818 rcvucodelen = *(u32 *)(fw->data + index);
1819 index += 4;
470c5736
LD		 1820 switch (adapter->devid) {
1821 case SLIC_2GB_DEVICE_ID:
1822 if (rcvucodelen != OasisRcvUCodeLen)
1823 return -EINVAL;
1824 break;
1825 case SLIC_1GB_DEVICE_ID:
1826 if (rcvucodelen != GBRcvUCodeLen)
1827 return -EINVAL;
4d6f6af8
GKH		 1828 break;
1829 default:
1830 ASSERT(0);
1831 break;
1832 }
4d6f6af8 1833 /* start download */
62f691a3 1834 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
4d6f6af8
GKH		 1835 /* download the rcv sequencer ucode */
1836 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
1837 /* write out instruction address */
62f691a3 1838 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
4d6f6af8 1839
874073ea
LD		 1840 instruction = *(u32 *)(fw->data + index);
1841 index += 4;
4d6f6af8 1842 /* write out the instruction data low addr */
62f691a3 1843 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
4d6f6af8 1844
874073ea
LD		 1845 instruction = *(u8 *)(fw->data + index);
1846 index++;
4d6f6af8 1847 /* write out the instruction data high addr */
62f691a3
GKH		 1848 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
1849 FLUSH);
4d6f6af8
GKH		 1850 }
1851
1852 /* download finished */
470c5736 1853 release_firmware(fw);
62f691a3 1854 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
4d6f6af8
GKH		 1855 return 0;
1856}
1857
e9eff9d6 1858static int slic_card_download(struct adapter *adapter)
4d6f6af8 1859{
470c5736
LD		 1860 const struct firmware *fw;
1861 const char *file = "";
1862 int ret;
e9eff9d6 1863 u32 section;
4d6f6af8
GKH		 1864 int thissectionsize;
1865 int codeaddr;
e9eff9d6 1866 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
874073ea 1867 u32 instruction;
e9eff9d6 1868 u32 baseaddress;
e9eff9d6
LD		 1869 u32 i;
1870 u32 numsects = 0;
1871 u32 sectsize[3];
1872 u32 sectstart[3];
874073ea 1873 int ucode_start, index = 0;
4d6f6af8 1874
4d6f6af8
GKH		 1875 switch (adapter->devid) {
1876 case SLIC_2GB_DEVICE_ID:
a390c479 1877 file = "slicoss/oasisdownload.sys";
4d6f6af8
GKH		 1878 break;
1879 case SLIC_1GB_DEVICE_ID:
a390c479 1880 file = "slicoss/gbdownload.sys";
4d6f6af8
GKH		 1881 break;
1882 default:
1883 ASSERT(0);
1884 break;
1885 }
470c5736
LD		 1886 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1887 if (ret) {
4bee4f60
GKH		 1888 dev_err(&adapter->pcidev->dev,
1889 "SLICOSS: Failed to load firmware %s\n", file);
470c5736
LD		 1890 return ret;
1891 }
874073ea
LD		 1892 numsects = *(u32 *)(fw->data + index);
1893 index += 4;
4d6f6af8 1894 ASSERT(numsects <= 3);
874073ea
LD		 1895 for (i = 0; i < numsects; i++) {
1896 sectsize[i] = *(u32 *)(fw->data + index);
1897 index += 4;
1898 }
1899 for (i = 0; i < numsects; i++) {
1900 sectstart[i] = *(u32 *)(fw->data + index);
1901 index += 4;
1902 }
1903 ucode_start = index;
1904 instruction = *(u32 *)(fw->data + index);
1905 index += 4;
4d6f6af8 1906 for (section = 0; section < numsects; section++) {
4d6f6af8
GKH		 1907 baseaddress = sectstart[section];
1908 thissectionsize = sectsize[section] >> 3;
1909
1910 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
4d6f6af8 1911 /* Write out instruction address */
62f691a3
GKH		 1912 slic_reg32_write(&slic_regs->slic_wcs,
1913 baseaddress + codeaddr, FLUSH);
4d6f6af8 1914 /* Write out instruction to low addr */
62f691a3 1915 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
874073ea
LD		 1916 instruction = *(u32 *)(fw->data + index);
1917 index += 4;
1918
4d6f6af8 1919 /* Write out instruction to high addr */
62f691a3 1920 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
874073ea
LD		 1921 instruction = *(u32 *)(fw->data + index);
1922 index += 4;
4d6f6af8
GKH		 1923 }
1924 }
874073ea 1925 index = ucode_start;
4d6f6af8 1926 for (section = 0; section < numsects; section++) {
874073ea 1927 instruction = *(u32 *)(fw->data + index);
4d6f6af8
GKH		 1928 baseaddress = sectstart[section];
1929 if (baseaddress < 0x8000)
1930 continue;
1931 thissectionsize = sectsize[section] >> 3;
1932
4d6f6af8
GKH		 1933 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
1934 /* Write out instruction address */
62f691a3
GKH		 1935 slic_reg32_write(&slic_regs->slic_wcs,
1936 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
1937 FLUSH);
4d6f6af8 1938 /* Write out instruction to low addr */
62f691a3
GKH		 1939 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1940 FLUSH);
874073ea
LD		 1941 instruction = *(u32 *)(fw->data + index);
1942 index += 4;
4d6f6af8 1943 /* Write out instruction to high addr */
62f691a3
GKH		 1944 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1945 FLUSH);
874073ea
LD		 1946 instruction = *(u32 *)(fw->data + index);
1947 index += 4;
1948
4d6f6af8 1949 /* Check SRAM location zero. If it is non-zero. Abort.*/
874073ea 1950/* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
4d6f6af8 1951 if (failure) {
470c5736 1952 release_firmware(fw);
4d6f6af8 1953 return -EIO;
874073ea 1954 }*/
4d6f6af8
GKH		 1955 }
1956 }
470c5736 1957 release_firmware(fw);
4d6f6af8 1958 /* Everything OK, kick off the card */
e9eff9d6 1959 mdelay(10);
62f691a3 1960 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
4d6f6af8
GKH		 1961
1962 /* stall for 20 ms, long enough for ucode to init card
1963 and reach mainloop */
e9eff9d6 1964 mdelay(20);
4d6f6af8 1965
4d6f6af8
GKH		 1966 return STATUS_SUCCESS;
1967}
1968
e9eff9d6 1969static void slic_adapter_set_hwaddr(struct adapter *adapter)
4d6f6af8 1970{
e9eff9d6 1971 struct sliccard *card = adapter->card;
4d6f6af8 1972
4d6f6af8
GKH		 1973 if ((adapter->card) && (card->config_set)) {
1974 memcpy(adapter->macaddr,
1975 card->config.MacInfo[adapter->functionnumber].macaddrA,
e9eff9d6 1976 sizeof(struct slic_config_mac));
4d6f6af8
GKH		 1977 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
1978 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
1979 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
1980 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
1981 }
1982 if (adapter->netdev) {
1983 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
1984 6);
1985 }
1986 }
4d6f6af8
GKH		 1987}
1988
e9eff9d6 1989static void slic_intagg_set(struct adapter *adapter, u32 value)
4d6f6af8 1990{
62f691a3 1991 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
4d6f6af8
GKH		 1992 adapter->card->loadlevel_current = value;
1993}
1994
e9eff9d6 1995static int slic_card_init(struct sliccard *card, struct adapter *adapter)
4d6f6af8 1996{
e9eff9d6
LD		 1997 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1998 struct slic_eeprom *peeprom;
1999 struct oslic_eeprom *pOeeprom;
4d6f6af8 2000 dma_addr_t phys_config;
e9eff9d6
LD		 2001 u32 phys_configh;
2002 u32 phys_configl;
2003 u32 i = 0;
2004 struct slic_shmem *pshmem;
4d6f6af8
GKH		 2005 int status;
2006 uint macaddrs = card->card_size;
2007 ushort eecodesize;
2008 ushort dramsize;
2009 ushort ee_chksum;
2010 ushort calc_chksum;
e9eff9d6
LD		 2011 struct slic_config_mac *pmac;
2012 unsigned char fruformat;
2013 unsigned char oemfruformat;
2014 struct atk_fru *patkfru;
68cf95f3 2015 union oemfru *poemfru;
4d6f6af8 2016
4d6f6af8
GKH		 2017 /* Reset everything except PCI configuration space */
2018 slic_soft_reset(adapter);
2019
2020 /* Download the microcode */
2021 status = slic_card_download(adapter);
2022
2023 if (status != STATUS_SUCCESS) {
4bee4f60
GKH		 2024 dev_err(&adapter->pcidev->dev,
2025 "download failed bus %d slot %d\n",
2026 adapter->busnumber, adapter->slotnumber);
4d6f6af8
GKH		 2027 return status;
2028 }
2029
2030 if (!card->config_set) {
2031 peeprom = pci_alloc_consistent(adapter->pcidev,
e9eff9d6 2032 sizeof(struct slic_eeprom),
4d6f6af8
GKH		 2033 &phys_config);
2034
2035 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2036 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2037
4d6f6af8 2038 if (!peeprom) {
4bee4f60
GKH		 2039 dev_err(&adapter->pcidev->dev,
2040 "eeprom read failed to get memory "
2041 "bus %d slot %d\n", adapter->busnumber,
2042 adapter->slotnumber);
4d6f6af8
GKH		 2043 return -ENOMEM;
2044 } else {
e9eff9d6 2045 memset(peeprom, 0, sizeof(struct slic_eeprom));
4d6f6af8 2046 }
62f691a3 2047 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
e9eff9d6
LD		 2048 mdelay(1);
2049 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8 2050
e9eff9d6
LD		 2051 spin_lock_irqsave(&adapter->bit64reglock.lock,
2052 adapter->bit64reglock.flags);
62f691a3
GKH		 2053 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2054 slic_reg32_write(&slic_regs->slic_isp,
2055 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
e9eff9d6
LD		 2056 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2057 adapter->bit64reglock.flags);
4d6f6af8
GKH		 2058
2059 slic_config_get(adapter, phys_configl, phys_configh);
2060
2061 for (;;) {
2062 if (adapter->pshmem->isr) {
4d6f6af8
GKH		 2063 if (adapter->pshmem->isr & ISR_UPC) {
2064 adapter->pshmem->isr = 0;
28980a3c
GKH		 2065 slic_reg64_write(adapter,
2066 &slic_regs->slic_isp, 0,
2067 &slic_regs->slic_addr_upper,
2068 0, FLUSH);
62f691a3
GKH		 2069 slic_reg32_write(&slic_regs->slic_isr,
2070 0, FLUSH);
4d6f6af8
GKH		 2071
2072 slic_upr_request_complete(adapter, 0);
2073 break;
2074 } else {
2075 adapter->pshmem->isr = 0;
62f691a3
GKH		 2076 slic_reg32_write(&slic_regs->slic_isr,
2077 0, FLUSH);
4d6f6af8
GKH		 2078 }
2079 } else {
e9eff9d6 2080 mdelay(1);
4d6f6af8
GKH		 2081 i++;
2082 if (i > 5000) {
4bee4f60
GKH		 2083 dev_err(&adapter->pcidev->dev,
2084 "%d config data fetch timed out!\n",
2085 adapter->port);
28980a3c
GKH		 2086 slic_reg64_write(adapter,
2087 &slic_regs->slic_isp, 0,
2088 &slic_regs->slic_addr_upper,
2089 0, FLUSH);
4d6f6af8
GKH		 2090 return -EINVAL;
2091 }
2092 }
2093 }
2094
2095 switch (adapter->devid) {
2096 /* Oasis card */
2097 case SLIC_2GB_DEVICE_ID:
2098 /* extract EEPROM data and pointers to EEPROM data */
e9eff9d6 2099 pOeeprom = (struct oslic_eeprom *) peeprom;
4d6f6af8
GKH		 2100 eecodesize = pOeeprom->EecodeSize;
2101 dramsize = pOeeprom->DramSize;
2102 pmac = pOeeprom->MacInfo;
2103 fruformat = pOeeprom->FruFormat;
2104 patkfru = &pOeeprom->AtkFru;
2105 oemfruformat = pOeeprom->OemFruFormat;
2106 poemfru = &pOeeprom->OemFru;
2107 macaddrs = 2;
2108 /* Minor kludge for Oasis card
2109 get 2 MAC addresses from the
2110 EEPROM to ensure that function 1
2111 gets the Port 1 MAC address */
2112 break;
2113 default:
2114 /* extract EEPROM data and pointers to EEPROM data */
2115 eecodesize = peeprom->EecodeSize;
2116 dramsize = peeprom->DramSize;
2117 pmac = peeprom->u2.mac.MacInfo;
2118 fruformat = peeprom->FruFormat;
2119 patkfru = &peeprom->AtkFru;
2120 oemfruformat = peeprom->OemFruFormat;
2121 poemfru = &peeprom->OemFru;
2122 break;
2123 }
2124
b574488e 2125 card->config.EepromValid = false;
4d6f6af8
GKH		 2126
2127 /* see if the EEPROM is valid by checking it's checksum */
2128 if ((eecodesize <= MAX_EECODE_SIZE) &&
2129 (eecodesize >= MIN_EECODE_SIZE)) {
2130
2131 ee_chksum =
e9eff9d6 2132 *(u16 *) ((char *) peeprom + (eecodesize - 2));
4d6f6af8
GKH		 2133 /*
2134 calculate the EEPROM checksum
2135 */
2136 calc_chksum =
e9eff9d6 2137 ~slic_eeprom_cksum((char *) peeprom,
4d6f6af8
GKH		 2138 (eecodesize - 2));
2139 /*
2140 if the ucdoe chksum flag bit worked,
2141 we wouldn't need this shit
2142 */
2143 if (ee_chksum == calc_chksum)
b574488e 2144 card->config.EepromValid = true;
4d6f6af8
GKH		 2145 }
2146 /* copy in the DRAM size */
2147 card->config.DramSize = dramsize;
2148
2149 /* copy in the MAC address(es) */
2150 for (i = 0; i < macaddrs; i++) {
2151 memcpy(&card->config.MacInfo[i],
e9eff9d6 2152 &pmac[i], sizeof(struct slic_config_mac));
4d6f6af8 2153 }
4d6f6af8
GKH		 2154
2155 /* copy the Alacritech FRU information */
2156 card->config.FruFormat = fruformat;
e9eff9d6
LD		 2157 memcpy(&card->config.AtkFru, patkfru,
2158 sizeof(struct atk_fru));
4d6f6af8
GKH		 2159
2160 pci_free_consistent(adapter->pcidev,
e9eff9d6 2161 sizeof(struct slic_eeprom),
4d6f6af8 2162 peeprom, phys_config);
4d6f6af8
GKH		 2163
2164 if ((!card->config.EepromValid) &&
2165 (adapter->reg_params.fail_on_bad_eeprom)) {
28980a3c
GKH		 2166 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2167 &slic_regs->slic_addr_upper,
2168 0, FLUSH);
4bee4f60
GKH		 2169 dev_err(&adapter->pcidev->dev,
2170 "unsupported CONFIGURATION EEPROM invalid\n");
4d6f6af8
GKH		 2171 return -EINVAL;
2172 }
2173
2174 card->config_set = 1;
2175 }
2176
2177 if (slic_card_download_gbrcv(adapter)) {
4bee4f60
GKH		 2178 dev_err(&adapter->pcidev->dev,
2179 "unable to download GB receive microcode\n");
4d6f6af8
GKH		 2180 return -EINVAL;
2181 }
2182
e8bc9b7a 2183 if (slic_global.dynamic_intagg)
4d6f6af8 2184 slic_intagg_set(adapter, 0);
e8bc9b7a 2185 else
4d6f6af8 2186 slic_intagg_set(adapter, intagg_delay);
4d6f6af8
GKH		 2187
2188 /*
2189 * Initialize ping status to "ok"
2190 */
2191 card->pingstatus = ISR_PINGMASK;
2192
4d6f6af8
GKH		 2193 /*
2194 * Lastly, mark our card state as up and return success
2195 */
2196 card->state = CARD_UP;
2197 card->reset_in_progress = 0;
4d6f6af8
GKH		 2198
2199 return STATUS_SUCCESS;
2200}
2201
e9eff9d6 2202static u32 slic_card_locate(struct adapter *adapter)
4d6f6af8 2203{
e9eff9d6
LD		 2204 struct sliccard *card = slic_global.slic_card;
2205 struct physcard *physcard = slic_global.phys_card;
4d6f6af8
GKH		 2206 ushort card_hostid;
2207 u16 __iomem *hostid_reg;
2208 uint i;
2209 uint rdhostid_offset = 0;
2210
4d6f6af8
GKH		 2211 switch (adapter->devid) {
2212 case SLIC_2GB_DEVICE_ID:
2213 rdhostid_offset = SLIC_RDHOSTID_2GB;
2214 break;
2215 case SLIC_1GB_DEVICE_ID:
2216 rdhostid_offset = SLIC_RDHOSTID_1GB;
2217 break;
2218 default:
2219 ASSERT(0);
2220 break;
2221 }
2222
2223 hostid_reg =
2224 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2225 rdhostid_offset);
4d6f6af8
GKH		 2226
2227 /* read the 16 bit hostid from SRAM */
4d6f6af8 2228 card_hostid = (ushort) readw(hostid_reg);
4d6f6af8
GKH		 2229
2230 /* Initialize a new card structure if need be */
2231 if (card_hostid == SLIC_HOSTID_DEFAULT) {
e9eff9d6 2232 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
4d6f6af8
GKH		 2233 if (card == NULL)
2234 return -ENOMEM;
2235
2236 card->next = slic_global.slic_card;
2237 slic_global.slic_card = card;
4d6f6af8
GKH		 2238 card->busnumber = adapter->busnumber;
2239 card->slotnumber = adapter->slotnumber;
2240
2241 /* Find an available cardnum */
2242 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2243 if (slic_global.cardnuminuse[i] == 0) {
2244 slic_global.cardnuminuse[i] = 1;
2245 card->cardnum = i;
2246 break;
2247 }
2248 }
2249 slic_global.num_slic_cards++;
4d6f6af8
GKH		 2250
2251 slic_debug_card_create(card);
2252 } else {
4d6f6af8
GKH		 2253 /* Card exists, find the card this adapter belongs to */
2254 while (card) {
4d6f6af8
GKH		 2255 if (card->cardnum == card_hostid)
2256 break;
2257 card = card->next;
2258 }
2259 }
2260
2261 ASSERT(card);
2262 if (!card)
2263 return STATUS_FAILURE;
2264 /* Put the adapter in the card's adapter list */
2265 ASSERT(card->adapter[adapter->port] == NULL);
2266 if (!card->adapter[adapter->port]) {
2267 card->adapter[adapter->port] = adapter;
2268 adapter->card = card;
2269 }
2270
2271 card->card_size = 1; /* one port per *logical* card */
2272
2273 while (physcard) {
2274 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2275 if (!physcard->adapter[i])
2276 continue;
2277 else
2278 break;
2279 }
2280 ASSERT(i != SLIC_MAX_PORTS);
2281 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2282 break;
2283 physcard = physcard->next;
2284 }
2285 if (!physcard) {
2286 /* no structure allocated for this physical card yet */
f7ed550b 2287 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
4d6f6af8 2288 ASSERT(physcard);
4d6f6af8 2289
4d6f6af8
GKH		 2290 physcard->next = slic_global.phys_card;
2291 slic_global.phys_card = physcard;
2292 physcard->adapters_allocd = 1;
2293 } else {
2294 physcard->adapters_allocd++;
2295 }
2296 /* Note - this is ZERO relative */
2297 adapter->physport = physcard->adapters_allocd - 1;
2298
2299 ASSERT(physcard->adapter[adapter->physport] == NULL);
2300 physcard->adapter[adapter->physport] = adapter;
2301 adapter->physcard = physcard;
4d6f6af8
GKH		 2302
2303 return 0;
2304}
2305
e9eff9d6 2306static void slic_soft_reset(struct adapter *adapter)
4d6f6af8
GKH		 2307{
2308 if (adapter->card->state == CARD_UP) {
62f691a3 2309 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
e9eff9d6 2310 mdelay(1);
4d6f6af8 2311 }
4d6f6af8 2312
62f691a3
GKH		 2313 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
2314 FLUSH);
e9eff9d6 2315 mdelay(1);
4d6f6af8
GKH		 2316}
2317
e9eff9d6 2318static void slic_config_set(struct adapter *adapter, bool linkchange)
4d6f6af8 2319{
e9eff9d6
LD		 2320 u32 value;
2321 u32 RcrReset;
2322 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 2323
4d6f6af8
GKH		 2324 if (linkchange) {
2325 /* Setup MAC */
2326 slic_mac_config(adapter);
2327 RcrReset = GRCR_RESET;
2328 } else {
2329 slic_mac_address_config(adapter);
2330 RcrReset = 0;
2331 }
2332
2333 if (adapter->linkduplex == LINK_FULLD) {
2334 /* setup xmtcfg */
2335 value = (GXCR_RESET | /* Always reset */
2336 GXCR_XMTEN | /* Enable transmit */
2337 GXCR_PAUSEEN); /* Enable pause */
2338
62f691a3 2339 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8
GKH		 2340
2341 /* Setup rcvcfg last */
2342 value = (RcrReset | /* Reset, if linkchange */
2343 GRCR_CTLEN | /* Enable CTL frames */
2344 GRCR_ADDRAEN | /* Address A enable */
2345 GRCR_RCVBAD | /* Rcv bad frames */
2346 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2347 } else {
2348 /* setup xmtcfg */
2349 value = (GXCR_RESET | /* Always reset */
2350 GXCR_XMTEN); /* Enable transmit */
2351
62f691a3 2352 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8
GKH		 2353
2354 /* Setup rcvcfg last */
2355 value = (RcrReset | /* Reset, if linkchange */
2356 GRCR_ADDRAEN | /* Address A enable */
2357 GRCR_RCVBAD | /* Rcv bad frames */
2358 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2359 }
2360
2361 if (adapter->state != ADAPT_DOWN) {
2362 /* Only enable receive if we are restarting or running */
2363 value |= GRCR_RCVEN;
2364 }
2365
2366 if (adapter->macopts & MAC_PROMISC)
2367 value |= GRCR_RCVALL;
2368
62f691a3 2369 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
4d6f6af8
GKH		 2370}
2371
2372/*
2373 * Turn off RCV and XMT, power down PHY
2374 */
e9eff9d6 2375static void slic_config_clear(struct adapter *adapter)
4d6f6af8 2376{
e9eff9d6
LD		 2377 u32 value;
2378 u32 phy_config;
2379 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8
GKH		 2380
2381 /* Setup xmtcfg */
2382 value = (GXCR_RESET | /* Always reset */
2383 GXCR_PAUSEEN); /* Enable pause */
2384
62f691a3 2385 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8
GKH		 2386
2387 value = (GRCR_RESET | /* Always reset */
2388 GRCR_CTLEN | /* Enable CTL frames */
2389 GRCR_ADDRAEN | /* Address A enable */
2390 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2391
62f691a3 2392 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
4d6f6af8
GKH		 2393
2394 /* power down phy */
2395 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
62f691a3 2396 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
4d6f6af8
GKH		 2397}
2398
e9eff9d6
LD		 2399static void slic_config_get(struct adapter *adapter, u32 config,
2400 u32 config_h)
4d6f6af8
GKH		 2401{
2402 int status;
2403
2404 status = slic_upr_request(adapter,
2405 SLIC_UPR_RCONFIG,
e9eff9d6 2406 (u32) config, (u32) config_h, 0, 0);
4d6f6af8
GKH		 2407 ASSERT(status == 0);
2408}
2409
e9eff9d6 2410static void slic_mac_address_config(struct adapter *adapter)
4d6f6af8 2411{
e9eff9d6
LD		 2412 u32 value;
2413 u32 value2;
2414 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 2415
e9eff9d6 2416 value = *(u32 *) &adapter->currmacaddr[2];
4d6f6af8 2417 value = ntohl(value);
62f691a3
GKH		 2418 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
2419 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
4d6f6af8 2420
e9eff9d6 2421 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
4d6f6af8
GKH		 2422 adapter->currmacaddr[1]) & 0xFFFF);
2423
62f691a3
GKH		 2424 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
2425 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
4d6f6af8 2426
4d6f6af8
GKH		 2427 /* Write our multicast mask out to the card. This is done */
2428 /* here in addition to the slic_mcast_addr_set routine */
2429 /* because ALL_MCAST may have been enabled or disabled */
2430 slic_mcast_set_mask(adapter);
2431}
2432
e9eff9d6 2433static void slic_mac_config(struct adapter *adapter)
4d6f6af8 2434{
e9eff9d6
LD		 2435 u32 value;
2436 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8
GKH		 2437
2438 /* Setup GMAC gaps */
2439 if (adapter->linkspeed == LINK_1000MB) {
2440 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
2441 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
2442 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
2443 } else {
2444 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
2445 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
2446 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
2447 }
2448
2449 /* enable GMII */
2450 if (adapter->linkspeed == LINK_1000MB)
2451 value |= GMCR_GBIT;
2452
2453 /* enable fullduplex */
2454 if ((adapter->linkduplex == LINK_FULLD)
2455 || (adapter->macopts & MAC_LOOPBACK)) {
2456 value |= GMCR_FULLD;
2457 }
2458
2459 /* write mac config */
62f691a3 2460 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
4d6f6af8
GKH		 2461
2462 /* setup mac addresses */
2463 slic_mac_address_config(adapter);
2464}
2465
e9eff9d6
LD		 2466static bool slic_mac_filter(struct adapter *adapter,
2467 struct ether_header *ether_frame)
4d6f6af8 2468{
e9eff9d6
LD		 2469 u32 opts = adapter->macopts;
2470 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
2471 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
2472 bool equaladdr;
4d6f6af8 2473
e8bc9b7a 2474 if (opts & MAC_PROMISC)
b574488e 2475 return true;
4d6f6af8
GKH		 2476
2477 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
2478 if (opts & MAC_BCAST) {
2479 adapter->rcv_broadcasts++;
b574488e 2480 return true;
4d6f6af8 2481 } else {
b574488e 2482 return false;
4d6f6af8
GKH		 2483 }
2484 }
2485
2486 if (ether_frame->ether_dhost[0] & 0x01) {
2487 if (opts & MAC_ALLMCAST) {
2488 adapter->rcv_multicasts++;
2489 adapter->stats.multicast++;
b574488e 2490 return true;
4d6f6af8
GKH		 2491 }
2492 if (opts & MAC_MCAST) {
e9eff9d6 2493 struct mcast_address *mcaddr = adapter->mcastaddrs;
4d6f6af8
GKH		 2494
2495 while (mcaddr) {
2496 ETHER_EQ_ADDR(mcaddr->address,
2497 ether_frame->ether_dhost,
2498 equaladdr);
2499 if (equaladdr) {
2500 adapter->rcv_multicasts++;
2501 adapter->stats.multicast++;
b574488e 2502 return true;
4d6f6af8
GKH		 2503 }
2504 mcaddr = mcaddr->next;
2505 }
b574488e 2506 return false;
4d6f6af8 2507 } else {
b574488e 2508 return false;
4d6f6af8
GKH		 2509 }
2510 }
2511 if (opts & MAC_DIRECTED) {
2512 adapter->rcv_unicasts++;
b574488e 2513 return true;
4d6f6af8 2514 }
b574488e 2515 return false;
4d6f6af8
GKH		 2516
2517}
2518
e9eff9d6 2519static int slic_mac_set_address(struct net_device *dev, void *ptr)
4d6f6af8 2520{
f8771fa6 2521 struct adapter *adapter = netdev_priv(dev);
4d6f6af8
GKH		 2522 struct sockaddr *addr = ptr;
2523
4d6f6af8
GKH		 2524 if (netif_running(dev))
2525 return -EBUSY;
2526 if (!adapter)
2527 return -EBUSY;
e8bc9b7a 2528
a71b9978 2529 if (!is_valid_ether_addr(addr->sa_data))
2530 return -EINVAL;
2531
4d6f6af8
GKH		 2532 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2533 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
4d6f6af8 2534
b574488e 2535 slic_config_set(adapter, true);
4d6f6af8
GKH		 2536 return 0;
2537}
2538
e9eff9d6 2539static void slic_timer_load_check(ulong cardaddr)
4d6f6af8 2540{
e9eff9d6
LD		 2541 struct sliccard *card = (struct sliccard *)cardaddr;
2542 struct adapter *adapter = card->master;
62f691a3 2543 u32 __iomem *intagg;
e9eff9d6
LD		 2544 u32 load = card->events;
2545 u32 level = 0;
4d6f6af8 2546
62f691a3
GKH		 2547 intagg = &adapter->slic_regs->slic_intagg;
2548
4d6f6af8
GKH		 2549 if ((adapter) && (adapter->state == ADAPT_UP) &&
2550 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
2551 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
2552 if (adapter->linkspeed == LINK_1000MB)
2553 level = 100;
2554 else {
2555 if (load > SLIC_LOAD_5)
2556 level = SLIC_INTAGG_5;
2557 else if (load > SLIC_LOAD_4)
2558 level = SLIC_INTAGG_4;
2559 else if (load > SLIC_LOAD_3)
2560 level = SLIC_INTAGG_3;
2561 else if (load > SLIC_LOAD_2)
2562 level = SLIC_INTAGG_2;
2563 else if (load > SLIC_LOAD_1)
2564 level = SLIC_INTAGG_1;
2565 else
2566 level = SLIC_INTAGG_0;
2567 }
2568 if (card->loadlevel_current != level) {
2569 card->loadlevel_current = level;
62f691a3 2570 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8
GKH		 2571 }
2572 } else {
2573 if (load > SLIC_LOAD_5)
2574 level = SLIC_INTAGG_5;
2575 else if (load > SLIC_LOAD_4)
2576 level = SLIC_INTAGG_4;
2577 else if (load > SLIC_LOAD_3)
2578 level = SLIC_INTAGG_3;
2579 else if (load > SLIC_LOAD_2)
2580 level = SLIC_INTAGG_2;
2581 else if (load > SLIC_LOAD_1)
2582 level = SLIC_INTAGG_1;
2583 else
2584 level = SLIC_INTAGG_0;
2585 if (card->loadlevel_current != level) {
2586 card->loadlevel_current = level;
62f691a3 2587 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8
GKH		 2588 }
2589 }
2590 }
2591 card->events = 0;
db7a673a 2592 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
4d6f6af8
GKH		 2593 add_timer(&card->loadtimer);
2594}
2595
e9eff9d6 2596static void slic_assert_fail(void)
4d6f6af8 2597{
e9eff9d6
LD		 2598 u32 cpuid;
2599 u32 curr_pid;
4d6f6af8
GKH		 2600 cpuid = smp_processor_id();
2601 curr_pid = current->pid;
2602
4bee4f60
GKH		 2603 printk(KERN_ERR "%s CPU # %d ---- PID # %d\n",
2604 __func__, cpuid, curr_pid);
4d6f6af8
GKH		 2605}
2606
e9eff9d6
LD		 2607static int slic_upr_queue_request(struct adapter *adapter,
2608 u32 upr_request,
2609 u32 upr_data,
2610 u32 upr_data_h,
2611 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8 2612{
e9eff9d6
LD		 2613 struct slic_upr *upr;
2614 struct slic_upr *uprqueue;
4d6f6af8 2615
e9eff9d6 2616 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
e8bc9b7a 2617 if (!upr)
4d6f6af8 2618 return -ENOMEM;
e8bc9b7a 2619
4d6f6af8
GKH		 2620 upr->adapter = adapter->port;
2621 upr->upr_request = upr_request;
2622 upr->upr_data = upr_data;
2623 upr->upr_buffer = upr_buffer;
2624 upr->upr_data_h = upr_data_h;
2625 upr->upr_buffer_h = upr_buffer_h;
2626 upr->next = NULL;
2627 if (adapter->upr_list) {
2628 uprqueue = adapter->upr_list;
2629
2630 while (uprqueue->next)
2631 uprqueue = uprqueue->next;
2632 uprqueue->next = upr;
2633 } else {
2634 adapter->upr_list = upr;
2635 }
2636 return STATUS_SUCCESS;
2637}
2638
e9eff9d6
LD		 2639static int slic_upr_request(struct adapter *adapter,
2640 u32 upr_request,
2641 u32 upr_data,
2642 u32 upr_data_h,
2643 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8
GKH		 2644{
2645 int status;
2646
e9eff9d6 2647 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
4d6f6af8
GKH		 2648 status = slic_upr_queue_request(adapter,
2649 upr_request,
2650 upr_data,
2651 upr_data_h, upr_buffer, upr_buffer_h);
2652 if (status != STATUS_SUCCESS) {
e9eff9d6
LD		 2653 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2654 adapter->upr_lock.flags);
4d6f6af8
GKH		 2655 return status;
2656 }
2657 slic_upr_start(adapter);
e9eff9d6
LD		 2658 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2659 adapter->upr_lock.flags);
4d6f6af8
GKH		 2660 return STATUS_PENDING;
2661}
2662
e9eff9d6 2663static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
4d6f6af8 2664{
e9eff9d6
LD		 2665 struct sliccard *card = adapter->card;
2666 struct slic_upr *upr;
4d6f6af8 2667
e9eff9d6 2668 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
4d6f6af8
GKH		 2669 upr = adapter->upr_list;
2670 if (!upr) {
2671 ASSERT(0);
e9eff9d6
LD		 2672 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2673 adapter->upr_lock.flags);
4d6f6af8
GKH		 2674 return;
2675 }
2676 adapter->upr_list = upr->next;
2677 upr->next = NULL;
2678 adapter->upr_busy = 0;
2679 ASSERT(adapter->port == upr->adapter);
2680 switch (upr->upr_request) {
2681 case SLIC_UPR_STATS:
2682 {
e9eff9d6
LD		 2683 struct slic_stats *slicstats =
2684 (struct slic_stats *) &adapter->pshmem->inicstats;
2685 struct slic_stats *newstats = slicstats;
2686 struct slic_stats *old = &adapter->inicstats_prev;
2687 struct slicnet_stats *stst = &adapter->slic_stats;
3467db10 2688
4d6f6af8 2689 if (isr & ISR_UPCERR) {
4bee4f60
GKH		 2690 dev_err(&adapter->netdev->dev,
2691 "SLIC_UPR_STATS command failed isr[%x]\n",
2692 isr);
4d6f6af8
GKH		 2693
2694 break;
2695 }
4d6f6af8
GKH		 2696 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
2697 newstats->xmit_tcp_segs_gb,
2698 old->xmit_tcp_segs_gb);
2699
2700 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
2701 newstats->xmit_tcp_bytes_gb,
2702 old->xmit_tcp_bytes_gb);
2703
2704 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
2705 newstats->rcv_tcp_segs_gb,
2706 old->rcv_tcp_segs_gb);
2707
2708 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
2709 newstats->rcv_tcp_bytes_gb,
2710 old->rcv_tcp_bytes_gb);
2711
2712 UPDATE_STATS_GB(stst->iface.xmt_bytes,
2713 newstats->xmit_bytes_gb,
2714 old->xmit_bytes_gb);
2715
2716 UPDATE_STATS_GB(stst->iface.xmt_ucast,
2717 newstats->xmit_unicasts_gb,
2718 old->xmit_unicasts_gb);
2719
2720 UPDATE_STATS_GB(stst->iface.rcv_bytes,
2721 newstats->rcv_bytes_gb,
2722 old->rcv_bytes_gb);
2723
2724 UPDATE_STATS_GB(stst->iface.rcv_ucast,
2725 newstats->rcv_unicasts_gb,
2726 old->rcv_unicasts_gb);
2727
2728 UPDATE_STATS_GB(stst->iface.xmt_errors,
2729 newstats->xmit_collisions_gb,
2730 old->xmit_collisions_gb);
2731
2732 UPDATE_STATS_GB(stst->iface.xmt_errors,
2733 newstats->xmit_excess_collisions_gb,
2734 old->xmit_excess_collisions_gb);
2735
2736 UPDATE_STATS_GB(stst->iface.xmt_errors,
2737 newstats->xmit_other_error_gb,
2738 old->xmit_other_error_gb);
2739
2740 UPDATE_STATS_GB(stst->iface.rcv_errors,
2741 newstats->rcv_other_error_gb,
2742 old->rcv_other_error_gb);
2743
2744 UPDATE_STATS_GB(stst->iface.rcv_discards,
2745 newstats->rcv_drops_gb,
2746 old->rcv_drops_gb);
2747
2748 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
2749 adapter->rcv_drops +=
2750 (newstats->rcv_drops_gb -
2751 old->rcv_drops_gb);
2752 }
e9eff9d6 2753 memcpy(old, newstats, sizeof(struct slic_stats));
4d6f6af8
GKH		 2754 break;
2755 }
2756 case SLIC_UPR_RLSR:
2757 slic_link_upr_complete(adapter, isr);
2758 break;
2759 case SLIC_UPR_RCONFIG:
2760 break;
2761 case SLIC_UPR_RPHY:
2762 ASSERT(0);
2763 break;
2764 case SLIC_UPR_ENLB:
2765 ASSERT(0);
2766 break;
2767 case SLIC_UPR_ENCT:
2768 ASSERT(0);
2769 break;
2770 case SLIC_UPR_PDWN:
2771 ASSERT(0);
2772 break;
2773 case SLIC_UPR_PING:
2774 card->pingstatus |= (isr & ISR_PINGDSMASK);
2775 break;
4d6f6af8
GKH		 2776 default:
2777 ASSERT(0);
2778 }
e9eff9d6 2779 kfree(upr);
4d6f6af8 2780 slic_upr_start(adapter);
e9eff9d6
LD		 2781 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2782 adapter->upr_lock.flags);
4d6f6af8
GKH		 2783}
2784
e9eff9d6 2785static void slic_upr_start(struct adapter *adapter)
4d6f6af8 2786{
e9eff9d6
LD		 2787 struct slic_upr *upr;
2788 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8
GKH		 2789/*
2790 char * ptr1;
2791 char * ptr2;
2792 uint cmdoffset;
2793*/
2794 upr = adapter->upr_list;
2795 if (!upr)
2796 return;
2797 if (adapter->upr_busy)
2798 return;
2799 adapter->upr_busy = 1;
2800
2801 switch (upr->upr_request) {
2802 case SLIC_UPR_STATS:
2803 if (upr->upr_data_h == 0) {
62f691a3
GKH		 2804 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
2805 FLUSH);
4d6f6af8 2806 } else {
28980a3c
GKH		 2807 slic_reg64_write(adapter, &slic_regs->slic_stats64,
2808 upr->upr_data,
2809 &slic_regs->slic_addr_upper,
2810 upr->upr_data_h, FLUSH);
4d6f6af8
GKH		 2811 }
2812 break;
2813
2814 case SLIC_UPR_RLSR:
28980a3c
GKH		 2815 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
2816 &slic_regs->slic_addr_upper, upr->upr_data_h,
2817 FLUSH);
4d6f6af8
GKH		 2818 break;
2819
2820 case SLIC_UPR_RCONFIG:
28980a3c
GKH		 2821 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
2822 upr->upr_data, &slic_regs->slic_addr_upper,
2823 upr->upr_data_h, FLUSH);
4d6f6af8 2824 break;
4d6f6af8 2825 case SLIC_UPR_PING:
62f691a3 2826 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
4d6f6af8
GKH		 2827 break;
2828 default:
2829 ASSERT(0);
2830 }
2831}
2832
e9eff9d6 2833static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
4d6f6af8 2834{
e9eff9d6 2835 u32 linkstatus = adapter->pshmem->linkstatus;
4d6f6af8 2836 uint linkup;
e9eff9d6
LD		 2837 unsigned char linkspeed;
2838 unsigned char linkduplex;
4d6f6af8 2839
4d6f6af8 2840 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
e9eff9d6 2841 struct slic_shmem *pshmem;
4d6f6af8 2842
e9eff9d6 2843 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8
GKH		 2844#if defined(CONFIG_X86_64)
2845 slic_upr_queue_request(adapter,
2846 SLIC_UPR_RLSR,
2847 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2848 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2849 0, 0);
2850#elif defined(CONFIG_X86)
2851 slic_upr_queue_request(adapter,
2852 SLIC_UPR_RLSR,
e9eff9d6 2853 (u32) &pshmem->linkstatus,
4d6f6af8
GKH		 2854 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
2855#else
2856 Stop Compilation;
2857#endif
2858 return;
2859 }
2860 if (adapter->state != ADAPT_UP)
2861 return;
2862
2863 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
2864 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2865
2866 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
e8bc9b7a 2867 if (linkstatus & GIG_SPEED_1000)
4d6f6af8 2868 linkspeed = LINK_1000MB;
e8bc9b7a 2869 else if (linkstatus & GIG_SPEED_100)
4d6f6af8 2870 linkspeed = LINK_100MB;
e8bc9b7a 2871 else
4d6f6af8 2872 linkspeed = LINK_10MB;
e8bc9b7a
GKH		 2873
2874 if (linkstatus & GIG_FULLDUPLEX)
4d6f6af8 2875 linkduplex = LINK_FULLD;
e8bc9b7a 2876 else
4d6f6af8 2877 linkduplex = LINK_HALFD;
4d6f6af8 2878
e8bc9b7a 2879 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
4d6f6af8 2880 return;
4d6f6af8
GKH		 2881
2882 /* link up event, but nothing has changed */
2883 if ((adapter->linkstate == LINK_UP) &&
2884 (linkup == LINK_UP) &&
2885 (adapter->linkspeed == linkspeed) &&
e8bc9b7a 2886 (adapter->linkduplex == linkduplex))
4d6f6af8 2887 return;
4d6f6af8
GKH		 2888
2889 /* link has changed at this point */
2890
2891 /* link has gone from up to down */
2892 if (linkup == LINK_DOWN) {
2893 adapter->linkstate = LINK_DOWN;
4d6f6af8
GKH		 2894 return;
2895 }
2896
2897 /* link has gone from down to up */
2898 adapter->linkspeed = linkspeed;
2899 adapter->linkduplex = linkduplex;
2900
2901 if (adapter->linkstate != LINK_UP) {
2902 /* setup the mac */
b574488e 2903 slic_config_set(adapter, true);
4d6f6af8 2904 adapter->linkstate = LINK_UP;
77faefa3 2905 netif_start_queue(adapter->netdev);
4d6f6af8 2906 }
4d6f6af8
GKH		 2907}
2908
2909/*
2910 * this is here to checksum the eeprom, there is some ucode bug
2911 * which prevens us from using the ucode result.
2912 * remove this once ucode is fixed.
2913 */
e9eff9d6 2914static ushort slic_eeprom_cksum(char *m, int len)
4d6f6af8
GKH		 2915{
2916#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
2917#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
2918 }
2919
e9eff9d6
LD		 2920 u16 *w;
2921 u32 sum = 0;
2922 u32 byte_swapped = 0;
2923 u32 w_int;
4d6f6af8
GKH		 2924
2925 union {
2926 char c[2];
2927 ushort s;
2928 } s_util;
2929
2930 union {
2931 ushort s[2];
2932 int l;
2933 } l_util;
2934
2935 l_util.l = 0;
2936 s_util.s = 0;
2937
e9eff9d6 2938 w = (u16 *)m;
4d6f6af8 2939#ifdef CONFIG_X86_64
e9eff9d6 2940 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
4d6f6af8 2941#else
e9eff9d6 2942 w_int = (u32) (w);
4d6f6af8
GKH		 2943#endif
2944 if ((1 & w_int) && (len > 0)) {
2945 REDUCE;
2946 sum <<= 8;
e9eff9d6
LD		 2947 s_util.c[0] = *(unsigned char *)w;
2948 w = (u16 *)((char *)w + 1);
4d6f6af8
GKH		 2949 len--;
2950 byte_swapped = 1;
2951 }
2952
2953 /* Unroll the loop to make overhead from branches &c small. */
2954 while ((len -= 32) >= 0) {
2955 sum += w[0];
2956 sum += w[1];
2957 sum += w[2];
2958 sum += w[3];
2959 sum += w[4];
2960 sum += w[5];
2961 sum += w[6];
2962 sum += w[7];
2963 sum += w[8];
2964 sum += w[9];
2965 sum += w[10];
2966 sum += w[11];
2967 sum += w[12];
2968 sum += w[13];
2969 sum += w[14];
2970 sum += w[15];
e9eff9d6 2971 w = (u16 *)((ulong) w + 16); /* verify */
4d6f6af8
GKH		 2972 }
2973 len += 32;
2974 while ((len -= 8) >= 0) {
2975 sum += w[0];
2976 sum += w[1];
2977 sum += w[2];
2978 sum += w[3];
e9eff9d6 2979 w = (u16 *)((ulong) w + 4); /* verify */
4d6f6af8
GKH		 2980 }
2981 len += 8;
2982 if (len != 0 || byte_swapped != 0) {
2983 REDUCE;
2984 while ((len -= 2) >= 0)
2985 sum += *w++; /* verify */
2986 if (byte_swapped) {
2987 REDUCE;
2988 sum <<= 8;
2989 byte_swapped = 0;
2990 if (len == -1) {
e9eff9d6 2991 s_util.c[1] = *(char *) w;
4d6f6af8
GKH		 2992 sum += s_util.s;
2993 len = 0;
2994 } else {
2995 len = -1;
2996 }
2997
2998 } else if (len == -1) {
e9eff9d6 2999 s_util.c[0] = *(char *) w;
4d6f6af8
GKH		 3000 }
3001
3002 if (len == -1) {
3003 s_util.c[1] = 0;
3004 sum += s_util.s;
3005 }
3006 }
3007 REDUCE;
3008 return (ushort) sum;
3009}
3010
e9eff9d6 3011static int slic_rspqueue_init(struct adapter *adapter)
4d6f6af8
GKH		 3012{
3013 int i;
e9eff9d6
LD		 3014 struct slic_rspqueue *rspq = &adapter->rspqueue;
3015 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3016 u32 paddrh = 0;
4d6f6af8 3017
4d6f6af8 3018 ASSERT(adapter->state == ADAPT_DOWN);
e9eff9d6 3019 memset(rspq, 0, sizeof(struct slic_rspqueue));
4d6f6af8
GKH		 3020
3021 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3022
3023 for (i = 0; i < rspq->num_pages; i++) {
4bee4f60
GKH		 3024 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
3025 PAGE_SIZE,
3026 &rspq->paddr[i]);
4d6f6af8 3027 if (!rspq->vaddr[i]) {
4bee4f60
GKH		 3028 dev_err(&adapter->pcidev->dev,
3029 "pci_alloc_consistent failed\n");
4d6f6af8
GKH		 3030 slic_rspqueue_free(adapter);
3031 return STATUS_FAILURE;
3032 }
3033#ifndef CONFIG_X86_64
e9eff9d6
LD		 3034 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3035 (u32) rspq->vaddr[i]);
3036 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3037 (u32) rspq->paddr[i]);
4d6f6af8 3038#endif
e9eff9d6 3039 memset(rspq->vaddr[i], 0, PAGE_SIZE);
4d6f6af8
GKH		 3040
3041 if (paddrh == 0) {
62f691a3
GKH		 3042 slic_reg32_write(&slic_regs->slic_rbar,
3043 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3044 DONT_FLUSH);
4d6f6af8 3045 } else {
28980a3c
GKH		 3046 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
3047 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3048 &slic_regs->slic_addr_upper,
3049 paddrh, DONT_FLUSH);
4d6f6af8
GKH		 3050 }
3051 }
3052 rspq->offset = 0;
3053 rspq->pageindex = 0;
e9eff9d6 3054 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
4d6f6af8
GKH		 3055 return STATUS_SUCCESS;
3056}
3057
e9eff9d6 3058static void slic_rspqueue_free(struct adapter *adapter)
4d6f6af8
GKH		 3059{
3060 int i;
e9eff9d6 3061 struct slic_rspqueue *rspq = &adapter->rspqueue;
4d6f6af8 3062
4d6f6af8
GKH		 3063 for (i = 0; i < rspq->num_pages; i++) {
3064 if (rspq->vaddr[i]) {
4d6f6af8
GKH		 3065 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3066 rspq->vaddr[i], rspq->paddr[i]);
3067 }
3068 rspq->vaddr[i] = NULL;
3069 rspq->paddr[i] = 0;
3070 }
3071 rspq->offset = 0;
3072 rspq->pageindex = 0;
3073 rspq->rspbuf = NULL;
3074}
3075
e9eff9d6 3076static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
4d6f6af8 3077{
e9eff9d6
LD		 3078 struct slic_rspqueue *rspq = &adapter->rspqueue;
3079 struct slic_rspbuf *buf;
4d6f6af8
GKH		 3080
3081 if (!(rspq->rspbuf->status))
3082 return NULL;
3083
3084 buf = rspq->rspbuf;
3085#ifndef CONFIG_X86_64
3086 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3087#endif
3088 ASSERT(buf->hosthandle);
3089 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3090 rspq->rspbuf++;
3091#ifndef CONFIG_X86_64
e9eff9d6
LD		 3092 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3093 (u32) rspq->rspbuf);
4d6f6af8
GKH		 3094#endif
3095 } else {
3096 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
28980a3c
GKH		 3097 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
3098 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3099 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
4d6f6af8
GKH		 3100 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3101 rspq->offset = 0;
e9eff9d6
LD		 3102 rspq->rspbuf = (struct slic_rspbuf *)
3103 rspq->vaddr[rspq->pageindex];
4d6f6af8 3104#ifndef CONFIG_X86_64
e9eff9d6
LD		 3105 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3106 (u32) rspq->rspbuf);
4d6f6af8
GKH		 3107#endif
3108 }
3109#ifndef CONFIG_X86_64
e9eff9d6 3110 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
4d6f6af8
GKH		 3111#endif
3112 return buf;
3113}
3114
e9eff9d6 3115static void slic_cmdqmem_init(struct adapter *adapter)
4d6f6af8 3116{
e9eff9d6 3117 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
4d6f6af8 3118
e9eff9d6 3119 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
4d6f6af8
GKH		 3120}
3121
e9eff9d6 3122static void slic_cmdqmem_free(struct adapter *adapter)
4d6f6af8 3123{
e9eff9d6 3124 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
4d6f6af8
GKH		 3125 int i;
3126
4d6f6af8
GKH		 3127 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3128 if (cmdqmem->pages[i]) {
4d6f6af8
GKH		 3129 pci_free_consistent(adapter->pcidev,
3130 PAGE_SIZE,
e9eff9d6 3131 (void *) cmdqmem->pages[i],
4d6f6af8
GKH		 3132 cmdqmem->dma_pages[i]);
3133 }
3134 }
e9eff9d6 3135 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
4d6f6af8
GKH		 3136}
3137
e9eff9d6 3138static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
4d6f6af8 3139{
e9eff9d6
LD		 3140 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3141 u32 *pageaddr;
4d6f6af8
GKH		 3142
3143 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3144 return NULL;
3145 pageaddr = pci_alloc_consistent(adapter->pcidev,
3146 PAGE_SIZE,
3147 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3148 if (!pageaddr)
3149 return NULL;
3150#ifndef CONFIG_X86_64
e9eff9d6 3151 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
4d6f6af8
GKH		 3152#endif
3153 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3154 cmdqmem->pagecnt++;
3155 return pageaddr;
3156}
3157
e9eff9d6 3158static int slic_cmdq_init(struct adapter *adapter)
4d6f6af8
GKH		 3159{
3160 int i;
e9eff9d6 3161 u32 *pageaddr;
4d6f6af8 3162
4d6f6af8 3163 ASSERT(adapter->state == ADAPT_DOWN);
e9eff9d6
LD		 3164 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3165 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3166 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3167 spin_lock_init(&adapter->cmdq_all.lock.lock);
3168 spin_lock_init(&adapter->cmdq_free.lock.lock);
3169 spin_lock_init(&adapter->cmdq_done.lock.lock);
4d6f6af8
GKH		 3170 slic_cmdqmem_init(adapter);
3171 adapter->slic_handle_ix = 1;
3172 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3173 pageaddr = slic_cmdqmem_addpage(adapter);
3174#ifndef CONFIG_X86_64
e9eff9d6 3175 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
4d6f6af8
GKH		 3176#endif
3177 if (!pageaddr) {
3178 slic_cmdq_free(adapter);
3179 return STATUS_FAILURE;
3180 }
3181 slic_cmdq_addcmdpage(adapter, pageaddr);
3182 }
3183 adapter->slic_handle_ix = 1;
4d6f6af8
GKH		 3184
3185 return STATUS_SUCCESS;
3186}
3187
e9eff9d6 3188static void slic_cmdq_free(struct adapter *adapter)
4d6f6af8 3189{
e9eff9d6 3190 struct slic_hostcmd *cmd;
4d6f6af8 3191
4d6f6af8
GKH		 3192 cmd = adapter->cmdq_all.head;
3193 while (cmd) {
3194 if (cmd->busy) {
3195 struct sk_buff *tempskb;
3196
3197 tempskb = cmd->skb;
3198 if (tempskb) {
3199 cmd->skb = NULL;
3200 dev_kfree_skb_irq(tempskb);
3201 }
3202 }
3203 cmd = cmd->next_all;
3204 }
e9eff9d6
LD		 3205 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3206 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3207 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
4d6f6af8
GKH		 3208 slic_cmdqmem_free(adapter);
3209}
3210
e9eff9d6 3211static void slic_cmdq_reset(struct adapter *adapter)
4d6f6af8 3212{
e9eff9d6 3213 struct slic_hostcmd *hcmd;
4d6f6af8 3214 struct sk_buff *skb;
e9eff9d6 3215 u32 outstanding;
4d6f6af8 3216
e9eff9d6
LD		 3217 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
3218 adapter->cmdq_free.lock.flags);
3219 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
3220 adapter->cmdq_done.lock.flags);
4d6f6af8
GKH		 3221 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
3222 outstanding -= adapter->cmdq_free.count;
3223 hcmd = adapter->cmdq_all.head;
3224 while (hcmd) {
3225 if (hcmd->busy) {
3226 skb = hcmd->skb;
3227 ASSERT(skb);
4d6f6af8
GKH		 3228 hcmd->busy = 0;
3229 hcmd->skb = NULL;
4d6f6af8
GKH		 3230 dev_kfree_skb_irq(skb);
3231 }
3232 hcmd = hcmd->next_all;
3233 }
3234 adapter->cmdq_free.count = 0;
3235 adapter->cmdq_free.head = NULL;
3236 adapter->cmdq_free.tail = NULL;
3237 adapter->cmdq_done.count = 0;
3238 adapter->cmdq_done.head = NULL;
3239 adapter->cmdq_done.tail = NULL;
3240 adapter->cmdq_free.head = adapter->cmdq_all.head;
3241 hcmd = adapter->cmdq_all.head;
3242 while (hcmd) {
3243 adapter->cmdq_free.count++;
3244 hcmd->next = hcmd->next_all;
3245 hcmd = hcmd->next_all;
3246 }
3247 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
4bee4f60
GKH		 3248 dev_err(&adapter->netdev->dev,
3249 "free_count %d != all count %d\n",
3250 adapter->cmdq_free.count, adapter->cmdq_all.count);
4d6f6af8 3251 }
e9eff9d6
LD		 3252 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
3253 adapter->cmdq_done.lock.flags);
3254 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
3255 adapter->cmdq_free.lock.flags);
4d6f6af8
GKH		 3256}
3257
e9eff9d6 3258static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
4d6f6af8 3259{
e9eff9d6
LD		 3260 struct slic_hostcmd *cmd;
3261 struct slic_hostcmd *prev;
3262 struct slic_hostcmd *tail;
3263 struct slic_cmdqueue *cmdq;
4d6f6af8 3264 int cmdcnt;
e9eff9d6 3265 void *cmdaddr;
4d6f6af8 3266 ulong phys_addr;
e9eff9d6
LD		 3267 u32 phys_addrl;
3268 u32 phys_addrh;
3269 struct slic_handle *pslic_handle;
4d6f6af8
GKH		 3270
3271 cmdaddr = page;
e9eff9d6 3272 cmd = (struct slic_hostcmd *)cmdaddr;
4d6f6af8
GKH		 3273 cmdcnt = 0;
3274
e9eff9d6 3275 phys_addr = virt_to_bus((void *)page);
4d6f6af8
GKH		 3276 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
3277 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
3278
3279 prev = NULL;
3280 tail = cmd;
3281 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
3282 (adapter->slic_handle_ix < 256)) {
3283 /* Allocate and initialize a SLIC_HANDLE for this command */
3284 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
3285 if (pslic_handle == NULL)
3286 ASSERT(0);
3287 ASSERT(pslic_handle ==
3288 &adapter->slic_handles[pslic_handle->token.
3289 handle_index]);
3290 pslic_handle->type = SLIC_HANDLE_CMD;
e9eff9d6 3291 pslic_handle->address = (void *) cmd;
4d6f6af8
GKH		 3292 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
3293 pslic_handle->other_handle = NULL;
3294 pslic_handle->next = NULL;
3295
3296 cmd->pslic_handle = pslic_handle;
3297 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
b574488e 3298 cmd->busy = false;
4d6f6af8
GKH		 3299 cmd->paddrl = phys_addrl;
3300 cmd->paddrh = phys_addrh;
3301 cmd->next_all = prev;
3302 cmd->next = prev;
3303 prev = cmd;
3304 phys_addrl += SLIC_HOSTCMD_SIZE;
3305 cmdaddr += SLIC_HOSTCMD_SIZE;
3306
e9eff9d6 3307 cmd = (struct slic_hostcmd *)cmdaddr;
4d6f6af8
GKH		 3308 cmdcnt++;
3309 }
3310
3311 cmdq = &adapter->cmdq_all;
3312 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3313 tail->next_all = cmdq->head;
4d6f6af8
GKH		 3314 cmdq->head = prev;
3315 cmdq = &adapter->cmdq_free;
e9eff9d6 3316 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 3317 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3318 tail->next = cmdq->head;
4d6f6af8 3319 cmdq->head = prev;
e9eff9d6 3320 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 3321}
3322
e9eff9d6 3323static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
4d6f6af8 3324{
e9eff9d6
LD		 3325 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
3326 struct slic_hostcmd *cmd = NULL;
4d6f6af8
GKH		 3327
3328lock_and_retry:
e9eff9d6 3329 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 3330retry:
3331 cmd = cmdq->head;
3332 if (cmd) {
3333 cmdq->head = cmd->next;
3334 cmdq->count--;
e9eff9d6 3335 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 3336 } else {
3337 slic_cmdq_getdone(adapter);
3338 cmd = cmdq->head;
3339 if (cmd) {
3340 goto retry;
3341 } else {
e9eff9d6 3342 u32 *pageaddr;
4d6f6af8 3343
e9eff9d6
LD		 3344 spin_unlock_irqrestore(&cmdq->lock.lock,
3345 cmdq->lock.flags);
4d6f6af8
GKH		 3346 pageaddr = slic_cmdqmem_addpage(adapter);
3347 if (pageaddr) {
3348 slic_cmdq_addcmdpage(adapter, pageaddr);
3349 goto lock_and_retry;
3350 }
3351 }
3352 }
3353 return cmd;
3354}
3355
e9eff9d6 3356static void slic_cmdq_getdone(struct adapter *adapter)
4d6f6af8 3357{
e9eff9d6
LD		 3358 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
3359 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4d6f6af8
GKH		 3360
3361 ASSERT(free_cmdq->head == NULL);
e9eff9d6 3362 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4d6f6af8
GKH		 3363
3364 free_cmdq->head = done_cmdq->head;
3365 free_cmdq->count = done_cmdq->count;
3366 done_cmdq->head = NULL;
3367 done_cmdq->tail = NULL;
3368 done_cmdq->count = 0;
e9eff9d6 3369 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4d6f6af8
GKH		 3370}
3371
e9eff9d6
LD		 3372static void slic_cmdq_putdone_irq(struct adapter *adapter,
3373 struct slic_hostcmd *cmd)
4d6f6af8 3374{
e9eff9d6 3375 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4d6f6af8 3376
e9eff9d6 3377 spin_lock(&cmdq->lock.lock);
4d6f6af8 3378 cmd->busy = 0;
4d6f6af8 3379 cmd->next = cmdq->head;
4d6f6af8
GKH		 3380 cmdq->head = cmd;
3381 cmdq->count++;
3382 if ((adapter->xmitq_full) && (cmdq->count > 10))
3383 netif_wake_queue(adapter->netdev);
e9eff9d6 3384 spin_unlock(&cmdq->lock.lock);
4d6f6af8
GKH		 3385}
3386
e9eff9d6 3387static int slic_rcvqueue_init(struct adapter *adapter)
4d6f6af8
GKH		 3388{
3389 int i, count;
e9eff9d6 3390 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 3391
4d6f6af8
GKH		 3392 ASSERT(adapter->state == ADAPT_DOWN);
3393 rcvq->tail = NULL;
3394 rcvq->head = NULL;
3395 rcvq->size = SLIC_RCVQ_ENTRIES;
3396 rcvq->errors = 0;
3397 rcvq->count = 0;
3398 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
3399 count = 0;
3400 while (i) {
3401 count += slic_rcvqueue_fill(adapter);
3402 i--;
3403 }
3404 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
3405 slic_rcvqueue_free(adapter);
3406 return STATUS_FAILURE;
3407 }
4d6f6af8
GKH		 3408 return STATUS_SUCCESS;
3409}
3410
e9eff9d6 3411static void slic_rcvqueue_free(struct adapter *adapter)
4d6f6af8 3412{
e9eff9d6 3413 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8
GKH		 3414 struct sk_buff *skb;
3415
3416 while (rcvq->head) {
3417 skb = rcvq->head;
3418 rcvq->head = rcvq->head->next;
3419 dev_kfree_skb(skb);
3420 }
3421 rcvq->tail = NULL;
3422 rcvq->head = NULL;
3423 rcvq->count = 0;
3424}
3425
e9eff9d6 3426static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
4d6f6af8 3427{
e9eff9d6 3428 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 3429 struct sk_buff *skb;
e9eff9d6 3430 struct slic_rcvbuf *rcvbuf;
4d6f6af8
GKH		 3431 int count;
3432
3433 if (rcvq->count) {
3434 skb = rcvq->head;
e9eff9d6 3435 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8
GKH		 3436 ASSERT(rcvbuf);
3437
3438 if (rcvbuf->status & IRHDDR_SVALID) {
3439 rcvq->head = rcvq->head->next;
3440 skb->next = NULL;
3441 rcvq->count--;
3442 } else {
3443 skb = NULL;
3444 }
3445 } else {
4bee4f60
GKH		 3446 dev_err(&adapter->netdev->dev,
3447 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
4d6f6af8
GKH		 3448 skb = NULL;
3449 }
3450 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
3451 count = slic_rcvqueue_fill(adapter);
3452 if (!count)
3453 break;
3454 }
3455 if (skb)
3456 rcvq->errors = 0;
3457 return skb;
3458}
3459
e9eff9d6 3460static int slic_rcvqueue_fill(struct adapter *adapter)
4d6f6af8 3461{
e9eff9d6
LD		 3462 void *paddr;
3463 u32 paddrl;
3464 u32 paddrh;
3465 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 3466 int i = 0;
4bee4f60 3467 struct device *dev = &adapter->netdev->dev;
4d6f6af8
GKH		 3468
3469 while (i < SLIC_RCVQ_FILLENTRIES) {
e9eff9d6 3470 struct slic_rcvbuf *rcvbuf;
4d6f6af8
GKH		 3471 struct sk_buff *skb;
3472#ifdef KLUDGE_FOR_4GB_BOUNDARY
3473retry_rcvqfill:
3474#endif
3475 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
3476 if (skb) {
e9eff9d6 3477 paddr = (void *)pci_map_single(adapter->pcidev,
4d6f6af8 3478 skb->data,
e9eff9d6
LD		 3479 SLIC_RCVQ_RCVBUFSIZE,
3480 PCI_DMA_FROMDEVICE);
4d6f6af8
GKH		 3481 paddrl = SLIC_GET_ADDR_LOW(paddr);
3482 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3483
3484 skb->len = SLIC_RCVBUF_HEADSIZE;
e9eff9d6 3485 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8
GKH		 3486 rcvbuf->status = 0;
3487 skb->next = NULL;
3488#ifdef KLUDGE_FOR_4GB_BOUNDARY
3489 if (paddrl == 0) {
4bee4f60
GKH		 3490 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3491 __func__);
3492 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3493 dev_err(dev, " skbdata[%p]\n", skb->data);
3494 dev_err(dev, " skblen[%x]\n", skb->len);
3495 dev_err(dev, " paddr[%p]\n", paddr);
3496 dev_err(dev, " paddrl[%x]\n", paddrl);
3497 dev_err(dev, " paddrh[%x]\n", paddrh);
3498 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3499 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3500 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3501 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
4d6f6af8
GKH		 3502 goto retry_rcvqfill;
3503 }
3504#else
3505 if (paddrl == 0) {
4bee4f60
GKH		 3506 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3507 __func__);
3508 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3509 dev_err(dev, " skbdata[%p]\n", skb->data);
3510 dev_err(dev, " skblen[%x]\n", skb->len);
3511 dev_err(dev, " paddr[%p]\n", paddr);
3512 dev_err(dev, " paddrl[%x]\n", paddrl);
3513 dev_err(dev, " paddrh[%x]\n", paddrh);
3514 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3515 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3516 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3517 dev_err(dev, "GIVE TO CARD ANYWAY\n");
4d6f6af8
GKH		 3518 }
3519#endif
3520 if (paddrh == 0) {
62f691a3
GKH		 3521 slic_reg32_write(&adapter->slic_regs->slic_hbar,
3522 (u32)paddrl, DONT_FLUSH);
4d6f6af8 3523 } else {
28980a3c
GKH		 3524 slic_reg64_write(adapter,
3525 &adapter->slic_regs->slic_hbar64,
3526 paddrl,
3527 &adapter->slic_regs->slic_addr_upper,
3528 paddrh, DONT_FLUSH);
4d6f6af8
GKH		 3529 }
3530 if (rcvq->head)
3531 rcvq->tail->next = skb;
3532 else
3533 rcvq->head = skb;
3534 rcvq->tail = skb;
3535 rcvq->count++;
3536 i++;
3537 } else {
4bee4f60
GKH		 3538 dev_err(&adapter->netdev->dev,
3539 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
3540 i);
4d6f6af8
GKH		 3541 break;
3542 }
3543 }
3544 return i;
3545}
3546
e9eff9d6 3547static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
4d6f6af8 3548{
e9eff9d6
LD		 3549 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3550 void *paddr;
3551 u32 paddrl;
3552 u32 paddrh;
3553 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
4bee4f60 3554 struct device *dev;
4d6f6af8
GKH		 3555
3556 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
e9eff9d6
LD		 3557
3558 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
3559 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
4d6f6af8
GKH		 3560 rcvbuf->status = 0;
3561 skb->next = NULL;
3562
3563 paddrl = SLIC_GET_ADDR_LOW(paddr);
3564 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3565
3566 if (paddrl == 0) {
4bee4f60
GKH		 3567 dev = &adapter->netdev->dev;
3568 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3569 __func__);
3570 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3571 dev_err(dev, " skbdata[%p]\n", skb->data);
3572 dev_err(dev, " skblen[%x]\n", skb->len);
3573 dev_err(dev, " paddr[%p]\n", paddr);
3574 dev_err(dev, " paddrl[%x]\n", paddrl);
3575 dev_err(dev, " paddrh[%x]\n", paddrh);
3576 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3577 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3578 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
4d6f6af8
GKH		 3579 }
3580 if (paddrh == 0) {
62f691a3
GKH		 3581 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
3582 DONT_FLUSH);
4d6f6af8 3583 } else {
28980a3c
GKH		 3584 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
3585 paddrl, &adapter->slic_regs->slic_addr_upper,
3586 paddrh, DONT_FLUSH);
4d6f6af8
GKH		 3587 }
3588 if (rcvq->head)
3589 rcvq->tail->next = skb;
3590 else
3591 rcvq->head = skb;
3592 rcvq->tail = skb;
3593 rcvq->count++;
3594 return rcvq->count;
3595}
3596
3597static int slic_debug_card_show(struct seq_file *seq, void *v)
3598{
3599#ifdef MOOKTODO
3600 int i;
e9eff9d6 3601 struct sliccard *card = seq->private;
68cf95f3 3602 struct slic_config *config = &card->config;
e9eff9d6
LD		 3603 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
3604 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
4d6f6af8
GKH		 3605#endif
3606
874073ea 3607 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
4d6f6af8
GKH		 3608 seq_printf(seq, "Microcode versions: \n");
3609 seq_printf(seq, " Gigabit (gb) : %s %s\n",
3610 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
3611 seq_printf(seq, " Gigabit Receiver : %s %s\n",
3612 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
3613 seq_printf(seq, "Vendor : %s\n", slic_vendor);
3614 seq_printf(seq, "Product Name : %s\n", slic_product_name);
3615#ifdef MOOKTODO
3616 seq_printf(seq, "VendorId : %4.4X\n",
3617 config->VendorId);
3618 seq_printf(seq, "DeviceId : %4.4X\n",
3619 config->DeviceId);
3620 seq_printf(seq, "RevisionId : %2.2x\n",
3621 config->RevisionId);
3622 seq_printf(seq, "Bus # : %d\n", card->busnumber);
3623 seq_printf(seq, "Device # : %d\n", card->slotnumber);
3624 seq_printf(seq, "Interfaces : %d\n", card->card_size);
3625 seq_printf(seq, " Initialized : %d\n",
3626 card->adapters_activated);
3627 seq_printf(seq, " Allocated : %d\n",
3628 card->adapters_allocated);
3629 ASSERT(card->card_size <= SLIC_NBR_MACS);
3630 for (i = 0; i < card->card_size; i++) {
3631 seq_printf(seq,
3632 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
3633 i, config->macinfo[i].macaddrA[0],
3634 config->macinfo[i].macaddrA[1],
3635 config->macinfo[i].macaddrA[2],
3636 config->macinfo[i].macaddrA[3],
3637 config->macinfo[i].macaddrA[4],
3638 config->macinfo[i].macaddrA[5]);
3639 }
3640 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
3641 seq_printf(seq, " -------------------------------\n");
3642 for (i = 0; i < card->adapters_allocated; i++) {
e9eff9d6 3643 struct adapter *adapter;
4d6f6af8
GKH		 3644
3645 adapter = card->adapter[i];
3646 if (adapter) {
3647 seq_printf(seq,
3648 " %d %d %s %s %s 0x%X\n",
3649 adapter->physport, adapter->state,
3650 SLIC_LINKSTATE(adapter->linkstate),
3651 SLIC_DUPLEX(adapter->linkduplex),
3652 SLIC_SPEED(adapter->linkspeed),
3653 (uint) adapter->irq);
3654 }
3655 }
3656 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
3657 seq_printf(seq, "RcvQ max entries : %4.4X\n",
3658 SLIC_RCVQ_ENTRIES);
3659 seq_printf(seq, "Ping Status : %8.8X\n",
3660 card->pingstatus);
3661 seq_printf(seq, "Minimum grant : %2.2x\n",
3662 config->MinGrant);
3663 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
3664 seq_printf(seq, "PciStatus : %4.4x\n",
3665 config->Pcistatus);
3666 seq_printf(seq, "Debug Device Id : %4.4x\n",
3667 config->DbgDevId);
3668 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
3669 config->DramRomFn);
3670 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
3671 config->NetIntPin1);
3672 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
3673 config->NetIntPin1);
3674 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
3675 config->NetIntPin1);
3676 seq_printf(seq, "PM capabilities : %4.4X\n",
3677 config->PMECapab);
3678 seq_printf(seq, "Network Clock Controls : %4.4X\n",
3679 config->NwClkCtrls);
3680
3681 switch (config->FruFormat) {
3682 case ATK_FRU_FORMAT:
3683 {
3684 seq_printf(seq,
3685 "Vendor : Alacritech, Inc.\n");
3686 seq_printf(seq,
3687 "Assembly # : %c%c%c%c%c%c\n",
3688 fru[0], fru[1], fru[2], fru[3], fru[4],
3689 fru[5]);
3690 seq_printf(seq,
3691 "Revision # : %c%c\n",
3692 fru[6], fru[7]);
3693
3694 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
3695 seq_printf(seq,
3696 "Serial # : "
3697 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
3698 fru[8], fru[9], fru[10],
3699 fru[11], fru[12], fru[13],
3700 fru[16], fru[17], fru[18],
3701 fru[19], fru[20], fru[21]);
3702 } else {
3703 seq_printf(seq,
3704 "Serial # : "
3705 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
3706 fru[8], fru[9], fru[10],
3707 fru[11], fru[12], fru[13],
3708 fru[14], fru[15], fru[16],
3709 fru[17], fru[18], fru[19],
3710 fru[20], fru[21]);
3711 }
3712 break;
3713 }
3714
3715 default:
3716 {
3717 seq_printf(seq,
3718 "Vendor : Alacritech, Inc.\n");
3719 seq_printf(seq,
3720 "Serial # : Empty FRU\n");
3721 break;
3722 }
3723 }
3724
3725 switch (config->OEMFruFormat) {
3726 case VENDOR1_FRU_FORMAT:
3727 {
3728 seq_printf(seq, "FRU Information:\n");
3729 seq_printf(seq, " Commodity # : %c\n",
3730 oemfru[0]);
3731 seq_printf(seq,
3732 " Assembly # : %c%c%c%c\n",
3733 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
3734 seq_printf(seq,
3735 " Revision # : %c%c\n",
3736 oemfru[5], oemfru[6]);
3737 seq_printf(seq,
3738 " Supplier # : %c%c\n",
3739 oemfru[7], oemfru[8]);
3740 seq_printf(seq,
3741 " Date : %c%c\n",
3742 oemfru[9], oemfru[10]);
3743 seq_sprintf(seq,
3744 " Sequence # : %c%c%c\n",
3745 oemfru[11], oemfru[12], oemfru[13]);
3746 break;
3747 }
3748
3749 case VENDOR2_FRU_FORMAT:
3750 {
3751 seq_printf(seq, "FRU Information:\n");
3752 seq_printf(seq,
3753 " Part # : "
3754 "%c%c%c%c%c%c%c%c\n",
3755 oemfru[0], oemfru[1], oemfru[2],
3756 oemfru[3], oemfru[4], oemfru[5],
3757 oemfru[6], oemfru[7]);
3758 seq_printf(seq,
3759 " Supplier # : %c%c%c%c%c\n",
3760 oemfru[8], oemfru[9], oemfru[10],
3761 oemfru[11], oemfru[12]);
3762 seq_printf(seq,
3763 " Date : %c%c%c\n",
3764 oemfru[13], oemfru[14], oemfru[15]);
3765 seq_sprintf(seq,
3766 " Sequence # : %c%c%c%c\n",
3767 oemfru[16], oemfru[17], oemfru[18],
3768 oemfru[19]);
3769 break;
3770 }
3771
3772 case VENDOR3_FRU_FORMAT:
3773 {
3774 seq_printf(seq, "FRU Information:\n");
3775 }
3776
3777 case VENDOR4_FRU_FORMAT:
3778 {
3779 seq_printf(seq, "FRU Information:\n");
3780 seq_printf(seq,
3781 " FRU Number : "
3782 "%c%c%c%c%c%c%c%c\n",
3783 oemfru[0], oemfru[1], oemfru[2],
3784 oemfru[3], oemfru[4], oemfru[5],
3785 oemfru[6], oemfru[7]);
3786 seq_sprintf(seq,
3787 " Part Number : "
3788 "%c%c%c%c%c%c%c%c\n",
3789 oemfru[8], oemfru[9], oemfru[10],
3790 oemfru[11], oemfru[12], oemfru[13],
3791 oemfru[14], oemfru[15]);
3792 seq_printf(seq,
3793 " EC Level : "
3794 "%c%c%c%c%c%c%c%c\n",
3795 oemfru[16], oemfru[17], oemfru[18],
3796 oemfru[19], oemfru[20], oemfru[21],
3797 oemfru[22], oemfru[23]);
3798 break;
3799 }
3800
3801 default:
3802 break;
3803 }
3804#endif
3805
3806 return 0;
3807}
3808
3809static int slic_debug_adapter_show(struct seq_file *seq, void *v)
3810{
e9eff9d6 3811 struct adapter *adapter = seq->private;
4d6f6af8
GKH		 3812
3813 if ((adapter->netdev) && (adapter->netdev->name)) {
3814 seq_printf(seq, "info: interface : %s\n",
3815 adapter->netdev->name);
3816 }
3817 seq_printf(seq, "info: status : %s\n",
3818 SLIC_LINKSTATE(adapter->linkstate));
3819 seq_printf(seq, "info: port : %d\n",
3820 adapter->physport);
3821 seq_printf(seq, "info: speed : %s\n",
3822 SLIC_SPEED(adapter->linkspeed));
3823 seq_printf(seq, "info: duplex : %s\n",
3824 SLIC_DUPLEX(adapter->linkduplex));
3825 seq_printf(seq, "info: irq : 0x%X\n",
3826 (uint) adapter->irq);
3827 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
3828 adapter->card->loadlevel_current);
3829 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
3830 SLIC_RCVQ_ENTRIES);
3831 seq_printf(seq, "info: RcvQ current : %4.4X\n",
3832 adapter->rcvqueue.count);
3833 seq_printf(seq, "rx stats: packets : %8.8lX\n",
3834 adapter->stats.rx_packets);
3835 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
3836 adapter->stats.rx_bytes);
3837 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
3838 adapter->rcv_broadcasts);
3839 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
3840 adapter->rcv_multicasts);
3841 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
3842 adapter->rcv_unicasts);
3843 seq_printf(seq, "rx stats: errors : %8.8X\n",
e9eff9d6 3844 (u32) adapter->slic_stats.iface.rcv_errors);
4d6f6af8 3845 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
e9eff9d6 3846 (u32) adapter->slic_stats.iface.rcv_discards);
4d6f6af8 3847 seq_printf(seq, "rx stats: drops : %8.8X\n",
e9eff9d6 3848 (u32) adapter->rcv_drops);
4d6f6af8
GKH		 3849 seq_printf(seq, "tx stats: packets : %8.8lX\n",
3850 adapter->stats.tx_packets);
3851 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
3852 adapter->stats.tx_bytes);
3853 seq_printf(seq, "tx stats: errors : %8.8X\n",
e9eff9d6 3854 (u32) adapter->slic_stats.iface.xmt_errors);
4d6f6af8
GKH		 3855 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
3856 adapter->stats.multicast);
3857 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
e9eff9d6 3858 (u32) adapter->slic_stats.iface.xmit_collisions);
4d6f6af8
GKH		 3859 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
3860 adapter->max_isr_rcvs);
3861 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
3862 adapter->rcv_interrupt_yields);
3863 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
3864 adapter->max_isr_xmits);
3865 seq_printf(seq, "perf: error interrupts : %8.8X\n",
3866 adapter->error_interrupts);
3867 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
3868 adapter->error_rmiss_interrupts);
3869 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
3870 adapter->rcv_interrupts);
3871 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
3872 adapter->xmit_interrupts);
3873 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
3874 adapter->linkevent_interrupts);
3875 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
3876 adapter->upr_interrupts);
3877 seq_printf(seq, "perf: interrupt count : %8.8X\n",
3878 adapter->num_isrs);
3879 seq_printf(seq, "perf: false interrupts : %8.8X\n",
3880 adapter->false_interrupts);
3881 seq_printf(seq, "perf: All register writes : %8.8X\n",
3882 adapter->all_reg_writes);
3883 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
3884 adapter->icr_reg_writes);
3885 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
3886 adapter->isr_reg_writes);
3887 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
3888 adapter->if_events.oflow802);
3889 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
3890 adapter->if_events.Tprtoflow);
3891 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
3892 adapter->if_events.uflow802);
3893 seq_printf(seq, "ifevents: receive early : %8.8X\n",
3894 adapter->if_events.rcvearly);
3895 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
3896 adapter->if_events.Bufov);
3897 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
3898 adapter->if_events.Carre);
3899 seq_printf(seq, "ifevents: Long : %8.8X\n",
3900 adapter->if_events.Longe);
3901 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
3902 adapter->if_events.Invp);
3903 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
3904 adapter->if_events.Crc);
3905 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
3906 adapter->if_events.Drbl);
3907 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
3908 adapter->if_events.Code);
3909 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
3910 adapter->if_events.TpCsum);
3911 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
3912 adapter->if_events.TpHlen);
3913 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
3914 adapter->if_events.IpCsum);
3915 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
3916 adapter->if_events.IpLen);
3917 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
3918 adapter->if_events.IpHlen);
3919
3920 return 0;
3921}
3922static int slic_debug_adapter_open(struct inode *inode, struct file *file)
3923{
3924 return single_open(file, slic_debug_adapter_show, inode->i_private);
3925}
3926
3927static int slic_debug_card_open(struct inode *inode, struct file *file)
3928{
3929 return single_open(file, slic_debug_card_show, inode->i_private);
3930}
3931
3932static const struct file_operations slic_debug_adapter_fops = {
3933 .owner = THIS_MODULE,
3934 .open = slic_debug_adapter_open,
3935 .read = seq_read,
3936 .llseek = seq_lseek,
3937 .release = single_release,
3938};
3939
3940static const struct file_operations slic_debug_card_fops = {
3941 .owner = THIS_MODULE,
3942 .open = slic_debug_card_open,
3943 .read = seq_read,
3944 .llseek = seq_lseek,
3945 .release = single_release,
3946};
3947
e9eff9d6 3948static void slic_debug_adapter_create(struct adapter *adapter)
4d6f6af8
GKH		 3949{
3950 struct dentry *d;
3951 char name[7];
e9eff9d6 3952 struct sliccard *card = adapter->card;
4d6f6af8
GKH		 3953
3954 if (!card->debugfs_dir)
3955 return;
3956
3957 sprintf(name, "port%d", adapter->port);
3958 d = debugfs_create_file(name, S_IRUGO,
3959 card->debugfs_dir, adapter,
3960 &slic_debug_adapter_fops);
3961 if (!d || IS_ERR(d))
3962 pr_info(PFX "%s: debugfs create failed\n", name);
3963 else
3964 adapter->debugfs_entry = d;
3965}
3966
e9eff9d6 3967static void slic_debug_adapter_destroy(struct adapter *adapter)
4d6f6af8 3968{
d9c057ab 3969 debugfs_remove(adapter->debugfs_entry);
3970 adapter->debugfs_entry = NULL;
4d6f6af8
GKH		 3971}
3972
e9eff9d6 3973static void slic_debug_card_create(struct sliccard *card)
4d6f6af8
GKH		 3974{
3975 struct dentry *d;
3976 char name[IFNAMSIZ];
3977
3978 snprintf(name, sizeof(name), "slic%d", card->cardnum);
3979 d = debugfs_create_dir(name, slic_debugfs);
3980 if (!d || IS_ERR(d))
3981 pr_info(PFX "%s: debugfs create dir failed\n",
3982 name);
3983 else {
3984 card->debugfs_dir = d;
3985 d = debugfs_create_file("cardinfo", S_IRUGO,
3986 slic_debugfs, card,
3987 &slic_debug_card_fops);
3988 if (!d || IS_ERR(d))
3989 pr_info(PFX "%s: debugfs create failed\n",
3990 name);
3991 else
3992 card->debugfs_cardinfo = d;
3993 }
3994}
3995
e9eff9d6 3996static void slic_debug_card_destroy(struct sliccard *card)
4d6f6af8
GKH		 3997{
3998 int i;
3999
4000 for (i = 0; i < card->card_size; i++) {
e9eff9d6 4001 struct adapter *adapter;
4d6f6af8
GKH		 4002
4003 adapter = card->adapter[i];
4004 if (adapter)
4005 slic_debug_adapter_destroy(adapter);
4006 }
4007 if (card->debugfs_cardinfo) {
4008 debugfs_remove(card->debugfs_cardinfo);
4009 card->debugfs_cardinfo = NULL;
4010 }
4011 if (card->debugfs_dir) {
4012 debugfs_remove(card->debugfs_dir);
4013 card->debugfs_dir = NULL;
4014 }
4015}
4016
4017static void slic_debug_init(void)
4018{
4019 struct dentry *ent;
4020
4021 ent = debugfs_create_dir("slic", NULL);
4022 if (!ent || IS_ERR(ent)) {
4023 pr_info(PFX "debugfs create directory failed\n");
4024 return;
4025 }
4026
4027 slic_debugfs = ent;
4028}
4029
4030static void slic_debug_cleanup(void)
4031{
4032 if (slic_debugfs) {
4033 debugfs_remove(slic_debugfs);
4034 slic_debugfs = NULL;
4035 }
4036}
4037
4d6f6af8
GKH		 4038/******************************************************************************/
4039/**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
4040/******************************************************************************/
4041
4042static struct pci_driver slic_driver = {
4043 .name = DRV_NAME,
4044 .id_table = slic_pci_tbl,
4045 .probe = slic_entry_probe,
b0f434a7 4046 .remove = __devexit_p(slic_entry_remove),
4d6f6af8
GKH		 4047};
4048
4049static int __init slic_module_init(void)
4050{
4d6f6af8
GKH		 4051 slic_init_driver();
4052
4053 if (debug >= 0 && slic_debug != debug)
e5bac598
GKH		 4054 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n",
4055 debug);
4d6f6af8
GKH		 4056 if (debug >= 0)
4057 slic_debug = debug;
4058
e8bc9b7a 4059 return pci_register_driver(&slic_driver);
4d6f6af8
GKH		 4060}
4061
4062static void __exit slic_module_cleanup(void)
4063{
4d6f6af8
GKH		 4064 pci_unregister_driver(&slic_driver);
4065 slic_debug_cleanup();
4d6f6af8
GKH		 4066}
4067
4068module_init(slic_module_init);
4069module_exit(slic_module_cleanup);
Linux 6.x block layer and io_uring tree(s)