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Staging: vt6655/device_main.c: use %pM to shown MAC address
[linux-2.6-block.git] / drivers / staging / rtl8192su / r8192U_core.c
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5f53d8ca
JC		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8192U
4 *
5 * Based on the r8187 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
d1aed899 27#include <linux/vmalloc.h>
5f53d8ca
JC		 28
29#undef LOOP_TEST
30#undef DUMP_RX
31#undef DUMP_TX
32#undef DEBUG_TX_DESC2
33#undef RX_DONT_PASS_UL
34#undef DEBUG_EPROM
35#undef DEBUG_RX_VERBOSE
36#undef DUMMY_RX
37#undef DEBUG_ZERO_RX
38#undef DEBUG_RX_SKB
39#undef DEBUG_TX_FRAG
40#undef DEBUG_RX_FRAG
41#undef DEBUG_TX_FILLDESC
42#undef DEBUG_TX
43#undef DEBUG_IRQ
44#undef DEBUG_RX
45#undef DEBUG_RXALLOC
46#undef DEBUG_REGISTERS
47#undef DEBUG_RING
48#undef DEBUG_IRQ_TASKLET
49#undef DEBUG_TX_ALLOC
50#undef DEBUG_TX_DESC
51
52#define CONFIG_RTL8192_IO_MAP
53
5f53d8ca
JC		 54#include <asm/uaccess.h>
55#include "r8192U.h"
5f53d8ca
JC		 56#include "r8180_93cx6.h" /* Card EEPROM */
57#include "r8192U_wx.h"
58
59#include "r8192S_rtl8225.h"
60#include "r8192S_hw.h"
61#include "r8192S_phy.h"
62#include "r8192S_phyreg.h"
63#include "r8192S_Efuse.h"
64
65#include "r819xU_cmdpkt.h"
66#include "r8192U_dm.h"
67//#include "r8192xU_phyreg.h"
68#include <linux/usb.h>
5f53d8ca 69
5f53d8ca 70#include "r8192U_pm.h"
5f53d8ca 71
2a7d71ad 72#include "ieee80211/dot11d.h"
5f53d8ca 73
5f53d8ca
JC		 74
75
5f53d8ca
JC		 76u32 rt_global_debug_component = \
77// COMP_TRACE |
78// COMP_DBG |
79// COMP_INIT |
80// COMP_RECV |
81// COMP_SEND |
82// COMP_IO |
83 COMP_POWER |
84// COMP_EPROM |
85 COMP_SWBW |
86 COMP_POWER_TRACKING |
87 COMP_TURBO |
88 COMP_QOS |
89// COMP_RATE |
90// COMP_RM |
91 COMP_DIG |
92// COMP_EFUSE |
93// COMP_CH |
94// COMP_TXAGC |
95 COMP_HIPWR |
96// COMP_HALDM |
97 COMP_SEC |
98 COMP_LED |
99// COMP_RF |
100// COMP_RXDESC |
101 COMP_FIRMWARE |
102 COMP_HT |
103 COMP_AMSDU |
104 COMP_SCAN |
105// COMP_CMD |
106 COMP_DOWN |
107 COMP_RESET |
108 COMP_ERR; //always open err flags on
5f53d8ca
JC		 109
110#define TOTAL_CAM_ENTRY 32
111#define CAM_CONTENT_COUNT 8
112
113static struct usb_device_id rtl8192_usb_id_tbl[] = {
114 /* Realtek */
115 {USB_DEVICE(0x0bda, 0x8192)},
116 {USB_DEVICE(0x0bda, 0x8709)},
117 /* Corega */
118 {USB_DEVICE(0x07aa, 0x0043)},
119 /* Belkin */
120 {USB_DEVICE(0x050d, 0x805E)},
121 /* Sitecom */
122 {USB_DEVICE(0x0df6, 0x0031)},
123 /* EnGenius */
124 {USB_DEVICE(0x1740, 0x9201)},
125 /* Dlink */
126 {USB_DEVICE(0x2001, 0x3301)},
127 /* Zinwell */
128 {USB_DEVICE(0x5a57, 0x0290)},
488d3749
SG		 129 /* Guillemot */
130 {USB_DEVICE(0x06f8, 0xe031)},
5f53d8ca
JC		 131 //92SU
132 {USB_DEVICE(0x0bda, 0x8172)},
133 {}
134};
135
136MODULE_LICENSE("GPL");
5f53d8ca 137MODULE_VERSION("V 1.1");
5f53d8ca
JC		 138MODULE_DEVICE_TABLE(usb, rtl8192_usb_id_tbl);
139MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
140
141static char* ifname = "wlan%d";
5f53d8ca
JC		 142static int hwwep = 1; //default use hw. set 0 to use software security
143static int channels = 0x3fff;
144
145
146
5f53d8ca
JC		 147module_param(ifname, charp, S_IRUGO|S_IWUSR );
148//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
149module_param(hwwep,int, S_IRUGO|S_IWUSR);
150module_param(channels,int, S_IRUGO|S_IWUSR);
5f53d8ca
JC		 151
152MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
153//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
154MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
155MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
156
5f53d8ca
JC		 157static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
158 const struct usb_device_id *id);
159static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
5f53d8ca
JC		 160
161static struct usb_driver rtl8192_usb_driver = {
5f53d8ca
JC		 162 .name = RTL819xU_MODULE_NAME, /* Driver name */
163 .id_table = rtl8192_usb_id_tbl, /* PCI_ID table */
164 .probe = rtl8192_usb_probe, /* probe fn */
165 .disconnect = rtl8192_usb_disconnect, /* remove fn */
5f53d8ca
JC		 166 .suspend = rtl8192U_suspend, /* PM suspend fn */
167 .resume = rtl8192U_resume, /* PM resume fn */
5f53d8ca 168 .reset_resume = rtl8192U_resume, /* PM reset resume fn */
5f53d8ca
JC		 169};
170
171
5f53d8ca
JC		 172static void rtl8192SU_read_eeprom_info(struct net_device *dev);
173short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
174void rtl8192SU_rx_nomal(struct sk_buff* skb);
175void rtl8192SU_rx_cmd(struct sk_buff *skb);
176bool rtl8192SU_adapter_start(struct net_device *dev);
177short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
178void rtl8192SU_link_change(struct net_device *dev);
179void InitialGain8192S(struct net_device *dev,u8 Operation);
180void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
181
182struct rtl819x_ops rtl8192su_ops = {
183 .nic_type = NIC_8192SU,
184 .rtl819x_read_eeprom_info = rtl8192SU_read_eeprom_info,
185 .rtl819x_tx = rtl8192SU_tx,
186 .rtl819x_tx_cmd = rtl8192SU_tx_cmd,
187 .rtl819x_rx_nomal = rtl8192SU_rx_nomal,
188 .rtl819x_rx_cmd = rtl8192SU_rx_cmd,
189 .rtl819x_adapter_start = rtl8192SU_adapter_start,
190 .rtl819x_link_change = rtl8192SU_link_change,
191 .rtl819x_initial_gain = InitialGain8192S,
192 .rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
193};
5f53d8ca 194
5f53d8ca
JC		 195
196typedef struct _CHANNEL_LIST
197{
198 u8 Channel[32];
199 u8 Len;
200}CHANNEL_LIST, *PCHANNEL_LIST;
201
202static CHANNEL_LIST ChannelPlan[] = {
203 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
204 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
205 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
206 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
207 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
208 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
209 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
210 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
211 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
212 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
213 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
214};
215
216static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
217{
218 int i, max_chan=-1, min_chan=-1;
219 struct ieee80211_device* ieee = priv->ieee80211;
220 switch (channel_plan)
221 {
222 case COUNTRY_CODE_FCC:
223 case COUNTRY_CODE_IC:
224 case COUNTRY_CODE_ETSI:
225 case COUNTRY_CODE_SPAIN:
226 case COUNTRY_CODE_FRANCE:
227 case COUNTRY_CODE_MKK:
228 case COUNTRY_CODE_MKK1:
229 case COUNTRY_CODE_ISRAEL:
230 case COUNTRY_CODE_TELEC:
231 case COUNTRY_CODE_MIC:
232 {
233 Dot11d_Init(ieee);
234 ieee->bGlobalDomain = false;
235 //acturally 8225 & 8256 rf chip only support B,G,24N mode
236 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256) || (priv->rf_chip == RF_6052))
237 {
238 min_chan = 1;
239 max_chan = 14;
240 }
241 else
242 {
243 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
244 }
245 if (ChannelPlan[channel_plan].Len != 0){
246 // Clear old channel map
247 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
248 // Set new channel map
249 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
250 {
251 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
252 break;
253 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
254 }
255 }
256 break;
257 }
258 case COUNTRY_CODE_GLOBAL_DOMAIN:
259 {
260 GET_DOT11D_INFO(ieee)->bEnabled = 0;//this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain settings.
261 Dot11d_Reset(ieee);
262 ieee->bGlobalDomain = true;
263 break;
264 }
265 default:
266 break;
267 }
268 return;
269}
5f53d8ca
JC		 270
271#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
272
5f53d8ca
JC		 273#define rx_hal_is_cck_rate(_pDesc)\
274 ((_pDesc->RxMCS == DESC92S_RATE1M ||\
275 _pDesc->RxMCS == DESC92S_RATE2M ||\
276 _pDesc->RxMCS == DESC92S_RATE5_5M ||\
277 _pDesc->RxMCS == DESC92S_RATE11M) &&\
278 !_pDesc->RxHT)
279
280#define tx_hal_is_cck_rate(_DataRate)\
281 ( _DataRate == MGN_1M ||\
282 _DataRate == MGN_2M ||\
283 _DataRate == MGN_5_5M ||\
284 _DataRate == MGN_11M )
285
5f53d8ca
JC		 286
287
288
289void CamResetAllEntry(struct net_device *dev)
290{
291#if 1
292 u32 ulcommand = 0;
293 //2004/02/11 In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
294 // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
295 // In this condition, Cam can not be reset because upper layer will not set this static key again.
296 //if(Adapter->EncAlgorithm == WEP_Encryption)
297 // return;
298//debug
299 //DbgPrint("========================================\n");
300 //DbgPrint(" Call ResetAllEntry \n");
301 //DbgPrint("========================================\n\n");
302 ulcommand |= BIT31|BIT30;
303 write_nic_dword(dev, RWCAM, ulcommand);
304#else
305 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
306 CAM_mark_invalid(dev, ucIndex);
307 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
308 CAM_empty_entry(dev, ucIndex);
309#endif
310
311}
312
313
314void write_cam(struct net_device *dev, u8 addr, u32 data)
315{
316 write_nic_dword(dev, WCAMI, data);
317 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
318}
319
320u32 read_cam(struct net_device *dev, u8 addr)
321{
322 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
323 return read_nic_dword(dev, 0xa8);
324}
325
326void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
327{
328 int status;
329 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
330 struct usb_device *udev = priv->udev;
331
332 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
333 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
334 indx|0xfe00, 0, &data, 1, HZ / 2);
335
336 if (status < 0)
337 {
338 printk("write_nic_byte_E TimeOut! status:%d\n", status);
339 }
340}
341
342u8 read_nic_byte_E(struct net_device *dev, int indx)
343{
344 int status;
345 u8 data;
346 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
347 struct usb_device *udev = priv->udev;
348
349 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
350 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
351 indx|0xfe00, 0, &data, 1, HZ / 2);
352
353 if (status < 0)
354 {
355 printk("read_nic_byte_E TimeOut! status:%d\n", status);
356 }
357
358 return data;
359}
360//as 92U has extend page from 4 to 16, so modify functions below.
361void write_nic_byte(struct net_device *dev, int indx, u8 data)
362{
363 int status;
364
365 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
366 struct usb_device *udev = priv->udev;
367
368 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
369 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 370 indx, 0, &data, 1, HZ / 2);
5f53d8ca
JC		 371
372 if (status < 0)
373 {
374 printk("write_nic_byte TimeOut! status:%d\n", status);
375 }
376
377
378}
379
380
381void write_nic_word(struct net_device *dev, int indx, u16 data)
382{
383
384 int status;
385
386 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
387 struct usb_device *udev = priv->udev;
388
389 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
390 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 391 indx, 0, &data, 2, HZ / 2);
5f53d8ca
JC		 392
393 if (status < 0)
394 {
395 printk("write_nic_word TimeOut! status:%d\n", status);
396 }
397
398}
399
400
401void write_nic_dword(struct net_device *dev, int indx, u32 data)
402{
403
404 int status;
405
406 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
407 struct usb_device *udev = priv->udev;
408
409 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
410 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 411 indx, 0, &data, 4, HZ / 2);
5f53d8ca
JC		 412
413
414 if (status < 0)
415 {
416 printk("write_nic_dword TimeOut! status:%d\n", status);
417 }
418
419}
420
421
422
423u8 read_nic_byte(struct net_device *dev, int indx)
424{
425 u8 data;
426 int status;
427 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
428 struct usb_device *udev = priv->udev;
429
430 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
431 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 432 indx, 0, &data, 1, HZ / 2);
5f53d8ca
JC		 433
434 if (status < 0)
435 {
436 printk("read_nic_byte TimeOut! status:%d\n", status);
437 }
438
439 return data;
440}
441
442
443
444u16 read_nic_word(struct net_device *dev, int indx)
445{
446 u16 data;
447 int status;
448 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
449 struct usb_device *udev = priv->udev;
450
451 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
452 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 453 indx, 0, &data, 2, HZ / 2);
5f53d8ca
JC		 454
455 if (status < 0)
456 {
457 printk("read_nic_word TimeOut! status:%d\n", status);
458 }
459
460
461 return data;
462}
463
464u16 read_nic_word_E(struct net_device *dev, int indx)
465{
466 u16 data;
467 int status;
468 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
469 struct usb_device *udev = priv->udev;
470
471 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
472 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
473 indx|0xfe00, 0, &data, 2, HZ / 2);
474
475 if (status < 0)
476 {
477 printk("read_nic_word TimeOut! status:%d\n", status);
478 }
479
480
481 return data;
482}
483
484u32 read_nic_dword(struct net_device *dev, int indx)
485{
486 u32 data;
487 int status;
488// int result;
489
490 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
491 struct usb_device *udev = priv->udev;
492
493 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
494 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 495 indx, 0, &data, 4, HZ / 2);
5f53d8ca
JC		 496// if(0 != result) {
497// printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
498// }
499
500 if (status < 0)
501 {
502 printk("read_nic_dword TimeOut! status:%d\n", status);
503 if(status == -ENODEV) {
504 priv->usb_error = true;
505 }
506 }
507
508
509
510 return data;
511}
512
513
514//u8 read_phy_cck(struct net_device *dev, u8 adr);
515//u8 read_phy_ofdm(struct net_device *dev, u8 adr);
516/* this might still called in what was the PHY rtl8185/rtl8192 common code
517 * plans are to possibilty turn it again in one common code...
518 */
519inline void force_pci_posting(struct net_device *dev)
520{
521}
522
523
524static struct net_device_stats *rtl8192_stats(struct net_device *dev);
525void rtl8192_commit(struct net_device *dev);
526//void rtl8192_restart(struct net_device *dev);
5f53d8ca
JC		 527void rtl8192_restart(struct work_struct *work);
528//void rtl8192_rq_tx_ack(struct work_struct *work);
5f53d8ca
JC		 529
530void watch_dog_timer_callback(unsigned long data);
531
532/****************************************************************************
533 -----------------------------PROCFS STUFF-------------------------
534*****************************************************************************/
535
536static struct proc_dir_entry *rtl8192_proc = NULL;
537
538
539
540static int proc_get_stats_ap(char *page, char **start,
541 off_t offset, int count,
542 int *eof, void *data)
543{
544 struct net_device *dev = data;
545 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
546 struct ieee80211_device *ieee = priv->ieee80211;
547 struct ieee80211_network *target;
548
549 int len = 0;
550
551 list_for_each_entry(target, &ieee->network_list, list) {
552
553 len += snprintf(page + len, count - len,
554 "%s ", target->ssid);
555
556 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
557 len += snprintf(page + len, count - len,
558 "WPA\n");
559 }
560 else{
561 len += snprintf(page + len, count - len,
562 "non_WPA\n");
563 }
564
565 }
566
567 *eof = 1;
568 return len;
569}
570
5f53d8ca
JC		 571static int proc_get_registers(char *page, char **start,
572 off_t offset, int count,
573 int *eof, void *data)
574{
575 struct net_device *dev = data;
576// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
577
578 int len = 0;
579 int i,n,page0,page1,page2;
580
581 int max=0xff;
582 page0 = 0x000;
583 page1 = 0x100;
584 page2 = 0x800;
585
586 /* This dump the current register page */
587 if(!IS_BB_REG_OFFSET_92S(page0)){
588 len += snprintf(page + len, count - len,
589 "\n####################page %x##################\n ", (page0>>8));
590 for(n=0;n<=max;)
591 {
592 len += snprintf(page + len, count - len,
593 "\nD: %2x > ",n);
594 for(i=0;i<16 && n<=max;i++,n++)
595 len += snprintf(page + len, count - len,
596 "%2.2x ",read_nic_byte(dev,(page0|n)));
597 }
598 }else{
599 len += snprintf(page + len, count - len,
600 "\n####################page %x##################\n ", (page0>>8));
601 for(n=0;n<=max;)
602 {
603 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
604 for(i=0;i<4 && n<=max;n+=4,i++)
605 len += snprintf(page + len, count - len,
606 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
607 }
608 }
609 len += snprintf(page + len, count - len,"\n");
610 *eof = 1;
611 return len;
612
613}
614static int proc_get_registers_1(char *page, char **start,
615 off_t offset, int count,
616 int *eof, void *data)
617{
618 struct net_device *dev = data;
619// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
620
621 int len = 0;
622 int i,n,page0;
623
624 int max=0xff;
625 page0 = 0x100;
626
627 /* This dump the current register page */
628 len += snprintf(page + len, count - len,
629 "\n####################page %x##################\n ", (page0>>8));
630 for(n=0;n<=max;)
631 {
632 len += snprintf(page + len, count - len,
633 "\nD: %2x > ",n);
634 for(i=0;i<16 && n<=max;i++,n++)
635 len += snprintf(page + len, count - len,
636 "%2.2x ",read_nic_byte(dev,(page0|n)));
637 }
638 len += snprintf(page + len, count - len,"\n");
639 *eof = 1;
640 return len;
641
642}
643static int proc_get_registers_2(char *page, char **start,
644 off_t offset, int count,
645 int *eof, void *data)
646{
647 struct net_device *dev = data;
648// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
649
650 int len = 0;
651 int i,n,page0;
652
653 int max=0xff;
654 page0 = 0x200;
655
656 /* This dump the current register page */
657 len += snprintf(page + len, count - len,
658 "\n####################page %x##################\n ", (page0>>8));
659 for(n=0;n<=max;)
660 {
661 len += snprintf(page + len, count - len,
662 "\nD: %2x > ",n);
663 for(i=0;i<16 && n<=max;i++,n++)
664 len += snprintf(page + len, count - len,
665 "%2.2x ",read_nic_byte(dev,(page0|n)));
666 }
667 len += snprintf(page + len, count - len,"\n");
668 *eof = 1;
669 return len;
670
671}
672static int proc_get_registers_8(char *page, char **start,
673 off_t offset, int count,
674 int *eof, void *data)
675{
676 struct net_device *dev = data;
677
678 int len = 0;
679 int i,n,page0;
680
681 int max=0xff;
682 page0 = 0x800;
683
684 /* This dump the current register page */
685 len += snprintf(page + len, count - len,
686 "\n####################page %x##################\n ", (page0>>8));
687 for(n=0;n<=max;)
688 {
689 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
690 for(i=0;i<4 && n<=max;n+=4,i++)
691 len += snprintf(page + len, count - len,
692 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
693 }
694 len += snprintf(page + len, count - len,"\n");
695 *eof = 1;
696 return len;
697
698 }
699static int proc_get_registers_9(char *page, char **start,
700 off_t offset, int count,
701 int *eof, void *data)
702{
703 struct net_device *dev = data;
704// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
705
706 int len = 0;
707 int i,n,page0;
708
709 int max=0xff;
710 page0 = 0x900;
711
712 /* This dump the current register page */
713 len += snprintf(page + len, count - len,
714 "\n####################page %x##################\n ", (page0>>8));
715 for(n=0;n<=max;)
716 {
717 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
718 for(i=0;i<4 && n<=max;n+=4,i++)
719 len += snprintf(page + len, count - len,
720 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
721 }
722 len += snprintf(page + len, count - len,"\n");
723 *eof = 1;
724 return len;
725}
726static int proc_get_registers_a(char *page, char **start,
727 off_t offset, int count,
728 int *eof, void *data)
729{
730 struct net_device *dev = data;
731// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
732
733 int len = 0;
734 int i,n,page0;
735
736 int max=0xff;
737 page0 = 0xa00;
738
739 /* This dump the current register page */
740 len += snprintf(page + len, count - len,
741 "\n####################page %x##################\n ", (page0>>8));
742 for(n=0;n<=max;)
743 {
744 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
745 for(i=0;i<4 && n<=max;n+=4,i++)
746 len += snprintf(page + len, count - len,
747 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
748 }
749 len += snprintf(page + len, count - len,"\n");
750 *eof = 1;
751 return len;
752}
753static int proc_get_registers_b(char *page, char **start,
754 off_t offset, int count,
755 int *eof, void *data)
756{
757 struct net_device *dev = data;
758// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
759
760 int len = 0;
761 int i,n,page0;
762
763 int max=0xff;
764 page0 = 0xb00;
765
766 /* This dump the current register page */
767 len += snprintf(page + len, count - len,
768 "\n####################page %x##################\n ", (page0>>8));
769 for(n=0;n<=max;)
770 {
771 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
772 for(i=0;i<4 && n<=max;n+=4,i++)
773 len += snprintf(page + len, count - len,
774 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
775 }
776 len += snprintf(page + len, count - len,"\n");
777 *eof = 1;
778 return len;
779 }
780static int proc_get_registers_c(char *page, char **start,
781 off_t offset, int count,
782 int *eof, void *data)
783{
784 struct net_device *dev = data;
785// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
786
787 int len = 0;
788 int i,n,page0;
789
790 int max=0xff;
791 page0 = 0xc00;
792
793 /* This dump the current register page */
794 len += snprintf(page + len, count - len,
795 "\n####################page %x##################\n ", (page0>>8));
796 for(n=0;n<=max;)
797 {
798 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
799 for(i=0;i<4 && n<=max;n+=4,i++)
800 len += snprintf(page + len, count - len,
801 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
802 }
803 len += snprintf(page + len, count - len,"\n");
804 *eof = 1;
805 return len;
806}
807static int proc_get_registers_d(char *page, char **start,
808 off_t offset, int count,
809 int *eof, void *data)
810{
811 struct net_device *dev = data;
812// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
813
814 int len = 0;
815 int i,n,page0;
816
817 int max=0xff;
818 page0 = 0xd00;
819
820 /* This dump the current register page */
821 len += snprintf(page + len, count - len,
822 "\n####################page %x##################\n ", (page0>>8));
823 for(n=0;n<=max;)
824 {
825 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
826 for(i=0;i<4 && n<=max;n+=4,i++)
827 len += snprintf(page + len, count - len,
828 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
829 }
830 len += snprintf(page + len, count - len,"\n");
831 *eof = 1;
832 return len;
833}
834static int proc_get_registers_e(char *page, char **start,
835 off_t offset, int count,
836 int *eof, void *data)
837{
838 struct net_device *dev = data;
839// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
840
841 int len = 0;
842 int i,n,page0;
843
844 int max=0xff;
845 page0 = 0xe00;
846
847 /* This dump the current register page */
848 len += snprintf(page + len, count - len,
849 "\n####################page %x##################\n ", (page0>>8));
850 for(n=0;n<=max;)
851 {
852 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
853 for(i=0;i<4 && n<=max;n+=4,i++)
854 len += snprintf(page + len, count - len,
855 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
856 }
857 len += snprintf(page + len, count - len,"\n");
858 *eof = 1;
859 return len;
860}
5f53d8ca 861
5f53d8ca
JC		 862static int proc_get_stats_tx(char *page, char **start,
863 off_t offset, int count,
864 int *eof, void *data)
865{
866 struct net_device *dev = data;
867 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
868
869 int len = 0;
870
871 len += snprintf(page + len, count - len,
872 "TX VI priority ok int: %lu\n"
873 "TX VI priority error int: %lu\n"
874 "TX VO priority ok int: %lu\n"
875 "TX VO priority error int: %lu\n"
876 "TX BE priority ok int: %lu\n"
877 "TX BE priority error int: %lu\n"
878 "TX BK priority ok int: %lu\n"
879 "TX BK priority error int: %lu\n"
880 "TX MANAGE priority ok int: %lu\n"
881 "TX MANAGE priority error int: %lu\n"
882 "TX BEACON priority ok int: %lu\n"
883 "TX BEACON priority error int: %lu\n"
884// "TX high priority ok int: %lu\n"
885// "TX high priority failed error int: %lu\n"
886 "TX queue resume: %lu\n"
887 "TX queue stopped?: %d\n"
888 "TX fifo overflow: %lu\n"
889// "TX beacon: %lu\n"
890 "TX VI queue: %d\n"
891 "TX VO queue: %d\n"
892 "TX BE queue: %d\n"
893 "TX BK queue: %d\n"
894// "TX HW queue: %d\n"
895 "TX VI dropped: %lu\n"
896 "TX VO dropped: %lu\n"
897 "TX BE dropped: %lu\n"
898 "TX BK dropped: %lu\n"
899 "TX total data packets %lu\n",
900// "TX beacon aborted: %lu\n",
901 priv->stats.txviokint,
902 priv->stats.txvierr,
903 priv->stats.txvookint,
904 priv->stats.txvoerr,
905 priv->stats.txbeokint,
906 priv->stats.txbeerr,
907 priv->stats.txbkokint,
908 priv->stats.txbkerr,
909 priv->stats.txmanageokint,
910 priv->stats.txmanageerr,
911 priv->stats.txbeaconokint,
912 priv->stats.txbeaconerr,
913// priv->stats.txhpokint,
914// priv->stats.txhperr,
915 priv->stats.txresumed,
916 netif_queue_stopped(dev),
917 priv->stats.txoverflow,
918// priv->stats.txbeacon,
919 atomic_read(&(priv->tx_pending[VI_PRIORITY])),
920 atomic_read(&(priv->tx_pending[VO_PRIORITY])),
921 atomic_read(&(priv->tx_pending[BE_PRIORITY])),
922 atomic_read(&(priv->tx_pending[BK_PRIORITY])),
923// read_nic_byte(dev, TXFIFOCOUNT),
924 priv->stats.txvidrop,
925 priv->stats.txvodrop,
926 priv->stats.txbedrop,
927 priv->stats.txbkdrop,
928 priv->stats.txdatapkt
929// priv->stats.txbeaconerr
930 );
931
932 *eof = 1;
933 return len;
934}
935
936
937
938static int proc_get_stats_rx(char *page, char **start,
939 off_t offset, int count,
940 int *eof, void *data)
941{
942 struct net_device *dev = data;
943 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
944
945 int len = 0;
946
947 len += snprintf(page + len, count - len,
948 "RX packets: %lu\n"
949 "RX urb status error: %lu\n"
950 "RX invalid urb error: %lu\n",
951 priv->stats.rxoktotal,
952 priv->stats.rxstaterr,
953 priv->stats.rxurberr);
954
955 *eof = 1;
956 return len;
957}
5f53d8ca 958
5f53d8ca
JC		 959void rtl8192_proc_module_init(void)
960{
961 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
5f53d8ca 962 rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
5f53d8ca
JC		 963}
964
965
966void rtl8192_proc_module_remove(void)
967{
5f53d8ca 968 remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
5f53d8ca
JC		 969}
970
971
972void rtl8192_proc_remove_one(struct net_device *dev)
973{
974 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
975
976
977 if (priv->dir_dev) {
978 // remove_proc_entry("stats-hw", priv->dir_dev);
979 remove_proc_entry("stats-tx", priv->dir_dev);
980 remove_proc_entry("stats-rx", priv->dir_dev);
981 // remove_proc_entry("stats-ieee", priv->dir_dev);
982 remove_proc_entry("stats-ap", priv->dir_dev);
983 remove_proc_entry("registers", priv->dir_dev);
984 remove_proc_entry("registers-1", priv->dir_dev);
985 remove_proc_entry("registers-2", priv->dir_dev);
986 remove_proc_entry("registers-8", priv->dir_dev);
987 remove_proc_entry("registers-9", priv->dir_dev);
988 remove_proc_entry("registers-a", priv->dir_dev);
989 remove_proc_entry("registers-b", priv->dir_dev);
990 remove_proc_entry("registers-c", priv->dir_dev);
991 remove_proc_entry("registers-d", priv->dir_dev);
992 remove_proc_entry("registers-e", priv->dir_dev);
993 // remove_proc_entry("cck-registers",priv->dir_dev);
994 // remove_proc_entry("ofdm-registers",priv->dir_dev);
995 //remove_proc_entry(dev->name, rtl8192_proc);
996 remove_proc_entry("wlan0", rtl8192_proc);
997 priv->dir_dev = NULL;
998 }
999}
1000
1001
1002void rtl8192_proc_init_one(struct net_device *dev)
1003{
1004 struct proc_dir_entry *e;
1005 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1006 priv->dir_dev = create_proc_entry(dev->name,
1007 S_IFDIR | S_IRUGO | S_IXUGO,
1008 rtl8192_proc);
1009 if (!priv->dir_dev) {
1010 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1011 dev->name);
1012 return;
1013 }
5f53d8ca
JC		 1014 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1015 priv->dir_dev, proc_get_stats_rx, dev);
1016
1017 if (!e) {
1018 RT_TRACE(COMP_ERR,"Unable to initialize "
1019 "/proc/net/rtl8192/%s/stats-rx\n",
1020 dev->name);
1021 }
1022
1023
1024 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1025 priv->dir_dev, proc_get_stats_tx, dev);
1026
1027 if (!e) {
1028 RT_TRACE(COMP_ERR, "Unable to initialize "
1029 "/proc/net/rtl8192/%s/stats-tx\n",
1030 dev->name);
1031 }
5f53d8ca
JC		 1032
1033 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1034 priv->dir_dev, proc_get_stats_ap, dev);
1035
1036 if (!e) {
1037 RT_TRACE(COMP_ERR, "Unable to initialize "
1038 "/proc/net/rtl8192/%s/stats-ap\n",
1039 dev->name);
1040 }
1041
1042 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
1043 priv->dir_dev, proc_get_registers, dev);
1044 if (!e) {
1045 RT_TRACE(COMP_ERR, "Unable to initialize "
1046 "/proc/net/rtl8192/%s/registers\n",
1047 dev->name);
1048 }
5f53d8ca
JC		 1049 e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1050 priv->dir_dev, proc_get_registers_1, dev);
1051 if (!e) {
1052 RT_TRACE(COMP_ERR, "Unable to initialize "
1053 "/proc/net/rtl8192/%s/registers-1\n",
1054 dev->name);
1055 }
1056 e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1057 priv->dir_dev, proc_get_registers_2, dev);
1058 if (!e) {
1059 RT_TRACE(COMP_ERR, "Unable to initialize "
1060 "/proc/net/rtl8192/%s/registers-2\n",
1061 dev->name);
1062 }
1063 e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1064 priv->dir_dev, proc_get_registers_8, dev);
1065 if (!e) {
1066 RT_TRACE(COMP_ERR, "Unable to initialize "
1067 "/proc/net/rtl8192/%s/registers-8\n",
1068 dev->name);
1069 }
1070 e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1071 priv->dir_dev, proc_get_registers_9, dev);
1072 if (!e) {
1073 RT_TRACE(COMP_ERR, "Unable to initialize "
1074 "/proc/net/rtl8192/%s/registers-9\n",
1075 dev->name);
1076 }
1077 e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1078 priv->dir_dev, proc_get_registers_a, dev);
1079 if (!e) {
1080 RT_TRACE(COMP_ERR, "Unable to initialize "
1081 "/proc/net/rtl8192/%s/registers-a\n",
1082 dev->name);
1083 }
1084 e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1085 priv->dir_dev, proc_get_registers_b, dev);
1086 if (!e) {
1087 RT_TRACE(COMP_ERR, "Unable to initialize "
1088 "/proc/net/rtl8192/%s/registers-b\n",
1089 dev->name);
1090 }
1091 e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1092 priv->dir_dev, proc_get_registers_c, dev);
1093 if (!e) {
1094 RT_TRACE(COMP_ERR, "Unable to initialize "
1095 "/proc/net/rtl8192/%s/registers-c\n",
1096 dev->name);
1097 }
1098 e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1099 priv->dir_dev, proc_get_registers_d, dev);
1100 if (!e) {
1101 RT_TRACE(COMP_ERR, "Unable to initialize "
1102 "/proc/net/rtl8192/%s/registers-d\n",
1103 dev->name);
1104 }
1105 e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1106 priv->dir_dev, proc_get_registers_e, dev);
1107 if (!e) {
1108 RT_TRACE(COMP_ERR, "Unable to initialize "
1109 "/proc/net/rtl8192/%s/registers-e\n",
1110 dev->name);
1111 }
5f53d8ca
JC		 1112}
1113/****************************************************************************
1114 -----------------------------MISC STUFF-------------------------
1115*****************************************************************************/
1116
1117/* this is only for debugging */
1118void print_buffer(u32 *buffer, int len)
1119{
1120 int i;
1121 u8 *buf =(u8*)buffer;
1122
1123 printk("ASCII BUFFER DUMP (len: %x):\n",len);
1124
1125 for(i=0;i<len;i++)
1126 printk("%c",buf[i]);
1127
1128 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
1129
1130 for(i=0;i<len;i++)
1131 printk("%x",buf[i]);
1132
1133 printk("\n");
1134}
1135
1136//short check_nic_enough_desc(struct net_device *dev, priority_t priority)
1137short check_nic_enough_desc(struct net_device *dev,int queue_index)
1138{
1139 struct r8192_priv *priv = ieee80211_priv(dev);
1140 int used = atomic_read(&priv->tx_pending[queue_index]);
1141
1142 return (used < MAX_TX_URB);
1143}
1144
1145void tx_timeout(struct net_device *dev)
1146{
1147 struct r8192_priv *priv = ieee80211_priv(dev);
1148 //rtl8192_commit(dev);
1149
5f53d8ca 1150 schedule_work(&priv->reset_wq);
5f53d8ca
JC		 1151 //DMESG("TXTIMEOUT");
1152}
1153
1154
1155/* this is only for debug */
1156void dump_eprom(struct net_device *dev)
1157{
1158 int i;
1159 for(i=0; i<63; i++)
1160 RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i));
1161}
1162
1163/* this is only for debug */
1164void rtl8192_dump_reg(struct net_device *dev)
1165{
1166 int i;
1167 int n;
1168 int max=0x1ff;
1169
1170 RT_TRACE(COMP_PHY, "Dumping NIC register map");
1171
1172 for(n=0;n<=max;)
1173 {
1174 printk( "\nD: %2x> ", n);
1175 for(i=0;i<16 && n<=max;i++,n++)
1176 printk("%2x ",read_nic_byte(dev,n));
1177 }
1178 printk("\n");
1179}
1180
1181/****************************************************************************
1182 ------------------------------HW STUFF---------------------------
1183*****************************************************************************/
1184
5f53d8ca
JC		 1185void rtl8192_set_mode(struct net_device *dev,int mode)
1186{
1187 u8 ecmd;
1188 ecmd=read_nic_byte(dev, EPROM_CMD);
1189 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1190 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1191 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1192 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1193 write_nic_byte(dev, EPROM_CMD, ecmd);
1194}
1195
1196
1197void rtl8192_update_msr(struct net_device *dev)
1198{
1199 struct r8192_priv *priv = ieee80211_priv(dev);
1200 u8 msr;
1201
1202 msr = read_nic_byte(dev, MSR);
1203 msr &= ~ MSR_LINK_MASK;
1204
1205 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
1206 * msr must be updated if the state is ASSOCIATING.
1207 * this is intentional and make sense for ad-hoc and
1208 * master (see the create BSS/IBSS func)
1209 */
1210 if (priv->ieee80211->state == IEEE80211_LINKED){
1211
1212 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1213 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1214 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1215 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1216 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1217 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1218
1219 }else
1220 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1221
1222 write_nic_byte(dev, MSR, msr);
1223}
1224
1225void rtl8192_set_chan(struct net_device *dev,short ch)
1226{
1227 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1228// u32 tx;
1229 RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
1230 //printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
1231 priv->chan=ch;
5f53d8ca
JC		 1232
1233 /* this hack should avoid frame TX during channel setting*/
1234
1235
1236// tx = read_nic_dword(dev,TX_CONF);
1237// tx &= ~TX_LOOPBACK_MASK;
1238
1239#ifndef LOOP_TEST
1240// write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
1241
1242 //need to implement rf set channel here WB
1243
1244 if (priv->rf_set_chan)
1245 priv->rf_set_chan(dev,priv->chan);
1246 mdelay(10);
1247// write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
1248#endif
1249}
1250
5f53d8ca 1251static void rtl8192_rx_isr(struct urb *urb);
5f53d8ca
JC		 1252
1253u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)
1254{
1255
5f53d8ca
JC		 1256 return (sizeof(rx_desc_819x_usb) + pstats->RxDrvInfoSize
1257 + pstats->RxBufShift);
1258
1259}
1260static int rtl8192_rx_initiate(struct net_device*dev)
1261{
1262 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1263 struct urb *entry;
1264 struct sk_buff *skb;
1265 struct rtl8192_rx_info *info;
1266
1267 /* nomal packet rx procedure */
1268 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB) {
1269 skb = __dev_alloc_skb(RX_URB_SIZE, GFP_KERNEL);
1270 if (!skb)
1271 break;
5f53d8ca 1272 entry = usb_alloc_urb(0, GFP_KERNEL);
5f53d8ca
JC		 1273 if (!entry) {
1274 kfree_skb(skb);
1275 break;
1276 }
1277// printk("nomal packet IN request!\n");
1278 usb_fill_bulk_urb(entry, priv->udev,
8109c2fd 1279 usb_rcvbulkpipe(priv->udev, 3), skb_tail_pointer(skb),
5f53d8ca
JC		 1280 RX_URB_SIZE, rtl8192_rx_isr, skb);
1281 info = (struct rtl8192_rx_info *) skb->cb;
1282 info->urb = entry;
1283 info->dev = dev;
1284 info->out_pipe = 3; //denote rx normal packet queue
1285 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1286 usb_submit_urb(entry, GFP_KERNEL);
5f53d8ca
JC		 1287 }
1288
1289 /* command packet rx procedure */
1290 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
1291// printk("command packet IN request!\n");
1292 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1293 if (!skb)
1294 break;
5f53d8ca 1295 entry = usb_alloc_urb(0, GFP_KERNEL);
5f53d8ca
JC		 1296 if (!entry) {
1297 kfree_skb(skb);
1298 break;
1299 }
1300 usb_fill_bulk_urb(entry, priv->udev,
8109c2fd 1301 usb_rcvbulkpipe(priv->udev, 9), skb_tail_pointer(skb),
5f53d8ca
JC		 1302 RX_URB_SIZE, rtl8192_rx_isr, skb);
1303 info = (struct rtl8192_rx_info *) skb->cb;
1304 info->urb = entry;
1305 info->dev = dev;
1306 info->out_pipe = 9; //denote rx cmd packet queue
1307 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1308 usb_submit_urb(entry, GFP_KERNEL);
5f53d8ca
JC		 1309 }
1310
1311 return 0;
1312}
1313
1314void rtl8192_set_rxconf(struct net_device *dev)
1315{
1316 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1317 u32 rxconf;
1318
1319 rxconf=read_nic_dword(dev,RCR);
1320 rxconf = rxconf &~ MAC_FILTER_MASK;
1321 rxconf = rxconf | RCR_AMF;
1322 rxconf = rxconf | RCR_ADF;
1323 rxconf = rxconf | RCR_AB;
1324 rxconf = rxconf | RCR_AM;
1325 //rxconf = rxconf | RCR_ACF;
1326
1327 if (dev->flags & IFF_PROMISC) {DMESG ("NIC in promisc mode");}
1328
1329 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1330 dev->flags & IFF_PROMISC){
1331 rxconf = rxconf | RCR_AAP;
1332 } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1333 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1334 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1335 }*/else{
1336 rxconf = rxconf | RCR_APM;
1337 rxconf = rxconf | RCR_CBSSID;
1338 }
1339
1340
1341 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1342 rxconf = rxconf | RCR_AICV;
1343 rxconf = rxconf | RCR_APWRMGT;
1344 }
1345
1346 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1347 rxconf = rxconf | RCR_ACRC32;
1348
1349
1350 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1351 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1352 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1353 rxconf = rxconf | ((u32)7<<RCR_MXDMA_OFFSET);
1354
1355// rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1356 rxconf = rxconf | RCR_ONLYERLPKT;
1357
1358// rxconf = rxconf &~ RCR_CS_MASK;
1359// rxconf = rxconf | (1<<RCR_CS_SHIFT);
1360
1361 write_nic_dword(dev, RCR, rxconf);
1362
1363 #ifdef DEBUG_RX
1364 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RCR));
1365 #endif
1366}
1367//wait to be removed
1368void rtl8192_rx_enable(struct net_device *dev)
1369{
1370 //u8 cmd;
1371
1372 //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1373
1374 rtl8192_rx_initiate(dev);
1375
1376// rtl8192_set_rxconf(dev);
5f53d8ca
JC		 1377}
1378
1379
1380void rtl8192_tx_enable(struct net_device *dev)
1381{
5f53d8ca
JC		 1382}
1383
5f53d8ca
JC		 1384void rtl8192_rtx_disable(struct net_device *dev)
1385{
1386 u8 cmd;
1387 struct r8192_priv *priv = ieee80211_priv(dev);
1388 struct sk_buff *skb;
1389 struct rtl8192_rx_info *info;
1390
1391 cmd=read_nic_byte(dev,CMDR);
1392 write_nic_byte(dev, CMDR, cmd &~ \
1393 (CR_TE|CR_RE));
1394 force_pci_posting(dev);
1395 mdelay(10);
1396
1397 while ((skb = __skb_dequeue(&priv->rx_queue))) {
1398 info = (struct rtl8192_rx_info *) skb->cb;
1399 if (!info->urb)
1400 continue;
1401
1402 usb_kill_urb(info->urb);
1403 kfree_skb(skb);
1404 }
1405
1406 if (skb_queue_len(&priv->skb_queue)) {
1407 printk(KERN_WARNING "skb_queue not empty\n");
1408 }
1409
1410 skb_queue_purge(&priv->skb_queue);
1411 return;
1412}
1413
1414
1415int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1416{
5f53d8ca
JC		 1417 return 0;
1418}
1419
5f53d8ca
JC		 1420inline u16 ieeerate2rtlrate(int rate)
1421{
1422 switch(rate){
1423 case 10:
1424 return 0;
1425 case 20:
1426 return 1;
1427 case 55:
1428 return 2;
1429 case 110:
1430 return 3;
1431 case 60:
1432 return 4;
1433 case 90:
1434 return 5;
1435 case 120:
1436 return 6;
1437 case 180:
1438 return 7;
1439 case 240:
1440 return 8;
1441 case 360:
1442 return 9;
1443 case 480:
1444 return 10;
1445 case 540:
1446 return 11;
1447 default:
1448 return 3;
1449
1450 }
1451}
1452static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
1453inline u16 rtl8192_rate2rate(short rate)
1454{
1455 if (rate >11) return 0;
1456 return rtl_rate[rate];
1457}
1458
5f53d8ca 1459static void rtl8192_rx_isr(struct urb *urb)
5f53d8ca
JC		 1460{
1461 struct sk_buff *skb = (struct sk_buff *) urb->context;
1462 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
1463 struct net_device *dev = info->dev;
1464 struct r8192_priv *priv = ieee80211_priv(dev);
1465 int out_pipe = info->out_pipe;
1466 int err;
1467 if(!priv->up)
1468 return;
1469 if (unlikely(urb->status)) {
1470 info->urb = NULL;
1471 priv->stats.rxstaterr++;
1472 priv->ieee80211->stats.rx_errors++;
1473 usb_free_urb(urb);
1474 // printk("%s():rx status err\n",__FUNCTION__);
1475 return;
1476 }
1ec9e48d 1477
5f53d8ca 1478 skb_unlink(skb, &priv->rx_queue);
5f53d8ca
JC		 1479 skb_put(skb, urb->actual_length);
1480
1481 skb_queue_tail(&priv->skb_queue, skb);
1482 tasklet_schedule(&priv->irq_rx_tasklet);
1483
1484 skb = dev_alloc_skb(RX_URB_SIZE);
1485 if (unlikely(!skb)) {
1486 usb_free_urb(urb);
1487 printk("%s():can,t alloc skb\n",__FUNCTION__);
1488 /* TODO check rx queue length and refill *somewhere* */
1489 return;
1490 }
1491
1492 usb_fill_bulk_urb(urb, priv->udev,
8109c2fd
JM		 1493 usb_rcvbulkpipe(priv->udev, out_pipe),
1494 skb_tail_pointer(skb),
5f53d8ca
JC		 1495 RX_URB_SIZE, rtl8192_rx_isr, skb);
1496
1497 info = (struct rtl8192_rx_info *) skb->cb;
1498 info->urb = urb;
1499 info->dev = dev;
1500 info->out_pipe = out_pipe;
1501
8109c2fd 1502 urb->transfer_buffer = skb_tail_pointer(skb);
5f53d8ca
JC		 1503 urb->context = skb;
1504 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1505 err = usb_submit_urb(urb, GFP_ATOMIC);
aad445f8 1506 if(err && err != -EPERM)
5f53d8ca
JC		 1507 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
1508}
1509
1510u32
1511rtl819xusb_rx_command_packet(
1512 struct net_device *dev,
1513 struct ieee80211_rx_stats *pstats
1514 )
1515{
1516 u32 status;
1517
1518 //RT_TRACE(COMP_RECV, DBG_TRACE, ("---> RxCommandPacketHandle819xUsb()\n"));
1519
1520 status = cmpk_message_handle_rx(dev, pstats);
1521 if (status)
1522 {
1523 DMESG("rxcommandpackethandle819xusb: It is a command packet\n");
1524 }
1525 else
1526 {
1527 //RT_TRACE(COMP_RECV, DBG_TRACE, ("RxCommandPacketHandle819xUsb: It is not a command packet\n"));
1528 }
1529
1530 //RT_TRACE(COMP_RECV, DBG_TRACE, ("<--- RxCommandPacketHandle819xUsb()\n"));
1531 return status;
1532}
1533
5f53d8ca
JC		 1534void rtl8192_data_hard_stop(struct net_device *dev)
1535{
1536 //FIXME !!
5f53d8ca
JC		 1537}
1538
1539
1540void rtl8192_data_hard_resume(struct net_device *dev)
1541{
1542 // FIXME !!
5f53d8ca
JC		 1543}
1544
1545/* this function TX data frames when the ieee80211 stack requires this.
1546 * It checks also if we need to stop the ieee tx queue, eventually do it
1547 */
1548void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
1549{
1550 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1551 int ret;
1552 unsigned long flags;
1553 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1554 u8 queue_index = tcb_desc->queue_index;
1555
1556 /* shall not be referred by command packet */
1557 assert(queue_index != TXCMD_QUEUE);
1558
1559 spin_lock_irqsave(&priv->tx_lock,flags);
1560
1561 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1562// tcb_desc->RATRIndex = 7;
1563// tcb_desc->bTxDisableRateFallBack = 1;
1564// tcb_desc->bTxUseDriverAssingedRate = 1;
1565 tcb_desc->bTxEnableFwCalcDur = 1;
1566 skb_push(skb, priv->ieee80211->tx_headroom);
1567 ret = priv->ops->rtl819x_tx(dev, skb);
1568
1569 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1570 //priv->ieee80211->stats.tx_packets++;
1571
1572 spin_unlock_irqrestore(&priv->tx_lock,flags);
1573
1574// return ret;
1575 return;
1576}
1577
1578/* This is a rough attempt to TX a frame
1579 * This is called by the ieee 80211 stack to TX management frames.
1580 * If the ring is full packet are dropped (for data frame the queue
1581 * is stopped before this can happen).
1582 */
1583int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1584{
1585 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1586 int ret;
1587 unsigned long flags;
1588 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1589 u8 queue_index = tcb_desc->queue_index;
1590
1591
1592 spin_lock_irqsave(&priv->tx_lock,flags);
1593
1594 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1595 if(queue_index == TXCMD_QUEUE) {
1596 skb_push(skb, USB_HWDESC_HEADER_LEN);
1597 priv->ops->rtl819x_tx_cmd(dev, skb);
1598 ret = 1;
1599 spin_unlock_irqrestore(&priv->tx_lock,flags);
1600 return ret;
1601 } else {
1602 skb_push(skb, priv->ieee80211->tx_headroom);
1603 ret = priv->ops->rtl819x_tx(dev, skb);
1604 }
1605
1606 spin_unlock_irqrestore(&priv->tx_lock,flags);
1607
1608 return ret;
1609}
1610
1611
1612void rtl8192_try_wake_queue(struct net_device *dev, int pri);
1613
5f53d8ca 1614
5f53d8ca 1615static void rtl8192_tx_isr(struct urb *tx_urb)
5f53d8ca
JC		 1616{
1617 struct sk_buff *skb = (struct sk_buff*)tx_urb->context;
1618 struct net_device *dev = NULL;
1619 struct r8192_priv *priv = NULL;
1620 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1621 u8 queue_index = tcb_desc->queue_index;
1622// bool bToSend0Byte;
1623// u16 BufLen = skb->len;
1624
1625 memcpy(&dev,(struct net_device*)(skb->cb),sizeof(struct net_device*));
1626 priv = ieee80211_priv(dev);
1627
1628 if(tcb_desc->queue_index != TXCMD_QUEUE) {
1629 if(tx_urb->status == 0) {
1630 // dev->trans_start = jiffies;
1631 // As act as station mode, destion shall be unicast address.
1632 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1633 //priv->ieee80211->stats.tx_packets++;
1634 priv->stats.txoktotal++;
1635 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
1636 priv->stats.txbytesunicast += (skb->len - priv->ieee80211->tx_headroom);
1637 } else {
1638 priv->ieee80211->stats.tx_errors++;
1639 //priv->stats.txmanageerr++;
1640 /* TODO */
1641 }
1642 }
1643
1644 /* free skb and tx_urb */
1645 if(skb != NULL) {
1646 dev_kfree_skb_any(skb);
1647 usb_free_urb(tx_urb);
1648 atomic_dec(&priv->tx_pending[queue_index]);
1649 }
1650
5f53d8ca
JC		 1651 {
1652 //
1653 // Handle HW Beacon:
1654 // We had transfer our beacon frame to host controler at this moment.
1655 //
5f53d8ca
JC		 1656 //
1657 // Caution:
1658 // Handling the wait queue of command packets.
1659 // For Tx command packets, we must not do TCB fragment because it is not handled right now.
1660 // We must cut the packets to match the size of TX_CMD_PKT before we send it.
1661 //
1662 if (queue_index == MGNT_QUEUE){
1663 if (priv->ieee80211->ack_tx_to_ieee){
1664 if (rtl8192_is_tx_queue_empty(dev)){
1665 priv->ieee80211->ack_tx_to_ieee = 0;
1666 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1667 }
1668 }
1669 }
1670 /* Handle MPDU in wait queue. */
1671 if(queue_index != BEACON_QUEUE) {
1672 /* Don't send data frame during scanning.*/
1673 if((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&\
1674 (!(priv->ieee80211->queue_stop))) {
1675 if(NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
1676 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
1677
1678 return; //modified by david to avoid further processing AMSDU
1679 }
5f53d8ca
JC		 1680 }
1681 }
5f53d8ca
JC		 1682}
1683
1684void rtl8192_beacon_stop(struct net_device *dev)
1685{
1686 u8 msr, msrm, msr2;
1687 struct r8192_priv *priv = ieee80211_priv(dev);
1688
1689 msr = read_nic_byte(dev, MSR);
1690 msrm = msr & MSR_LINK_MASK;
1691 msr2 = msr & ~MSR_LINK_MASK;
1692
1693 if(NIC_8192U == priv->card_8192) {
1694 usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
1695 }
1696 if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
1697 (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
1698 write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
1699 write_nic_byte(dev, MSR, msr);
1700 }
1701}
1702
1703void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
1704{
1705 struct r8192_priv *priv = ieee80211_priv(dev);
1706 struct ieee80211_network *net;
1707 u8 i=0, basic_rate = 0;
1708 net = & priv->ieee80211->current_network;
1709
1710 for (i=0; i<net->rates_len; i++)
1711 {
1712 basic_rate = net->rates[i]&0x7f;
1713 switch(basic_rate)
1714 {
1715 case MGN_1M: *rate_config |= RRSR_1M; break;
1716 case MGN_2M: *rate_config |= RRSR_2M; break;
1717 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1718 case MGN_11M: *rate_config |= RRSR_11M; break;
1719 case MGN_6M: *rate_config |= RRSR_6M; break;
1720 case MGN_9M: *rate_config |= RRSR_9M; break;
1721 case MGN_12M: *rate_config |= RRSR_12M; break;
1722 case MGN_18M: *rate_config |= RRSR_18M; break;
1723 case MGN_24M: *rate_config |= RRSR_24M; break;
1724 case MGN_36M: *rate_config |= RRSR_36M; break;
1725 case MGN_48M: *rate_config |= RRSR_48M; break;
1726 case MGN_54M: *rate_config |= RRSR_54M; break;
1727 }
1728 }
1729 for (i=0; i<net->rates_ex_len; i++)
1730 {
1731 basic_rate = net->rates_ex[i]&0x7f;
1732 switch(basic_rate)
1733 {
1734 case MGN_1M: *rate_config |= RRSR_1M; break;
1735 case MGN_2M: *rate_config |= RRSR_2M; break;
1736 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1737 case MGN_11M: *rate_config |= RRSR_11M; break;
1738 case MGN_6M: *rate_config |= RRSR_6M; break;
1739 case MGN_9M: *rate_config |= RRSR_9M; break;
1740 case MGN_12M: *rate_config |= RRSR_12M; break;
1741 case MGN_18M: *rate_config |= RRSR_18M; break;
1742 case MGN_24M: *rate_config |= RRSR_24M; break;
1743 case MGN_36M: *rate_config |= RRSR_36M; break;
1744 case MGN_48M: *rate_config |= RRSR_48M; break;
1745 case MGN_54M: *rate_config |= RRSR_54M; break;
1746 }
1747 }
1748}
1749
1750
1751#define SHORT_SLOT_TIME 9
1752#define NON_SHORT_SLOT_TIME 20
1753
1754void rtl8192_update_cap(struct net_device* dev, u16 cap)
1755{
1756 //u32 tmp = 0;
1757 struct r8192_priv *priv = ieee80211_priv(dev);
1758 struct ieee80211_network *net = &priv->ieee80211->current_network;
1759 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1760
1761 //LZM MOD 090303 HW_VAR_ACK_PREAMBLE
5f53d8ca
JC		 1762 if(0)
1763 {
1764 u8 tmp = 0;
1765 tmp = ((priv->nCur40MhzPrimeSC) << 5);
1766 if (priv->short_preamble)
1767 tmp |= 0x80;
1768 write_nic_byte(dev, RRSR+2, tmp);
1769 }
5f53d8ca
JC		 1770
1771 if (net->mode & (IEEE_G|IEEE_N_24G))
1772 {
1773 u8 slot_time = 0;
1774 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1775 {//short slot time
1776 slot_time = SHORT_SLOT_TIME;
1777 }
1778 else //long slot time
1779 slot_time = NON_SHORT_SLOT_TIME;
1780 priv->slot_time = slot_time;
1781 write_nic_byte(dev, SLOT_TIME, slot_time);
1782 }
1783
1784}
1785void rtl8192_net_update(struct net_device *dev)
1786{
1787
1788 struct r8192_priv *priv = ieee80211_priv(dev);
1789 struct ieee80211_network *net;
1790 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1791 u16 rate_config = 0;
1792 net = & priv->ieee80211->current_network;
1793
1794 rtl8192_config_rate(dev, &rate_config);
1795 priv->basic_rate = rate_config &= 0x15f;
1796
1797 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1798 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1799 //for(i=0;i<ETH_ALEN;i++)
1800 // write_nic_byte(dev,BSSID+i,net->bssid[i]);
1801
1802 rtl8192_update_msr(dev);
1803// rtl8192_update_cap(dev, net->capability);
1804 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1805 {
1806 write_nic_word(dev, ATIMWND, 2);
1807 write_nic_word(dev, BCN_DMATIME, 1023);
1808 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1809// write_nic_word(dev, BcnIntTime, 100);
1810 write_nic_word(dev, BCN_DRV_EARLY_INT, 1);
1811 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1812 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1813 // TODO: BcnIFS may required to be changed on ASIC
1814 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1815
1816 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1817 }
1818
1819
1820
1821}
1822
1823//temporary hw beacon is not used any more.
1824//open it when necessary
1825#if 1
1826void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate)
1827{
5f53d8ca
JC		 1828}
1829#endif
1830inline u8 rtl8192_IsWirelessBMode(u16 rate)
1831{
1832 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1833 return 1;
1834 else return 0;
1835}
1836
1837u16 N_DBPSOfRate(u16 DataRate);
1838
1839u16 ComputeTxTime(
1840 u16 FrameLength,
1841 u16 DataRate,
1842 u8 bManagementFrame,
1843 u8 bShortPreamble
1844)
1845{
1846 u16 FrameTime;
1847 u16 N_DBPS;
1848 u16 Ceiling;
1849
1850 if( rtl8192_IsWirelessBMode(DataRate) )
1851 {
1852 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1853 { // long preamble
1854 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1855 }
1856 else
1857 { // Short preamble
1858 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1859 }
1860 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1861 FrameTime ++;
1862 } else { //802.11g DSSS-OFDM PLCP length field calculation.
1863 N_DBPS = N_DBPSOfRate(DataRate);
1864 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1865 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1866 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1867 }
1868 return FrameTime;
1869}
1870
1871u16 N_DBPSOfRate(u16 DataRate)
1872{
1873 u16 N_DBPS = 24;
1874
1875 switch(DataRate)
1876 {
1877 case 60:
1878 N_DBPS = 24;
1879 break;
1880
1881 case 90:
1882 N_DBPS = 36;
1883 break;
1884
1885 case 120:
1886 N_DBPS = 48;
1887 break;
1888
1889 case 180:
1890 N_DBPS = 72;
1891 break;
1892
1893 case 240:
1894 N_DBPS = 96;
1895 break;
1896
1897 case 360:
1898 N_DBPS = 144;
1899 break;
1900
1901 case 480:
1902 N_DBPS = 192;
1903 break;
1904
1905 case 540:
1906 N_DBPS = 216;
1907 break;
1908
1909 default:
1910 break;
1911 }
1912
1913 return N_DBPS;
1914}
1915
1916void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
1917{
5f53d8ca
JC		 1918 usb_free_urb(tx_cmd_urb);
1919}
1920
1921unsigned int txqueue2outpipe(struct r8192_priv* priv,unsigned int tx_queue) {
1922
1923 if(tx_queue >= 9)
1924 {
1925 RT_TRACE(COMP_ERR,"%s():Unknown queue ID!!!\n",__FUNCTION__);
1926 return 0x04;
1927 }
1928 return priv->txqueue_to_outpipemap[tx_queue];
1929}
1930
5f53d8ca
JC		 1931short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1932{
1933 struct r8192_priv *priv = ieee80211_priv(dev);
1934 int status;
1935 struct urb *tx_urb;
1936 unsigned int idx_pipe;
1937 tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
1938 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1939 u8 queue_index = tcb_desc->queue_index;
1940 u32 PktSize = 0;
1941
1942 //printk("\n %s::::::::::::::::::::::queue_index = %d\n",__FUNCTION__, queue_index);
1943 atomic_inc(&priv->tx_pending[queue_index]);
1944
5f53d8ca 1945 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 1946 if(!tx_urb){
1947 dev_kfree_skb(skb);
1948 return -ENOMEM;
1949 }
1950
1951 memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
1952
1953 /* Tx descriptor ought to be set according to the skb->cb */
1954 pdesc->LINIP = tcb_desc->bLastIniPkt;
1955 PktSize = (u16)(skb->len - USB_HWDESC_HEADER_LEN);
1956 pdesc->PktSize = PktSize;
1957 //printk("PKTSize = %d %x\n",pdesc->PktSize,pdesc->PktSize);
1958 //----------------------------------------------------------------------------
1959 // Fill up USB_OUT_CONTEXT.
1960 //----------------------------------------------------------------------------
1961 // Get index to out pipe from specified QueueID.
1962 idx_pipe = txqueue2outpipe(priv,queue_index);
1963 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
1964
5f53d8ca
JC		 1965 usb_fill_bulk_urb(tx_urb,
1966 priv->udev,
1967 usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
1968 skb->data,
1969 skb->len,
1970 rtl8192_tx_isr,
1971 skb);
1972
5f53d8ca 1973 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
5f53d8ca
JC		 1974 if (!status){
1975 return 0;
1976 }else{
1977 printk("Error TX CMD URB, error %d",
1978 status);
1979 return -1;
1980 }
1981}
5f53d8ca
JC		 1982
1983/*
1984 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1985 * in TxFwInfo data structure
1986 * 2006.10.30 by Emily
1987 *
1988 * \param QUEUEID Software Queue
1989*/
1990u8 MapHwQueueToFirmwareQueue(u8 QueueID)
1991{
1992 u8 QueueSelect = 0x0; //defualt set to
1993
1994 switch(QueueID) {
1995 case BE_QUEUE:
1996 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
1997 break;
1998
1999 case BK_QUEUE:
2000 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
2001 break;
2002
2003 case VO_QUEUE:
2004 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
2005 break;
2006
2007 case VI_QUEUE:
2008 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
2009 break;
2010 case MGNT_QUEUE:
2011 QueueSelect = QSLT_MGNT;
2012 break;
2013
2014 case BEACON_QUEUE:
2015 QueueSelect = QSLT_BEACON;
2016 break;
2017
2018 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
2019 // TODO: Remove Assertions
2020//#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
2021 case TXCMD_QUEUE:
2022 QueueSelect = QSLT_CMD;
2023 break;
2024//#endif
2025 case HIGH_QUEUE:
2026 QueueSelect = QSLT_HIGH;
2027 break;
2028
2029 default:
2030 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
2031 break;
2032 }
2033 return QueueSelect;
2034}
2035
5f53d8ca
JC		 2036u8 MRateToHwRate8190Pci(u8 rate)
2037{
2038 u8 ret = DESC92S_RATE1M;
2039
2040 switch(rate)
2041 {
2042 // CCK and OFDM non-HT rates
2043 case MGN_1M: ret = DESC92S_RATE1M; break;
2044 case MGN_2M: ret = DESC92S_RATE2M; break;
2045 case MGN_5_5M: ret = DESC92S_RATE5_5M; break;
2046 case MGN_11M: ret = DESC92S_RATE11M; break;
2047 case MGN_6M: ret = DESC92S_RATE6M; break;
2048 case MGN_9M: ret = DESC92S_RATE9M; break;
2049 case MGN_12M: ret = DESC92S_RATE12M; break;
2050 case MGN_18M: ret = DESC92S_RATE18M; break;
2051 case MGN_24M: ret = DESC92S_RATE24M; break;
2052 case MGN_36M: ret = DESC92S_RATE36M; break;
2053 case MGN_48M: ret = DESC92S_RATE48M; break;
2054 case MGN_54M: ret = DESC92S_RATE54M; break;
2055
2056 // HT rates since here
2057 case MGN_MCS0: ret = DESC92S_RATEMCS0; break;
2058 case MGN_MCS1: ret = DESC92S_RATEMCS1; break;
2059 case MGN_MCS2: ret = DESC92S_RATEMCS2; break;
2060 case MGN_MCS3: ret = DESC92S_RATEMCS3; break;
2061 case MGN_MCS4: ret = DESC92S_RATEMCS4; break;
2062 case MGN_MCS5: ret = DESC92S_RATEMCS5; break;
2063 case MGN_MCS6: ret = DESC92S_RATEMCS6; break;
2064 case MGN_MCS7: ret = DESC92S_RATEMCS7; break;
2065 case MGN_MCS8: ret = DESC92S_RATEMCS8; break;
2066 case MGN_MCS9: ret = DESC92S_RATEMCS9; break;
2067 case MGN_MCS10: ret = DESC92S_RATEMCS10; break;
2068 case MGN_MCS11: ret = DESC92S_RATEMCS11; break;
2069 case MGN_MCS12: ret = DESC92S_RATEMCS12; break;
2070 case MGN_MCS13: ret = DESC92S_RATEMCS13; break;
2071 case MGN_MCS14: ret = DESC92S_RATEMCS14; break;
2072 case MGN_MCS15: ret = DESC92S_RATEMCS15; break;
2073
2074 // Set the highest SG rate
2075 case MGN_MCS0_SG:
2076 case MGN_MCS1_SG:
2077 case MGN_MCS2_SG:
2078 case MGN_MCS3_SG:
2079 case MGN_MCS4_SG:
2080 case MGN_MCS5_SG:
2081 case MGN_MCS6_SG:
2082 case MGN_MCS7_SG:
2083 case MGN_MCS8_SG:
2084 case MGN_MCS9_SG:
2085 case MGN_MCS10_SG:
2086 case MGN_MCS11_SG:
2087 case MGN_MCS12_SG:
2088 case MGN_MCS13_SG:
2089 case MGN_MCS14_SG:
2090 case MGN_MCS15_SG:
2091 {
2092 ret = DESC92S_RATEMCS15_SG;
2093 break;
2094 }
2095
2096 default: break;
2097 }
2098 return ret;
2099}
5f53d8ca
JC		 2100
2101u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2102{
2103 u8 tmp_Short;
2104
2105 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2106
2107 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
2108 tmp_Short = 0;
2109
2110 return tmp_Short;
2111}
2112
5f53d8ca 2113static void tx_zero_isr(struct urb *tx_urb)
5f53d8ca
JC		 2114{
2115 return;
2116}
2117
2118
5f53d8ca
JC		 2119/*
2120 * The tx procedure is just as following, skb->cb will contain all the following
2121 *information: * priority, morefrag, rate, &dev.
2122 * */
2123 // <Note> Buffer format for 8192S Usb bulk out:
2124//
2125// --------------------------------------------------
2126// | 8192S Usb Tx Desc | 802_11_MAC_header | data |
2127// --------------------------------------------------
2128// | 32 bytes | 24 bytes |0-2318 bytes|
2129// --------------------------------------------------
2130// |<------------ BufferLen ------------------------->|
2131
2132short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2133{
2134 struct r8192_priv *priv = ieee80211_priv(dev);
2135 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2136 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2137 //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2138 struct usb_device *udev = priv->udev;
2139 int pend;
2140 int status;
2141 struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2142 //int urb_len;
2143 unsigned int idx_pipe;
2144 u16 MPDUOverhead = 0;
2145 //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
2146
5f53d8ca
JC		 2147 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2148 /* we are locked here so the two atomic_read and inc are executed
2149 * without interleaves * !!! For debug purpose */
2150 if( pend > MAX_TX_URB){
2151 switch (tcb_desc->queue_index) {
2152 case VO_PRIORITY:
2153 priv->stats.txvodrop++;
2154 break;
2155 case VI_PRIORITY:
2156 priv->stats.txvidrop++;
2157 break;
2158 case BE_PRIORITY:
2159 priv->stats.txbedrop++;
2160 break;
2161 default://BK_PRIORITY
2162 priv->stats.txbkdrop++;
2163 break;
2164 }
2165 printk("To discard skb packet!\n");
2166 dev_kfree_skb_any(skb);
2167 return -1;
2168 }
2169
5f53d8ca 2170 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 2171 if(!tx_urb){
2172 dev_kfree_skb_any(skb);
2173 return -ENOMEM;
2174 }
2175
2176 memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2177
2178
5f53d8ca 2179 tx_desc->NonQos = (IsQoSDataFrame(skb->data)==TRUE)? 0:1;
5f53d8ca
JC		 2180
2181 /* Fill Tx descriptor */
2182 //memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
2183
2184 // This part can just fill to the first descriptor of the frame.
2185 /* DWORD 0 */
2186 tx_desc->TxHT = (tcb_desc->data_rate&0x80)?1:0;
2187
5f53d8ca
JC		 2188
2189 tx_desc->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
2190 //tx_desc->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
2191 tx_desc->TxShort = QueryIsShort(tx_desc->TxHT, tx_desc->TxRate, tcb_desc);
2192
2193
2194 // Aggregation related
2195 if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
2196 tx_desc->AllowAggregation = 1;
2197 /* DWORD 1 */
2198 //tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
2199 //tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
2200 } else {
2201 tx_desc->AllowAggregation = 0;
2202 /* DWORD 1 */
2203 //tx_fwinfo->RxMF = 0;
2204 //tx_fwinfo->RxAMD = 0;
2205 }
2206
2207 //
2208 // <Roger_Notes> For AMPDU case, we must insert SSN into TX_DESC,
2209 // FW according as this SSN to do necessary packet retry.
2210 // 2008.06.06.
2211 //
2212 {
2213 u8 *pSeq;
2214 u16 Temp;
2215 //pSeq = (u8 *)(VirtualAddress+USB_HWDESC_HEADER_LEN + FRAME_OFFSET_SEQUENCE);
2216 pSeq = (u8 *)(skb->data+USB_HWDESC_HEADER_LEN + 22);
2217 Temp = pSeq[0];
2218 Temp <<= 12;
2219 Temp |= (*(u16 *)pSeq)>>4;
2220 tx_desc->Seq = Temp;
2221 }
2222
2223 /* Protection mode related */
2224 tx_desc->RTSEn = (tcb_desc->bRTSEnable)?1:0;
2225 tx_desc->CTS2Self = (tcb_desc->bCTSEnable)?1:0;
2226 tx_desc->RTSSTBC = (tcb_desc->bRTSSTBC)?1:0;
2227 tx_desc->RTSHT = (tcb_desc->rts_rate&0x80)?1:0;
2228 tx_desc->RTSRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
2229 tx_desc->RTSSubcarrier = (tx_desc->RTSHT==0)?(tcb_desc->RTSSC):0;
2230 tx_desc->RTSBW = (tx_desc->RTSHT==1)?((tcb_desc->bRTSBW)?1:0):0;
2231 tx_desc->RTSShort = (tx_desc->RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
2232 (tcb_desc->bRTSUseShortGI?1:0);
2233 //LZM 090219
2234 tx_desc->DisRTSFB = 0;
2235 tx_desc->RTSRateFBLmt = 0xf;
2236
2237 // <Roger_EXP> 2008.09.22. We disable RTS rate fallback temporarily.
2238 //tx_desc->DisRTSFB = 0x01;
2239
2240 /* Set Bandwidth and sub-channel settings. */
2241 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
2242 {
2243 if(tcb_desc->bPacketBW) {
2244 tx_desc->TxBandwidth = 1;
2245 tx_desc->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode
2246 } else {
2247 tx_desc->TxBandwidth = 0;
2248 tx_desc->TxSubCarrier = priv->nCur40MhzPrimeSC;
2249 }
2250 } else {
2251 tx_desc->TxBandwidth = 0;
2252 tx_desc->TxSubCarrier = 0;
2253 }
2254
5f53d8ca
JC		 2255
2256 //memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2257 /* DWORD 0 */
2258 tx_desc->LINIP = 0;
2259 //tx_desc->CmdInit = 1; //92su del
2260 tx_desc->Offset = USB_HWDESC_HEADER_LEN;
2261
5f53d8ca
JC		 2262 {
2263 tx_desc->PktSize = (skb->len - USB_HWDESC_HEADER_LEN) & 0xffff;
2264 }
2265
2266 /*DWORD 1*/
2267 //tx_desc->SecCAMID= 0;//92su del
2268 tx_desc->RaBRSRID= tcb_desc->RATRIndex;
2269//#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
5f53d8ca 2270
5f53d8ca
JC		 2271 {
2272 MPDUOverhead = 0;
2273 //tx_desc->NoEnc = 1;//92su del
2274 }
35c1b462 2275
5f53d8ca 2276 tx_desc->SecType = 0x0;
35c1b462 2277
5f53d8ca
JC		 2278 if (tcb_desc->bHwSec)
2279 {
2280 switch (priv->ieee80211->pairwise_key_type)
2281 {
2282 case KEY_TYPE_WEP40:
2283 case KEY_TYPE_WEP104:
2284 tx_desc->SecType = 0x1;
2285 //tx_desc->NoEnc = 0;//92su del
2286 break;
2287 case KEY_TYPE_TKIP:
2288 tx_desc->SecType = 0x2;
2289 //tx_desc->NoEnc = 0;//92su del
2290 break;
2291 case KEY_TYPE_CCMP:
2292 tx_desc->SecType = 0x3;
2293 //tx_desc->NoEnc = 0;//92su del
2294 break;
2295 case KEY_TYPE_NA:
2296 tx_desc->SecType = 0x0;
2297 //tx_desc->NoEnc = 1;//92su del
2298 break;
2299 default:
2300 tx_desc->SecType = 0x0;
2301 //tx_desc->NoEnc = 1;//92su del
2302 break;
2303 }
2304 }
2305
2306 //tx_desc->TxFWInfoSize = sizeof(tx_fwinfo_819x_usb);//92su del
2307
2308
2309 tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
2310 tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
2311 tx_desc->DataRateFBLmt = 0x1F;// Alwasy enable all rate fallback range
2312
2313 tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
2314
2315
2316 /* Fill fields that are required to be initialized in all of the descriptors */
2317 //DWORD 0
5f53d8ca
JC		 2318 tx_desc->FirstSeg = 1;
2319 tx_desc->LastSeg = 1;
5f53d8ca
JC		 2320 tx_desc->OWN = 1;
2321
5f53d8ca
JC		 2322 {
2323 //DWORD 2
2324 //tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
2325 tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
2326 }
2327
5f53d8ca
JC		 2328 /* Get index to out pipe from specified QueueID */
2329 idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
2330 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
2331
2332 //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
2333 //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
2334
2335 /* To submit bulk urb */
2336 usb_fill_bulk_urb(tx_urb,
2337 udev,
2338 usb_sndbulkpipe(udev,priv->RtOutPipes[idx_pipe]),
2339 skb->data,
2340 skb->len, rtl8192_tx_isr, skb);
2341
5f53d8ca 2342 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
5f53d8ca
JC		 2343 if (!status){
2344//we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
2345 bool bSend0Byte = false;
2346 u8 zero = 0;
2347 if(udev->speed == USB_SPEED_HIGH)
2348 {
2349 if (skb->len > 0 && skb->len % 512 == 0)
2350 bSend0Byte = true;
2351 }
2352 else
2353 {
2354 if (skb->len > 0 && skb->len % 64 == 0)
2355 bSend0Byte = true;
2356 }
2357 if (bSend0Byte)
2358 {
2359#if 1
5f53d8ca 2360 tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 2361 if(!tx_urb_zero){
2362 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
2363 return -ENOMEM;
2364 }
2365 usb_fill_bulk_urb(tx_urb_zero,udev,
2366 usb_sndbulkpipe(udev,idx_pipe), &zero,
2367 0, tx_zero_isr, dev);
5f53d8ca 2368 status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
5f53d8ca
JC		 2369 if (status){
2370 RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
2371 return -1;
2372 }
2373#endif
2374 }
2375 dev->trans_start = jiffies;
2376 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
2377 return 0;
2378 }else{
2379 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
2380 status);
2381 return -1;
2382 }
2383}
5f53d8ca 2384
35c1b462 2385void rtl8192SU_net_update(struct net_device *dev)
5f53d8ca
JC		 2386{
2387
2388 struct r8192_priv *priv = ieee80211_priv(dev);
2389 struct ieee80211_device* ieee = priv->ieee80211;
2390 struct ieee80211_network *net = &priv->ieee80211->current_network;
2391 //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
2392 u16 rate_config = 0;
2393 u32 regTmp = 0;
2394 u8 rateIndex = 0;
2395 u8 retrylimit = 0x30;
2396 u16 cap = net->capability;
2397
2398 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
2399
2400//HW_VAR_BASIC_RATE
2401 //update Basic rate: RR, BRSR
2402 rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
2403
5f53d8ca 2404 priv->basic_rate = rate_config = rate_config & 0x15f;
5f53d8ca
JC		 2405
2406 // Set RRSR rate table.
2407 write_nic_byte(dev, RRSR, rate_config&0xff);
2408 write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
2409
2410 // Set RTS initial rate
2411 while(rate_config > 0x1)
2412 {
2413 rate_config = (rate_config>> 1);
2414 rateIndex++;
2415 }
2416 write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
2417//HW_VAR_BASIC_RATE
2418
2419 //set ack preample
2420 regTmp = (priv->nCur40MhzPrimeSC) << 5;
2421 if (priv->short_preamble)
2422 regTmp |= 0x80;
2423 write_nic_byte(dev, RRSR+2, regTmp);
2424
2425 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
2426 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
2427
2428 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
2429 //2008.10.24 added by tynli for beacon changed.
2430 PHY_SetBeaconHwReg( dev, net->beacon_interval);
2431
2432 rtl8192_update_cap(dev, cap);
2433
2434 if (ieee->iw_mode == IW_MODE_ADHOC){
2435 retrylimit = 7;
2436 //we should enable ibss interrupt here, but disable it temporarily
2437 if (0){
2438 priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2439 //rtl8192_irq_disable(dev);
2440 //rtl8192_irq_enable(dev);
2441 }
2442 }
2443 else{
2444 if (0){
2445 priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2446 //rtl8192_irq_disable(dev);
2447 //rtl8192_irq_enable(dev);
2448 }
2449 }
2450
2451 priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
2452
2453 write_nic_word(dev, RETRY_LIMIT,
2454 retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
2455 retrylimit << RETRY_LIMIT_LONG_SHIFT);
2456}
2457
2458void rtl8192SU_update_ratr_table(struct net_device* dev)
2459{
2460 struct r8192_priv* priv = ieee80211_priv(dev);
2461 struct ieee80211_device* ieee = priv->ieee80211;
2462 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2463 //struct ieee80211_network *net = &ieee->current_network;
2464 u32 ratr_value = 0;
2465
2466 u8 rate_index = 0;
2467 int WirelessMode = ieee->mode;
2468 u8 MimoPs = ieee->pHTInfo->PeerMimoPs;
2469
2470 u8 bNMode = 0;
2471
2472 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2473 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2474
2475 //switch (ieee->mode)
2476 switch (WirelessMode)
2477 {
2478 case IEEE_A:
2479 ratr_value &= 0x00000FF0;
2480 break;
2481 case IEEE_B:
2482 ratr_value &= 0x0000000D;
2483 break;
2484 case IEEE_G:
2485 ratr_value &= 0x00000FF5;
2486 break;
2487 case IEEE_N_24G:
2488 case IEEE_N_5G:
2489 {
2490 bNMode = 1;
2491
2492 if (MimoPs == 0) //MIMO_PS_STATIC
2493 {
2494 ratr_value &= 0x0007F005;
2495 }
2496 else
2497 { // MCS rate only => for 11N mode.
2498 u32 ratr_mask;
2499
2500 // 1T2R or 1T1R, Spatial Stream 2 should be disabled
2501 if ( priv->rf_type == RF_1T2R ||
2502 priv->rf_type == RF_1T1R ||
2503 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS) )
2504 ratr_mask = 0x000ff005;
2505 else
2506 ratr_mask = 0x0f0ff005;
2507
2508 if((ieee->pHTInfo->bCurTxBW40MHz) &&
2509 !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
2510 ratr_mask |= 0x00000010; // Set 6MBps
2511
2512 // Select rates for rate adaptive mechanism.
2513 ratr_value &= ratr_mask;
2514 }
2515 }
2516 break;
2517 default:
2518 if(0)
2519 {
2520 if(priv->rf_type == RF_1T2R) // 1T2R, Spatial Stream 2 should be disabled
2521 {
2522 ratr_value &= 0x000ff0f5;
2523 }
2524 else
2525 {
2526 ratr_value &= 0x0f0ff0f5;
2527 }
2528 }
2529 //printk("====>%s(), mode is not correct:%x\n", __FUNCTION__, ieee->mode);
2530 break;
2531 }
2532
5f53d8ca 2533 ratr_value &= 0x0FFFFFFF;
5f53d8ca
JC		 2534
2535 // Get MAX MCS available.
2536 if ( (bNMode && ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0)) &&
2537 ((ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI40MHz) ||
2538 (!ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI20MHz)))
2539 {
2540 u8 shortGI_rate = 0;
2541 u32 tmp_ratr_value = 0;
2542 ratr_value |= 0x10000000;//???
2543 tmp_ratr_value = (ratr_value>>12);
2544 for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
2545 {
2546 if((1<<shortGI_rate) & tmp_ratr_value)
2547 break;
2548 }
2549 shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
2550 write_nic_byte(dev, SG_RATE, shortGI_rate);
2551 //printk("==>SG_RATE:%x\n", read_nic_byte(dev, SG_RATE));
2552 }
2553 write_nic_dword(dev, ARFR0+rate_index*4, ratr_value);
2554 printk("=============>ARFR0+rate_index*4:%#x\n", ratr_value);
2555
2556 //2 UFWP
2557 if (ratr_value & 0xfffff000){
2558 //printk("===>set to N mode\n");
2559 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_N);
2560 }
2561 else {
2562 //printk("===>set to B/G mode\n");
2563 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_BG);
2564 }
2565}
2566
2567void rtl8192SU_link_change(struct net_device *dev)
2568{
2569 struct r8192_priv *priv = ieee80211_priv(dev);
2570 struct ieee80211_device* ieee = priv->ieee80211;
2571 //unsigned long flags;
2572 u32 reg = 0;
2573
2574 printk("=====>%s 1\n", __func__);
2575 reg = read_nic_dword(dev, RCR);
2576
2577 if (ieee->state == IEEE80211_LINKED)
2578 {
2579
2580 rtl8192SU_net_update(dev);
2581 rtl8192SU_update_ratr_table(dev);
2582 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
2583 priv->ReceiveConfig = reg |= RCR_CBSSID;
2584
2585 }else{
2586 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
2587
2588 }
2589
2590 write_nic_dword(dev, RCR, reg);
2591 rtl8192_update_msr(dev);
2592
2593 printk("<=====%s 2\n", __func__);
2594}
5f53d8ca
JC		 2595
2596static struct ieee80211_qos_parameters def_qos_parameters = {
2597 {3,3,3,3},/* cw_min */
2598 {7,7,7,7},/* cw_max */
2599 {2,2,2,2},/* aifs */
2600 {0,0,0,0},/* flags */
2601 {0,0,0,0} /* tx_op_limit */
2602};
2603
2604
5f53d8ca
JC		 2605void rtl8192_update_beacon(struct work_struct * work)
2606{
2607 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
2608 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 2609 struct ieee80211_device* ieee = priv->ieee80211;
2610 struct ieee80211_network* net = &ieee->current_network;
2611
2612 if (ieee->pHTInfo->bCurrentHTSupport)
2613 HTUpdateSelfAndPeerSetting(ieee, net);
2614 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
2615 // Joseph test for turbo mode with AP
2616 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
2617 rtl8192_update_cap(dev, net->capability);
2618}
2619/*
2620* background support to run QoS activate functionality
2621*/
2622int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
1ec9e48d 2623
5f53d8ca
JC		 2624void rtl8192_qos_activate(struct work_struct * work)
2625{
2626 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
2627 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 2628 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
2629 u8 mode = priv->ieee80211->current_network.mode;
2630 //u32 size = sizeof(struct ieee80211_qos_parameters);
2631 u8 u1bAIFS;
2632 u32 u4bAcParam;
2633 int i;
2634
2635 if (priv == NULL)
2636 return;
2637
5f53d8ca 2638 mutex_lock(&priv->mutex);
1ec9e48d 2639
5f53d8ca
JC		 2640 if(priv->ieee80211->state != IEEE80211_LINKED)
2641 goto success;
2642 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
2643 /* It better set slot time at first */
2644 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
2645 /* update the ac parameter to related registers */
2646 for(i = 0; i < QOS_QUEUE_NUM; i++) {
2647 //Mode G/A: slotTimeTimer = 9; Mode B: 20
2648 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
2649 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
2650 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
2651 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
2652 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2653
2654 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
2655 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4322);
2656 }
2657
2658success:
5f53d8ca 2659 mutex_unlock(&priv->mutex);
5f53d8ca
JC		 2660}
2661
2662static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
2663 int active_network,
2664 struct ieee80211_network *network)
2665{
2666 int ret = 0;
2667 u32 size = sizeof(struct ieee80211_qos_parameters);
2668
2669 if(priv->ieee80211->state !=IEEE80211_LINKED)
2670 return ret;
2671
2672 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2673 return ret;
2674
2675 if (network->flags & NETWORK_HAS_QOS_MASK) {
2676 if (active_network &&
2677 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2678 network->qos_data.active = network->qos_data.supported;
2679
2680 if ((network->qos_data.active == 1) && (active_network == 1) &&
2681 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2682 (network->qos_data.old_param_count !=
2683 network->qos_data.param_count)) {
2684 network->qos_data.old_param_count =
2685 network->qos_data.param_count;
5f53d8ca 2686 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2687 RT_TRACE (COMP_QOS, "QoS parameters change call "
2688 "qos_activate\n");
2689 }
2690 } else {
2691 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2692 &def_qos_parameters, size);
2693
2694 if ((network->qos_data.active == 1) && (active_network == 1)) {
5f53d8ca 2695 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2696 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2697 }
2698 network->qos_data.active = 0;
2699 network->qos_data.supported = 0;
2700 }
2701
2702 return 0;
2703}
2704
2705/* handle manage frame frame beacon and probe response */
2706static int rtl8192_handle_beacon(struct net_device * dev,
f59d0127
BZ		 2707 struct ieee80211_probe_response *beacon,
2708 struct ieee80211_network *network)
5f53d8ca
JC		 2709{
2710 struct r8192_priv *priv = ieee80211_priv(dev);
2711
2712 rtl8192_qos_handle_probe_response(priv,1,network);
5f53d8ca 2713 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
5f53d8ca 2714
5f53d8ca
JC		 2715 return 0;
2716
2717}
2718
2719/*
2720* handling the beaconing responses. if we get different QoS setting
2721* off the network from the associated setting, adjust the QoS
2722* setting
2723*/
2724static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2725 struct ieee80211_network *network)
2726{
2727 int ret = 0;
2728 unsigned long flags;
2729 u32 size = sizeof(struct ieee80211_qos_parameters);
2730 int set_qos_param = 0;
2731
2732 if ((priv == NULL) || (network == NULL))
2733 return ret;
2734
2735 if(priv->ieee80211->state !=IEEE80211_LINKED)
2736 return ret;
2737
2738 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2739 return ret;
2740
2741 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2742 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
2743 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2744 &network->qos_data.parameters,\
2745 sizeof(struct ieee80211_qos_parameters));
2746 priv->ieee80211->current_network.qos_data.active = 1;
5f53d8ca
JC		 2747 {
2748 set_qos_param = 1;
2749 /* update qos parameter for current network */
2750 priv->ieee80211->current_network.qos_data.old_param_count = \
2751 priv->ieee80211->current_network.qos_data.param_count;
2752 priv->ieee80211->current_network.qos_data.param_count = \
2753 network->qos_data.param_count;
2754 }
2755 } else {
2756 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2757 &def_qos_parameters, size);
2758 priv->ieee80211->current_network.qos_data.active = 0;
2759 priv->ieee80211->current_network.qos_data.supported = 0;
2760 set_qos_param = 1;
2761 }
2762
2763 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2764
2765 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2766 if (set_qos_param == 1)
5f53d8ca 2767 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2768
2769 return ret;
2770}
2771
2772
2773static int rtl8192_handle_assoc_response(struct net_device *dev,
2774 struct ieee80211_assoc_response_frame *resp,
2775 struct ieee80211_network *network)
2776{
2777 struct r8192_priv *priv = ieee80211_priv(dev);
2778 rtl8192_qos_association_resp(priv, network);
2779 return 0;
2780}
2781
2782
2783void rtl8192_update_ratr_table(struct net_device* dev)
2784 // POCTET_STRING posLegacyRate,
2785 // u8* pMcsRate)
2786 // PRT_WLAN_STA pEntry)
2787{
2788 struct r8192_priv* priv = ieee80211_priv(dev);
2789 struct ieee80211_device* ieee = priv->ieee80211;
2790 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2791 //struct ieee80211_network *net = &ieee->current_network;
2792 u32 ratr_value = 0;
2793 u8 rate_index = 0;
2794 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2795 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2796// switch (net->mode)
2797 switch (ieee->mode)
2798 {
2799 case IEEE_A:
2800 ratr_value &= 0x00000FF0;
2801 break;
2802 case IEEE_B:
2803 ratr_value &= 0x0000000F;
2804 break;
2805 case IEEE_G:
2806 ratr_value &= 0x00000FF7;
2807 break;
2808 case IEEE_N_24G:
2809 case IEEE_N_5G:
2810 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2811 ratr_value &= 0x0007F007;
2812 else{
2813 if (priv->rf_type == RF_1T2R)
2814 ratr_value &= 0x000FF007;
2815 else
2816 ratr_value &= 0x0F81F007;
2817 }
2818 break;
2819 default:
2820 break;
2821 }
2822 ratr_value &= 0x0FFFFFFF;
2823 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2824 ratr_value |= 0x80000000;
2825 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2826 ratr_value |= 0x80000000;
2827 }
2828 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2829 write_nic_byte(dev, UFWP, 1);
2830}
2831
2832static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
2833static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
2834bool GetNmodeSupportBySecCfg8192(struct net_device*dev)
2835{
2836#if 1
2837 struct r8192_priv* priv = ieee80211_priv(dev);
2838 struct ieee80211_device* ieee = priv->ieee80211;
2839 struct ieee80211_network * network = &ieee->current_network;
2840 int wpa_ie_len= ieee->wpa_ie_len;
2841 struct ieee80211_crypt_data* crypt;
2842 int encrypt;
5f53d8ca 2843 return TRUE;
5f53d8ca
JC		 2844
2845 crypt = ieee->crypt[ieee->tx_keyidx];
2846 //we use connecting AP's capability instead of only security config on our driver to distinguish whether it should use N mode or G mode
2847 encrypt = (network->capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2848
2849 /* simply judge */
2850 if(encrypt && (wpa_ie_len == 0)) {
2851 /* wep encryption, no N mode setting */
2852 return false;
2853// } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2854 } else if((wpa_ie_len != 0)) {
2855 /* parse pairwise key type */
2856 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2857 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2858 return true;
2859 else
2860 return false;
2861 } else {
2862 return true;
2863 }
2864
5f53d8ca
JC		 2865 return true;
2866#endif
2867}
2868
2869bool GetHalfNmodeSupportByAPs819xUsb(struct net_device* dev)
2870{
2871 bool Reval;
2872 struct r8192_priv* priv = ieee80211_priv(dev);
2873 struct ieee80211_device* ieee = priv->ieee80211;
2874
2875// Added by Roger, 2008.08.29.
5f53d8ca 2876 return false;
5f53d8ca
JC		 2877
2878 if(ieee->bHalfWirelessN24GMode == true)
2879 Reval = true;
2880 else
2881 Reval = false;
2882
2883 return Reval;
2884}
2885
2886void rtl8192_refresh_supportrate(struct r8192_priv* priv)
2887{
2888 struct ieee80211_device* ieee = priv->ieee80211;
2889 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2890 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2891 {
2892 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2893 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2894 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2895 }
2896 else
2897 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
2898 return;
2899}
2900
2901u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
2902{
2903 struct r8192_priv *priv = ieee80211_priv(dev);
2904 u8 ret = 0;
2905 switch(priv->rf_chip)
2906 {
2907 case RF_8225:
2908 case RF_8256:
2909 case RF_PSEUDO_11N:
2910 case RF_6052:
2911 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2912 break;
2913 case RF_8258:
2914 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2915 break;
2916 default:
2917 ret = WIRELESS_MODE_B;
2918 break;
2919 }
2920 return ret;
2921}
2922void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
2923{
2924 struct r8192_priv *priv = ieee80211_priv(dev);
2925 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2926
2927#if 1
2928 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2929 {
2930 if(bSupportMode & WIRELESS_MODE_N_24G)
2931 {
2932 wireless_mode = WIRELESS_MODE_N_24G;
2933 }
2934 else if(bSupportMode & WIRELESS_MODE_N_5G)
2935 {
2936 wireless_mode = WIRELESS_MODE_N_5G;
2937 }
2938 else if((bSupportMode & WIRELESS_MODE_A))
2939 {
2940 wireless_mode = WIRELESS_MODE_A;
2941 }
2942 else if((bSupportMode & WIRELESS_MODE_G))
2943 {
2944 wireless_mode = WIRELESS_MODE_G;
2945 }
2946 else if((bSupportMode & WIRELESS_MODE_B))
2947 {
2948 wireless_mode = WIRELESS_MODE_B;
2949 }
2950 else{
2951 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2952 wireless_mode = WIRELESS_MODE_B;
2953 }
2954 }
39cfb97b 2955#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA
5f53d8ca
JC		 2956 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2957#endif
5f53d8ca
JC		 2958 //LZM 090306 usb crash here, mark it temp
2959 //write_nic_word(dev, SIFS_OFDM, 0x0e0e);
5f53d8ca
JC		 2960 priv->ieee80211->mode = wireless_mode;
2961
2962 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2963 priv->ieee80211->pHTInfo->bEnableHT = 1;
2964 else
2965 priv->ieee80211->pHTInfo->bEnableHT = 0;
2966 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2967 rtl8192_refresh_supportrate(priv);
2968#endif
2969
2970}
2971
2972
2973short rtl8192_is_tx_queue_empty(struct net_device *dev)
2974{
2975 int i=0;
2976 struct r8192_priv *priv = ieee80211_priv(dev);
2977 //struct ieee80211_device* ieee = priv->ieee80211;
2978 for (i=0; i<=MGNT_QUEUE; i++)
2979 {
2980 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2981 continue;
2982 if (atomic_read(&priv->tx_pending[i]))
2983 {
2984 printk("===>tx queue is not empty:%d, %d\n", i, atomic_read(&priv->tx_pending[i]));
2985 return 0;
2986 }
2987 }
2988 return 1;
2989}
35c1b462 2990
5f53d8ca
JC		 2991void rtl8192_hw_sleep_down(struct net_device *dev)
2992{
2993 RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
2994#ifdef TODO
2995// MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
2996#endif
2997}
1ec9e48d 2998
5f53d8ca
JC		 2999void rtl8192_hw_sleep_wq (struct work_struct *work)
3000{
3001// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3002// struct ieee80211_device * ieee = (struct ieee80211_device*)
3003// container_of(work, struct ieee80211_device, watch_dog_wq);
3004 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3005 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
3006 struct net_device *dev = ieee->dev;
1ec9e48d 3007
5f53d8ca
JC		 3008 //printk("=========>%s()\n", __FUNCTION__);
3009 rtl8192_hw_sleep_down(dev);
3010}
3011// printk("dev is %d\n",dev);
3012// printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
3013void rtl8192_hw_wakeup(struct net_device* dev)
3014{
3015// u32 flags = 0;
3016
3017// spin_lock_irqsave(&priv->ps_lock,flags);
3018 RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
3019#ifdef TODO
3020// MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3021#endif
3022 //FIXME: will we send package stored while nic is sleep?
3023// spin_unlock_irqrestore(&priv->ps_lock,flags);
3024}
1ec9e48d 3025
5f53d8ca
JC		 3026void rtl8192_hw_wakeup_wq (struct work_struct *work)
3027{
3028// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3029// struct ieee80211_device * ieee = (struct ieee80211_device*)
3030// container_of(work, struct ieee80211_device, watch_dog_wq);
3031 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3032 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
3033 struct net_device *dev = ieee->dev;
5f53d8ca 3034
1ec9e48d 3035 rtl8192_hw_wakeup(dev);
5f53d8ca
JC		 3036}
3037
3038#define MIN_SLEEP_TIME 50
3039#define MAX_SLEEP_TIME 10000
3040void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
3041{
3042
3043 struct r8192_priv *priv = ieee80211_priv(dev);
3044
3045 u32 rb = jiffies;
3046 unsigned long flags;
3047
3048 spin_lock_irqsave(&priv->ps_lock,flags);
3049
3050 /* Writing HW register with 0 equals to disable
3051 * the timer, that is not really what we want
3052 */
3053 tl -= MSECS(4+16+7);
3054
3055 //if(tl == 0) tl = 1;
3056
3057 /* FIXME HACK FIXME HACK */
3058// force_pci_posting(dev);
3059 //mdelay(1);
3060
3061// rb = read_nic_dword(dev, TSFTR);
3062
3063 /* If the interval in witch we are requested to sleep is too
3064 * short then give up and remain awake
3065 */
3066 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3067 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3068 spin_unlock_irqrestore(&priv->ps_lock,flags);
3069 printk("too short to sleep\n");
3070 return;
3071 }
3072
3073// write_nic_dword(dev, TimerInt, tl);
3074// rb = read_nic_dword(dev, TSFTR);
3075 {
3076 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3077 // if (tl<rb)
3078
5f53d8ca 3079 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
5f53d8ca
JC		 3080 }
3081 /* if we suspect the TimerInt is gone beyond tl
3082 * while setting it, then give up
3083 */
3084#if 1
3085 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3086 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3087 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
3088 spin_unlock_irqrestore(&priv->ps_lock,flags);
3089 return;
3090 }
3091#endif
3092// if(priv->rf_sleep)
3093// priv->rf_sleep(dev);
3094
3095 //printk("<=========%s()\n", __FUNCTION__);
5f53d8ca 3096 queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
1ec9e48d 3097
5f53d8ca
JC		 3098 spin_unlock_irqrestore(&priv->ps_lock,flags);
3099}
3100//init priv variables here. only non_zero value should be initialized here.
3101static void rtl8192_init_priv_variable(struct net_device* dev)
3102{
3103 struct r8192_priv *priv = ieee80211_priv(dev);
3104 u8 i;
3105 priv->card_8192 = NIC_8192U;
3106 priv->chan = 1; //set to channel 1
3107 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
3108 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3109 priv->ieee80211->ieee_up=0;
3110 priv->retry_rts = DEFAULT_RETRY_RTS;
3111 priv->retry_data = DEFAULT_RETRY_DATA;
3112 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
3113 priv->ieee80211->rate = 110; //11 mbps
3114 priv->ieee80211->short_slot = 1;
3115 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3116 priv->CckPwEnl = 6;
3117 //for silent reset
3118 priv->IrpPendingCount = 1;
3119 priv->ResetProgress = RESET_TYPE_NORESET;
3120 priv->bForcedSilentReset = 0;
3121 priv->bDisableNormalResetCheck = false;
3122 priv->force_reset = false;
3123
3124 priv->ieee80211->FwRWRF = 0; //we don't use FW read/write RF until stable firmware is available.
3125 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3126 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3127 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
3128 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3129 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
3130 IEEE_SOFTMAC_BEACONS;//added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
3131
3132 priv->ieee80211->active_scan = 1;
3133 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
3134 priv->ieee80211->host_encrypt = 1;
3135 priv->ieee80211->host_decrypt = 1;
3136 priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
3137 priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
3138 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
3139 priv->ieee80211->set_chan = rtl8192_set_chan;
3140 priv->ieee80211->link_change = priv->ops->rtl819x_link_change;
3141 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
3142 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
3143 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
3144 priv->ieee80211->init_wmmparam_flag = 0;
3145 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3146 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
3147 priv->ieee80211->tx_headroom = TX_PACKET_SHIFT_BYTES;
3148 priv->ieee80211->qos_support = 1;
3149
3150 //added by WB
3151// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
3152 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
3153 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
3154 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
3155 //for LPS
3156 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
3157// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
3158 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
3159 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
3160 //added by david
3161 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8192;
3162 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xUsb;
3163 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
3164 //added by amy
3165 priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
3166 priv->card_type = USB;
3167
5f53d8ca
JC		 3168//1 RTL8192SU/
3169 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3170 priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
3171 priv->bRFSiOrPi = 0;//o=si,1=pi;
3172 //lzm add
3173 priv->bInHctTest = false;
3174
3175 priv->MidHighPwrTHR_L1 = 0x3B;
3176 priv->MidHighPwrTHR_L2 = 0x40;
3177
3178 if(priv->bInHctTest)
3179 {
3180 priv->ShortRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3181 priv->LongRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3182 }
3183 else
3184 {
3185 priv->ShortRetryLimit = HAL_RETRY_LIMIT_INFRA;
3186 priv->LongRetryLimit = HAL_RETRY_LIMIT_INFRA;
3187 }
3188
3189 priv->SetFwCmdInProgress = false; //is set FW CMD in Progress? 92S only
3190 priv->CurrentFwCmdIO = 0;
3191
3192 priv->MinSpaceCfg = 0;
3193
3194 priv->EarlyRxThreshold = 7;
3195 priv->enable_gpio0 = 0;
3196 priv->TransmitConfig =
3197 ((u32)TCR_MXDMA_2048<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3198 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
3199 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
3200 (false ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3201 if(priv->bInHctTest)
3202 priv->ReceiveConfig = //priv->CSMethod |
3203 RCR_AMF | RCR_ADF | //RCR_AAP | //accept management/data
3204 RCR_ACF |RCR_APPFCS| //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3205 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
3206 RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
3207 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3208 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3209 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3210 (priv->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
3211 else
3212 priv->ReceiveConfig = //priv->CSMethod |
3213 RCR_AMF | RCR_ADF | RCR_AB |
3214 RCR_AM | RCR_APM |RCR_AAP |RCR_ADD3|RCR_APP_ICV|
3215 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3216 RCR_APP_MIC | RCR_APPFCS;
3217
3218 // <Roger_EXP> 2008.06.16.
3219 priv->IntrMask = (u16)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK | \
3220 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | \
3221 IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW | \
3222 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3223
3224//1 End
3225
5f53d8ca
JC		 3226
3227 priv->AcmControl = 0;
3228 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
3229 if (priv->pFirmware)
3230 memset(priv->pFirmware, 0, sizeof(rt_firmware));
3231
3232 /* rx related queue */
3233 skb_queue_head_init(&priv->rx_queue);
3234 skb_queue_head_init(&priv->skb_queue);
3235
3236 /* Tx related queue */
3237 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3238 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
3239 }
3240 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3241 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
3242 }
3243 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3244 skb_queue_head_init(&priv->ieee80211->skb_drv_aggQ [i]);
3245 }
3246 priv->rf_set_chan = rtl8192_phy_SwChnl;
3247}
3248
3249//init lock here
3250static void rtl8192_init_priv_lock(struct r8192_priv* priv)
3251{
3252 spin_lock_init(&priv->tx_lock);
3253 spin_lock_init(&priv->irq_lock);//added by thomas
3254 //spin_lock_init(&priv->rf_lock);//use rf_sem, or will crash in some OS.
3255 sema_init(&priv->wx_sem,1);
3256 sema_init(&priv->rf_sem,1);
3257 spin_lock_init(&priv->ps_lock);
5f53d8ca 3258 mutex_init(&priv->mutex);
5f53d8ca
JC		 3259}
3260
5f53d8ca 3261extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
5f53d8ca
JC		 3262
3263void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
3264//init tasklet and wait_queue here. only 2.6 above kernel is considered
3265#define DRV_NAME "wlan0"
3266static void rtl8192_init_priv_task(struct net_device* dev)
3267{
3268 struct r8192_priv *priv = ieee80211_priv(dev);
3269
5f53d8ca
JC		 3270#ifdef PF_SYNCTHREAD
3271 priv->priv_wq = create_workqueue(DRV_NAME,0);
3272#else
3273 priv->priv_wq = create_workqueue(DRV_NAME);
3274#endif
5f53d8ca 3275
5f53d8ca
JC		 3276 INIT_WORK(&priv->reset_wq, rtl8192_restart);
3277
3278 //INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
3279 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
3280 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
3281// INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, dm_gpio_change_rf_callback);
3282 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
3283 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
3284 INIT_DELAYED_WORK(&priv->initialgain_operate_wq, InitialGainOperateWorkItemCallBack);
3285 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
3286 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
3287 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
3288 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
3289 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
3290
5f53d8ca
JC		 3291 tasklet_init(&priv->irq_rx_tasklet,
3292 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
3293 (unsigned long)priv);
3294}
3295
3296static void rtl8192_get_eeprom_size(struct net_device* dev)
3297{
3298 u16 curCR = 0;
3299 struct r8192_priv *priv = ieee80211_priv(dev);
3300 RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
3301 curCR = read_nic_word_E(dev,EPROM_CMD);
3302 RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
3303 //whether need I consider BIT5?
3304 priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
3305 RT_TRACE(COMP_EPROM, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
3306}
3307
3308//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
3309static inline u16 endian_swap(u16* data)
3310{
3311 u16 tmp = *data;
3312 *data = (tmp >> 8) | (tmp << 8);
3313 return *data;
3314}
3315
5f53d8ca
JC		 3316u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
3317{
3318 u8 nEndPoint = 0;
3319 switch(UsbOption)
3320 {
3321 case 0:
3322 nEndPoint = 6;
3323 break;
3324 case 1:
3325 nEndPoint = 11;
3326 break;
3327 case 2:
3328 nEndPoint = 4;
3329 break;
3330 default:
3331 RT_TRACE(COMP_INIT, "UsbOptionToEndPointNumber(): Invalid UsbOption(%#x)\n", UsbOption);
3332 break;
3333 }
3334 return nEndPoint;
3335}
3336
3337u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev, u8 Boardtype)
3338{
3339 u8 RFtype = RF_1T2R;
3340
3341 switch(Boardtype)
3342 {
3343 case 0:
3344 RFtype = RF_1T1R;
3345 break;
3346 case 1:
3347 RFtype = RF_1T2R;
3348 break;
3349 case 2:
3350 RFtype = RF_2T2R;
3351 break;
3352 case 3:
3353 RFtype = RF_2T2R_GREEN;
3354 break;
3355 default:
3356 break;
3357 }
3358
3359 return RFtype;
3360}
3361
3362//
3363// Description:
3364// Config HW adapter information into initial value.
3365//
3366// Assumption:
3367// 1. After Auto load fail(i.e, check CR9346 fail)
3368//
3369// Created by Roger, 2008.10.21.
3370//
3371void
3372rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3373{
3374 struct r8192_priv *priv = ieee80211_priv(dev);
3375 //u16 i,usValue;
3376 //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3377 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3378 int i;
3379
3380 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
3381
3382 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3383 //PlatformStallExecution(10000);
3384 mdelay(10);
3385 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3386
3387 //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n"));
3388
3389 // Initialize IC Version && Channel Plan
3390 priv->eeprom_vid = 0;
3391 priv->eeprom_pid = 0;
3392 priv->card_8192_version = 0;
3393 priv->eeprom_ChannelPlan = 0;
3394 priv->eeprom_CustomerID = 0;
3395 priv->eeprom_SubCustomerID = 0;
3396 priv->bIgnoreDiffRateTxPowerOffset = false;
3397
3398 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3399 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3400 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3401 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3402 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3403 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3404
3405
3406
3407 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3408 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3409
35c1b462
BZ		 3410 for(i=0; i<5; i++)
3411 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
5f53d8ca 3412
35c1b462 3413 //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5);
5f53d8ca 3414
35c1b462
BZ		 3415 {
3416 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
5f53d8ca
JC		 3417 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3418 u8 i;
3419
35c1b462 3420 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
5f53d8ca
JC		 3421
3422 for(i = 0; i < 6; i++)
3423 dev->dev_addr[i] = sMacAddr[i];
3424 }
5f53d8ca
JC		 3425 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3426 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3427 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3428
6756993b
HS		 3429 RT_TRACE(COMP_INIT,
3430 "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n",
3431 dev->dev_addr);
5f53d8ca 3432
35c1b462
BZ		 3433 priv->EEPROMBoardType = EEPROM_Default_BoardType;
3434 priv->rf_type = RF_1T2R; //RF_2T2R
3435 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3436 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3437 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3438 priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3439 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3440 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3441 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
5f53d8ca 3442
5f53d8ca 3443
5f53d8ca 3444
35c1b462
BZ		 3445 for (rf_path = 0; rf_path < 2; rf_path++)
3446 {
3447 for (i = 0; i < 3; i++)
5f53d8ca 3448 {
35c1b462
BZ		 3449 // Read CCK RF A & B Tx power
3450 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3451 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3452 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3453 (u8)(EEPROM_Default_TxPower & 0xff);
5f53d8ca 3454 }
35c1b462 3455 }
5f53d8ca 3456
35c1b462
BZ		 3457 for (i = 0; i < 3; i++)
3458 {
3459 //RT_TRACE((COMP_EFUSE), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3460 //priv->RfCckChnlAreaTxPwr[rf_path][i]);
3461 //RT_TRACE((COMP_EFUSE), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3462 //priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3463 //RT_TRACE((COMP_EFUSE), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3464 //priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3465 }
5f53d8ca 3466
35c1b462
BZ		 3467 // Assign dedicated channel tx power
3468 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
5f53d8ca 3469 {
35c1b462
BZ		 3470 if (i < 3) // Cjanel 1-3
3471 index = 0;
3472 else if (i < 9) // Channel 4-9
3473 index = 1;
3474 else // Channel 10-14
3475 index = 2;
5f53d8ca 3476
35c1b462
BZ		 3477 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
3478 priv->RfTxPwrLevelCck[rf_path][i] =
3479 priv->RfCckChnlAreaTxPwr[rf_path][index];
3480 priv->RfTxPwrLevelOfdm1T[rf_path][i] =
3481 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3482 priv->RfTxPwrLevelOfdm2T[rf_path][i] =
3483 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
5f53d8ca
JC		 3484 }
3485
35c1b462 3486 for(i=0; i<14; i++)
5f53d8ca 3487 {
35c1b462
BZ		 3488 //RT_TRACE((COMP_EFUSE), "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3489 //rf_path, i, priv->RfTxPwrLevelCck[0][i],
3490 //priv->RfTxPwrLevelOfdm1T[0][i] ,
3491 //priv->RfTxPwrLevelOfdm2T[0][i] );
5f53d8ca
JC		 3492 }
3493
35c1b462
BZ		 3494 //
3495 // Update remained HAL variables.
3496 //
3497 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
3498 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new
3499 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
3500 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3
3501 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7
3502 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit12~15
3503 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
5f53d8ca
JC		 3504 priv->LedStrategy = SW_LED_MODE0;
3505
3506 init_rate_adaptive(dev);
3507
35c1b462 3508 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
5f53d8ca
JC		 3509
3510}
5f53d8ca
JC		 3511
3512//
3513// Description:
3514// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
3515//
3516// Assumption:
3517// 1. CR9346 regiser has verified.
3518// 2. PASSIVE_LEVEL (USB interface)
3519//
3520// Created by Roger, 2008.10.21.
3521//
3522void
3523rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
3524{
3525 struct r8192_priv *priv = ieee80211_priv(dev);
3526 u16 i,usValue;
3527 u8 tmpU1b, tempval;
3528 u16 EEPROMId;
3529 u8 hwinfo[HWSET_MAX_SIZE_92S];
3530 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3531
3532
3533 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
3534
3535 //
3536 // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
3537 // 2008.11.25.
3538 //
3539 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
3540 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
3541 //PlatformStallExecution(1000);
3542 mdelay(10);
3543 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
3544
3545 // Retrieve Chip version.
3546 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3547 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3548
3549 switch(priv->card_8192_version)
3550 {
3551 case 0:
3552 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
3553 break;
3554 case 1:
3555 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
3556 break;
3557 case 2:
3558 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
3559 break;
3560 default:
3561 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
3562 priv->card_8192_version = VERSION_8192S_BCUT;
3563 break;
3564 }
3565
3566 //if (IS_BOOT_FROM_EEPROM(Adapter))
3567 if(priv->EepromOrEfuse)
3568 { // Read frin EEPROM
3569 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3570 //PlatformStallExecution(10000);
3571 mdelay(10);
3572 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3573 // Read all Content from EEPROM or EFUSE.
3574 for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
3575 {
3576 usValue = eprom_read(dev, (u16) (i>>1));
3577 *((u16*)(&hwinfo[i])) = usValue;
3578 }
3579 }
3580 else if (!(priv->EepromOrEfuse))
3581 { // Read from EFUSE
3582
3583 //
3584 // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
3585 // from suspend mode.
3586 // 2008.10.21.
3587 //
3588 //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3589 //PlatformStallExecution(10000);
3590 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
3591 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
3592
3593 //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
3594 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
3595 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
3596 //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
3597
3598 // Read EFUSE real map to shadow.
3599 EFUSE_ShadowMapUpdate(dev);
3600 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
3601 }
3602 else
3603 {
3604 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
3605 }
3606
3607 //YJ,test,090106
3608 //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
3609 //
3610 // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
3611 //
3612 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
3613
3614 //
3615 // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
3616 // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
3617 // 2008.10.21.
3618 //
3619 EEPROMId = *((u16 *)&hwinfo[0]);
3620
3621 if( EEPROMId != RTL8190_EEPROM_ID )
3622 {
3623 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
3624 priv->bTXPowerDataReadFromEEPORM = FALSE;
3625 priv->AutoloadFailFlag=TRUE;
3626 }
3627 else
3628 {
3629 priv->AutoloadFailFlag=FALSE;
5f53d8ca 3630 priv->bTXPowerDataReadFromEEPORM = TRUE;
5f53d8ca
JC		 3631 }
3632 // Read IC Version && Channel Plan
3633 if(!priv->AutoloadFailFlag)
3634 {
3635 // VID, PID
3636 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
3637 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
3638 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
3639
3640
3641 // EEPROM Version ID, Channel plan
3642 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
3643 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
3644
3645 // Customer ID, 0x00 and 0xff are reserved for Realtek.
3646 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
3647 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
3648 }
3649 else
3650 {
3651 //priv->eeprom_vid = 0;
3652 //priv->eeprom_pid = 0;
3653 //priv->EEPROMVersion = 0;
3654 //priv->eeprom_ChannelPlan = 0;
3655 //priv->eeprom_CustomerID = 0;
3656 //priv->eeprom_SubCustomerID = 0;
3657
3658 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
3659 return;
3660 }
3661
3662
3663 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
3664 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3665 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3666 RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
3667 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3668 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3669 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3670 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3671
3672
3673 // Read USB optional function.
3674 if(!priv->AutoloadFailFlag)
3675 {
3676 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
3677 }
3678 else
3679 {
3680 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3681 }
3682
3683
3684 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
3685
3686 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3687 RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
3688
3689#ifdef TO_DO_LIST
3690 //
3691 // Decide CustomerID according to VID/DID or EEPROM
3692 //
3693 switch(pHalData->EEPROMCustomerID)
3694 {
3695 case EEPROM_CID_ALPHA:
3696 pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
3697 break;
3698
3699 case EEPROM_CID_CAMEO:
3700 pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
3701 break;
3702
3703 case EEPROM_CID_SITECOM:
3704 pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
3705 RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
3706
3707 break;
3708
3709 case EEPROM_CID_WHQL:
3710 Adapter->bInHctTest = TRUE;
3711
3712 pMgntInfo->bSupportTurboMode = FALSE;
3713 pMgntInfo->bAutoTurboBy8186 = FALSE;
3714
3715 pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3716 pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3717 pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3718 pMgntInfo->keepAliveLevel = 0;
3719 break;
3720
3721 default:
3722 pMgntInfo->CustomerID = RT_CID_DEFAULT;
3723 break;
3724
3725 }
3726
3727 //
3728 // Led mode
3729 //
3730 switch(pMgntInfo->CustomerID)
3731 {
3732 case RT_CID_DEFAULT:
3733 case RT_CID_819x_ALPHA:
3734 pHalData->LedStrategy = SW_LED_MODE1;
3735 pHalData->bRegUseLed = TRUE;
3736 pHalData->SwLed1.bLedOn = TRUE;
3737 break;
3738 case RT_CID_819x_CAMEO:
3739 pHalData->LedStrategy = SW_LED_MODE1;
3740 pHalData->bRegUseLed = TRUE;
3741 break;
3742
3743 case RT_CID_819x_Sitecom:
3744 pHalData->LedStrategy = SW_LED_MODE2;
3745 pHalData->bRegUseLed = TRUE;
3746 break;
3747
3748 default:
3749 pHalData->LedStrategy = SW_LED_MODE0;
3750 break;
3751 }
3752#endif
3753
3754 // Read USB PHY parameters.
3755 for(i=0; i<5; i++)
3756 priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
3757
3758 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
3759
3760
3761 //Read Permanent MAC address
3762 for(i=0; i<6; i++)
3763 dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
3764
3765 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3766 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3767 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3768
6756993b
HS		 3769 RT_TRACE(COMP_INIT,
3770 "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n",
3771 dev->dev_addr);
5f53d8ca
JC		 3772
3773 //
3774 // Get CustomerID(Boad Type)
3775 // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
3776 // Others: Reserved. Default is 0x2: RTL8192SU.
3777 //
3778 //if(!priv->AutoloadFailFlag)
3779 //{
3780 priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
3781 priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
3782 //}
3783 //else
3784 //{
3785 // priv->EEPROMBoardType = EEPROM_Default_BoardType;
3786 // priv->rf_type = RF_1T2R;
3787 //}
3788
5f53d8ca 3789 priv->rf_chip = RF_6052;
5f53d8ca
JC		 3790
3791 priv->rf_chip = RF_6052;//lzm test
3792 RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
3793 RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
3794
3795 //
3796 // Read antenna tx power offset of B/C/D to A from EEPROM
3797 // and read ThermalMeter from EEPROM
3798 //
3799 //if(!priv->AutoloadFailFlag)
3800 {
3801 priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
3802 priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
3803 }
3804 //else
3805 //{
3806 // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3807 // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3808 //}
3809
3810 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
3811 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
3812
3813 //
3814 // Read Tx Power gain offset of legacy OFDM to HT rate.
3815 // Read CrystalCap from EEPROM
3816 //
3817 //if(!priv->AutoloadFailFlag)
3818 {
3819 priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
3820 }
3821 //else
3822 //{
3823 // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3824 //}
3825
3826 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
3827
3828 //
3829 // Get Tx Power Base.
3830 //
3831 //if(!priv->AutoloadFailFlag)
3832 {
3833 priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
3834 }
3835 //else
3836 //{
3837 // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3838 //}
3839
3840 RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
3841
3842
3843 //
3844 // Get TSSI value for each path.
3845 //
3846 //if(!priv->AutoloadFailFlag)
3847 {
3848 priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
3849 priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
3850 }
3851 //else
3852 //{ // Default setting for Empty EEPROM
3853 // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3854 // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3855 //}
3856
3857 RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
3858
3859 //
3860 // Get Tx Power tracking mode.
3861 //
3862 //if(!priv->AutoloadFailFlag)
3863 {
3864 priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
3865 }
3866
3867 RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
3868
3869
5f53d8ca
JC		 3870 {
3871 //
3872 // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
3873 // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
3874 //
3875
3876 //
3877 // Get Tx Power Level by Channel
3878 //
3879 //if(!priv->AutoloadFailFlag)
3880 {
3881 // Read Tx power of Channel 1 ~ 14 from EFUSE.
3882 // 92S suupport RF A & B
3883 for (rf_path = 0; rf_path < 2; rf_path++)
3884 {
3885 for (i = 0; i < 3; i++)
3886 {
3887 // Read CCK RF A & B Tx power
3888 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3889 hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
3890
3891 // Read OFDM RF A & B Tx power for 1T
3892 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3893 hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
3894
3895 // Read OFDM RF A & B Tx power for 2T
3896 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3897 hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
3898 }
3899 }
3900
3901 }
3902//
3903 // Update Tx Power HAL variables.
3904//
3905 for (rf_path = 0; rf_path < 2; rf_path++)
3906 {
3907 for (i = 0; i < 3; i++)
3908 {
3909 RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3910 priv->RfCckChnlAreaTxPwr[rf_path][i]);
3911 RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3912 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3913 RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3914 }
3915
3916 // Assign dedicated channel tx power
3917 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3918 {
3919 if (i < 3) // Cjanel 1-3
3920 index = 0;
3921 else if (i < 9) // Channel 4-9
3922 index = 1;
3923 else // Channel 10-14
3924 index = 2;
3925
3926 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
3927 priv->RfTxPwrLevelCck[rf_path][i] =
3928 priv->RfCckChnlAreaTxPwr[rf_path][index];
3929 priv->RfTxPwrLevelOfdm1T[rf_path][i] =
3930 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3931 priv->RfTxPwrLevelOfdm2T[rf_path][i] =
3932 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3933 if (rf_path == 0)
3934 {
3935 priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
3936 priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
3937 }
3938 }
3939
3940 for(i=0; i<14; i++)
3941 {
3942 RT_TRACE((COMP_INIT),
3943 "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3944 rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
3945 priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
3946 priv->RfTxPwrLevelOfdm2T[rf_path][i] );
3947 }
3948 }
3949 }
3950
3951 //
3952 // 2009/02/09 Cosa add for new EEPROM format
3953 //
3954 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3955 {
3956 // Read tx power difference between HT OFDM 20/40 MHZ
3957 if (i < 3) // Cjanel 1-3
3958 index = 0;
3959 else if (i < 9) // Channel 4-9
3960 index = 1;
3961 else // Channel 10-14
3962 index = 2;
3963
3964 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
3965 priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
3966 priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3967
3968 // Read OFDM<->HT tx power diff
3969 if (i < 3) // Cjanel 1-3
3970 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
3971 else if (i < 9) // Channel 4-9
3972 tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
3973 else // Channel 10-14
3974 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
3975
3976 //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
3977 priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
3978 priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3979
3980 //
3981 // Read Band Edge tx power offset and check if user enable the ability
3982 //
3983 // HT 40 band edge channel
3984 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
3985 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3986 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3987 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
3988 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3989 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3990 // HT 20 band edge channel
3991 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
3992 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3993 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3994 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
3995 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3996 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3997 // OFDM band edge channel
3998 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
3999 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
4000 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
4001 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
4002 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
4003 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
4004
4005 priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
4006 }
4007
4008 for(i=0; i<14; i++)
4009 RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
4010 for(i=0; i<14; i++)
4011 RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
4012 for(i=0; i<14; i++)
4013 RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
4014 for(i=0; i<14; i++)
4015 RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
4016 RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4017 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
4018 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
4019 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4020 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
4021 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
4022
4023 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4024 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
4025 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
4026 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4027 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
4028 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
4029
4030 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4031 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
4032 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
4033 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4034 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
4035 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
4036 RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
5f53d8ca
JC		 4037
4038 //
4039 // Update remained HAL variables.
4040 //
4041 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4042 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
4043 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
4044 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
4045 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
4046 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
4047 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
4048 priv->LedStrategy = SW_LED_MODE0;
4049
4050 init_rate_adaptive(dev);
4051
4052 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4053
4054 //return RT_STATUS_SUCCESS;
4055}
4056
4057
4058//
4059// Description:
4060// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
4061//
4062// Assumption:
4063// 1. CR9346 regiser has verified.
4064// 2. PASSIVE_LEVEL (USB interface)
4065//
4066// Created by Roger, 2008.10.21.
4067//
4068static void rtl8192SU_read_eeprom_info(struct net_device *dev)
4069{
4070 struct r8192_priv *priv = ieee80211_priv(dev);
4071 u8 tmpU1b;
4072
4073 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
4074
4075 // Retrieve Chip version.
4076 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
4077 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
4078
4079 tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
4080
4081 // To check system boot selection.
4082 if (tmpU1b & CmdEERPOMSEL)
4083 {
4084 RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
4085 priv->EepromOrEfuse = TRUE;
4086 }
4087 else
4088 {
4089 RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
4090 priv->EepromOrEfuse = FALSE;
4091 }
4092
4093 // To check autoload success or not.
4094 if (tmpU1b & CmdEEPROM_En)
4095 {
4096 RT_TRACE(COMP_INIT, "Autoload OK!!\n");
4097 priv->AutoloadFailFlag=FALSE;
4098 rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
4099 }
4100 else
4101 { // Auto load fail.
4102 RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
4103 priv->AutoloadFailFlag=TRUE;
4104 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
4105
4106 //if (IS_BOOT_FROM_EFUSE(Adapter))
4107 if(!priv->EepromOrEfuse)
4108 {
4109 RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
4110 EFUSE_ShadowMapUpdate(dev);
4111 }
4112 }
4113#ifdef TO_DO_LIST
4114 if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
4115 {
4116 pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
4117 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
4118 }
4119 else
4120 {
4121 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
4122 }
4123
4124 switch(pMgntInfo->ChannelPlan)
4125 {
4126 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
4127 {
4128 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
4129
4130 pDot11dInfo->bEnabled = TRUE;
4131 }
4132 RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
4133 break;
4134 }
4135
4136 RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
4137 RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
4138
4139 RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
4140#endif
4141
4142 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4143
4144 //return RT_STATUS_SUCCESS;
4145}
0f29f587
BZ		 4146
4147short rtl8192_get_channel_map(struct net_device * dev)
5f53d8ca 4148{
5f53d8ca 4149 struct r8192_priv *priv = ieee80211_priv(dev);
0f29f587
BZ		 4150 if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
4151 printk("rtl8180_init:Error channel plan! Set to default.\n");
4152 priv->ChannelPlan= 0;
5f53d8ca 4153 }
0f29f587 4154 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
5f53d8ca 4155
0f29f587
BZ		 4156 rtl819x_set_channel_map(priv->ChannelPlan, priv);
4157 return 0;
4158}
5f53d8ca
JC		 4159
4160short rtl8192_init(struct net_device *dev)
4161{
4162
4163 struct r8192_priv *priv = ieee80211_priv(dev);
4164
5f53d8ca
JC		 4165 rtl8192_init_priv_variable(dev);
4166 rtl8192_init_priv_lock(priv);
4167 rtl8192_init_priv_task(dev);
4168 rtl8192_get_eeprom_size(dev);
4169 priv->ops->rtl819x_read_eeprom_info(dev);
4170 rtl8192_get_channel_map(dev);
4171 init_hal_dm(dev);
4172 init_timer(&priv->watch_dog_timer);
4173 priv->watch_dog_timer.data = (unsigned long)dev;
4174 priv->watch_dog_timer.function = watch_dog_timer_callback;
4175
4176 //rtl8192_adapter_start(dev);
4177#ifdef DEBUG_EPROM
4178 dump_eprom(dev);
4179#endif
4180 return 0;
4181}
4182
4183/******************************************************************************
4184 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
4185 * not to do all the hw config as its name says
4186 * input: net_device dev
4187 * output: none
4188 * return: none
4189 * notice: This part need to modified according to the rate set we filtered
4190 * ****************************************************************************/
4191void rtl8192_hwconfig(struct net_device* dev)
4192{
4193 u32 regRATR = 0, regRRSR = 0;
4194 u8 regBwOpMode = 0, regTmp = 0;
4195 struct r8192_priv *priv = ieee80211_priv(dev);
4196
4197// Set RRSR, RATR, and BW_OPMODE registers
4198 //
4199 switch(priv->ieee80211->mode)
4200 {
4201 case WIRELESS_MODE_B:
4202 regBwOpMode = BW_OPMODE_20MHZ;
4203 regRATR = RATE_ALL_CCK;
4204 regRRSR = RATE_ALL_CCK;
4205 break;
4206 case WIRELESS_MODE_A:
4207 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4208 regRATR = RATE_ALL_OFDM_AG;
4209 regRRSR = RATE_ALL_OFDM_AG;
4210 break;
4211 case WIRELESS_MODE_G:
4212 regBwOpMode = BW_OPMODE_20MHZ;
4213 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4214 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4215 break;
4216 case WIRELESS_MODE_AUTO:
4217#ifdef TO_DO_LIST
4218 if (Adapter->bInHctTest)
4219 {
4220 regBwOpMode = BW_OPMODE_20MHZ;
4221 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4222 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4223 }
4224 else
4225#endif
4226 {
4227 regBwOpMode = BW_OPMODE_20MHZ;
4228 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4229 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4230 }
4231 break;
4232 case WIRELESS_MODE_N_24G:
4233 // It support CCK rate by default.
4234 // CCK rate will be filtered out only when associated AP does not support it.
4235 regBwOpMode = BW_OPMODE_20MHZ;
4236 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4237 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4238 break;
4239 case WIRELESS_MODE_N_5G:
4240 regBwOpMode = BW_OPMODE_5G;
4241 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4242 regRRSR = RATE_ALL_OFDM_AG;
4243 break;
4244 }
4245
4246 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4247 {
4248 u32 ratr_value = 0;
4249 ratr_value = regRATR;
4250 if (priv->rf_type == RF_1T2R)
4251 {
4252 ratr_value &= ~(RATE_ALL_OFDM_2SS);
4253 }
4254 write_nic_dword(dev, RATR0, ratr_value);
4255 write_nic_byte(dev, UFWP, 1);
4256 }
4257 regTmp = read_nic_byte(dev, 0x313);
4258 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
4259 write_nic_dword(dev, RRSR, regRRSR);
4260
4261 //
4262 // Set Retry Limit here
4263 //
4264 write_nic_word(dev, RETRY_LIMIT,
4265 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
4266 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
4267 // Set Contention Window here
4268
4269 // Set Tx AGC
4270
4271 // Set Tx Antenna including Feedback control
4272
4273 // Set Auto Rate fallback control
4274
4275
4276}
4277
5f53d8ca
JC		 4278
4279//
4280// Description:
4281// Initial HW relted registers.
4282//
4283// Assumption:
4284// Config RTL8192S USB MAC, we should config MAC before download FW.
4285//
4286// 2008.09.03, Added by Roger.
4287//
4288static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
4289{
4290 u8 tmpU1b;// i;
4291// u16 tmpU2b;
4292// u32 tmpU4b;
4293 u8 PollingCnt = 20;
4294
4295 RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
4296
4297 //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
4298
4299 //
4300 //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
4301 // MAC I/O to solve FW download fail when system from resume sate.
4302 // 2008.11.04.
4303 //
4304 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4305 if(tmpU1b & 0x80)
4306 {
4307 tmpU1b &= 0x3f;
4308 write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
4309 }
4310 // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
4311 write_nic_byte(dev, RPWM, 0x0);
4312
4313 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4314 tmpU1b &= 0x73;
4315 write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
4316 udelay(1000);
4317
4318 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4319 write_nic_byte(dev, SPS0_CTRL+1, 0x53);
4320 write_nic_byte(dev, SPS0_CTRL, 0x57);
4321
4322 //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
4323 tmpU1b = read_nic_byte(dev, AFE_MISC);
4324 write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
4325
4326 //Enable PLL Power (LDOA15V)
4327 tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
4328 write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
4329
4330 //Enable LDOV12D block
4331 tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
4332 write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
4333
4334 //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4335 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
4336
4337 //PlatformSleepUs(2000);
4338
4339 //Enable Switch Regulator Block
4340 //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4341 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
4342
4343 //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
4344
4345 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4346 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
4347
4348 //Engineer Packet CP test Enable
4349 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4350 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
4351
4352 //Support 64k IMEM, suggested by SD1 Alex.
4353 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4354 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
4355
4356 //Enable AFE clock
4357 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
4358 write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
4359
4360 //Enable AFE PLL Macro Block
4361 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
4362 write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
4363
4364 //Attatch AFE PLL to MACTOP/BB/PCIe Digital
4365 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
4366 write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
4367
4368 // Switch to 40M clock
4369 write_nic_byte(dev, SYS_CLKR, 0x00);
4370
4371 //SSC Disable
4372 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4373 //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
4374 write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
4375
4376 //Enable MAC clock
4377 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4378 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
4379
4380 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4381 write_nic_byte(dev, PMC_FSM, 0x02);
4382
4383 //Enable Core digital and enable IOREG R/W
4384 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4385 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
4386
4387 //Enable REG_EN
4388 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4389 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
4390
4391 //Switch the control path to FW
4392 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4393 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
4394
4395 write_nic_byte(dev, CMDR, 0xFC);
4396 write_nic_byte(dev, CMDR+1, 0x37);
4397
4398 //Fix the RX FIFO issue(usb error), 970410
4399 tmpU1b = read_nic_byte_E(dev, 0x5c);
4400 write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
4401
4402 //For power save, used this in the bit file after 970621
4403 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4404 write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
4405
4406 // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
4407 write_nic_byte_E(dev, 0x1c, 0x80);
4408
4409 //
4410 // <Roger_EXP> To make sure that TxDMA can ready to download FW.
4411 // We should reset TxDMA if IMEM RPT was not ready.
4412 // Suggested by SD1 Alex. 2008.10.23.
4413 //
4414 do
4415 {
4416 tmpU1b = read_nic_byte(dev, TCR);
4417 if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
4418 break;
4419 //PlatformStallExecution(5);
4420 udelay(5);
4421 }while(PollingCnt--); // Delay 1ms
4422
4423 if(PollingCnt <= 0 )
4424 {
4425 RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
4426 tmpU1b = read_nic_byte(dev, CMDR);
4427 write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
4428 udelay(2);
4429 write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
4430 }
4431
4432
4433 RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
4434}
5f53d8ca 4435
5f53d8ca
JC		 4436//
4437// Description:
4438// Initial HW relted registers.
4439//
4440// Assumption:
4441// 1. This function is only invoked at driver intialization once.
4442// 2. PASSIVE LEVEL.
4443//
4444// 2008.06.10, Added by Roger.
4445//
4446static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
4447{
4448 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
4449 //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
4450 //u8 tmpU1b, RxPageCfg, i;
4451 u16 tmpU2b;
4452 u8 tmpU1b;//, i;
4453
4454
4455 RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
4456
4457 // Enable Tx/Rx
4458 tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
4459 FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
4460 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
4461 write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
4462
4463 // Loopback mode or not
4464 priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
4465 if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
4466 tmpU1b = LBK_NORMAL;
4467 else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
4468 tmpU1b = LBK_MAC_DLB;
4469 else
4470 RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
4471
4472 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
4473 write_nic_byte(dev, LBKMD_SEL, tmpU1b);
4474
4475 // Set RCR
4476 write_nic_dword(dev, RCR, priv->ReceiveConfig);
4477 RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
4478
4479
4480 // Set RQPN
4481 //
4482 // <Roger_Notes> 2008.08.18.
4483 // 6 endpoints:
4484 // (1) Page number on CMDQ is 0x03.
4485 // (2) Page number on BCNQ, HQ and MGTQ is 0.
4486 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4487 // (4) Page number on PUBQ is 0xdd
4488 //
4489 // 11 endpoints:
4490 // (1) Page number on CMDQ is 0x00.
4491 // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
4492 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4493 // (4) Page number on PUBQ is 0xd8
4494 //
4495 //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
4496 //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
5f53d8ca
JC		 4497
4498 // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
4499 tmpU1b = read_nic_byte_E(dev, 0x5C);
4500 write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
4501
5f53d8ca
JC		 4502 // For EFUSE init configuration.
4503 //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
4504 if (priv->bBootFromEfuse)
4505 {
4506 u8 tempval;
4507
4508 tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
4509 tempval &= 0xFE;
4510 write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
4511
4512 // Enable LDO 2.5V for write action
4513 //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
4514 //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
4515
4516 // Change Efuse Clock for write action
4517 //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
4518
4519 // Change Program timing
4520 write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
4521 //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
4522 RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
4523 }
4524
4525
4526 RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
4527}
4528
4529void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
4530{
4531
4532 struct r8192_priv *priv = ieee80211_priv(dev);
4533 u8 regBwOpMode = 0;
4534 u32 regRATR = 0, regRRSR = 0;
4535 u8 regTmp = 0;
4536 u32 i = 0;
4537
4538 //1 This part need to modified according to the rate set we filtered!!
4539 //
4540 // Set RRSR, RATR, and BW_OPMODE registers
4541 //
4542 switch(priv->ieee80211->mode)
4543 {
4544 case WIRELESS_MODE_B:
4545 regBwOpMode = BW_OPMODE_20MHZ;
4546 regRATR = RATE_ALL_CCK;
4547 regRRSR = RATE_ALL_CCK;
4548 break;
4549 case WIRELESS_MODE_A:
4550 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4551 regRATR = RATE_ALL_OFDM_AG;
4552 regRRSR = RATE_ALL_OFDM_AG;
4553 break;
4554 case WIRELESS_MODE_G:
4555 regBwOpMode = BW_OPMODE_20MHZ;
4556 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4557 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4558 break;
4559 case WIRELESS_MODE_AUTO:
4560 if (priv->bInHctTest)
4561 {
4562 regBwOpMode = BW_OPMODE_20MHZ;
4563 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4564 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4565 }
4566 else
4567 {
4568 regBwOpMode = BW_OPMODE_20MHZ;
4569 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4570 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4571 }
4572 break;
4573 case WIRELESS_MODE_N_24G:
4574 // It support CCK rate by default.
4575 // CCK rate will be filtered out only when associated AP does not support it.
4576 regBwOpMode = BW_OPMODE_20MHZ;
4577 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4578 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4579 break;
4580 case WIRELESS_MODE_N_5G:
4581 regBwOpMode = BW_OPMODE_5G;
4582 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4583 regRRSR = RATE_ALL_OFDM_AG;
4584 break;
4585 }
4586
4587 //
4588 // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
4589 // 2008.09.23.
4590 //
4591 regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
5f53d8ca 4592 regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
5f53d8ca
JC		 4593
4594 //
4595 // Update SIFS timing.
4596 //
4597 //priv->SifsTime = 0x0e0e0a0a;
4598 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
4599 { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
4600 // SIFS for CCK Data ACK
4601 write_nic_byte(dev, SIFS_CCK, val[0]);
4602 // SIFS for CCK consecutive tx like CTS data!
4603 write_nic_byte(dev, SIFS_CCK+1, val[1]);
4604
4605 // SIFS for OFDM Data ACK
4606 write_nic_byte(dev, SIFS_OFDM, val[2]);
4607 // SIFS for OFDM consecutive tx like CTS data!
4608 write_nic_byte(dev, SIFS_OFDM+1, val[3]);
4609 }
4610
4611 write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
4612 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4613
4614 //
4615 // Suggested by SD1 Alex, 2008-06-14.
4616 //
4617 //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
4618
4619 //
4620 // Set Data Auto Rate Fallback Retry Count register.
4621 //
4622 write_nic_dword(dev, DARFRC, 0x02010000);
4623 write_nic_dword(dev, DARFRC+4, 0x06050403);
4624 write_nic_dword(dev, RARFRC, 0x02010000);
4625 write_nic_dword(dev, RARFRC+4, 0x06050403);
4626
4627 // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
4628 for (i = 0; i < 8; i++)
5f53d8ca 4629 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
5f53d8ca
JC		 4630
4631 //
4632 // Aggregation length limit. Revised by Roger. 2008.09.22.
4633 //
4634 write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
4635 write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
4636 write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
4637
4638 // Set NAV protection length
4639 write_nic_word(dev, NAV_PROT_LEN, 0x0080);
4640
4641 // Set TXOP stall control for several queue/HI/BCN/MGT/
4642 write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
4643
4644 // Set MSDU lifetime.
4645 write_nic_byte(dev, MLT, 0x8f);
4646
4647 // Set CCK/OFDM SIFS
4648 write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
4649 write_nic_word(dev, SIFS_OFDM, 0x0e0e);
4650
4651 write_nic_byte(dev, ACK_TIMEOUT, 0x40);
4652
4653 // CF-END Threshold
4654 write_nic_byte(dev, CFEND_TH, 0xFF);
4655
4656 //
4657 // For Min Spacing configuration.
4658 //
4659 switch(priv->rf_type)
4660 {
4661 case RF_1T2R:
4662 case RF_1T1R:
4663 RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
4664 priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
4665 break;
4666 case RF_2T2R:
4667 case RF_2T2R_GREEN:
4668 RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
4669 priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
4670 break;
4671 }
4672 write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
4673
4674 //LZM 090219
4675 //
4676 // For Min Spacing configuration.
4677 //
4678 //priv->MinSpaceCfg = 0x00;
4679 //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
4680}
4681
5f53d8ca 4682
5f53d8ca
JC		 4683// Description: Initial HW relted registers.
4684//
4685// Assumption: This function is only invoked at driver intialization once.
4686//
4687// 2008.06.10, Added by Roger.
4688bool rtl8192SU_adapter_start(struct net_device *dev)
4689{
4690 struct r8192_priv *priv = ieee80211_priv(dev);
4691 //u32 dwRegRead = 0;
4692 //bool init_status = true;
4693 //u32 ulRegRead;
4694 bool rtStatus = true;
4695 //u8 PipeIndex;
4696 //u8 eRFPath, tmpU1b;
4697 u8 fw_download_times = 1;
4698
4699
4700 RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
4701
4702 //pHalData->bGPIOChangeRF = FALSE;
4703
4704
4705 //
4706 // <Roger_Notes> 2008.06.15.
4707 //
4708 // Initialization Steps on RTL8192SU:
4709 // a. MAC initialization prior to sending down firmware code.
4710 // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4711 // c. MAC configuration after firmware has been download successfully.
4712 // d. Initialize BB related configurations.
4713 // e. Initialize RF related configurations.
4714 // f. Start to BulkIn transfer.
4715 //
4716
4717 //
4718 //a. MAC initialization prior to send down firmware code.
4719 //
4720start:
4721 rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
4722
4723 //
4724 //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4725 //
4726 rtStatus = FirmwareDownload92S(dev);
4727 if(rtStatus != true)
4728 {
4729 if(fw_download_times == 1){
4730 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
4731 fw_download_times = fw_download_times + 1;
4732 goto start;
4733 }else{
4734 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
4735 goto end;
4736 }
4737 }
4738 //
4739 //c. MAC configuration after firmware has been download successfully.
4740 //
4741 rtl8192SU_MacConfigAfterFwDownload(dev);
4742
5f53d8ca
JC		 4743 //priv->bLbusEnable = TRUE;
4744 //if(priv->RegRfOff == TRUE)
4745 // priv->eRFPowerState = eRfOff;
4746
4747 // Save target channel
4748 // <Roger_Notes> Current Channel will be updated again later.
4749 //priv->CurrentChannel = Channel;
4750 rtStatus = PHY_MACConfig8192S(dev);//===>ok
4751 if(rtStatus != true)
4752 {
4753 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
4754 goto end;
4755 }
4756 if (1){
4757 int i;
4758 for (i=0; i<4; i++)
4759 write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
4760 write_nic_byte(dev,AcmHwCtrl, 0x01);
4761 }
4762
4763
4764 //
4765 //d. Initialize BB related configurations.
4766 //
4767
4768 rtStatus = PHY_BBConfig8192S(dev);//===>ok
4769 if(rtStatus != true)
4770 {
4771 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
4772 goto end;
4773 }
4774
4775 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
4776
4777 //
4778 // e. Initialize RF related configurations.
4779 //
4780 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
4781 priv->Rf_Mode = RF_OP_By_SW_3wire;
4782
4783 // For RF test only from Scott's suggestion
4784 //write_nic_byte(dev, 0x27, 0xDB);
4785 //write_nic_byte(dev, 0x1B, 0x07);
4786
4787
4788 write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
4789
4790 // <Roger_Notes> The following IOs are configured for each RF modules.
4791 // Enable RF module and reset RF and SDM module. 2008.11.17.
4792 if(priv->card_8192_version == VERSION_8192S_ACUT)
4793 write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
4794 else
4795 write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
4796
4797 rtStatus = PHY_RFConfig8192S(dev);//===>ok
4798 if(rtStatus != true)
4799 {
4800 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
4801 goto end;
4802 }
4803
4804
4805 // Set CCK and OFDM Block "ON"
4806 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4807 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4808
4809 //
4810 // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
4811 // Revised by Roger, 2008.12.18.
4812 //
4813 if(priv->rf_type == RF_1T1R)
4814 {
4815 // This is needed for PHY_REG after 20081219
4816 rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
4817 // This is needed for PHY_REG before 20081219
4818 //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
4819 }
4820
5f53d8ca
JC		 4821
4822 //LZM 090219
4823 // Set CCK and OFDM Block "ON"
4824 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4825 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4826
4827
4828 //3//Get hardware version, do it in read eeprom?
4829 //GetHardwareVersion819xUsb(Adapter);
4830
4831 //3//
4832 //3 //Set Hardware
4833 //3//
4834 rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
4835
4836 //
4837 // <Roger_Notes> We set MAC address here if autoload was failed before,
4838 // otherwise IDR0 will NOT contain any value.
4839 //
4840 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4841 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4842 if(!priv->bInHctTest)
4843 {
4844 if(priv->ResetProgress == RESET_TYPE_NORESET)
4845 {
4846 //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
4847 //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
4848 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
4849 }
4850 }
4851 else
4852 {
4853 priv->ieee80211->mode = WIRELESS_MODE_G;
4854 rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
4855 }
4856
4857 //Security related.
4858 //-----------------------------------------------------------------------------
4859 // Set up security related. 070106, by rcnjko:
4860 // 1. Clear all H/W keys.
4861 // 2. Enable H/W encryption/decryption.
4862 //-----------------------------------------------------------------------------
4863 //CamResetAllEntry(Adapter);
4864 //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
4865
4866 //SecClearAllKeys(Adapter);
4867 CamResetAllEntry(dev);
4868 //SecInit(Adapter);
4869 {
4870 u8 SECR_value = 0x0;
4871 SECR_value |= SCR_TxEncEnable;
4872 SECR_value |= SCR_RxDecEnable;
4873 SECR_value |= SCR_NoSKMC;
4874 write_nic_byte(dev, SECR, SECR_value);
4875 }
4876
5f53d8ca
JC		 4877#ifdef TO_DO_LIST
4878
4879 //PHY_UpdateInitialGain(dev);
4880
4881 if(priv->RegRfOff == true)
4882 { // User disable RF via registry.
4883 u8 eRFPath = 0;
4884
4885 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
4886 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
4887 // Those action will be discard in MgntActSet_RF_State because off the same state
4888 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
4889 rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
4890 }
4891 else if(priv->RfOffReason > RF_CHANGE_BY_PS)
4892 { // H/W or S/W RF OFF before sleep.
4893 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
4894 MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
4895 }
4896 else
4897 {
4898 priv->eRFPowerState = eRfOn;
4899 priv->RfOffReason = 0;
4900 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
4901 }
4902
4903#endif
4904
4905
4906//
4907// f. Start to BulkIn transfer.
4908//
4909#ifdef TO_DO_LIST
4910
4911#ifndef UNDER_VISTA
4912 {
4913 u8 i;
4914 PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
4915
4916 for(PipeIndex=0; PipeIndex < MAX_RX_QUEUE; PipeIndex++)
4917 {
4918 if (PipeIndex == 0)
4919 {
4920 for(i=0; i<32; i++)
4921 HalUsbInMpdu(Adapter, PipeIndex);
4922 }
4923 else
4924 {
4925 //HalUsbInMpdu(Adapter, PipeIndex);
4926 //HalUsbInMpdu(Adapter, PipeIndex);
4927 //HalUsbInMpdu(Adapter, PipeIndex);
4928 }
4929 }
4930 PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
4931 }
4932#else
4933 // Joseph add to 819X code base for Vista USB platform.
4934 // This part may need to be add to Hal819xU code base. too.
4935 PlatformUsbEnableInPipes(Adapter);
4936#endif
4937
4938 RT_TRACE(COMP_INIT, "HighestOperaRate = %x\n", Adapter->MgntInfo.HighestOperaRate);
4939
4940 PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
4941
4942 //
4943 // <Roger_EXP> The following configurations are for ASIC verification temporally.
4944 // 2008.07.10.
4945 //
4946
4947#endif
4948
4949 //
4950 // Read EEPROM TX power index and PHY_REG_PG.txt to capture correct
4951 // TX power index for different rate set.
4952 //
4953 //if(priv->card_8192_version >= VERSION_8192S_ACUT)
4954 {
4955 // Get original hw reg values
4956 PHY_GetHWRegOriginalValue(dev);
4957
4958 // Write correct tx power index//FIXLZM
4959 PHY_SetTxPowerLevel8192S(dev, priv->chan);
4960 }
4961
4962 {
4963 u8 tmpU1b = 0;
4964 // EEPROM R/W workaround
4965 tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
4966 write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~GPIOMUX_EN));
4967 }
4968
4969//
4970//<Roger_Notes> 2008.08.19.
4971// We return status here for temporal FPGA verification, 2008.08.19.
4972
4973#ifdef RTL8192SU_FW_IQK
4974 write_nic_dword(dev, WFM5, FW_IQK_ENABLE);
4975 ChkFwCmdIoDone(dev);
4976#endif
4977
4978 //
4979 // <Roger_Notes> We enable high power mechanism after NIC initialized.
4980 // 2008.11.27.
4981 //
4982 write_nic_dword(dev, WFM5, FW_RA_RESET);
4983 ChkFwCmdIoDone(dev);
4984 write_nic_dword(dev, WFM5, FW_RA_ACTIVE);
4985 ChkFwCmdIoDone(dev);
4986 write_nic_dword(dev, WFM5, FW_RA_REFRESH);
4987 ChkFwCmdIoDone(dev);
4988 write_nic_dword(dev, WFM5, FW_BB_RESET_ENABLE);
4989
4990// <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
4991//
5f53d8ca 4992
5f53d8ca
JC		 4993end:
4994return rtStatus;
4995}
4996
5f53d8ca
JC		 4997/***************************************************************************
4998 -------------------------------NET STUFF---------------------------
4999***************************************************************************/
5000
5001static struct net_device_stats *rtl8192_stats(struct net_device *dev)
5002{
5003 struct r8192_priv *priv = ieee80211_priv(dev);
5004
5005 return &priv->ieee80211->stats;
5006}
5007
5008bool
5009HalTxCheckStuck819xUsb(
5010 struct net_device *dev
5011 )
5012{
5013 struct r8192_priv *priv = ieee80211_priv(dev);
5014 u16 RegTxCounter = read_nic_word(dev, 0x128);
5015 bool bStuck = FALSE;
5016 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
5017 if(priv->TxCounter==RegTxCounter)
5018 bStuck = TRUE;
5019
5020 priv->TxCounter = RegTxCounter;
5021
5022 return bStuck;
5023}
5024
5025/*
5026* <Assumption: RT_TX_SPINLOCK is acquired.>
5027* First added: 2006.11.19 by emily
5028*/
5029RESET_TYPE
5030TxCheckStuck(struct net_device *dev)
5031{
5032 struct r8192_priv *priv = ieee80211_priv(dev);
5033 u8 QueueID;
5034// PRT_TCB pTcb;
5035// u8 ResetThreshold;
5036 bool bCheckFwTxCnt = false;
5037 //unsigned long flags;
5038
5039 //
5040 // Decide Stuch threshold according to current power save mode
5041 //
5042
5043// RT_TRACE(COMP_RESET, " ==> TxCheckStuck()\n");
5044// PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
5045// spin_lock_irqsave(&priv->ieee80211->lock,flags);
5046 for (QueueID = 0; QueueID<=BEACON_QUEUE;QueueID ++)
5047 {
5048 if(QueueID == TXCMD_QUEUE)
5049 continue;
5050#if 1
5f53d8ca 5051 if((skb_queue_len(&priv->ieee80211->skb_waitQ[QueueID]) == 0) && (skb_queue_len(&priv->ieee80211->skb_aggQ[QueueID]) == 0))
5f53d8ca
JC		 5052 continue;
5053#endif
5054
5055 bCheckFwTxCnt = true;
5056 }
5057// PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
5058// spin_unlock_irqrestore(&priv->ieee80211->lock,flags);
5059// RT_TRACE(COMP_RESET,"bCheckFwTxCnt is %d\n",bCheckFwTxCnt);
5060#if 1
5061 if(bCheckFwTxCnt)
5062 {
5063 if(HalTxCheckStuck819xUsb(dev))
5064 {
5065 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
5066 return RESET_TYPE_SILENT;
5067 }
5068 }
5069#endif
5070 return RESET_TYPE_NORESET;
5071}
5072
5073bool
5074HalRxCheckStuck819xUsb(struct net_device *dev)
5075{
5076 u16 RegRxCounter = read_nic_word(dev, 0x130);
5077 struct r8192_priv *priv = ieee80211_priv(dev);
5078 bool bStuck = FALSE;
5079//#ifdef RTL8192SU
5080
5081//#else
5082 static u8 rx_chk_cnt = 0;
5083 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
5084 // If rssi is small, we should check rx for long time because of bad rx.
5085 // or maybe it will continuous silent reset every 2 seconds.
5086 rx_chk_cnt++;
5087 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
5088 {
5089 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
5090 }
5091 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
5092 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
5093 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
5094 {
5095 if(rx_chk_cnt < 2)
5096 {
5097 return bStuck;
5098 }
5099 else
5100 {
5101 rx_chk_cnt = 0;
5102 }
5103 }
5104 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
5105 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
5106 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
5107 {
5108 if(rx_chk_cnt < 4)
5109 {
5110 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5111 return bStuck;
5112 }
5113 else
5114 {
5115 rx_chk_cnt = 0;
5116 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5117 }
5118 }
5119 else
5120 {
5121 if(rx_chk_cnt < 8)
5122 {
5123 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
5124 return bStuck;
5125 }
5126 else
5127 {
5128 rx_chk_cnt = 0;
5129 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
5130 }
5131 }
5132//#endif
5133
5134 if(priv->RxCounter==RegRxCounter)
5135 bStuck = TRUE;
5136
5137 priv->RxCounter = RegRxCounter;
5138
5139 return bStuck;
5140}
5141
5142RESET_TYPE
5143RxCheckStuck(struct net_device *dev)
5144{
5145 struct r8192_priv *priv = ieee80211_priv(dev);
5146 //int i;
5147 bool bRxCheck = FALSE;
5148
5149// RT_TRACE(COMP_RESET," ==> RxCheckStuck()\n");
5150 //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
5151
5152 if(priv->IrpPendingCount > 1)
5153 bRxCheck = TRUE;
5154 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
5155
5156// RT_TRACE(COMP_RESET,"bRxCheck is %d \n",bRxCheck);
5157 if(bRxCheck)
5158 {
5159 if(HalRxCheckStuck819xUsb(dev))
5160 {
5161 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
5162 return RESET_TYPE_SILENT;
5163 }
5164 }
5165 return RESET_TYPE_NORESET;
5166}
5167
5168
5169/**
5170* This function is called by Checkforhang to check whether we should ask OS to reset driver
5171*
5172* \param pAdapter The adapter context for this miniport
5173*
5174* Note:NIC with USB interface sholud not call this function because we cannot scan descriptor
5175* to judge whether there is tx stuck.
5176* Note: This function may be required to be rewrite for Vista OS.
5177* <<<Assumption: Tx spinlock has been acquired >>>
5178*
5179* 8185 and 8185b does not implement this function. This is added by Emily at 2006.11.24
5180*/
5181RESET_TYPE
5182rtl819x_ifcheck_resetornot(struct net_device *dev)
5183{
5184 struct r8192_priv *priv = ieee80211_priv(dev);
5185 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
5186 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
5187 RT_RF_POWER_STATE rfState;
5188
5f53d8ca 5189 return RESET_TYPE_NORESET;
5f53d8ca
JC		 5190
5191 rfState = priv->ieee80211->eRFPowerState;
5192
5193 TxResetType = TxCheckStuck(dev);
5194#if 1
5195 if( rfState != eRfOff ||
5196 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
5197 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
5198 {
5199 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
5200 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
5201 // if driver is in firmware download failure status, driver should initialize RF in the following
5202 // silent reset procedure Emily, 2008.01.21
5203
5204 // Driver should not check RX stuck in IBSS mode because it is required to
5205 // set Check BSSID in order to send beacon, however, if check BSSID is
5206 // set, STA cannot hear any packet a all. Emily, 2008.04.12
5207 RxResetType = RxCheckStuck(dev);
5208 }
5209#endif
5210 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
5211 return RESET_TYPE_NORMAL;
5212 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
5213 RT_TRACE(COMP_RESET,"%s():silent reset\n",__FUNCTION__);
5214 return RESET_TYPE_SILENT;
5215 }
5216 else
5217 return RESET_TYPE_NORESET;
5218
5219}
5220
5221void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
5222int _rtl8192_up(struct net_device *dev);
5223int rtl8192_close(struct net_device *dev);
5224
5225
5226
5227void
5228CamRestoreAllEntry( struct net_device *dev)
5229{
5230 u8 EntryId = 0;
5231 struct r8192_priv *priv = ieee80211_priv(dev);
5232 u8* MacAddr = priv->ieee80211->current_network.bssid;
5233
5234 static u8 CAM_CONST_ADDR[4][6] = {
5235 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
5236 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
5237 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
5238 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
5239 static u8 CAM_CONST_BROAD[] =
5240 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5241
5242 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
5243
5244
5245 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
5246 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
5247 {
5248
5249 for(EntryId=0; EntryId<4; EntryId++)
5250 {
5251 {
5252 MacAddr = CAM_CONST_ADDR[EntryId];
5253 setKey(dev,
5254 EntryId ,
5255 EntryId,
5256 priv->ieee80211->pairwise_key_type,
5257 MacAddr,
5258 0,
5259 NULL);
5260 }
5261 }
5262
5263 }
5264 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
5265 {
5266
5267 {
5268 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5269 setKey(dev,
5270 4,
5271 0,
5272 priv->ieee80211->pairwise_key_type,
5273 (u8*)dev->dev_addr,
5274 0,
5275 NULL);
5276 else
5277 setKey(dev,
5278 4,
5279 0,
5280 priv->ieee80211->pairwise_key_type,
5281 MacAddr,
5282 0,
5283 NULL);
5284 }
5285 }
5286 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
5287 {
5288
5289 {
5290 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5291 setKey(dev,
5292 4,
5293 0,
5294 priv->ieee80211->pairwise_key_type,
5295 (u8*)dev->dev_addr,
5296 0,
5297 NULL);
5298 else
5299 setKey(dev,
5300 4,
5301 0,
5302 priv->ieee80211->pairwise_key_type,
5303 MacAddr,
5304 0,
5305 NULL);
5306 }
5307 }
5308
5309
5310
5311 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
5312 {
5313 MacAddr = CAM_CONST_BROAD;
5314 for(EntryId=1 ; EntryId<4 ; EntryId++)
5315 {
5316 {
5317 setKey(dev,
5318 EntryId,
5319 EntryId,
5320 priv->ieee80211->group_key_type,
5321 MacAddr,
5322 0,
5323 NULL);
5324 }
5325 }
5326 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5327 setKey(dev,
5328 0,
5329 0,
5330 priv->ieee80211->group_key_type,
5331 CAM_CONST_ADDR[0],
5332 0,
5333 NULL);
5334 }
5335 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
5336 {
5337 MacAddr = CAM_CONST_BROAD;
5338 for(EntryId=1; EntryId<4 ; EntryId++)
5339 {
5340 {
5341 setKey(dev,
5342 EntryId ,
5343 EntryId,
5344 priv->ieee80211->group_key_type,
5345 MacAddr,
5346 0,
5347 NULL);
5348 }
5349 }
5350
5351 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5352 setKey(dev,
5353 0 ,
5354 0,
5355 priv->ieee80211->group_key_type,
5356 CAM_CONST_ADDR[0],
5357 0,
5358 NULL);
5359 }
5360}
5361//////////////////////////////////////////////////////////////
5362// This function is used to fix Tx/Rx stop bug temporarily.
5363// This function will do "system reset" to NIC when Tx or Rx is stuck.
5364// The method checking Tx/Rx stuck of this function is supported by FW,
5365// which reports Tx and Rx counter to register 0x128 and 0x130.
5366//////////////////////////////////////////////////////////////
5367void
5368rtl819x_ifsilentreset(struct net_device *dev)
5369{
5370 //OCTET_STRING asocpdu;
5371 struct r8192_priv *priv = ieee80211_priv(dev);
5372 u8 reset_times = 0;
5373 int reset_status = 0;
5374 struct ieee80211_device *ieee = priv->ieee80211;
5375
5376
5377 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
5378 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
5379
5380 if(priv->ResetProgress==RESET_TYPE_NORESET)
5381 {
5382RESET_START:
5383
5384 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
5385
5386 // Set the variable for reset.
5387 priv->ResetProgress = RESET_TYPE_SILENT;
5388// rtl8192_close(dev);
5389#if 1
5390 down(&priv->wx_sem);
5391 if(priv->up == 0)
5392 {
5393 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
5394 up(&priv->wx_sem);
5395 return ;
5396 }
5397 priv->up = 0;
5398 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
5399// if(!netif_queue_stopped(dev))
5400// netif_stop_queue(dev);
5401
5402 rtl8192_rtx_disable(dev);
5403 rtl8192_cancel_deferred_work(priv);
5404 deinit_hal_dm(dev);
5405 del_timer_sync(&priv->watch_dog_timer);
5406
5407 ieee->sync_scan_hurryup = 1;
5408 if(ieee->state == IEEE80211_LINKED)
5409 {
5410 down(&ieee->wx_sem);
5411 printk("ieee->state is IEEE80211_LINKED\n");
5412 ieee80211_stop_send_beacons(priv->ieee80211);
5413 del_timer_sync(&ieee->associate_timer);
5f53d8ca 5414 cancel_delayed_work(&ieee->associate_retry_wq);
5f53d8ca
JC		 5415 ieee80211_stop_scan(ieee);
5416 netif_carrier_off(dev);
5417 up(&ieee->wx_sem);
5418 }
5419 else{
5420 printk("ieee->state is NOT LINKED\n");
5421 ieee80211_softmac_stop_protocol(priv->ieee80211); }
5422 up(&priv->wx_sem);
5423 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
5424 //rtl8192_irq_disable(dev);
5425 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
5426 reset_status = _rtl8192_up(dev);
5427
5428 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
5429 if(reset_status == -EAGAIN)
5430 {
5431 if(reset_times < 3)
5432 {
5433 reset_times++;
5434 goto RESET_START;
5435 }
5436 else
5437 {
5438 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n", __FUNCTION__);
5439 }
5440 }
5441#endif
5442 ieee->is_silent_reset = 1;
5443#if 1
5444 EnableHWSecurityConfig8192(dev);
5445#if 1
5446 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
5447 {
5448 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5449
5450#if 1
5f53d8ca 5451 queue_work(ieee->wq, &ieee->associate_complete_wq);
5f53d8ca
JC		 5452#endif
5453
5454 }
5455 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
5456 {
5457 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5458 ieee->link_change(ieee->dev);
5459
5460 // notify_wx_assoc_event(ieee);
5461
5462 ieee80211_start_send_beacons(ieee);
5463
5464 if (ieee->data_hard_resume)
5465 ieee->data_hard_resume(ieee->dev);
5466 netif_carrier_on(ieee->dev);
5467 }
5468#endif
5469
5470 CamRestoreAllEntry(dev);
5471
5472 priv->ResetProgress = RESET_TYPE_NORESET;
5473 priv->reset_count++;
5474
5475 priv->bForcedSilentReset =false;
5476 priv->bResetInProgress = false;
5477
5478 // For test --> force write UFWP.
5479 write_nic_byte(dev, UFWP, 1);
5480 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
5481#endif
5482 }
5483}
5484
5485void CAM_read_entry(
5486 struct net_device *dev,
5487 u32 iIndex
5488)
5489{
5490 u32 target_command=0;
5491 u32 target_content=0;
5492 u8 entry_i=0;
5493 u32 ulStatus;
5494 s32 i=100;
5495// printk("=======>start read CAM\n");
5496 for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
5497 {
5498 // polling bit, and No Write enable, and address
5499 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
5500 target_command= target_command | BIT31;
5501
5502 //Check polling bit is clear
5503// mdelay(1);
5504#if 1
5505 while((i--)>=0)
5506 {
5507 ulStatus = read_nic_dword(dev, RWCAM);
5508 if(ulStatus & BIT31){
5509 continue;
5510 }
5511 else{
5512 break;
5513 }
5514 }
5515#endif
5516 write_nic_dword(dev, RWCAM, target_command);
5517 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
5518 // printk("CAM_read_entry(): WRITE A0: %lx \n",target_command);
5519 target_content = read_nic_dword(dev, RCAMO);
5520 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
5521 // printk("CAM_read_entry(): WRITE A8: %lx \n",target_content);
5522 }
5523 printk("\n");
5524}
5525
5526void rtl819x_update_rxcounts(
5527 struct r8192_priv *priv,
5528 u32* TotalRxBcnNum,
5529 u32* TotalRxDataNum
5530)
5531{
5532 u16 SlotIndex;
5533 u8 i;
5534
5535 *TotalRxBcnNum = 0;
5536 *TotalRxDataNum = 0;
5537
5538 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
5539 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
5540 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
5541 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
5542 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
5543 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
5544 }
5545}
5546
5f53d8ca
JC		 5547extern void rtl819x_watchdog_wqcallback(struct work_struct *work)
5548{
5549 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5550 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
5551 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 5552 struct ieee80211_device* ieee = priv->ieee80211;
5553 RESET_TYPE ResetType = RESET_TYPE_NORESET;
5554 static u8 check_reset_cnt=0;
5555 bool bBusyTraffic = false;
5556
5557 if(!priv->up)
5558 return;
5559 hal_dm_watchdog(dev);
5560
5561 {//to get busy traffic condition
5562 if(ieee->state == IEEE80211_LINKED)
5563 {
5564 //windows mod 666 to 100.
5565 //if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
5566 // ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
5567 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
5568 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
5569 bBusyTraffic = true;
5570 }
5571 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5572 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5573 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5574 }
5575 }
5576 //added by amy for AP roaming
5577 {
5578 if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA)
5579 {
5580 u32 TotalRxBcnNum = 0;
5581 u32 TotalRxDataNum = 0;
5582
5583 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
5584 if((TotalRxBcnNum+TotalRxDataNum) == 0)
5585 {
5586 #ifdef TODO
5587 if(rfState == eRfOff)
5588 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
5589 #endif
5590 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
5591 // Dot11d_Reset(dev);
5592 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5593 notify_wx_assoc_event(priv->ieee80211);
5594 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
5595 ieee->is_roaming = true;
5596 priv->ieee80211->link_change(dev);
5f53d8ca 5597 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5f53d8ca
JC		 5598 }
5599 }
5600 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0;
5601 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0;
5602 }
5603// CAM_read_entry(dev,4);
5604 //check if reset the driver
5605 if(check_reset_cnt++ >= 3 && !ieee->is_roaming)
5606 {
5607 ResetType = rtl819x_ifcheck_resetornot(dev);
5608 check_reset_cnt = 3;
5609 //DbgPrint("Start to check silent reset\n");
5610 }
5611 // RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5612#if 1
5613 if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET &&
5614 (priv->bForcedSilentReset ||
5615 (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo
5616 {
5617 RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5618 rtl819x_ifsilentreset(dev);
5619 }
5620#endif
5621 priv->force_reset = false;
5622 priv->bForcedSilentReset = false;
5623 priv->bResetInProgress = false;
5624 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
5625
5626}
5627
5628void watch_dog_timer_callback(unsigned long data)
5629{
5630 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
5631 //printk("===============>watch_dog timer\n");
5f53d8ca 5632 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
5f53d8ca 5633 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
5f53d8ca
JC		 5634}
5635int _rtl8192_up(struct net_device *dev)
5636{
5637 struct r8192_priv *priv = ieee80211_priv(dev);
5638 //int i;
5639 int init_status = 0;
5640 priv->up=1;
5641 priv->ieee80211->ieee_up=1;
5642 RT_TRACE(COMP_INIT, "Bringing up iface");
5643 init_status = priv->ops->rtl819x_adapter_start(dev);
5644 if(!init_status)
5645 {
5646 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n", __FUNCTION__);
5647 priv->up=priv->ieee80211->ieee_up = 0;
5648 return -EAGAIN;
5649 }
5650 RT_TRACE(COMP_INIT, "start adapter finished\n");
5651 rtl8192_rx_enable(dev);
5652// rtl8192_tx_enable(dev);
5653 if(priv->ieee80211->state != IEEE80211_LINKED)
5654 ieee80211_softmac_start_protocol(priv->ieee80211);
5655 ieee80211_reset_queue(priv->ieee80211);
5656 watch_dog_timer_callback((unsigned long) dev);
5657 if(!netif_queue_stopped(dev))
5658 netif_start_queue(dev);
5659 else
5660 netif_wake_queue(dev);
5661
5662 /*
5663 * Make sure that drop_unencrypted is initialized as "0"
5664 * No packets will be sent in non-security mode if we had set drop_unencrypted.
5665 * ex, After kill wpa_supplicant process, make the driver up again.
5666 * drop_unencrypted remains as "1", which is set by wpa_supplicant. 2008/12/04.john
5667 */
5668 priv->ieee80211->drop_unencrypted = 0;
5669
5670 return 0;
5671}
5672
5673
5674int rtl8192_open(struct net_device *dev)
5675{
5676 struct r8192_priv *priv = ieee80211_priv(dev);
5677 int ret;
5678 down(&priv->wx_sem);
5679 ret = rtl8192_up(dev);
5680 up(&priv->wx_sem);
5681 return ret;
5682
5683}
5684
5685
5686int rtl8192_up(struct net_device *dev)
5687{
5688 struct r8192_priv *priv = ieee80211_priv(dev);
5689
5690 if (priv->up == 1) return -1;
5691
5692 return _rtl8192_up(dev);
5693}
5694
5695
5696int rtl8192_close(struct net_device *dev)
5697{
5698 struct r8192_priv *priv = ieee80211_priv(dev);
5699 int ret;
5700
5701 down(&priv->wx_sem);
5702
5703 ret = rtl8192_down(dev);
5704
5705 up(&priv->wx_sem);
5706
5707 return ret;
5708
5709}
5710
5711int rtl8192_down(struct net_device *dev)
5712{
5713 struct r8192_priv *priv = ieee80211_priv(dev);
5714 int i;
5715
5716 if (priv->up == 0) return -1;
5717
5718 priv->up=0;
5719 priv->ieee80211->ieee_up = 0;
5720 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
5721/* FIXME */
5722 if (!netif_queue_stopped(dev))
5723 netif_stop_queue(dev);
5724
5725 rtl8192_rtx_disable(dev);
5726 //rtl8192_irq_disable(dev);
5727
5728 /* Tx related queue release */
5729 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5730 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
5731 }
5732 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5733 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
5734 }
5735
5736 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5737 skb_queue_purge(&priv->ieee80211->skb_drv_aggQ [i]);
5738 }
5739
5740 //as cancel_delayed_work will del work->timer, so if work is not definedas struct delayed_work, it will corrupt
5741// flush_scheduled_work();
5742 rtl8192_cancel_deferred_work(priv);
5743 deinit_hal_dm(dev);
5744 del_timer_sync(&priv->watch_dog_timer);
5745
5746
5747 ieee80211_softmac_stop_protocol(priv->ieee80211);
5748 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
5749 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
5750
5751 return 0;
5752}
5753
5754
5755void rtl8192_commit(struct net_device *dev)
5756{
5757 struct r8192_priv *priv = ieee80211_priv(dev);
5758 int reset_status = 0;
5759 //u8 reset_times = 0;
5760 if (priv->up == 0) return ;
5761 priv->up = 0;
5762
5763 rtl8192_cancel_deferred_work(priv);
5764 del_timer_sync(&priv->watch_dog_timer);
5765 //cancel_delayed_work(&priv->SwChnlWorkItem);
5766
5767 ieee80211_softmac_stop_protocol(priv->ieee80211);
5768
5769 //rtl8192_irq_disable(dev);
5770 rtl8192_rtx_disable(dev);
5771 reset_status = _rtl8192_up(dev);
5772
5773}
5774
5775/*
5776void rtl8192_restart(struct net_device *dev)
5777{
5778 struct r8192_priv *priv = ieee80211_priv(dev);
5779*/
5f53d8ca
JC		 5780void rtl8192_restart(struct work_struct *work)
5781{
5782 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
5783 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 5784
5785 down(&priv->wx_sem);
5786
5787 rtl8192_commit(dev);
5788
5789 up(&priv->wx_sem);
5790}
5791
5792static void r8192_set_multicast(struct net_device *dev)
5793{
5794 struct r8192_priv *priv = ieee80211_priv(dev);
5795 short promisc;
5796
5797 //down(&priv->wx_sem);
5798
5799 /* FIXME FIXME */
5800
5801 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5802
5803 if (promisc != priv->promisc)
5804 // rtl8192_commit(dev);
5805
5806 priv->promisc = promisc;
5807
5808 //schedule_work(&priv->reset_wq);
5809 //up(&priv->wx_sem);
5810}
5811
5812
5813int r8192_set_mac_adr(struct net_device *dev, void *mac)
5814{
5815 struct r8192_priv *priv = ieee80211_priv(dev);
5816 struct sockaddr *addr = mac;
5817
5818 down(&priv->wx_sem);
5819
5820 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5821
5f53d8ca 5822 schedule_work(&priv->reset_wq);
1ec9e48d 5823
5f53d8ca
JC		 5824 up(&priv->wx_sem);
5825
5826 return 0;
5827}
5828
5829/* based on ipw2200 driver */
5830int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5831{
5832 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5833 struct iwreq *wrq = (struct iwreq *)rq;
5834 int ret=-1;
5835 struct ieee80211_device *ieee = priv->ieee80211;
5836 u32 key[4];
5837 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
5838 u8 zero_addr[6] = {0};
5839 struct iw_point *p = &wrq->u.data;
5840 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
5841
5842 down(&priv->wx_sem);
5843
5844
5845 if (p->length < sizeof(struct ieee_param) || !p->pointer){
5846 ret = -EINVAL;
5847 goto out;
5848 }
5849
5850 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
5851 if (ipw == NULL){
5852 ret = -ENOMEM;
5853 goto out;
5854 }
5855 if (copy_from_user(ipw, p->pointer, p->length)) {
5856 kfree(ipw);
5857 ret = -EFAULT;
5858 goto out;
5859 }
5860
5861 switch (cmd) {
5862 case RTL_IOCTL_WPA_SUPPLICANT:
5863 //parse here for HW security
5864 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
5865 {
5866 if (ipw->u.crypt.set_tx)
5867 {
5868 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5869 ieee->pairwise_key_type = KEY_TYPE_CCMP;
5870 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5871 ieee->pairwise_key_type = KEY_TYPE_TKIP;
5872 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5873 {
5874 if (ipw->u.crypt.key_len == 13)
5875 ieee->pairwise_key_type = KEY_TYPE_WEP104;
5876 else if (ipw->u.crypt.key_len == 5)
5877 ieee->pairwise_key_type = KEY_TYPE_WEP40;
5878 }
5879 else
5880 ieee->pairwise_key_type = KEY_TYPE_NA;
5881
5882 if (ieee->pairwise_key_type)
5883 {
5884 // FIXME:these two lines below just to fix ipw interface bug, that is, it will never set mode down to driver. So treat it as ADHOC mode, if no association procedure. WB. 2009.02.04
5885 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
5886 ieee->iw_mode = IW_MODE_ADHOC;
5887 memcpy((u8*)key, ipw->u.crypt.key, 16);
5888 EnableHWSecurityConfig8192(dev);
5889 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
5890 //added by WB.
5891 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5892 if (ieee->iw_mode == IW_MODE_ADHOC)
5893 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5894 }
5895 }
5896 else //if (ipw->u.crypt.idx) //group key use idx > 0
5897 {
5898 memcpy((u8*)key, ipw->u.crypt.key, 16);
5899 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5900 ieee->group_key_type= KEY_TYPE_CCMP;
5901 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5902 ieee->group_key_type = KEY_TYPE_TKIP;
5903 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5904 {
5905 if (ipw->u.crypt.key_len == 13)
5906 ieee->group_key_type = KEY_TYPE_WEP104;
5907 else if (ipw->u.crypt.key_len == 5)
5908 ieee->group_key_type = KEY_TYPE_WEP40;
5909 }
5910 else
5911 ieee->group_key_type = KEY_TYPE_NA;
5912
5913 if (ieee->group_key_type)
5914 {
5915 setKey( dev,
5916 ipw->u.crypt.idx,
5917 ipw->u.crypt.idx, //KeyIndex
5918 ieee->group_key_type, //KeyType
5919 broadcast_addr, //MacAddr
5920 0, //DefaultKey
5921 key); //KeyContent
5922 }
5923 }
5924 }
5925#ifdef JOHN_HWSEC_DEBUG
5926 //john's test 0711
5927 printk("@@ wrq->u pointer = ");
5928 for(i=0;i<wrq->u.data.length;i++){
5929 if(i%10==0) printk("\n");
5930 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5931 }
5932 printk("\n");
5933#endif /*JOHN_HWSEC_DEBUG*/
5934 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5935 break;
5936
5937 default:
5938 ret = -EOPNOTSUPP;
5939 break;
5940 }
5941 kfree(ipw);
5942 ipw = NULL;
5943out:
5944 up(&priv->wx_sem);
5945 return ret;
5946}
5947
5f53d8ca
JC		 5948u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
5949{
5950
5951 u8 ret_rate = 0x02;
5952
5953 if( bFirstAMPDU )
5954 {
5955 if(!bIsHT)
5956 {
5957 switch(rate)
5958 {
5959
5960 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5961 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5962 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5963 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5964 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5965 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5966 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5967 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5968 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5969 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5970 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5971 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5972
5973 default:
5974 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5975 break;
5976 }
5977 }
5978 else
5979 {
5980 switch(rate)
5981 {
5982
5983 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5984 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
5985 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
5986 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
5987 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
5988 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
5989 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
5990 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
5991 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
5992 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
5993 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
5994 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
5995 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
5996 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
5997 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
5998 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
5999 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6000
6001 default:
6002 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6003 break;
6004 }
6005
6006 }
6007 }
6008 else
6009 {
6010 switch(rate)
6011 {
6012
6013 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
6014 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
6015 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
6016 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
6017 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
6018 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
6019 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
6020 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
6021 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
6022 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
6023 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
6024 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
6025 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
6026 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
6027 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
6028 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
6029 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
6030 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
6031 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
6032 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
6033 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
6034 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
6035 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
6036 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
6037 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
6038 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
6039 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6040 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6041 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6042
6043 default:
6044 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6045 break;
6046 }
6047 }
6048 return ret_rate;
6049}
5f53d8ca
JC		 6050
6051u8 HwRateToMRate90(bool bIsHT, u8 rate)
6052{
6053 u8 ret_rate = 0xff;
6054
6055 if(!bIsHT) {
6056 switch(rate) {
6057 case DESC90_RATE1M: ret_rate = MGN_1M; break;
6058 case DESC90_RATE2M: ret_rate = MGN_2M; break;
6059 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
6060 case DESC90_RATE11M: ret_rate = MGN_11M; break;
6061 case DESC90_RATE6M: ret_rate = MGN_6M; break;
6062 case DESC90_RATE9M: ret_rate = MGN_9M; break;
6063 case DESC90_RATE12M: ret_rate = MGN_12M; break;
6064 case DESC90_RATE18M: ret_rate = MGN_18M; break;
6065 case DESC90_RATE24M: ret_rate = MGN_24M; break;
6066 case DESC90_RATE36M: ret_rate = MGN_36M; break;
6067 case DESC90_RATE48M: ret_rate = MGN_48M; break;
6068 case DESC90_RATE54M: ret_rate = MGN_54M; break;
6069
6070 default:
6071 ret_rate = 0xff;
6072 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
6073 break;
6074 }
6075
6076 } else {
6077 switch(rate) {
6078 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
6079 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
6080 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
6081 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
6082 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
6083 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
6084 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
6085 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
6086 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
6087 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
6088 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
6089 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
6090 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
6091 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
6092 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
6093 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
6094 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
6095
6096 default:
6097 ret_rate = 0xff;
6098 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
6099 break;
6100 }
6101 }
6102
6103 return ret_rate;
6104}
6105
6106/**
6107 * Function: UpdateRxPktTimeStamp
6108 * Overview: Recored down the TSF time stamp when receiving a packet
6109 *
6110 * Input:
6111 * PADAPTER Adapter
6112 * PRT_RFD pRfd,
6113 *
6114 * Output:
6115 * PRT_RFD pRfd
6116 * (pRfd->Status.TimeStampHigh is updated)
6117 * (pRfd->Status.TimeStampLow is updated)
6118 * Return:
6119 * None
6120 */
6121void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
6122{
6123 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6124
6125 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
6126 stats->mac_time[0] = priv->LastRxDescTSFLow;
6127 stats->mac_time[1] = priv->LastRxDescTSFHigh;
6128 } else {
6129 priv->LastRxDescTSFLow = stats->mac_time[0];
6130 priv->LastRxDescTSFHigh = stats->mac_time[1];
6131 }
6132}
6133
6134//by amy 080606
6135
6136long rtl819x_translate_todbm(u8 signal_strength_index )// 0-100 index.
6137{
6138 long signal_power; // in dBm.
6139
6140 // Translate to dBm (x=0.5y-95).
6141 signal_power = (long)((signal_strength_index + 1) >> 1);
6142 signal_power -= 95;
6143
6144 return signal_power;
6145}
6146
6147
6148/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
6149 be a local static. Otherwise, it may increase when we return from S3/S4. The
6150 value will be kept in memory or disk. We must delcare the value in adapter
6151 and it will be reinitialized when return from S3/S4. */
6152void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
6153{
6154 bool bcheck = false;
6155 u8 rfpath;
6156 u32 nspatial_stream, tmp_val;
6157 //u8 i;
6158 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
6159 static u32 slide_evm_index=0, slide_evm_statistics=0;
6160 static u32 last_rssi=0, last_evm=0;
6161
6162 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
6163 static u32 last_beacon_adc_pwdb=0;
6164
6165 struct ieee80211_hdr_3addr *hdr;
6166 u16 sc ;
6167 unsigned int frag,seq;
6168 hdr = (struct ieee80211_hdr_3addr *)buffer;
6169 sc = le16_to_cpu(hdr->seq_ctl);
6170 frag = WLAN_GET_SEQ_FRAG(sc);
6171 seq = WLAN_GET_SEQ_SEQ(sc);
6172 //cosa add 04292008 to record the sequence number
6173 pcurrent_stats->Seq_Num = seq;
6174 //
6175 // Check whether we should take the previous packet into accounting
6176 //
6177 if(!pprevious_stats->bIsAMPDU)
6178 {
6179 // if previous packet is not aggregated packet
6180 bcheck = true;
6181 }else
6182 {
5f53d8ca
JC		 6183 }
6184
6185
6186 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
6187 {
6188 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
6189 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
6190 priv->stats.slide_rssi_total -= last_rssi;
6191 }
6192 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
6193
6194 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
6195 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
6196 slide_rssi_index = 0;
6197
6198 // <1> Showed on UI for user, in dbm
6199 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
6200 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
6201 pcurrent_stats->rssi = priv->stats.signal_strength;
6202 //
6203 // If the previous packet does not match the criteria, neglect it
6204 //
6205 if(!pprevious_stats->bPacketMatchBSSID)
6206 {
6207 if(!pprevious_stats->bToSelfBA)
6208 return;
6209 }
6210
6211 if(!bcheck)
6212 return;
6213
6214
6215 //rtl8190_process_cck_rxpathsel(priv,pprevious_stats);//only rtl8190 supported
6216
6217 //
6218 // Check RSSI
6219 //
6220 priv->stats.num_process_phyinfo++;
6221
6222 /* record the general signal strength to the sliding window. */
6223
6224
6225 // <2> Showed on UI for engineering
6226 // hardware does not provide rssi information for each rf path in CCK
6227 if(!pprevious_stats->bIsCCK && (pprevious_stats->bPacketToSelf || pprevious_stats->bToSelfBA))
6228 {
6229 for (rfpath = RF90_PATH_A; rfpath < priv->NumTotalRFPath; rfpath++)
6230 {
6231 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
6232 continue;
6233
6234 //Fixed by Jacken 2008-03-20
6235 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
6236 {
6237 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
6238 //DbgPrint("MIMO RSSI initialize \n");
6239 }
6240 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
6241 {
6242 priv->stats.rx_rssi_percentage[rfpath] =
6243 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6244 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6245 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
6246 }
6247 else
6248 {
6249 priv->stats.rx_rssi_percentage[rfpath] =
6250 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6251 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6252 }
6253 RT_TRACE(COMP_DBG,"priv->stats.rx_rssi_percentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
6254 }
6255 }
6256
6257
6258 //
6259 // Check PWDB.
6260 //
6261 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6262 pprevious_stats->bIsCCK? "CCK": "OFDM",
6263 pprevious_stats->RxPWDBAll);
6264
6265 if(pprevious_stats->bPacketBeacon)
6266 {
6267/* record the beacon pwdb to the sliding window. */
6268 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6269 {
6270 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
6271 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
6272 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
6273 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
6274 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
6275 }
6276 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
6277 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
6278 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
6279 slide_beacon_adc_pwdb_index++;
6280 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6281 slide_beacon_adc_pwdb_index = 0;
6282 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
6283 if(pprevious_stats->RxPWDBAll >= 3)
6284 pprevious_stats->RxPWDBAll -= 3;
6285 }
6286
6287 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6288 pprevious_stats->bIsCCK? "CCK": "OFDM",
6289 pprevious_stats->RxPWDBAll);
6290
6291
6292 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6293 {
6294 if(priv->undecorated_smoothed_pwdb < 0) // initialize
6295 {
6296 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
6297 //DbgPrint("First pwdb initialize \n");
6298 }
6299#if 1
6300 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
6301 {
6302 priv->undecorated_smoothed_pwdb =
6303 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6304 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6305 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
6306 }
6307 else
6308 {
6309 priv->undecorated_smoothed_pwdb =
6310 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6311 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6312 }
6313#else
6314 //Fixed by Jacken 2008-03-20
6315 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
6316 {
6317 pHalData->UndecoratedSmoothedPWDB =
6318 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6319 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
6320 }
6321 else
6322 {
6323 pHalData->UndecoratedSmoothedPWDB =
6324 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6325 }
6326#endif
6327
6328 }
6329
6330 //
6331 // Check EVM
6332 //
6333 /* record the general EVM to the sliding window. */
6334 if(pprevious_stats->SignalQuality == 0)
6335 {
6336 }
6337 else
6338 {
6339 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
6340 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
6341 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
6342 last_evm = priv->stats.slide_evm[slide_evm_index];
6343 priv->stats.slide_evm_total -= last_evm;
6344 }
6345
6346 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
6347
6348 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
6349 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
6350 slide_evm_index = 0;
6351
6352 // <1> Showed on UI for user, in percentage.
6353 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
6354 priv->stats.signal_quality = tmp_val;
6355 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
6356 priv->stats.last_signal_strength_inpercent = tmp_val;
6357 }
6358
6359 // <2> Showed on UI for engineering
6360 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6361 {
6362 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
6363 {
6364 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
6365 {
6366 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
6367 {
6368 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
6369 }
6370 priv->stats.rx_evm_percentage[nspatial_stream] =
6371 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
6372 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
6373 }
6374 }
6375 }
6376 }
6377
6378
6379}
6380
6381/*-----------------------------------------------------------------------------
6382 * Function: rtl819x_query_rxpwrpercentage()
6383 *
6384 * Overview:
6385 *
6386 * Input: char antpower
6387 *
6388 * Output: NONE
6389 *
6390 * Return: 0-100 percentage
6391 *
6392 * Revised History:
6393 * When Who Remark
6394 * 05/26/2008 amy Create Version 0 porting from windows code.
6395 *
6396 *---------------------------------------------------------------------------*/
6397static u8 rtl819x_query_rxpwrpercentage(
6398 char antpower
6399 )
6400{
6401 if ((antpower <= -100) || (antpower >= 20))
6402 {
6403 return 0;
6404 }
6405 else if (antpower >= 0)
6406 {
6407 return 100;
6408 }
6409 else
6410 {
6411 return (100+antpower);
6412 }
6413
6414} /* QueryRxPwrPercentage */
6415
6416static u8
6417rtl819x_evm_dbtopercentage(
6418 char value
6419 )
6420{
6421 char ret_val;
6422
6423 ret_val = value;
6424
6425 if(ret_val >= 0)
6426 ret_val = 0;
6427 if(ret_val <= -33)
6428 ret_val = -33;
6429 ret_val = 0 - ret_val;
6430 ret_val*=3;
6431 if(ret_val == 99)
6432 ret_val = 100;
6433 return(ret_val);
6434}
6435//
6436// Description:
6437// We want good-looking for signal strength/quality
6438// 2007/7/19 01:09, by cosa.
6439//
6440long
6441rtl819x_signal_scale_mapping(
6442 long currsig
6443 )
6444{
6445 long retsig;
6446
6447 // Step 1. Scale mapping.
6448 if(currsig >= 61 && currsig <= 100)
6449 {
6450 retsig = 90 + ((currsig - 60) / 4);
6451 }
6452 else if(currsig >= 41 && currsig <= 60)
6453 {
6454 retsig = 78 + ((currsig - 40) / 2);
6455 }
6456 else if(currsig >= 31 && currsig <= 40)
6457 {
6458 retsig = 66 + (currsig - 30);
6459 }
6460 else if(currsig >= 21 && currsig <= 30)
6461 {
6462 retsig = 54 + (currsig - 20);
6463 }
6464 else if(currsig >= 5 && currsig <= 20)
6465 {
6466 retsig = 42 + (((currsig - 5) * 2) / 3);
6467 }
6468 else if(currsig == 4)
6469 {
6470 retsig = 36;
6471 }
6472 else if(currsig == 3)
6473 {
6474 retsig = 27;
6475 }
6476 else if(currsig == 2)
6477 {
6478 retsig = 18;
6479 }
6480 else if(currsig == 1)
6481 {
6482 retsig = 9;
6483 }
6484 else
6485 {
6486 retsig = currsig;
6487 }
6488
6489 return retsig;
6490}
6491
5f53d8ca
JC		 6492/*-----------------------------------------------------------------------------
6493 * Function: QueryRxPhyStatus8192S()
6494 *
6495 * Overview:
6496 *
6497 * Input: NONE
6498 *
6499 * Output: NONE
6500 *
6501 * Return: NONE
6502 *
6503 * Revised History:
6504 * When Who Remark
6505 * 06/01/2007 MHC Create Version 0.
6506 * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
6507 * descriptor definition.
6508 * 07/04/2007 MHC According to Jerry and Bryant's document. We read
6509 * ir_isolation and ext_lna for RF's init value and use
6510 * to compensate RSSI after receiving packets.
6511 * 09/10/2008 MHC Modify name and PHY status field for 92SE.
6512 * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
6513 *
6514 *---------------------------------------------------------------------------*/
6515static void rtl8192SU_query_rxphystatus(
6516 struct r8192_priv * priv,
6517 struct ieee80211_rx_stats * pstats,
6518 rx_desc_819x_usb *pDesc,
6519 rx_drvinfo_819x_usb * pdrvinfo,
6520 struct ieee80211_rx_stats * precord_stats,
6521 bool bpacket_match_bssid,
6522 bool bpacket_toself,
6523 bool bPacketBeacon,
6524 bool bToSelfBA
6525 )
6526{
6527 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
6528 //PHY_STS_CCK_8192S_T *pCck_buf;
6529 phy_sts_cck_819xusb_t * pcck_buf;
6530 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
6531 //u8 *prxpkt;
6532 //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
6533 u8 i, max_spatial_stream, rxsc_sgien_exflg;
6534 char rx_pwr[4], rx_pwr_all=0;
6535 //long rx_avg_pwr = 0;
6536 //char rx_snrX, rx_evmX;
6537 u8 evm, pwdb_all;
6538 u32 RSSI, total_rssi=0;//, total_evm=0;
6539// long signal_strength_index = 0;
6540 u8 is_cck_rate=0;
6541 u8 rf_rx_num = 0;
6542
6543
6544
6545 priv->stats.numqry_phystatus++;
6546
6547 is_cck_rate = rx_hal_is_cck_rate(pDesc);
6548
6549 // Record it for next packet processing
6550 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
6551 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
6552 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
6553 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
6554 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
6555 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
6556
5f53d8ca
JC		 6557
6558 pstats->RxMIMOSignalQuality[0] = -1;
6559 pstats->RxMIMOSignalQuality[1] = -1;
6560 precord_stats->RxMIMOSignalQuality[0] = -1;
6561 precord_stats->RxMIMOSignalQuality[1] = -1;
6562
6563 if(is_cck_rate)
6564 {
6565 u8 report;//, tmp_pwdb;
6566 //char cck_adc_pwdb[4];
6567
6568 // CCK Driver info Structure is not the same as OFDM packet.
6569 pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
6570
6571 //
6572 // (1)Hardware does not provide RSSI for CCK
6573 //
6574
6575 //
6576 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6577 //
6578
6579 priv->stats.numqry_phystatusCCK++;
6580
6581 if(!priv->bCckHighPower)
6582 {
6583 report = pcck_buf->cck_agc_rpt & 0xc0;
6584 report = report>>6;
6585 switch(report)
6586 {
6587 //Fixed by Jacken from Bryant 2008-03-20
6588 //Original value is -38 , -26 , -14 , -2
6589 //Fixed value is -35 , -23 , -11 , 6
6590 case 0x3:
6591 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
6592 break;
6593 case 0x2:
6594 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
6595 break;
6596 case 0x1:
6597 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
6598 break;
6599 case 0x0:
6600 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
6601 break;
6602 }
6603 }
6604 else
6605 {
6606 report = pdrvinfo->cfosho[0] & 0x60;
6607 report = report>>5;
6608 switch(report)
6609 {
6610 case 0x3:
6611 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6612 break;
6613 case 0x2:
6614 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
6615 break;
6616 case 0x1:
6617 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6618 break;
6619 case 0x0:
6620 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
6621 break;
6622 }
6623 }
6624
6625 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
6626 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6627 //pstats->RecvSignalPower = pwdb_all;
6628 pstats->RecvSignalPower = rx_pwr_all;
6629
6630 //
6631 // (3) Get Signal Quality (EVM)
6632 //
6633 //if(bpacket_match_bssid)
6634 {
6635 u8 sq;
6636
6637 if(pstats->RxPWDBAll > 40)
6638 {
6639 sq = 100;
6640 }else
6641 {
6642 sq = pcck_buf->sq_rpt;
6643
6644 if(pcck_buf->sq_rpt > 64)
6645 sq = 0;
6646 else if (pcck_buf->sq_rpt < 20)
6647 sq = 100;
6648 else
6649 sq = ((64-sq) * 100) / 44;
6650 }
6651 pstats->SignalQuality = precord_stats->SignalQuality = sq;
6652 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
6653 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
6654 }
6655 }
6656 else
6657 {
6658 priv->stats.numqry_phystatusHT++;
6659
6660 // 2008/09/19 MH For 92S debug, RX RF path always enable!!
6661 priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
6662
6663 //
6664 // (1)Get RSSI for HT rate
6665 //
6666 //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
6667 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
6668 {
6669 // 2008/01/30 MH we will judge RF RX path now.
6670 if (priv->brfpath_rxenable[i])
6671 rf_rx_num++;
6672 //else
6673 // continue;
6674
6675 //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
6676 // continue;
6677
6678 //Fixed by Jacken from Bryant 2008-03-20
6679 //Original value is 106
6680 //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
6681 rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
6682
6683 /* Translate DBM to percentage. */
6684 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
6685 total_rssi += RSSI;
6686 RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
6687
6688 //Get Rx snr value in DB
6689 //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
6690 //rx_snrX = (char)(tmp_rxsnr);
6691 //rx_snrX /= 2;
6692 //priv->stats.rxSNRdB[i] = (long)rx_snrX;
6693 priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
6694
6695 /* Translate DBM to percentage. */
6696 //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
6697 //total_rssi += RSSI;
6698
6699 /* Record Signal Strength for next packet */
6700 //if(bpacket_match_bssid)
6701 {
6702 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
6703 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
6704 }
6705 }
6706
6707
6708 //
6709 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6710 //
6711 //Fixed by Jacken from Bryant 2008-03-20
6712 //Original value is 106
6713 //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
6714 rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
6715 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
6716
6717 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6718 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
6719 pstats->RecvSignalPower = rx_pwr_all;
6720
6721 //
6722 // (3)EVM of HT rate
6723 //
6724 //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
6725 // pdrvinfo->RxRate<=DESC90_RATEMCS15)
6726 if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
6727 pDesc->RxMCS<=DESC92S_RATEMCS15)
6728 max_spatial_stream = 2; //both spatial stream make sense
6729 else
6730 max_spatial_stream = 1; //only spatial stream 1 makes sense
6731
6732 for(i=0; i<max_spatial_stream; i++)
6733 {
6734 //tmp_rxevm = pofdm_buf->rxevm_X[i];
6735 //rx_evmX = (char)(tmp_rxevm);
6736
6737 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
6738 // fill most significant bit to "zero" when doing shifting operation which may change a negative
6739 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
6740 //rx_evmX /= 2; //dbm
6741
6742 //evm = rtl819x_evm_dbtopercentage(rx_evmX);
6743 evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
6744 RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
5f53d8ca
JC		 6745
6746 //if(bpacket_match_bssid)
6747 {
6748 if(i==0) // Fill value in RFD, Get the first spatial stream only
6749 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
6750 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
6751 }
6752 }
6753
6754
6755 /* record rx statistics for debug */
6756 //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
6757 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
6758 //if(pdrvinfo->BW) //40M channel
6759 if(pDesc->BW) //40M channel
6760 priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
6761 else //20M channel
6762 priv->stats.received_bwtype[0]++;
6763 }
6764
6765 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
6766 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
6767 if(is_cck_rate)
6768 {
6769 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
6770
6771 }
6772 else
6773 {
6774 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
6775 // We can judge RX path number now.
6776 if (rf_rx_num != 0)
6777 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
6778 }
6779}/* QueryRxPhyStatus8192S */
0f29f587
BZ		 6780
6781void
6782rtl8192_record_rxdesc_forlateruse(
6783 struct ieee80211_rx_stats * psrc_stats,
6784 struct ieee80211_rx_stats * ptarget_stats
6785)
6786{
6787 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
6788 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
6789 ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
6790}
6791
6792static void rtl8192SU_query_rxphystatus(
5f53d8ca
JC		 6793 struct r8192_priv * priv,
6794 struct ieee80211_rx_stats * pstats,
0f29f587 6795 rx_desc_819x_usb *pDesc,
5f53d8ca
JC		 6796 rx_drvinfo_819x_usb * pdrvinfo,
6797 struct ieee80211_rx_stats * precord_stats,
6798 bool bpacket_match_bssid,
6799 bool bpacket_toself,
6800 bool bPacketBeacon,
6801 bool bToSelfBA
0f29f587
BZ		 6802 );
6803void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
6804 struct ieee80211_rx_stats * pstats,
6805 rx_desc_819x_usb *pDesc,
6806 rx_drvinfo_819x_usb *pdrvinfo)
5f53d8ca 6807{
0f29f587
BZ		 6808 // TODO: We must only check packet for current MAC address. Not finish
6809 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6810 struct net_device *dev=info->dev;
6811 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6812 bool bpacket_match_bssid, bpacket_toself;
6813 bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
6814 static struct ieee80211_rx_stats previous_stats;
6815 struct ieee80211_hdr_3addr *hdr;//by amy
6816 u16 fc,type;
5f53d8ca 6817
0f29f587 6818 // Get Signal Quality for only RX data queue (but not command queue)
5f53d8ca 6819
0f29f587
BZ		 6820 u8* tmp_buf;
6821 //u16 tmp_buf_len = 0;
6822 u8 *praddr;
5f53d8ca 6823
0f29f587
BZ		 6824 /* Get MAC frame start address. */
6825 tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
5f53d8ca 6826
0f29f587
BZ		 6827 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
6828 fc = le16_to_cpu(hdr->frame_ctl);
6829 type = WLAN_FC_GET_TYPE(fc);
6830 praddr = hdr->addr1;
5f53d8ca 6831
0f29f587
BZ		 6832 /* Check if the received packet is acceptabe. */
6833 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
6834 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
6835 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
6836 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
5f53d8ca
JC		 6837
6838#if 1//cosa
6839 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
6840 {
6841 bPacketBeacon = true;
6842 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6843 }
6844 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
6845 {
6846 if((eqMacAddr(praddr,dev->dev_addr)))
6847 bToSelfBA = true;
6848 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6849 }
6850
6851#endif
6852
6853
6854 if(bpacket_match_bssid)
6855 {
6856 priv->stats.numpacket_matchbssid++;
6857 }
6858 if(bpacket_toself){
6859 priv->stats.numpacket_toself++;
6860 }
6861 //
6862 // Process PHY information for previous packet (RSSI/PWDB/EVM)
6863 //
6864 // Because phy information is contained in the last packet of AMPDU only, so driver
6865 // should process phy information of previous packet
6866 rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
6867 rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
6868 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
6869
6870}
5f53d8ca
JC		 6871
6872/**
6873* Function: UpdateReceivedRateHistogramStatistics
6874* Overview: Recored down the received data rate
6875*
6876* Input:
6877* struct net_device *dev
6878* struct ieee80211_rx_stats *stats
6879*
6880* Output:
6881*
6882* (priv->stats.ReceivedRateHistogram[] is updated)
6883* Return:
6884* None
6885*/
6886void
6887UpdateReceivedRateHistogramStatistics8190(
6888 struct net_device *dev,
6889 struct ieee80211_rx_stats *stats
6890 )
6891{
6892 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6893 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
6894 u32 rateIndex;
6895 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
6896
6897
6898 if(stats->bCRC)
6899 rcvType = 2;
6900 else if(stats->bICV)
6901 rcvType = 3;
6902
6903 if(stats->bShortPreamble)
6904 preamble_guardinterval = 1;// short
6905 else
6906 preamble_guardinterval = 0;// long
6907
6908 switch(stats->rate)
6909 {
6910 //
6911 // CCK rate
6912 //
6913 case MGN_1M: rateIndex = 0; break;
6914 case MGN_2M: rateIndex = 1; break;
6915 case MGN_5_5M: rateIndex = 2; break;
6916 case MGN_11M: rateIndex = 3; break;
6917 //
6918 // Legacy OFDM rate
6919 //
6920 case MGN_6M: rateIndex = 4; break;
6921 case MGN_9M: rateIndex = 5; break;
6922 case MGN_12M: rateIndex = 6; break;
6923 case MGN_18M: rateIndex = 7; break;
6924 case MGN_24M: rateIndex = 8; break;
6925 case MGN_36M: rateIndex = 9; break;
6926 case MGN_48M: rateIndex = 10; break;
6927 case MGN_54M: rateIndex = 11; break;
6928 //
6929 // 11n High throughput rate
6930 //
6931 case MGN_MCS0: rateIndex = 12; break;
6932 case MGN_MCS1: rateIndex = 13; break;
6933 case MGN_MCS2: rateIndex = 14; break;
6934 case MGN_MCS3: rateIndex = 15; break;
6935 case MGN_MCS4: rateIndex = 16; break;
6936 case MGN_MCS5: rateIndex = 17; break;
6937 case MGN_MCS6: rateIndex = 18; break;
6938 case MGN_MCS7: rateIndex = 19; break;
6939 case MGN_MCS8: rateIndex = 20; break;
6940 case MGN_MCS9: rateIndex = 21; break;
6941 case MGN_MCS10: rateIndex = 22; break;
6942 case MGN_MCS11: rateIndex = 23; break;
6943 case MGN_MCS12: rateIndex = 24; break;
6944 case MGN_MCS13: rateIndex = 25; break;
6945 case MGN_MCS14: rateIndex = 26; break;
6946 case MGN_MCS15: rateIndex = 27; break;
6947 default: rateIndex = 28; break;
6948 }
6949 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6950 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6951 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6952}
6953
5f53d8ca
JC		 6954void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
6955{
6956 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6957 struct net_device *dev=info->dev;
6958 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6959 //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6960 rx_drvinfo_819x_usb *driver_info = NULL;
6961
6962 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
6963 //PHAL_DATA_8192SUSB pHalData = GET_HAL_DATA(Adapter);
6964 //pu1Byte pDesc = (pu1Byte)pDescIn;
6965 //PRX_DRIVER_INFO_8192S pDrvInfo;
6966
5f53d8ca
JC		 6967 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6968
6969 if(0)
6970 {
6971 int m = 0;
6972 printk("========================");
6973 for(m=0; m<skb->len; m++){
6974 if((m%32) == 0)
6975 printk("\n");
6976 printk("%2x ",((u8*)skb->data)[m]);
6977 }
6978 printk("\n========================\n");
6979
6980 }
6981
6982
6983 //
6984 //Get Rx Descriptor Raw Information
6985 //
6986 stats->Length = desc->Length ;
6987 stats->RxDrvInfoSize = desc->RxDrvInfoSize*RX_DRV_INFO_SIZE_UNIT;
6988 stats->RxBufShift = (desc->Shift)&0x03;
6989 stats->bICV = desc->ICV;
6990 stats->bCRC = desc->CRC32;
6991 stats->bHwError = stats->bCRC|stats->bICV;
6992 stats->Decrypted = !desc->SWDec;//RTL8190 set this bit to indicate that Hw does not decrypt packet
6993 stats->bIsAMPDU = (desc->AMSDU==1);
6994 stats->bFirstMPDU = (desc->PAGGR==1) && (desc->FAGGR==1);
6995 stats->bShortPreamble = desc->SPLCP;
6996 stats->RxIs40MHzPacket = (desc->BW==1);
6997 stats->TimeStampLow = desc->TSFL;
6998
6999 if((desc->FAGGR==1) || (desc->PAGGR==1))
7000 {// Rx A-MPDU
7001 RT_TRACE(COMP_RXDESC, "FirstAGGR = %d, PartAggr = %d\n", desc->FAGGR, desc->PAGGR);
7002 }
7003//YJ,test,090310
7004if(stats->bHwError)
7005{
7006 if(stats->bICV)
7007 printk("%s: Receive ICV error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
7008 if(stats->bCRC)
7009 printk("%s: Receive CRC error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
7010}
7011
7012 if(IS_UNDER_11N_AES_MODE(priv->ieee80211))
7013 {
7014 // Always received ICV error packets in AES mode.
7015 // This fixed HW later MIC write bug.
7016 if(stats->bICV && !stats->bCRC)
7017 {
7018 stats->bICV = FALSE;
7019 stats->bHwError = FALSE;
7020 }
7021 }
7022
7023 // Transform HwRate to MRate
7024 if(!stats->bHwError)
7025 //stats->DataRate = HwRateToMRate(
7026 // (BOOLEAN)GET_RX_DESC_RXHT(pDesc),
7027 // (u1Byte)GET_RX_DESC_RXMCS(pDesc),
7028 // (BOOLEAN)GET_RX_DESC_PAGGR(pDesc));
7029 stats->rate = rtl8192SU_HwRateToMRate(desc->RxHT, desc->RxMCS, desc->PAGGR);
7030 else
7031 stats->rate = MGN_1M;
7032
7033 //
7034 // Collect Rx rate/AMPDU/TSFL
7035 //
7036 //UpdateRxdRateHistogramStatistics8192S(Adapter, pRfd);
7037 //UpdateRxAMPDUHistogramStatistics8192S(Adapter, pRfd);
7038 //UpdateRxPktTimeStamp8192S(Adapter, pRfd);
7039 UpdateReceivedRateHistogramStatistics8190(dev, stats);
7040 //UpdateRxAMPDUHistogramStatistics8192S(dev, stats); //FIXLZM
7041 UpdateRxPktTimeStamp8190(dev, stats);
7042
7043 //
7044 // Get PHY Status and RSVD parts.
7045 // <Roger_Notes> It only appears on last aggregated packet.
7046 //
7047 if (desc->PHYStatus)
7048 {
7049 //driver_info = (rx_drvinfo_819x_usb *)(skb->data + RX_DESC_SIZE + stats->RxBufShift);
7050 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
7051 stats->RxBufShift);
7052 if(0)
7053 {
7054 int m = 0;
7055 printk("========================\n");
7056 printk("RX_DESC_SIZE:%d, RxBufShift:%d, RxDrvInfoSize:%d\n",
7057 RX_DESC_SIZE, stats->RxBufShift, stats->RxDrvInfoSize);
7058 for(m=0; m<32; m++){
7059 printk("%2x ",((u8*)driver_info)[m]);
7060 }
7061 printk("\n========================\n");
7062
7063 }
7064
7065 }
7066
7067 //YJ,add,090107
7068 skb_pull(skb, sizeof(rx_desc_819x_usb));
7069 //YJ,add,090107,end
7070
7071 //
7072 // Get Total offset of MPDU Frame Body
7073 //
7074 if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
7075 {
7076 stats->bShift = 1;
7077 //YJ,add,090107
7078 skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
7079 //YJ,add,090107,end
7080 }
7081
7082 //
7083 // Get PHY Status and RSVD parts.
7084 // <Roger_Notes> It only appears on last aggregated packet.
7085 //
7086 if (desc->PHYStatus)
7087 {
7088 rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
7089 }
7090}
5f53d8ca 7091
5f53d8ca
JC		 7092//
7093// Description:
7094// The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
7095// (1) QoS control : shift 2 bytes
7096// (2) Mesh Network : shift 1 or 3 bytes
7097// (3) RxDriverInfo occupies the front parts of Rx Packets buffer(shift units is in 8Bytes)
7098//
7099// It is because Lextra CPU used by 8186 or 865x series assert exception if the statrting address
7100// of IP header is not double word alignment.
7101// This features is supported in 818xb and 8190 only, but not 818x.
7102//
7103// parameter: PRT_RFD, Pointer of Reeceive frame descriptor which is initialized according to
7104// Rx Descriptor
7105// return value: unsigned int, number of total shifted bytes
7106//
7107// Notes: 2008/06/28, created by Roger
7108//
7109u32 GetRxPacketShiftBytes8192SU(struct ieee80211_rx_stats *Status, bool bIsRxAggrSubframe)
7110{
7111 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
7112
7113 return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize + Status->RxBufShift);
7114}
7115
7116void rtl8192SU_rx_nomal(struct sk_buff* skb)
7117{
7118 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7119 struct net_device *dev=info->dev;
7120 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7121 struct ieee80211_rx_stats stats = {
7122 .signal = 0,
7123 .noise = -98,
7124 .rate = 0,
7125 // .mac_time = jiffies,
7126 .freq = IEEE80211_24GHZ_BAND,
7127 };
7128 u32 rx_pkt_len = 0;
7129 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
7130 bool unicast_packet = false;
7131
5f53d8ca
JC		 7132 //printk("**********skb->len = %d\n", skb->len);
7133 /* 20 is for ps-poll */
7134 if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
7135
7136 /* first packet should not contain Rx aggregation header */
7137 rtl8192SU_query_rxdesc_status(skb, &stats, false);
7138 /* TODO */
7139
7140 /* hardware related info */
5f53d8ca
JC		 7141 priv->stats.rxoktotal++; //YJ,test,090108
7142
7143 /* Process the MPDU recevied */
7144 skb_trim(skb, skb->len - 4/*sCrcLng*/);//FIXLZM
7145
7146 rx_pkt_len = skb->len;
7147 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
7148 unicast_packet = false;
7149 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
7150 //TODO
7151 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
7152 //TODO
7153 }else {
7154 /* unicast packet */
7155 unicast_packet = true;
7156 }
7157
55c7d5fc 7158 if(!ieee80211_rtl_rx(priv->ieee80211,skb, &stats)) {
5f53d8ca
JC		 7159 dev_kfree_skb_any(skb);
7160 } else {
7161 // priv->stats.rxoktotal++; //YJ,test,090108
7162 if(unicast_packet) {
7163 priv->stats.rxbytesunicast += rx_pkt_len;
7164 }
7165 }
7166
7167 //up is firs pkt, follow is next and next
5f53d8ca
JC		 7168 }
7169 else
7170 {
7171 priv->stats.rxurberr++;
7172 printk("actual_length:%d\n", skb->len);
7173 dev_kfree_skb_any(skb);
7174 }
7175
7176}
5f53d8ca
JC		 7177
7178void
7179rtl819xusb_process_received_packet(
7180 struct net_device *dev,
7181 struct ieee80211_rx_stats *pstats
7182 )
7183{
7184// bool bfreerfd=false, bqueued=false;
7185 u8* frame;
7186 u16 frame_len=0;
7187 struct r8192_priv *priv = ieee80211_priv(dev);
7188// u8 index = 0;
7189// u8 TID = 0;
7190 //u16 seqnum = 0;
7191 //PRX_TS_RECORD pts = NULL;
7192
7193 // Get shifted bytes of Starting address of 802.11 header. 2006.09.28, by Emily
7194 //porting by amy 080508
7195 pstats->virtual_address += get_rxpacket_shiftbytes_819xusb(pstats);
7196 frame = pstats->virtual_address;
7197 frame_len = pstats->packetlength;
7198#ifdef TODO // by amy about HCT
7199 if(!Adapter->bInHctTest)
7200 CountRxErrStatistics(Adapter, pRfd);
7201#endif
7202 {
7203 #ifdef ENABLE_PS //by amy for adding ps function in future
7204 RT_RF_POWER_STATE rtState;
7205 // When RF is off, we should not count the packet for hw/sw synchronize
7206 // reason, ie. there may be a duration while sw switch is changed and hw
7207 // switch is being changed. 2006.12.04, by shien chang.
7208 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (u8* )(&rtState));
7209 if (rtState == eRfOff)
7210 {
7211 return;
7212 }
7213 #endif
7214 priv->stats.rxframgment++;
7215
7216 }
7217#ifdef TODO
7218 RmMonitorSignalStrength(Adapter, pRfd);
7219#endif
7220 /* 2007/01/16 MH Add RX command packet handle here. */
7221 /* 2007/03/01 MH We have to release RFD and return if rx pkt is cmd pkt. */
7222 if (rtl819xusb_rx_command_packet(dev, pstats))
7223 {
7224 return;
7225 }
7226
7227#ifdef SW_CRC_CHECK
7228 SwCrcCheck();
7229#endif
7230
7231
7232}
7233
7234void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)
7235{
7236// rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7237// struct net_device *dev=info->dev;
7238// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7239 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
7240// rx_drvinfo_819x_usb *driver_info;
7241
7242 //
7243 //Get Rx Descriptor Information
7244 //
7245 stats->virtual_address = (u8*)skb->data;
7246 stats->Length = desc->Length;
7247 stats->RxDrvInfoSize = 0;
7248 stats->RxBufShift = 0;
7249 stats->packetlength = stats->Length-scrclng;
7250 stats->fraglength = stats->packetlength;
7251 stats->fragoffset = 0;
7252 stats->ntotalfrag = 1;
7253}
7254
5f53d8ca
JC		 7255void rtl8192SU_rx_cmd(struct sk_buff *skb)
7256{
7257 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7258 struct net_device *dev = info->dev;
7259
7260 /* TODO */
7261 struct ieee80211_rx_stats stats = {
7262 .signal = 0,
7263 .noise = -98,
7264 .rate = 0,
7265 // .mac_time = jiffies,
7266 .freq = IEEE80211_24GHZ_BAND,
7267 };
7268
7269 //
7270 // Check buffer length to determine if this is a valid MPDU.
7271 //
7272 if( (skb->len >= sizeof(rx_desc_819x_usb)) && (skb->len <= RX_URB_SIZE) )//&&
7273 //(pHalData->SwChnlInProgress == FALSE))
7274 {
7275 //
7276 // Collection information in Rx descriptor.
7277 //
5f53d8ca
JC		 7278 query_rx_cmdpkt_desc_status(skb,&stats);
7279 // this is to be done by amy 080508 prfd->queue_id = 1;
7280
7281 //
7282 // Process the MPDU recevied.
7283 //
7284 rtl819xusb_process_received_packet(dev,&stats);
7285
7286 dev_kfree_skb_any(skb);
7287 }
7288 else
7289 {
7290 //RTInsertTailListWithCnt(&pAdapter->RfdIdleQueue, &pRfd->List, &pAdapter->NumIdleRfd);
7291 //RT_ASSERT(pAdapter->NumIdleRfd <= pAdapter->NumRfd, ("HalUsbInCommandComplete8192SUsb(): Adapter->NumIdleRfd(%d)\n", pAdapter->NumIdleRfd));
7292 //RT_TRACE(COMP_RECV, DBG_LOUD, ("HalUsbInCommandComplete8192SUsb(): NOT enough Resources!! BufLenUsed(%d), NumIdleRfd(%d)\n",
7293 //pContext->BufLenUsed, pAdapter->NumIdleRfd));
7294 }
7295
7296 //
7297 // Reuse USB_IN_CONTEXT since we had finished processing the
7298 // buffer in USB_IN_CONTEXT.
7299 //
7300 //HalUsbReturnInContext(pAdapter, pContext);
7301
7302 //
7303 // Issue another bulk IN transfer.
7304 //
7305 //HalUsbInMpdu(pAdapter, PipeIndex);
7306
7307 RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
7308
7309}
5f53d8ca
JC		 7310
7311void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
7312{
7313 struct sk_buff *skb;
7314 struct rtl8192_rx_info *info;
7315
7316 while (NULL != (skb = skb_dequeue(&priv->skb_queue))) {
7317 info = (struct rtl8192_rx_info *)skb->cb;
7318 switch (info->out_pipe) {
7319 /* Nomal packet pipe */
7320 case 3:
7321 //RT_TRACE(COMP_RECV, "normal in-pipe index(%d)\n",info->out_pipe);
7322 priv->IrpPendingCount--;
7323 priv->ops->rtl819x_rx_nomal(skb);
7324 break;
7325
7326 /* Command packet pipe */
7327 case 9:
7328 RT_TRACE(COMP_RECV, "command in-pipe index(%d)\n",\
7329 info->out_pipe);
7330 priv->ops->rtl819x_rx_cmd(skb);
7331 break;
7332
7333 default: /* should never get here! */
7334 RT_TRACE(COMP_ERR, "Unknown in-pipe index(%d)\n",\
7335 info->out_pipe);
7336 dev_kfree_skb(skb);
7337 break;
7338
7339 }
7340 }
7341}
7342
7343
7344
7345/****************************************************************************
7346 ---------------------------- USB_STUFF---------------------------
7347*****************************************************************************/
5f53d8ca
JC		 7348//LZM Merge from windows HalUsbSetQueuePipeMapping8192SUsb 090319
7349static void HalUsbSetQueuePipeMapping8192SUsb(struct usb_interface *intf, struct net_device *dev)
7350{
7351 struct r8192_priv *priv = ieee80211_priv(dev);
7352 struct usb_host_interface *iface_desc;
7353 struct usb_endpoint_descriptor *endpoint;
7354 u8 i = 0;
7355
7356 priv->ep_in_num = 0;
7357 priv->ep_out_num = 0;
7358 memset(priv->RtOutPipes,0,16);
7359 memset(priv->RtInPipes,0,16);
7360
5f53d8ca
JC		 7361 iface_desc = intf->cur_altsetting;
7362 priv->ep_num = iface_desc->desc.bNumEndpoints;
7363
7364 for (i = 0; i < priv->ep_num; ++i) {
7365 endpoint = &iface_desc->endpoint[i].desc;
5f53d8ca
JC		 7366 if (usb_endpoint_is_bulk_in(endpoint)) {
7367 priv->RtInPipes[priv->ep_in_num] = usb_endpoint_num(endpoint);
7368 priv->ep_in_num ++;
7369 //printk("in_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7370 } else if (usb_endpoint_is_bulk_out(endpoint)) {
7371 priv->RtOutPipes[priv->ep_out_num] = usb_endpoint_num(endpoint);
7372 priv->ep_out_num ++;
7373 //printk("out_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7374 }
5f53d8ca
JC		 7375 }
7376 {
7377 memset(priv->txqueue_to_outpipemap,0,9);
7378 if (priv->ep_num == 6) {
7379 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7380 u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 4, 4, 4};
7381
7382 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7383 } else if (priv->ep_num == 4) {
7384 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7385 u8 queuetopipe[] = {1, 1, 0, 0, 2, 2, 2, 2, 2};
7386
7387 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7388 } else if (priv->ep_num > 9) {
7389 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7390 u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5};
7391
7392 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7393 } else {//use sigle pipe
7394 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7395 u8 queuetopipe[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
7396 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7397 }
7398 }
7399 printk("==>ep_num:%d, in_ep_num:%d, out_ep_num:%d\n", priv->ep_num, priv->ep_in_num, priv->ep_out_num);
7400
7401 printk("==>RtInPipes:");
7402 for(i=0; i < priv->ep_in_num; i++)
7403 printk("%d ", priv->RtInPipes[i]);
7404 printk("\n");
7405
7406 printk("==>RtOutPipes:");
7407 for(i=0; i < priv->ep_out_num; i++)
7408 printk("%d ", priv->RtOutPipes[i]);
7409 printk("\n");
7410
7411 printk("==>txqueue_to_outpipemap for BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON:\n");
7412 for(i=0; i < 9; i++)
7413 printk("%d ", priv->txqueue_to_outpipemap[i]);
7414 printk("\n");
5f53d8ca
JC		 7415
7416 return;
7417}
5f53d8ca 7418
77b92881
BZ		 7419static const struct net_device_ops rtl8192_netdev_ops = {
7420 .ndo_open = rtl8192_open,
7421 .ndo_stop = rtl8192_close,
7422 .ndo_get_stats = rtl8192_stats,
7423 .ndo_tx_timeout = tx_timeout,
7424 .ndo_do_ioctl = rtl8192_ioctl,
7425 .ndo_set_multicast_list = r8192_set_multicast,
7426 .ndo_set_mac_address = r8192_set_mac_adr,
7427 .ndo_validate_addr = eth_validate_addr,
7428 .ndo_change_mtu = eth_change_mtu,
55c7d5fc 7429 .ndo_start_xmit = rtl8192_ieee80211_rtl_xmit,
77b92881
BZ		 7430};
7431
5f53d8ca
JC		 7432static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
7433 const struct usb_device_id *id)
5f53d8ca
JC		 7434{
7435// unsigned long ioaddr = 0;
7436 struct net_device *dev = NULL;
7437 struct r8192_priv *priv= NULL;
5f53d8ca 7438 struct usb_device *udev = interface_to_usbdev(intf);
1ec9e48d 7439
5f53d8ca
JC		 7440 RT_TRACE(COMP_INIT, "Oops: i'm coming\n");
7441
7442 dev = alloc_ieee80211(sizeof(struct r8192_priv));
7443
5f53d8ca
JC		 7444 usb_set_intfdata(intf, dev);
7445 SET_NETDEV_DEV(dev, &intf->dev);
5f53d8ca 7446 priv = ieee80211_priv(dev);
5f53d8ca 7447 priv->ieee80211 = netdev_priv(dev);
5f53d8ca
JC		 7448 priv->udev=udev;
7449
5f53d8ca 7450 HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
5f53d8ca 7451
5f53d8ca
JC		 7452 //printk("===============>NIC 8192SU\n");
7453 priv->ops = &rtl8192su_ops;
5f53d8ca 7454
77b92881 7455 dev->netdev_ops = &rtl8192_netdev_ops;
5f53d8ca
JC		 7456
7457 //DMESG("Oops: i'm coming\n");
5f53d8ca 7458 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
3bd709f2 7459
5f53d8ca
JC		 7460 dev->type=ARPHRD_ETHER;
7461
7462 dev->watchdog_timeo = HZ*3; //modified by john, 0805
7463
7464 if (dev_alloc_name(dev, ifname) < 0){
7465 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
7466 ifname = "wlan%d";
7467 dev_alloc_name(dev, ifname);
7468 }
7469
7470 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
7471#if 1
7472 if(rtl8192_init(dev)!=0){
7473 RT_TRACE(COMP_ERR, "Initialization failed");
7474 goto fail;
7475 }
7476#endif
7477 netif_carrier_off(dev);
7478 netif_stop_queue(dev);
7479
7480 register_netdev(dev);
7481 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
7482 rtl8192_proc_init_one(dev);
7483
7484
7485 RT_TRACE(COMP_INIT, "Driver probe completed\n");
5f53d8ca 7486 return 0;
5f53d8ca
JC		 7487fail:
7488 free_ieee80211(dev);
7489
7490 RT_TRACE(COMP_ERR, "wlan driver load failed\n");
5f53d8ca 7491 return -ENODEV;
5f53d8ca
JC		 7492}
7493
7494//detach all the work and timer structure declared or inititialize in r8192U_init function.
7495void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
7496{
5f53d8ca
JC		 7497 cancel_work_sync(&priv->reset_wq);
7498 cancel_work_sync(&priv->qos_activate);
7499 cancel_delayed_work(&priv->watch_dog_wq);
7500 cancel_delayed_work(&priv->update_beacon_wq);
7501 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
7502 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
7503 //cancel_work_sync(&priv->SetBWModeWorkItem);
7504 //cancel_work_sync(&priv->SwChnlWorkItem);
5f53d8ca
JC		 7505}
7506
5f53d8ca 7507static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)
5f53d8ca 7508{
5f53d8ca 7509 struct net_device *dev = usb_get_intfdata(intf);
5f53d8ca
JC		 7510 struct r8192_priv *priv = ieee80211_priv(dev);
7511 if(dev){
7512
7513 unregister_netdev(dev);
7514
7515 RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n");
7516 rtl8192_proc_remove_one(dev);
7517
7518 rtl8192_down(dev);
7519 if (priv->pFirmware)
7520 {
7521 vfree(priv->pFirmware);
7522 priv->pFirmware = NULL;
7523 }
7524 // priv->rf_close(dev);
7525// rtl8192_SetRFPowerState(dev, eRfOff);
5f53d8ca 7526 destroy_workqueue(priv->priv_wq);
5f53d8ca
JC		 7527 //rtl8192_irq_disable(dev);
7528 //rtl8192_reset(dev);
7529 mdelay(10);
7530
7531 }
7532 free_ieee80211(dev);
7533 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
7534}
7535
5d9baea9
BZ		 7536/* fun with the built-in ieee80211 stack... */
7537extern int ieee80211_debug_init(void);
7538extern void ieee80211_debug_exit(void);
7539extern int ieee80211_crypto_init(void);
7540extern void ieee80211_crypto_deinit(void);
7541extern int ieee80211_crypto_tkip_init(void);
7542extern void ieee80211_crypto_tkip_exit(void);
7543extern int ieee80211_crypto_ccmp_init(void);
7544extern void ieee80211_crypto_ccmp_exit(void);
7545extern int ieee80211_crypto_wep_init(void);
7546extern void ieee80211_crypto_wep_exit(void);
7547
5f53d8ca
JC		 7548static int __init rtl8192_usb_module_init(void)
7549{
5d9baea9
BZ		 7550 int ret;
7551
7552#ifdef CONFIG_IEEE80211_DEBUG
7553 ret = ieee80211_debug_init();
7554 if (ret) {
7555 printk(KERN_ERR "ieee80211_debug_init() failed %d\n", ret);
7556 return ret;
7557 }
7558#endif
7559 ret = ieee80211_crypto_init();
7560 if (ret) {
7561 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
7562 return ret;
7563 }
7564
7565 ret = ieee80211_crypto_tkip_init();
7566 if (ret) {
7567 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n",
7568 ret);
7569 return ret;
7570 }
7571
7572 ret = ieee80211_crypto_ccmp_init();
7573 if (ret) {
7574 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n",
7575 ret);
7576 return ret;
7577 }
7578
7579 ret = ieee80211_crypto_wep_init();
7580 if (ret) {
7581 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
7582 return ret;
7583 }
7584
5f53d8ca
JC		 7585 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
7586 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
7587 RT_TRACE(COMP_INIT, "Initializing module");
7588 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
7589 rtl8192_proc_module_init();
7590 return usb_register(&rtl8192_usb_driver);
7591}
7592
7593
7594static void __exit rtl8192_usb_module_exit(void)
7595{
7596 usb_deregister(&rtl8192_usb_driver);
7597
7598 RT_TRACE(COMP_DOWN, "Exiting");
7599 rtl8192_proc_module_remove();
5d9baea9
BZ		 7600
7601 ieee80211_crypto_tkip_exit();
7602 ieee80211_crypto_ccmp_exit();
7603 ieee80211_crypto_wep_exit();
7604 ieee80211_crypto_deinit();
7605#ifdef CONFIG_IEEE80211_DEBUG
7606 ieee80211_debug_exit();
7607#endif
5f53d8ca
JC		 7608}
7609
7610
7611void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7612{
7613 unsigned long flags;
7614 short enough_desc;
7615 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7616
7617 spin_lock_irqsave(&priv->tx_lock,flags);
7618 enough_desc = check_nic_enough_desc(dev,pri);
7619 spin_unlock_irqrestore(&priv->tx_lock,flags);
7620
7621 if(enough_desc)
55c7d5fc 7622 ieee80211_rtl_wake_queue(priv->ieee80211);
5f53d8ca
JC		 7623}
7624
5f53d8ca
JC		 7625void EnableHWSecurityConfig8192(struct net_device *dev)
7626{
7627 u8 SECR_value = 0x0;
7628 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7629 struct ieee80211_device* ieee = priv->ieee80211;
7630
7631 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
7632#if 1
7633 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
7634 {
7635 SECR_value |= SCR_RxUseDK;
7636 SECR_value |= SCR_TxUseDK;
7637 }
7638 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
7639 {
7640 SECR_value |= SCR_RxUseDK;
7641 SECR_value |= SCR_TxUseDK;
7642 }
7643#endif
7644 //add HWSec active enable here.
7645//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
7646
7647 ieee->hwsec_active = 1;
7648
7649 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
7650 {
7651 ieee->hwsec_active = 0;
7652 SECR_value &= ~SCR_RxDecEnable;
7653 }
7654
7655 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
7656 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
7657 {
7658 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
7659 }
7660}
7661
7662
7663void setKey( struct net_device *dev,
7664 u8 EntryNo,
7665 u8 KeyIndex,
7666 u16 KeyType,
7667 u8 *MacAddr,
7668 u8 DefaultKey,
7669 u32 *KeyContent )
7670{
7671 u32 TargetCommand = 0;
7672 u32 TargetContent = 0;
7673 u16 usConfig = 0;
7674 u8 i;
7675 if (EntryNo >= TOTAL_CAM_ENTRY)
7676 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
7677
0ee9f67c 7678 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
5f53d8ca
JC		 7679
7680 if (DefaultKey)
7681 usConfig |= BIT15 | (KeyType<<2);
7682 else
7683 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
7684// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
7685
7686
7687 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
7688 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
7689 TargetCommand |= BIT31|BIT16;
7690
7691 if(i==0){//MAC|Config
7692 TargetContent = (u32)(*(MacAddr+0)) << 16|
7693 (u32)(*(MacAddr+1)) << 24|
7694 (u32)usConfig;
7695
7696 write_nic_dword(dev, WCAMI, TargetContent);
7697 write_nic_dword(dev, RWCAM, TargetCommand);
7698 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
7699 }
7700 else if(i==1){//MAC
7701 TargetContent = (u32)(*(MacAddr+2)) |
7702 (u32)(*(MacAddr+3)) << 8|
7703 (u32)(*(MacAddr+4)) << 16|
7704 (u32)(*(MacAddr+5)) << 24;
7705 write_nic_dword(dev, WCAMI, TargetContent);
7706 write_nic_dword(dev, RWCAM, TargetCommand);
7707 }
7708 else {
7709 //Key Material
7710 if(KeyContent !=NULL){
7711 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
7712 write_nic_dword(dev, RWCAM, TargetCommand);
7713 }
7714 }
7715 }
7716
7717}
7718
7719/***************************************************************************
7720 ------------------- module init / exit stubs ----------------
7721****************************************************************************/
7722module_init(rtl8192_usb_module_init);
7723module_exit(rtl8192_usb_module_exit);
Linux 6.x block layer and io_uring tree(s)