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staging:iio:events - new 64 bit code structure and push out drivers.
[linux-2.6-block.git] / drivers / staging / iio / adc / ad7793.c
CommitLineData
88bc3054
MH		 1/*
2 * AD7792/AD7793 SPI ADC driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/sysfs.h>
14#include <linux/spi/spi.h>
15#include <linux/regulator/consumer.h>
16#include <linux/err.h>
17#include <linux/sched.h>
18#include <linux/delay.h>
19
20#include "../iio.h"
21#include "../sysfs.h"
22#include "../ring_generic.h"
23#include "../ring_sw.h"
24#include "../trigger.h"
3f72395e 25#include "../trigger_consumer.h"
88bc3054
MH		 26
27#include "ad7793.h"
28
29/* NOTE:
30 * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
31 * In order to avoid contentions on the SPI bus, it's therefore necessary
32 * to use spi bus locking.
33 *
34 * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
35 */
36
37struct ad7793_chip_info {
38 struct iio_chan_spec channel[7];
39};
40
41struct ad7793_state {
42 struct spi_device *spi;
43 struct iio_trigger *trig;
44 const struct ad7793_chip_info *chip_info;
45 struct regulator *reg;
46 struct ad7793_platform_data *pdata;
47 wait_queue_head_t wq_data_avail;
48 bool done;
49 bool irq_dis;
50 u16 int_vref_mv;
51 u16 mode;
52 u16 conf;
53 u32 scale_avail[8][2];
32b5eeca
JC		 54 /* Note this uses fact that 8 the mask always fits in a long */
55 unsigned long available_scan_masks[7];
88bc3054
MH		 56 /*
57 * DMA (thus cache coherency maintenance) requires the
58 * transfer buffers to live in their own cache lines.
59 */
60 u8 data[4] ____cacheline_aligned;
61};
62
63enum ad7793_supported_device_ids {
64 ID_AD7792,
65 ID_AD7793,
66};
67
68static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
69 bool cs_change, unsigned char reg,
70 unsigned size, unsigned val)
71{
72 u8 *data = st->data;
73 struct spi_transfer t = {
74 .tx_buf = data,
75 .len = size + 1,
76 .cs_change = cs_change,
77 };
78 struct spi_message m;
79
80 data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
81
82 switch (size) {
83 case 3:
84 data[1] = val >> 16;
85 data[2] = val >> 8;
86 data[3] = val;
87 break;
88 case 2:
89 data[1] = val >> 8;
90 data[2] = val;
91 break;
92 case 1:
93 data[1] = val;
94 break;
95 default:
96 return -EINVAL;
97 }
98
99 spi_message_init(&m);
100 spi_message_add_tail(&t, &m);
101
102 if (locked)
103 return spi_sync_locked(st->spi, &m);
104 else
105 return spi_sync(st->spi, &m);
106}
107
108static int ad7793_write_reg(struct ad7793_state *st,
109 unsigned reg, unsigned size, unsigned val)
110{
111 return __ad7793_write_reg(st, false, false, reg, size, val);
112}
113
114static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
115 bool cs_change, unsigned char reg,
116 int *val, unsigned size)
117{
118 u8 *data = st->data;
119 int ret;
120 struct spi_transfer t[] = {
121 {
122 .tx_buf = data,
123 .len = 1,
124 }, {
125 .rx_buf = data,
126 .len = size,
127 .cs_change = cs_change,
128 },
129 };
130 struct spi_message m;
131
132 data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
133
134 spi_message_init(&m);
135 spi_message_add_tail(&t[0], &m);
136 spi_message_add_tail(&t[1], &m);
137
138 if (locked)
139 ret = spi_sync_locked(st->spi, &m);
140 else
141 ret = spi_sync(st->spi, &m);
142
143 if (ret < 0)
144 return ret;
145
146 switch (size) {
147 case 3:
148 *val = data[0] << 16 | data[1] << 8 | data[2];
149 break;
150 case 2:
151 *val = data[0] << 8 | data[1];
152 break;
153 case 1:
154 *val = data[0];
155 break;
156 default:
157 return -EINVAL;
158 }
159
160 return 0;
161}
162
163static int ad7793_read_reg(struct ad7793_state *st,
164 unsigned reg, int *val, unsigned size)
165{
166 return __ad7793_read_reg(st, 0, 0, reg, val, size);
167}
168
169static int ad7793_read(struct ad7793_state *st, unsigned ch,
170 unsigned len, int *val)
171{
172 int ret;
173 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
174 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
175 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
176
177 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
178
179 spi_bus_lock(st->spi->master);
180 st->done = false;
181
182 ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
183 sizeof(st->mode), st->mode);
184 if (ret < 0)
185 goto out;
186
187 st->irq_dis = false;
188 enable_irq(st->spi->irq);
189 wait_event_interruptible(st->wq_data_avail, st->done);
190
191 ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
192out:
193 spi_bus_unlock(st->spi->master);
194
195 return ret;
196}
197
198static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
199{
200 int ret;
201
202 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
203 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
204
205 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
206
207 spi_bus_lock(st->spi->master);
208 st->done = false;
209
210 ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
211 sizeof(st->mode), st->mode);
212 if (ret < 0)
213 goto out;
214
215 st->irq_dis = false;
216 enable_irq(st->spi->irq);
217 wait_event_interruptible(st->wq_data_avail, st->done);
218
219 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
220 AD7793_MODE_SEL(AD7793_MODE_IDLE);
221
222 ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
223 sizeof(st->mode), st->mode);
224out:
225 spi_bus_unlock(st->spi->master);
226
227 return ret;
228}
229
230static const u8 ad7793_calib_arr[6][2] = {
231 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
232 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
233 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
234 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
235 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
236 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
237};
238
239static int ad7793_calibrate_all(struct ad7793_state *st)
240{
241 int i, ret;
242
243 for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
244 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
245 ad7793_calib_arr[i][1]);
246 if (ret)
247 goto out;
248 }
249
250 return 0;
251out:
252 dev_err(&st->spi->dev, "Calibration failed\n");
253 return ret;
254}
255
256static int ad7793_setup(struct ad7793_state *st)
257{
258 int i, ret = -1;
259 unsigned long long scale_uv;
260 u32 id;
261
262 /* reset the serial interface */
263 ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
264 if (ret < 0)
265 goto out;
266 msleep(1); /* Wait for at least 500us */
267
268 /* write/read test for device presence */
269 ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
270 if (ret)
271 goto out;
272
273 id &= AD7793_ID_MASK;
274
275 if (!((id == AD7792_ID) || (id == AD7793_ID))) {
276 dev_err(&st->spi->dev, "device ID query failed\n");
277 goto out;
278 }
279
280 st->mode = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
281 AD7793_MODE_SEL(AD7793_MODE_IDLE);
282 st->conf = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
283
284 ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
285 if (ret)
286 goto out;
287
288 ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
289 if (ret)
290 goto out;
291
292 ret = ad7793_write_reg(st, AD7793_REG_IO,
293 sizeof(st->pdata->io), st->pdata->io);
294 if (ret)
295 goto out;
296
297 ret = ad7793_calibrate_all(st);
298 if (ret)
299 goto out;
300
301 /* Populate available ADC input ranges */
302 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
303 scale_uv = ((u64)st->int_vref_mv * 100000000)
304 >> (st->chip_info->channel[0].scan_type.realbits -
305 (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
306 scale_uv >>= i;
307
308 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
309 st->scale_avail[i][0] = scale_uv;
310 }
311
312 return 0;
313out:
314 dev_err(&st->spi->dev, "setup failed\n");
315 return ret;
316}
317
318static int ad7793_scan_from_ring(struct ad7793_state *st, unsigned ch, int *val)
319{
320 struct iio_ring_buffer *ring = iio_priv_to_dev(st)->ring;
321 int ret;
322 s64 dat64[2];
323 u32 *dat32 = (u32 *)dat64;
324
32b5eeca 325 if (!(test_bit(ch, ring->scan_mask)))
88bc3054
MH		 326 return -EBUSY;
327
328 ret = ring->access->read_last(ring, (u8 *) &dat64);
329 if (ret)
330 return ret;
331
332 *val = *dat32;
333
334 return 0;
335}
336
337static int ad7793_ring_preenable(struct iio_dev *indio_dev)
338{
339 struct ad7793_state *st = iio_priv(indio_dev);
340 struct iio_ring_buffer *ring = indio_dev->ring;
341 size_t d_size;
342 unsigned channel;
343
344 if (!ring->scan_count)
345 return -EINVAL;
346
32b5eeca
JC		 347 channel = find_first_bit(ring->scan_mask,
348 indio_dev->masklength);
88bc3054
MH		 349
350 d_size = ring->scan_count *
351 indio_dev->channels[0].scan_type.storagebits / 8;
352
353 if (ring->scan_timestamp) {
354 d_size += sizeof(s64);
355
356 if (d_size % sizeof(s64))
357 d_size += sizeof(s64) - (d_size % sizeof(s64));
358 }
359
360 if (indio_dev->ring->access->set_bytes_per_datum)
361 indio_dev->ring->access->set_bytes_per_datum(indio_dev->ring,
362 d_size);
363
364 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
365 AD7793_MODE_SEL(AD7793_MODE_CONT);
366 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) |
367 AD7793_CONF_CHAN(indio_dev->channels[channel].address);
368
369 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
370
371 spi_bus_lock(st->spi->master);
372 __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
373 sizeof(st->mode), st->mode);
374
375 st->irq_dis = false;
376 enable_irq(st->spi->irq);
377
378 return 0;
379}
380
381static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
382{
383 struct ad7793_state *st = iio_priv(indio_dev);
384
385 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
386 AD7793_MODE_SEL(AD7793_MODE_IDLE);
387
388 st->done = false;
389 wait_event_interruptible(st->wq_data_avail, st->done);
390
391 if (!st->irq_dis)
392 disable_irq_nosync(st->spi->irq);
393
394 __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
395 sizeof(st->mode), st->mode);
396
397 return spi_bus_unlock(st->spi->master);
398}
399
400/**
401 * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
402 **/
403
404static irqreturn_t ad7793_trigger_handler(int irq, void *p)
405{
406 struct iio_poll_func *pf = p;
e65bc6ac 407 struct iio_dev *indio_dev = pf->indio_dev;
88bc3054
MH		 408 struct iio_ring_buffer *ring = indio_dev->ring;
409 struct ad7793_state *st = iio_priv(indio_dev);
410 s64 dat64[2];
411 s32 *dat32 = (s32 *)dat64;
412
413 if (ring->scan_count)
414 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
415 dat32,
416 indio_dev->channels[0].scan_type.realbits/8);
417
418 /* Guaranteed to be aligned with 8 byte boundary */
419 if (ring->scan_timestamp)
420 dat64[1] = pf->timestamp;
421
422 ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
423
424 iio_trigger_notify_done(indio_dev->trig);
425 st->irq_dis = false;
426 enable_irq(st->spi->irq);
427
428 return IRQ_HANDLED;
429}
430
431static const struct iio_ring_setup_ops ad7793_ring_setup_ops = {
432 .preenable = &ad7793_ring_preenable,
433 .postenable = &iio_triggered_ring_postenable,
434 .predisable = &iio_triggered_ring_predisable,
435 .postdisable = &ad7793_ring_postdisable,
436};
437
438static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
439{
440 int ret;
441
442 indio_dev->ring = iio_sw_rb_allocate(indio_dev);
443 if (!indio_dev->ring) {
444 ret = -ENOMEM;
445 goto error_ret;
446 }
447 /* Effectively select the ring buffer implementation */
448 indio_dev->ring->access = &ring_sw_access_funcs;
449 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
450 &ad7793_trigger_handler,
451 IRQF_ONESHOT,
452 indio_dev,
453 "ad7793_consumer%d",
454 indio_dev->id);
455 if (indio_dev->pollfunc == NULL) {
456 ret = -ENOMEM;
457 goto error_deallocate_sw_rb;
458 }
459
460 /* Ring buffer functions - here trigger setup related */
461 indio_dev->ring->setup_ops = &ad7793_ring_setup_ops;
462
463 /* Flag that polled ring buffering is possible */
464 indio_dev->modes |= INDIO_RING_TRIGGERED;
465 return 0;
466
467error_deallocate_sw_rb:
468 iio_sw_rb_free(indio_dev->ring);
469error_ret:
470 return ret;
471}
472
473static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
474{
88bc3054
MH		 475 iio_dealloc_pollfunc(indio_dev->pollfunc);
476 iio_sw_rb_free(indio_dev->ring);
477}
478
479/**
480 * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
481 **/
482static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
483{
484 struct ad7793_state *st = iio_priv(private);
485
486 st->done = true;
487 wake_up_interruptible(&st->wq_data_avail);
488 disable_irq_nosync(irq);
489 st->irq_dis = true;
490 iio_trigger_poll(st->trig, iio_get_time_ns());
491
492 return IRQ_HANDLED;
493}
494
495static int ad7793_probe_trigger(struct iio_dev *indio_dev)
496{
497 struct ad7793_state *st = iio_priv(indio_dev);
498 int ret;
499
500 st->trig = iio_allocate_trigger("%s-dev%d",
501 spi_get_device_id(st->spi)->name,
502 indio_dev->id);
503 if (st->trig == NULL) {
504 ret = -ENOMEM;
505 goto error_ret;
506 }
507
508 ret = request_irq(st->spi->irq,
509 ad7793_data_rdy_trig_poll,
510 IRQF_TRIGGER_LOW,
511 spi_get_device_id(st->spi)->name,
512 indio_dev);
513 if (ret)
514 goto error_free_trig;
515
516 disable_irq_nosync(st->spi->irq);
517 st->irq_dis = true;
518 st->trig->dev.parent = &st->spi->dev;
519 st->trig->owner = THIS_MODULE;
520 st->trig->private_data = indio_dev;
521
522 ret = iio_trigger_register(st->trig);
523
524 /* select default trigger */
525 indio_dev->trig = st->trig;
526 if (ret)
527 goto error_free_irq;
528
529 return 0;
530
531error_free_irq:
532 free_irq(st->spi->irq, indio_dev);
533error_free_trig:
534 iio_free_trigger(st->trig);
535error_ret:
536 return ret;
537}
538
539static void ad7793_remove_trigger(struct iio_dev *indio_dev)
540{
541 struct ad7793_state *st = iio_priv(indio_dev);
542
543 iio_trigger_unregister(st->trig);
544 free_irq(st->spi->irq, indio_dev);
545 iio_free_trigger(st->trig);
546}
547
548static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
549 17, 16, 12, 10, 8, 6, 4};
550
551static ssize_t ad7793_read_frequency(struct device *dev,
552 struct device_attribute *attr,
553 char *buf)
554{
555 struct iio_dev *indio_dev = dev_get_drvdata(dev);
556 struct ad7793_state *st = iio_priv(indio_dev);
557
558 return sprintf(buf, "%d\n",
559 sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
560}
561
562static ssize_t ad7793_write_frequency(struct device *dev,
563 struct device_attribute *attr,
564 const char *buf,
565 size_t len)
566{
567 struct iio_dev *indio_dev = dev_get_drvdata(dev);
568 struct ad7793_state *st = iio_priv(indio_dev);
569 long lval;
570 int i, ret;
571
572 mutex_lock(&indio_dev->mlock);
573 if (iio_ring_enabled(indio_dev)) {
574 mutex_unlock(&indio_dev->mlock);
575 return -EBUSY;
576 }
577 mutex_unlock(&indio_dev->mlock);
578
579 ret = strict_strtol(buf, 10, &lval);
580 if (ret)
581 return ret;
582
583 ret = -EINVAL;
584
585 for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
586 if (lval == sample_freq_avail[i]) {
587 mutex_lock(&indio_dev->mlock);
588 st->mode &= ~AD7793_MODE_RATE(-1);
589 st->mode |= AD7793_MODE_RATE(i);
590 ad7793_write_reg(st, AD7793_REG_MODE,
591 sizeof(st->mode), st->mode);
592 mutex_unlock(&indio_dev->mlock);
593 ret = 0;
594 }
595
596 return ret ? ret : len;
597}
598
599static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
600 ad7793_read_frequency,
601 ad7793_write_frequency);
602
603static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
604 "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
605
606static ssize_t ad7793_show_scale_available(struct device *dev,
607 struct device_attribute *attr, char *buf)
608{
609 struct iio_dev *indio_dev = dev_get_drvdata(dev);
610 struct ad7793_state *st = iio_priv(indio_dev);
611 int i, len = 0;
612
613 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
614 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
615 st->scale_avail[i][1]);
616
617 len += sprintf(buf + len, "\n");
618
619 return len;
620}
621
622static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
623 S_IRUGO, ad7793_show_scale_available, NULL, 0);
624
625static struct attribute *ad7793_attributes[] = {
626 &iio_dev_attr_sampling_frequency.dev_attr.attr,
627 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
628 &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
629 NULL
630};
631
632static const struct attribute_group ad7793_attribute_group = {
633 .attrs = ad7793_attributes,
634};
635
636static int ad7793_read_raw(struct iio_dev *indio_dev,
637 struct iio_chan_spec const *chan,
638 int *val,
639 int *val2,
640 long m)
641{
642 struct ad7793_state *st = iio_priv(indio_dev);
643 int ret, smpl = 0;
644 unsigned long long scale_uv;
645 bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
646
647 switch (m) {
648 case 0:
649 mutex_lock(&indio_dev->mlock);
650 if (iio_ring_enabled(indio_dev))
651 ret = ad7793_scan_from_ring(st,
652 chan->scan_index, &smpl);
653 else
654 ret = ad7793_read(st, chan->address,
655 chan->scan_type.realbits / 8, &smpl);
656 mutex_unlock(&indio_dev->mlock);
657
658 if (ret < 0)
659 return ret;
660
661 *val = (smpl >> chan->scan_type.shift) &
662 ((1 << (chan->scan_type.realbits)) - 1);
663
664 if (!unipolar)
665 *val -= (1 << (chan->scan_type.realbits - 1));
666
667 return IIO_VAL_INT;
668
669 case (1 << IIO_CHAN_INFO_SCALE_SHARED):
670 *val = st->scale_avail[(st->conf >> 8) & 0x7][0];
671 *val2 = st->scale_avail[(st->conf >> 8) & 0x7][1];
672
673 return IIO_VAL_INT_PLUS_NANO;
674
675 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
676 switch (chan->type) {
677 case IIO_IN:
678 /* 1170mV / 2^23 * 6 */
679 scale_uv = (1170ULL * 100000000ULL * 6ULL)
680 >> (chan->scan_type.realbits -
681 (unipolar ? 0 : 1));
682 break;
683 case IIO_TEMP:
684 /* Always uses unity gain and internal ref */
685 scale_uv = (2500ULL * 100000000ULL)
686 >> (chan->scan_type.realbits -
687 (unipolar ? 0 : 1));
688 break;
689 default:
690 return -EINVAL;
691 }
692
693 *val2 = do_div(scale_uv, 100000000) * 10;
694 *val = scale_uv;
695
696 return IIO_VAL_INT_PLUS_NANO;
697 }
698 return -EINVAL;
699}
700
701static int ad7793_write_raw(struct iio_dev *indio_dev,
702 struct iio_chan_spec const *chan,
703 int val,
704 int val2,
705 long mask)
706{
707 struct ad7793_state *st = iio_priv(indio_dev);
708 int ret, i;
709 unsigned int tmp;
710
711 mutex_lock(&indio_dev->mlock);
712 if (iio_ring_enabled(indio_dev)) {
713 mutex_unlock(&indio_dev->mlock);
714 return -EBUSY;
715 }
716
717 switch (mask) {
718 case (1 << IIO_CHAN_INFO_SCALE_SHARED):
719 ret = -EINVAL;
720 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
721 if (val2 == st->scale_avail[i][1]) {
722 tmp = st->conf;
723 st->conf &= ~AD7793_CONF_GAIN(-1);
724 st->conf |= AD7793_CONF_GAIN(i);
725
726 if (tmp != st->conf) {
727 ad7793_write_reg(st, AD7793_REG_CONF,
728 sizeof(st->conf),
729 st->conf);
730 ad7793_calibrate_all(st);
731 }
732 ret = 0;
733 }
734
735 default:
736 ret = -EINVAL;
737 }
738
739 mutex_unlock(&indio_dev->mlock);
740 return ret;
741}
742
743static int ad7793_validate_trigger(struct iio_dev *indio_dev,
744 struct iio_trigger *trig)
745{
746 if (indio_dev->trig != trig)
747 return -EINVAL;
748
749 return 0;
750}
751
752static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
753 struct iio_chan_spec const *chan,
754 long mask)
755{
756 return IIO_VAL_INT_PLUS_NANO;
757}
758
759static const struct iio_info ad7793_info = {
760 .read_raw = &ad7793_read_raw,
761 .write_raw = &ad7793_write_raw,
762 .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
763 .attrs = &ad7793_attribute_group,
764 .validate_trigger = ad7793_validate_trigger,
765 .driver_module = THIS_MODULE,
766};
767
768static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
769 [ID_AD7793] = {
770 .channel[0] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 0, 0,
771 (1 << IIO_CHAN_INFO_SCALE_SHARED),
772 AD7793_CH_AIN1P_AIN1M,
773 0, IIO_ST('s', 24, 32, 0), 0),
774 .channel[1] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 1, 1,
775 (1 << IIO_CHAN_INFO_SCALE_SHARED),
776 AD7793_CH_AIN2P_AIN2M,
777 1, IIO_ST('s', 24, 32, 0), 0),
778 .channel[2] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 2, 2,
779 (1 << IIO_CHAN_INFO_SCALE_SHARED),
780 AD7793_CH_AIN3P_AIN3M,
781 2, IIO_ST('s', 24, 32, 0), 0),
782 .channel[3] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, "shorted", 0, 0,
783 (1 << IIO_CHAN_INFO_SCALE_SHARED),
784 AD7793_CH_AIN1M_AIN1M,
785 3, IIO_ST('s', 24, 32, 0), 0),
786 .channel[4] = IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
787 (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
788 AD7793_CH_TEMP,
789 4, IIO_ST('s', 24, 32, 0), 0),
790 .channel[5] = IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 4, 0,
791 (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
792 AD7793_CH_AVDD_MONITOR,
793 5, IIO_ST('s', 24, 32, 0), 0),
794 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
795 },
796 [ID_AD7792] = {
797 .channel[0] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 0, 0,
798 (1 << IIO_CHAN_INFO_SCALE_SHARED),
799 AD7793_CH_AIN1P_AIN1M,
800 0, IIO_ST('s', 16, 32, 0), 0),
801 .channel[1] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 1, 1,
802 (1 << IIO_CHAN_INFO_SCALE_SHARED),
803 AD7793_CH_AIN2P_AIN2M,
804 1, IIO_ST('s', 16, 32, 0), 0),
805 .channel[2] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 2, 2,
806 (1 << IIO_CHAN_INFO_SCALE_SHARED),
807 AD7793_CH_AIN3P_AIN3M,
808 2, IIO_ST('s', 16, 32, 0), 0),
809 .channel[3] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, "shorted", 0, 0,
810 (1 << IIO_CHAN_INFO_SCALE_SHARED),
811 AD7793_CH_AIN1M_AIN1M,
812 3, IIO_ST('s', 16, 32, 0), 0),
813 .channel[4] = IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
814 (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
815 AD7793_CH_TEMP,
816 4, IIO_ST('s', 16, 32, 0), 0),
817 .channel[5] = IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 4, 0,
818 (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
819 AD7793_CH_AVDD_MONITOR,
820 5, IIO_ST('s', 16, 32, 0), 0),
821 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
822 },
823};
824
825static int __devinit ad7793_probe(struct spi_device *spi)
826{
827 struct ad7793_platform_data *pdata = spi->dev.platform_data;
828 struct ad7793_state *st;
829 struct iio_dev *indio_dev;
830 int ret, i, voltage_uv = 0, regdone = 0;
831
832 if (!pdata) {
833 dev_err(&spi->dev, "no platform data?\n");
834 return -ENODEV;
835 }
836
837 if (!spi->irq) {
838 dev_err(&spi->dev, "no IRQ?\n");
839 return -ENODEV;
840 }
841
842 indio_dev = iio_allocate_device(sizeof(*st));
843 if (indio_dev == NULL)
844 return -ENOMEM;
845
846 st = iio_priv(indio_dev);
847
848 st->reg = regulator_get(&spi->dev, "vcc");
849 if (!IS_ERR(st->reg)) {
850 ret = regulator_enable(st->reg);
851 if (ret)
852 goto error_put_reg;
853
854 voltage_uv = regulator_get_voltage(st->reg);
855 }
856
857 st->chip_info =
858 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
859
860 st->pdata = pdata;
861
862 if (pdata && pdata->vref_mv)
863 st->int_vref_mv = pdata->vref_mv;
864 else if (voltage_uv)
865 st->int_vref_mv = voltage_uv / 1000;
866 else
867 st->int_vref_mv = 2500; /* Build-in ref */
868
869 spi_set_drvdata(spi, indio_dev);
870 st->spi = spi;
871
872 indio_dev->dev.parent = &spi->dev;
873 indio_dev->name = spi_get_device_id(spi)->name;
874 indio_dev->modes = INDIO_DIRECT_MODE;
875 indio_dev->channels = st->chip_info->channel;
876 indio_dev->available_scan_masks = st->available_scan_masks;
877 indio_dev->num_channels = 7;
878 indio_dev->info = &ad7793_info;
879
32b5eeca
JC		 880 for (i = 0; i < indio_dev->num_channels; i++) {
881 set_bit(i, &st->available_scan_masks[i]);
882 set_bit(indio_dev->
883 channels[indio_dev->num_channels - 1].scan_index,
884 &st->available_scan_masks[i]);
885 }
88bc3054
MH		 886
887 init_waitqueue_head(&st->wq_data_avail);
888
889 ret = ad7793_register_ring_funcs_and_init(indio_dev);
890 if (ret)
891 goto error_disable_reg;
892
893 ret = iio_device_register(indio_dev);
894 if (ret)
895 goto error_unreg_ring;
896 regdone = 1;
897
898 ret = ad7793_probe_trigger(indio_dev);
899 if (ret)
900 goto error_unreg_ring;
901
c009f7e4
JC		 902 ret = iio_ring_buffer_register(indio_dev,
903 indio_dev->channels,
904 indio_dev->num_channels);
88bc3054
MH		 905 if (ret)
906 goto error_remove_trigger;
907
908 ret = ad7793_setup(st);
909 if (ret)
910 goto error_uninitialize_ring;
911
912 return 0;
913
914error_uninitialize_ring:
1aa04278 915 iio_ring_buffer_unregister(indio_dev);
88bc3054
MH		 916error_remove_trigger:
917 ad7793_remove_trigger(indio_dev);
918error_unreg_ring:
919 ad7793_ring_cleanup(indio_dev);
920error_disable_reg:
921 if (!IS_ERR(st->reg))
922 regulator_disable(st->reg);
923error_put_reg:
924 if (!IS_ERR(st->reg))
925 regulator_put(st->reg);
926
927 if (regdone)
928 iio_device_unregister(indio_dev);
929 else
930 iio_free_device(indio_dev);
931
932 return ret;
933}
934
935static int ad7793_remove(struct spi_device *spi)
936{
937 struct iio_dev *indio_dev = spi_get_drvdata(spi);
938 struct ad7793_state *st = iio_priv(indio_dev);
939
1aa04278 940 iio_ring_buffer_unregister(indio_dev);
88bc3054
MH		 941 ad7793_remove_trigger(indio_dev);
942 ad7793_ring_cleanup(indio_dev);
943
944 if (!IS_ERR(st->reg)) {
945 regulator_disable(st->reg);
946 regulator_put(st->reg);
947 }
948
949 iio_device_unregister(indio_dev);
950
951 return 0;
952}
953
954static const struct spi_device_id ad7793_id[] = {
955 {"ad7792", ID_AD7792},
956 {"ad7793", ID_AD7793},
957 {}
958};
959
960static struct spi_driver ad7793_driver = {
961 .driver = {
962 .name = "ad7793",
963 .bus = &spi_bus_type,
964 .owner = THIS_MODULE,
965 },
966 .probe = ad7793_probe,
967 .remove = __devexit_p(ad7793_remove),
968 .id_table = ad7793_id,
969};
970
971static int __init ad7793_init(void)
972{
973 return spi_register_driver(&ad7793_driver);
974}
975module_init(ad7793_init);
976
977static void __exit ad7793_exit(void)
978{
979 spi_unregister_driver(&ad7793_driver);
980}
981module_exit(ad7793_exit);
982
983MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
984MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
985MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)