include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[linux-2.6-block.git] / drivers / staging / comedi / drivers / ni_at_a2150.c
CommitLineData
01b0a258
FMH
1/*
2 comedi/drivers/ni_at_a2150.c
3 Driver for National Instruments AT-A2150 boards
4 Copyright (C) 2001, 2002 Frank Mori Hess <fmhess@users.sourceforge.net>
5
6 COMEDI - Linux Control and Measurement Device Interface
7 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22
23************************************************************************
24*/
25/*
26Driver: ni_at_a2150
27Description: National Instruments AT-A2150
28Author: Frank Mori Hess
29Status: works
30Devices: [National Instruments] AT-A2150C (at_a2150c), AT-2150S (at_a2150s)
31
32If you want to ac couple the board's inputs, use AREF_OTHER.
33
34Configuration options:
35 [0] - I/O port base address
36 [1] - IRQ (optional, required for timed conversions)
37 [2] - DMA (optional, required for timed conversions)
38
39*/
40/*
41Yet another driver for obsolete hardware brought to you by Frank Hess.
42Testing and debugging help provided by Dave Andruczyk.
43
44This driver supports the boards:
45
46AT-A2150C
47AT-A2150S
48
49The only difference is their master clock frequencies.
50
51Options:
52 [0] - base io address
53 [1] - irq
54 [2] - dma channel
55
56References (from ftp://ftp.natinst.com/support/manuals):
57
58 320360.pdf AT-A2150 User Manual
59
60TODO:
61
62analog level triggering
63TRIG_WAKE_EOS
64
65*/
66
25436dc9 67#include <linux/interrupt.h>
5a0e3ad6 68#include <linux/slab.h>
01b0a258
FMH
69#include "../comedidev.h"
70
71#include <linux/ioport.h>
72#include <asm/dma.h>
73
74#include "8253.h"
75#include "comedi_fc.h"
76
77#define A2150_SIZE 28
30c687c1 78#define A2150_DMA_BUFFER_SIZE 0xff00 /* size in bytes of dma buffer */
01b0a258 79
30c687c1
BP
80/* #define A2150_DEBUG enable debugging code */
81#undef A2150_DEBUG /* disable debugging code */
01b0a258
FMH
82
83/* Registers and bits */
84#define CONFIG_REG 0x0
85#define CHANNEL_BITS(x) ((x) & 0x7)
86#define CHANNEL_MASK 0x7
87#define CLOCK_SELECT_BITS(x) (((x) & 0x3) << 3)
88#define CLOCK_DIVISOR_BITS(x) (((x) & 0x3) << 5)
89#define CLOCK_MASK (0xf << 3)
30c687c1
BP
90#define ENABLE0_BIT 0x80 /* enable (don't internally ground) channels 0 and 1 */
91#define ENABLE1_BIT 0x100 /* enable (don't internally ground) channels 2 and 3 */
92#define AC0_BIT 0x200 /* ac couple channels 0,1 */
93#define AC1_BIT 0x400 /* ac couple channels 2,3 */
94#define APD_BIT 0x800 /* analog power down */
95#define DPD_BIT 0x1000 /* digital power down */
96#define TRIGGER_REG 0x2 /* trigger config register */
01b0a258
FMH
97#define POST_TRIGGER_BITS 0x2
98#define DELAY_TRIGGER_BITS 0x3
30c687c1
BP
99#define HW_TRIG_EN 0x10 /* enable hardware trigger */
100#define FIFO_START_REG 0x6 /* software start aquistion trigger */
101#define FIFO_RESET_REG 0x8 /* clears fifo + fifo flags */
102#define FIFO_DATA_REG 0xa /* read data */
103#define DMA_TC_CLEAR_REG 0xe /* clear dma terminal count interrupt */
104#define STATUS_REG 0x12 /* read only */
105#define FNE_BIT 0x1 /* fifo not empty */
106#define OVFL_BIT 0x8 /* fifo overflow */
107#define EDAQ_BIT 0x10 /* end of aquisition interrupt */
108#define DCAL_BIT 0x20 /* offset calibration in progress */
109#define INTR_BIT 0x40 /* interrupt has occured */
110#define DMA_TC_BIT 0x80 /* dma terminal count interrupt has occured */
01b0a258 111#define ID_BITS(x) (((x) >> 8) & 0x3)
30c687c1
BP
112#define IRQ_DMA_CNTRL_REG 0x12 /* write only */
113#define DMA_CHAN_BITS(x) ((x) & 0x7) /* sets dma channel */
114#define DMA_EN_BIT 0x8 /* enables dma */
115#define IRQ_LVL_BITS(x) (((x) & 0xf) << 4) /* sets irq level */
116#define FIFO_INTR_EN_BIT 0x100 /* enable fifo interrupts */
117#define FIFO_INTR_FHF_BIT 0x200 /* interrupt fifo half full */
118#define DMA_INTR_EN_BIT 0x800 /* enable interrupt on dma terminal count */
119#define DMA_DEM_EN_BIT 0x1000 /* enables demand mode dma */
01b0a258
FMH
120#define I8253_BASE_REG 0x14
121#define I8253_MODE_REG 0x17
30c687c1 122#define HW_COUNT_DISABLE 0x30 /* disable hardware counting of conversions */
01b0a258 123
92b635c5 124struct a2150_board {
01b0a258 125 const char *name;
30c687c1
BP
126 int clock[4]; /* master clock periods, in nanoseconds */
127 int num_clocks; /* number of available master clock speeds */
128 int ai_speed; /* maximum conversion rate in nanoseconds */
92b635c5 129};
01b0a258 130
30c687c1 131/* analog input range */
9ced1de6 132static const struct comedi_lrange range_a2150 = {
01b0a258
FMH
133 1,
134 {
0a85b6f0
MT
135 RANGE(-2.828, 2.828),
136 }
01b0a258
FMH
137};
138
30c687c1 139/* enum must match board indices */
01b0a258 140enum { a2150_c, a2150_s };
92b635c5 141static const struct a2150_board a2150_boards[] = {
01b0a258 142 {
0a85b6f0
MT
143 .name = "at-a2150c",
144 .clock = {31250, 22676, 20833, 19531},
145 .num_clocks = 4,
146 .ai_speed = 19531,
147 },
01b0a258 148 {
0a85b6f0
MT
149 .name = "at-a2150s",
150 .clock = {62500, 50000, 41667, 0},
151 .num_clocks = 3,
152 .ai_speed = 41667,
153 },
01b0a258
FMH
154};
155
156/*
157 * Useful for shorthand access to the particular board structure
158 */
92b635c5 159#define thisboard ((const struct a2150_board *)dev->board_ptr)
01b0a258 160
3cc3872b
BP
161struct a2150_private {
162
01b0a258 163 volatile unsigned int count; /* number of data points left to be taken */
30c687c1
BP
164 unsigned int dma; /* dma channel */
165 s16 *dma_buffer; /* dma buffer */
166 unsigned int dma_transfer_size; /* size in bytes of dma transfers */
167 int irq_dma_bits; /* irq/dma register bits */
168 int config_bits; /* config register bits */
3cc3872b
BP
169};
170
3cc3872b 171#define devpriv ((struct a2150_private *)dev->private)
01b0a258 172
da91b269
BP
173static int a2150_attach(struct comedi_device *dev, struct comedi_devconfig *it);
174static int a2150_detach(struct comedi_device *dev);
175static int a2150_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
01b0a258 176
139dfbdf 177static struct comedi_driver driver_a2150 = {
68c3dbff
BP
178 .driver_name = "ni_at_a2150",
179 .module = THIS_MODULE,
180 .attach = a2150_attach,
181 .detach = a2150_detach,
01b0a258
FMH
182};
183
70265d24 184static irqreturn_t a2150_interrupt(int irq, void *d);
0a85b6f0
MT
185static int a2150_ai_cmdtest(struct comedi_device *dev,
186 struct comedi_subdevice *s, struct comedi_cmd *cmd);
814900c9
BP
187static int a2150_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
188static int a2150_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
0a85b6f0 189 struct comedi_insn *insn, unsigned int *data);
814900c9 190static int a2150_get_timing(struct comedi_device *dev, unsigned int *period,
0a85b6f0 191 int flags);
814900c9 192static int a2150_probe(struct comedi_device *dev);
0a85b6f0
MT
193static int a2150_set_chanlist(struct comedi_device *dev,
194 unsigned int start_channel,
195 unsigned int num_channels);
01b0a258
FMH
196/*
197 * A convenient macro that defines init_module() and cleanup_module(),
198 * as necessary.
199 */
200COMEDI_INITCLEANUP(driver_a2150);
201
202#ifdef A2150_DEBUG
203
da91b269 204static void ni_dump_regs(struct comedi_device *dev)
01b0a258 205{
5f74ea14
GKH
206 printk("config bits 0x%x\n", devpriv->config_bits);
207 printk("irq dma bits 0x%x\n", devpriv->irq_dma_bits);
208 printk("status bits 0x%x\n", inw(dev->iobase + STATUS_REG));
01b0a258
FMH
209}
210
211#endif
212
213/* interrupt service routine */
70265d24 214static irqreturn_t a2150_interrupt(int irq, void *d)
01b0a258
FMH
215{
216 int i;
217 int status;
218 unsigned long flags;
71b5f4f1 219 struct comedi_device *dev = d;
34c43922 220 struct comedi_subdevice *s = dev->read_subdev;
d163679c 221 struct comedi_async *async;
ea6d0d4c 222 struct comedi_cmd *cmd;
01b0a258 223 unsigned int max_points, num_points, residue, leftover;
790c5541 224 short dpnt;
01b0a258
FMH
225 static const int sample_size = sizeof(devpriv->dma_buffer[0]);
226
227 if (dev->attached == 0) {
228 comedi_error(dev, "premature interrupt");
229 return IRQ_HANDLED;
230 }
30c687c1 231 /* initialize async here to make sure s is not NULL */
01b0a258
FMH
232 async = s->async;
233 async->events = 0;
234 cmd = &async->cmd;
235
236 status = inw(dev->iobase + STATUS_REG);
237
238 if ((status & INTR_BIT) == 0) {
239 comedi_error(dev, "spurious interrupt");
240 return IRQ_NONE;
241 }
242
243 if (status & OVFL_BIT) {
244 comedi_error(dev, "fifo overflow");
245 a2150_cancel(dev, s);
246 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
247 }
248
249 if ((status & DMA_TC_BIT) == 0) {
250 comedi_error(dev, "caught non-dma interrupt? Aborting.");
251 a2150_cancel(dev, s);
252 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
253 comedi_event(dev, s);
254 return IRQ_HANDLED;
255 }
256
257 flags = claim_dma_lock();
258 disable_dma(devpriv->dma);
259 /* clear flip-flop to make sure 2-byte registers for
260 * count and address get set correctly */
261 clear_dma_ff(devpriv->dma);
262
30c687c1 263 /* figure out how many points to read */
01b0a258
FMH
264 max_points = devpriv->dma_transfer_size / sample_size;
265 /* residue is the number of points left to be done on the dma
266 * transfer. It should always be zero at this point unless
267 * the stop_src is set to external triggering.
268 */
269 residue = get_dma_residue(devpriv->dma) / sample_size;
270 num_points = max_points - residue;
271 if (devpriv->count < num_points && cmd->stop_src == TRIG_COUNT)
272 num_points = devpriv->count;
273
30c687c1 274 /* figure out how many points will be stored next time */
01b0a258
FMH
275 leftover = 0;
276 if (cmd->stop_src == TRIG_NONE) {
277 leftover = devpriv->dma_transfer_size / sample_size;
278 } else if (devpriv->count > max_points) {
279 leftover = devpriv->count - max_points;
280 if (leftover > max_points)
281 leftover = max_points;
282 }
283 /* there should only be a residue if collection was stopped by having
284 * the stop_src set to an external trigger, in which case there
285 * will be no more data
286 */
287 if (residue)
288 leftover = 0;
289
290 for (i = 0; i < num_points; i++) {
291 /* write data point to comedi buffer */
292 dpnt = devpriv->dma_buffer[i];
30c687c1 293 /* convert from 2's complement to unsigned coding */
01b0a258
FMH
294 dpnt ^= 0x8000;
295 cfc_write_to_buffer(s, dpnt);
296 if (cmd->stop_src == TRIG_COUNT) {
297 if (--devpriv->count == 0) { /* end of acquisition */
298 a2150_cancel(dev, s);
299 async->events |= COMEDI_CB_EOA;
300 break;
301 }
302 }
303 }
30c687c1 304 /* re-enable dma */
01b0a258
FMH
305 if (leftover) {
306 set_dma_addr(devpriv->dma, virt_to_bus(devpriv->dma_buffer));
307 set_dma_count(devpriv->dma, leftover * sample_size);
308 enable_dma(devpriv->dma);
309 }
310 release_dma_lock(flags);
311
312 async->events |= COMEDI_CB_BLOCK;
313
314 comedi_event(dev, s);
315
316 /* clear interrupt */
317 outw(0x00, dev->iobase + DMA_TC_CLEAR_REG);
318
319 return IRQ_HANDLED;
320}
321
30c687c1 322/* probes board type, returns offset */
da91b269 323static int a2150_probe(struct comedi_device *dev)
01b0a258
FMH
324{
325 int status = inw(dev->iobase + STATUS_REG);
326 return ID_BITS(status);
327}
328
da91b269 329static int a2150_attach(struct comedi_device *dev, struct comedi_devconfig *it)
01b0a258 330{
34c43922 331 struct comedi_subdevice *s;
01b0a258
FMH
332 unsigned long iobase = it->options[0];
333 unsigned int irq = it->options[1];
334 unsigned int dma = it->options[2];
335 static const int timeout = 2000;
336 int i;
337
338 printk("comedi%d: %s: io 0x%lx", dev->minor, driver_a2150.driver_name,
0a85b6f0 339 iobase);
01b0a258
FMH
340 if (irq) {
341 printk(", irq %u", irq);
342 } else {
343 printk(", no irq");
344 }
345 if (dma) {
346 printk(", dma %u", dma);
347 } else {
348 printk(", no dma");
349 }
350 printk("\n");
351
352 /* allocate and initialize dev->private */
3cc3872b 353 if (alloc_private(dev, sizeof(struct a2150_private)) < 0)
01b0a258
FMH
354 return -ENOMEM;
355
356 if (iobase == 0) {
357 printk(" io base address required\n");
358 return -EINVAL;
359 }
360
361 /* check if io addresses are available */
362 if (!request_region(iobase, A2150_SIZE, driver_a2150.driver_name)) {
363 printk(" I/O port conflict\n");
364 return -EIO;
365 }
366 dev->iobase = iobase;
367
368 /* grab our IRQ */
369 if (irq) {
30c687c1 370 /* check that irq is supported */
01b0a258
FMH
371 if (irq < 3 || irq == 8 || irq == 13 || irq > 15) {
372 printk(" invalid irq line %u\n", irq);
373 return -EINVAL;
374 }
5f74ea14 375 if (request_irq(irq, a2150_interrupt, 0,
01b0a258
FMH
376 driver_a2150.driver_name, dev)) {
377 printk("unable to allocate irq %u\n", irq);
378 return -EINVAL;
379 }
380 devpriv->irq_dma_bits |= IRQ_LVL_BITS(irq);
381 dev->irq = irq;
382 }
30c687c1 383 /* initialize dma */
01b0a258
FMH
384 if (dma) {
385 if (dma == 4 || dma > 7) {
386 printk(" invalid dma channel %u\n", dma);
387 return -EINVAL;
388 }
389 if (request_dma(dma, driver_a2150.driver_name)) {
390 printk(" failed to allocate dma channel %u\n", dma);
391 return -EINVAL;
392 }
393 devpriv->dma = dma;
394 devpriv->dma_buffer =
0a85b6f0 395 kmalloc(A2150_DMA_BUFFER_SIZE, GFP_KERNEL | GFP_DMA);
01b0a258
FMH
396 if (devpriv->dma_buffer == NULL)
397 return -ENOMEM;
398
399 disable_dma(dma);
400 set_dma_mode(dma, DMA_MODE_READ);
401
402 devpriv->irq_dma_bits |= DMA_CHAN_BITS(dma);
403 }
404
405 dev->board_ptr = a2150_boards + a2150_probe(dev);
406 dev->board_name = thisboard->name;
407
408 if (alloc_subdevices(dev, 1) < 0)
409 return -ENOMEM;
410
411 /* analog input subdevice */
412 s = dev->subdevices + 0;
413 dev->read_subdev = s;
414 s->type = COMEDI_SUBD_AI;
415 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_OTHER | SDF_CMD_READ;
416 s->n_chan = 4;
417 s->len_chanlist = 4;
418 s->maxdata = 0xffff;
419 s->range_table = &range_a2150;
420 s->do_cmd = a2150_ai_cmd;
421 s->do_cmdtest = a2150_ai_cmdtest;
422 s->insn_read = a2150_ai_rinsn;
423 s->cancel = a2150_cancel;
424
425 /* need to do this for software counting of completed conversions, to
426 * prevent hardware count from stopping aquisition */
427 outw(HW_COUNT_DISABLE, dev->iobase + I8253_MODE_REG);
428
30c687c1 429 /* set card's irq and dma levels */
01b0a258
FMH
430 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
431
30c687c1 432 /* reset and sync adc clock circuitry */
01b0a258
FMH
433 outw_p(DPD_BIT | APD_BIT, dev->iobase + CONFIG_REG);
434 outw_p(DPD_BIT, dev->iobase + CONFIG_REG);
30c687c1 435 /* initialize configuration register */
01b0a258
FMH
436 devpriv->config_bits = 0;
437 outw(devpriv->config_bits, dev->iobase + CONFIG_REG);
30c687c1 438 /* wait until offset calibration is done, then enable analog inputs */
01b0a258
FMH
439 for (i = 0; i < timeout; i++) {
440 if ((DCAL_BIT & inw(dev->iobase + STATUS_REG)) == 0)
441 break;
5f74ea14 442 udelay(1000);
01b0a258
FMH
443 }
444 if (i == timeout) {
0a85b6f0
MT
445 printk
446 (" timed out waiting for offset calibration to complete\n");
01b0a258
FMH
447 return -ETIME;
448 }
449 devpriv->config_bits |= ENABLE0_BIT | ENABLE1_BIT;
450 outw(devpriv->config_bits, dev->iobase + CONFIG_REG);
451
452 return 0;
453};
454
da91b269 455static int a2150_detach(struct comedi_device *dev)
01b0a258
FMH
456{
457 printk("comedi%d: %s: remove\n", dev->minor, driver_a2150.driver_name);
458
459 /* only free stuff if it has been allocated by _attach */
460 if (dev->iobase) {
30c687c1 461 /* put board in power-down mode */
01b0a258
FMH
462 outw(APD_BIT | DPD_BIT, dev->iobase + CONFIG_REG);
463 release_region(dev->iobase, A2150_SIZE);
464 }
465
466 if (dev->irq)
5f74ea14 467 free_irq(dev->irq, dev);
01b0a258
FMH
468 if (devpriv) {
469 if (devpriv->dma)
470 free_dma(devpriv->dma);
471 if (devpriv->dma_buffer)
472 kfree(devpriv->dma_buffer);
473 }
474
475 return 0;
476};
477
da91b269 478static int a2150_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
01b0a258 479{
30c687c1 480 /* disable dma on card */
01b0a258
FMH
481 devpriv->irq_dma_bits &= ~DMA_INTR_EN_BIT & ~DMA_EN_BIT;
482 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
483
30c687c1 484 /* disable computer's dma */
01b0a258
FMH
485 disable_dma(devpriv->dma);
486
30c687c1 487 /* clear fifo and reset triggering circuitry */
01b0a258
FMH
488 outw(0, dev->iobase + FIFO_RESET_REG);
489
490 return 0;
491}
492
0a85b6f0
MT
493static int a2150_ai_cmdtest(struct comedi_device *dev,
494 struct comedi_subdevice *s, struct comedi_cmd *cmd)
01b0a258
FMH
495{
496 int err = 0;
497 int tmp;
498 int startChan;
499 int i;
500
501 /* step 1: make sure trigger sources are trivially valid */
502
503 tmp = cmd->start_src;
504 cmd->start_src &= TRIG_NOW | TRIG_EXT;
505 if (!cmd->start_src || tmp != cmd->start_src)
506 err++;
507
508 tmp = cmd->scan_begin_src;
509 cmd->scan_begin_src &= TRIG_TIMER;
510 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
511 err++;
512
513 tmp = cmd->convert_src;
514 cmd->convert_src &= TRIG_NOW;
515 if (!cmd->convert_src || tmp != cmd->convert_src)
516 err++;
517
518 tmp = cmd->scan_end_src;
519 cmd->scan_end_src &= TRIG_COUNT;
520 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
521 err++;
522
523 tmp = cmd->stop_src;
524 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
525 if (!cmd->stop_src || tmp != cmd->stop_src)
526 err++;
527
528 if (err)
529 return 1;
530
531 /* step 2: make sure trigger sources are unique and mutually compatible */
532
533 if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
534 err++;
535 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
536 err++;
537
538 if (err)
539 return 2;
540
541 /* step 3: make sure arguments are trivially compatible */
542
543 if (cmd->start_arg != 0) {
544 cmd->start_arg = 0;
545 err++;
546 }
547 if (cmd->convert_src == TRIG_TIMER) {
548 if (cmd->convert_arg < thisboard->ai_speed) {
549 cmd->convert_arg = thisboard->ai_speed;
550 err++;
551 }
552 }
553 if (!cmd->chanlist_len) {
554 cmd->chanlist_len = 1;
555 err++;
556 }
557 if (cmd->scan_end_arg != cmd->chanlist_len) {
558 cmd->scan_end_arg = cmd->chanlist_len;
559 err++;
560 }
561 if (cmd->stop_src == TRIG_COUNT) {
562 if (!cmd->stop_arg) {
563 cmd->stop_arg = 1;
564 err++;
565 }
566 } else { /* TRIG_NONE */
567 if (cmd->stop_arg != 0) {
568 cmd->stop_arg = 0;
569 err++;
570 }
571 }
572
573 if (err)
574 return 3;
575
576 /* step 4: fix up any arguments */
577
578 if (cmd->scan_begin_src == TRIG_TIMER) {
579 tmp = cmd->scan_begin_arg;
580 a2150_get_timing(dev, &cmd->scan_begin_arg, cmd->flags);
581 if (tmp != cmd->scan_begin_arg)
582 err++;
583 }
584
585 if (err)
586 return 4;
587
30c687c1 588 /* check channel/gain list against card's limitations */
01b0a258
FMH
589 if (cmd->chanlist) {
590 startChan = CR_CHAN(cmd->chanlist[0]);
591 for (i = 1; i < cmd->chanlist_len; i++) {
592 if (CR_CHAN(cmd->chanlist[i]) != (startChan + i)) {
593 comedi_error(dev,
0a85b6f0 594 "entries in chanlist must be consecutive channels, counting upwards\n");
01b0a258
FMH
595 err++;
596 }
597 }
598 if (cmd->chanlist_len == 2 && CR_CHAN(cmd->chanlist[0]) == 1) {
599 comedi_error(dev,
0a85b6f0 600 "length 2 chanlist must be channels 0,1 or channels 2,3");
01b0a258
FMH
601 err++;
602 }
603 if (cmd->chanlist_len == 3) {
604 comedi_error(dev,
0a85b6f0 605 "chanlist must have 1,2 or 4 channels");
01b0a258
FMH
606 err++;
607 }
608 if (CR_AREF(cmd->chanlist[0]) != CR_AREF(cmd->chanlist[1]) ||
0a85b6f0 609 CR_AREF(cmd->chanlist[2]) != CR_AREF(cmd->chanlist[3])) {
01b0a258 610 comedi_error(dev,
0a85b6f0 611 "channels 0/1 and 2/3 must have the same analog reference");
01b0a258
FMH
612 err++;
613 }
614 }
615
616 if (err)
617 return 5;
618
619 return 0;
620}
621
da91b269 622static int a2150_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
01b0a258 623{
d163679c 624 struct comedi_async *async = s->async;
ea6d0d4c 625 struct comedi_cmd *cmd = &async->cmd;
01b0a258
FMH
626 unsigned long lock_flags;
627 unsigned int old_config_bits = devpriv->config_bits;
628 unsigned int trigger_bits;
629
630 if (!dev->irq || !devpriv->dma) {
631 comedi_error(dev,
0a85b6f0 632 " irq and dma required, cannot do hardware conversions");
01b0a258
FMH
633 return -1;
634 }
635 if (cmd->flags & TRIG_RT) {
636 comedi_error(dev,
0a85b6f0 637 " dma incompatible with hard real-time interrupt (TRIG_RT), aborting");
01b0a258
FMH
638 return -1;
639 }
30c687c1 640 /* clear fifo and reset triggering circuitry */
01b0a258
FMH
641 outw(0, dev->iobase + FIFO_RESET_REG);
642
643 /* setup chanlist */
644 if (a2150_set_chanlist(dev, CR_CHAN(cmd->chanlist[0]),
0a85b6f0 645 cmd->chanlist_len) < 0)
01b0a258
FMH
646 return -1;
647
30c687c1 648 /* setup ac/dc coupling */
01b0a258
FMH
649 if (CR_AREF(cmd->chanlist[0]) == AREF_OTHER)
650 devpriv->config_bits |= AC0_BIT;
651 else
652 devpriv->config_bits &= ~AC0_BIT;
653 if (CR_AREF(cmd->chanlist[2]) == AREF_OTHER)
654 devpriv->config_bits |= AC1_BIT;
655 else
656 devpriv->config_bits &= ~AC1_BIT;
657
30c687c1 658 /* setup timing */
01b0a258
FMH
659 a2150_get_timing(dev, &cmd->scan_begin_arg, cmd->flags);
660
30c687c1 661 /* send timing, channel, config bits */
01b0a258
FMH
662 outw(devpriv->config_bits, dev->iobase + CONFIG_REG);
663
30c687c1 664 /* initialize number of samples remaining */
01b0a258
FMH
665 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
666
30c687c1 667 /* enable computer's dma */
01b0a258
FMH
668 lock_flags = claim_dma_lock();
669 disable_dma(devpriv->dma);
670 /* clear flip-flop to make sure 2-byte registers for
671 * count and address get set correctly */
672 clear_dma_ff(devpriv->dma);
673 set_dma_addr(devpriv->dma, virt_to_bus(devpriv->dma_buffer));
30c687c1 674 /* set size of transfer to fill in 1/3 second */
01b0a258
FMH
675#define ONE_THIRD_SECOND 333333333
676 devpriv->dma_transfer_size =
0a85b6f0
MT
677 sizeof(devpriv->dma_buffer[0]) * cmd->chanlist_len *
678 ONE_THIRD_SECOND / cmd->scan_begin_arg;
01b0a258
FMH
679 if (devpriv->dma_transfer_size > A2150_DMA_BUFFER_SIZE)
680 devpriv->dma_transfer_size = A2150_DMA_BUFFER_SIZE;
681 if (devpriv->dma_transfer_size < sizeof(devpriv->dma_buffer[0]))
682 devpriv->dma_transfer_size = sizeof(devpriv->dma_buffer[0]);
683 devpriv->dma_transfer_size -=
0a85b6f0 684 devpriv->dma_transfer_size % sizeof(devpriv->dma_buffer[0]);
01b0a258
FMH
685 set_dma_count(devpriv->dma, devpriv->dma_transfer_size);
686 enable_dma(devpriv->dma);
687 release_dma_lock(lock_flags);
688
689 /* clear dma interrupt before enabling it, to try and get rid of that
690 * one spurious interrupt that has been happening */
691 outw(0x00, dev->iobase + DMA_TC_CLEAR_REG);
692
30c687c1 693 /* enable dma on card */
01b0a258
FMH
694 devpriv->irq_dma_bits |= DMA_INTR_EN_BIT | DMA_EN_BIT;
695 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
696
30c687c1 697 /* may need to wait 72 sampling periods if timing was changed */
01b0a258
FMH
698 i8254_load(dev->iobase + I8253_BASE_REG, 0, 2, 72, 0);
699
30c687c1 700 /* setup start triggering */
01b0a258 701 trigger_bits = 0;
30c687c1 702 /* decide if we need to wait 72 periods for valid data */
01b0a258 703 if (cmd->start_src == TRIG_NOW &&
0a85b6f0
MT
704 (old_config_bits & CLOCK_MASK) !=
705 (devpriv->config_bits & CLOCK_MASK)) {
30c687c1 706 /* set trigger source to delay trigger */
01b0a258
FMH
707 trigger_bits |= DELAY_TRIGGER_BITS;
708 } else {
30c687c1 709 /* otherwise no delay */
01b0a258
FMH
710 trigger_bits |= POST_TRIGGER_BITS;
711 }
30c687c1 712 /* enable external hardware trigger */
01b0a258
FMH
713 if (cmd->start_src == TRIG_EXT) {
714 trigger_bits |= HW_TRIG_EN;
715 } else if (cmd->start_src == TRIG_OTHER) {
30c687c1 716 /* XXX add support for level/slope start trigger using TRIG_OTHER */
01b0a258
FMH
717 comedi_error(dev, "you shouldn't see this?");
718 }
30c687c1 719 /* send trigger config bits */
01b0a258
FMH
720 outw(trigger_bits, dev->iobase + TRIGGER_REG);
721
30c687c1 722 /* start aquisition for soft trigger */
01b0a258
FMH
723 if (cmd->start_src == TRIG_NOW) {
724 outw(0, dev->iobase + FIFO_START_REG);
725 }
726#ifdef A2150_DEBUG
727 ni_dump_regs(dev);
728#endif
729
730 return 0;
731}
732
da91b269 733static int a2150_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
0a85b6f0 734 struct comedi_insn *insn, unsigned int *data)
01b0a258
FMH
735{
736 unsigned int i, n;
737 static const int timeout = 100000;
738 static const int filter_delay = 36;
739
30c687c1 740 /* clear fifo and reset triggering circuitry */
01b0a258
FMH
741 outw(0, dev->iobase + FIFO_RESET_REG);
742
743 /* setup chanlist */
744 if (a2150_set_chanlist(dev, CR_CHAN(insn->chanspec), 1) < 0)
745 return -1;
746
30c687c1 747 /* set dc coupling */
01b0a258
FMH
748 devpriv->config_bits &= ~AC0_BIT;
749 devpriv->config_bits &= ~AC1_BIT;
750
30c687c1 751 /* send timing, channel, config bits */
01b0a258
FMH
752 outw(devpriv->config_bits, dev->iobase + CONFIG_REG);
753
30c687c1 754 /* disable dma on card */
01b0a258
FMH
755 devpriv->irq_dma_bits &= ~DMA_INTR_EN_BIT & ~DMA_EN_BIT;
756 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
757
30c687c1 758 /* setup start triggering */
01b0a258
FMH
759 outw(0, dev->iobase + TRIGGER_REG);
760
30c687c1 761 /* start aquisition for soft trigger */
01b0a258
FMH
762 outw(0, dev->iobase + FIFO_START_REG);
763
764 /* there is a 35.6 sample delay for data to get through the antialias filter */
765 for (n = 0; n < filter_delay; n++) {
766 for (i = 0; i < timeout; i++) {
767 if (inw(dev->iobase + STATUS_REG) & FNE_BIT)
768 break;
5f74ea14 769 udelay(1);
01b0a258
FMH
770 }
771 if (i == timeout) {
772 comedi_error(dev, "timeout");
773 return -ETIME;
774 }
775 inw(dev->iobase + FIFO_DATA_REG);
776 }
777
30c687c1 778 /* read data */
01b0a258
FMH
779 for (n = 0; n < insn->n; n++) {
780 for (i = 0; i < timeout; i++) {
781 if (inw(dev->iobase + STATUS_REG) & FNE_BIT)
782 break;
5f74ea14 783 udelay(1);
01b0a258
FMH
784 }
785 if (i == timeout) {
786 comedi_error(dev, "timeout");
787 return -ETIME;
788 }
789#ifdef A2150_DEBUG
790 ni_dump_regs(dev);
791#endif
792 data[n] = inw(dev->iobase + FIFO_DATA_REG);
793#ifdef A2150_DEBUG
5f74ea14 794 printk(" data is %i\n", data[n]);
01b0a258
FMH
795#endif
796 data[n] ^= 0x8000;
797 }
798
30c687c1 799 /* clear fifo and reset triggering circuitry */
01b0a258
FMH
800 outw(0, dev->iobase + FIFO_RESET_REG);
801
802 return n;
803}
804
805/* sets bits in devpriv->clock_bits to nearest approximation of requested period,
806 * adjusts requested period to actual timing. */
da91b269 807static int a2150_get_timing(struct comedi_device *dev, unsigned int *period,
0a85b6f0 808 int flags)
01b0a258
FMH
809{
810 int lub, glb, temp;
811 int lub_divisor_shift, lub_index, glb_divisor_shift, glb_index;
812 int i, j;
813
30c687c1 814 /* initialize greatest lower and least upper bounds */
01b0a258
FMH
815 lub_divisor_shift = 3;
816 lub_index = 0;
817 lub = thisboard->clock[lub_index] * (1 << lub_divisor_shift);
818 glb_divisor_shift = 0;
819 glb_index = thisboard->num_clocks - 1;
820 glb = thisboard->clock[glb_index] * (1 << glb_divisor_shift);
821
30c687c1 822 /* make sure period is in available range */
01b0a258
FMH
823 if (*period < glb)
824 *period = glb;
825 if (*period > lub)
826 *period = lub;
827
30c687c1 828 /* we can multiply period by 1, 2, 4, or 8, using (1 << i) */
01b0a258 829 for (i = 0; i < 4; i++) {
30c687c1 830 /* there are a maximum of 4 master clocks */
01b0a258 831 for (j = 0; j < thisboard->num_clocks; j++) {
30c687c1 832 /* temp is the period in nanosec we are evaluating */
01b0a258 833 temp = thisboard->clock[j] * (1 << i);
30c687c1 834 /* if it is the best match yet */
01b0a258
FMH
835 if (temp < lub && temp >= *period) {
836 lub_divisor_shift = i;
837 lub_index = j;
838 lub = temp;
839 }
840 if (temp > glb && temp <= *period) {
841 glb_divisor_shift = i;
842 glb_index = j;
843 glb = temp;
844 }
845 }
846 }
847 flags &= TRIG_ROUND_MASK;
848 switch (flags) {
849 case TRIG_ROUND_NEAREST:
850 default:
30c687c1 851 /* if least upper bound is better approximation */
01b0a258
FMH
852 if (lub - *period < *period - glb) {
853 *period = lub;
854 } else {
855 *period = glb;
856 }
857 break;
858 case TRIG_ROUND_UP:
859 *period = lub;
860 break;
861 case TRIG_ROUND_DOWN:
862 *period = glb;
863 break;
864 }
865
30c687c1 866 /* set clock bits for config register appropriately */
01b0a258
FMH
867 devpriv->config_bits &= ~CLOCK_MASK;
868 if (*period == lub) {
869 devpriv->config_bits |=
0a85b6f0
MT
870 CLOCK_SELECT_BITS(lub_index) |
871 CLOCK_DIVISOR_BITS(lub_divisor_shift);
01b0a258
FMH
872 } else {
873 devpriv->config_bits |=
0a85b6f0
MT
874 CLOCK_SELECT_BITS(glb_index) |
875 CLOCK_DIVISOR_BITS(glb_divisor_shift);
01b0a258
FMH
876 }
877
878 return 0;
879}
880
0a85b6f0
MT
881static int a2150_set_chanlist(struct comedi_device *dev,
882 unsigned int start_channel,
883 unsigned int num_channels)
01b0a258
FMH
884{
885 if (start_channel + num_channels > 4)
886 return -1;
887
888 devpriv->config_bits &= ~CHANNEL_MASK;
889
890 switch (num_channels) {
891 case 1:
892 devpriv->config_bits |= CHANNEL_BITS(0x4 | start_channel);
893 break;
894 case 2:
895 if (start_channel == 0) {
896 devpriv->config_bits |= CHANNEL_BITS(0x2);
897 } else if (start_channel == 2) {
898 devpriv->config_bits |= CHANNEL_BITS(0x3);
899 } else {
900 return -1;
901 }
902 break;
903 case 4:
904 devpriv->config_bits |= CHANNEL_BITS(0x1);
905 break;
906 default:
907 return -1;
908 break;
909 }
910
911 return 0;
912}