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rtc: pcf8523: don't return invalid date when battery is low
[linux-2.6-block.git] / drivers / ssb / pcmcia.c
CommitLineData
61e115a5
MB		 1/*
2 * Sonics Silicon Backplane
3 * PCMCIA-Hostbus related functions
4 *
5 * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
eb032b98 6 * Copyright 2007-2008 Michael Buesch <m@bues.ch>
61e115a5
MB		 7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
b8b6069c
MB		 11#include "ssb_private.h"
12
61e115a5
MB		 13#include <linux/ssb/ssb.h>
14#include <linux/delay.h>
409f2435 15#include <linux/io.h>
e7ec2e32 16#include <linux/etherdevice.h>
61e115a5 17
61e115a5
MB		 18#include <pcmcia/cistpl.h>
19#include <pcmcia/ciscode.h>
20#include <pcmcia/ds.h>
21#include <pcmcia/cisreg.h>
22
61e115a5
MB		 23
24/* Define the following to 1 to enable a printk on each coreswitch. */
25#define SSB_VERBOSE_PCMCIACORESWITCH_DEBUG 0
26
27
e7ec2e32 28/* PCMCIA configuration registers */
e7ec2e32
MB		 29#define SSB_PCMCIA_ADDRESS0 0x2E
30#define SSB_PCMCIA_ADDRESS1 0x30
31#define SSB_PCMCIA_ADDRESS2 0x32
32#define SSB_PCMCIA_MEMSEG 0x34
33#define SSB_PCMCIA_SPROMCTL 0x36
34#define SSB_PCMCIA_SPROMCTL_IDLE 0
35#define SSB_PCMCIA_SPROMCTL_WRITE 1
36#define SSB_PCMCIA_SPROMCTL_READ 2
37#define SSB_PCMCIA_SPROMCTL_WRITEEN 4
38#define SSB_PCMCIA_SPROMCTL_WRITEDIS 7
39#define SSB_PCMCIA_SPROMCTL_DONE 8
40#define SSB_PCMCIA_SPROM_DATALO 0x38
41#define SSB_PCMCIA_SPROM_DATAHI 0x3A
42#define SSB_PCMCIA_SPROM_ADDRLO 0x3C
43#define SSB_PCMCIA_SPROM_ADDRHI 0x3E
44
45/* Hardware invariants CIS tuples */
46#define SSB_PCMCIA_CIS 0x80
47#define SSB_PCMCIA_CIS_ID 0x01
48#define SSB_PCMCIA_CIS_BOARDREV 0x02
49#define SSB_PCMCIA_CIS_PA 0x03
50#define SSB_PCMCIA_CIS_PA_PA0B0_LO 0
51#define SSB_PCMCIA_CIS_PA_PA0B0_HI 1
52#define SSB_PCMCIA_CIS_PA_PA0B1_LO 2
53#define SSB_PCMCIA_CIS_PA_PA0B1_HI 3
54#define SSB_PCMCIA_CIS_PA_PA0B2_LO 4
55#define SSB_PCMCIA_CIS_PA_PA0B2_HI 5
56#define SSB_PCMCIA_CIS_PA_ITSSI 6
57#define SSB_PCMCIA_CIS_PA_MAXPOW 7
58#define SSB_PCMCIA_CIS_OEMNAME 0x04
59#define SSB_PCMCIA_CIS_CCODE 0x05
60#define SSB_PCMCIA_CIS_ANTENNA 0x06
61#define SSB_PCMCIA_CIS_ANTGAIN 0x07
62#define SSB_PCMCIA_CIS_BFLAGS 0x08
63#define SSB_PCMCIA_CIS_LEDS 0x09
64
65/* PCMCIA SPROM size. */
66#define SSB_PCMCIA_SPROM_SIZE 256
67#define SSB_PCMCIA_SPROM_SIZE_BYTES (SSB_PCMCIA_SPROM_SIZE * sizeof(u16))
68
69
70/* Write to a PCMCIA configuration register. */
71static int ssb_pcmcia_cfg_write(struct ssb_bus *bus, u8 offset, u8 value)
72{
e7ec2e32
MB		 73 int res;
74
1d5cc192 75 res = pcmcia_write_config_byte(bus->host_pcmcia, offset, value);
4c89e88b 76 if (unlikely(res != 0))
e7ec2e32
MB		 77 return -EBUSY;
78
79 return 0;
80}
81
82/* Read from a PCMCIA configuration register. */
83static int ssb_pcmcia_cfg_read(struct ssb_bus *bus, u8 offset, u8 *value)
84{
e7ec2e32
MB		 85 int res;
86
1d5cc192 87 res = pcmcia_read_config_byte(bus->host_pcmcia, offset, value);
4c89e88b 88 if (unlikely(res != 0))
e7ec2e32 89 return -EBUSY;
e7ec2e32
MB		 90
91 return 0;
92}
93
61e115a5
MB		 94int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus,
95 u8 coreidx)
96{
61e115a5
MB		 97 int err;
98 int attempts = 0;
99 u32 cur_core;
61e115a5
MB		 100 u32 addr;
101 u32 read_addr;
e7ec2e32 102 u8 val;
61e115a5
MB		 103
104 addr = (coreidx * SSB_CORE_SIZE) + SSB_ENUM_BASE;
105 while (1) {
e7ec2e32
MB		 106 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_ADDRESS0,
107 (addr & 0x0000F000) >> 12);
108 if (err)
61e115a5 109 goto error;
e7ec2e32
MB		 110 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_ADDRESS1,
111 (addr & 0x00FF0000) >> 16);
112 if (err)
61e115a5 113 goto error;
e7ec2e32
MB		 114 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_ADDRESS2,
115 (addr & 0xFF000000) >> 24);
116 if (err)
61e115a5
MB		 117 goto error;
118
119 read_addr = 0;
120
e7ec2e32
MB		 121 err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_ADDRESS0, &val);
122 if (err)
61e115a5 123 goto error;
e7ec2e32
MB		 124 read_addr |= ((u32)(val & 0x0F)) << 12;
125 err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_ADDRESS1, &val);
126 if (err)
61e115a5 127 goto error;
e7ec2e32
MB		 128 read_addr |= ((u32)val) << 16;
129 err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_ADDRESS2, &val);
130 if (err)
61e115a5 131 goto error;
e7ec2e32 132 read_addr |= ((u32)val) << 24;
61e115a5
MB		 133
134 cur_core = (read_addr - SSB_ENUM_BASE) / SSB_CORE_SIZE;
135 if (cur_core == coreidx)
136 break;
137
e7ec2e32 138 err = -ETIMEDOUT;
61e115a5
MB		 139 if (attempts++ > SSB_BAR0_MAX_RETRIES)
140 goto error;
141 udelay(10);
142 }
143
144 return 0;
145error:
b8b6069c 146 pr_err("Failed to switch to core %u\n", coreidx);
e7ec2e32 147 return err;
61e115a5
MB		 148}
149
cf75496b 150static int ssb_pcmcia_switch_core(struct ssb_bus *bus, struct ssb_device *dev)
61e115a5
MB		 151{
152 int err;
61e115a5
MB		 153
154#if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
b8b6069c
MB		 155 pr_info("Switching to %s core, index %d\n",
156 ssb_core_name(dev->id.coreid), dev->core_index);
61e115a5
MB		 157#endif
158
61e115a5
MB		 159 err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
160 if (!err)
161 bus->mapped_device = dev;
61e115a5
MB		 162
163 return err;
164}
165
166int ssb_pcmcia_switch_segment(struct ssb_bus *bus, u8 seg)
167{
168 int attempts = 0;
e7ec2e32
MB		 169 int err;
170 u8 val;
61e115a5 171
209b4375 172 WARN_ON((seg != 0) && (seg != 1));
61e115a5 173 while (1) {
e7ec2e32
MB		 174 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_MEMSEG, seg);
175 if (err)
61e115a5 176 goto error;
e7ec2e32
MB		 177 err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_MEMSEG, &val);
178 if (err)
61e115a5 179 goto error;
e7ec2e32 180 if (val == seg)
61e115a5
MB		 181 break;
182
e7ec2e32 183 err = -ETIMEDOUT;
61e115a5
MB		 184 if (unlikely(attempts++ > SSB_BAR0_MAX_RETRIES))
185 goto error;
186 udelay(10);
187 }
188 bus->mapped_pcmcia_seg = seg;
993e1c78
MB		 189
190 return 0;
61e115a5 191error:
b8b6069c 192 pr_err("Failed to switch pcmcia segment\n");
e7ec2e32 193 return err;
61e115a5
MB		 194}
195
60d78c44
MB		 196static int select_core_and_segment(struct ssb_device *dev,
197 u16 *offset)
61e115a5 198{
60d78c44 199 struct ssb_bus *bus = dev->bus;
61e115a5 200 int err;
60d78c44
MB		 201 u8 need_segment;
202
203 if (*offset >= 0x800) {
204 *offset -= 0x800;
205 need_segment = 1;
206 } else
207 need_segment = 0;
61e115a5
MB		 208
209 if (unlikely(dev != bus->mapped_device)) {
210 err = ssb_pcmcia_switch_core(bus, dev);
211 if (unlikely(err))
212 return err;
213 }
60d78c44
MB		 214 if (unlikely(need_segment != bus->mapped_pcmcia_seg)) {
215 err = ssb_pcmcia_switch_segment(bus, need_segment);
61e115a5
MB		 216 if (unlikely(err))
217 return err;
218 }
61e115a5
MB		 219
220 return 0;
221}
222
ffc7689d
MB		 223static u8 ssb_pcmcia_read8(struct ssb_device *dev, u16 offset)
224{
225 struct ssb_bus *bus = dev->bus;
226 unsigned long flags;
227 int err;
228 u8 value = 0xFF;
229
230 spin_lock_irqsave(&bus->bar_lock, flags);
231 err = select_core_and_segment(dev, &offset);
232 if (likely(!err))
233 value = readb(bus->mmio + offset);
234 spin_unlock_irqrestore(&bus->bar_lock, flags);
235
236 return value;
237}
238
61e115a5
MB		 239static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset)
240{
241 struct ssb_bus *bus = dev->bus;
993e1c78
MB		 242 unsigned long flags;
243 int err;
244 u16 value = 0xFFFF;
61e115a5 245
993e1c78
MB		 246 spin_lock_irqsave(&bus->bar_lock, flags);
247 err = select_core_and_segment(dev, &offset);
248 if (likely(!err))
249 value = readw(bus->mmio + offset);
250 spin_unlock_irqrestore(&bus->bar_lock, flags);
61e115a5 251
993e1c78 252 return value;
61e115a5
MB		 253}
254
255static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset)
256{
257 struct ssb_bus *bus = dev->bus;
993e1c78
MB		 258 unsigned long flags;
259 int err;
260 u32 lo = 0xFFFFFFFF, hi = 0xFFFFFFFF;
61e115a5 261
993e1c78
MB		 262 spin_lock_irqsave(&bus->bar_lock, flags);
263 err = select_core_and_segment(dev, &offset);
264 if (likely(!err)) {
265 lo = readw(bus->mmio + offset);
266 hi = readw(bus->mmio + offset + 2);
267 }
268 spin_unlock_irqrestore(&bus->bar_lock, flags);
61e115a5 269
60d78c44 270 return (lo | (hi << 16));
61e115a5
MB		 271}
272
d625a29b
MB		 273#ifdef CONFIG_SSB_BLOCKIO
274static void ssb_pcmcia_block_read(struct ssb_device *dev, void *buffer,
275 size_t count, u16 offset, u8 reg_width)
276{
277 struct ssb_bus *bus = dev->bus;
278 unsigned long flags;
279 void __iomem *addr = bus->mmio + offset;
280 int err;
281
282 spin_lock_irqsave(&bus->bar_lock, flags);
283 err = select_core_and_segment(dev, &offset);
284 if (unlikely(err)) {
285 memset(buffer, 0xFF, count);
286 goto unlock;
287 }
288 switch (reg_width) {
289 case sizeof(u8): {
290 u8 *buf = buffer;
291
292 while (count) {
293 *buf = __raw_readb(addr);
294 buf++;
295 count--;
296 }
297 break;
298 }
299 case sizeof(u16): {
300 __le16 *buf = buffer;
301
209b4375 302 WARN_ON(count & 1);
d625a29b
MB		 303 while (count) {
304 *buf = (__force __le16)__raw_readw(addr);
305 buf++;
306 count -= 2;
307 }
308 break;
309 }
310 case sizeof(u32): {
311 __le16 *buf = buffer;
312
209b4375 313 WARN_ON(count & 3);
d625a29b
MB		 314 while (count) {
315 *buf = (__force __le16)__raw_readw(addr);
316 buf++;
317 *buf = (__force __le16)__raw_readw(addr + 2);
318 buf++;
319 count -= 4;
320 }
321 break;
322 }
323 default:
209b4375 324 WARN_ON(1);
d625a29b
MB		 325 }
326unlock:
327 spin_unlock_irqrestore(&bus->bar_lock, flags);
328}
329#endif /* CONFIG_SSB_BLOCKIO */
330
ffc7689d
MB		 331static void ssb_pcmcia_write8(struct ssb_device *dev, u16 offset, u8 value)
332{
333 struct ssb_bus *bus = dev->bus;
334 unsigned long flags;
335 int err;
336
337 spin_lock_irqsave(&bus->bar_lock, flags);
338 err = select_core_and_segment(dev, &offset);
339 if (likely(!err))
340 writeb(value, bus->mmio + offset);
341 mmiowb();
342 spin_unlock_irqrestore(&bus->bar_lock, flags);
343}
344
61e115a5
MB		 345static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value)
346{
347 struct ssb_bus *bus = dev->bus;
993e1c78
MB		 348 unsigned long flags;
349 int err;
61e115a5 350
993e1c78
MB		 351 spin_lock_irqsave(&bus->bar_lock, flags);
352 err = select_core_and_segment(dev, &offset);
353 if (likely(!err))
354 writew(value, bus->mmio + offset);
355 mmiowb();
356 spin_unlock_irqrestore(&bus->bar_lock, flags);
61e115a5
MB		 357}
358
359static void ssb_pcmcia_write32(struct ssb_device *dev, u16 offset, u32 value)
360{
361 struct ssb_bus *bus = dev->bus;
993e1c78
MB		 362 unsigned long flags;
363 int err;
61e115a5 364
993e1c78
MB		 365 spin_lock_irqsave(&bus->bar_lock, flags);
366 err = select_core_and_segment(dev, &offset);
367 if (likely(!err)) {
368 writew((value & 0x0000FFFF), bus->mmio + offset);
369 writew(((value & 0xFFFF0000) >> 16), bus->mmio + offset + 2);
370 }
371 mmiowb();
372 spin_unlock_irqrestore(&bus->bar_lock, flags);
61e115a5
MB		 373}
374
d625a29b
MB		 375#ifdef CONFIG_SSB_BLOCKIO
376static void ssb_pcmcia_block_write(struct ssb_device *dev, const void *buffer,
377 size_t count, u16 offset, u8 reg_width)
378{
379 struct ssb_bus *bus = dev->bus;
380 unsigned long flags;
381 void __iomem *addr = bus->mmio + offset;
382 int err;
383
384 spin_lock_irqsave(&bus->bar_lock, flags);
385 err = select_core_and_segment(dev, &offset);
386 if (unlikely(err))
387 goto unlock;
388 switch (reg_width) {
389 case sizeof(u8): {
390 const u8 *buf = buffer;
391
392 while (count) {
393 __raw_writeb(*buf, addr);
394 buf++;
395 count--;
396 }
397 break;
398 }
399 case sizeof(u16): {
400 const __le16 *buf = buffer;
401
209b4375 402 WARN_ON(count & 1);
d625a29b
MB		 403 while (count) {
404 __raw_writew((__force u16)(*buf), addr);
405 buf++;
406 count -= 2;
407 }
408 break;
409 }
410 case sizeof(u32): {
411 const __le16 *buf = buffer;
412
209b4375 413 WARN_ON(count & 3);
d625a29b
MB		 414 while (count) {
415 __raw_writew((__force u16)(*buf), addr);
416 buf++;
417 __raw_writew((__force u16)(*buf), addr + 2);
418 buf++;
419 count -= 4;
420 }
421 break;
422 }
423 default:
209b4375 424 WARN_ON(1);
d625a29b
MB		 425 }
426unlock:
427 mmiowb();
428 spin_unlock_irqrestore(&bus->bar_lock, flags);
429}
430#endif /* CONFIG_SSB_BLOCKIO */
431
61e115a5
MB		 432/* Not "static", as it's used in main.c */
433const struct ssb_bus_ops ssb_pcmcia_ops = {
ffc7689d 434 .read8 = ssb_pcmcia_read8,
61e115a5
MB		 435 .read16 = ssb_pcmcia_read16,
436 .read32 = ssb_pcmcia_read32,
ffc7689d 437 .write8 = ssb_pcmcia_write8,
61e115a5
MB		 438 .write16 = ssb_pcmcia_write16,
439 .write32 = ssb_pcmcia_write32,
d625a29b
MB		 440#ifdef CONFIG_SSB_BLOCKIO
441 .block_read = ssb_pcmcia_block_read,
442 .block_write = ssb_pcmcia_block_write,
443#endif
61e115a5
MB		 444};
445
e7ec2e32
MB		 446static int ssb_pcmcia_sprom_command(struct ssb_bus *bus, u8 command)
447{
448 unsigned int i;
449 int err;
450 u8 value;
451
452 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROMCTL, command);
453 if (err)
454 return err;
455 for (i = 0; i < 1000; i++) {
456 err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_SPROMCTL, &value);
457 if (err)
458 return err;
459 if (value & SSB_PCMCIA_SPROMCTL_DONE)
460 return 0;
461 udelay(10);
462 }
463
464 return -ETIMEDOUT;
465}
466
467/* offset is the 16bit word offset */
468static int ssb_pcmcia_sprom_read(struct ssb_bus *bus, u16 offset, u16 *value)
469{
470 int err;
471 u8 lo, hi;
472
473 offset *= 2; /* Make byte offset */
474
475 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_ADDRLO,
476 (offset & 0x00FF));
477 if (err)
478 return err;
479 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_ADDRHI,
480 (offset & 0xFF00) >> 8);
481 if (err)
482 return err;
483 err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_READ);
484 if (err)
485 return err;
486 err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_SPROM_DATALO, &lo);
487 if (err)
488 return err;
489 err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_SPROM_DATAHI, &hi);
490 if (err)
491 return err;
492 *value = (lo | (((u16)hi) << 8));
493
494 return 0;
495}
496
497/* offset is the 16bit word offset */
498static int ssb_pcmcia_sprom_write(struct ssb_bus *bus, u16 offset, u16 value)
499{
500 int err;
501
502 offset *= 2; /* Make byte offset */
503
504 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_ADDRLO,
505 (offset & 0x00FF));
506 if (err)
507 return err;
508 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_ADDRHI,
509 (offset & 0xFF00) >> 8);
510 if (err)
511 return err;
512 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_DATALO,
513 (value & 0x00FF));
514 if (err)
515 return err;
516 err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_DATAHI,
517 (value & 0xFF00) >> 8);
518 if (err)
519 return err;
520 err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITE);
521 if (err)
522 return err;
523 msleep(20);
524
525 return 0;
526}
527
528/* Read the SPROM image. bufsize is in 16bit words. */
529static int ssb_pcmcia_sprom_read_all(struct ssb_bus *bus, u16 *sprom)
530{
531 int err, i;
532
533 for (i = 0; i < SSB_PCMCIA_SPROM_SIZE; i++) {
534 err = ssb_pcmcia_sprom_read(bus, i, &sprom[i]);
535 if (err)
536 return err;
537 }
538
539 return 0;
540}
541
542/* Write the SPROM image. size is in 16bit words. */
543static int ssb_pcmcia_sprom_write_all(struct ssb_bus *bus, const u16 *sprom)
544{
545 int i, err;
546 bool failed = 0;
547 size_t size = SSB_PCMCIA_SPROM_SIZE;
548
b8b6069c 549 pr_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
e7ec2e32
MB		 550 err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEEN);
551 if (err) {
b8b6069c 552 pr_notice("Could not enable SPROM write access\n");
e7ec2e32
MB		 553 return -EBUSY;
554 }
b8b6069c 555 pr_notice("[ 0%%");
e7ec2e32
MB		 556 msleep(500);
557 for (i = 0; i < size; i++) {
558 if (i == size / 4)
b8b6069c 559 pr_cont("25%%");
e7ec2e32 560 else if (i == size / 2)
b8b6069c 561 pr_cont("50%%");
e7ec2e32 562 else if (i == (size * 3) / 4)
b8b6069c 563 pr_cont("75%%");
e7ec2e32 564 else if (i % 2)
b8b6069c 565 pr_cont(".");
e7ec2e32
MB		 566 err = ssb_pcmcia_sprom_write(bus, i, sprom[i]);
567 if (err) {
b8b6069c 568 pr_notice("Failed to write to SPROM\n");
e7ec2e32
MB		 569 failed = 1;
570 break;
571 }
572 }
573 err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEDIS);
574 if (err) {
b8b6069c 575 pr_notice("Could not disable SPROM write access\n");
e7ec2e32
MB		 576 failed = 1;
577 }
578 msleep(500);
579 if (!failed) {
b8b6069c
MB		 580 pr_cont("100%% ]\n");
581 pr_notice("SPROM written\n");
e7ec2e32
MB		 582 }
583
584 return failed ? -EBUSY : 0;
585}
586
587static int ssb_pcmcia_sprom_check_crc(const u16 *sprom, size_t size)
588{
589 //TODO
590 return 0;
591}
592
593#define GOTO_ERROR_ON(condition, description) do { \
594 if (unlikely(condition)) { \
595 error_description = description; \
596 goto error; \
597 } \
598 } while (0)
599
37ace3d4
DB		 600static int ssb_pcmcia_get_mac(struct pcmcia_device *p_dev,
601 tuple_t *tuple,
602 void *priv)
61e115a5 603{
37ace3d4
DB		 604 struct ssb_sprom *sprom = priv;
605
606 if (tuple->TupleData[0] != CISTPL_FUNCE_LAN_NODE_ID)
607 return -EINVAL;
608 if (tuple->TupleDataLen != ETH_ALEN + 2)
609 return -EINVAL;
610 if (tuple->TupleData[1] != ETH_ALEN)
611 return -EINVAL;
612 memcpy(sprom->il0mac, &tuple->TupleData[2], ETH_ALEN);
613 return 0;
614};
615
616static int ssb_pcmcia_do_get_invariants(struct pcmcia_device *p_dev,
617 tuple_t *tuple,
618 void *priv)
619{
620 struct ssb_init_invariants *iv = priv;
e7ec2e32
MB		 621 struct ssb_sprom *sprom = &iv->sprom;
622 struct ssb_boardinfo *bi = &iv->boardinfo;
623 const char *error_description;
624
37ace3d4
DB		 625 GOTO_ERROR_ON(tuple->TupleDataLen < 1, "VEN tpl < 1");
626 switch (tuple->TupleData[0]) {
627 case SSB_PCMCIA_CIS_ID:
628 GOTO_ERROR_ON((tuple->TupleDataLen != 5) &&
629 (tuple->TupleDataLen != 7),
630 "id tpl size");
631 bi->vendor = tuple->TupleData[1] |
632 ((u16)tuple->TupleData[2] << 8);
633 break;
634 case SSB_PCMCIA_CIS_BOARDREV:
635 GOTO_ERROR_ON(tuple->TupleDataLen != 2,
636 "boardrev tpl size");
637 sprom->board_rev = tuple->TupleData[1];
638 break;
639 case SSB_PCMCIA_CIS_PA:
640 GOTO_ERROR_ON((tuple->TupleDataLen != 9) &&
641 (tuple->TupleDataLen != 10),
642 "pa tpl size");
643 sprom->pa0b0 = tuple->TupleData[1] |
644 ((u16)tuple->TupleData[2] << 8);
645 sprom->pa0b1 = tuple->TupleData[3] |
646 ((u16)tuple->TupleData[4] << 8);
647 sprom->pa0b2 = tuple->TupleData[5] |
648 ((u16)tuple->TupleData[6] << 8);
649 sprom->itssi_a = tuple->TupleData[7];
650 sprom->itssi_bg = tuple->TupleData[7];
651 sprom->maxpwr_a = tuple->TupleData[8];
652 sprom->maxpwr_bg = tuple->TupleData[8];
653 break;
654 case SSB_PCMCIA_CIS_OEMNAME:
655 /* We ignore this. */
656 break;
657 case SSB_PCMCIA_CIS_CCODE:
658 GOTO_ERROR_ON(tuple->TupleDataLen != 2,
659 "ccode tpl size");
660 sprom->country_code = tuple->TupleData[1];
661 break;
662 case SSB_PCMCIA_CIS_ANTENNA:
663 GOTO_ERROR_ON(tuple->TupleDataLen != 2,
664 "ant tpl size");
665 sprom->ant_available_a = tuple->TupleData[1];
666 sprom->ant_available_bg = tuple->TupleData[1];
667 break;
668 case SSB_PCMCIA_CIS_ANTGAIN:
669 GOTO_ERROR_ON(tuple->TupleDataLen != 2,
670 "antg tpl size");
f8f8a660
HM		 671 sprom->antenna_gain.a0 = tuple->TupleData[1];
672 sprom->antenna_gain.a1 = tuple->TupleData[1];
673 sprom->antenna_gain.a2 = tuple->TupleData[1];
674 sprom->antenna_gain.a3 = tuple->TupleData[1];
37ace3d4
DB		 675 break;
676 case SSB_PCMCIA_CIS_BFLAGS:
677 GOTO_ERROR_ON((tuple->TupleDataLen != 3) &&
678 (tuple->TupleDataLen != 5),
679 "bfl tpl size");
680 sprom->boardflags_lo = tuple->TupleData[1] |
681 ((u16)tuple->TupleData[2] << 8);
682 break;
683 case SSB_PCMCIA_CIS_LEDS:
684 GOTO_ERROR_ON(tuple->TupleDataLen != 5,
685 "leds tpl size");
686 sprom->gpio0 = tuple->TupleData[1];
687 sprom->gpio1 = tuple->TupleData[2];
688 sprom->gpio2 = tuple->TupleData[3];
689 sprom->gpio3 = tuple->TupleData[4];
690 break;
691 }
692 return -ENOSPC; /* continue with next entry */
693
694error:
b8b6069c
MB		 695 pr_err("PCMCIA: Failed to fetch device invariants: %s\n",
696 error_description);
37ace3d4
DB		 697 return -ENODEV;
698}
699
700
701int ssb_pcmcia_get_invariants(struct ssb_bus *bus,
702 struct ssb_init_invariants *iv)
703{
704 struct ssb_sprom *sprom = &iv->sprom;
705 int res;
706
e7ec2e32
MB		 707 memset(sprom, 0xFF, sizeof(*sprom));
708 sprom->revision = 1;
709 sprom->boardflags_lo = 0;
710 sprom->boardflags_hi = 0;
711
712 /* First fetch the MAC address. */
37ace3d4
DB		 713 res = pcmcia_loop_tuple(bus->host_pcmcia, CISTPL_FUNCE,
714 ssb_pcmcia_get_mac, sprom);
715 if (res != 0) {
b8b6069c 716 pr_err("PCMCIA: Failed to fetch MAC address\n");
37ace3d4 717 return -ENODEV;
e7ec2e32 718 }
e7ec2e32
MB		 719
720 /* Fetch the vendor specific tuples. */
37ace3d4 721 res = pcmcia_loop_tuple(bus->host_pcmcia, SSB_PCMCIA_CIS,
dd3cb633 722 ssb_pcmcia_do_get_invariants, iv);
37ace3d4
DB		 723 if ((res == 0) || (res == -ENOSPC))
724 return 0;
e7ec2e32 725
b8b6069c 726 pr_err("PCMCIA: Failed to fetch device invariants\n");
e7ec2e32
MB		 727 return -ENODEV;
728}
729
730static ssize_t ssb_pcmcia_attr_sprom_show(struct device *pcmciadev,
731 struct device_attribute *attr,
732 char *buf)
733{
734 struct pcmcia_device *pdev =
735 container_of(pcmciadev, struct pcmcia_device, dev);
736 struct ssb_bus *bus;
737
738 bus = ssb_pcmcia_dev_to_bus(pdev);
739 if (!bus)
740 return -ENODEV;
741
742 return ssb_attr_sprom_show(bus, buf,
743 ssb_pcmcia_sprom_read_all);
744}
745
746static ssize_t ssb_pcmcia_attr_sprom_store(struct device *pcmciadev,
747 struct device_attribute *attr,
748 const char *buf, size_t count)
749{
750 struct pcmcia_device *pdev =
751 container_of(pcmciadev, struct pcmcia_device, dev);
752 struct ssb_bus *bus;
753
754 bus = ssb_pcmcia_dev_to_bus(pdev);
755 if (!bus)
756 return -ENODEV;
757
758 return ssb_attr_sprom_store(bus, buf, count,
759 ssb_pcmcia_sprom_check_crc,
760 ssb_pcmcia_sprom_write_all);
761}
762
763static DEVICE_ATTR(ssb_sprom, 0600,
764 ssb_pcmcia_attr_sprom_show,
765 ssb_pcmcia_attr_sprom_store);
766
9788ba75
MB		 767static int ssb_pcmcia_cor_setup(struct ssb_bus *bus, u8 cor)
768{
769 u8 val;
770 int err;
771
772 err = ssb_pcmcia_cfg_read(bus, cor, &val);
773 if (err)
774 return err;
775 val &= ~COR_SOFT_RESET;
776 val |= COR_FUNC_ENA | COR_IREQ_ENA | COR_LEVEL_REQ;
777 err = ssb_pcmcia_cfg_write(bus, cor, val);
778 if (err)
779 return err;
780 msleep(40);
781
782 return 0;
783}
784
8fe2b65a
MB		 785/* Initialize the PCMCIA hardware. This is called on Init and Resume. */
786int ssb_pcmcia_hardware_setup(struct ssb_bus *bus)
787{
788 int err;
789
790 if (bus->bustype != SSB_BUSTYPE_PCMCIA)
791 return 0;
792
793 /* Switch segment to a known state and sync
794 * bus->mapped_pcmcia_seg with hardware state. */
795 ssb_pcmcia_switch_segment(bus, 0);
796 /* Init the COR register. */
797 err = ssb_pcmcia_cor_setup(bus, CISREG_COR);
798 if (err)
799 return err;
800 /* Some cards also need this register to get poked. */
801 err = ssb_pcmcia_cor_setup(bus, CISREG_COR + 0x80);
802 if (err)
803 return err;
804
805 return 0;
806}
807
e7ec2e32
MB		 808void ssb_pcmcia_exit(struct ssb_bus *bus)
809{
810 if (bus->bustype != SSB_BUSTYPE_PCMCIA)
811 return;
812
813 device_remove_file(&bus->host_pcmcia->dev, &dev_attr_ssb_sprom);
61e115a5
MB		 814}
815
816int ssb_pcmcia_init(struct ssb_bus *bus)
817{
61e115a5
MB		 818 int err;
819
820 if (bus->bustype != SSB_BUSTYPE_PCMCIA)
821 return 0;
822
8fe2b65a 823 err = ssb_pcmcia_hardware_setup(bus);
e7ec2e32
MB		 824 if (err)
825 goto error;
826
827 bus->sprom_size = SSB_PCMCIA_SPROM_SIZE;
828 mutex_init(&bus->sprom_mutex);
829 err = device_create_file(&bus->host_pcmcia->dev, &dev_attr_ssb_sprom);
830 if (err)
61e115a5
MB		 831 goto error;
832
833 return 0;
834error:
b8b6069c 835 pr_err("Failed to initialize PCMCIA host device\n");
e7ec2e32 836 return err;
61e115a5 837}
Linux 6.x block layer and io_uring tree(s)