[linux-2.6-block.git] / drivers / serial / timbuart.c

/*
 * timbuart.c timberdale FPGA UART driver
 * Copyright (c) 2009 Intel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

/* Supports:
 * Timberdale FPGA UART
 */

#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/serial_core.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/slab.h>

#include "timbuart.h"

struct timbuart_port {
	struct uart_port	port;
	struct tasklet_struct	tasklet;
	int			usedma;
	u32			last_ier;
	struct platform_device  *dev;
};

static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
	921600, 1843200, 3250000};

static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);

static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);

static void timbuart_stop_rx(struct uart_port *port)
{
	/* spin lock held by upper layer, disable all RX interrupts */
	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
	iowrite32(ier, port->membase + TIMBUART_IER);
}

static void timbuart_stop_tx(struct uart_port *port)
{
	/* spinlock held by upper layer, disable TX interrupt */
	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
	iowrite32(ier, port->membase + TIMBUART_IER);
}

static void timbuart_start_tx(struct uart_port *port)
{
	struct timbuart_port *uart =
		container_of(port, struct timbuart_port, port);

	/* do not transfer anything here -> fire off the tasklet */
	tasklet_schedule(&uart->tasklet);
}

static void timbuart_flush_buffer(struct uart_port *port)
{
	u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | TIMBUART_CTRL_FLSHTX;

	iowrite8(ctl, port->membase + TIMBUART_CTRL);
	iowrite32(TXBF, port->membase + TIMBUART_ISR);
}

static void timbuart_rx_chars(struct uart_port *port)
{
	struct tty_struct *tty = port->state->port.tty;

	while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
		u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
		port->icount.rx++;
		tty_insert_flip_char(tty, ch, TTY_NORMAL);
	}

	spin_unlock(&port->lock);
	tty_flip_buffer_push(port->state->port.tty);
	spin_lock(&port->lock);

	dev_dbg(port->dev, "%s - total read %d bytes\n",
		__func__, port->icount.rx);
}

static void timbuart_tx_chars(struct uart_port *port)
{
	struct circ_buf *xmit = &port->state->xmit;

	while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
		!uart_circ_empty(xmit)) {
		iowrite8(xmit->buf[xmit->tail],
			port->membase + TIMBUART_TXFIFO);
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
	}

	dev_dbg(port->dev,
		"%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
		 __func__,
		port->icount.tx,
		ioread8(port->membase + TIMBUART_CTRL),
		port->mctrl & TIOCM_RTS,
		ioread8(port->membase + TIMBUART_BAUDRATE));
}

static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
{
	struct timbuart_port *uart =
		container_of(port, struct timbuart_port, port);
	struct circ_buf *xmit = &port->state->xmit;

	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
		return;

	if (port->x_char)
		return;

	if (isr & TXFLAGS) {
		timbuart_tx_chars(port);
		/* clear all TX interrupts */
		iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);

		if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
			uart_write_wakeup(port);
	} else
		/* Re-enable any tx interrupt */
		*ier |= uart->last_ier & TXFLAGS;

	/* enable interrupts if there are chars in the transmit buffer,
	 * Or if we delivered some bytes and want the almost empty interrupt
	 * we wake up the upper layer later when we got the interrupt
	 * to give it some time to go out...
	 */
	if (!uart_circ_empty(xmit))
		*ier |= TXBAE;

	dev_dbg(port->dev, "%s - leaving\n", __func__);
}

void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
{
	if (isr & RXFLAGS) {
		/* Some RX status is set */
		if (isr & RXBF) {
			u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
				TIMBUART_CTRL_FLSHRX;
			iowrite8(ctl, port->membase + TIMBUART_CTRL);
			port->icount.overrun++;
		} else if (isr & (RXDP))
			timbuart_rx_chars(port);

		/* ack all RX interrupts */
		iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
	}

	/* always have the RX interrupts enabled */
	*ier |= RXBAF | RXBF | RXTT;

	dev_dbg(port->dev, "%s - leaving\n", __func__);
}

void timbuart_tasklet(unsigned long arg)
{
	struct timbuart_port *uart = (struct timbuart_port *)arg;
	u32 isr, ier = 0;

	spin_lock(&uart->port.lock);

	isr = ioread32(uart->port.membase + TIMBUART_ISR);
	dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);

	if (!uart->usedma)
		timbuart_handle_tx_port(&uart->port, isr, &ier);

	timbuart_mctrl_check(&uart->port, isr, &ier);

	if (!uart->usedma)
		timbuart_handle_rx_port(&uart->port, isr, &ier);

	iowrite32(ier, uart->port.membase + TIMBUART_IER);

	spin_unlock(&uart->port.lock);
	dev_dbg(uart->port.dev, "%s leaving\n", __func__);
}

static unsigned int timbuart_tx_empty(struct uart_port *port)
{
	u32 isr = ioread32(port->membase + TIMBUART_ISR);

	return (isr & TXBE) ? TIOCSER_TEMT : 0;
}

static unsigned int timbuart_get_mctrl(struct uart_port *port)
{
	u8 cts = ioread8(port->membase + TIMBUART_CTRL);
	dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);

	if (cts & TIMBUART_CTRL_CTS)
		return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
	else
		return TIOCM_DSR | TIOCM_CAR;
}

static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
	dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);

	if (mctrl & TIOCM_RTS)
		iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
	else
		iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
}

static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
{
	unsigned int cts;

	if (isr & CTS_DELTA) {
		/* ack */
		iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
		cts = timbuart_get_mctrl(port);
		uart_handle_cts_change(port, cts & TIOCM_CTS);
		wake_up_interruptible(&port->state->port.delta_msr_wait);
	}

	*ier |= CTS_DELTA;
}

static void timbuart_enable_ms(struct uart_port *port)
{
	/* N/A */
}

static void timbuart_break_ctl(struct uart_port *port, int ctl)
{
	/* N/A */
}

static int timbuart_startup(struct uart_port *port)
{
	struct timbuart_port *uart =
		container_of(port, struct timbuart_port, port);

	dev_dbg(port->dev, "%s\n", __func__);

	iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
	iowrite32(0x1ff, port->membase + TIMBUART_ISR);
	/* Enable all but TX interrupts */
	iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
		port->membase + TIMBUART_IER);

	return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
		"timb-uart", uart);
}

static void timbuart_shutdown(struct uart_port *port)
{
	struct timbuart_port *uart =
		container_of(port, struct timbuart_port, port);
	dev_dbg(port->dev, "%s\n", __func__);
	free_irq(port->irq, uart);
	iowrite32(0, port->membase + TIMBUART_IER);
}

static int get_bindex(int baud)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(baudrates); i++)
		if (baud <= baudrates[i])
			return i;

	return -1;
}

static void timbuart_set_termios(struct uart_port *port,
	struct ktermios *termios,
	struct ktermios *old)
{
	unsigned int baud;
	short bindex;
	unsigned long flags;

	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
	bindex = get_bindex(baud);
	dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);

	if (bindex < 0)
		bindex = 0;
	baud = baudrates[bindex];

	/* The serial layer calls into this once with old = NULL when setting
	   up initially */
	if (old)
		tty_termios_copy_hw(termios, old);
	tty_termios_encode_baud_rate(termios, baud, baud);

	spin_lock_irqsave(&port->lock, flags);
	iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
	uart_update_timeout(port, termios->c_cflag, baud);
	spin_unlock_irqrestore(&port->lock, flags);
}

static const char *timbuart_type(struct uart_port *port)
{
	return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
}

/* We do not request/release mappings of the registers here,
 * currently it's done in the proble function.
 */
static void timbuart_release_port(struct uart_port *port)
{
	struct platform_device *pdev = to_platform_device(port->dev);
	int size =
		resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));

	if (port->flags & UPF_IOREMAP) {
		iounmap(port->membase);
		port->membase = NULL;
	}

	release_mem_region(port->mapbase, size);
}

static int timbuart_request_port(struct uart_port *port)
{
	struct platform_device *pdev = to_platform_device(port->dev);
	int size =
		resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));

	if (!request_mem_region(port->mapbase, size, "timb-uart"))
		return -EBUSY;

	if (port->flags & UPF_IOREMAP) {
		port->membase = ioremap(port->mapbase, size);
		if (port->membase == NULL) {
			release_mem_region(port->mapbase, size);
			return -ENOMEM;
		}
	}

	return 0;
}

static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
{
	struct timbuart_port *uart = (struct timbuart_port *)devid;

	if (ioread8(uart->port.membase + TIMBUART_IPR)) {
		uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);

		/* disable interrupts, the tasklet enables them again */
		iowrite32(0, uart->port.membase + TIMBUART_IER);

		/* fire off bottom half */
		tasklet_schedule(&uart->tasklet);

		return IRQ_HANDLED;
	} else
		return IRQ_NONE;
}

/*
 * Configure/autoconfigure the port.
 */
static void timbuart_config_port(struct uart_port *port, int flags)
{
	if (flags & UART_CONFIG_TYPE) {
		port->type = PORT_TIMBUART;
		timbuart_request_port(port);
	}
}

static int timbuart_verify_port(struct uart_port *port,
	struct serial_struct *ser)
{
	/* we don't want the core code to modify any port params */
	return -EINVAL;
}

static struct uart_ops timbuart_ops = {
	.tx_empty = timbuart_tx_empty,
	.set_mctrl = timbuart_set_mctrl,
	.get_mctrl = timbuart_get_mctrl,
	.stop_tx = timbuart_stop_tx,
	.start_tx = timbuart_start_tx,
	.flush_buffer = timbuart_flush_buffer,
	.stop_rx = timbuart_stop_rx,
	.enable_ms = timbuart_enable_ms,
	.break_ctl = timbuart_break_ctl,
	.startup = timbuart_startup,
	.shutdown = timbuart_shutdown,
	.set_termios = timbuart_set_termios,
	.type = timbuart_type,
	.release_port = timbuart_release_port,
	.request_port = timbuart_request_port,
	.config_port = timbuart_config_port,
	.verify_port = timbuart_verify_port
};

static struct uart_driver timbuart_driver = {
	.owner = THIS_MODULE,
	.driver_name = "timberdale_uart",
	.dev_name = "ttyTU",
	.major = TIMBUART_MAJOR,
	.minor = TIMBUART_MINOR,
	.nr = 1
};

static int timbuart_probe(struct platform_device *dev)
{
	int err, irq;
	struct timbuart_port *uart;
	struct resource *iomem;

	dev_dbg(&dev->dev, "%s\n", __func__);

	uart = kzalloc(sizeof(*uart), GFP_KERNEL);
	if (!uart) {
		err = -EINVAL;
		goto err_mem;
	}

	uart->usedma = 0;

	uart->port.uartclk = 3250000 * 16;
	uart->port.fifosize  = TIMBUART_FIFO_SIZE;
	uart->port.regshift  = 2;
	uart->port.iotype  = UPIO_MEM;
	uart->port.ops = &timbuart_ops;
	uart->port.irq = 0;
	uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
	uart->port.line  = 0;
	uart->port.dev	= &dev->dev;

	iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (!iomem) {
		err = -ENOMEM;
		goto err_register;
	}
	uart->port.mapbase = iomem->start;
	uart->port.membase = NULL;

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		err = -EINVAL;
		goto err_register;
	}
	uart->port.irq = irq;

	tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);

	err = uart_register_driver(&timbuart_driver);
	if (err)
		goto err_register;

	err = uart_add_one_port(&timbuart_driver, &uart->port);
	if (err)
		goto err_add_port;

	platform_set_drvdata(dev, uart);

	return 0;

err_add_port:
	uart_unregister_driver(&timbuart_driver);
err_register:
	kfree(uart);
err_mem:
	printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
		err);

	return err;
}

static int timbuart_remove(struct platform_device *dev)
{
	struct timbuart_port *uart = platform_get_drvdata(dev);

	tasklet_kill(&uart->tasklet);
	uart_remove_one_port(&timbuart_driver, &uart->port);
	uart_unregister_driver(&timbuart_driver);
	kfree(uart);

	return 0;
}

static struct platform_driver timbuart_platform_driver = {
	.driver = {
		.name	= "timb-uart",
		.owner	= THIS_MODULE,
	},
	.probe		= timbuart_probe,
	.remove		= timbuart_remove,
};

/*--------------------------------------------------------------------------*/

static int __init timbuart_init(void)
{
	return platform_driver_register(&timbuart_platform_driver);
}

static void __exit timbuart_exit(void)
{
	platform_driver_unregister(&timbuart_platform_driver);
}

module_init(timbuart_init);
module_exit(timbuart_exit);

MODULE_DESCRIPTION("Timberdale UART driver");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:timb-uart");
Commit	Line	Data
34aec591 RR	1	/*
	2	* timbuart.c timberdale FPGA UART driver
	3	* Copyright (c) 2009 Intel Corporation
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	17	*/
	18
	19	/* Supports:
	20	* Timberdale FPGA UART
	21	*/
	22
	23	#include <linux/pci.h>
	24	#include <linux/interrupt.h>
	25	#include <linux/serial_core.h>
	26	#include <linux/kernel.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/ioport.h>
5a0e3ad6	29	#include <linux/slab.h>
34aec591 RR	30
	31	#include "timbuart.h"
	32
	33	struct timbuart_port {
	34	struct uart_port port;
	35	struct tasklet_struct tasklet;
	36	int usedma;
2421c48b	37	u32 last_ier;
34aec591 RR	38	struct platform_device *dev;
	39	};
	40
	41	static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
	42	921600, 1843200, 3250000};
	43
2421c48b	44	static void timbuart_mctrl_check(struct uart_port port, u32 isr, u32 ier);
34aec591 RR	45
	46	static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
	47
	48	static void timbuart_stop_rx(struct uart_port *port)
	49	{
	50	/* spin lock held by upper layer, disable all RX interrupts */
2421c48b RR	51	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
2421c48b RR	52	iowrite32(ier, port->membase + TIMBUART_IER);
34aec591 RR	53	}
	54
	55	static void timbuart_stop_tx(struct uart_port *port)
	56	{
	57	/* spinlock held by upper layer, disable TX interrupt */
2421c48b RR	58	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
2421c48b RR	59	iowrite32(ier, port->membase + TIMBUART_IER);
34aec591 RR	60	}
	61
	62	static void timbuart_start_tx(struct uart_port *port)
	63	{
	64	struct timbuart_port *uart =
	65	container_of(port, struct timbuart_port, port);
	66
	67	/* do not transfer anything here -> fire off the tasklet */
	68	tasklet_schedule(&uart->tasklet);
	69	}
	70
	71	static void timbuart_flush_buffer(struct uart_port *port)
	72	{
	73	u8 ctl = ioread8(port->membase + TIMBUART_CTRL) \| TIMBUART_CTRL_FLSHTX;
	74
	75	iowrite8(ctl, port->membase + TIMBUART_CTRL);
2421c48b	76	iowrite32(TXBF, port->membase + TIMBUART_ISR);
34aec591 RR	77	}
	78
	79	static void timbuart_rx_chars(struct uart_port *port)
	80	{
ebd2c8f6	81	struct tty_struct *tty = port->state->port.tty;
34aec591	82
2421c48b	83	while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
34aec591 RR	84	u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
	85	port->icount.rx++;
	86	tty_insert_flip_char(tty, ch, TTY_NORMAL);
	87	}
	88
	89	spin_unlock(&port->lock);
ebd2c8f6	90	tty_flip_buffer_push(port->state->port.tty);
34aec591 RR	91	spin_lock(&port->lock);
	92
	93	dev_dbg(port->dev, "%s - total read %d bytes\n",
	94	__func__, port->icount.rx);
	95	}
	96
	97	static void timbuart_tx_chars(struct uart_port *port)
	98	{
ebd2c8f6	99	struct circ_buf *xmit = &port->state->xmit;
34aec591	100
2421c48b	101	while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
34aec591 RR	102	!uart_circ_empty(xmit)) {
	103	iowrite8(xmit->buf[xmit->tail],
	104	port->membase + TIMBUART_TXFIFO);
	105	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
	106	port->icount.tx++;
	107	}
	108
	109	dev_dbg(port->dev,
	110	"%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
	111	__func__,
	112	port->icount.tx,
	113	ioread8(port->membase + TIMBUART_CTRL),
	114	port->mctrl & TIOCM_RTS,
	115	ioread8(port->membase + TIMBUART_BAUDRATE));
	116	}
	117
2421c48b	118	static void timbuart_handle_tx_port(struct uart_port port, u32 isr, u32 ier)
34aec591 RR	119	{
	120	struct timbuart_port *uart =
	121	container_of(port, struct timbuart_port, port);
ebd2c8f6	122	struct circ_buf *xmit = &port->state->xmit;
34aec591 RR	123
	124	if (uart_circ_empty(xmit) \|\| uart_tx_stopped(port))
	125	return;
	126
	127	if (port->x_char)
	128	return;
	129
	130	if (isr & TXFLAGS) {
	131	timbuart_tx_chars(port);
	132	/* clear all TX interrupts */
2421c48b	133	iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
34aec591 RR	134
	135	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	136	uart_write_wakeup(port);
	137	} else
	138	/* Re-enable any tx interrupt */
	139	*ier \|= uart->last_ier & TXFLAGS;
	140
	141	/* enable interrupts if there are chars in the transmit buffer,
	142	* Or if we delivered some bytes and want the almost empty interrupt
	143	* we wake up the upper layer later when we got the interrupt
	144	* to give it some time to go out...
	145	*/
	146	if (!uart_circ_empty(xmit))
	147	*ier \|= TXBAE;
	148
	149	dev_dbg(port->dev, "%s - leaving\n", __func__);
	150	}
	151
2421c48b	152	void timbuart_handle_rx_port(struct uart_port port, u32 isr, u32 ier)
34aec591 RR	153	{
	154	if (isr & RXFLAGS) {
	155	/* Some RX status is set */
	156	if (isr & RXBF) {
	157	u8 ctl = ioread8(port->membase + TIMBUART_CTRL) \|
	158	TIMBUART_CTRL_FLSHRX;
	159	iowrite8(ctl, port->membase + TIMBUART_CTRL);
	160	port->icount.overrun++;
	161	} else if (isr & (RXDP))
	162	timbuart_rx_chars(port);
	163
	164	/* ack all RX interrupts */
2421c48b	165	iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
34aec591 RR	166	}
	167
	168	/* always have the RX interrupts enabled */
	169	*ier \|= RXBAF \| RXBF \| RXTT;
	170
	171	dev_dbg(port->dev, "%s - leaving\n", __func__);
	172	}
	173
	174	void timbuart_tasklet(unsigned long arg)
	175	{
	176	struct timbuart_port uart = (struct timbuart_port )arg;
2421c48b	177	u32 isr, ier = 0;
34aec591 RR	178
	179	spin_lock(&uart->port.lock);
	180
2421c48b	181	isr = ioread32(uart->port.membase + TIMBUART_ISR);
34aec591 RR	182	dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
	183
	184	if (!uart->usedma)
	185	timbuart_handle_tx_port(&uart->port, isr, &ier);
	186
	187	timbuart_mctrl_check(&uart->port, isr, &ier);
	188
	189	if (!uart->usedma)
	190	timbuart_handle_rx_port(&uart->port, isr, &ier);
	191
2421c48b	192	iowrite32(ier, uart->port.membase + TIMBUART_IER);
34aec591 RR	193
	194	spin_unlock(&uart->port.lock);
	195	dev_dbg(uart->port.dev, "%s leaving\n", __func__);
	196	}
	197
	198	static unsigned int timbuart_tx_empty(struct uart_port *port)
	199	{
2421c48b	200	u32 isr = ioread32(port->membase + TIMBUART_ISR);
34aec591	201
2421c48b	202	return (isr & TXBE) ? TIOCSER_TEMT : 0;
34aec591 RR	203	}
	204
	205	static unsigned int timbuart_get_mctrl(struct uart_port *port)
	206	{
	207	u8 cts = ioread8(port->membase + TIMBUART_CTRL);
	208	dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
	209
	210	if (cts & TIMBUART_CTRL_CTS)
	211	return TIOCM_CTS \| TIOCM_DSR \| TIOCM_CAR;
	212	else
	213	return TIOCM_DSR \| TIOCM_CAR;
	214	}
	215
	216	static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
	217	{
	218	dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
	219
	220	if (mctrl & TIOCM_RTS)
	221	iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
	222	else
	223	iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
	224	}
	225
2421c48b	226	static void timbuart_mctrl_check(struct uart_port port, u32 isr, u32 ier)
34aec591 RR	227	{
	228	unsigned int cts;
	229
	230	if (isr & CTS_DELTA) {
	231	/* ack */
2421c48b	232	iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
34aec591 RR	233	cts = timbuart_get_mctrl(port);
34aec591 RR	234	uart_handle_cts_change(port, cts & TIOCM_CTS);
bdc04e31	235	wake_up_interruptible(&port->state->port.delta_msr_wait);
34aec591 RR	236	}
	237
	238	*ier \|= CTS_DELTA;
	239	}
	240
	241	static void timbuart_enable_ms(struct uart_port *port)
	242	{
	243	/* N/A */
	244	}
	245
	246	static void timbuart_break_ctl(struct uart_port *port, int ctl)
	247	{
	248	/* N/A */
	249	}
	250
	251	static int timbuart_startup(struct uart_port *port)
	252	{
	253	struct timbuart_port *uart =
	254	container_of(port, struct timbuart_port, port);
	255
	256	dev_dbg(port->dev, "%s\n", __func__);
	257
	258	iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
2421c48b	259	iowrite32(0x1ff, port->membase + TIMBUART_ISR);
34aec591	260	/* Enable all but TX interrupts */
2421c48b	261	iowrite32(RXBAF \| RXBF \| RXTT \| CTS_DELTA,
34aec591 RR	262	port->membase + TIMBUART_IER);
	263
	264	return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
	265	"timb-uart", uart);
	266	}
	267
	268	static void timbuart_shutdown(struct uart_port *port)
	269	{
	270	struct timbuart_port *uart =
	271	container_of(port, struct timbuart_port, port);
	272	dev_dbg(port->dev, "%s\n", __func__);
	273	free_irq(port->irq, uart);
2421c48b	274	iowrite32(0, port->membase + TIMBUART_IER);
34aec591 RR	275	}
	276
	277	static int get_bindex(int baud)
	278	{
	279	int i;
	280
	281	for (i = 0; i < ARRAY_SIZE(baudrates); i++)
7d55deaf	282	if (baud <= baudrates[i])
34aec591 RR	283	return i;
	284
	285	return -1;
	286	}
	287
	288	static void timbuart_set_termios(struct uart_port *port,
	289	struct ktermios *termios,
	290	struct ktermios *old)
	291	{
	292	unsigned int baud;
	293	short bindex;
	294	unsigned long flags;
	295
	296	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
	297	bindex = get_bindex(baud);
	298	dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
	299
7d55deaf AC	300	if (bindex < 0)
	301	bindex = 0;
	302	baud = baudrates[bindex];
	303
	304	/* The serial layer calls into this once with old = NULL when setting
	305	up initially */
	306	if (old)
	307	tty_termios_copy_hw(termios, old);
	308	tty_termios_encode_baud_rate(termios, baud, baud);
	309
	310	spin_lock_irqsave(&port->lock, flags);
	311	iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
	312	uart_update_timeout(port, termios->c_cflag, baud);
	313	spin_unlock_irqrestore(&port->lock, flags);
34aec591 RR	314	}
	315
	316	static const char timbuart_type(struct uart_port port)
	317	{
	318	return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
	319	}
	320
	321	/* We do not request/release mappings of the registers here,
	322	* currently it's done in the proble function.
	323	*/
	324	static void timbuart_release_port(struct uart_port *port)
	325	{
	326	struct platform_device *pdev = to_platform_device(port->dev);
	327	int size =
	328	resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
	329
	330	if (port->flags & UPF_IOREMAP) {
	331	iounmap(port->membase);
	332	port->membase = NULL;
	333	}
	334
	335	release_mem_region(port->mapbase, size);
	336	}
	337
	338	static int timbuart_request_port(struct uart_port *port)
	339	{
	340	struct platform_device *pdev = to_platform_device(port->dev);
	341	int size =
	342	resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
	343
	344	if (!request_mem_region(port->mapbase, size, "timb-uart"))
	345	return -EBUSY;
	346
	347	if (port->flags & UPF_IOREMAP) {
	348	port->membase = ioremap(port->mapbase, size);
	349	if (port->membase == NULL) {
	350	release_mem_region(port->mapbase, size);
	351	return -ENOMEM;
	352	}
	353	}
	354
	355	return 0;
	356	}
	357
	358	static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
	359	{
	360	struct timbuart_port uart = (struct timbuart_port )devid;
	361
	362	if (ioread8(uart->port.membase + TIMBUART_IPR)) {
2421c48b	363	uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
34aec591 RR	364
34aec591 RR	365	/* disable interrupts, the tasklet enables them again */
2421c48b	366	iowrite32(0, uart->port.membase + TIMBUART_IER);
34aec591 RR	367
	368	/* fire off bottom half */
	369	tasklet_schedule(&uart->tasklet);
	370
	371	return IRQ_HANDLED;
	372	} else
	373	return IRQ_NONE;
	374	}
	375
	376	/*
	377	* Configure/autoconfigure the port.
	378	*/
	379	static void timbuart_config_port(struct uart_port *port, int flags)
	380	{
	381	if (flags & UART_CONFIG_TYPE) {
	382	port->type = PORT_TIMBUART;
	383	timbuart_request_port(port);
	384	}
	385	}
	386
	387	static int timbuart_verify_port(struct uart_port *port,
	388	struct serial_struct *ser)
	389	{
	390	/* we don't want the core code to modify any port params */
	391	return -EINVAL;
	392	}
	393
	394	static struct uart_ops timbuart_ops = {
	395	.tx_empty = timbuart_tx_empty,
	396	.set_mctrl = timbuart_set_mctrl,
	397	.get_mctrl = timbuart_get_mctrl,
	398	.stop_tx = timbuart_stop_tx,
	399	.start_tx = timbuart_start_tx,
	400	.flush_buffer = timbuart_flush_buffer,
	401	.stop_rx = timbuart_stop_rx,
	402	.enable_ms = timbuart_enable_ms,
	403	.break_ctl = timbuart_break_ctl,
	404	.startup = timbuart_startup,
	405	.shutdown = timbuart_shutdown,
	406	.set_termios = timbuart_set_termios,
	407	.type = timbuart_type,
	408	.release_port = timbuart_release_port,
	409	.request_port = timbuart_request_port,
	410	.config_port = timbuart_config_port,
	411	.verify_port = timbuart_verify_port
	412	};
	413
	414	static struct uart_driver timbuart_driver = {
	415	.owner = THIS_MODULE,
	416	.driver_name = "timberdale_uart",
	417	.dev_name = "ttyTU",
	418	.major = TIMBUART_MAJOR,
	419	.minor = TIMBUART_MINOR,
	420	.nr = 1
	421	};
	422
	423	static int timbuart_probe(struct platform_device *dev)
	424	{
1e091751	425	int err, irq;
34aec591 RR	426	struct timbuart_port *uart;
	427	struct resource *iomem;
	428
	429	dev_dbg(&dev->dev, "%s\n", __func__);
	430
	431	uart = kzalloc(sizeof(*uart), GFP_KERNEL);
	432	if (!uart) {
	433	err = -EINVAL;
	434	goto err_mem;
	435	}
	436
	437	uart->usedma = 0;
	438
	439	uart->port.uartclk = 3250000 * 16;
	440	uart->port.fifosize = TIMBUART_FIFO_SIZE;
	441	uart->port.regshift = 2;
	442	uart->port.iotype = UPIO_MEM;
	443	uart->port.ops = &timbuart_ops;
	444	uart->port.irq = 0;
	445	uart->port.flags = UPF_BOOT_AUTOCONF \| UPF_IOREMAP;
	446	uart->port.line = 0;
	447	uart->port.dev = &dev->dev;
	448
	449	iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
	450	if (!iomem) {
	451	err = -ENOMEM;
	452	goto err_register;
	453	}
	454	uart->port.mapbase = iomem->start;
	455	uart->port.membase = NULL;
	456
1e091751 RK	457	irq = platform_get_irq(dev, 0);
1e091751 RK	458	if (irq < 0) {
34aec591 RR	459	err = -EINVAL;
	460	goto err_register;
	461	}
1e091751	462	uart->port.irq = irq;
34aec591 RR	463
	464	tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
	465
	466	err = uart_register_driver(&timbuart_driver);
	467	if (err)
	468	goto err_register;
	469
	470	err = uart_add_one_port(&timbuart_driver, &uart->port);
	471	if (err)
	472	goto err_add_port;
	473
	474	platform_set_drvdata(dev, uart);
	475
	476	return 0;
	477
	478	err_add_port:
	479	uart_unregister_driver(&timbuart_driver);
	480	err_register:
	481	kfree(uart);
	482	err_mem:
	483	printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
	484	err);
	485
	486	return err;
	487	}
	488
	489	static int timbuart_remove(struct platform_device *dev)
	490	{
	491	struct timbuart_port *uart = platform_get_drvdata(dev);
	492
	493	tasklet_kill(&uart->tasklet);
	494	uart_remove_one_port(&timbuart_driver, &uart->port);
	495	uart_unregister_driver(&timbuart_driver);
	496	kfree(uart);
	497
	498	return 0;
	499	}
	500
	501	static struct platform_driver timbuart_platform_driver = {
	502	.driver = {
	503	.name = "timb-uart",
	504	.owner = THIS_MODULE,
	505	},
	506	.probe = timbuart_probe,
	507	.remove = timbuart_remove,
	508	};
	509
	510	/--------------------------------------------------------------------------/
	511
	512	static int __init timbuart_init(void)
	513	{
	514	return platform_driver_register(&timbuart_platform_driver);
	515	}
	516
	517	static void __exit timbuart_exit(void)
	518	{
	519	platform_driver_unregister(&timbuart_platform_driver);
	520	}
	521
	522	module_init(timbuart_init);
	523	module_exit(timbuart_exit);
	524
	525	MODULE_DESCRIPTION("Timberdale UART driver");
	526	MODULE_LICENSE("GPL v2");
527	MODULE_ALIAS("platform:timb-uart");
528