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[SCSI] megaraid_sas: Documentation update
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
de7c5d05 3 * Copyright (c) 2003-2010 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT		 16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ		 27static int apidev_major;
28
1da177e4
LT		 29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM		 34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4
LT		 39int ql2xlogintimeout = 20;
40module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
1da177e4
LT		 45module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT		 48 "a PORT-DOWN status.");
49
1da177e4
LT		 50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT		 55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4
LT		 57int ql2xloginretrycount = 0;
58module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf
AV		 62int ql2xallocfwdump = 1;
63module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV		 72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016
GM		 75int ql2xshiftctondsd = 6;
76module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT		 81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
cca5335c
AV		 84module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW		 86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV		 89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE		 95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5
AV		 108int ql2xiidmaenable=1;
109module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd
AC		 114int ql2xmaxqueues = 1;
115module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
ae68230c
JP		 118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
68ca949c
AC		 120
121int ql2xmultique_tag;
122module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV		 127
128int ql2xfwloadbin;
129module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e
AV		 137int ql2xetsenable;
138module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
6907869d 143int ql2xdbwr = 1;
a9083016
GM		 144module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
150int ql2xdontresethba;
151module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
152MODULE_PARM_DESC(ql2xdontresethba,
153 "Option to specify reset behaviour\n"
154 " 0 (Default) -- Reset on failure.\n"
155 " 1 -- Do not reset on failure.\n");
156
f4c496c1
GM		 157int ql2xtargetreset = 1;
158module_param(ql2xtargetreset, int, S_IRUGO|S_IRUSR);
159MODULE_PARM_DESC(ql2xtargetreset,
160 "Enable target reset."
161 "Default is 1 - use hw defaults.");
162
4da26e16
CD		 163int ql2xgffidenable;
164module_param(ql2xgffidenable, int, S_IRUGO|S_IRUSR);
165MODULE_PARM_DESC(ql2xgffidenable,
166 "Enables GFF_ID checks of port type. "
167 "Default is 0 - Do not use GFF_ID information.");
a9083016 168
3822263e
MI		 169int ql2xasynctmfenable;
170module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
171MODULE_PARM_DESC(ql2xasynctmfenable,
172 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
173 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
1da177e4 174/*
fa2a1ce5 175 * SCSI host template entry points
1da177e4
LT		 176 */
177static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 178static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV		 179static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
180static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 181static void qla2xxx_slave_destroy(struct scsi_device *);
f281233d 182static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
1da177e4
LT		 183static int qla2xxx_eh_abort(struct scsi_cmnd *);
184static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 185static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT		 186static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
187static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 188
e881a172 189static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV		 190static int qla2x00_change_queue_type(struct scsi_device *, int);
191
a5326f86 192struct scsi_host_template qla2xxx_driver_template = {
1da177e4 193 .module = THIS_MODULE,
cb63067a 194 .name = QLA2XXX_DRIVER_NAME,
a5326f86 195 .queuecommand = qla2xxx_queuecommand,
fca29703
AV		 196
197 .eh_abort_handler = qla2xxx_eh_abort,
198 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 199 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV		 200 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
201 .eh_host_reset_handler = qla2xxx_eh_host_reset,
202
203 .slave_configure = qla2xxx_slave_configure,
204
205 .slave_alloc = qla2xxx_slave_alloc,
206 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV		 207 .scan_finished = qla2xxx_scan_finished,
208 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV		 209 .change_queue_depth = qla2x00_change_queue_depth,
210 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV		 211 .this_id = -1,
212 .cmd_per_lun = 3,
213 .use_clustering = ENABLE_CLUSTERING,
214 .sg_tablesize = SG_ALL,
215
216 .max_sectors = 0xFFFF,
afb046e2 217 .shost_attrs = qla2x00_host_attrs,
fca29703
AV		 218};
219
1da177e4 220static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 221struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 222
1da177e4
LT		 223/* TODO Convert to inlines
224 *
225 * Timer routines
226 */
1da177e4 227
2c3dfe3f 228__inline__ void
e315cd28 229qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 230{
e315cd28
AC		 231 init_timer(&vha->timer);
232 vha->timer.expires = jiffies + interval * HZ;
233 vha->timer.data = (unsigned long)vha;
234 vha->timer.function = (void (*)(unsigned long))func;
235 add_timer(&vha->timer);
236 vha->timer_active = 1;
1da177e4
LT		 237}
238
239static inline void
e315cd28 240qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 241{
a9083016
GM		 242 /* Currently used for 82XX only. */
243 if (vha->device_flags & DFLG_DEV_FAILED)
244 return;
245
e315cd28 246 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT		 247}
248
a824ebb3 249static __inline__ void
e315cd28 250qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 251{
e315cd28
AC		 252 del_timer_sync(&vha->timer);
253 vha->timer_active = 0;
1da177e4
LT		 254}
255
1da177e4
LT		 256static int qla2x00_do_dpc(void *data);
257
258static void qla2x00_rst_aen(scsi_qla_host_t *);
259
73208dfd
AC		 260static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
261 struct req_que **, struct rsp_que **);
e30d1756 262static void qla2x00_free_fw_dump(struct qla_hw_data *);
e315cd28
AC		 263static void qla2x00_mem_free(struct qla_hw_data *);
264static void qla2x00_sp_free_dma(srb_t *);
1da177e4 265
1da177e4 266/* -------------------------------------------------------------------------- */
73208dfd
AC		 267static int qla2x00_alloc_queues(struct qla_hw_data *ha)
268{
2afa19a9 269 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC		 270 GFP_KERNEL);
271 if (!ha->req_q_map) {
272 qla_printk(KERN_WARNING, ha,
273 "Unable to allocate memory for request queue ptrs\n");
274 goto fail_req_map;
275 }
276
2afa19a9 277 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC		 278 GFP_KERNEL);
279 if (!ha->rsp_q_map) {
280 qla_printk(KERN_WARNING, ha,
281 "Unable to allocate memory for response queue ptrs\n");
282 goto fail_rsp_map;
283 }
284 set_bit(0, ha->rsp_qid_map);
285 set_bit(0, ha->req_qid_map);
286 return 1;
287
288fail_rsp_map:
289 kfree(ha->req_q_map);
290 ha->req_q_map = NULL;
291fail_req_map:
292 return -ENOMEM;
293}
294
2afa19a9 295static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 296{
73208dfd
AC		 297 if (req && req->ring)
298 dma_free_coherent(&ha->pdev->dev,
299 (req->length + 1) * sizeof(request_t),
300 req->ring, req->dma);
301
302 kfree(req);
303 req = NULL;
304}
305
2afa19a9
AC		 306static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
307{
308 if (rsp && rsp->ring)
309 dma_free_coherent(&ha->pdev->dev,
310 (rsp->length + 1) * sizeof(response_t),
311 rsp->ring, rsp->dma);
312
313 kfree(rsp);
314 rsp = NULL;
315}
316
73208dfd
AC		 317static void qla2x00_free_queues(struct qla_hw_data *ha)
318{
319 struct req_que *req;
320 struct rsp_que *rsp;
321 int cnt;
322
2afa19a9 323 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 324 req = ha->req_q_map[cnt];
2afa19a9 325 qla2x00_free_req_que(ha, req);
73208dfd 326 }
73208dfd
AC		 327 kfree(ha->req_q_map);
328 ha->req_q_map = NULL;
2afa19a9
AC		 329
330 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
331 rsp = ha->rsp_q_map[cnt];
332 qla2x00_free_rsp_que(ha, rsp);
333 }
334 kfree(ha->rsp_q_map);
335 ha->rsp_q_map = NULL;
73208dfd
AC		 336}
337
68ca949c
AC		 338static int qla25xx_setup_mode(struct scsi_qla_host *vha)
339{
340 uint16_t options = 0;
341 int ques, req, ret;
342 struct qla_hw_data *ha = vha->hw;
343
7163ea81
AC		 344 if (!(ha->fw_attributes & BIT_6)) {
345 qla_printk(KERN_INFO, ha,
346 "Firmware is not multi-queue capable\n");
347 goto fail;
348 }
68ca949c 349 if (ql2xmultique_tag) {
68ca949c
AC		 350 /* create a request queue for IO */
351 options |= BIT_7;
352 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
353 QLA_DEFAULT_QUE_QOS);
354 if (!req) {
355 qla_printk(KERN_WARNING, ha,
356 "Can't create request queue\n");
357 goto fail;
358 }
7163ea81 359 ha->wq = create_workqueue("qla2xxx_wq");
68ca949c
AC		 360 vha->req = ha->req_q_map[req];
361 options |= BIT_1;
362 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
363 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
364 if (!ret) {
365 qla_printk(KERN_WARNING, ha,
366 "Response Queue create failed\n");
367 goto fail2;
368 }
369 }
7163ea81
AC		 370 ha->flags.cpu_affinity_enabled = 1;
371
68ca949c
AC		 372 DEBUG2(qla_printk(KERN_INFO, ha,
373 "CPU affinity mode enabled, no. of response"
374 " queues:%d, no. of request queues:%d\n",
375 ha->max_rsp_queues, ha->max_req_queues));
376 }
377 return 0;
378fail2:
379 qla25xx_delete_queues(vha);
7163ea81
AC		 380 destroy_workqueue(ha->wq);
381 ha->wq = NULL;
68ca949c
AC		 382fail:
383 ha->mqenable = 0;
7163ea81
AC		 384 kfree(ha->req_q_map);
385 kfree(ha->rsp_q_map);
386 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC		 387 return 1;
388}
389
1da177e4 390static char *
e315cd28 391qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 392{
e315cd28 393 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 394 static char *pci_bus_modes[] = {
395 "33", "66", "100", "133",
396 };
397 uint16_t pci_bus;
398
399 strcpy(str, "PCI");
400 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
401 if (pci_bus) {
402 strcat(str, "-X (");
403 strcat(str, pci_bus_modes[pci_bus]);
404 } else {
405 pci_bus = (ha->pci_attr & BIT_8) >> 8;
406 strcat(str, " (");
407 strcat(str, pci_bus_modes[pci_bus]);
408 }
409 strcat(str, " MHz)");
410
411 return (str);
412}
413
fca29703 414static char *
e315cd28 415qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV		 416{
417 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 418 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 419 uint32_t pci_bus;
420 int pcie_reg;
421
422 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
423 if (pcie_reg) {
424 char lwstr[6];
425 uint16_t pcie_lstat, lspeed, lwidth;
426
427 pcie_reg += 0x12;
428 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
429 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
430 lwidth = (pcie_lstat &
431 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
432
433 strcpy(str, "PCIe (");
434 if (lspeed == 1)
c87a0d8c 435 strcat(str, "2.5GT/s ");
c3a2f0df 436 else if (lspeed == 2)
c87a0d8c 437 strcat(str, "5.0GT/s ");
fca29703
AV		 438 else
439 strcat(str, "<unknown> ");
440 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
441 strcat(str, lwstr);
442
443 return str;
444 }
445
446 strcpy(str, "PCI");
447 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
448 if (pci_bus == 0 || pci_bus == 8) {
449 strcat(str, " (");
450 strcat(str, pci_bus_modes[pci_bus >> 3]);
451 } else {
452 strcat(str, "-X ");
453 if (pci_bus & BIT_2)
454 strcat(str, "Mode 2");
455 else
456 strcat(str, "Mode 1");
457 strcat(str, " (");
458 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
459 }
460 strcat(str, " MHz)");
461
462 return str;
463}
464
e5f82ab8 465static char *
e315cd28 466qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT		 467{
468 char un_str[10];
e315cd28 469 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 470
1da177e4
LT		 471 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
472 ha->fw_minor_version,
473 ha->fw_subminor_version);
474
475 if (ha->fw_attributes & BIT_9) {
476 strcat(str, "FLX");
477 return (str);
478 }
479
480 switch (ha->fw_attributes & 0xFF) {
481 case 0x7:
482 strcat(str, "EF");
483 break;
484 case 0x17:
485 strcat(str, "TP");
486 break;
487 case 0x37:
488 strcat(str, "IP");
489 break;
490 case 0x77:
491 strcat(str, "VI");
492 break;
493 default:
494 sprintf(un_str, "(%x)", ha->fw_attributes);
495 strcat(str, un_str);
496 break;
497 }
498 if (ha->fw_attributes & 0x100)
499 strcat(str, "X");
500
501 return (str);
502}
503
e5f82ab8 504static char *
e315cd28 505qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 506{
e315cd28 507 struct qla_hw_data *ha = vha->hw;
f0883ac6 508
3a03eb79
AV		 509 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
510 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 511 return str;
fca29703
AV		 512}
513
514static inline srb_t *
e315cd28 515qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
fca29703
AV		 516 struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
517{
518 srb_t *sp;
e315cd28 519 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 520
521 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
522 if (!sp)
523 return sp;
524
083a469d 525 atomic_set(&sp->ref_count, 1);
fca29703
AV		 526 sp->fcport = fcport;
527 sp->cmd = cmd;
528 sp->flags = 0;
529 CMD_SP(cmd) = (void *)sp;
530 cmd->scsi_done = done;
cf53b069 531 sp->ctx = NULL;
fca29703
AV		 532
533 return sp;
534}
535
1da177e4 536static int
f281233d 537qla2xxx_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
fca29703 538{
e315cd28 539 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 540 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 541 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC		 542 struct qla_hw_data *ha = vha->hw;
543 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV		 544 srb_t *sp;
545 int rval;
546
38170fa8 547 spin_unlock_irq(vha->host->host_lock);
85880801
AV		 548 if (ha->flags.eeh_busy) {
549 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 550 cmd->result = DID_NO_CONNECT << 16;
85880801
AV		 551 else
552 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ		 553 goto qc24_fail_command;
554 }
555
19a7b4ae
JSEC		 556 rval = fc_remote_port_chkready(rport);
557 if (rval) {
558 cmd->result = rval;
fca29703
AV		 559 goto qc24_fail_command;
560 }
561
bad75002
AE		 562 if (!vha->flags.difdix_supported &&
563 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
564 DEBUG2(qla_printk(KERN_ERR, ha,
565 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
566 cmd->cmnd[0]));
567 cmd->result = DID_NO_CONNECT << 16;
568 goto qc24_fail_command;
569 }
fca29703
AV		 570 if (atomic_read(&fcport->state) != FCS_ONLINE) {
571 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
38170fa8
GM		 572 atomic_read(&fcport->state) == FCS_DEVICE_LOST ||
573 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV		 574 cmd->result = DID_NO_CONNECT << 16;
575 goto qc24_fail_command;
576 }
7b594131 577 goto qc24_target_busy;
fca29703
AV		 578 }
579
e315cd28 580 sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
fca29703
AV		 581 if (!sp)
582 goto qc24_host_busy_lock;
583
e315cd28 584 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV		 585 if (rval != QLA_SUCCESS)
586 goto qc24_host_busy_free_sp;
587
e315cd28 588 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 589
590 return 0;
591
592qc24_host_busy_free_sp:
e315cd28
AC		 593 qla2x00_sp_free_dma(sp);
594 mempool_free(sp, ha->srb_mempool);
fca29703
AV		 595
596qc24_host_busy_lock:
e315cd28 597 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 598 return SCSI_MLQUEUE_HOST_BUSY;
599
7b594131 600qc24_target_busy:
38170fa8 601 spin_lock_irq(vha->host->host_lock);
7b594131
MC		 602 return SCSI_MLQUEUE_TARGET_BUSY;
603
fca29703 604qc24_fail_command:
38170fa8 605 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 606 done(cmd);
607
608 return 0;
609}
610
f281233d
JG		 611static DEF_SCSI_QCMD(qla2xxx_queuecommand)
612
fca29703 613
1da177e4
LT		 614/*
615 * qla2x00_eh_wait_on_command
616 * Waits for the command to be returned by the Firmware for some
617 * max time.
618 *
619 * Input:
1da177e4 620 * cmd = Scsi Command to wait on.
1da177e4
LT		 621 *
622 * Return:
623 * Not Found : 0
624 * Found : 1
625 */
626static int
e315cd28 627qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 628{
fe74c71f
AV		 629#define ABORT_POLLING_PERIOD 1000
630#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 631 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV		 632 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
633 struct qla_hw_data *ha = vha->hw;
f4f051eb 634 int ret = QLA_SUCCESS;
1da177e4 635
85880801
AV		 636 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
637 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
638 return ret;
639 }
640
d970432c 641 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 642 msleep(ABORT_POLLING_PERIOD);
f4f051eb 643 }
644 if (CMD_SP(cmd))
645 ret = QLA_FUNCTION_FAILED;
1da177e4 646
f4f051eb 647 return ret;
1da177e4
LT		 648}
649
650/*
651 * qla2x00_wait_for_hba_online
fa2a1ce5 652 * Wait till the HBA is online after going through
1da177e4
LT		 653 * <= MAX_RETRIES_OF_ISP_ABORT or
654 * finally HBA is disabled ie marked offline
655 *
656 * Input:
657 * ha - pointer to host adapter structure
fa2a1ce5
AV		 658 *
659 * Note:
1da177e4
LT		 660 * Does context switching-Release SPIN_LOCK
661 * (if any) before calling this routine.
662 *
663 * Return:
664 * Success (Adapter is online) : 0
665 * Failed (Adapter is offline/disabled) : 1
666 */
854165f4 667int
e315cd28 668qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 669{
fca29703
AV		 670 int return_status;
671 unsigned long wait_online;
e315cd28
AC		 672 struct qla_hw_data *ha = vha->hw;
673 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 674
fa2a1ce5 675 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC		 676 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
677 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
678 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
679 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT		 680
681 msleep(1000);
682 }
e315cd28 683 if (base_vha->flags.online)
fa2a1ce5 684 return_status = QLA_SUCCESS;
1da177e4
LT		 685 else
686 return_status = QLA_FUNCTION_FAILED;
687
1da177e4
LT		 688 return (return_status);
689}
690
86fbee86
LC		 691/*
692 * qla2x00_wait_for_reset_ready
693 * Wait till the HBA is online after going through
694 * <= MAX_RETRIES_OF_ISP_ABORT or
695 * finally HBA is disabled ie marked offline or flash
696 * operations are in progress.
697 *
698 * Input:
699 * ha - pointer to host adapter structure
700 *
701 * Note:
702 * Does context switching-Release SPIN_LOCK
703 * (if any) before calling this routine.
704 *
705 * Return:
706 * Success (Adapter is online/no flash ops) : 0
707 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
708 */
3dbe756a 709static int
86fbee86
LC		 710qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
711{
712 int return_status;
713 unsigned long wait_online;
714 struct qla_hw_data *ha = vha->hw;
715 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
716
717 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
718 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
719 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
720 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
721 ha->optrom_state != QLA_SWAITING ||
722 ha->dpc_active) && time_before(jiffies, wait_online))
723 msleep(1000);
724
725 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
726 return_status = QLA_SUCCESS;
727 else
728 return_status = QLA_FUNCTION_FAILED;
729
730 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
731
732 return return_status;
733}
734
2533cf67
LC		 735int
736qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
737{
738 int return_status;
739 unsigned long wait_reset;
740 struct qla_hw_data *ha = vha->hw;
741 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
742
743 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
744 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
745 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
746 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
747 ha->dpc_active) && time_before(jiffies, wait_reset)) {
748
749 msleep(1000);
750
751 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
752 ha->flags.chip_reset_done)
753 break;
754 }
755 if (ha->flags.chip_reset_done)
756 return_status = QLA_SUCCESS;
757 else
758 return_status = QLA_FUNCTION_FAILED;
759
760 return return_status;
761}
762
1da177e4
LT		 763/*
764 * qla2x00_wait_for_loop_ready
765 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 766 * to be in LOOP_READY state.
1da177e4
LT		 767 * Input:
768 * ha - pointer to host adapter structure
fa2a1ce5
AV		 769 *
770 * Note:
1da177e4
LT		 771 * Does context switching-Release SPIN_LOCK
772 * (if any) before calling this routine.
fa2a1ce5 773 *
1da177e4
LT		 774 *
775 * Return:
776 * Success (LOOP_READY) : 0
777 * Failed (LOOP_NOT_READY) : 1
778 */
fa2a1ce5 779static inline int
e315cd28 780qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT		 781{
782 int return_status = QLA_SUCCESS;
783 unsigned long loop_timeout ;
e315cd28
AC		 784 struct qla_hw_data *ha = vha->hw;
785 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 786
787 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 788 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 789
e315cd28
AC		 790 while ((!atomic_read(&base_vha->loop_down_timer) &&
791 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
792 atomic_read(&base_vha->loop_state) != LOOP_READY) {
793 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA		 794 return_status = QLA_FUNCTION_FAILED;
795 break;
796 }
1da177e4
LT		 797 msleep(1000);
798 if (time_after_eq(jiffies, loop_timeout)) {
799 return_status = QLA_FUNCTION_FAILED;
800 break;
801 }
802 }
fa2a1ce5 803 return (return_status);
1da177e4
LT		 804}
805
083a469d
GM		 806static void
807sp_get(struct srb *sp)
808{
809 atomic_inc(&sp->ref_count);
810}
811
1da177e4
LT		 812/**************************************************************************
813* qla2xxx_eh_abort
814*
815* Description:
816* The abort function will abort the specified command.
817*
818* Input:
819* cmd = Linux SCSI command packet to be aborted.
820*
821* Returns:
822* Either SUCCESS or FAILED.
823*
824* Note:
2ea00202 825* Only return FAILED if command not returned by firmware.
1da177e4 826**************************************************************************/
e5f82ab8 827static int
1da177e4
LT		 828qla2xxx_eh_abort(struct scsi_cmnd *cmd)
829{
e315cd28 830 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 831 srb_t *sp;
69abf61e 832 int ret = SUCCESS;
f4f051eb 833 unsigned int id, lun;
18e144d3 834 unsigned long flags;
2ea00202 835 int wait = 0;
e315cd28 836 struct qla_hw_data *ha = vha->hw;
1da177e4 837
65d430fa 838 fc_block_scsi_eh(cmd);
07db5183 839
f4f051eb 840 if (!CMD_SP(cmd))
2ea00202 841 return SUCCESS;
1da177e4 842
f4f051eb 843 id = cmd->device->id;
844 lun = cmd->device->lun;
1da177e4 845
e315cd28 846 spin_lock_irqsave(&ha->hardware_lock, flags);
170babc3
MC		 847 sp = (srb_t *) CMD_SP(cmd);
848 if (!sp) {
849 spin_unlock_irqrestore(&ha->hardware_lock, flags);
850 return SUCCESS;
851 }
1da177e4 852
170babc3
MC		 853 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
854 __func__, vha->host_no, sp));
17d98630 855
170babc3
MC		 856 /* Get a reference to the sp and drop the lock.*/
857 sp_get(sp);
083a469d 858
e315cd28 859 spin_unlock_irqrestore(&ha->hardware_lock, flags);
170babc3
MC		 860 if (ha->isp_ops->abort_command(sp)) {
861 DEBUG2(printk("%s(%ld): abort_command "
862 "mbx failed.\n", __func__, vha->host_no));
863 ret = FAILED;
864 } else {
865 DEBUG3(printk("%s(%ld): abort_command "
866 "mbx success.\n", __func__, vha->host_no));
867 wait = 1;
868 }
869 qla2x00_sp_compl(ha, sp);
1da177e4 870
f4f051eb 871 /* Wait for the command to be returned. */
2ea00202 872 if (wait) {
e315cd28 873 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 874 qla_printk(KERN_ERR, ha,
09d1dc2a
MI		 875 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
876 vha->host_no, id, lun, ret);
2ea00202 877 ret = FAILED;
f4f051eb 878 }
1da177e4 879 }
1da177e4 880
fa2a1ce5 881 qla_printk(KERN_INFO, ha,
09d1dc2a
MI		 882 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
883 vha->host_no, id, lun, wait, ret);
1da177e4 884
f4f051eb 885 return ret;
886}
1da177e4 887
4d78c973 888int
e315cd28 889qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
4d78c973 890 unsigned int l, enum nexus_wait_type type)
f4f051eb 891{
17d98630 892 int cnt, match, status;
18e144d3 893 unsigned long flags;
e315cd28 894 struct qla_hw_data *ha = vha->hw;
73208dfd 895 struct req_que *req;
4d78c973 896 srb_t *sp;
1da177e4 897
523ec773 898 status = QLA_SUCCESS;
17d98630 899
e315cd28 900 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 901 req = vha->req;
17d98630
AC		 902 for (cnt = 1; status == QLA_SUCCESS &&
903 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
904 sp = req->outstanding_cmds[cnt];
905 if (!sp)
523ec773 906 continue;
bad75002 907 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 908 continue;
17d98630
AC		 909 if (vha->vp_idx != sp->fcport->vha->vp_idx)
910 continue;
911 match = 0;
912 switch (type) {
913 case WAIT_HOST:
914 match = 1;
915 break;
916 case WAIT_TARGET:
917 match = sp->cmd->device->id == t;
918 break;
919 case WAIT_LUN:
920 match = (sp->cmd->device->id == t &&
921 sp->cmd->device->lun == l);
922 break;
73208dfd 923 }
17d98630
AC		 924 if (!match)
925 continue;
926
927 spin_unlock_irqrestore(&ha->hardware_lock, flags);
928 status = qla2x00_eh_wait_on_command(sp->cmd);
929 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 930 }
e315cd28 931 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV		 932
933 return status;
1da177e4
LT		 934}
935
523ec773
AV		 936static char *reset_errors[] = {
937 "HBA not online",
938 "HBA not ready",
939 "Task management failed",
940 "Waiting for command completions",
941};
1da177e4 942
e5f82ab8 943static int
523ec773 944__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 945 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 946{
e315cd28 947 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 948 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 949 int err;
1da177e4 950
65d430fa 951 fc_block_scsi_eh(cmd);
07db5183 952
b0328bee 953 if (!fcport)
523ec773 954 return FAILED;
1da177e4 955
e315cd28
AC		 956 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
957 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 958
523ec773 959 err = 0;
e315cd28 960 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV		 961 goto eh_reset_failed;
962 err = 1;
e315cd28 963 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV		 964 goto eh_reset_failed;
965 err = 2;
2afa19a9
AC		 966 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
967 != QLA_SUCCESS)
523ec773
AV		 968 goto eh_reset_failed;
969 err = 3;
e315cd28 970 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
4d78c973 971 cmd->device->lun, type) != QLA_SUCCESS)
523ec773
AV		 972 goto eh_reset_failed;
973
e315cd28
AC		 974 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
975 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV		 976
977 return SUCCESS;
978
4d78c973 979eh_reset_failed:
e315cd28
AC		 980 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
981 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV		 982 reset_errors[err]);
983 return FAILED;
984}
1da177e4 985
523ec773
AV		 986static int
987qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
988{
e315cd28
AC		 989 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
990 struct qla_hw_data *ha = vha->hw;
1da177e4 991
523ec773
AV		 992 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
993 ha->isp_ops->lun_reset);
1da177e4
LT		 994}
995
1da177e4 996static int
523ec773 997qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 998{
e315cd28
AC		 999 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1000 struct qla_hw_data *ha = vha->hw;
1da177e4 1001
523ec773
AV		 1002 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1003 ha->isp_ops->target_reset);
1da177e4
LT		 1004}
1005
1da177e4
LT		 1006/**************************************************************************
1007* qla2xxx_eh_bus_reset
1008*
1009* Description:
1010* The bus reset function will reset the bus and abort any executing
1011* commands.
1012*
1013* Input:
1014* cmd = Linux SCSI command packet of the command that cause the
1015* bus reset.
1016*
1017* Returns:
1018* SUCCESS/FAILURE (defined as macro in scsi.h).
1019*
1020**************************************************************************/
e5f82ab8 1021static int
1da177e4
LT		 1022qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1023{
e315cd28 1024 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1025 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1026 int ret = FAILED;
f4f051eb 1027 unsigned int id, lun;
f4f051eb 1028
65d430fa 1029 fc_block_scsi_eh(cmd);
07db5183 1030
f4f051eb 1031 id = cmd->device->id;
1032 lun = cmd->device->lun;
1da177e4 1033
b0328bee 1034 if (!fcport)
f4f051eb 1035 return ret;
1da177e4 1036
e315cd28 1037 qla_printk(KERN_INFO, vha->hw,
749af3d5 1038 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1039
e315cd28 1040 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1041 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1042 goto eh_bus_reset_done;
1da177e4
LT		 1043 }
1044
e315cd28
AC		 1045 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1046 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1047 ret = SUCCESS;
1da177e4 1048 }
f4f051eb 1049 if (ret == FAILED)
1050 goto eh_bus_reset_done;
1da177e4 1051
9a41a62b 1052 /* Flush outstanding commands. */
4d78c973 1053 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
523ec773 1054 QLA_SUCCESS)
9a41a62b 1055 ret = FAILED;
1da177e4 1056
f4f051eb 1057eh_bus_reset_done:
e315cd28 1058 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
f4f051eb 1059 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1060
f4f051eb 1061 return ret;
1da177e4
LT		 1062}
1063
1064/**************************************************************************
1065* qla2xxx_eh_host_reset
1066*
1067* Description:
1068* The reset function will reset the Adapter.
1069*
1070* Input:
1071* cmd = Linux SCSI command packet of the command that cause the
1072* adapter reset.
1073*
1074* Returns:
1075* Either SUCCESS or FAILED.
1076*
1077* Note:
1078**************************************************************************/
e5f82ab8 1079static int
1da177e4
LT		 1080qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1081{
e315cd28 1082 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1083 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1084 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1085 int ret = FAILED;
f4f051eb 1086 unsigned int id, lun;
e315cd28 1087 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1088
65d430fa 1089 fc_block_scsi_eh(cmd);
07db5183 1090
f4f051eb 1091 id = cmd->device->id;
1092 lun = cmd->device->lun;
f4f051eb 1093
b0328bee 1094 if (!fcport)
f4f051eb 1095 return ret;
1da177e4 1096
1da177e4 1097 qla_printk(KERN_INFO, ha,
e315cd28 1098 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1099
86fbee86 1100 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
f4f051eb 1101 goto eh_host_reset_lock;
1da177e4
LT		 1102
1103 /*
1104 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1105 * loop_resync,so wait a while for it to
1da177e4
LT		 1106 * be completed and then issue big hammer.Otherwise
1107 * it may cause I/O failure as big hammer marks the
1108 * devices as lost kicking of the port_down_timer
1109 * while dpc is stuck for the mailbox to complete.
1110 */
e315cd28
AC		 1111 qla2x00_wait_for_loop_ready(vha);
1112 if (vha != base_vha) {
1113 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1114 goto eh_host_reset_lock;
e315cd28 1115 } else {
a9083016
GM		 1116 if (IS_QLA82XX(vha->hw)) {
1117 if (!qla82xx_fcoe_ctx_reset(vha)) {
1118 /* Ctx reset success */
1119 ret = SUCCESS;
1120 goto eh_host_reset_lock;
1121 }
1122 /* fall thru if ctx reset failed */
1123 }
68ca949c
AC		 1124 if (ha->wq)
1125 flush_workqueue(ha->wq);
1126
e315cd28 1127 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1128 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC		 1129 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1130 /* failed. schedule dpc to try */
1131 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1132
1133 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1134 goto eh_host_reset_lock;
1135 }
1136 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1137 }
1da177e4 1138
e315cd28 1139 /* Waiting for command to be returned to OS.*/
4d78c973 1140 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
e315cd28 1141 QLA_SUCCESS)
f4f051eb 1142 ret = SUCCESS;
1da177e4 1143
f4f051eb 1144eh_host_reset_lock:
f4f051eb 1145 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
1146 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1147
f4f051eb 1148 return ret;
1149}
1da177e4
LT		 1150
1151/*
1152* qla2x00_loop_reset
1153* Issue loop reset.
1154*
1155* Input:
1156* ha = adapter block pointer.
1157*
1158* Returns:
1159* 0 = success
1160*/
a4722cf2 1161int
e315cd28 1162qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1163{
0c8c39af 1164 int ret;
bdf79621 1165 struct fc_port *fcport;
e315cd28 1166 struct qla_hw_data *ha = vha->hw;
1da177e4 1167
f4c496c1 1168 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
55e5ed27
AV		 1169 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1170 if (fcport->port_type != FCT_TARGET)
1171 continue;
1172
1173 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1174 if (ret != QLA_SUCCESS) {
1175 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1176 "target_reset=%d d_id=%x.\n", __func__,
1177 vha->host_no, ret, fcport->d_id.b24));
1178 }
1179 }
1180 }
1181
a9083016 1182 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1183 ret = qla2x00_full_login_lip(vha);
0c8c39af 1184 if (ret != QLA_SUCCESS) {
749af3d5 1185 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1186 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1187 ret));
749af3d5
AC		 1188 }
1189 atomic_set(&vha->loop_state, LOOP_DOWN);
1190 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1191 qla2x00_mark_all_devices_lost(vha, 0);
1192 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV		 1193 }
1194
0d6e61bc 1195 if (ha->flags.enable_lip_reset) {
e315cd28 1196 ret = qla2x00_lip_reset(vha);
0c8c39af 1197 if (ret != QLA_SUCCESS) {
749af3d5 1198 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC		 1199 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1200 } else
1201 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT		 1202 }
1203
1da177e4 1204 /* Issue marker command only when we are going to start the I/O */
e315cd28 1205 vha->marker_needed = 1;
1da177e4 1206
0c8c39af 1207 return QLA_SUCCESS;
1da177e4
LT		 1208}
1209
df4bf0bb 1210void
e315cd28 1211qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1212{
73208dfd 1213 int que, cnt;
df4bf0bb
AV		 1214 unsigned long flags;
1215 srb_t *sp;
ac280b67 1216 struct srb_ctx *ctx;
e315cd28 1217 struct qla_hw_data *ha = vha->hw;
73208dfd 1218 struct req_que *req;
df4bf0bb
AV		 1219
1220 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1221 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1222 req = ha->req_q_map[que];
73208dfd
AC		 1223 if (!req)
1224 continue;
1225 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1226 sp = req->outstanding_cmds[cnt];
e612d465 1227 if (sp) {
73208dfd 1228 req->outstanding_cmds[cnt] = NULL;
a9083016 1229 if (!sp->ctx ||
bad75002
AE		 1230 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1231 IS_PROT_IO(sp)) {
ac280b67
AV		 1232 sp->cmd->result = res;
1233 qla2x00_sp_compl(ha, sp);
1234 } else {
1235 ctx = sp->ctx;
6c452a45
AV		 1236 if (ctx->type == SRB_LOGIN_CMD ||
1237 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1238 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1239 } else {
6c452a45 1240 struct fc_bsg_job *bsg_job =
4916392b 1241 ctx->u.bsg_job;
6c452a45
AV		 1242 if (bsg_job->request->msgcode
1243 == FC_BSG_HST_CT)
db3ad7f8 1244 kfree(sp->fcport);
6c452a45
AV		 1245 bsg_job->req->errors = 0;
1246 bsg_job->reply->result = res;
4916392b 1247 bsg_job->job_done(bsg_job);
db3ad7f8 1248 kfree(sp->ctx);
6c452a45 1249 mempool_free(sp,
4916392b 1250 ha->srb_mempool);
db3ad7f8 1251 }
ac280b67 1252 }
73208dfd 1253 }
df4bf0bb
AV		 1254 }
1255 }
1256 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1257}
1258
f4f051eb 1259static int
1260qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1261{
bdf79621 1262 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1263
19a7b4ae 1264 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1265 return -ENXIO;
bdf79621 1266
19a7b4ae 1267 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1268
f4f051eb 1269 return 0;
1270}
1da177e4 1271
f4f051eb 1272static int
1273qla2xxx_slave_configure(struct scsi_device *sdev)
1274{
e315cd28 1275 scsi_qla_host_t *vha = shost_priv(sdev->host);
2afa19a9 1276 struct req_que *req = vha->req;
8482e118 1277
f4f051eb 1278 if (sdev->tagged_supported)
73208dfd 1279 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1280 else
73208dfd 1281 scsi_deactivate_tcq(sdev, req->max_q_depth);
f4f051eb 1282 return 0;
1283}
1da177e4 1284
f4f051eb 1285static void
1286qla2xxx_slave_destroy(struct scsi_device *sdev)
1287{
1288 sdev->hostdata = NULL;
1da177e4
LT		 1289}
1290
c45dd305
GM		 1291static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1292{
1293 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1294
1295 if (!scsi_track_queue_full(sdev, qdepth))
1296 return;
1297
1298 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1299 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1300 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1301 sdev->queue_depth));
1302}
1303
1304static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1305{
1306 fc_port_t *fcport = sdev->hostdata;
1307 struct scsi_qla_host *vha = fcport->vha;
1308 struct qla_hw_data *ha = vha->hw;
1309 struct req_que *req = NULL;
1310
1311 req = vha->req;
1312 if (!req)
1313 return;
1314
1315 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1316 return;
1317
1318 if (sdev->ordered_tags)
1319 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1320 else
1321 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1322
1323 DEBUG2(qla_printk(KERN_INFO, ha,
1324 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1325 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1326 sdev->queue_depth));
1327}
1328
ce7e4af7 1329static int
e881a172 1330qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1331{
c45dd305
GM		 1332 switch (reason) {
1333 case SCSI_QDEPTH_DEFAULT:
1334 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1335 break;
1336 case SCSI_QDEPTH_QFULL:
1337 qla2x00_handle_queue_full(sdev, qdepth);
1338 break;
1339 case SCSI_QDEPTH_RAMP_UP:
1340 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1341 break;
1342 default:
08002af2 1343 return -EOPNOTSUPP;
c45dd305 1344 }
e881a172 1345
ce7e4af7
AV		 1346 return sdev->queue_depth;
1347}
1348
1349static int
1350qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1351{
1352 if (sdev->tagged_supported) {
1353 scsi_set_tag_type(sdev, tag_type);
1354 if (tag_type)
1355 scsi_activate_tcq(sdev, sdev->queue_depth);
1356 else
1357 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1358 } else
1359 tag_type = 0;
1360
1361 return tag_type;
1362}
1363
1da177e4
LT		 1364/**
1365 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1366 * @ha: HA context
1367 *
1368 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1369 * supported addressing method.
1370 */
1371static void
53303c42 1372qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1373{
7524f9b9 1374 /* Assume a 32bit DMA mask. */
1da177e4 1375 ha->flags.enable_64bit_addressing = 0;
1da177e4 1376
6a35528a 1377 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV		 1378 /* Any upper-dword bits set? */
1379 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1380 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1381 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1382 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV		 1383 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1384 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1385 return;
1da177e4 1386 }
1da177e4 1387 }
7524f9b9 1388
284901a9
YH		 1389 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1390 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT		 1391}
1392
fd34f556 1393static void
e315cd28 1394qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1395{
1396 unsigned long flags = 0;
1397 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1398
1399 spin_lock_irqsave(&ha->hardware_lock, flags);
1400 ha->interrupts_on = 1;
1401 /* enable risc and host interrupts */
1402 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1403 RD_REG_WORD(&reg->ictrl);
1404 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1405
1406}
1407
1408static void
e315cd28 1409qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1410{
1411 unsigned long flags = 0;
1412 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1413
1414 spin_lock_irqsave(&ha->hardware_lock, flags);
1415 ha->interrupts_on = 0;
1416 /* disable risc and host interrupts */
1417 WRT_REG_WORD(&reg->ictrl, 0);
1418 RD_REG_WORD(&reg->ictrl);
1419 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1420}
1421
1422static void
e315cd28 1423qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1424{
1425 unsigned long flags = 0;
1426 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1427
1428 spin_lock_irqsave(&ha->hardware_lock, flags);
1429 ha->interrupts_on = 1;
1430 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1431 RD_REG_DWORD(&reg->ictrl);
1432 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1433}
1434
1435static void
e315cd28 1436qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1437{
1438 unsigned long flags = 0;
1439 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1440
124f85e6
AV		 1441 if (IS_NOPOLLING_TYPE(ha))
1442 return;
fd34f556
AV		 1443 spin_lock_irqsave(&ha->hardware_lock, flags);
1444 ha->interrupts_on = 0;
1445 WRT_REG_DWORD(&reg->ictrl, 0);
1446 RD_REG_DWORD(&reg->ictrl);
1447 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1448}
1449
1450static struct isp_operations qla2100_isp_ops = {
1451 .pci_config = qla2100_pci_config,
1452 .reset_chip = qla2x00_reset_chip,
1453 .chip_diag = qla2x00_chip_diag,
1454 .config_rings = qla2x00_config_rings,
1455 .reset_adapter = qla2x00_reset_adapter,
1456 .nvram_config = qla2x00_nvram_config,
1457 .update_fw_options = qla2x00_update_fw_options,
1458 .load_risc = qla2x00_load_risc,
1459 .pci_info_str = qla2x00_pci_info_str,
1460 .fw_version_str = qla2x00_fw_version_str,
1461 .intr_handler = qla2100_intr_handler,
1462 .enable_intrs = qla2x00_enable_intrs,
1463 .disable_intrs = qla2x00_disable_intrs,
1464 .abort_command = qla2x00_abort_command,
523ec773
AV		 1465 .target_reset = qla2x00_abort_target,
1466 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1467 .fabric_login = qla2x00_login_fabric,
1468 .fabric_logout = qla2x00_fabric_logout,
1469 .calc_req_entries = qla2x00_calc_iocbs_32,
1470 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1471 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1472 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1473 .read_nvram = qla2x00_read_nvram_data,
1474 .write_nvram = qla2x00_write_nvram_data,
1475 .fw_dump = qla2100_fw_dump,
1476 .beacon_on = NULL,
1477 .beacon_off = NULL,
1478 .beacon_blink = NULL,
1479 .read_optrom = qla2x00_read_optrom_data,
1480 .write_optrom = qla2x00_write_optrom_data,
1481 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1482 .start_scsi = qla2x00_start_scsi,
a9083016 1483 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1484};
1485
1486static struct isp_operations qla2300_isp_ops = {
1487 .pci_config = qla2300_pci_config,
1488 .reset_chip = qla2x00_reset_chip,
1489 .chip_diag = qla2x00_chip_diag,
1490 .config_rings = qla2x00_config_rings,
1491 .reset_adapter = qla2x00_reset_adapter,
1492 .nvram_config = qla2x00_nvram_config,
1493 .update_fw_options = qla2x00_update_fw_options,
1494 .load_risc = qla2x00_load_risc,
1495 .pci_info_str = qla2x00_pci_info_str,
1496 .fw_version_str = qla2x00_fw_version_str,
1497 .intr_handler = qla2300_intr_handler,
1498 .enable_intrs = qla2x00_enable_intrs,
1499 .disable_intrs = qla2x00_disable_intrs,
1500 .abort_command = qla2x00_abort_command,
523ec773
AV		 1501 .target_reset = qla2x00_abort_target,
1502 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1503 .fabric_login = qla2x00_login_fabric,
1504 .fabric_logout = qla2x00_fabric_logout,
1505 .calc_req_entries = qla2x00_calc_iocbs_32,
1506 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1507 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1508 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1509 .read_nvram = qla2x00_read_nvram_data,
1510 .write_nvram = qla2x00_write_nvram_data,
1511 .fw_dump = qla2300_fw_dump,
1512 .beacon_on = qla2x00_beacon_on,
1513 .beacon_off = qla2x00_beacon_off,
1514 .beacon_blink = qla2x00_beacon_blink,
1515 .read_optrom = qla2x00_read_optrom_data,
1516 .write_optrom = qla2x00_write_optrom_data,
1517 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1518 .start_scsi = qla2x00_start_scsi,
a9083016 1519 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1520};
1521
1522static struct isp_operations qla24xx_isp_ops = {
1523 .pci_config = qla24xx_pci_config,
1524 .reset_chip = qla24xx_reset_chip,
1525 .chip_diag = qla24xx_chip_diag,
1526 .config_rings = qla24xx_config_rings,
1527 .reset_adapter = qla24xx_reset_adapter,
1528 .nvram_config = qla24xx_nvram_config,
1529 .update_fw_options = qla24xx_update_fw_options,
1530 .load_risc = qla24xx_load_risc,
1531 .pci_info_str = qla24xx_pci_info_str,
1532 .fw_version_str = qla24xx_fw_version_str,
1533 .intr_handler = qla24xx_intr_handler,
1534 .enable_intrs = qla24xx_enable_intrs,
1535 .disable_intrs = qla24xx_disable_intrs,
1536 .abort_command = qla24xx_abort_command,
523ec773
AV		 1537 .target_reset = qla24xx_abort_target,
1538 .lun_reset = qla24xx_lun_reset,
fd34f556
AV		 1539 .fabric_login = qla24xx_login_fabric,
1540 .fabric_logout = qla24xx_fabric_logout,
1541 .calc_req_entries = NULL,
1542 .build_iocbs = NULL,
1543 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1544 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1545 .read_nvram = qla24xx_read_nvram_data,
1546 .write_nvram = qla24xx_write_nvram_data,
1547 .fw_dump = qla24xx_fw_dump,
1548 .beacon_on = qla24xx_beacon_on,
1549 .beacon_off = qla24xx_beacon_off,
1550 .beacon_blink = qla24xx_beacon_blink,
1551 .read_optrom = qla24xx_read_optrom_data,
1552 .write_optrom = qla24xx_write_optrom_data,
1553 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1554 .start_scsi = qla24xx_start_scsi,
a9083016 1555 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1556};
1557
c3a2f0df
AV		 1558static struct isp_operations qla25xx_isp_ops = {
1559 .pci_config = qla25xx_pci_config,
1560 .reset_chip = qla24xx_reset_chip,
1561 .chip_diag = qla24xx_chip_diag,
1562 .config_rings = qla24xx_config_rings,
1563 .reset_adapter = qla24xx_reset_adapter,
1564 .nvram_config = qla24xx_nvram_config,
1565 .update_fw_options = qla24xx_update_fw_options,
1566 .load_risc = qla24xx_load_risc,
1567 .pci_info_str = qla24xx_pci_info_str,
1568 .fw_version_str = qla24xx_fw_version_str,
1569 .intr_handler = qla24xx_intr_handler,
1570 .enable_intrs = qla24xx_enable_intrs,
1571 .disable_intrs = qla24xx_disable_intrs,
1572 .abort_command = qla24xx_abort_command,
523ec773
AV		 1573 .target_reset = qla24xx_abort_target,
1574 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV		 1575 .fabric_login = qla24xx_login_fabric,
1576 .fabric_logout = qla24xx_fabric_logout,
1577 .calc_req_entries = NULL,
1578 .build_iocbs = NULL,
1579 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1580 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1581 .read_nvram = qla25xx_read_nvram_data,
1582 .write_nvram = qla25xx_write_nvram_data,
1583 .fw_dump = qla25xx_fw_dump,
1584 .beacon_on = qla24xx_beacon_on,
1585 .beacon_off = qla24xx_beacon_off,
1586 .beacon_blink = qla24xx_beacon_blink,
338c9161 1587 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV		 1588 .write_optrom = qla24xx_write_optrom_data,
1589 .get_flash_version = qla24xx_get_flash_version,
bad75002 1590 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1591 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV		 1592};
1593
3a03eb79
AV		 1594static struct isp_operations qla81xx_isp_ops = {
1595 .pci_config = qla25xx_pci_config,
1596 .reset_chip = qla24xx_reset_chip,
1597 .chip_diag = qla24xx_chip_diag,
1598 .config_rings = qla24xx_config_rings,
1599 .reset_adapter = qla24xx_reset_adapter,
1600 .nvram_config = qla81xx_nvram_config,
1601 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1602 .load_risc = qla81xx_load_risc,
3a03eb79
AV		 1603 .pci_info_str = qla24xx_pci_info_str,
1604 .fw_version_str = qla24xx_fw_version_str,
1605 .intr_handler = qla24xx_intr_handler,
1606 .enable_intrs = qla24xx_enable_intrs,
1607 .disable_intrs = qla24xx_disable_intrs,
1608 .abort_command = qla24xx_abort_command,
1609 .target_reset = qla24xx_abort_target,
1610 .lun_reset = qla24xx_lun_reset,
1611 .fabric_login = qla24xx_login_fabric,
1612 .fabric_logout = qla24xx_fabric_logout,
1613 .calc_req_entries = NULL,
1614 .build_iocbs = NULL,
1615 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1616 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV		 1617 .read_nvram = NULL,
1618 .write_nvram = NULL,
3a03eb79
AV		 1619 .fw_dump = qla81xx_fw_dump,
1620 .beacon_on = qla24xx_beacon_on,
1621 .beacon_off = qla24xx_beacon_off,
1622 .beacon_blink = qla24xx_beacon_blink,
1623 .read_optrom = qla25xx_read_optrom_data,
1624 .write_optrom = qla24xx_write_optrom_data,
1625 .get_flash_version = qla24xx_get_flash_version,
ba77ef53 1626 .start_scsi = qla24xx_dif_start_scsi,
a9083016
GM		 1627 .abort_isp = qla2x00_abort_isp,
1628};
1629
1630static struct isp_operations qla82xx_isp_ops = {
1631 .pci_config = qla82xx_pci_config,
1632 .reset_chip = qla82xx_reset_chip,
1633 .chip_diag = qla24xx_chip_diag,
1634 .config_rings = qla82xx_config_rings,
1635 .reset_adapter = qla24xx_reset_adapter,
1636 .nvram_config = qla81xx_nvram_config,
1637 .update_fw_options = qla24xx_update_fw_options,
1638 .load_risc = qla82xx_load_risc,
1639 .pci_info_str = qla82xx_pci_info_str,
1640 .fw_version_str = qla24xx_fw_version_str,
1641 .intr_handler = qla82xx_intr_handler,
1642 .enable_intrs = qla82xx_enable_intrs,
1643 .disable_intrs = qla82xx_disable_intrs,
1644 .abort_command = qla24xx_abort_command,
1645 .target_reset = qla24xx_abort_target,
1646 .lun_reset = qla24xx_lun_reset,
1647 .fabric_login = qla24xx_login_fabric,
1648 .fabric_logout = qla24xx_fabric_logout,
1649 .calc_req_entries = NULL,
1650 .build_iocbs = NULL,
1651 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1652 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1653 .read_nvram = qla24xx_read_nvram_data,
1654 .write_nvram = qla24xx_write_nvram_data,
1655 .fw_dump = qla24xx_fw_dump,
1656 .beacon_on = qla24xx_beacon_on,
1657 .beacon_off = qla24xx_beacon_off,
1658 .beacon_blink = qla24xx_beacon_blink,
1659 .read_optrom = qla82xx_read_optrom_data,
1660 .write_optrom = qla82xx_write_optrom_data,
1661 .get_flash_version = qla24xx_get_flash_version,
1662 .start_scsi = qla82xx_start_scsi,
1663 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV		 1664};
1665
ea5b6382 1666static inline void
e315cd28 1667qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382 1668{
1669 ha->device_type = DT_EXTENDED_IDS;
1670 switch (ha->pdev->device) {
1671 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1672 ha->device_type |= DT_ISP2100;
1673 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1674 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1675 break;
1676 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1677 ha->device_type |= DT_ISP2200;
1678 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1679 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1680 break;
1681 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1682 ha->device_type |= DT_ISP2300;
4a59f71d 1683 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1684 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1685 break;
1686 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1687 ha->device_type |= DT_ISP2312;
4a59f71d 1688 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1689 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1690 break;
1691 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1692 ha->device_type |= DT_ISP2322;
4a59f71d 1693 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382 1694 if (ha->pdev->subsystem_vendor == 0x1028 &&
1695 ha->pdev->subsystem_device == 0x0170)
1696 ha->device_type |= DT_OEM_001;
441d1072 1697 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1698 break;
1699 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1700 ha->device_type |= DT_ISP6312;
441d1072 1701 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1702 break;
1703 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1704 ha->device_type |= DT_ISP6322;
441d1072 1705 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1706 break;
1707 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1708 ha->device_type |= DT_ISP2422;
4a59f71d 1709 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1710 ha->device_type |= DT_FWI2;
c76f2c01 1711 ha->device_type |= DT_IIDMA;
441d1072 1712 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1713 break;
1714 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1715 ha->device_type |= DT_ISP2432;
4a59f71d 1716 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1717 ha->device_type |= DT_FWI2;
c76f2c01 1718 ha->device_type |= DT_IIDMA;
441d1072 1719 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1720 break;
4d4df193
HK		 1721 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1722 ha->device_type |= DT_ISP8432;
1723 ha->device_type |= DT_ZIO_SUPPORTED;
1724 ha->device_type |= DT_FWI2;
1725 ha->device_type |= DT_IIDMA;
1726 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1727 break;
044cc6c8 1728 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1729 ha->device_type |= DT_ISP5422;
e428924c 1730 ha->device_type |= DT_FWI2;
441d1072 1731 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1732 break;
044cc6c8 1733 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1734 ha->device_type |= DT_ISP5432;
e428924c 1735 ha->device_type |= DT_FWI2;
441d1072 1736 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1737 break;
c3a2f0df
AV		 1738 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1739 ha->device_type |= DT_ISP2532;
1740 ha->device_type |= DT_ZIO_SUPPORTED;
1741 ha->device_type |= DT_FWI2;
1742 ha->device_type |= DT_IIDMA;
441d1072 1743 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1744 break;
3a03eb79
AV		 1745 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1746 ha->device_type |= DT_ISP8001;
1747 ha->device_type |= DT_ZIO_SUPPORTED;
1748 ha->device_type |= DT_FWI2;
1749 ha->device_type |= DT_IIDMA;
1750 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1751 break;
a9083016
GM		 1752 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1753 ha->device_type |= DT_ISP8021;
1754 ha->device_type |= DT_ZIO_SUPPORTED;
1755 ha->device_type |= DT_FWI2;
1756 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1757 /* Initialize 82XX ISP flags */
1758 qla82xx_init_flags(ha);
1759 break;
ea5b6382 1760 }
e5b68a61 1761
a9083016
GM		 1762 if (IS_QLA82XX(ha))
1763 ha->port_no = !(ha->portnum & 1);
1764 else
1765 /* Get adapter physical port no from interrupt pin register. */
1766 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1767
e5b68a61
AC		 1768 if (ha->port_no & 1)
1769 ha->flags.port0 = 1;
1770 else
1771 ha->flags.port0 = 0;
ea5b6382 1772}
1773
1da177e4 1774static int
e315cd28 1775qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1776{
3776541d 1777 resource_size_t pio;
73208dfd 1778 uint16_t msix;
68ca949c 1779 int cpus;
1da177e4 1780
a9083016
GM		 1781 if (IS_QLA82XX(ha))
1782 return qla82xx_iospace_config(ha);
1783
285d0321
AV		 1784 if (pci_request_selected_regions(ha->pdev, ha->bars,
1785 QLA2XXX_DRIVER_NAME)) {
1786 qla_printk(KERN_WARNING, ha,
1787 "Failed to reserve PIO/MMIO regions (%s)\n",
1788 pci_name(ha->pdev));
1789
1790 goto iospace_error_exit;
1791 }
1792 if (!(ha->bars & 1))
1793 goto skip_pio;
1794
1da177e4
LT		 1795 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1796 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV		 1797 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1798 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT		 1799 qla_printk(KERN_WARNING, ha,
1800 "Invalid PCI I/O region size (%s)...\n",
1801 pci_name(ha->pdev));
1802 pio = 0;
1803 }
1804 } else {
1805 qla_printk(KERN_WARNING, ha,
1806 "region #0 not a PIO resource (%s)...\n",
1807 pci_name(ha->pdev));
1808 pio = 0;
1809 }
285d0321 1810 ha->pio_address = pio;
1da177e4 1811
285d0321 1812skip_pio:
1da177e4 1813 /* Use MMIO operations for all accesses. */
3776541d 1814 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1815 qla_printk(KERN_ERR, ha,
3776541d 1816 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT		 1817 pci_name(ha->pdev));
1818 goto iospace_error_exit;
1819 }
3776541d 1820 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT		 1821 qla_printk(KERN_ERR, ha,
1822 "Invalid PCI mem region size (%s), aborting\n",
1823 pci_name(ha->pdev));
1824 goto iospace_error_exit;
1825 }
1826
3776541d 1827 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT		 1828 if (!ha->iobase) {
1829 qla_printk(KERN_ERR, ha,
1830 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1831
1832 goto iospace_error_exit;
1833 }
1834
73208dfd 1835 /* Determine queue resources */
2afa19a9 1836 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH		 1837 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1838 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1839 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1840 goto mqiobase_exit;
d84a47c2 1841
17d98630
AC		 1842 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1843 pci_resource_len(ha->pdev, 3));
1844 if (ha->mqiobase) {
1845 /* Read MSIX vector size of the board */
1846 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1847 ha->msix_count = msix;
68ca949c
AC		 1848 /* Max queues are bounded by available msix vectors */
1849 /* queue 0 uses two msix vectors */
1850 if (ql2xmultique_tag) {
1851 cpus = num_online_cpus();
27dc9c5a 1852 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC		 1853 (cpus + 1) : (ha->msix_count - 1);
1854 ha->max_req_queues = 2;
1855 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC		 1856 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1857 QLA_MQ_SIZE : ql2xmaxqueues;
1858 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1859 " of request queues:%d\n", ha->max_req_queues));
1860 }
68ca949c
AC		 1861 qla_printk(KERN_INFO, ha,
1862 "MSI-X vector count: %d\n", msix);
2afa19a9
AC		 1863 } else
1864 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC		 1865
1866mqiobase_exit:
2afa19a9 1867 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT		 1868 return (0);
1869
1870iospace_error_exit:
1871 return (-ENOMEM);
1872}
1873
1e99e33a
AV		 1874static void
1875qla2xxx_scan_start(struct Scsi_Host *shost)
1876{
e315cd28 1877 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1878
cbc8eb67
AV		 1879 if (vha->hw->flags.running_gold_fw)
1880 return;
1881
e315cd28
AC		 1882 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1883 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1884 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1885 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV		 1886}
1887
1888static int
1889qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1890{
e315cd28 1891 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1892
e315cd28 1893 if (!vha->host)
1e99e33a 1894 return 1;
e315cd28 1895 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV		 1896 return 1;
1897
e315cd28 1898 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV		 1899}
1900
1da177e4
LT		 1901/*
1902 * PCI driver interface
1903 */
7ee61397
AV		 1904static int __devinit
1905qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1906{
a1541d5a 1907 int ret = -ENODEV;
1da177e4 1908 struct Scsi_Host *host;
e315cd28
AC		 1909 scsi_qla_host_t *base_vha = NULL;
1910 struct qla_hw_data *ha;
29856e28 1911 char pci_info[30];
1da177e4 1912 char fw_str[30];
5433383e 1913 struct scsi_host_template *sht;
c51da4ec 1914 int bars, max_id, mem_only = 0;
e315cd28 1915 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC		 1916 struct req_que *req = NULL;
1917 struct rsp_que *rsp = NULL;
1da177e4 1918
285d0321 1919 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1920 sht = &qla2xxx_driver_template;
5433383e 1921 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1922 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1923 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1924 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1925 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1926 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM		 1927 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1928 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1929 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1930 mem_only = 1;
285d0321
AV		 1931 }
1932
09483916
BH		 1933 if (mem_only) {
1934 if (pci_enable_device_mem(pdev))
1935 goto probe_out;
1936 } else {
1937 if (pci_enable_device(pdev))
1938 goto probe_out;
1939 }
285d0321 1940
0927678f
JB		 1941 /* This may fail but that's ok */
1942 pci_enable_pcie_error_reporting(pdev);
285d0321 1943
e315cd28
AC		 1944 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1945 if (!ha) {
1946 DEBUG(printk("Unable to allocate memory for ha\n"));
1947 goto probe_out;
1da177e4 1948 }
e315cd28 1949 ha->pdev = pdev;
1da177e4
LT		 1950
1951 /* Clear our data area */
285d0321 1952 ha->bars = bars;
09483916 1953 ha->mem_only = mem_only;
df4bf0bb 1954 spin_lock_init(&ha->hardware_lock);
339aa70e 1955 spin_lock_init(&ha->vport_slock);
1da177e4 1956
ea5b6382 1957 /* Set ISP-type information. */
1958 qla2x00_set_isp_flags(ha);
ca79cf66
DG		 1959
1960 /* Set EEH reset type to fundamental if required by hba */
1961 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1962 pdev->needs_freset = 1;
ca79cf66
DG		 1963 }
1964
1da177e4
LT		 1965 /* Configure PCI I/O space */
1966 ret = qla2x00_iospace_config(ha);
a1541d5a 1967 if (ret)
e315cd28 1968 goto probe_hw_failed;
1da177e4 1969
1da177e4 1970 qla_printk(KERN_INFO, ha,
5433383e
AV		 1971 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1972 ha->iobase);
1da177e4 1973
1da177e4 1974 ha->prev_topology = 0;
fca29703 1975 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1976 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1977 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1978
abbd8870 1979 /* Assign ISP specific operations. */
e315cd28 1980 max_id = MAX_TARGETS_2200;
1da177e4 1981 if (IS_QLA2100(ha)) {
e315cd28 1982 max_id = MAX_TARGETS_2100;
1da177e4 1983 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC		 1984 req_length = REQUEST_ENTRY_CNT_2100;
1985 rsp_length = RESPONSE_ENTRY_CNT_2100;
1986 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1987 ha->gid_list_info_size = 4;
3a03eb79
AV		 1988 ha->flash_conf_off = ~0;
1989 ha->flash_data_off = ~0;
1990 ha->nvram_conf_off = ~0;
1991 ha->nvram_data_off = ~0;
fd34f556 1992 ha->isp_ops = &qla2100_isp_ops;
1da177e4 1993 } else if (IS_QLA2200(ha)) {
1da177e4 1994 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1995 req_length = REQUEST_ENTRY_CNT_2200;
1996 rsp_length = RESPONSE_ENTRY_CNT_2100;
1997 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1998 ha->gid_list_info_size = 4;
3a03eb79
AV		 1999 ha->flash_conf_off = ~0;
2000 ha->flash_data_off = ~0;
2001 ha->nvram_conf_off = ~0;
2002 ha->nvram_data_off = ~0;
fd34f556 2003 ha->isp_ops = &qla2100_isp_ops;
fca29703 2004 } else if (IS_QLA23XX(ha)) {
1da177e4 2005 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2006 req_length = REQUEST_ENTRY_CNT_2200;
2007 rsp_length = RESPONSE_ENTRY_CNT_2300;
2008 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 2009 ha->gid_list_info_size = 6;
854165f4 2010 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2011 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV		 2012 ha->flash_conf_off = ~0;
2013 ha->flash_data_off = ~0;
2014 ha->nvram_conf_off = ~0;
2015 ha->nvram_data_off = ~0;
fd34f556 2016 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2017 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2018 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2019 req_length = REQUEST_ENTRY_CNT_24XX;
2020 rsp_length = RESPONSE_ENTRY_CNT_2300;
2021 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2022 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2023 ha->gid_list_info_size = 8;
854165f4 2024 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2025 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2026 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV		 2027 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2028 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2029 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2030 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2031 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2032 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2033 req_length = REQUEST_ENTRY_CNT_24XX;
2034 rsp_length = RESPONSE_ENTRY_CNT_2300;
2035 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2036 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV		 2037 ha->gid_list_info_size = 8;
2038 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2039 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2040 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV		 2041 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2042 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2043 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2044 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2045 } else if (IS_QLA81XX(ha)) {
2046 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2047 req_length = REQUEST_ENTRY_CNT_24XX;
2048 rsp_length = RESPONSE_ENTRY_CNT_2300;
2049 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2050 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2051 ha->gid_list_info_size = 8;
2052 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2053 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV		 2054 ha->isp_ops = &qla81xx_isp_ops;
2055 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2056 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2057 ha->nvram_conf_off = ~0;
2058 ha->nvram_data_off = ~0;
a9083016
GM		 2059 } else if (IS_QLA82XX(ha)) {
2060 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2061 req_length = REQUEST_ENTRY_CNT_82XX;
2062 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2063 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2064 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2065 ha->gid_list_info_size = 8;
2066 ha->optrom_size = OPTROM_SIZE_82XX;
087c621e 2067 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
a9083016
GM		 2068 ha->isp_ops = &qla82xx_isp_ops;
2069 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2070 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2071 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2072 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2073 }
1da177e4 2074
6c2f527c 2075 mutex_init(&ha->vport_lock);
0b05a1f0
MB		 2076 init_completion(&ha->mbx_cmd_comp);
2077 complete(&ha->mbx_cmd_comp);
2078 init_completion(&ha->mbx_intr_comp);
23f2ebd1 2079 init_completion(&ha->dcbx_comp);
1da177e4 2080
2c3dfe3f 2081 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2082
53303c42 2083 qla2x00_config_dma_addressing(ha);
73208dfd 2084 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2085 if (!ret) {
1da177e4
LT		 2086 qla_printk(KERN_WARNING, ha,
2087 "[ERROR] Failed to allocate memory for adapter\n");
2088
e315cd28
AC		 2089 goto probe_hw_failed;
2090 }
2091
73208dfd 2092 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2093 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC		 2094 req->max_q_depth = ql2xmaxqdepth;
2095
e315cd28
AC		 2096
2097 base_vha = qla2x00_create_host(sht, ha);
2098 if (!base_vha) {
2099 qla_printk(KERN_WARNING, ha,
2100 "[ERROR] Failed to allocate memory for scsi_host\n");
2101
a1541d5a 2102 ret = -ENOMEM;
6e9f21f3 2103 qla2x00_mem_free(ha);
2afa19a9
AC		 2104 qla2x00_free_req_que(ha, req);
2105 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2106 goto probe_hw_failed;
1da177e4
LT		 2107 }
2108
e315cd28
AC		 2109 pci_set_drvdata(pdev, base_vha);
2110
e315cd28 2111 host = base_vha->host;
2afa19a9 2112 base_vha->req = req;
73208dfd
AC		 2113 host->can_queue = req->length + 128;
2114 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2115 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2116 else
e315cd28
AC		 2117 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2118 base_vha->vp_idx;
58548cb5
GM		 2119
2120 /* Set the SG table size based on ISP type */
2121 if (!IS_FWI2_CAPABLE(ha)) {
2122 if (IS_QLA2100(ha))
2123 host->sg_tablesize = 32;
2124 } else {
2125 if (!IS_QLA82XX(ha))
2126 host->sg_tablesize = QLA_SG_ALL;
2127 }
2128
e315cd28
AC		 2129 host->max_id = max_id;
2130 host->this_id = 255;
2131 host->cmd_per_lun = 3;
2132 host->unique_id = host->host_no;
0c470874
AE		 2133 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2134 host->max_cmd_len = 32;
2135 else
2136 host->max_cmd_len = MAX_CMDSZ;
e315cd28
AC		 2137 host->max_channel = MAX_BUSES - 1;
2138 host->max_lun = MAX_LUNS;
2139 host->transportt = qla2xxx_transport_template;
9a069e19 2140 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2141
73208dfd
AC		 2142 /* Set up the irqs */
2143 ret = qla2x00_request_irqs(ha, rsp);
2144 if (ret)
6e9f21f3 2145 goto probe_init_failed;
90a86fc0
JC		 2146
2147 pci_save_state(pdev);
2148
73208dfd 2149 /* Alloc arrays of request and response ring ptrs */
7163ea81 2150que_init:
73208dfd
AC		 2151 if (!qla2x00_alloc_queues(ha)) {
2152 qla_printk(KERN_WARNING, ha,
2153 "[ERROR] Failed to allocate memory for queue"
2154 " pointers\n");
6e9f21f3 2155 goto probe_init_failed;
73208dfd 2156 }
a9083016 2157
73208dfd
AC		 2158 ha->rsp_q_map[0] = rsp;
2159 ha->req_q_map[0] = req;
2afa19a9
AC		 2160 rsp->req = req;
2161 req->rsp = rsp;
2162 set_bit(0, ha->req_qid_map);
2163 set_bit(0, ha->rsp_qid_map);
08029990
AV		 2164 /* FWI2-capable only. */
2165 req->req_q_in = &ha->iobase->isp24.req_q_in;
2166 req->req_q_out = &ha->iobase->isp24.req_q_out;
2167 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2168 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2169 if (ha->mqenable) {
08029990
AV		 2170 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2171 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2172 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2173 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC		 2174 }
2175
a9083016
GM		 2176 if (IS_QLA82XX(ha)) {
2177 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2178 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2179 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2180 }
2181
e315cd28 2182 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT		 2183 qla_printk(KERN_WARNING, ha,
2184 "Failed to initialize adapter\n");
2185
2186 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2187 "Adapter flags %x.\n",
e315cd28 2188 base_vha->host_no, base_vha->device_flags));
1da177e4 2189
a9083016
GM		 2190 if (IS_QLA82XX(ha)) {
2191 qla82xx_idc_lock(ha);
2192 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2193 QLA82XX_DEV_FAILED);
2194 qla82xx_idc_unlock(ha);
2195 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2196 }
2197
a1541d5a 2198 ret = -ENODEV;
1da177e4
LT		 2199 goto probe_failed;
2200 }
2201
7163ea81
AC		 2202 if (ha->mqenable) {
2203 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC		 2204 qla_printk(KERN_WARNING, ha,
2205 "Can't create queues, falling back to single"
2206 " queue mode\n");
7163ea81
AC		 2207 goto que_init;
2208 }
2209 }
68ca949c 2210
cbc8eb67
AV		 2211 if (ha->flags.running_gold_fw)
2212 goto skip_dpc;
2213
1da177e4
LT		 2214 /*
2215 * Startup the kernel thread for this host adapter
2216 */
39a11240 2217 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2218 "%s_dpc", base_vha->host_str);
39a11240 2219 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT		 2220 qla_printk(KERN_WARNING, ha,
2221 "Unable to start DPC thread!\n");
39a11240 2222 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT		 2223 goto probe_failed;
2224 }
1da177e4 2225
cbc8eb67 2226skip_dpc:
e315cd28
AC		 2227 list_add_tail(&base_vha->list, &ha->vp_list);
2228 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT		 2229
2230 /* Initialized the timer */
e315cd28 2231 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT		 2232
2233 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2234 base_vha->host_no, ha));
d19044c3 2235
ba77ef53 2236 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
bad75002
AE		 2237 if (ha->fw_attributes & BIT_4) {
2238 base_vha->flags.difdix_supported = 1;
2239 DEBUG18(qla_printk(KERN_INFO, ha,
2240 "Registering for DIF/DIX type 1 and 3"
2241 " protection.\n"));
2242 scsi_host_set_prot(host,
2243 SHOST_DIF_TYPE1_PROTECTION
0c470874 2244 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2245 | SHOST_DIF_TYPE3_PROTECTION
2246 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2247 | SHOST_DIX_TYPE2_PROTECTION
bad75002
AE		 2248 | SHOST_DIX_TYPE3_PROTECTION);
2249 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2250 } else
2251 base_vha->flags.difdix_supported = 0;
2252 }
2253
a9083016
GM		 2254 ha->isp_ops->enable_intrs(ha);
2255
a1541d5a
AV		 2256 ret = scsi_add_host(host, &pdev->dev);
2257 if (ret)
2258 goto probe_failed;
2259
1486400f
MR		 2260 base_vha->flags.init_done = 1;
2261 base_vha->flags.online = 1;
2262
1e99e33a
AV		 2263 scsi_scan_host(host);
2264
e315cd28 2265 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2266
e315cd28 2267 qla2x00_init_host_attr(base_vha);
a1541d5a 2268
e315cd28 2269 qla2x00_dfs_setup(base_vha);
df613b96 2270
1da177e4
LT		 2271 qla_printk(KERN_INFO, ha, "\n"
2272 " QLogic Fibre Channel HBA Driver: %s\n"
2273 " QLogic %s - %s\n"
5433383e
AV		 2274 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2275 qla2x00_version_str, ha->model_number,
e315cd28
AC		 2276 ha->model_desc ? ha->model_desc : "", pdev->device,
2277 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2278 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2279 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2280
1da177e4
LT		 2281 return 0;
2282
6e9f21f3 2283probe_init_failed:
2afa19a9
AC		 2284 qla2x00_free_req_que(ha, req);
2285 qla2x00_free_rsp_que(ha, rsp);
2286 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2287
1da177e4 2288probe_failed:
b9978769
AV		 2289 if (base_vha->timer_active)
2290 qla2x00_stop_timer(base_vha);
2291 base_vha->flags.online = 0;
2292 if (ha->dpc_thread) {
2293 struct task_struct *t = ha->dpc_thread;
2294
2295 ha->dpc_thread = NULL;
2296 kthread_stop(t);
2297 }
2298
e315cd28 2299 qla2x00_free_device(base_vha);
1da177e4 2300
e315cd28 2301 scsi_host_put(base_vha->host);
1da177e4 2302
e315cd28 2303probe_hw_failed:
a9083016
GM		 2304 if (IS_QLA82XX(ha)) {
2305 qla82xx_idc_lock(ha);
2306 qla82xx_clear_drv_active(ha);
2307 qla82xx_idc_unlock(ha);
2308 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2309 if (!ql2xdbwr)
2310 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2311 } else {
2312 if (ha->iobase)
2313 iounmap(ha->iobase);
2314 }
e315cd28
AC		 2315 pci_release_selected_regions(ha->pdev, ha->bars);
2316 kfree(ha);
2317 ha = NULL;
1da177e4 2318
a1541d5a 2319probe_out:
e315cd28 2320 pci_disable_device(pdev);
a1541d5a 2321 return ret;
1da177e4 2322}
1da177e4 2323
e30d1756
MI		 2324static void
2325qla2x00_shutdown(struct pci_dev *pdev)
2326{
2327 scsi_qla_host_t *vha;
2328 struct qla_hw_data *ha;
2329
2330 vha = pci_get_drvdata(pdev);
2331 ha = vha->hw;
2332
2333 /* Turn-off FCE trace */
2334 if (ha->flags.fce_enabled) {
2335 qla2x00_disable_fce_trace(vha, NULL, NULL);
2336 ha->flags.fce_enabled = 0;
2337 }
2338
2339 /* Turn-off EFT trace */
2340 if (ha->eft)
2341 qla2x00_disable_eft_trace(vha);
2342
2343 /* Stop currently executing firmware. */
2344 qla2x00_try_to_stop_firmware(vha);
2345
2346 /* Turn adapter off line */
2347 vha->flags.online = 0;
2348
2349 /* turn-off interrupts on the card */
2350 if (ha->interrupts_on) {
2351 vha->flags.init_done = 0;
2352 ha->isp_ops->disable_intrs(ha);
2353 }
2354
2355 qla2x00_free_irqs(vha);
2356
2357 qla2x00_free_fw_dump(ha);
2358}
2359
4c993f76 2360static void
7ee61397 2361qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2362{
feafb7b1 2363 scsi_qla_host_t *base_vha, *vha;
e315cd28 2364 struct qla_hw_data *ha;
feafb7b1 2365 unsigned long flags;
e315cd28
AC		 2366
2367 base_vha = pci_get_drvdata(pdev);
2368 ha = base_vha->hw;
2369
feafb7b1
AE		 2370 spin_lock_irqsave(&ha->vport_slock, flags);
2371 list_for_each_entry(vha, &ha->vp_list, list) {
2372 atomic_inc(&vha->vref_count);
2373
2374 if (vha && vha->fc_vport) {
2375 spin_unlock_irqrestore(&ha->vport_slock, flags);
2376
e315cd28 2377 fc_vport_terminate(vha->fc_vport);
feafb7b1
AE		 2378
2379 spin_lock_irqsave(&ha->vport_slock, flags);
2380 }
2381
2382 atomic_dec(&vha->vref_count);
e315cd28 2383 }
feafb7b1 2384 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 2385
e315cd28 2386 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2387
b9978769
AV		 2388 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2389
e315cd28 2390 qla2x00_dfs_remove(base_vha);
c795c1e4 2391
e315cd28 2392 qla84xx_put_chip(base_vha);
c795c1e4 2393
b9978769
AV		 2394 /* Disable timer */
2395 if (base_vha->timer_active)
2396 qla2x00_stop_timer(base_vha);
2397
2398 base_vha->flags.online = 0;
2399
68ca949c
AC		 2400 /* Flush the work queue and remove it */
2401 if (ha->wq) {
2402 flush_workqueue(ha->wq);
2403 destroy_workqueue(ha->wq);
2404 ha->wq = NULL;
2405 }
2406
b9978769
AV		 2407 /* Kill the kernel thread for this host */
2408 if (ha->dpc_thread) {
2409 struct task_struct *t = ha->dpc_thread;
2410
2411 /*
2412 * qla2xxx_wake_dpc checks for ->dpc_thread
2413 * so we need to zero it out.
2414 */
2415 ha->dpc_thread = NULL;
2416 kthread_stop(t);
2417 }
2418
e315cd28 2419 qla2x00_free_sysfs_attr(base_vha);
df613b96 2420
e315cd28 2421 fc_remove_host(base_vha->host);
4d4df193 2422
e315cd28 2423 scsi_remove_host(base_vha->host);
1da177e4 2424
e315cd28 2425 qla2x00_free_device(base_vha);
bdf79621 2426
e315cd28 2427 scsi_host_put(base_vha->host);
1da177e4 2428
a9083016 2429 if (IS_QLA82XX(ha)) {
b963752f
GM		 2430 qla82xx_idc_lock(ha);
2431 qla82xx_clear_drv_active(ha);
2432 qla82xx_idc_unlock(ha);
2433
a9083016
GM		 2434 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2435 if (!ql2xdbwr)
2436 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2437 } else {
2438 if (ha->iobase)
2439 iounmap(ha->iobase);
1da177e4 2440
a9083016
GM		 2441 if (ha->mqiobase)
2442 iounmap(ha->mqiobase);
2443 }
73208dfd 2444
e315cd28
AC		 2445 pci_release_selected_regions(ha->pdev, ha->bars);
2446 kfree(ha);
2447 ha = NULL;
1da177e4 2448
90a86fc0
JC		 2449 pci_disable_pcie_error_reporting(pdev);
2450
665db93b 2451 pci_disable_device(pdev);
1da177e4
LT		 2452 pci_set_drvdata(pdev, NULL);
2453}
1da177e4
LT		 2454
2455static void
e315cd28 2456qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2457{
e315cd28 2458 struct qla_hw_data *ha = vha->hw;
1da177e4 2459
85880801
AV		 2460 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2461
2462 /* Disable timer */
2463 if (vha->timer_active)
2464 qla2x00_stop_timer(vha);
2465
2466 /* Kill the kernel thread for this host */
2467 if (ha->dpc_thread) {
2468 struct task_struct *t = ha->dpc_thread;
2469
2470 /*
2471 * qla2xxx_wake_dpc checks for ->dpc_thread
2472 * so we need to zero it out.
2473 */
2474 ha->dpc_thread = NULL;
2475 kthread_stop(t);
2476 }
2477
2afa19a9
AC		 2478 qla25xx_delete_queues(vha);
2479
df613b96 2480 if (ha->flags.fce_enabled)
e315cd28 2481 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2482
a7a167bf 2483 if (ha->eft)
e315cd28 2484 qla2x00_disable_eft_trace(vha);
a7a167bf 2485
f6ef3b18 2486 /* Stop currently executing firmware. */
e315cd28 2487 qla2x00_try_to_stop_firmware(vha);
1da177e4 2488
85880801
AV		 2489 vha->flags.online = 0;
2490
f6ef3b18 2491 /* turn-off interrupts on the card */
a9083016
GM		 2492 if (ha->interrupts_on) {
2493 vha->flags.init_done = 0;
fd34f556 2494 ha->isp_ops->disable_intrs(ha);
a9083016 2495 }
f6ef3b18 2496
e315cd28 2497 qla2x00_free_irqs(vha);
1da177e4 2498
8867048b
CD		 2499 qla2x00_free_fcports(vha);
2500
e315cd28 2501 qla2x00_mem_free(ha);
73208dfd
AC		 2502
2503 qla2x00_free_queues(ha);
1da177e4
LT		 2504}
2505
8867048b
CD		 2506void qla2x00_free_fcports(struct scsi_qla_host *vha)
2507{
2508 fc_port_t *fcport, *tfcport;
2509
2510 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2511 list_del(&fcport->list);
2512 kfree(fcport);
2513 fcport = NULL;
2514 }
2515}
2516
d97994dc 2517static inline void
e315cd28 2518qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc 2519 int defer)
2520{
d97994dc 2521 struct fc_rport *rport;
67becc00 2522 scsi_qla_host_t *base_vha;
d97994dc 2523
2524 if (!fcport->rport)
2525 return;
2526
2527 rport = fcport->rport;
2528 if (defer) {
67becc00 2529 base_vha = pci_get_drvdata(vha->hw->pdev);
e315cd28 2530 spin_lock_irq(vha->host->host_lock);
d97994dc 2531 fcport->drport = rport;
e315cd28 2532 spin_unlock_irq(vha->host->host_lock);
67becc00
AV		 2533 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2534 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2535 } else
d97994dc 2536 fc_remote_port_delete(rport);
d97994dc 2537}
2538
1da177e4
LT		 2539/*
2540 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2541 *
2542 * Input: ha = adapter block pointer. fcport = port structure pointer.
2543 *
2544 * Return: None.
2545 *
2546 * Context:
2547 */
e315cd28 2548void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2549 int do_login, int defer)
1da177e4 2550{
2c3dfe3f 2551 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28
AC		 2552 vha->vp_idx == fcport->vp_idx) {
2553 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2554 qla2x00_schedule_rport_del(vha, fcport, defer);
2555 }
fa2a1ce5 2556 /*
1da177e4
LT		 2557 * We may need to retry the login, so don't change the state of the
2558 * port but do the retries.
2559 */
2560 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2561 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2562
2563 if (!do_login)
2564 return;
2565
2566 if (fcport->login_retry == 0) {
e315cd28
AC		 2567 fcport->login_retry = vha->hw->login_retry_count;
2568 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2569
2570 DEBUG(printk("scsi(%ld): Port login retry: "
2571 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2572 "id = 0x%04x retry cnt=%d\n",
e315cd28 2573 vha->host_no,
1da177e4
LT		 2574 fcport->port_name[0],
2575 fcport->port_name[1],
2576 fcport->port_name[2],
2577 fcport->port_name[3],
2578 fcport->port_name[4],
2579 fcport->port_name[5],
2580 fcport->port_name[6],
2581 fcport->port_name[7],
2582 fcport->loop_id,
2583 fcport->login_retry));
2584 }
2585}
2586
2587/*
2588 * qla2x00_mark_all_devices_lost
2589 * Updates fcport state when device goes offline.
2590 *
2591 * Input:
2592 * ha = adapter block pointer.
2593 * fcport = port structure pointer.
2594 *
2595 * Return:
2596 * None.
2597 *
2598 * Context:
2599 */
2600void
e315cd28 2601qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT		 2602{
2603 fc_port_t *fcport;
2604
e315cd28 2605 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2606 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2607 continue;
0d6e61bc 2608
1da177e4
LT		 2609 /*
2610 * No point in marking the device as lost, if the device is
2611 * already DEAD.
2612 */
2613 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2614 continue;
e315cd28 2615 if (atomic_read(&fcport->state) == FCS_ONLINE) {
38170fa8 2616 atomic_set(&fcport->state, FCS_DEVICE_LOST);
0d6e61bc
AV		 2617 if (defer)
2618 qla2x00_schedule_rport_del(vha, fcport, defer);
2619 else if (vha->vp_idx == fcport->vp_idx)
2620 qla2x00_schedule_rport_del(vha, fcport, defer);
2621 }
1da177e4
LT		 2622 }
2623}
2624
2625/*
2626* qla2x00_mem_alloc
2627* Allocates adapter memory.
2628*
2629* Returns:
2630* 0 = success.
e8711085 2631* !0 = failure.
1da177e4 2632*/
e8711085 2633static int
73208dfd
AC		 2634qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2635 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT		 2636{
2637 char name[16];
1da177e4 2638
e8711085 2639 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2640 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2641 if (!ha->init_cb)
e315cd28 2642 goto fail;
e8711085 2643
e315cd28
AC		 2644 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2645 &ha->gid_list_dma, GFP_KERNEL);
2646 if (!ha->gid_list)
e8711085 2647 goto fail_free_init_cb;
1da177e4 2648
e8711085
AV		 2649 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2650 if (!ha->srb_mempool)
e315cd28 2651 goto fail_free_gid_list;
e8711085 2652
a9083016
GM		 2653 if (IS_QLA82XX(ha)) {
2654 /* Allocate cache for CT6 Ctx. */
2655 if (!ctx_cachep) {
2656 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2657 sizeof(struct ct6_dsd), 0,
2658 SLAB_HWCACHE_ALIGN, NULL);
2659 if (!ctx_cachep)
2660 goto fail_free_gid_list;
2661 }
2662 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2663 ctx_cachep);
2664 if (!ha->ctx_mempool)
2665 goto fail_free_srb_mempool;
2666 }
2667
e8711085
AV		 2668 /* Get memory for cached NVRAM */
2669 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2670 if (!ha->nvram)
a9083016 2671 goto fail_free_ctx_mempool;
e8711085 2672
e315cd28
AC		 2673 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2674 ha->pdev->device);
2675 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2676 DMA_POOL_SIZE, 8, 0);
2677 if (!ha->s_dma_pool)
2678 goto fail_free_nvram;
2679
bad75002 2680 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2681 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2682 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2683 if (!ha->dl_dma_pool) {
2684 qla_printk(KERN_WARNING, ha,
2685 "Memory Allocation failed - dl_dma_pool\n");
2686 goto fail_s_dma_pool;
2687 }
2688
2689 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2690 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2691 if (!ha->fcp_cmnd_dma_pool) {
2692 qla_printk(KERN_WARNING, ha,
2693 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2694 goto fail_dl_dma_pool;
2695 }
2696 }
2697
e8711085
AV		 2698 /* Allocate memory for SNS commands */
2699 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2700 /* Get consistent memory allocated for SNS commands */
e8711085 2701 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2702 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2703 if (!ha->sns_cmd)
e315cd28 2704 goto fail_dma_pool;
e8711085 2705 } else {
e315cd28 2706 /* Get consistent memory allocated for MS IOCB */
e8711085 2707 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2708 &ha->ms_iocb_dma);
e8711085 2709 if (!ha->ms_iocb)
e315cd28
AC		 2710 goto fail_dma_pool;
2711 /* Get consistent memory allocated for CT SNS commands */
e8711085 2712 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2713 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV		 2714 if (!ha->ct_sns)
2715 goto fail_free_ms_iocb;
1da177e4
LT		 2716 }
2717
e315cd28 2718 /* Allocate memory for request ring */
73208dfd
AC		 2719 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2720 if (!*req) {
e315cd28
AC		 2721 DEBUG(printk("Unable to allocate memory for req\n"));
2722 goto fail_req;
2723 }
73208dfd
AC		 2724 (*req)->length = req_len;
2725 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2726 ((*req)->length + 1) * sizeof(request_t),
2727 &(*req)->dma, GFP_KERNEL);
2728 if (!(*req)->ring) {
e315cd28
AC		 2729 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2730 goto fail_req_ring;
2731 }
2732 /* Allocate memory for response ring */
73208dfd
AC		 2733 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2734 if (!*rsp) {
2735 qla_printk(KERN_WARNING, ha,
2736 "Unable to allocate memory for rsp\n");
e315cd28
AC		 2737 goto fail_rsp;
2738 }
73208dfd
AC		 2739 (*rsp)->hw = ha;
2740 (*rsp)->length = rsp_len;
2741 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2742 ((*rsp)->length + 1) * sizeof(response_t),
2743 &(*rsp)->dma, GFP_KERNEL);
2744 if (!(*rsp)->ring) {
2745 qla_printk(KERN_WARNING, ha,
2746 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC		 2747 goto fail_rsp_ring;
2748 }
73208dfd
AC		 2749 (*req)->rsp = *rsp;
2750 (*rsp)->req = *req;
2751 /* Allocate memory for NVRAM data for vports */
2752 if (ha->nvram_npiv_size) {
2753 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2754 ha->nvram_npiv_size, GFP_KERNEL);
2755 if (!ha->npiv_info) {
2756 qla_printk(KERN_WARNING, ha,
2757 "Unable to allocate memory for npiv info\n");
2758 goto fail_npiv_info;
2759 }
2760 } else
2761 ha->npiv_info = NULL;
e8711085 2762
b64b0e8f 2763 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2764 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV		 2765 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2766 &ha->ex_init_cb_dma);
2767 if (!ha->ex_init_cb)
2768 goto fail_ex_init_cb;
2769 }
2770
a9083016
GM		 2771 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2772
5ff1d584
AV		 2773 /* Get consistent memory allocated for Async Port-Database. */
2774 if (!IS_FWI2_CAPABLE(ha)) {
2775 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2776 &ha->async_pd_dma);
2777 if (!ha->async_pd)
2778 goto fail_async_pd;
2779 }
2780
e315cd28
AC		 2781 INIT_LIST_HEAD(&ha->vp_list);
2782 return 1;
2783
5ff1d584
AV		 2784fail_async_pd:
2785 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV		 2786fail_ex_init_cb:
2787 kfree(ha->npiv_info);
73208dfd
AC		 2788fail_npiv_info:
2789 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2790 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2791 (*rsp)->ring = NULL;
2792 (*rsp)->dma = 0;
e315cd28 2793fail_rsp_ring:
73208dfd 2794 kfree(*rsp);
e315cd28 2795fail_rsp:
73208dfd
AC		 2796 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2797 sizeof(request_t), (*req)->ring, (*req)->dma);
2798 (*req)->ring = NULL;
2799 (*req)->dma = 0;
e315cd28 2800fail_req_ring:
73208dfd 2801 kfree(*req);
e315cd28
AC		 2802fail_req:
2803 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2804 ha->ct_sns, ha->ct_sns_dma);
2805 ha->ct_sns = NULL;
2806 ha->ct_sns_dma = 0;
e8711085
AV		 2807fail_free_ms_iocb:
2808 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2809 ha->ms_iocb = NULL;
2810 ha->ms_iocb_dma = 0;
e315cd28 2811fail_dma_pool:
bad75002 2812 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2813 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2814 ha->fcp_cmnd_dma_pool = NULL;
2815 }
2816fail_dl_dma_pool:
bad75002 2817 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2818 dma_pool_destroy(ha->dl_dma_pool);
2819 ha->dl_dma_pool = NULL;
2820 }
2821fail_s_dma_pool:
e315cd28
AC		 2822 dma_pool_destroy(ha->s_dma_pool);
2823 ha->s_dma_pool = NULL;
e8711085
AV		 2824fail_free_nvram:
2825 kfree(ha->nvram);
2826 ha->nvram = NULL;
a9083016
GM		 2827fail_free_ctx_mempool:
2828 mempool_destroy(ha->ctx_mempool);
2829 ha->ctx_mempool = NULL;
e8711085
AV		 2830fail_free_srb_mempool:
2831 mempool_destroy(ha->srb_mempool);
2832 ha->srb_mempool = NULL;
e8711085
AV		 2833fail_free_gid_list:
2834 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2835 ha->gid_list_dma);
e8711085
AV		 2836 ha->gid_list = NULL;
2837 ha->gid_list_dma = 0;
e315cd28
AC		 2838fail_free_init_cb:
2839 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2840 ha->init_cb_dma);
2841 ha->init_cb = NULL;
2842 ha->init_cb_dma = 0;
e8711085 2843fail:
e315cd28 2844 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2845 return -ENOMEM;
1da177e4
LT		 2846}
2847
2848/*
e30d1756
MI		 2849* qla2x00_free_fw_dump
2850* Frees fw dump stuff.
1da177e4
LT		 2851*
2852* Input:
e30d1756 2853* ha = adapter block pointer.
1da177e4 2854*/
a824ebb3 2855static void
e30d1756 2856qla2x00_free_fw_dump(struct qla_hw_data *ha)
1da177e4 2857{
df613b96
AV		 2858 if (ha->fce)
2859 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e30d1756 2860 ha->fce_dma);
df613b96 2861
a7a167bf
AV		 2862 if (ha->fw_dump) {
2863 if (ha->eft)
2864 dma_free_coherent(&ha->pdev->dev,
e30d1756 2865 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV		 2866 vfree(ha->fw_dump);
2867 }
e30d1756
MI		 2868 ha->fce = NULL;
2869 ha->fce_dma = 0;
2870 ha->eft = NULL;
2871 ha->eft_dma = 0;
2872 ha->fw_dump = NULL;
2873 ha->fw_dumped = 0;
2874 ha->fw_dump_reading = 0;
2875}
2876
2877/*
2878* qla2x00_mem_free
2879* Frees all adapter allocated memory.
2880*
2881* Input:
2882* ha = adapter block pointer.
2883*/
2884static void
2885qla2x00_mem_free(struct qla_hw_data *ha)
2886{
2887 qla2x00_free_fw_dump(ha);
2888
2889 if (ha->srb_mempool)
2890 mempool_destroy(ha->srb_mempool);
a7a167bf 2891
11bbc1d8
AV		 2892 if (ha->dcbx_tlv)
2893 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2894 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2895
ce0423f4
AV		 2896 if (ha->xgmac_data)
2897 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2898 ha->xgmac_data, ha->xgmac_data_dma);
2899
1da177e4
LT		 2900 if (ha->sns_cmd)
2901 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2902 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT		 2903
2904 if (ha->ct_sns)
2905 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2906 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2907
88729e53
AV		 2908 if (ha->sfp_data)
2909 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2910
ad0ecd61
JC		 2911 if (ha->edc_data)
2912 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2913
1da177e4
LT		 2914 if (ha->ms_iocb)
2915 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2916
b64b0e8f 2917 if (ha->ex_init_cb)
a9083016
GM		 2918 dma_pool_free(ha->s_dma_pool,
2919 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2920
5ff1d584
AV		 2921 if (ha->async_pd)
2922 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2923
1da177e4
LT		 2924 if (ha->s_dma_pool)
2925 dma_pool_destroy(ha->s_dma_pool);
2926
1da177e4
LT		 2927 if (ha->gid_list)
2928 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2929 ha->gid_list_dma);
1da177e4 2930
a9083016
GM		 2931 if (IS_QLA82XX(ha)) {
2932 if (!list_empty(&ha->gbl_dsd_list)) {
2933 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2934
2935 /* clean up allocated prev pool */
2936 list_for_each_entry_safe(dsd_ptr,
2937 tdsd_ptr, &ha->gbl_dsd_list, list) {
2938 dma_pool_free(ha->dl_dma_pool,
2939 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2940 list_del(&dsd_ptr->list);
2941 kfree(dsd_ptr);
2942 }
2943 }
2944 }
2945
2946 if (ha->dl_dma_pool)
2947 dma_pool_destroy(ha->dl_dma_pool);
2948
2949 if (ha->fcp_cmnd_dma_pool)
2950 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2951
2952 if (ha->ctx_mempool)
2953 mempool_destroy(ha->ctx_mempool);
2954
e315cd28
AC		 2955 if (ha->init_cb)
2956 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2957 ha->init_cb, ha->init_cb_dma);
e315cd28
AC		 2958 vfree(ha->optrom_buffer);
2959 kfree(ha->nvram);
73208dfd 2960 kfree(ha->npiv_info);
1da177e4 2961
e8711085 2962 ha->srb_mempool = NULL;
a9083016 2963 ha->ctx_mempool = NULL;
1da177e4
LT		 2964 ha->sns_cmd = NULL;
2965 ha->sns_cmd_dma = 0;
2966 ha->ct_sns = NULL;
2967 ha->ct_sns_dma = 0;
2968 ha->ms_iocb = NULL;
2969 ha->ms_iocb_dma = 0;
1da177e4
LT		 2970 ha->init_cb = NULL;
2971 ha->init_cb_dma = 0;
b64b0e8f
AV		 2972 ha->ex_init_cb = NULL;
2973 ha->ex_init_cb_dma = 0;
5ff1d584
AV		 2974 ha->async_pd = NULL;
2975 ha->async_pd_dma = 0;
1da177e4
LT		 2976
2977 ha->s_dma_pool = NULL;
a9083016
GM		 2978 ha->dl_dma_pool = NULL;
2979 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2980
1da177e4
LT		 2981 ha->gid_list = NULL;
2982 ha->gid_list_dma = 0;
e315cd28 2983}
1da177e4 2984
e315cd28
AC		 2985struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2986 struct qla_hw_data *ha)
2987{
2988 struct Scsi_Host *host;
2989 struct scsi_qla_host *vha = NULL;
854165f4 2990
e315cd28
AC		 2991 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2992 if (host == NULL) {
2993 printk(KERN_WARNING
2994 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2995 goto fail;
2996 }
2997
2998 /* Clear our data area */
2999 vha = shost_priv(host);
3000 memset(vha, 0, sizeof(scsi_qla_host_t));
3001
3002 vha->host = host;
3003 vha->host_no = host->host_no;
3004 vha->hw = ha;
3005
3006 INIT_LIST_HEAD(&vha->vp_fcports);
3007 INIT_LIST_HEAD(&vha->work_list);
3008 INIT_LIST_HEAD(&vha->list);
3009
f999f4c1
AV		 3010 spin_lock_init(&vha->work_lock);
3011
e315cd28
AC		 3012 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3013 return vha;
3014
3015fail:
3016 return vha;
1da177e4
LT		 3017}
3018
01ef66bb 3019static struct qla_work_evt *
f999f4c1 3020qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV		 3021{
3022 struct qla_work_evt *e;
feafb7b1
AE		 3023 uint8_t bail;
3024
3025 QLA_VHA_MARK_BUSY(vha, bail);
3026 if (bail)
3027 return NULL;
0971de7f 3028
f999f4c1 3029 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
feafb7b1
AE		 3030 if (!e) {
3031 QLA_VHA_MARK_NOT_BUSY(vha);
0971de7f 3032 return NULL;
feafb7b1 3033 }
0971de7f
AV		 3034
3035 INIT_LIST_HEAD(&e->list);
3036 e->type = type;
3037 e->flags = QLA_EVT_FLAG_FREE;
3038 return e;
3039}
3040
01ef66bb 3041static int
f999f4c1 3042qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 3043{
f999f4c1 3044 unsigned long flags;
0971de7f 3045
f999f4c1 3046 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 3047 list_add_tail(&e->list, &vha->work_list);
f999f4c1 3048 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 3049 qla2xxx_wake_dpc(vha);
f999f4c1 3050
0971de7f
AV		 3051 return QLA_SUCCESS;
3052}
3053
3054int
e315cd28 3055qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV		 3056 u32 data)
3057{
3058 struct qla_work_evt *e;
3059
f999f4c1 3060 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV		 3061 if (!e)
3062 return QLA_FUNCTION_FAILED;
3063
3064 e->u.aen.code = code;
3065 e->u.aen.data = data;
f999f4c1 3066 return qla2x00_post_work(vha, e);
0971de7f
AV		 3067}
3068
8a659571
AV		 3069int
3070qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3071{
3072 struct qla_work_evt *e;
3073
f999f4c1 3074 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV		 3075 if (!e)
3076 return QLA_FUNCTION_FAILED;
3077
3078 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 3079 return qla2x00_post_work(vha, e);
8a659571
AV		 3080}
3081
ac280b67
AV		 3082#define qla2x00_post_async_work(name, type) \
3083int qla2x00_post_async_##name##_work( \
3084 struct scsi_qla_host *vha, \
3085 fc_port_t *fcport, uint16_t *data) \
3086{ \
3087 struct qla_work_evt *e; \
3088 \
3089 e = qla2x00_alloc_work(vha, type); \
3090 if (!e) \
3091 return QLA_FUNCTION_FAILED; \
3092 \
3093 e->u.logio.fcport = fcport; \
3094 if (data) { \
3095 e->u.logio.data[0] = data[0]; \
3096 e->u.logio.data[1] = data[1]; \
3097 } \
3098 return qla2x00_post_work(vha, e); \
3099}
3100
3101qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3102qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3103qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3104qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV		 3105qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3106qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 3107
3420d36c
AV		 3108int
3109qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3110{
3111 struct qla_work_evt *e;
3112
3113 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3114 if (!e)
3115 return QLA_FUNCTION_FAILED;
3116
3117 e->u.uevent.code = code;
3118 return qla2x00_post_work(vha, e);
3119}
3120
3121static void
3122qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3123{
3124 char event_string[40];
3125 char *envp[] = { event_string, NULL };
3126
3127 switch (code) {
3128 case QLA_UEVENT_CODE_FW_DUMP:
3129 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3130 vha->host_no);
3131 break;
3132 default:
3133 /* do nothing */
3134 break;
3135 }
3136 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3137}
3138
ac280b67 3139void
e315cd28 3140qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3141{
f999f4c1
AV		 3142 struct qla_work_evt *e, *tmp;
3143 unsigned long flags;
3144 LIST_HEAD(work);
0971de7f 3145
f999f4c1
AV		 3146 spin_lock_irqsave(&vha->work_lock, flags);
3147 list_splice_init(&vha->work_list, &work);
3148 spin_unlock_irqrestore(&vha->work_lock, flags);
3149
3150 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3151 list_del_init(&e->list);
0971de7f
AV		 3152
3153 switch (e->type) {
3154 case QLA_EVT_AEN:
e315cd28 3155 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV		 3156 e->u.aen.code, e->u.aen.data);
3157 break;
8a659571
AV		 3158 case QLA_EVT_IDC_ACK:
3159 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3160 break;
ac280b67
AV		 3161 case QLA_EVT_ASYNC_LOGIN:
3162 qla2x00_async_login(vha, e->u.logio.fcport,
3163 e->u.logio.data);
3164 break;
3165 case QLA_EVT_ASYNC_LOGIN_DONE:
3166 qla2x00_async_login_done(vha, e->u.logio.fcport,
3167 e->u.logio.data);
3168 break;
3169 case QLA_EVT_ASYNC_LOGOUT:
3170 qla2x00_async_logout(vha, e->u.logio.fcport);
3171 break;
3172 case QLA_EVT_ASYNC_LOGOUT_DONE:
3173 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3174 e->u.logio.data);
3175 break;
5ff1d584
AV		 3176 case QLA_EVT_ASYNC_ADISC:
3177 qla2x00_async_adisc(vha, e->u.logio.fcport,
3178 e->u.logio.data);
3179 break;
3180 case QLA_EVT_ASYNC_ADISC_DONE:
3181 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3182 e->u.logio.data);
3183 break;
3420d36c
AV		 3184 case QLA_EVT_UEVENT:
3185 qla2x00_uevent_emit(vha, e->u.uevent.code);
3186 break;
0971de7f
AV		 3187 }
3188 if (e->flags & QLA_EVT_FLAG_FREE)
3189 kfree(e);
feafb7b1
AE		 3190
3191 /* For each work completed decrement vha ref count */
3192 QLA_VHA_MARK_NOT_BUSY(vha);
e315cd28 3193 }
e315cd28 3194}
f999f4c1 3195
e315cd28
AC		 3196/* Relogins all the fcports of a vport
3197 * Context: dpc thread
3198 */
3199void qla2x00_relogin(struct scsi_qla_host *vha)
3200{
3201 fc_port_t *fcport;
c6b2fca8 3202 int status;
e315cd28
AC		 3203 uint16_t next_loopid = 0;
3204 struct qla_hw_data *ha = vha->hw;
ac280b67 3205 uint16_t data[2];
e315cd28
AC		 3206
3207 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3208 /*
3209 * If the port is not ONLINE then try to login
3210 * to it if we haven't run out of retries.
3211 */
5ff1d584
AV		 3212 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3213 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3214 fcport->login_retry--;
e315cd28 3215 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3216 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC		 3217 ha->isp_ops->fabric_logout(vha,
3218 fcport->loop_id,
3219 fcport->d_id.b.domain,
3220 fcport->d_id.b.area,
3221 fcport->d_id.b.al_pa);
3222
ac280b67 3223 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3224 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3225 data[0] = 0;
3226 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3227 status = qla2x00_post_async_login_work(
3228 vha, fcport, data);
3229 if (status == QLA_SUCCESS)
3230 continue;
3231 /* Attempt a retry. */
3232 status = 1;
3233 } else
3234 status = qla2x00_fabric_login(vha,
3235 fcport, &next_loopid);
e315cd28
AC		 3236 } else
3237 status = qla2x00_local_device_login(vha,
3238 fcport);
3239
e315cd28
AC		 3240 if (status == QLA_SUCCESS) {
3241 fcport->old_loop_id = fcport->loop_id;
3242
3243 DEBUG(printk("scsi(%ld): port login OK: logged "
3244 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3245
3246 qla2x00_update_fcport(vha, fcport);
3247
3248 } else if (status == 1) {
3249 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3250 /* retry the login again */
3251 DEBUG(printk("scsi(%ld): Retrying"
3252 " %d login again loop_id 0x%x\n",
3253 vha->host_no, fcport->login_retry,
3254 fcport->loop_id));
3255 } else {
3256 fcport->login_retry = 0;
3257 }
3258
3259 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3260 fcport->loop_id = FC_NO_LOOP_ID;
3261 }
3262 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3263 break;
0971de7f 3264 }
0971de7f
AV		 3265}
3266
1da177e4
LT		 3267/**************************************************************************
3268* qla2x00_do_dpc
3269* This kernel thread is a task that is schedule by the interrupt handler
3270* to perform the background processing for interrupts.
3271*
3272* Notes:
3273* This task always run in the context of a kernel thread. It
3274* is kick-off by the driver's detect code and starts up
3275* up one per adapter. It immediately goes to sleep and waits for
3276* some fibre event. When either the interrupt handler or
3277* the timer routine detects a event it will one of the task
3278* bits then wake us up.
3279**************************************************************************/
3280static int
3281qla2x00_do_dpc(void *data)
3282{
2c3dfe3f 3283 int rval;
e315cd28
AC		 3284 scsi_qla_host_t *base_vha;
3285 struct qla_hw_data *ha;
1da177e4 3286
e315cd28
AC		 3287 ha = (struct qla_hw_data *)data;
3288 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3289
1da177e4
LT		 3290 set_user_nice(current, -20);
3291
39a11240 3292 while (!kthread_should_stop()) {
1da177e4
LT		 3293 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3294
39a11240
CH		 3295 set_current_state(TASK_INTERRUPTIBLE);
3296 schedule();
3297 __set_current_state(TASK_RUNNING);
1da177e4
LT		 3298
3299 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3300
3301 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3302 if (!base_vha->flags.init_done)
1da177e4
LT		 3303 continue;
3304
85880801
AV		 3305 if (ha->flags.eeh_busy) {
3306 DEBUG17(qla_printk(KERN_WARNING, ha,
3307 "qla2x00_do_dpc: dpc_flags: %lx\n",
3308 base_vha->dpc_flags));
3309 continue;
3310 }
3311
e315cd28 3312 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT		 3313
3314 ha->dpc_active = 1;
3315
1da177e4 3316 if (ha->flags.mbox_busy) {
1da177e4
LT		 3317 ha->dpc_active = 0;
3318 continue;
3319 }
3320
e315cd28 3321 qla2x00_do_work(base_vha);
0971de7f 3322
a9083016
GM		 3323 if (IS_QLA82XX(ha)) {
3324 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3325 &base_vha->dpc_flags)) {
3326 qla82xx_idc_lock(ha);
3327 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3328 QLA82XX_DEV_FAILED);
3329 qla82xx_idc_unlock(ha);
3330 qla_printk(KERN_INFO, ha,
3331 "HW State: FAILED\n");
3332 qla82xx_device_state_handler(base_vha);
3333 continue;
3334 }
3335
3336 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3337 &base_vha->dpc_flags)) {
3338
3339 DEBUG(printk(KERN_INFO
3340 "scsi(%ld): dpc: sched "
3341 "qla82xx_fcoe_ctx_reset ha = %p\n",
3342 base_vha->host_no, ha));
3343 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3344 &base_vha->dpc_flags))) {
3345 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3346 /* FCoE-ctx reset failed.
3347 * Escalate to chip-reset
3348 */
3349 set_bit(ISP_ABORT_NEEDED,
3350 &base_vha->dpc_flags);
3351 }
3352 clear_bit(ABORT_ISP_ACTIVE,
3353 &base_vha->dpc_flags);
3354 }
3355
3356 DEBUG(printk("scsi(%ld): dpc:"
3357 " qla82xx_fcoe_ctx_reset end\n",
3358 base_vha->host_no));
3359 }
3360 }
3361
e315cd28
AC		 3362 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3363 &base_vha->dpc_flags)) {
1da177e4
LT		 3364
3365 DEBUG(printk("scsi(%ld): dpc: sched "
3366 "qla2x00_abort_isp ha = %p\n",
e315cd28 3367 base_vha->host_no, ha));
1da177e4 3368 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3369 &base_vha->dpc_flags))) {
1da177e4 3370
a9083016 3371 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT		 3372 /* failed. retry later */
3373 set_bit(ISP_ABORT_NEEDED,
e315cd28 3374 &base_vha->dpc_flags);
99363ef8 3375 }
e315cd28
AC		 3376 clear_bit(ABORT_ISP_ACTIVE,
3377 &base_vha->dpc_flags);
99363ef8
SJ		 3378 }
3379
1da177e4 3380 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3381 base_vha->host_no));
1da177e4
LT		 3382 }
3383
e315cd28
AC		 3384 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3385 qla2x00_update_fcports(base_vha);
3386 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3387 }
d97994dc 3388
e315cd28
AC		 3389 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3390 &base_vha->dpc_flags) &&
3391 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT		 3392
3393 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3394 base_vha->host_no));
1da177e4 3395
e315cd28
AC		 3396 qla2x00_rst_aen(base_vha);
3397 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT		 3398 }
3399
3400 /* Retry each device up to login retry count */
e315cd28
AC		 3401 if ((test_and_clear_bit(RELOGIN_NEEDED,
3402 &base_vha->dpc_flags)) &&
3403 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3404 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT		 3405
3406 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC		 3407 base_vha->host_no));
3408 qla2x00_relogin(base_vha);
3409
1da177e4 3410 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3411 base_vha->host_no));
1da177e4
LT		 3412 }
3413
e315cd28
AC		 3414 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3415 &base_vha->dpc_flags)) {
1da177e4
LT		 3416
3417 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3418 base_vha->host_no));
1da177e4
LT		 3419
3420 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3421 &base_vha->dpc_flags))) {
1da177e4 3422
e315cd28 3423 rval = qla2x00_loop_resync(base_vha);
1da177e4 3424
e315cd28
AC		 3425 clear_bit(LOOP_RESYNC_ACTIVE,
3426 &base_vha->dpc_flags);
1da177e4
LT		 3427 }
3428
3429 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3430 base_vha->host_no));
1da177e4
LT		 3431 }
3432
e315cd28
AC		 3433 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3434 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3435 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3436 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV		 3437 }
3438
1da177e4 3439 if (!ha->interrupts_on)
fd34f556 3440 ha->isp_ops->enable_intrs(ha);
1da177e4 3441
e315cd28
AC		 3442 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3443 &base_vha->dpc_flags))
3444 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3445
e315cd28 3446 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3447
1da177e4
LT		 3448 ha->dpc_active = 0;
3449 } /* End of while(1) */
3450
e315cd28 3451 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT		 3452
3453 /*
3454 * Make sure that nobody tries to wake us up again.
3455 */
1da177e4
LT		 3456 ha->dpc_active = 0;
3457
ac280b67
AV		 3458 /* Cleanup any residual CTX SRBs. */
3459 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3460
39a11240
CH		 3461 return 0;
3462}
3463
3464void
e315cd28 3465qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3466{
e315cd28 3467 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV		 3468 struct task_struct *t = ha->dpc_thread;
3469
e315cd28 3470 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3471 wake_up_process(t);
1da177e4
LT		 3472}
3473
1da177e4
LT		 3474/*
3475* qla2x00_rst_aen
3476* Processes asynchronous reset.
3477*
3478* Input:
3479* ha = adapter block pointer.
3480*/
3481static void
e315cd28 3482qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3483{
e315cd28
AC		 3484 if (vha->flags.online && !vha->flags.reset_active &&
3485 !atomic_read(&vha->loop_down_timer) &&
3486 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3487 do {
e315cd28 3488 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3489
3490 /*
3491 * Issue marker command only when we are going to start
3492 * the I/O.
3493 */
e315cd28
AC		 3494 vha->marker_needed = 1;
3495 } while (!atomic_read(&vha->loop_down_timer) &&
3496 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT		 3497 }
3498}
3499
f4f051eb 3500static void
e315cd28 3501qla2x00_sp_free_dma(srb_t *sp)
f4f051eb 3502{
3503 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3504 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb 3505
3506 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3507 scsi_dma_unmap(cmd);
f4f051eb 3508 sp->flags &= ~SRB_DMA_VALID;
3509 }
bad75002
AE		 3510
3511 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3512 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3513 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3514 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3515 }
3516
3517 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3518 /* List assured to be having elements */
3519 qla2x00_clean_dsd_pool(ha, sp);
3520 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3521 }
3522
3523 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3524 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3525 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3526 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3527 }
3528
fca29703 3529 CMD_SP(cmd) = NULL;
f4f051eb 3530}
3531
3dbe756a 3532static void
083a469d 3533qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb 3534{
3535 struct scsi_cmnd *cmd = sp->cmd;
3536
e315cd28 3537 qla2x00_sp_free_dma(sp);
f4f051eb 3538
a9083016
GM		 3539 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3540 struct ct6_dsd *ctx = sp->ctx;
3541 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3542 ctx->fcp_cmnd_dma);
3543 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3544 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3545 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3546 mempool_free(sp->ctx, ha->ctx_mempool);
3547 sp->ctx = NULL;
3548 }
f4f051eb 3549
a9083016 3550 mempool_free(sp, ha->srb_mempool);
f4f051eb 3551 cmd->scsi_done(cmd);
3552}
bdf79621 3553
083a469d
GM		 3554void
3555qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3556{
3557 if (atomic_read(&sp->ref_count) == 0) {
3558 DEBUG2(qla_printk(KERN_WARNING, ha,
3559 "SP reference-count to ZERO -- sp=%p\n", sp));
3560 DEBUG2(BUG());
3561 return;
3562 }
3563 if (!atomic_dec_and_test(&sp->ref_count))
3564 return;
3565 qla2x00_sp_final_compl(ha, sp);
3566}
3567
1da177e4
LT		 3568/**************************************************************************
3569* qla2x00_timer
3570*
3571* Description:
3572* One second timer
3573*
3574* Context: Interrupt
3575***************************************************************************/
2c3dfe3f 3576void
e315cd28 3577qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3578{
1da177e4 3579 unsigned long cpu_flags = 0;
1da177e4
LT		 3580 int start_dpc = 0;
3581 int index;
3582 srb_t *sp;
85880801 3583 uint16_t w;
e315cd28 3584 struct qla_hw_data *ha = vha->hw;
73208dfd 3585 struct req_que *req;
85880801 3586
a5b36321
LC		 3587 if (ha->flags.eeh_busy) {
3588 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3589 return;
3590 }
3591
a9083016
GM		 3592 if (IS_QLA82XX(ha))
3593 qla82xx_watchdog(vha);
3594
85880801
AV		 3595 /* Hardware read to raise pending EEH errors during mailbox waits. */
3596 if (!pci_channel_offline(ha->pdev))
3597 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4
LT		 3598
3599 /* Loop down handler. */
e315cd28
AC		 3600 if (atomic_read(&vha->loop_down_timer) > 0 &&
3601 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
3602 && vha->flags.online) {
1da177e4 3603
e315cd28
AC		 3604 if (atomic_read(&vha->loop_down_timer) ==
3605 vha->loop_down_abort_time) {
1da177e4
LT		 3606
3607 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3608 "queues before time expire\n",
e315cd28 3609 vha->host_no));
1da177e4 3610
e315cd28
AC		 3611 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3612 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3613
f08b7251
AV		 3614 /*
3615 * Schedule an ISP abort to return any FCP2-device
3616 * commands.
3617 */
2c3dfe3f 3618 /* NPIV - scan physical port only */
e315cd28 3619 if (!vha->vp_idx) {
2c3dfe3f
SJ		 3620 spin_lock_irqsave(&ha->hardware_lock,
3621 cpu_flags);
73208dfd 3622 req = ha->req_q_map[0];
2c3dfe3f
SJ		 3623 for (index = 1;
3624 index < MAX_OUTSTANDING_COMMANDS;
3625 index++) {
3626 fc_port_t *sfcp;
3627
e315cd28 3628 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ		 3629 if (!sp)
3630 continue;
bad75002 3631 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3632 continue;
2c3dfe3f 3633 sfcp = sp->fcport;
f08b7251 3634 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3635 continue;
bdf79621 3636
2c3dfe3f 3637 set_bit(ISP_ABORT_NEEDED,
e315cd28 3638 &vha->dpc_flags);
2c3dfe3f
SJ		 3639 break;
3640 }
3641 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3642 cpu_flags);
1da177e4 3643 }
1da177e4
LT		 3644 start_dpc++;
3645 }
3646
3647 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3648 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3649 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT		 3650 DEBUG(printk("scsi(%ld): Loop down - "
3651 "aborting ISP.\n",
e315cd28 3652 vha->host_no));
1da177e4
LT		 3653 qla_printk(KERN_WARNING, ha,
3654 "Loop down - aborting ISP.\n");
3655
e315cd28 3656 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3657 }
3658 }
fca29703 3659 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC		 3660 vha->host_no,
3661 atomic_read(&vha->loop_down_timer)));
1da177e4
LT		 3662 }
3663
f6df144c 3664 /* Check if beacon LED needs to be blinked */
3665 if (ha->beacon_blink_led == 1) {
e315cd28 3666 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c 3667 start_dpc++;
3668 }
3669
550bf57d 3670 /* Process any deferred work. */
e315cd28 3671 if (!list_empty(&vha->work_list))
550bf57d
AV		 3672 start_dpc++;
3673
1da177e4 3674 /* Schedule the DPC routine if needed */
e315cd28
AC		 3675 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3676 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3677 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3678 start_dpc ||
e315cd28
AC		 3679 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3680 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM		 3681 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3682 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC		 3683 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3684 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3685 qla2xxx_wake_dpc(vha);
1da177e4 3686
e315cd28 3687 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT		 3688}
3689
5433383e
AV		 3690/* Firmware interface routines. */
3691
a9083016 3692#define FW_BLOBS 8
5433383e
AV		 3693#define FW_ISP21XX 0
3694#define FW_ISP22XX 1
3695#define FW_ISP2300 2
3696#define FW_ISP2322 3
48c02fde 3697#define FW_ISP24XX 4
c3a2f0df 3698#define FW_ISP25XX 5
3a03eb79 3699#define FW_ISP81XX 6
a9083016 3700#define FW_ISP82XX 7
5433383e 3701
bb8ee499
AV		 3702#define FW_FILE_ISP21XX "ql2100_fw.bin"
3703#define FW_FILE_ISP22XX "ql2200_fw.bin"
3704#define FW_FILE_ISP2300 "ql2300_fw.bin"
3705#define FW_FILE_ISP2322 "ql2322_fw.bin"
3706#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3707#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3708#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3709#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3710
e1e82b6f 3711static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV		 3712
3713static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV		 3714 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3715 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3716 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3717 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3718 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3719 { .name = FW_FILE_ISP25XX, },
3a03eb79 3720 { .name = FW_FILE_ISP81XX, },
a9083016 3721 { .name = FW_FILE_ISP82XX, },
5433383e
AV		 3722};
3723
3724struct fw_blob *
e315cd28 3725qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3726{
e315cd28 3727 struct qla_hw_data *ha = vha->hw;
5433383e
AV		 3728 struct fw_blob *blob;
3729
3730 blob = NULL;
3731 if (IS_QLA2100(ha)) {
3732 blob = &qla_fw_blobs[FW_ISP21XX];
3733 } else if (IS_QLA2200(ha)) {
3734 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3735 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3736 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3737 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3738 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3739 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3740 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV		 3741 } else if (IS_QLA25XX(ha)) {
3742 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV		 3743 } else if (IS_QLA81XX(ha)) {
3744 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM		 3745 } else if (IS_QLA82XX(ha)) {
3746 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV		 3747 }
3748
e1e82b6f 3749 mutex_lock(&qla_fw_lock);
5433383e
AV		 3750 if (blob->fw)
3751 goto out;
3752
3753 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3754 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3755 "(%s).\n", vha->host_no, blob->name));
5433383e
AV		 3756 blob->fw = NULL;
3757 blob = NULL;
3758 goto out;
3759 }
3760
3761out:
e1e82b6f 3762 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3763 return blob;
3764}
3765
3766static void
3767qla2x00_release_firmware(void)
3768{
3769 int idx;
3770
e1e82b6f 3771 mutex_lock(&qla_fw_lock);
5433383e
AV		 3772 for (idx = 0; idx < FW_BLOBS; idx++)
3773 if (qla_fw_blobs[idx].fw)
3774 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3775 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3776}
3777
14e660e6
SJ		 3778static pci_ers_result_t
3779qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3780{
85880801
AV		 3781 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3782 struct qla_hw_data *ha = vha->hw;
3783
3784 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3785 state));
b9b12f73 3786
14e660e6
SJ		 3787 switch (state) {
3788 case pci_channel_io_normal:
85880801 3789 ha->flags.eeh_busy = 0;
14e660e6
SJ		 3790 return PCI_ERS_RESULT_CAN_RECOVER;
3791 case pci_channel_io_frozen:
85880801 3792 ha->flags.eeh_busy = 1;
a5b36321
LC		 3793 /* For ISP82XX complete any pending mailbox cmd */
3794 if (IS_QLA82XX(ha)) {
3795 ha->flags.fw_hung = 1;
3796 if (ha->flags.mbox_busy) {
3797 ha->flags.mbox_int = 1;
3798 DEBUG2(qla_printk(KERN_ERR, ha,
3799 "Due to pci channel io frozen, doing premature "
3800 "completion of mbx command\n"));
3801 complete(&ha->mbx_intr_comp);
3802 }
3803 }
90a86fc0 3804 qla2x00_free_irqs(vha);
14e660e6 3805 pci_disable_device(pdev);
bddd2d65
LC		 3806 /* Return back all IOs */
3807 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
14e660e6
SJ		 3808 return PCI_ERS_RESULT_NEED_RESET;
3809 case pci_channel_io_perm_failure:
85880801
AV		 3810 ha->flags.pci_channel_io_perm_failure = 1;
3811 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ		 3812 return PCI_ERS_RESULT_DISCONNECT;
3813 }
3814 return PCI_ERS_RESULT_NEED_RESET;
3815}
3816
3817static pci_ers_result_t
3818qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3819{
3820 int risc_paused = 0;
3821 uint32_t stat;
3822 unsigned long flags;
e315cd28
AC		 3823 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3824 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 3825 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3826 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3827
bcc5b6d3
SK		 3828 if (IS_QLA82XX(ha))
3829 return PCI_ERS_RESULT_RECOVERED;
3830
14e660e6
SJ		 3831 spin_lock_irqsave(&ha->hardware_lock, flags);
3832 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3833 stat = RD_REG_DWORD(&reg->hccr);
3834 if (stat & HCCR_RISC_PAUSE)
3835 risc_paused = 1;
3836 } else if (IS_QLA23XX(ha)) {
3837 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3838 if (stat & HSR_RISC_PAUSED)
3839 risc_paused = 1;
3840 } else if (IS_FWI2_CAPABLE(ha)) {
3841 stat = RD_REG_DWORD(&reg24->host_status);
3842 if (stat & HSRX_RISC_PAUSED)
3843 risc_paused = 1;
3844 }
3845 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3846
3847 if (risc_paused) {
3848 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3849 "Dumping firmware!\n");
e315cd28 3850 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ		 3851
3852 return PCI_ERS_RESULT_NEED_RESET;
3853 } else
3854 return PCI_ERS_RESULT_RECOVERED;
3855}
3856
a5b36321
LC		 3857uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3858{
3859 uint32_t rval = QLA_FUNCTION_FAILED;
3860 uint32_t drv_active = 0;
3861 struct qla_hw_data *ha = base_vha->hw;
3862 int fn;
3863 struct pci_dev *other_pdev = NULL;
3864
3865 DEBUG17(qla_printk(KERN_INFO, ha,
3866 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3867
3868 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3869
3870 if (base_vha->flags.online) {
3871 /* Abort all outstanding commands,
3872 * so as to be requeued later */
3873 qla2x00_abort_isp_cleanup(base_vha);
3874 }
3875
3876
3877 fn = PCI_FUNC(ha->pdev->devfn);
3878 while (fn > 0) {
3879 fn--;
3880 DEBUG17(qla_printk(KERN_INFO, ha,
3881 "Finding pci device at function = 0x%x\n", fn));
3882 other_pdev =
3883 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3884 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3885 fn));
3886
3887 if (!other_pdev)
3888 continue;
3889 if (atomic_read(&other_pdev->enable_cnt)) {
3890 DEBUG17(qla_printk(KERN_INFO, ha,
3891 "Found PCI func availabe and enabled at 0x%x\n",
3892 fn));
3893 pci_dev_put(other_pdev);
3894 break;
3895 }
3896 pci_dev_put(other_pdev);
3897 }
3898
3899 if (!fn) {
3900 /* Reset owner */
3901 DEBUG17(qla_printk(KERN_INFO, ha,
3902 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3903 qla82xx_idc_lock(ha);
3904
3905 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3906 QLA82XX_DEV_INITIALIZING);
3907
3908 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3909 QLA82XX_IDC_VERSION);
3910
3911 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3912 DEBUG17(qla_printk(KERN_INFO, ha,
3913 "drv_active = 0x%x\n", drv_active));
3914
3915 qla82xx_idc_unlock(ha);
3916 /* Reset if device is not already reset
3917 * drv_active would be 0 if a reset has already been done
3918 */
3919 if (drv_active)
3920 rval = qla82xx_start_firmware(base_vha);
3921 else
3922 rval = QLA_SUCCESS;
3923 qla82xx_idc_lock(ha);
3924
3925 if (rval != QLA_SUCCESS) {
3926 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3927 qla82xx_clear_drv_active(ha);
3928 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3929 QLA82XX_DEV_FAILED);
3930 } else {
3931 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3932 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3933 QLA82XX_DEV_READY);
3934 qla82xx_idc_unlock(ha);
3935 ha->flags.fw_hung = 0;
3936 rval = qla82xx_restart_isp(base_vha);
3937 qla82xx_idc_lock(ha);
3938 /* Clear driver state register */
3939 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3940 qla82xx_set_drv_active(base_vha);
3941 }
3942 qla82xx_idc_unlock(ha);
3943 } else {
3944 DEBUG17(qla_printk(KERN_INFO, ha,
3945 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3946 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3947 QLA82XX_DEV_READY)) {
3948 ha->flags.fw_hung = 0;
3949 rval = qla82xx_restart_isp(base_vha);
3950 qla82xx_idc_lock(ha);
3951 qla82xx_set_drv_active(base_vha);
3952 qla82xx_idc_unlock(ha);
3953 }
3954 }
3955 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3956
3957 return rval;
3958}
3959
14e660e6
SJ		 3960static pci_ers_result_t
3961qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3962{
3963 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC		 3964 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3965 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC		 3966 struct rsp_que *rsp;
3967 int rc, retries = 10;
09483916 3968
85880801
AV		 3969 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3970
90a86fc0
JC		 3971 /* Workaround: qla2xxx driver which access hardware earlier
3972 * needs error state to be pci_channel_io_online.
3973 * Otherwise mailbox command timesout.
3974 */
3975 pdev->error_state = pci_channel_io_normal;
3976
3977 pci_restore_state(pdev);
3978
8c1496bd
RL		 3979 /* pci_restore_state() clears the saved_state flag of the device
3980 * save restored state which resets saved_state flag
3981 */
3982 pci_save_state(pdev);
3983
09483916
BH		 3984 if (ha->mem_only)
3985 rc = pci_enable_device_mem(pdev);
3986 else
3987 rc = pci_enable_device(pdev);
14e660e6 3988
09483916 3989 if (rc) {
14e660e6
SJ		 3990 qla_printk(KERN_WARNING, ha,
3991 "Can't re-enable PCI device after reset.\n");
a5b36321 3992 goto exit_slot_reset;
14e660e6 3993 }
14e660e6 3994
90a86fc0
JC		 3995 rsp = ha->rsp_q_map[0];
3996 if (qla2x00_request_irqs(ha, rsp))
a5b36321 3997 goto exit_slot_reset;
90a86fc0 3998
e315cd28 3999 if (ha->isp_ops->pci_config(base_vha))
a5b36321
LC		 4000 goto exit_slot_reset;
4001
4002 if (IS_QLA82XX(ha)) {
4003 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4004 ret = PCI_ERS_RESULT_RECOVERED;
4005 goto exit_slot_reset;
4006 } else
4007 goto exit_slot_reset;
4008 }
14e660e6 4009
90a86fc0
JC		 4010 while (ha->flags.mbox_busy && retries--)
4011 msleep(1000);
85880801 4012
e315cd28 4013 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 4014 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 4015 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 4016 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 4017
90a86fc0 4018
a5b36321 4019exit_slot_reset:
85880801
AV		 4020 DEBUG17(qla_printk(KERN_WARNING, ha,
4021 "slot_reset-return:ret=%x\n", ret));
4022
14e660e6
SJ		 4023 return ret;
4024}
4025
4026static void
4027qla2xxx_pci_resume(struct pci_dev *pdev)
4028{
e315cd28
AC		 4029 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4030 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 4031 int ret;
4032
85880801
AV		 4033 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4034
e315cd28 4035 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ		 4036 if (ret != QLA_SUCCESS) {
4037 qla_printk(KERN_ERR, ha,
4038 "the device failed to resume I/O "
4039 "from slot/link_reset");
4040 }
85880801 4041
3e46f031
LC		 4042 pci_cleanup_aer_uncorrect_error_status(pdev);
4043
85880801 4044 ha->flags.eeh_busy = 0;
14e660e6
SJ		 4045}
4046
4047static struct pci_error_handlers qla2xxx_err_handler = {
4048 .error_detected = qla2xxx_pci_error_detected,
4049 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4050 .slot_reset = qla2xxx_pci_slot_reset,
4051 .resume = qla2xxx_pci_resume,
4052};
4053
5433383e 4054static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV		 4055 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4056 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4057 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4058 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4059 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4060 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4061 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4062 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4063 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 4064 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV		 4065 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4066 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 4067 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 4068 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 4069 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV		 4070 { 0 },
4071};
4072MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4073
fca29703 4074static struct pci_driver qla2xxx_pci_driver = {
cb63067a 4075 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB		 4076 .driver = {
4077 .owner = THIS_MODULE,
4078 },
fca29703 4079 .id_table = qla2xxx_pci_tbl,
7ee61397 4080 .probe = qla2x00_probe_one,
4c993f76 4081 .remove = qla2x00_remove_one,
e30d1756 4082 .shutdown = qla2x00_shutdown,
14e660e6 4083 .err_handler = &qla2xxx_err_handler,
fca29703
AV		 4084};
4085
6a03b4cd
HZ		 4086static struct file_operations apidev_fops = {
4087 .owner = THIS_MODULE,
6038f373 4088 .llseek = noop_llseek,
6a03b4cd
HZ		 4089};
4090
1da177e4
LT		 4091/**
4092 * qla2x00_module_init - Module initialization.
4093 **/
4094static int __init
4095qla2x00_module_init(void)
4096{
fca29703
AV		 4097 int ret = 0;
4098
1da177e4 4099 /* Allocate cache for SRBs. */
354d6b21 4100 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 4101 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT		 4102 if (srb_cachep == NULL) {
4103 printk(KERN_ERR
4104 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4105 return -ENOMEM;
4106 }
4107
4108 /* Derive version string. */
4109 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 4110 if (ql2xextended_error_logging)
0181944f
AV		 4111 strcat(qla2x00_version_str, "-debug");
4112
1c97a12a
AV		 4113 qla2xxx_transport_template =
4114 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ		 4115 if (!qla2xxx_transport_template) {
4116 kmem_cache_destroy(srb_cachep);
1da177e4 4117 return -ENODEV;
2c3dfe3f 4118 }
6a03b4cd
HZ		 4119
4120 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4121 if (apidev_major < 0) {
4122 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4123 "%s\n", QLA2XXX_APIDEV);
4124 }
4125
2c3dfe3f
SJ		 4126 qla2xxx_transport_vport_template =
4127 fc_attach_transport(&qla2xxx_transport_vport_functions);
4128 if (!qla2xxx_transport_vport_template) {
4129 kmem_cache_destroy(srb_cachep);
4130 fc_release_transport(qla2xxx_transport_template);
1da177e4 4131 return -ENODEV;
2c3dfe3f 4132 }
1da177e4 4133
fd9a29f0
AV		 4134 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4135 qla2x00_version_str);
7ee61397 4136 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV		 4137 if (ret) {
4138 kmem_cache_destroy(srb_cachep);
4139 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4140 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV		 4141 }
4142 return ret;
1da177e4
LT		 4143}
4144
4145/**
4146 * qla2x00_module_exit - Module cleanup.
4147 **/
4148static void __exit
4149qla2x00_module_exit(void)
4150{
6a03b4cd 4151 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 4152 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 4153 qla2x00_release_firmware();
354d6b21 4154 kmem_cache_destroy(srb_cachep);
a9083016
GM		 4155 if (ctx_cachep)
4156 kmem_cache_destroy(ctx_cachep);
1da177e4 4157 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4158 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT		 4159}
4160
4161module_init(qla2x00_module_init);
4162module_exit(qla2x00_module_exit);
4163
4164MODULE_AUTHOR("QLogic Corporation");
4165MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4166MODULE_LICENSE("GPL");
4167MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV		 4168MODULE_FIRMWARE(FW_FILE_ISP21XX);
4169MODULE_FIRMWARE(FW_FILE_ISP22XX);
4170MODULE_FIRMWARE(FW_FILE_ISP2300);
4171MODULE_FIRMWARE(FW_FILE_ISP2322);
4172MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 4173MODULE_FIRMWARE(FW_FILE_ISP25XX);
Linux 6.x block layer and io_uring tree(s)