[SCSI] qla2xxx: Silence bogus warning by gcc for wrap and did.
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
01e58d8e 3 * Copyright (c) 2003-2008 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT
6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT
16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ
27static int apidev_major;
28
1da177e4
LT
29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM
34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4
LT
39int ql2xlogintimeout = 20;
40module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
1da177e4
LT
45module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT
48 "a PORT-DOWN status.");
49
1da177e4
LT
50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT
55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4
LT
57int ql2xloginretrycount = 0;
58module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf
AV
62int ql2xallocfwdump = 1;
63module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV
72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016
GM
75int ql2xshiftctondsd = 6;
76module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT
81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
cca5335c
AV
84module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW
86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV
89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE
95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5
AV
108int ql2xiidmaenable=1;
109module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd
AC
114int ql2xmaxqueues = 1;
115module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
118 "Default is 1 for single queue. Set it to number \
119 of queues in MQ mode.");
68ca949c
AC
120
121int ql2xmultique_tag;
122module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV
127
128int ql2xfwloadbin;
129module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e
AV
137int ql2xetsenable;
138module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
a9083016
GM
143int ql2xdbwr;
144module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
150int ql2xdontresethba;
151module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
152MODULE_PARM_DESC(ql2xdontresethba,
153 "Option to specify reset behaviour\n"
154 " 0 (Default) -- Reset on failure.\n"
155 " 1 -- Do not reset on failure.\n");
156
157
3822263e
MI
158int ql2xasynctmfenable;
159module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
160MODULE_PARM_DESC(ql2xasynctmfenable,
161 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
162 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
1da177e4 163/*
fa2a1ce5 164 * SCSI host template entry points
1da177e4
LT
165 */
166static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 167static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV
168static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
169static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 170static void qla2xxx_slave_destroy(struct scsi_device *);
a5326f86 171static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
fca29703 172 void (*fn)(struct scsi_cmnd *));
1da177e4
LT
173static int qla2xxx_eh_abort(struct scsi_cmnd *);
174static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 175static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT
176static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
177static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 178
e881a172 179static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV
180static int qla2x00_change_queue_type(struct scsi_device *, int);
181
a5326f86 182struct scsi_host_template qla2xxx_driver_template = {
1da177e4 183 .module = THIS_MODULE,
cb63067a 184 .name = QLA2XXX_DRIVER_NAME,
a5326f86 185 .queuecommand = qla2xxx_queuecommand,
fca29703
AV
186
187 .eh_abort_handler = qla2xxx_eh_abort,
188 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 189 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV
190 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
191 .eh_host_reset_handler = qla2xxx_eh_host_reset,
192
193 .slave_configure = qla2xxx_slave_configure,
194
195 .slave_alloc = qla2xxx_slave_alloc,
196 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV
197 .scan_finished = qla2xxx_scan_finished,
198 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV
199 .change_queue_depth = qla2x00_change_queue_depth,
200 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV
201 .this_id = -1,
202 .cmd_per_lun = 3,
203 .use_clustering = ENABLE_CLUSTERING,
204 .sg_tablesize = SG_ALL,
205
206 .max_sectors = 0xFFFF,
afb046e2 207 .shost_attrs = qla2x00_host_attrs,
fca29703
AV
208};
209
1da177e4 210static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 211struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 212
1da177e4
LT
213/* TODO Convert to inlines
214 *
215 * Timer routines
216 */
1da177e4 217
2c3dfe3f 218__inline__ void
e315cd28 219qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 220{
e315cd28
AC
221 init_timer(&vha->timer);
222 vha->timer.expires = jiffies + interval * HZ;
223 vha->timer.data = (unsigned long)vha;
224 vha->timer.function = (void (*)(unsigned long))func;
225 add_timer(&vha->timer);
226 vha->timer_active = 1;
1da177e4
LT
227}
228
229static inline void
e315cd28 230qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 231{
a9083016
GM
232 /* Currently used for 82XX only. */
233 if (vha->device_flags & DFLG_DEV_FAILED)
234 return;
235
e315cd28 236 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT
237}
238
a824ebb3 239static __inline__ void
e315cd28 240qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 241{
e315cd28
AC
242 del_timer_sync(&vha->timer);
243 vha->timer_active = 0;
1da177e4
LT
244}
245
1da177e4
LT
246static int qla2x00_do_dpc(void *data);
247
248static void qla2x00_rst_aen(scsi_qla_host_t *);
249
73208dfd
AC
250static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
251 struct req_que **, struct rsp_que **);
e315cd28
AC
252static void qla2x00_mem_free(struct qla_hw_data *);
253static void qla2x00_sp_free_dma(srb_t *);
1da177e4 254
1da177e4 255/* -------------------------------------------------------------------------- */
73208dfd
AC
256static int qla2x00_alloc_queues(struct qla_hw_data *ha)
257{
2afa19a9 258 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC
259 GFP_KERNEL);
260 if (!ha->req_q_map) {
261 qla_printk(KERN_WARNING, ha,
262 "Unable to allocate memory for request queue ptrs\n");
263 goto fail_req_map;
264 }
265
2afa19a9 266 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC
267 GFP_KERNEL);
268 if (!ha->rsp_q_map) {
269 qla_printk(KERN_WARNING, ha,
270 "Unable to allocate memory for response queue ptrs\n");
271 goto fail_rsp_map;
272 }
273 set_bit(0, ha->rsp_qid_map);
274 set_bit(0, ha->req_qid_map);
275 return 1;
276
277fail_rsp_map:
278 kfree(ha->req_q_map);
279 ha->req_q_map = NULL;
280fail_req_map:
281 return -ENOMEM;
282}
283
2afa19a9 284static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 285{
73208dfd
AC
286 if (req && req->ring)
287 dma_free_coherent(&ha->pdev->dev,
288 (req->length + 1) * sizeof(request_t),
289 req->ring, req->dma);
290
291 kfree(req);
292 req = NULL;
293}
294
2afa19a9
AC
295static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
296{
297 if (rsp && rsp->ring)
298 dma_free_coherent(&ha->pdev->dev,
299 (rsp->length + 1) * sizeof(response_t),
300 rsp->ring, rsp->dma);
301
302 kfree(rsp);
303 rsp = NULL;
304}
305
73208dfd
AC
306static void qla2x00_free_queues(struct qla_hw_data *ha)
307{
308 struct req_que *req;
309 struct rsp_que *rsp;
310 int cnt;
311
2afa19a9 312 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 313 req = ha->req_q_map[cnt];
2afa19a9 314 qla2x00_free_req_que(ha, req);
73208dfd 315 }
73208dfd
AC
316 kfree(ha->req_q_map);
317 ha->req_q_map = NULL;
2afa19a9
AC
318
319 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
320 rsp = ha->rsp_q_map[cnt];
321 qla2x00_free_rsp_que(ha, rsp);
322 }
323 kfree(ha->rsp_q_map);
324 ha->rsp_q_map = NULL;
73208dfd
AC
325}
326
68ca949c
AC
327static int qla25xx_setup_mode(struct scsi_qla_host *vha)
328{
329 uint16_t options = 0;
330 int ques, req, ret;
331 struct qla_hw_data *ha = vha->hw;
332
7163ea81
AC
333 if (!(ha->fw_attributes & BIT_6)) {
334 qla_printk(KERN_INFO, ha,
335 "Firmware is not multi-queue capable\n");
336 goto fail;
337 }
68ca949c 338 if (ql2xmultique_tag) {
68ca949c
AC
339 /* create a request queue for IO */
340 options |= BIT_7;
341 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
342 QLA_DEFAULT_QUE_QOS);
343 if (!req) {
344 qla_printk(KERN_WARNING, ha,
345 "Can't create request queue\n");
346 goto fail;
347 }
7163ea81 348 ha->wq = create_workqueue("qla2xxx_wq");
68ca949c
AC
349 vha->req = ha->req_q_map[req];
350 options |= BIT_1;
351 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
352 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
353 if (!ret) {
354 qla_printk(KERN_WARNING, ha,
355 "Response Queue create failed\n");
356 goto fail2;
357 }
358 }
7163ea81
AC
359 ha->flags.cpu_affinity_enabled = 1;
360
68ca949c
AC
361 DEBUG2(qla_printk(KERN_INFO, ha,
362 "CPU affinity mode enabled, no. of response"
363 " queues:%d, no. of request queues:%d\n",
364 ha->max_rsp_queues, ha->max_req_queues));
365 }
366 return 0;
367fail2:
368 qla25xx_delete_queues(vha);
7163ea81
AC
369 destroy_workqueue(ha->wq);
370 ha->wq = NULL;
68ca949c
AC
371fail:
372 ha->mqenable = 0;
7163ea81
AC
373 kfree(ha->req_q_map);
374 kfree(ha->rsp_q_map);
375 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC
376 return 1;
377}
378
1da177e4 379static char *
e315cd28 380qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 381{
e315cd28 382 struct qla_hw_data *ha = vha->hw;
1da177e4
LT
383 static char *pci_bus_modes[] = {
384 "33", "66", "100", "133",
385 };
386 uint16_t pci_bus;
387
388 strcpy(str, "PCI");
389 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
390 if (pci_bus) {
391 strcat(str, "-X (");
392 strcat(str, pci_bus_modes[pci_bus]);
393 } else {
394 pci_bus = (ha->pci_attr & BIT_8) >> 8;
395 strcat(str, " (");
396 strcat(str, pci_bus_modes[pci_bus]);
397 }
398 strcat(str, " MHz)");
399
400 return (str);
401}
402
fca29703 403static char *
e315cd28 404qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV
405{
406 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 407 struct qla_hw_data *ha = vha->hw;
fca29703
AV
408 uint32_t pci_bus;
409 int pcie_reg;
410
411 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
412 if (pcie_reg) {
413 char lwstr[6];
414 uint16_t pcie_lstat, lspeed, lwidth;
415
416 pcie_reg += 0x12;
417 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
418 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
419 lwidth = (pcie_lstat &
420 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
421
422 strcpy(str, "PCIe (");
423 if (lspeed == 1)
c87a0d8c 424 strcat(str, "2.5GT/s ");
c3a2f0df 425 else if (lspeed == 2)
c87a0d8c 426 strcat(str, "5.0GT/s ");
fca29703
AV
427 else
428 strcat(str, "<unknown> ");
429 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
430 strcat(str, lwstr);
431
432 return str;
433 }
434
435 strcpy(str, "PCI");
436 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
437 if (pci_bus == 0 || pci_bus == 8) {
438 strcat(str, " (");
439 strcat(str, pci_bus_modes[pci_bus >> 3]);
440 } else {
441 strcat(str, "-X ");
442 if (pci_bus & BIT_2)
443 strcat(str, "Mode 2");
444 else
445 strcat(str, "Mode 1");
446 strcat(str, " (");
447 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
448 }
449 strcat(str, " MHz)");
450
451 return str;
452}
453
e5f82ab8 454static char *
e315cd28 455qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT
456{
457 char un_str[10];
e315cd28 458 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 459
1da177e4
LT
460 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
461 ha->fw_minor_version,
462 ha->fw_subminor_version);
463
464 if (ha->fw_attributes & BIT_9) {
465 strcat(str, "FLX");
466 return (str);
467 }
468
469 switch (ha->fw_attributes & 0xFF) {
470 case 0x7:
471 strcat(str, "EF");
472 break;
473 case 0x17:
474 strcat(str, "TP");
475 break;
476 case 0x37:
477 strcat(str, "IP");
478 break;
479 case 0x77:
480 strcat(str, "VI");
481 break;
482 default:
483 sprintf(un_str, "(%x)", ha->fw_attributes);
484 strcat(str, un_str);
485 break;
486 }
487 if (ha->fw_attributes & 0x100)
488 strcat(str, "X");
489
490 return (str);
491}
492
e5f82ab8 493static char *
e315cd28 494qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 495{
e315cd28 496 struct qla_hw_data *ha = vha->hw;
f0883ac6 497
3a03eb79
AV
498 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
499 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 500 return str;
fca29703
AV
501}
502
503static inline srb_t *
e315cd28 504qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
fca29703
AV
505 struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
506{
507 srb_t *sp;
e315cd28 508 struct qla_hw_data *ha = vha->hw;
fca29703
AV
509
510 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
511 if (!sp)
512 return sp;
513
fca29703
AV
514 sp->fcport = fcport;
515 sp->cmd = cmd;
516 sp->flags = 0;
517 CMD_SP(cmd) = (void *)sp;
518 cmd->scsi_done = done;
cf53b069 519 sp->ctx = NULL;
fca29703
AV
520
521 return sp;
522}
523
1da177e4 524static int
a5326f86 525qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
fca29703 526{
e315cd28 527 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 528 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 529 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC
530 struct qla_hw_data *ha = vha->hw;
531 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV
532 srb_t *sp;
533 int rval;
534
85880801
AV
535 if (ha->flags.eeh_busy) {
536 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 537 cmd->result = DID_NO_CONNECT << 16;
85880801
AV
538 else
539 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ
540 goto qc24_fail_command;
541 }
542
19a7b4ae
JSEC
543 rval = fc_remote_port_chkready(rport);
544 if (rval) {
545 cmd->result = rval;
fca29703
AV
546 goto qc24_fail_command;
547 }
548
387f96b4 549 /* Close window on fcport/rport state-transitioning. */
7b594131
MC
550 if (fcport->drport)
551 goto qc24_target_busy;
387f96b4 552
bad75002
AE
553 if (!vha->flags.difdix_supported &&
554 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
555 DEBUG2(qla_printk(KERN_ERR, ha,
556 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
557 cmd->cmnd[0]));
558 cmd->result = DID_NO_CONNECT << 16;
559 goto qc24_fail_command;
560 }
fca29703
AV
561 if (atomic_read(&fcport->state) != FCS_ONLINE) {
562 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
e315cd28 563 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV
564 cmd->result = DID_NO_CONNECT << 16;
565 goto qc24_fail_command;
566 }
7b594131 567 goto qc24_target_busy;
fca29703
AV
568 }
569
e315cd28 570 spin_unlock_irq(vha->host->host_lock);
fca29703 571
e315cd28 572 sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
fca29703
AV
573 if (!sp)
574 goto qc24_host_busy_lock;
575
e315cd28 576 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV
577 if (rval != QLA_SUCCESS)
578 goto qc24_host_busy_free_sp;
579
e315cd28 580 spin_lock_irq(vha->host->host_lock);
fca29703
AV
581
582 return 0;
583
584qc24_host_busy_free_sp:
e315cd28
AC
585 qla2x00_sp_free_dma(sp);
586 mempool_free(sp, ha->srb_mempool);
fca29703
AV
587
588qc24_host_busy_lock:
e315cd28 589 spin_lock_irq(vha->host->host_lock);
fca29703
AV
590 return SCSI_MLQUEUE_HOST_BUSY;
591
7b594131
MC
592qc24_target_busy:
593 return SCSI_MLQUEUE_TARGET_BUSY;
594
fca29703
AV
595qc24_fail_command:
596 done(cmd);
597
598 return 0;
599}
600
601
1da177e4
LT
602/*
603 * qla2x00_eh_wait_on_command
604 * Waits for the command to be returned by the Firmware for some
605 * max time.
606 *
607 * Input:
1da177e4 608 * cmd = Scsi Command to wait on.
1da177e4
LT
609 *
610 * Return:
611 * Not Found : 0
612 * Found : 1
613 */
614static int
e315cd28 615qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 616{
fe74c71f
AV
617#define ABORT_POLLING_PERIOD 1000
618#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 619 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV
620 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
621 struct qla_hw_data *ha = vha->hw;
f4f051eb 622 int ret = QLA_SUCCESS;
1da177e4 623
85880801
AV
624 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
625 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
626 return ret;
627 }
628
d970432c 629 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 630 msleep(ABORT_POLLING_PERIOD);
f4f051eb 631 }
632 if (CMD_SP(cmd))
633 ret = QLA_FUNCTION_FAILED;
1da177e4 634
f4f051eb 635 return ret;
1da177e4
LT
636}
637
638/*
639 * qla2x00_wait_for_hba_online
fa2a1ce5 640 * Wait till the HBA is online after going through
1da177e4
LT
641 * <= MAX_RETRIES_OF_ISP_ABORT or
642 * finally HBA is disabled ie marked offline
643 *
644 * Input:
645 * ha - pointer to host adapter structure
fa2a1ce5
AV
646 *
647 * Note:
1da177e4
LT
648 * Does context switching-Release SPIN_LOCK
649 * (if any) before calling this routine.
650 *
651 * Return:
652 * Success (Adapter is online) : 0
653 * Failed (Adapter is offline/disabled) : 1
654 */
854165f4 655int
e315cd28 656qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 657{
fca29703
AV
658 int return_status;
659 unsigned long wait_online;
e315cd28
AC
660 struct qla_hw_data *ha = vha->hw;
661 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 662
fa2a1ce5 663 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC
664 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
665 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
666 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
667 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT
668
669 msleep(1000);
670 }
e315cd28 671 if (base_vha->flags.online)
fa2a1ce5 672 return_status = QLA_SUCCESS;
1da177e4
LT
673 else
674 return_status = QLA_FUNCTION_FAILED;
675
1da177e4
LT
676 return (return_status);
677}
678
2533cf67
LC
679int
680qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
681{
682 int return_status;
683 unsigned long wait_reset;
684 struct qla_hw_data *ha = vha->hw;
685 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
686
687 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
688 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
689 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
690 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
691 ha->dpc_active) && time_before(jiffies, wait_reset)) {
692
693 msleep(1000);
694
695 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
696 ha->flags.chip_reset_done)
697 break;
698 }
699 if (ha->flags.chip_reset_done)
700 return_status = QLA_SUCCESS;
701 else
702 return_status = QLA_FUNCTION_FAILED;
703
704 return return_status;
705}
706
1da177e4
LT
707/*
708 * qla2x00_wait_for_loop_ready
709 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 710 * to be in LOOP_READY state.
1da177e4
LT
711 * Input:
712 * ha - pointer to host adapter structure
fa2a1ce5
AV
713 *
714 * Note:
1da177e4
LT
715 * Does context switching-Release SPIN_LOCK
716 * (if any) before calling this routine.
fa2a1ce5 717 *
1da177e4
LT
718 *
719 * Return:
720 * Success (LOOP_READY) : 0
721 * Failed (LOOP_NOT_READY) : 1
722 */
fa2a1ce5 723static inline int
e315cd28 724qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT
725{
726 int return_status = QLA_SUCCESS;
727 unsigned long loop_timeout ;
e315cd28
AC
728 struct qla_hw_data *ha = vha->hw;
729 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT
730
731 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 732 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 733
e315cd28
AC
734 while ((!atomic_read(&base_vha->loop_down_timer) &&
735 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
736 atomic_read(&base_vha->loop_state) != LOOP_READY) {
737 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA
738 return_status = QLA_FUNCTION_FAILED;
739 break;
740 }
1da177e4
LT
741 msleep(1000);
742 if (time_after_eq(jiffies, loop_timeout)) {
743 return_status = QLA_FUNCTION_FAILED;
744 break;
745 }
746 }
fa2a1ce5 747 return (return_status);
1da177e4
LT
748}
749
750/**************************************************************************
751* qla2xxx_eh_abort
752*
753* Description:
754* The abort function will abort the specified command.
755*
756* Input:
757* cmd = Linux SCSI command packet to be aborted.
758*
759* Returns:
760* Either SUCCESS or FAILED.
761*
762* Note:
2ea00202 763* Only return FAILED if command not returned by firmware.
1da177e4 764**************************************************************************/
e5f82ab8 765static int
1da177e4
LT
766qla2xxx_eh_abort(struct scsi_cmnd *cmd)
767{
e315cd28 768 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 769 srb_t *sp;
17d98630 770 int ret, i;
f4f051eb 771 unsigned int id, lun;
772 unsigned long serial;
18e144d3 773 unsigned long flags;
2ea00202 774 int wait = 0;
e315cd28 775 struct qla_hw_data *ha = vha->hw;
67c2e93a 776 struct req_que *req = vha->req;
17d98630 777 srb_t *spt;
1da177e4 778
65d430fa 779 fc_block_scsi_eh(cmd);
07db5183 780
f4f051eb 781 if (!CMD_SP(cmd))
2ea00202 782 return SUCCESS;
1da177e4 783
2ea00202 784 ret = SUCCESS;
1da177e4 785
f4f051eb 786 id = cmd->device->id;
787 lun = cmd->device->lun;
788 serial = cmd->serial_number;
17d98630
AC
789 spt = (srb_t *) CMD_SP(cmd);
790 if (!spt)
791 return SUCCESS;
1da177e4 792
f4f051eb 793 /* Check active list for command command. */
e315cd28 794 spin_lock_irqsave(&ha->hardware_lock, flags);
17d98630
AC
795 for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
796 sp = req->outstanding_cmds[i];
1da177e4 797
17d98630
AC
798 if (sp == NULL)
799 continue;
bad75002
AE
800 if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID) &&
801 !IS_PROT_IO(sp))
cf53b069 802 continue;
17d98630
AC
803 if (sp->cmd != cmd)
804 continue;
1da177e4 805
17d98630
AC
806 DEBUG2(printk("%s(%ld): aborting sp %p from RISC."
807 " pid=%ld.\n", __func__, vha->host_no, sp, serial));
808
809 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2afa19a9 810 if (ha->isp_ops->abort_command(sp)) {
17d98630
AC
811 DEBUG2(printk("%s(%ld): abort_command "
812 "mbx failed.\n", __func__, vha->host_no));
2ac4b64f 813 ret = FAILED;
17d98630
AC
814 } else {
815 DEBUG3(printk("%s(%ld): abort_command "
816 "mbx success.\n", __func__, vha->host_no));
817 wait = 1;
73208dfd 818 }
17d98630
AC
819 spin_lock_irqsave(&ha->hardware_lock, flags);
820 break;
f4f051eb 821 }
e315cd28 822 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 823
f4f051eb 824 /* Wait for the command to be returned. */
2ea00202 825 if (wait) {
e315cd28 826 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 827 qla_printk(KERN_ERR, ha,
f4f051eb 828 "scsi(%ld:%d:%d): Abort handler timed out -- %lx "
e315cd28 829 "%x.\n", vha->host_no, id, lun, serial, ret);
2ea00202 830 ret = FAILED;
f4f051eb 831 }
1da177e4 832 }
1da177e4 833
fa2a1ce5 834 qla_printk(KERN_INFO, ha,
2ea00202 835 "scsi(%ld:%d:%d): Abort command issued -- %d %lx %x.\n",
e315cd28 836 vha->host_no, id, lun, wait, serial, ret);
1da177e4 837
f4f051eb 838 return ret;
839}
1da177e4 840
523ec773
AV
841enum nexus_wait_type {
842 WAIT_HOST = 0,
843 WAIT_TARGET,
844 WAIT_LUN,
845};
846
f4f051eb 847static int
e315cd28 848qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
17d98630 849 unsigned int l, srb_t *sp, enum nexus_wait_type type)
f4f051eb 850{
17d98630 851 int cnt, match, status;
18e144d3 852 unsigned long flags;
e315cd28 853 struct qla_hw_data *ha = vha->hw;
73208dfd 854 struct req_que *req;
1da177e4 855
523ec773 856 status = QLA_SUCCESS;
17d98630
AC
857 if (!sp)
858 return status;
859
e315cd28 860 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 861 req = vha->req;
17d98630
AC
862 for (cnt = 1; status == QLA_SUCCESS &&
863 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
864 sp = req->outstanding_cmds[cnt];
865 if (!sp)
523ec773 866 continue;
bad75002 867 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 868 continue;
17d98630
AC
869 if (vha->vp_idx != sp->fcport->vha->vp_idx)
870 continue;
871 match = 0;
872 switch (type) {
873 case WAIT_HOST:
874 match = 1;
875 break;
876 case WAIT_TARGET:
877 match = sp->cmd->device->id == t;
878 break;
879 case WAIT_LUN:
880 match = (sp->cmd->device->id == t &&
881 sp->cmd->device->lun == l);
882 break;
73208dfd 883 }
17d98630
AC
884 if (!match)
885 continue;
886
887 spin_unlock_irqrestore(&ha->hardware_lock, flags);
888 status = qla2x00_eh_wait_on_command(sp->cmd);
889 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 890 }
e315cd28 891 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV
892
893 return status;
1da177e4
LT
894}
895
a9083016
GM
896void qla82xx_wait_for_pending_commands(scsi_qla_host_t *vha)
897{
898 int cnt;
899 srb_t *sp;
900 struct req_que *req = vha->req;
901
902 DEBUG2(qla_printk(KERN_INFO, vha->hw,
903 "Waiting for pending commands\n"));
904 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
905 sp = req->outstanding_cmds[cnt];
906 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0,
907 sp, WAIT_HOST) == QLA_SUCCESS) {
908 DEBUG2(qla_printk(KERN_INFO, vha->hw,
909 "Done wait for pending commands\n"));
910 }
911 }
912}
913
523ec773
AV
914static char *reset_errors[] = {
915 "HBA not online",
916 "HBA not ready",
917 "Task management failed",
918 "Waiting for command completions",
919};
1da177e4 920
e5f82ab8 921static int
523ec773 922__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 923 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 924{
e315cd28 925 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 926 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 927 int err;
1da177e4 928
65d430fa 929 fc_block_scsi_eh(cmd);
07db5183 930
b0328bee 931 if (!fcport)
523ec773 932 return FAILED;
1da177e4 933
e315cd28
AC
934 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
935 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 936
523ec773 937 err = 0;
e315cd28 938 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV
939 goto eh_reset_failed;
940 err = 1;
e315cd28 941 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV
942 goto eh_reset_failed;
943 err = 2;
2afa19a9
AC
944 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
945 != QLA_SUCCESS)
523ec773
AV
946 goto eh_reset_failed;
947 err = 3;
e315cd28 948 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
17d98630 949 cmd->device->lun, (srb_t *) CMD_SP(cmd), type) != QLA_SUCCESS)
523ec773
AV
950 goto eh_reset_failed;
951
e315cd28
AC
952 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
953 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV
954
955 return SUCCESS;
956
957 eh_reset_failed:
e315cd28
AC
958 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
959 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV
960 reset_errors[err]);
961 return FAILED;
962}
1da177e4 963
523ec773
AV
964static int
965qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
966{
e315cd28
AC
967 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
968 struct qla_hw_data *ha = vha->hw;
1da177e4 969
523ec773
AV
970 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
971 ha->isp_ops->lun_reset);
1da177e4
LT
972}
973
1da177e4 974static int
523ec773 975qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 976{
e315cd28
AC
977 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
978 struct qla_hw_data *ha = vha->hw;
1da177e4 979
523ec773
AV
980 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
981 ha->isp_ops->target_reset);
1da177e4
LT
982}
983
1da177e4
LT
984/**************************************************************************
985* qla2xxx_eh_bus_reset
986*
987* Description:
988* The bus reset function will reset the bus and abort any executing
989* commands.
990*
991* Input:
992* cmd = Linux SCSI command packet of the command that cause the
993* bus reset.
994*
995* Returns:
996* SUCCESS/FAILURE (defined as macro in scsi.h).
997*
998**************************************************************************/
e5f82ab8 999static int
1da177e4
LT
1000qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1001{
e315cd28 1002 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1003 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1004 int ret = FAILED;
f4f051eb 1005 unsigned int id, lun;
1006 unsigned long serial;
17d98630 1007 srb_t *sp = (srb_t *) CMD_SP(cmd);
f4f051eb 1008
65d430fa 1009 fc_block_scsi_eh(cmd);
07db5183 1010
f4f051eb 1011 id = cmd->device->id;
1012 lun = cmd->device->lun;
1013 serial = cmd->serial_number;
1da177e4 1014
b0328bee 1015 if (!fcport)
f4f051eb 1016 return ret;
1da177e4 1017
e315cd28 1018 qla_printk(KERN_INFO, vha->hw,
749af3d5 1019 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1020
e315cd28 1021 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1022 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1023 goto eh_bus_reset_done;
1da177e4
LT
1024 }
1025
e315cd28
AC
1026 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1027 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1028 ret = SUCCESS;
1da177e4 1029 }
f4f051eb 1030 if (ret == FAILED)
1031 goto eh_bus_reset_done;
1da177e4 1032
9a41a62b 1033 /* Flush outstanding commands. */
17d98630 1034 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) !=
523ec773 1035 QLA_SUCCESS)
9a41a62b 1036 ret = FAILED;
1da177e4 1037
f4f051eb 1038eh_bus_reset_done:
e315cd28 1039 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
f4f051eb 1040 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1041
f4f051eb 1042 return ret;
1da177e4
LT
1043}
1044
1045/**************************************************************************
1046* qla2xxx_eh_host_reset
1047*
1048* Description:
1049* The reset function will reset the Adapter.
1050*
1051* Input:
1052* cmd = Linux SCSI command packet of the command that cause the
1053* adapter reset.
1054*
1055* Returns:
1056* Either SUCCESS or FAILED.
1057*
1058* Note:
1059**************************************************************************/
e5f82ab8 1060static int
1da177e4
LT
1061qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1062{
e315cd28 1063 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1064 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1065 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1066 int ret = FAILED;
f4f051eb 1067 unsigned int id, lun;
1068 unsigned long serial;
17d98630 1069 srb_t *sp = (srb_t *) CMD_SP(cmd);
e315cd28 1070 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1071
65d430fa 1072 fc_block_scsi_eh(cmd);
07db5183 1073
f4f051eb 1074 id = cmd->device->id;
1075 lun = cmd->device->lun;
1076 serial = cmd->serial_number;
1077
b0328bee 1078 if (!fcport)
f4f051eb 1079 return ret;
1da177e4 1080
1da177e4 1081 qla_printk(KERN_INFO, ha,
e315cd28 1082 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1083
e315cd28 1084 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
f4f051eb 1085 goto eh_host_reset_lock;
1da177e4
LT
1086
1087 /*
1088 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1089 * loop_resync,so wait a while for it to
1da177e4
LT
1090 * be completed and then issue big hammer.Otherwise
1091 * it may cause I/O failure as big hammer marks the
1092 * devices as lost kicking of the port_down_timer
1093 * while dpc is stuck for the mailbox to complete.
1094 */
e315cd28
AC
1095 qla2x00_wait_for_loop_ready(vha);
1096 if (vha != base_vha) {
1097 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1098 goto eh_host_reset_lock;
e315cd28 1099 } else {
a9083016
GM
1100 if (IS_QLA82XX(vha->hw)) {
1101 if (!qla82xx_fcoe_ctx_reset(vha)) {
1102 /* Ctx reset success */
1103 ret = SUCCESS;
1104 goto eh_host_reset_lock;
1105 }
1106 /* fall thru if ctx reset failed */
1107 }
68ca949c
AC
1108 if (ha->wq)
1109 flush_workqueue(ha->wq);
1110
e315cd28 1111 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1112 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC
1113 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1114 /* failed. schedule dpc to try */
1115 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1116
1117 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1118 goto eh_host_reset_lock;
1119 }
1120 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1121 }
1da177e4 1122
e315cd28 1123 /* Waiting for command to be returned to OS.*/
17d98630 1124 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) ==
e315cd28 1125 QLA_SUCCESS)
f4f051eb 1126 ret = SUCCESS;
1da177e4 1127
f4f051eb 1128eh_host_reset_lock:
f4f051eb 1129 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
1130 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1131
f4f051eb 1132 return ret;
1133}
1da177e4
LT
1134
1135/*
1136* qla2x00_loop_reset
1137* Issue loop reset.
1138*
1139* Input:
1140* ha = adapter block pointer.
1141*
1142* Returns:
1143* 0 = success
1144*/
a4722cf2 1145int
e315cd28 1146qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1147{
0c8c39af 1148 int ret;
bdf79621 1149 struct fc_port *fcport;
e315cd28 1150 struct qla_hw_data *ha = vha->hw;
1da177e4 1151
55e5ed27
AV
1152 if (ha->flags.enable_target_reset) {
1153 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1154 if (fcport->port_type != FCT_TARGET)
1155 continue;
1156
1157 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1158 if (ret != QLA_SUCCESS) {
1159 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1160 "target_reset=%d d_id=%x.\n", __func__,
1161 vha->host_no, ret, fcport->d_id.b24));
1162 }
1163 }
1164 }
1165
a9083016 1166 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1167 ret = qla2x00_full_login_lip(vha);
0c8c39af 1168 if (ret != QLA_SUCCESS) {
749af3d5 1169 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1170 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1171 ret));
749af3d5
AC
1172 }
1173 atomic_set(&vha->loop_state, LOOP_DOWN);
1174 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1175 qla2x00_mark_all_devices_lost(vha, 0);
1176 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV
1177 }
1178
0d6e61bc 1179 if (ha->flags.enable_lip_reset) {
e315cd28 1180 ret = qla2x00_lip_reset(vha);
0c8c39af 1181 if (ret != QLA_SUCCESS) {
749af3d5 1182 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC
1183 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1184 } else
1185 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT
1186 }
1187
1da177e4 1188 /* Issue marker command only when we are going to start the I/O */
e315cd28 1189 vha->marker_needed = 1;
1da177e4 1190
0c8c39af 1191 return QLA_SUCCESS;
1da177e4
LT
1192}
1193
df4bf0bb 1194void
e315cd28 1195qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1196{
73208dfd 1197 int que, cnt;
df4bf0bb
AV
1198 unsigned long flags;
1199 srb_t *sp;
ac280b67 1200 struct srb_ctx *ctx;
e315cd28 1201 struct qla_hw_data *ha = vha->hw;
73208dfd 1202 struct req_que *req;
df4bf0bb
AV
1203
1204 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1205 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1206 req = ha->req_q_map[que];
73208dfd
AC
1207 if (!req)
1208 continue;
1209 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1210 sp = req->outstanding_cmds[cnt];
e612d465 1211 if (sp) {
73208dfd 1212 req->outstanding_cmds[cnt] = NULL;
a9083016 1213 if (!sp->ctx ||
bad75002
AE
1214 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1215 IS_PROT_IO(sp)) {
ac280b67
AV
1216 sp->cmd->result = res;
1217 qla2x00_sp_compl(ha, sp);
1218 } else {
1219 ctx = sp->ctx;
6c452a45
AV
1220 if (ctx->type == SRB_LOGIN_CMD ||
1221 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1222 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1223 } else {
6c452a45 1224 struct fc_bsg_job *bsg_job =
4916392b 1225 ctx->u.bsg_job;
6c452a45
AV
1226 if (bsg_job->request->msgcode
1227 == FC_BSG_HST_CT)
db3ad7f8 1228 kfree(sp->fcport);
6c452a45
AV
1229 bsg_job->req->errors = 0;
1230 bsg_job->reply->result = res;
4916392b 1231 bsg_job->job_done(bsg_job);
db3ad7f8 1232 kfree(sp->ctx);
6c452a45 1233 mempool_free(sp,
4916392b 1234 ha->srb_mempool);
db3ad7f8 1235 }
ac280b67 1236 }
73208dfd 1237 }
df4bf0bb
AV
1238 }
1239 }
1240 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1241}
1242
f4f051eb 1243static int
1244qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1245{
bdf79621 1246 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1247
19a7b4ae 1248 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1249 return -ENXIO;
bdf79621 1250
19a7b4ae 1251 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1252
f4f051eb 1253 return 0;
1254}
1da177e4 1255
f4f051eb 1256static int
1257qla2xxx_slave_configure(struct scsi_device *sdev)
1258{
e315cd28
AC
1259 scsi_qla_host_t *vha = shost_priv(sdev->host);
1260 struct qla_hw_data *ha = vha->hw;
8482e118 1261 struct fc_rport *rport = starget_to_rport(sdev->sdev_target);
2afa19a9 1262 struct req_que *req = vha->req;
8482e118 1263
f4f051eb 1264 if (sdev->tagged_supported)
73208dfd 1265 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1266 else
73208dfd 1267 scsi_deactivate_tcq(sdev, req->max_q_depth);
1da177e4 1268
85821c90 1269 rport->dev_loss_tmo = ha->port_down_retry_count;
8482e118 1270
f4f051eb 1271 return 0;
1272}
1da177e4 1273
f4f051eb 1274static void
1275qla2xxx_slave_destroy(struct scsi_device *sdev)
1276{
1277 sdev->hostdata = NULL;
1da177e4
LT
1278}
1279
c45dd305
GM
1280static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1281{
1282 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1283
1284 if (!scsi_track_queue_full(sdev, qdepth))
1285 return;
1286
1287 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1288 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1289 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1290 sdev->queue_depth));
1291}
1292
1293static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1294{
1295 fc_port_t *fcport = sdev->hostdata;
1296 struct scsi_qla_host *vha = fcport->vha;
1297 struct qla_hw_data *ha = vha->hw;
1298 struct req_que *req = NULL;
1299
1300 req = vha->req;
1301 if (!req)
1302 return;
1303
1304 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1305 return;
1306
1307 if (sdev->ordered_tags)
1308 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1309 else
1310 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1311
1312 DEBUG2(qla_printk(KERN_INFO, ha,
1313 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1314 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1315 sdev->queue_depth));
1316}
1317
ce7e4af7 1318static int
e881a172 1319qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1320{
c45dd305
GM
1321 switch (reason) {
1322 case SCSI_QDEPTH_DEFAULT:
1323 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1324 break;
1325 case SCSI_QDEPTH_QFULL:
1326 qla2x00_handle_queue_full(sdev, qdepth);
1327 break;
1328 case SCSI_QDEPTH_RAMP_UP:
1329 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1330 break;
1331 default:
08002af2 1332 return -EOPNOTSUPP;
c45dd305 1333 }
e881a172 1334
ce7e4af7
AV
1335 return sdev->queue_depth;
1336}
1337
1338static int
1339qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1340{
1341 if (sdev->tagged_supported) {
1342 scsi_set_tag_type(sdev, tag_type);
1343 if (tag_type)
1344 scsi_activate_tcq(sdev, sdev->queue_depth);
1345 else
1346 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1347 } else
1348 tag_type = 0;
1349
1350 return tag_type;
1351}
1352
1da177e4
LT
1353/**
1354 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1355 * @ha: HA context
1356 *
1357 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1358 * supported addressing method.
1359 */
1360static void
53303c42 1361qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1362{
7524f9b9 1363 /* Assume a 32bit DMA mask. */
1da177e4 1364 ha->flags.enable_64bit_addressing = 0;
1da177e4 1365
6a35528a 1366 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV
1367 /* Any upper-dword bits set? */
1368 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1369 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1370 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1371 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV
1372 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1373 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1374 return;
1da177e4 1375 }
1da177e4 1376 }
7524f9b9 1377
284901a9
YH
1378 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1379 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT
1380}
1381
fd34f556 1382static void
e315cd28 1383qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV
1384{
1385 unsigned long flags = 0;
1386 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1387
1388 spin_lock_irqsave(&ha->hardware_lock, flags);
1389 ha->interrupts_on = 1;
1390 /* enable risc and host interrupts */
1391 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1392 RD_REG_WORD(&reg->ictrl);
1393 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1394
1395}
1396
1397static void
e315cd28 1398qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV
1399{
1400 unsigned long flags = 0;
1401 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1402
1403 spin_lock_irqsave(&ha->hardware_lock, flags);
1404 ha->interrupts_on = 0;
1405 /* disable risc and host interrupts */
1406 WRT_REG_WORD(&reg->ictrl, 0);
1407 RD_REG_WORD(&reg->ictrl);
1408 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1409}
1410
1411static void
e315cd28 1412qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV
1413{
1414 unsigned long flags = 0;
1415 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1416
1417 spin_lock_irqsave(&ha->hardware_lock, flags);
1418 ha->interrupts_on = 1;
1419 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1420 RD_REG_DWORD(&reg->ictrl);
1421 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1422}
1423
1424static void
e315cd28 1425qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV
1426{
1427 unsigned long flags = 0;
1428 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1429
124f85e6
AV
1430 if (IS_NOPOLLING_TYPE(ha))
1431 return;
fd34f556
AV
1432 spin_lock_irqsave(&ha->hardware_lock, flags);
1433 ha->interrupts_on = 0;
1434 WRT_REG_DWORD(&reg->ictrl, 0);
1435 RD_REG_DWORD(&reg->ictrl);
1436 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1437}
1438
1439static struct isp_operations qla2100_isp_ops = {
1440 .pci_config = qla2100_pci_config,
1441 .reset_chip = qla2x00_reset_chip,
1442 .chip_diag = qla2x00_chip_diag,
1443 .config_rings = qla2x00_config_rings,
1444 .reset_adapter = qla2x00_reset_adapter,
1445 .nvram_config = qla2x00_nvram_config,
1446 .update_fw_options = qla2x00_update_fw_options,
1447 .load_risc = qla2x00_load_risc,
1448 .pci_info_str = qla2x00_pci_info_str,
1449 .fw_version_str = qla2x00_fw_version_str,
1450 .intr_handler = qla2100_intr_handler,
1451 .enable_intrs = qla2x00_enable_intrs,
1452 .disable_intrs = qla2x00_disable_intrs,
1453 .abort_command = qla2x00_abort_command,
523ec773
AV
1454 .target_reset = qla2x00_abort_target,
1455 .lun_reset = qla2x00_lun_reset,
fd34f556
AV
1456 .fabric_login = qla2x00_login_fabric,
1457 .fabric_logout = qla2x00_fabric_logout,
1458 .calc_req_entries = qla2x00_calc_iocbs_32,
1459 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1460 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1461 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1462 .read_nvram = qla2x00_read_nvram_data,
1463 .write_nvram = qla2x00_write_nvram_data,
1464 .fw_dump = qla2100_fw_dump,
1465 .beacon_on = NULL,
1466 .beacon_off = NULL,
1467 .beacon_blink = NULL,
1468 .read_optrom = qla2x00_read_optrom_data,
1469 .write_optrom = qla2x00_write_optrom_data,
1470 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1471 .start_scsi = qla2x00_start_scsi,
a9083016 1472 .abort_isp = qla2x00_abort_isp,
fd34f556
AV
1473};
1474
1475static struct isp_operations qla2300_isp_ops = {
1476 .pci_config = qla2300_pci_config,
1477 .reset_chip = qla2x00_reset_chip,
1478 .chip_diag = qla2x00_chip_diag,
1479 .config_rings = qla2x00_config_rings,
1480 .reset_adapter = qla2x00_reset_adapter,
1481 .nvram_config = qla2x00_nvram_config,
1482 .update_fw_options = qla2x00_update_fw_options,
1483 .load_risc = qla2x00_load_risc,
1484 .pci_info_str = qla2x00_pci_info_str,
1485 .fw_version_str = qla2x00_fw_version_str,
1486 .intr_handler = qla2300_intr_handler,
1487 .enable_intrs = qla2x00_enable_intrs,
1488 .disable_intrs = qla2x00_disable_intrs,
1489 .abort_command = qla2x00_abort_command,
523ec773
AV
1490 .target_reset = qla2x00_abort_target,
1491 .lun_reset = qla2x00_lun_reset,
fd34f556
AV
1492 .fabric_login = qla2x00_login_fabric,
1493 .fabric_logout = qla2x00_fabric_logout,
1494 .calc_req_entries = qla2x00_calc_iocbs_32,
1495 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1496 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1497 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1498 .read_nvram = qla2x00_read_nvram_data,
1499 .write_nvram = qla2x00_write_nvram_data,
1500 .fw_dump = qla2300_fw_dump,
1501 .beacon_on = qla2x00_beacon_on,
1502 .beacon_off = qla2x00_beacon_off,
1503 .beacon_blink = qla2x00_beacon_blink,
1504 .read_optrom = qla2x00_read_optrom_data,
1505 .write_optrom = qla2x00_write_optrom_data,
1506 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1507 .start_scsi = qla2x00_start_scsi,
a9083016 1508 .abort_isp = qla2x00_abort_isp,
fd34f556
AV
1509};
1510
1511static struct isp_operations qla24xx_isp_ops = {
1512 .pci_config = qla24xx_pci_config,
1513 .reset_chip = qla24xx_reset_chip,
1514 .chip_diag = qla24xx_chip_diag,
1515 .config_rings = qla24xx_config_rings,
1516 .reset_adapter = qla24xx_reset_adapter,
1517 .nvram_config = qla24xx_nvram_config,
1518 .update_fw_options = qla24xx_update_fw_options,
1519 .load_risc = qla24xx_load_risc,
1520 .pci_info_str = qla24xx_pci_info_str,
1521 .fw_version_str = qla24xx_fw_version_str,
1522 .intr_handler = qla24xx_intr_handler,
1523 .enable_intrs = qla24xx_enable_intrs,
1524 .disable_intrs = qla24xx_disable_intrs,
1525 .abort_command = qla24xx_abort_command,
523ec773
AV
1526 .target_reset = qla24xx_abort_target,
1527 .lun_reset = qla24xx_lun_reset,
fd34f556
AV
1528 .fabric_login = qla24xx_login_fabric,
1529 .fabric_logout = qla24xx_fabric_logout,
1530 .calc_req_entries = NULL,
1531 .build_iocbs = NULL,
1532 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1533 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1534 .read_nvram = qla24xx_read_nvram_data,
1535 .write_nvram = qla24xx_write_nvram_data,
1536 .fw_dump = qla24xx_fw_dump,
1537 .beacon_on = qla24xx_beacon_on,
1538 .beacon_off = qla24xx_beacon_off,
1539 .beacon_blink = qla24xx_beacon_blink,
1540 .read_optrom = qla24xx_read_optrom_data,
1541 .write_optrom = qla24xx_write_optrom_data,
1542 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1543 .start_scsi = qla24xx_start_scsi,
a9083016 1544 .abort_isp = qla2x00_abort_isp,
fd34f556
AV
1545};
1546
c3a2f0df
AV
1547static struct isp_operations qla25xx_isp_ops = {
1548 .pci_config = qla25xx_pci_config,
1549 .reset_chip = qla24xx_reset_chip,
1550 .chip_diag = qla24xx_chip_diag,
1551 .config_rings = qla24xx_config_rings,
1552 .reset_adapter = qla24xx_reset_adapter,
1553 .nvram_config = qla24xx_nvram_config,
1554 .update_fw_options = qla24xx_update_fw_options,
1555 .load_risc = qla24xx_load_risc,
1556 .pci_info_str = qla24xx_pci_info_str,
1557 .fw_version_str = qla24xx_fw_version_str,
1558 .intr_handler = qla24xx_intr_handler,
1559 .enable_intrs = qla24xx_enable_intrs,
1560 .disable_intrs = qla24xx_disable_intrs,
1561 .abort_command = qla24xx_abort_command,
523ec773
AV
1562 .target_reset = qla24xx_abort_target,
1563 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV
1564 .fabric_login = qla24xx_login_fabric,
1565 .fabric_logout = qla24xx_fabric_logout,
1566 .calc_req_entries = NULL,
1567 .build_iocbs = NULL,
1568 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1569 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1570 .read_nvram = qla25xx_read_nvram_data,
1571 .write_nvram = qla25xx_write_nvram_data,
1572 .fw_dump = qla25xx_fw_dump,
1573 .beacon_on = qla24xx_beacon_on,
1574 .beacon_off = qla24xx_beacon_off,
1575 .beacon_blink = qla24xx_beacon_blink,
338c9161 1576 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV
1577 .write_optrom = qla24xx_write_optrom_data,
1578 .get_flash_version = qla24xx_get_flash_version,
bad75002 1579 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1580 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV
1581};
1582
3a03eb79
AV
1583static struct isp_operations qla81xx_isp_ops = {
1584 .pci_config = qla25xx_pci_config,
1585 .reset_chip = qla24xx_reset_chip,
1586 .chip_diag = qla24xx_chip_diag,
1587 .config_rings = qla24xx_config_rings,
1588 .reset_adapter = qla24xx_reset_adapter,
1589 .nvram_config = qla81xx_nvram_config,
1590 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1591 .load_risc = qla81xx_load_risc,
3a03eb79
AV
1592 .pci_info_str = qla24xx_pci_info_str,
1593 .fw_version_str = qla24xx_fw_version_str,
1594 .intr_handler = qla24xx_intr_handler,
1595 .enable_intrs = qla24xx_enable_intrs,
1596 .disable_intrs = qla24xx_disable_intrs,
1597 .abort_command = qla24xx_abort_command,
1598 .target_reset = qla24xx_abort_target,
1599 .lun_reset = qla24xx_lun_reset,
1600 .fabric_login = qla24xx_login_fabric,
1601 .fabric_logout = qla24xx_fabric_logout,
1602 .calc_req_entries = NULL,
1603 .build_iocbs = NULL,
1604 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1605 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV
1606 .read_nvram = NULL,
1607 .write_nvram = NULL,
3a03eb79
AV
1608 .fw_dump = qla81xx_fw_dump,
1609 .beacon_on = qla24xx_beacon_on,
1610 .beacon_off = qla24xx_beacon_off,
1611 .beacon_blink = qla24xx_beacon_blink,
1612 .read_optrom = qla25xx_read_optrom_data,
1613 .write_optrom = qla24xx_write_optrom_data,
1614 .get_flash_version = qla24xx_get_flash_version,
1615 .start_scsi = qla24xx_start_scsi,
a9083016
GM
1616 .abort_isp = qla2x00_abort_isp,
1617};
1618
1619static struct isp_operations qla82xx_isp_ops = {
1620 .pci_config = qla82xx_pci_config,
1621 .reset_chip = qla82xx_reset_chip,
1622 .chip_diag = qla24xx_chip_diag,
1623 .config_rings = qla82xx_config_rings,
1624 .reset_adapter = qla24xx_reset_adapter,
1625 .nvram_config = qla81xx_nvram_config,
1626 .update_fw_options = qla24xx_update_fw_options,
1627 .load_risc = qla82xx_load_risc,
1628 .pci_info_str = qla82xx_pci_info_str,
1629 .fw_version_str = qla24xx_fw_version_str,
1630 .intr_handler = qla82xx_intr_handler,
1631 .enable_intrs = qla82xx_enable_intrs,
1632 .disable_intrs = qla82xx_disable_intrs,
1633 .abort_command = qla24xx_abort_command,
1634 .target_reset = qla24xx_abort_target,
1635 .lun_reset = qla24xx_lun_reset,
1636 .fabric_login = qla24xx_login_fabric,
1637 .fabric_logout = qla24xx_fabric_logout,
1638 .calc_req_entries = NULL,
1639 .build_iocbs = NULL,
1640 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1641 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1642 .read_nvram = qla24xx_read_nvram_data,
1643 .write_nvram = qla24xx_write_nvram_data,
1644 .fw_dump = qla24xx_fw_dump,
1645 .beacon_on = qla24xx_beacon_on,
1646 .beacon_off = qla24xx_beacon_off,
1647 .beacon_blink = qla24xx_beacon_blink,
1648 .read_optrom = qla82xx_read_optrom_data,
1649 .write_optrom = qla82xx_write_optrom_data,
1650 .get_flash_version = qla24xx_get_flash_version,
1651 .start_scsi = qla82xx_start_scsi,
1652 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV
1653};
1654
ea5b6382 1655static inline void
e315cd28 1656qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382 1657{
1658 ha->device_type = DT_EXTENDED_IDS;
1659 switch (ha->pdev->device) {
1660 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1661 ha->device_type |= DT_ISP2100;
1662 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1663 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1664 break;
1665 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1666 ha->device_type |= DT_ISP2200;
1667 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1668 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1669 break;
1670 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1671 ha->device_type |= DT_ISP2300;
4a59f71d 1672 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1673 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1674 break;
1675 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1676 ha->device_type |= DT_ISP2312;
4a59f71d 1677 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1678 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1679 break;
1680 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1681 ha->device_type |= DT_ISP2322;
4a59f71d 1682 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382 1683 if (ha->pdev->subsystem_vendor == 0x1028 &&
1684 ha->pdev->subsystem_device == 0x0170)
1685 ha->device_type |= DT_OEM_001;
441d1072 1686 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1687 break;
1688 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1689 ha->device_type |= DT_ISP6312;
441d1072 1690 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1691 break;
1692 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1693 ha->device_type |= DT_ISP6322;
441d1072 1694 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1695 break;
1696 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1697 ha->device_type |= DT_ISP2422;
4a59f71d 1698 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1699 ha->device_type |= DT_FWI2;
c76f2c01 1700 ha->device_type |= DT_IIDMA;
441d1072 1701 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1702 break;
1703 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1704 ha->device_type |= DT_ISP2432;
4a59f71d 1705 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1706 ha->device_type |= DT_FWI2;
c76f2c01 1707 ha->device_type |= DT_IIDMA;
441d1072 1708 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1709 break;
4d4df193
HK
1710 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1711 ha->device_type |= DT_ISP8432;
1712 ha->device_type |= DT_ZIO_SUPPORTED;
1713 ha->device_type |= DT_FWI2;
1714 ha->device_type |= DT_IIDMA;
1715 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1716 break;
044cc6c8 1717 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1718 ha->device_type |= DT_ISP5422;
e428924c 1719 ha->device_type |= DT_FWI2;
441d1072 1720 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1721 break;
044cc6c8 1722 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1723 ha->device_type |= DT_ISP5432;
e428924c 1724 ha->device_type |= DT_FWI2;
441d1072 1725 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1726 break;
c3a2f0df
AV
1727 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1728 ha->device_type |= DT_ISP2532;
1729 ha->device_type |= DT_ZIO_SUPPORTED;
1730 ha->device_type |= DT_FWI2;
1731 ha->device_type |= DT_IIDMA;
441d1072 1732 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1733 break;
3a03eb79
AV
1734 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1735 ha->device_type |= DT_ISP8001;
1736 ha->device_type |= DT_ZIO_SUPPORTED;
1737 ha->device_type |= DT_FWI2;
1738 ha->device_type |= DT_IIDMA;
1739 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1740 break;
a9083016
GM
1741 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1742 ha->device_type |= DT_ISP8021;
1743 ha->device_type |= DT_ZIO_SUPPORTED;
1744 ha->device_type |= DT_FWI2;
1745 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1746 /* Initialize 82XX ISP flags */
1747 qla82xx_init_flags(ha);
1748 break;
ea5b6382 1749 }
e5b68a61 1750
a9083016
GM
1751 if (IS_QLA82XX(ha))
1752 ha->port_no = !(ha->portnum & 1);
1753 else
1754 /* Get adapter physical port no from interrupt pin register. */
1755 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1756
e5b68a61
AC
1757 if (ha->port_no & 1)
1758 ha->flags.port0 = 1;
1759 else
1760 ha->flags.port0 = 0;
ea5b6382 1761}
1762
1da177e4 1763static int
e315cd28 1764qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1765{
3776541d 1766 resource_size_t pio;
73208dfd 1767 uint16_t msix;
68ca949c 1768 int cpus;
1da177e4 1769
a9083016
GM
1770 if (IS_QLA82XX(ha))
1771 return qla82xx_iospace_config(ha);
1772
285d0321
AV
1773 if (pci_request_selected_regions(ha->pdev, ha->bars,
1774 QLA2XXX_DRIVER_NAME)) {
1775 qla_printk(KERN_WARNING, ha,
1776 "Failed to reserve PIO/MMIO regions (%s)\n",
1777 pci_name(ha->pdev));
1778
1779 goto iospace_error_exit;
1780 }
1781 if (!(ha->bars & 1))
1782 goto skip_pio;
1783
1da177e4
LT
1784 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1785 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV
1786 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1787 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT
1788 qla_printk(KERN_WARNING, ha,
1789 "Invalid PCI I/O region size (%s)...\n",
1790 pci_name(ha->pdev));
1791 pio = 0;
1792 }
1793 } else {
1794 qla_printk(KERN_WARNING, ha,
1795 "region #0 not a PIO resource (%s)...\n",
1796 pci_name(ha->pdev));
1797 pio = 0;
1798 }
285d0321 1799 ha->pio_address = pio;
1da177e4 1800
285d0321 1801skip_pio:
1da177e4 1802 /* Use MMIO operations for all accesses. */
3776541d 1803 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1804 qla_printk(KERN_ERR, ha,
3776541d 1805 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT
1806 pci_name(ha->pdev));
1807 goto iospace_error_exit;
1808 }
3776541d 1809 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT
1810 qla_printk(KERN_ERR, ha,
1811 "Invalid PCI mem region size (%s), aborting\n",
1812 pci_name(ha->pdev));
1813 goto iospace_error_exit;
1814 }
1815
3776541d 1816 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT
1817 if (!ha->iobase) {
1818 qla_printk(KERN_ERR, ha,
1819 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1820
1821 goto iospace_error_exit;
1822 }
1823
73208dfd 1824 /* Determine queue resources */
2afa19a9 1825 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH
1826 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1827 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1828 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1829 goto mqiobase_exit;
d84a47c2 1830
17d98630
AC
1831 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1832 pci_resource_len(ha->pdev, 3));
1833 if (ha->mqiobase) {
1834 /* Read MSIX vector size of the board */
1835 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1836 ha->msix_count = msix;
68ca949c
AC
1837 /* Max queues are bounded by available msix vectors */
1838 /* queue 0 uses two msix vectors */
1839 if (ql2xmultique_tag) {
1840 cpus = num_online_cpus();
27dc9c5a 1841 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC
1842 (cpus + 1) : (ha->msix_count - 1);
1843 ha->max_req_queues = 2;
1844 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC
1845 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1846 QLA_MQ_SIZE : ql2xmaxqueues;
1847 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1848 " of request queues:%d\n", ha->max_req_queues));
1849 }
68ca949c
AC
1850 qla_printk(KERN_INFO, ha,
1851 "MSI-X vector count: %d\n", msix);
2afa19a9
AC
1852 } else
1853 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC
1854
1855mqiobase_exit:
2afa19a9 1856 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT
1857 return (0);
1858
1859iospace_error_exit:
1860 return (-ENOMEM);
1861}
1862
1e99e33a
AV
1863static void
1864qla2xxx_scan_start(struct Scsi_Host *shost)
1865{
e315cd28 1866 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1867
cbc8eb67
AV
1868 if (vha->hw->flags.running_gold_fw)
1869 return;
1870
e315cd28
AC
1871 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1872 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1873 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1874 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV
1875}
1876
1877static int
1878qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1879{
e315cd28 1880 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1881
e315cd28 1882 if (!vha->host)
1e99e33a 1883 return 1;
e315cd28 1884 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV
1885 return 1;
1886
e315cd28 1887 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV
1888}
1889
1da177e4
LT
1890/*
1891 * PCI driver interface
1892 */
7ee61397
AV
1893static int __devinit
1894qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1895{
a1541d5a 1896 int ret = -ENODEV;
1da177e4 1897 struct Scsi_Host *host;
e315cd28
AC
1898 scsi_qla_host_t *base_vha = NULL;
1899 struct qla_hw_data *ha;
29856e28 1900 char pci_info[30];
1da177e4 1901 char fw_str[30];
5433383e 1902 struct scsi_host_template *sht;
c51da4ec 1903 int bars, max_id, mem_only = 0;
e315cd28 1904 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC
1905 struct req_que *req = NULL;
1906 struct rsp_que *rsp = NULL;
1da177e4 1907
285d0321 1908 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1909 sht = &qla2xxx_driver_template;
5433383e 1910 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1911 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1912 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1913 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1914 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1915 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM
1916 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1917 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1918 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1919 mem_only = 1;
285d0321
AV
1920 }
1921
09483916
BH
1922 if (mem_only) {
1923 if (pci_enable_device_mem(pdev))
1924 goto probe_out;
1925 } else {
1926 if (pci_enable_device(pdev))
1927 goto probe_out;
1928 }
285d0321 1929
0927678f
JB
1930 /* This may fail but that's ok */
1931 pci_enable_pcie_error_reporting(pdev);
285d0321 1932
e315cd28
AC
1933 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1934 if (!ha) {
1935 DEBUG(printk("Unable to allocate memory for ha\n"));
1936 goto probe_out;
1da177e4 1937 }
e315cd28 1938 ha->pdev = pdev;
1da177e4
LT
1939
1940 /* Clear our data area */
285d0321 1941 ha->bars = bars;
09483916 1942 ha->mem_only = mem_only;
df4bf0bb 1943 spin_lock_init(&ha->hardware_lock);
1da177e4 1944
ea5b6382 1945 /* Set ISP-type information. */
1946 qla2x00_set_isp_flags(ha);
ca79cf66
DG
1947
1948 /* Set EEH reset type to fundamental if required by hba */
1949 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1950 pdev->needs_freset = 1;
ca79cf66
DG
1951 }
1952
1da177e4
LT
1953 /* Configure PCI I/O space */
1954 ret = qla2x00_iospace_config(ha);
a1541d5a 1955 if (ret)
e315cd28 1956 goto probe_hw_failed;
1da177e4 1957
1da177e4 1958 qla_printk(KERN_INFO, ha,
5433383e
AV
1959 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1960 ha->iobase);
1da177e4 1961
1da177e4 1962 ha->prev_topology = 0;
fca29703 1963 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1964 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1965 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1966
abbd8870 1967 /* Assign ISP specific operations. */
e315cd28 1968 max_id = MAX_TARGETS_2200;
1da177e4 1969 if (IS_QLA2100(ha)) {
e315cd28 1970 max_id = MAX_TARGETS_2100;
1da177e4 1971 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC
1972 req_length = REQUEST_ENTRY_CNT_2100;
1973 rsp_length = RESPONSE_ENTRY_CNT_2100;
1974 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1975 ha->gid_list_info_size = 4;
3a03eb79
AV
1976 ha->flash_conf_off = ~0;
1977 ha->flash_data_off = ~0;
1978 ha->nvram_conf_off = ~0;
1979 ha->nvram_data_off = ~0;
fd34f556 1980 ha->isp_ops = &qla2100_isp_ops;
1da177e4 1981 } else if (IS_QLA2200(ha)) {
1da177e4 1982 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC
1983 req_length = REQUEST_ENTRY_CNT_2200;
1984 rsp_length = RESPONSE_ENTRY_CNT_2100;
1985 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1986 ha->gid_list_info_size = 4;
3a03eb79
AV
1987 ha->flash_conf_off = ~0;
1988 ha->flash_data_off = ~0;
1989 ha->nvram_conf_off = ~0;
1990 ha->nvram_data_off = ~0;
fd34f556 1991 ha->isp_ops = &qla2100_isp_ops;
fca29703 1992 } else if (IS_QLA23XX(ha)) {
1da177e4 1993 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC
1994 req_length = REQUEST_ENTRY_CNT_2200;
1995 rsp_length = RESPONSE_ENTRY_CNT_2300;
1996 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 1997 ha->gid_list_info_size = 6;
854165f4 1998 if (IS_QLA2322(ha) || IS_QLA6322(ha))
1999 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV
2000 ha->flash_conf_off = ~0;
2001 ha->flash_data_off = ~0;
2002 ha->nvram_conf_off = ~0;
2003 ha->nvram_data_off = ~0;
fd34f556 2004 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2005 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2006 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC
2007 req_length = REQUEST_ENTRY_CNT_24XX;
2008 rsp_length = RESPONSE_ENTRY_CNT_2300;
2009 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2010 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2011 ha->gid_list_info_size = 8;
854165f4 2012 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2013 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2014 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV
2015 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2016 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2017 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2018 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2019 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2020 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC
2021 req_length = REQUEST_ENTRY_CNT_24XX;
2022 rsp_length = RESPONSE_ENTRY_CNT_2300;
2023 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2024 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV
2025 ha->gid_list_info_size = 8;
2026 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2027 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2028 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV
2029 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2030 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2031 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2032 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2033 } else if (IS_QLA81XX(ha)) {
2034 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2035 req_length = REQUEST_ENTRY_CNT_24XX;
2036 rsp_length = RESPONSE_ENTRY_CNT_2300;
2037 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2038 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2039 ha->gid_list_info_size = 8;
2040 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2041 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV
2042 ha->isp_ops = &qla81xx_isp_ops;
2043 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2044 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2045 ha->nvram_conf_off = ~0;
2046 ha->nvram_data_off = ~0;
a9083016
GM
2047 } else if (IS_QLA82XX(ha)) {
2048 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2049 req_length = REQUEST_ENTRY_CNT_82XX;
2050 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2051 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2052 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2053 ha->gid_list_info_size = 8;
2054 ha->optrom_size = OPTROM_SIZE_82XX;
2055 ha->isp_ops = &qla82xx_isp_ops;
2056 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2057 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2058 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2059 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2060 }
1da177e4 2061
6c2f527c 2062 mutex_init(&ha->vport_lock);
0b05a1f0
MB
2063 init_completion(&ha->mbx_cmd_comp);
2064 complete(&ha->mbx_cmd_comp);
2065 init_completion(&ha->mbx_intr_comp);
1da177e4 2066
2c3dfe3f 2067 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2068
53303c42 2069 qla2x00_config_dma_addressing(ha);
73208dfd 2070 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2071 if (!ret) {
1da177e4
LT
2072 qla_printk(KERN_WARNING, ha,
2073 "[ERROR] Failed to allocate memory for adapter\n");
2074
e315cd28
AC
2075 goto probe_hw_failed;
2076 }
2077
73208dfd 2078 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2079 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC
2080 req->max_q_depth = ql2xmaxqdepth;
2081
e315cd28
AC
2082
2083 base_vha = qla2x00_create_host(sht, ha);
2084 if (!base_vha) {
2085 qla_printk(KERN_WARNING, ha,
2086 "[ERROR] Failed to allocate memory for scsi_host\n");
2087
a1541d5a 2088 ret = -ENOMEM;
6e9f21f3 2089 qla2x00_mem_free(ha);
2afa19a9
AC
2090 qla2x00_free_req_que(ha, req);
2091 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2092 goto probe_hw_failed;
1da177e4
LT
2093 }
2094
e315cd28
AC
2095 pci_set_drvdata(pdev, base_vha);
2096
e315cd28 2097 host = base_vha->host;
2afa19a9 2098 base_vha->req = req;
73208dfd
AC
2099 host->can_queue = req->length + 128;
2100 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2101 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2102 else
e315cd28
AC
2103 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2104 base_vha->vp_idx;
e315cd28
AC
2105 if (IS_QLA2100(ha))
2106 host->sg_tablesize = 32;
2107 host->max_id = max_id;
2108 host->this_id = 255;
2109 host->cmd_per_lun = 3;
2110 host->unique_id = host->host_no;
2111 host->max_cmd_len = MAX_CMDSZ;
2112 host->max_channel = MAX_BUSES - 1;
2113 host->max_lun = MAX_LUNS;
2114 host->transportt = qla2xxx_transport_template;
9a069e19 2115 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2116
73208dfd
AC
2117 /* Set up the irqs */
2118 ret = qla2x00_request_irqs(ha, rsp);
2119 if (ret)
6e9f21f3 2120 goto probe_init_failed;
90a86fc0
JC
2121
2122 pci_save_state(pdev);
2123
73208dfd 2124 /* Alloc arrays of request and response ring ptrs */
7163ea81 2125que_init:
73208dfd
AC
2126 if (!qla2x00_alloc_queues(ha)) {
2127 qla_printk(KERN_WARNING, ha,
2128 "[ERROR] Failed to allocate memory for queue"
2129 " pointers\n");
6e9f21f3 2130 goto probe_init_failed;
73208dfd 2131 }
a9083016 2132
73208dfd
AC
2133 ha->rsp_q_map[0] = rsp;
2134 ha->req_q_map[0] = req;
2afa19a9
AC
2135 rsp->req = req;
2136 req->rsp = rsp;
2137 set_bit(0, ha->req_qid_map);
2138 set_bit(0, ha->rsp_qid_map);
08029990
AV
2139 /* FWI2-capable only. */
2140 req->req_q_in = &ha->iobase->isp24.req_q_in;
2141 req->req_q_out = &ha->iobase->isp24.req_q_out;
2142 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2143 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2144 if (ha->mqenable) {
08029990
AV
2145 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2146 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2147 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2148 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC
2149 }
2150
a9083016
GM
2151 if (IS_QLA82XX(ha)) {
2152 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2153 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2154 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2155 }
2156
e315cd28 2157 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT
2158 qla_printk(KERN_WARNING, ha,
2159 "Failed to initialize adapter\n");
2160
2161 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2162 "Adapter flags %x.\n",
e315cd28 2163 base_vha->host_no, base_vha->device_flags));
1da177e4 2164
a9083016
GM
2165 if (IS_QLA82XX(ha)) {
2166 qla82xx_idc_lock(ha);
2167 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2168 QLA82XX_DEV_FAILED);
2169 qla82xx_idc_unlock(ha);
2170 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2171 }
2172
a1541d5a 2173 ret = -ENODEV;
1da177e4
LT
2174 goto probe_failed;
2175 }
2176
7163ea81
AC
2177 if (ha->mqenable) {
2178 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC
2179 qla_printk(KERN_WARNING, ha,
2180 "Can't create queues, falling back to single"
2181 " queue mode\n");
7163ea81
AC
2182 goto que_init;
2183 }
2184 }
68ca949c 2185
cbc8eb67
AV
2186 if (ha->flags.running_gold_fw)
2187 goto skip_dpc;
2188
1da177e4
LT
2189 /*
2190 * Startup the kernel thread for this host adapter
2191 */
39a11240 2192 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2193 "%s_dpc", base_vha->host_str);
39a11240 2194 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT
2195 qla_printk(KERN_WARNING, ha,
2196 "Unable to start DPC thread!\n");
39a11240 2197 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT
2198 goto probe_failed;
2199 }
1da177e4 2200
cbc8eb67 2201skip_dpc:
e315cd28
AC
2202 list_add_tail(&base_vha->list, &ha->vp_list);
2203 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT
2204
2205 /* Initialized the timer */
e315cd28 2206 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT
2207
2208 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2209 base_vha->host_no, ha));
d19044c3 2210
bad75002
AE
2211 if (IS_QLA25XX(ha) && ql2xenabledif) {
2212 if (ha->fw_attributes & BIT_4) {
2213 base_vha->flags.difdix_supported = 1;
2214 DEBUG18(qla_printk(KERN_INFO, ha,
2215 "Registering for DIF/DIX type 1 and 3"
2216 " protection.\n"));
2217 scsi_host_set_prot(host,
2218 SHOST_DIF_TYPE1_PROTECTION
2219 | SHOST_DIF_TYPE3_PROTECTION
2220 | SHOST_DIX_TYPE1_PROTECTION
2221 | SHOST_DIX_TYPE3_PROTECTION);
2222 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2223 } else
2224 base_vha->flags.difdix_supported = 0;
2225 }
2226
a9083016
GM
2227 ha->isp_ops->enable_intrs(ha);
2228
a1541d5a
AV
2229 ret = scsi_add_host(host, &pdev->dev);
2230 if (ret)
2231 goto probe_failed;
2232
1486400f
MR
2233 base_vha->flags.init_done = 1;
2234 base_vha->flags.online = 1;
2235
1e99e33a
AV
2236 scsi_scan_host(host);
2237
e315cd28 2238 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2239
e315cd28 2240 qla2x00_init_host_attr(base_vha);
a1541d5a 2241
e315cd28 2242 qla2x00_dfs_setup(base_vha);
df613b96 2243
1da177e4
LT
2244 qla_printk(KERN_INFO, ha, "\n"
2245 " QLogic Fibre Channel HBA Driver: %s\n"
2246 " QLogic %s - %s\n"
5433383e
AV
2247 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2248 qla2x00_version_str, ha->model_number,
e315cd28
AC
2249 ha->model_desc ? ha->model_desc : "", pdev->device,
2250 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2251 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2252 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2253
1da177e4
LT
2254 return 0;
2255
6e9f21f3 2256probe_init_failed:
2afa19a9
AC
2257 qla2x00_free_req_que(ha, req);
2258 qla2x00_free_rsp_que(ha, rsp);
2259 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2260
1da177e4 2261probe_failed:
b9978769
AV
2262 if (base_vha->timer_active)
2263 qla2x00_stop_timer(base_vha);
2264 base_vha->flags.online = 0;
2265 if (ha->dpc_thread) {
2266 struct task_struct *t = ha->dpc_thread;
2267
2268 ha->dpc_thread = NULL;
2269 kthread_stop(t);
2270 }
2271
e315cd28 2272 qla2x00_free_device(base_vha);
1da177e4 2273
e315cd28 2274 scsi_host_put(base_vha->host);
1da177e4 2275
e315cd28 2276probe_hw_failed:
a9083016
GM
2277 if (IS_QLA82XX(ha)) {
2278 qla82xx_idc_lock(ha);
2279 qla82xx_clear_drv_active(ha);
2280 qla82xx_idc_unlock(ha);
2281 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2282 if (!ql2xdbwr)
2283 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2284 } else {
2285 if (ha->iobase)
2286 iounmap(ha->iobase);
2287 }
e315cd28
AC
2288 pci_release_selected_regions(ha->pdev, ha->bars);
2289 kfree(ha);
2290 ha = NULL;
1da177e4 2291
a1541d5a 2292probe_out:
e315cd28 2293 pci_disable_device(pdev);
a1541d5a 2294 return ret;
1da177e4 2295}
1da177e4 2296
4c993f76 2297static void
7ee61397 2298qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2299{
e315cd28
AC
2300 scsi_qla_host_t *base_vha, *vha, *temp;
2301 struct qla_hw_data *ha;
2302
2303 base_vha = pci_get_drvdata(pdev);
2304 ha = base_vha->hw;
2305
2306 list_for_each_entry_safe(vha, temp, &ha->vp_list, list) {
2307 if (vha && vha->fc_vport)
2308 fc_vport_terminate(vha->fc_vport);
2309 }
1da177e4 2310
e315cd28 2311 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2312
b9978769
AV
2313 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2314
e315cd28 2315 qla2x00_dfs_remove(base_vha);
c795c1e4 2316
e315cd28 2317 qla84xx_put_chip(base_vha);
c795c1e4 2318
b9978769
AV
2319 /* Disable timer */
2320 if (base_vha->timer_active)
2321 qla2x00_stop_timer(base_vha);
2322
2323 base_vha->flags.online = 0;
2324
68ca949c
AC
2325 /* Flush the work queue and remove it */
2326 if (ha->wq) {
2327 flush_workqueue(ha->wq);
2328 destroy_workqueue(ha->wq);
2329 ha->wq = NULL;
2330 }
2331
b9978769
AV
2332 /* Kill the kernel thread for this host */
2333 if (ha->dpc_thread) {
2334 struct task_struct *t = ha->dpc_thread;
2335
2336 /*
2337 * qla2xxx_wake_dpc checks for ->dpc_thread
2338 * so we need to zero it out.
2339 */
2340 ha->dpc_thread = NULL;
2341 kthread_stop(t);
2342 }
2343
e315cd28 2344 qla2x00_free_sysfs_attr(base_vha);
df613b96 2345
e315cd28 2346 fc_remove_host(base_vha->host);
4d4df193 2347
e315cd28 2348 scsi_remove_host(base_vha->host);
1da177e4 2349
e315cd28 2350 qla2x00_free_device(base_vha);
bdf79621 2351
e315cd28 2352 scsi_host_put(base_vha->host);
1da177e4 2353
a9083016
GM
2354 if (IS_QLA82XX(ha)) {
2355 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2356 if (!ql2xdbwr)
2357 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2358 } else {
2359 if (ha->iobase)
2360 iounmap(ha->iobase);
1da177e4 2361
a9083016
GM
2362 if (ha->mqiobase)
2363 iounmap(ha->mqiobase);
2364 }
73208dfd 2365
e315cd28
AC
2366 pci_release_selected_regions(ha->pdev, ha->bars);
2367 kfree(ha);
2368 ha = NULL;
1da177e4 2369
90a86fc0
JC
2370 pci_disable_pcie_error_reporting(pdev);
2371
665db93b 2372 pci_disable_device(pdev);
1da177e4
LT
2373 pci_set_drvdata(pdev, NULL);
2374}
1da177e4
LT
2375
2376static void
e315cd28 2377qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2378{
e315cd28 2379 struct qla_hw_data *ha = vha->hw;
1da177e4 2380
85880801
AV
2381 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2382
2383 /* Disable timer */
2384 if (vha->timer_active)
2385 qla2x00_stop_timer(vha);
2386
2387 /* Kill the kernel thread for this host */
2388 if (ha->dpc_thread) {
2389 struct task_struct *t = ha->dpc_thread;
2390
2391 /*
2392 * qla2xxx_wake_dpc checks for ->dpc_thread
2393 * so we need to zero it out.
2394 */
2395 ha->dpc_thread = NULL;
2396 kthread_stop(t);
2397 }
2398
2afa19a9
AC
2399 qla25xx_delete_queues(vha);
2400
df613b96 2401 if (ha->flags.fce_enabled)
e315cd28 2402 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2403
a7a167bf 2404 if (ha->eft)
e315cd28 2405 qla2x00_disable_eft_trace(vha);
a7a167bf 2406
f6ef3b18 2407 /* Stop currently executing firmware. */
e315cd28 2408 qla2x00_try_to_stop_firmware(vha);
1da177e4 2409
85880801
AV
2410 vha->flags.online = 0;
2411
f6ef3b18 2412 /* turn-off interrupts on the card */
a9083016
GM
2413 if (ha->interrupts_on) {
2414 vha->flags.init_done = 0;
fd34f556 2415 ha->isp_ops->disable_intrs(ha);
a9083016 2416 }
f6ef3b18 2417
e315cd28 2418 qla2x00_free_irqs(vha);
1da177e4 2419
e315cd28 2420 qla2x00_mem_free(ha);
73208dfd
AC
2421
2422 qla2x00_free_queues(ha);
1da177e4
LT
2423}
2424
d97994dc 2425static inline void
e315cd28 2426qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc 2427 int defer)
2428{
d97994dc 2429 struct fc_rport *rport;
67becc00 2430 scsi_qla_host_t *base_vha;
d97994dc 2431
2432 if (!fcport->rport)
2433 return;
2434
2435 rport = fcport->rport;
2436 if (defer) {
67becc00 2437 base_vha = pci_get_drvdata(vha->hw->pdev);
e315cd28 2438 spin_lock_irq(vha->host->host_lock);
d97994dc 2439 fcport->drport = rport;
e315cd28 2440 spin_unlock_irq(vha->host->host_lock);
67becc00
AV
2441 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2442 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2443 } else
d97994dc 2444 fc_remote_port_delete(rport);
d97994dc 2445}
2446
1da177e4
LT
2447/*
2448 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2449 *
2450 * Input: ha = adapter block pointer. fcport = port structure pointer.
2451 *
2452 * Return: None.
2453 *
2454 * Context:
2455 */
e315cd28 2456void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2457 int do_login, int defer)
1da177e4 2458{
2c3dfe3f 2459 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28
AC
2460 vha->vp_idx == fcport->vp_idx) {
2461 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2462 qla2x00_schedule_rport_del(vha, fcport, defer);
2463 }
fa2a1ce5 2464 /*
1da177e4
LT
2465 * We may need to retry the login, so don't change the state of the
2466 * port but do the retries.
2467 */
2468 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2469 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2470
2471 if (!do_login)
2472 return;
2473
2474 if (fcport->login_retry == 0) {
e315cd28
AC
2475 fcport->login_retry = vha->hw->login_retry_count;
2476 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT
2477
2478 DEBUG(printk("scsi(%ld): Port login retry: "
2479 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2480 "id = 0x%04x retry cnt=%d\n",
e315cd28 2481 vha->host_no,
1da177e4
LT
2482 fcport->port_name[0],
2483 fcport->port_name[1],
2484 fcport->port_name[2],
2485 fcport->port_name[3],
2486 fcport->port_name[4],
2487 fcport->port_name[5],
2488 fcport->port_name[6],
2489 fcport->port_name[7],
2490 fcport->loop_id,
2491 fcport->login_retry));
2492 }
2493}
2494
2495/*
2496 * qla2x00_mark_all_devices_lost
2497 * Updates fcport state when device goes offline.
2498 *
2499 * Input:
2500 * ha = adapter block pointer.
2501 * fcport = port structure pointer.
2502 *
2503 * Return:
2504 * None.
2505 *
2506 * Context:
2507 */
2508void
e315cd28 2509qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT
2510{
2511 fc_port_t *fcport;
2512
e315cd28 2513 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2514 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2515 continue;
0d6e61bc 2516
1da177e4
LT
2517 /*
2518 * No point in marking the device as lost, if the device is
2519 * already DEAD.
2520 */
2521 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2522 continue;
e315cd28 2523 if (atomic_read(&fcport->state) == FCS_ONLINE) {
0d6e61bc
AV
2524 if (defer)
2525 qla2x00_schedule_rport_del(vha, fcport, defer);
2526 else if (vha->vp_idx == fcport->vp_idx)
2527 qla2x00_schedule_rport_del(vha, fcport, defer);
2528 }
2529 atomic_set(&fcport->state, FCS_DEVICE_LOST);
1da177e4
LT
2530 }
2531}
2532
2533/*
2534* qla2x00_mem_alloc
2535* Allocates adapter memory.
2536*
2537* Returns:
2538* 0 = success.
e8711085 2539* !0 = failure.
1da177e4 2540*/
e8711085 2541static int
73208dfd
AC
2542qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2543 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT
2544{
2545 char name[16];
1da177e4 2546
e8711085 2547 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2548 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2549 if (!ha->init_cb)
e315cd28 2550 goto fail;
e8711085 2551
e315cd28
AC
2552 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2553 &ha->gid_list_dma, GFP_KERNEL);
2554 if (!ha->gid_list)
e8711085 2555 goto fail_free_init_cb;
1da177e4 2556
e8711085
AV
2557 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2558 if (!ha->srb_mempool)
e315cd28 2559 goto fail_free_gid_list;
e8711085 2560
a9083016
GM
2561 if (IS_QLA82XX(ha)) {
2562 /* Allocate cache for CT6 Ctx. */
2563 if (!ctx_cachep) {
2564 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2565 sizeof(struct ct6_dsd), 0,
2566 SLAB_HWCACHE_ALIGN, NULL);
2567 if (!ctx_cachep)
2568 goto fail_free_gid_list;
2569 }
2570 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2571 ctx_cachep);
2572 if (!ha->ctx_mempool)
2573 goto fail_free_srb_mempool;
2574 }
2575
e8711085
AV
2576 /* Get memory for cached NVRAM */
2577 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2578 if (!ha->nvram)
a9083016 2579 goto fail_free_ctx_mempool;
e8711085 2580
e315cd28
AC
2581 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2582 ha->pdev->device);
2583 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2584 DMA_POOL_SIZE, 8, 0);
2585 if (!ha->s_dma_pool)
2586 goto fail_free_nvram;
2587
bad75002 2588 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM
2589 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2590 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2591 if (!ha->dl_dma_pool) {
2592 qla_printk(KERN_WARNING, ha,
2593 "Memory Allocation failed - dl_dma_pool\n");
2594 goto fail_s_dma_pool;
2595 }
2596
2597 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2598 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2599 if (!ha->fcp_cmnd_dma_pool) {
2600 qla_printk(KERN_WARNING, ha,
2601 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2602 goto fail_dl_dma_pool;
2603 }
2604 }
2605
e8711085
AV
2606 /* Allocate memory for SNS commands */
2607 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2608 /* Get consistent memory allocated for SNS commands */
e8711085 2609 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2610 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2611 if (!ha->sns_cmd)
e315cd28 2612 goto fail_dma_pool;
e8711085 2613 } else {
e315cd28 2614 /* Get consistent memory allocated for MS IOCB */
e8711085 2615 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2616 &ha->ms_iocb_dma);
e8711085 2617 if (!ha->ms_iocb)
e315cd28
AC
2618 goto fail_dma_pool;
2619 /* Get consistent memory allocated for CT SNS commands */
e8711085 2620 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2621 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV
2622 if (!ha->ct_sns)
2623 goto fail_free_ms_iocb;
1da177e4
LT
2624 }
2625
e315cd28 2626 /* Allocate memory for request ring */
73208dfd
AC
2627 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2628 if (!*req) {
e315cd28
AC
2629 DEBUG(printk("Unable to allocate memory for req\n"));
2630 goto fail_req;
2631 }
73208dfd
AC
2632 (*req)->length = req_len;
2633 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2634 ((*req)->length + 1) * sizeof(request_t),
2635 &(*req)->dma, GFP_KERNEL);
2636 if (!(*req)->ring) {
e315cd28
AC
2637 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2638 goto fail_req_ring;
2639 }
2640 /* Allocate memory for response ring */
73208dfd
AC
2641 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2642 if (!*rsp) {
2643 qla_printk(KERN_WARNING, ha,
2644 "Unable to allocate memory for rsp\n");
e315cd28
AC
2645 goto fail_rsp;
2646 }
73208dfd
AC
2647 (*rsp)->hw = ha;
2648 (*rsp)->length = rsp_len;
2649 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2650 ((*rsp)->length + 1) * sizeof(response_t),
2651 &(*rsp)->dma, GFP_KERNEL);
2652 if (!(*rsp)->ring) {
2653 qla_printk(KERN_WARNING, ha,
2654 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC
2655 goto fail_rsp_ring;
2656 }
73208dfd
AC
2657 (*req)->rsp = *rsp;
2658 (*rsp)->req = *req;
2659 /* Allocate memory for NVRAM data for vports */
2660 if (ha->nvram_npiv_size) {
2661 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2662 ha->nvram_npiv_size, GFP_KERNEL);
2663 if (!ha->npiv_info) {
2664 qla_printk(KERN_WARNING, ha,
2665 "Unable to allocate memory for npiv info\n");
2666 goto fail_npiv_info;
2667 }
2668 } else
2669 ha->npiv_info = NULL;
e8711085 2670
b64b0e8f 2671 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2672 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV
2673 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2674 &ha->ex_init_cb_dma);
2675 if (!ha->ex_init_cb)
2676 goto fail_ex_init_cb;
2677 }
2678
a9083016
GM
2679 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2680
5ff1d584
AV
2681 /* Get consistent memory allocated for Async Port-Database. */
2682 if (!IS_FWI2_CAPABLE(ha)) {
2683 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2684 &ha->async_pd_dma);
2685 if (!ha->async_pd)
2686 goto fail_async_pd;
2687 }
2688
e315cd28
AC
2689 INIT_LIST_HEAD(&ha->vp_list);
2690 return 1;
2691
5ff1d584
AV
2692fail_async_pd:
2693 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV
2694fail_ex_init_cb:
2695 kfree(ha->npiv_info);
73208dfd
AC
2696fail_npiv_info:
2697 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2698 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2699 (*rsp)->ring = NULL;
2700 (*rsp)->dma = 0;
e315cd28 2701fail_rsp_ring:
73208dfd 2702 kfree(*rsp);
e315cd28 2703fail_rsp:
73208dfd
AC
2704 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2705 sizeof(request_t), (*req)->ring, (*req)->dma);
2706 (*req)->ring = NULL;
2707 (*req)->dma = 0;
e315cd28 2708fail_req_ring:
73208dfd 2709 kfree(*req);
e315cd28
AC
2710fail_req:
2711 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2712 ha->ct_sns, ha->ct_sns_dma);
2713 ha->ct_sns = NULL;
2714 ha->ct_sns_dma = 0;
e8711085
AV
2715fail_free_ms_iocb:
2716 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2717 ha->ms_iocb = NULL;
2718 ha->ms_iocb_dma = 0;
e315cd28 2719fail_dma_pool:
bad75002 2720 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM
2721 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2722 ha->fcp_cmnd_dma_pool = NULL;
2723 }
2724fail_dl_dma_pool:
bad75002 2725 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM
2726 dma_pool_destroy(ha->dl_dma_pool);
2727 ha->dl_dma_pool = NULL;
2728 }
2729fail_s_dma_pool:
e315cd28
AC
2730 dma_pool_destroy(ha->s_dma_pool);
2731 ha->s_dma_pool = NULL;
e8711085
AV
2732fail_free_nvram:
2733 kfree(ha->nvram);
2734 ha->nvram = NULL;
a9083016
GM
2735fail_free_ctx_mempool:
2736 mempool_destroy(ha->ctx_mempool);
2737 ha->ctx_mempool = NULL;
e8711085
AV
2738fail_free_srb_mempool:
2739 mempool_destroy(ha->srb_mempool);
2740 ha->srb_mempool = NULL;
e8711085
AV
2741fail_free_gid_list:
2742 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2743 ha->gid_list_dma);
e8711085
AV
2744 ha->gid_list = NULL;
2745 ha->gid_list_dma = 0;
e315cd28
AC
2746fail_free_init_cb:
2747 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2748 ha->init_cb_dma);
2749 ha->init_cb = NULL;
2750 ha->init_cb_dma = 0;
e8711085 2751fail:
e315cd28 2752 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2753 return -ENOMEM;
1da177e4
LT
2754}
2755
2756/*
2757* qla2x00_mem_free
2758* Frees all adapter allocated memory.
2759*
2760* Input:
2761* ha = adapter block pointer.
2762*/
a824ebb3 2763static void
e315cd28 2764qla2x00_mem_free(struct qla_hw_data *ha)
1da177e4 2765{
e8711085
AV
2766 if (ha->srb_mempool)
2767 mempool_destroy(ha->srb_mempool);
1da177e4 2768
df613b96
AV
2769 if (ha->fce)
2770 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e315cd28 2771 ha->fce_dma);
df613b96 2772
a7a167bf
AV
2773 if (ha->fw_dump) {
2774 if (ha->eft)
2775 dma_free_coherent(&ha->pdev->dev,
e315cd28 2776 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV
2777 vfree(ha->fw_dump);
2778 }
2779
11bbc1d8
AV
2780 if (ha->dcbx_tlv)
2781 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2782 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2783
ce0423f4
AV
2784 if (ha->xgmac_data)
2785 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2786 ha->xgmac_data, ha->xgmac_data_dma);
2787
1da177e4
LT
2788 if (ha->sns_cmd)
2789 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2790 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT
2791
2792 if (ha->ct_sns)
2793 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2794 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2795
88729e53
AV
2796 if (ha->sfp_data)
2797 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2798
ad0ecd61
JC
2799 if (ha->edc_data)
2800 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2801
1da177e4
LT
2802 if (ha->ms_iocb)
2803 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2804
b64b0e8f 2805 if (ha->ex_init_cb)
a9083016
GM
2806 dma_pool_free(ha->s_dma_pool,
2807 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2808
5ff1d584
AV
2809 if (ha->async_pd)
2810 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2811
1da177e4
LT
2812 if (ha->s_dma_pool)
2813 dma_pool_destroy(ha->s_dma_pool);
2814
1da177e4
LT
2815 if (ha->gid_list)
2816 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2817 ha->gid_list_dma);
1da177e4 2818
a9083016
GM
2819 if (IS_QLA82XX(ha)) {
2820 if (!list_empty(&ha->gbl_dsd_list)) {
2821 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2822
2823 /* clean up allocated prev pool */
2824 list_for_each_entry_safe(dsd_ptr,
2825 tdsd_ptr, &ha->gbl_dsd_list, list) {
2826 dma_pool_free(ha->dl_dma_pool,
2827 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2828 list_del(&dsd_ptr->list);
2829 kfree(dsd_ptr);
2830 }
2831 }
2832 }
2833
2834 if (ha->dl_dma_pool)
2835 dma_pool_destroy(ha->dl_dma_pool);
2836
2837 if (ha->fcp_cmnd_dma_pool)
2838 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2839
2840 if (ha->ctx_mempool)
2841 mempool_destroy(ha->ctx_mempool);
2842
e315cd28
AC
2843 if (ha->init_cb)
2844 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2845 ha->init_cb, ha->init_cb_dma);
e315cd28
AC
2846 vfree(ha->optrom_buffer);
2847 kfree(ha->nvram);
73208dfd 2848 kfree(ha->npiv_info);
1da177e4 2849
e8711085 2850 ha->srb_mempool = NULL;
a9083016 2851 ha->ctx_mempool = NULL;
a7a167bf
AV
2852 ha->eft = NULL;
2853 ha->eft_dma = 0;
1da177e4
LT
2854 ha->sns_cmd = NULL;
2855 ha->sns_cmd_dma = 0;
2856 ha->ct_sns = NULL;
2857 ha->ct_sns_dma = 0;
2858 ha->ms_iocb = NULL;
2859 ha->ms_iocb_dma = 0;
1da177e4
LT
2860 ha->init_cb = NULL;
2861 ha->init_cb_dma = 0;
b64b0e8f
AV
2862 ha->ex_init_cb = NULL;
2863 ha->ex_init_cb_dma = 0;
5ff1d584
AV
2864 ha->async_pd = NULL;
2865 ha->async_pd_dma = 0;
1da177e4
LT
2866
2867 ha->s_dma_pool = NULL;
a9083016
GM
2868 ha->dl_dma_pool = NULL;
2869 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2870
1da177e4
LT
2871 ha->gid_list = NULL;
2872 ha->gid_list_dma = 0;
2873
e315cd28
AC
2874 ha->fw_dump = NULL;
2875 ha->fw_dumped = 0;
2876 ha->fw_dump_reading = 0;
e315cd28 2877}
1da177e4 2878
e315cd28
AC
2879struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2880 struct qla_hw_data *ha)
2881{
2882 struct Scsi_Host *host;
2883 struct scsi_qla_host *vha = NULL;
854165f4 2884
e315cd28
AC
2885 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2886 if (host == NULL) {
2887 printk(KERN_WARNING
2888 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2889 goto fail;
2890 }
2891
2892 /* Clear our data area */
2893 vha = shost_priv(host);
2894 memset(vha, 0, sizeof(scsi_qla_host_t));
2895
2896 vha->host = host;
2897 vha->host_no = host->host_no;
2898 vha->hw = ha;
2899
2900 INIT_LIST_HEAD(&vha->vp_fcports);
2901 INIT_LIST_HEAD(&vha->work_list);
2902 INIT_LIST_HEAD(&vha->list);
2903
f999f4c1
AV
2904 spin_lock_init(&vha->work_lock);
2905
e315cd28
AC
2906 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
2907 return vha;
2908
2909fail:
2910 return vha;
1da177e4
LT
2911}
2912
01ef66bb 2913static struct qla_work_evt *
f999f4c1 2914qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV
2915{
2916 struct qla_work_evt *e;
2917
f999f4c1 2918 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
0971de7f
AV
2919 if (!e)
2920 return NULL;
2921
2922 INIT_LIST_HEAD(&e->list);
2923 e->type = type;
2924 e->flags = QLA_EVT_FLAG_FREE;
2925 return e;
2926}
2927
01ef66bb 2928static int
f999f4c1 2929qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 2930{
f999f4c1 2931 unsigned long flags;
0971de7f 2932
f999f4c1 2933 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 2934 list_add_tail(&e->list, &vha->work_list);
f999f4c1 2935 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 2936 qla2xxx_wake_dpc(vha);
f999f4c1 2937
0971de7f
AV
2938 return QLA_SUCCESS;
2939}
2940
2941int
e315cd28 2942qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV
2943 u32 data)
2944{
2945 struct qla_work_evt *e;
2946
f999f4c1 2947 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV
2948 if (!e)
2949 return QLA_FUNCTION_FAILED;
2950
2951 e->u.aen.code = code;
2952 e->u.aen.data = data;
f999f4c1 2953 return qla2x00_post_work(vha, e);
0971de7f
AV
2954}
2955
8a659571
AV
2956int
2957qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
2958{
2959 struct qla_work_evt *e;
2960
f999f4c1 2961 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV
2962 if (!e)
2963 return QLA_FUNCTION_FAILED;
2964
2965 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 2966 return qla2x00_post_work(vha, e);
8a659571
AV
2967}
2968
ac280b67
AV
2969#define qla2x00_post_async_work(name, type) \
2970int qla2x00_post_async_##name##_work( \
2971 struct scsi_qla_host *vha, \
2972 fc_port_t *fcport, uint16_t *data) \
2973{ \
2974 struct qla_work_evt *e; \
2975 \
2976 e = qla2x00_alloc_work(vha, type); \
2977 if (!e) \
2978 return QLA_FUNCTION_FAILED; \
2979 \
2980 e->u.logio.fcport = fcport; \
2981 if (data) { \
2982 e->u.logio.data[0] = data[0]; \
2983 e->u.logio.data[1] = data[1]; \
2984 } \
2985 return qla2x00_post_work(vha, e); \
2986}
2987
2988qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
2989qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
2990qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
2991qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV
2992qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
2993qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 2994
3420d36c
AV
2995int
2996qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
2997{
2998 struct qla_work_evt *e;
2999
3000 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3001 if (!e)
3002 return QLA_FUNCTION_FAILED;
3003
3004 e->u.uevent.code = code;
3005 return qla2x00_post_work(vha, e);
3006}
3007
3008static void
3009qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3010{
3011 char event_string[40];
3012 char *envp[] = { event_string, NULL };
3013
3014 switch (code) {
3015 case QLA_UEVENT_CODE_FW_DUMP:
3016 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3017 vha->host_no);
3018 break;
3019 default:
3020 /* do nothing */
3021 break;
3022 }
3023 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3024}
3025
ac280b67 3026void
e315cd28 3027qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3028{
f999f4c1
AV
3029 struct qla_work_evt *e, *tmp;
3030 unsigned long flags;
3031 LIST_HEAD(work);
0971de7f 3032
f999f4c1
AV
3033 spin_lock_irqsave(&vha->work_lock, flags);
3034 list_splice_init(&vha->work_list, &work);
3035 spin_unlock_irqrestore(&vha->work_lock, flags);
3036
3037 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3038 list_del_init(&e->list);
0971de7f
AV
3039
3040 switch (e->type) {
3041 case QLA_EVT_AEN:
e315cd28 3042 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV
3043 e->u.aen.code, e->u.aen.data);
3044 break;
8a659571
AV
3045 case QLA_EVT_IDC_ACK:
3046 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3047 break;
ac280b67
AV
3048 case QLA_EVT_ASYNC_LOGIN:
3049 qla2x00_async_login(vha, e->u.logio.fcport,
3050 e->u.logio.data);
3051 break;
3052 case QLA_EVT_ASYNC_LOGIN_DONE:
3053 qla2x00_async_login_done(vha, e->u.logio.fcport,
3054 e->u.logio.data);
3055 break;
3056 case QLA_EVT_ASYNC_LOGOUT:
3057 qla2x00_async_logout(vha, e->u.logio.fcport);
3058 break;
3059 case QLA_EVT_ASYNC_LOGOUT_DONE:
3060 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3061 e->u.logio.data);
3062 break;
5ff1d584
AV
3063 case QLA_EVT_ASYNC_ADISC:
3064 qla2x00_async_adisc(vha, e->u.logio.fcport,
3065 e->u.logio.data);
3066 break;
3067 case QLA_EVT_ASYNC_ADISC_DONE:
3068 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3069 e->u.logio.data);
3070 break;
3420d36c
AV
3071 case QLA_EVT_UEVENT:
3072 qla2x00_uevent_emit(vha, e->u.uevent.code);
3073 break;
0971de7f
AV
3074 }
3075 if (e->flags & QLA_EVT_FLAG_FREE)
3076 kfree(e);
e315cd28 3077 }
e315cd28 3078}
f999f4c1 3079
e315cd28
AC
3080/* Relogins all the fcports of a vport
3081 * Context: dpc thread
3082 */
3083void qla2x00_relogin(struct scsi_qla_host *vha)
3084{
3085 fc_port_t *fcport;
c6b2fca8 3086 int status;
e315cd28
AC
3087 uint16_t next_loopid = 0;
3088 struct qla_hw_data *ha = vha->hw;
ac280b67 3089 uint16_t data[2];
e315cd28
AC
3090
3091 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3092 /*
3093 * If the port is not ONLINE then try to login
3094 * to it if we haven't run out of retries.
3095 */
5ff1d584
AV
3096 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3097 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3098 fcport->login_retry--;
e315cd28 3099 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3100 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC
3101 ha->isp_ops->fabric_logout(vha,
3102 fcport->loop_id,
3103 fcport->d_id.b.domain,
3104 fcport->d_id.b.area,
3105 fcport->d_id.b.al_pa);
3106
ac280b67 3107 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3108 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV
3109 data[0] = 0;
3110 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3111 status = qla2x00_post_async_login_work(
3112 vha, fcport, data);
3113 if (status == QLA_SUCCESS)
3114 continue;
3115 /* Attempt a retry. */
3116 status = 1;
3117 } else
3118 status = qla2x00_fabric_login(vha,
3119 fcport, &next_loopid);
e315cd28
AC
3120 } else
3121 status = qla2x00_local_device_login(vha,
3122 fcport);
3123
e315cd28
AC
3124 if (status == QLA_SUCCESS) {
3125 fcport->old_loop_id = fcport->loop_id;
3126
3127 DEBUG(printk("scsi(%ld): port login OK: logged "
3128 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3129
3130 qla2x00_update_fcport(vha, fcport);
3131
3132 } else if (status == 1) {
3133 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3134 /* retry the login again */
3135 DEBUG(printk("scsi(%ld): Retrying"
3136 " %d login again loop_id 0x%x\n",
3137 vha->host_no, fcport->login_retry,
3138 fcport->loop_id));
3139 } else {
3140 fcport->login_retry = 0;
3141 }
3142
3143 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3144 fcport->loop_id = FC_NO_LOOP_ID;
3145 }
3146 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3147 break;
0971de7f 3148 }
0971de7f
AV
3149}
3150
1da177e4
LT
3151/**************************************************************************
3152* qla2x00_do_dpc
3153* This kernel thread is a task that is schedule by the interrupt handler
3154* to perform the background processing for interrupts.
3155*
3156* Notes:
3157* This task always run in the context of a kernel thread. It
3158* is kick-off by the driver's detect code and starts up
3159* up one per adapter. It immediately goes to sleep and waits for
3160* some fibre event. When either the interrupt handler or
3161* the timer routine detects a event it will one of the task
3162* bits then wake us up.
3163**************************************************************************/
3164static int
3165qla2x00_do_dpc(void *data)
3166{
2c3dfe3f 3167 int rval;
e315cd28
AC
3168 scsi_qla_host_t *base_vha;
3169 struct qla_hw_data *ha;
1da177e4 3170
e315cd28
AC
3171 ha = (struct qla_hw_data *)data;
3172 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3173
1da177e4
LT
3174 set_user_nice(current, -20);
3175
39a11240 3176 while (!kthread_should_stop()) {
1da177e4
LT
3177 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3178
39a11240
CH
3179 set_current_state(TASK_INTERRUPTIBLE);
3180 schedule();
3181 __set_current_state(TASK_RUNNING);
1da177e4
LT
3182
3183 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3184
3185 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3186 if (!base_vha->flags.init_done)
1da177e4
LT
3187 continue;
3188
85880801
AV
3189 if (ha->flags.eeh_busy) {
3190 DEBUG17(qla_printk(KERN_WARNING, ha,
3191 "qla2x00_do_dpc: dpc_flags: %lx\n",
3192 base_vha->dpc_flags));
3193 continue;
3194 }
3195
e315cd28 3196 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT
3197
3198 ha->dpc_active = 1;
3199
1da177e4 3200 if (ha->flags.mbox_busy) {
1da177e4
LT
3201 ha->dpc_active = 0;
3202 continue;
3203 }
3204
e315cd28 3205 qla2x00_do_work(base_vha);
0971de7f 3206
a9083016
GM
3207 if (IS_QLA82XX(ha)) {
3208 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3209 &base_vha->dpc_flags)) {
3210 qla82xx_idc_lock(ha);
3211 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3212 QLA82XX_DEV_FAILED);
3213 qla82xx_idc_unlock(ha);
3214 qla_printk(KERN_INFO, ha,
3215 "HW State: FAILED\n");
3216 qla82xx_device_state_handler(base_vha);
3217 continue;
3218 }
3219
3220 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3221 &base_vha->dpc_flags)) {
3222
3223 DEBUG(printk(KERN_INFO
3224 "scsi(%ld): dpc: sched "
3225 "qla82xx_fcoe_ctx_reset ha = %p\n",
3226 base_vha->host_no, ha));
3227 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3228 &base_vha->dpc_flags))) {
3229 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3230 /* FCoE-ctx reset failed.
3231 * Escalate to chip-reset
3232 */
3233 set_bit(ISP_ABORT_NEEDED,
3234 &base_vha->dpc_flags);
3235 }
3236 clear_bit(ABORT_ISP_ACTIVE,
3237 &base_vha->dpc_flags);
3238 }
3239
3240 DEBUG(printk("scsi(%ld): dpc:"
3241 " qla82xx_fcoe_ctx_reset end\n",
3242 base_vha->host_no));
3243 }
3244 }
3245
e315cd28
AC
3246 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3247 &base_vha->dpc_flags)) {
1da177e4
LT
3248
3249 DEBUG(printk("scsi(%ld): dpc: sched "
3250 "qla2x00_abort_isp ha = %p\n",
e315cd28 3251 base_vha->host_no, ha));
1da177e4 3252 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3253 &base_vha->dpc_flags))) {
1da177e4 3254
a9083016 3255 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT
3256 /* failed. retry later */
3257 set_bit(ISP_ABORT_NEEDED,
e315cd28 3258 &base_vha->dpc_flags);
99363ef8 3259 }
e315cd28
AC
3260 clear_bit(ABORT_ISP_ACTIVE,
3261 &base_vha->dpc_flags);
99363ef8
SJ
3262 }
3263
1da177e4 3264 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3265 base_vha->host_no));
1da177e4
LT
3266 }
3267
e315cd28
AC
3268 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3269 qla2x00_update_fcports(base_vha);
3270 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3271 }
d97994dc 3272
e315cd28
AC
3273 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3274 &base_vha->dpc_flags) &&
3275 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT
3276
3277 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3278 base_vha->host_no));
1da177e4 3279
e315cd28
AC
3280 qla2x00_rst_aen(base_vha);
3281 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT
3282 }
3283
3284 /* Retry each device up to login retry count */
e315cd28
AC
3285 if ((test_and_clear_bit(RELOGIN_NEEDED,
3286 &base_vha->dpc_flags)) &&
3287 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3288 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT
3289
3290 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC
3291 base_vha->host_no));
3292 qla2x00_relogin(base_vha);
3293
1da177e4 3294 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3295 base_vha->host_no));
1da177e4
LT
3296 }
3297
e315cd28
AC
3298 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3299 &base_vha->dpc_flags)) {
1da177e4
LT
3300
3301 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3302 base_vha->host_no));
1da177e4
LT
3303
3304 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3305 &base_vha->dpc_flags))) {
1da177e4 3306
e315cd28 3307 rval = qla2x00_loop_resync(base_vha);
1da177e4 3308
e315cd28
AC
3309 clear_bit(LOOP_RESYNC_ACTIVE,
3310 &base_vha->dpc_flags);
1da177e4
LT
3311 }
3312
3313 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3314 base_vha->host_no));
1da177e4
LT
3315 }
3316
e315cd28
AC
3317 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3318 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3319 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3320 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV
3321 }
3322
1da177e4 3323 if (!ha->interrupts_on)
fd34f556 3324 ha->isp_ops->enable_intrs(ha);
1da177e4 3325
e315cd28
AC
3326 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3327 &base_vha->dpc_flags))
3328 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3329
e315cd28 3330 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3331
1da177e4
LT
3332 ha->dpc_active = 0;
3333 } /* End of while(1) */
3334
e315cd28 3335 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT
3336
3337 /*
3338 * Make sure that nobody tries to wake us up again.
3339 */
1da177e4
LT
3340 ha->dpc_active = 0;
3341
ac280b67
AV
3342 /* Cleanup any residual CTX SRBs. */
3343 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3344
39a11240
CH
3345 return 0;
3346}
3347
3348void
e315cd28 3349qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3350{
e315cd28 3351 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV
3352 struct task_struct *t = ha->dpc_thread;
3353
e315cd28 3354 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3355 wake_up_process(t);
1da177e4
LT
3356}
3357
1da177e4
LT
3358/*
3359* qla2x00_rst_aen
3360* Processes asynchronous reset.
3361*
3362* Input:
3363* ha = adapter block pointer.
3364*/
3365static void
e315cd28 3366qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3367{
e315cd28
AC
3368 if (vha->flags.online && !vha->flags.reset_active &&
3369 !atomic_read(&vha->loop_down_timer) &&
3370 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3371 do {
e315cd28 3372 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT
3373
3374 /*
3375 * Issue marker command only when we are going to start
3376 * the I/O.
3377 */
e315cd28
AC
3378 vha->marker_needed = 1;
3379 } while (!atomic_read(&vha->loop_down_timer) &&
3380 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT
3381 }
3382}
3383
f4f051eb 3384static void
e315cd28 3385qla2x00_sp_free_dma(srb_t *sp)
f4f051eb 3386{
3387 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3388 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb 3389
3390 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3391 scsi_dma_unmap(cmd);
f4f051eb 3392 sp->flags &= ~SRB_DMA_VALID;
3393 }
bad75002
AE
3394
3395 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3396 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3397 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3398 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3399 }
3400
3401 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3402 /* List assured to be having elements */
3403 qla2x00_clean_dsd_pool(ha, sp);
3404 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3405 }
3406
3407 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3408 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3409 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3410 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3411 }
3412
fca29703 3413 CMD_SP(cmd) = NULL;
f4f051eb 3414}
3415
3416void
73208dfd 3417qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb 3418{
3419 struct scsi_cmnd *cmd = sp->cmd;
3420
e315cd28 3421 qla2x00_sp_free_dma(sp);
f4f051eb 3422
a9083016
GM
3423 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3424 struct ct6_dsd *ctx = sp->ctx;
3425 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3426 ctx->fcp_cmnd_dma);
3427 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3428 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3429 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3430 mempool_free(sp->ctx, ha->ctx_mempool);
3431 sp->ctx = NULL;
3432 }
f4f051eb 3433
a9083016 3434 mempool_free(sp, ha->srb_mempool);
f4f051eb 3435 cmd->scsi_done(cmd);
3436}
bdf79621 3437
1da177e4
LT
3438/**************************************************************************
3439* qla2x00_timer
3440*
3441* Description:
3442* One second timer
3443*
3444* Context: Interrupt
3445***************************************************************************/
2c3dfe3f 3446void
e315cd28 3447qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3448{
1da177e4
LT
3449 unsigned long cpu_flags = 0;
3450 fc_port_t *fcport;
1da177e4
LT
3451 int start_dpc = 0;
3452 int index;
3453 srb_t *sp;
f4f051eb 3454 int t;
85880801 3455 uint16_t w;
e315cd28 3456 struct qla_hw_data *ha = vha->hw;
73208dfd 3457 struct req_que *req;
85880801 3458
a9083016
GM
3459 if (IS_QLA82XX(ha))
3460 qla82xx_watchdog(vha);
3461
85880801
AV
3462 /* Hardware read to raise pending EEH errors during mailbox waits. */
3463 if (!pci_channel_offline(ha->pdev))
3464 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4
LT
3465 /*
3466 * Ports - Port down timer.
3467 *
3468 * Whenever, a port is in the LOST state we start decrementing its port
3469 * down timer every second until it reaches zero. Once it reaches zero
fa2a1ce5 3470 * the port it marked DEAD.
1da177e4
LT
3471 */
3472 t = 0;
e315cd28 3473 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT
3474 if (fcport->port_type != FCT_TARGET)
3475 continue;
3476
3477 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
3478
3479 if (atomic_read(&fcport->port_down_timer) == 0)
3480 continue;
3481
fa2a1ce5 3482 if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
1da177e4 3483 atomic_set(&fcport->state, FCS_DEVICE_DEAD);
fa2a1ce5 3484
1da177e4 3485 DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
fca29703 3486 "%d remaining\n",
e315cd28 3487 vha->host_no,
1da177e4
LT
3488 t, atomic_read(&fcport->port_down_timer)));
3489 }
3490 t++;
3491 } /* End of for fcport */
3492
1da177e4
LT
3493
3494 /* Loop down handler. */
e315cd28
AC
3495 if (atomic_read(&vha->loop_down_timer) > 0 &&
3496 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
3497 && vha->flags.online) {
1da177e4 3498
e315cd28
AC
3499 if (atomic_read(&vha->loop_down_timer) ==
3500 vha->loop_down_abort_time) {
1da177e4
LT
3501
3502 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3503 "queues before time expire\n",
e315cd28 3504 vha->host_no));
1da177e4 3505
e315cd28
AC
3506 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3507 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3508
f08b7251
AV
3509 /*
3510 * Schedule an ISP abort to return any FCP2-device
3511 * commands.
3512 */
2c3dfe3f 3513 /* NPIV - scan physical port only */
e315cd28 3514 if (!vha->vp_idx) {
2c3dfe3f
SJ
3515 spin_lock_irqsave(&ha->hardware_lock,
3516 cpu_flags);
73208dfd 3517 req = ha->req_q_map[0];
2c3dfe3f
SJ
3518 for (index = 1;
3519 index < MAX_OUTSTANDING_COMMANDS;
3520 index++) {
3521 fc_port_t *sfcp;
3522
e315cd28 3523 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ
3524 if (!sp)
3525 continue;
bad75002 3526 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3527 continue;
2c3dfe3f 3528 sfcp = sp->fcport;
f08b7251 3529 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3530 continue;
bdf79621 3531
2c3dfe3f 3532 set_bit(ISP_ABORT_NEEDED,
e315cd28 3533 &vha->dpc_flags);
2c3dfe3f
SJ
3534 break;
3535 }
3536 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3537 cpu_flags);
1da177e4 3538 }
1da177e4
LT
3539 start_dpc++;
3540 }
3541
3542 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3543 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3544 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT
3545 DEBUG(printk("scsi(%ld): Loop down - "
3546 "aborting ISP.\n",
e315cd28 3547 vha->host_no));
1da177e4
LT
3548 qla_printk(KERN_WARNING, ha,
3549 "Loop down - aborting ISP.\n");
3550
e315cd28 3551 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
3552 }
3553 }
fca29703 3554 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC
3555 vha->host_no,
3556 atomic_read(&vha->loop_down_timer)));
1da177e4
LT
3557 }
3558
f6df144c 3559 /* Check if beacon LED needs to be blinked */
3560 if (ha->beacon_blink_led == 1) {
e315cd28 3561 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c 3562 start_dpc++;
3563 }
3564
550bf57d 3565 /* Process any deferred work. */
e315cd28 3566 if (!list_empty(&vha->work_list))
550bf57d
AV
3567 start_dpc++;
3568
1da177e4 3569 /* Schedule the DPC routine if needed */
e315cd28
AC
3570 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3571 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3572 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3573 start_dpc ||
e315cd28
AC
3574 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3575 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM
3576 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3577 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC
3578 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3579 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3580 qla2xxx_wake_dpc(vha);
1da177e4 3581
e315cd28 3582 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT
3583}
3584
5433383e
AV
3585/* Firmware interface routines. */
3586
a9083016 3587#define FW_BLOBS 8
5433383e
AV
3588#define FW_ISP21XX 0
3589#define FW_ISP22XX 1
3590#define FW_ISP2300 2
3591#define FW_ISP2322 3
48c02fde 3592#define FW_ISP24XX 4
c3a2f0df 3593#define FW_ISP25XX 5
3a03eb79 3594#define FW_ISP81XX 6
a9083016 3595#define FW_ISP82XX 7
5433383e 3596
bb8ee499
AV
3597#define FW_FILE_ISP21XX "ql2100_fw.bin"
3598#define FW_FILE_ISP22XX "ql2200_fw.bin"
3599#define FW_FILE_ISP2300 "ql2300_fw.bin"
3600#define FW_FILE_ISP2322 "ql2322_fw.bin"
3601#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3602#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3603#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3604#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3605
e1e82b6f 3606static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV
3607
3608static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV
3609 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3610 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3611 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3612 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3613 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3614 { .name = FW_FILE_ISP25XX, },
3a03eb79 3615 { .name = FW_FILE_ISP81XX, },
a9083016 3616 { .name = FW_FILE_ISP82XX, },
5433383e
AV
3617};
3618
3619struct fw_blob *
e315cd28 3620qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3621{
e315cd28 3622 struct qla_hw_data *ha = vha->hw;
5433383e
AV
3623 struct fw_blob *blob;
3624
3625 blob = NULL;
3626 if (IS_QLA2100(ha)) {
3627 blob = &qla_fw_blobs[FW_ISP21XX];
3628 } else if (IS_QLA2200(ha)) {
3629 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3630 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3631 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3632 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3633 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3634 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3635 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV
3636 } else if (IS_QLA25XX(ha)) {
3637 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV
3638 } else if (IS_QLA81XX(ha)) {
3639 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM
3640 } else if (IS_QLA82XX(ha)) {
3641 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV
3642 }
3643
e1e82b6f 3644 mutex_lock(&qla_fw_lock);
5433383e
AV
3645 if (blob->fw)
3646 goto out;
3647
3648 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3649 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3650 "(%s).\n", vha->host_no, blob->name));
5433383e
AV
3651 blob->fw = NULL;
3652 blob = NULL;
3653 goto out;
3654 }
3655
3656out:
e1e82b6f 3657 mutex_unlock(&qla_fw_lock);
5433383e
AV
3658 return blob;
3659}
3660
3661static void
3662qla2x00_release_firmware(void)
3663{
3664 int idx;
3665
e1e82b6f 3666 mutex_lock(&qla_fw_lock);
5433383e
AV
3667 for (idx = 0; idx < FW_BLOBS; idx++)
3668 if (qla_fw_blobs[idx].fw)
3669 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3670 mutex_unlock(&qla_fw_lock);
5433383e
AV
3671}
3672
14e660e6
SJ
3673static pci_ers_result_t
3674qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3675{
85880801
AV
3676 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3677 struct qla_hw_data *ha = vha->hw;
3678
3679 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3680 state));
b9b12f73 3681
14e660e6
SJ
3682 switch (state) {
3683 case pci_channel_io_normal:
85880801 3684 ha->flags.eeh_busy = 0;
14e660e6
SJ
3685 return PCI_ERS_RESULT_CAN_RECOVER;
3686 case pci_channel_io_frozen:
85880801 3687 ha->flags.eeh_busy = 1;
90a86fc0 3688 qla2x00_free_irqs(vha);
14e660e6
SJ
3689 pci_disable_device(pdev);
3690 return PCI_ERS_RESULT_NEED_RESET;
3691 case pci_channel_io_perm_failure:
85880801
AV
3692 ha->flags.pci_channel_io_perm_failure = 1;
3693 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ
3694 return PCI_ERS_RESULT_DISCONNECT;
3695 }
3696 return PCI_ERS_RESULT_NEED_RESET;
3697}
3698
3699static pci_ers_result_t
3700qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3701{
3702 int risc_paused = 0;
3703 uint32_t stat;
3704 unsigned long flags;
e315cd28
AC
3705 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3706 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ
3707 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3708 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3709
3710 spin_lock_irqsave(&ha->hardware_lock, flags);
3711 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3712 stat = RD_REG_DWORD(&reg->hccr);
3713 if (stat & HCCR_RISC_PAUSE)
3714 risc_paused = 1;
3715 } else if (IS_QLA23XX(ha)) {
3716 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3717 if (stat & HSR_RISC_PAUSED)
3718 risc_paused = 1;
3719 } else if (IS_FWI2_CAPABLE(ha)) {
3720 stat = RD_REG_DWORD(&reg24->host_status);
3721 if (stat & HSRX_RISC_PAUSED)
3722 risc_paused = 1;
3723 }
3724 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3725
3726 if (risc_paused) {
3727 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3728 "Dumping firmware!\n");
e315cd28 3729 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ
3730
3731 return PCI_ERS_RESULT_NEED_RESET;
3732 } else
3733 return PCI_ERS_RESULT_RECOVERED;
3734}
3735
3736static pci_ers_result_t
3737qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3738{
3739 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC
3740 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3741 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC
3742 struct rsp_que *rsp;
3743 int rc, retries = 10;
09483916 3744
85880801
AV
3745 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3746
90a86fc0
JC
3747 /* Workaround: qla2xxx driver which access hardware earlier
3748 * needs error state to be pci_channel_io_online.
3749 * Otherwise mailbox command timesout.
3750 */
3751 pdev->error_state = pci_channel_io_normal;
3752
3753 pci_restore_state(pdev);
3754
8c1496bd
RL
3755 /* pci_restore_state() clears the saved_state flag of the device
3756 * save restored state which resets saved_state flag
3757 */
3758 pci_save_state(pdev);
3759
09483916
BH
3760 if (ha->mem_only)
3761 rc = pci_enable_device_mem(pdev);
3762 else
3763 rc = pci_enable_device(pdev);
14e660e6 3764
09483916 3765 if (rc) {
14e660e6
SJ
3766 qla_printk(KERN_WARNING, ha,
3767 "Can't re-enable PCI device after reset.\n");
14e660e6
SJ
3768 return ret;
3769 }
14e660e6 3770
90a86fc0
JC
3771 rsp = ha->rsp_q_map[0];
3772 if (qla2x00_request_irqs(ha, rsp))
3773 return ret;
3774
e315cd28 3775 if (ha->isp_ops->pci_config(base_vha))
14e660e6
SJ
3776 return ret;
3777
90a86fc0
JC
3778 while (ha->flags.mbox_busy && retries--)
3779 msleep(1000);
85880801 3780
e315cd28 3781 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 3782 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 3783 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 3784 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 3785
90a86fc0 3786
85880801
AV
3787 DEBUG17(qla_printk(KERN_WARNING, ha,
3788 "slot_reset-return:ret=%x\n", ret));
3789
14e660e6
SJ
3790 return ret;
3791}
3792
3793static void
3794qla2xxx_pci_resume(struct pci_dev *pdev)
3795{
e315cd28
AC
3796 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3797 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ
3798 int ret;
3799
85880801
AV
3800 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
3801
e315cd28 3802 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ
3803 if (ret != QLA_SUCCESS) {
3804 qla_printk(KERN_ERR, ha,
3805 "the device failed to resume I/O "
3806 "from slot/link_reset");
3807 }
85880801 3808
3e46f031
LC
3809 pci_cleanup_aer_uncorrect_error_status(pdev);
3810
85880801 3811 ha->flags.eeh_busy = 0;
14e660e6
SJ
3812}
3813
3814static struct pci_error_handlers qla2xxx_err_handler = {
3815 .error_detected = qla2xxx_pci_error_detected,
3816 .mmio_enabled = qla2xxx_pci_mmio_enabled,
3817 .slot_reset = qla2xxx_pci_slot_reset,
3818 .resume = qla2xxx_pci_resume,
3819};
3820
5433383e 3821static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV
3822 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
3823 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
3824 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
3825 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
3826 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
3827 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
3828 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
3829 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
3830 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 3831 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV
3832 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
3833 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 3834 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 3835 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 3836 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV
3837 { 0 },
3838};
3839MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
3840
fca29703 3841static struct pci_driver qla2xxx_pci_driver = {
cb63067a 3842 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB
3843 .driver = {
3844 .owner = THIS_MODULE,
3845 },
fca29703 3846 .id_table = qla2xxx_pci_tbl,
7ee61397 3847 .probe = qla2x00_probe_one,
4c993f76 3848 .remove = qla2x00_remove_one,
14e660e6 3849 .err_handler = &qla2xxx_err_handler,
fca29703
AV
3850};
3851
6a03b4cd
HZ
3852static struct file_operations apidev_fops = {
3853 .owner = THIS_MODULE,
3854};
3855
1da177e4
LT
3856/**
3857 * qla2x00_module_init - Module initialization.
3858 **/
3859static int __init
3860qla2x00_module_init(void)
3861{
fca29703
AV
3862 int ret = 0;
3863
1da177e4 3864 /* Allocate cache for SRBs. */
354d6b21 3865 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 3866 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT
3867 if (srb_cachep == NULL) {
3868 printk(KERN_ERR
3869 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
3870 return -ENOMEM;
3871 }
3872
3873 /* Derive version string. */
3874 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 3875 if (ql2xextended_error_logging)
0181944f
AV
3876 strcat(qla2x00_version_str, "-debug");
3877
1c97a12a
AV
3878 qla2xxx_transport_template =
3879 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ
3880 if (!qla2xxx_transport_template) {
3881 kmem_cache_destroy(srb_cachep);
1da177e4 3882 return -ENODEV;
2c3dfe3f 3883 }
6a03b4cd
HZ
3884
3885 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
3886 if (apidev_major < 0) {
3887 printk(KERN_WARNING "qla2xxx: Unable to register char device "
3888 "%s\n", QLA2XXX_APIDEV);
3889 }
3890
2c3dfe3f
SJ
3891 qla2xxx_transport_vport_template =
3892 fc_attach_transport(&qla2xxx_transport_vport_functions);
3893 if (!qla2xxx_transport_vport_template) {
3894 kmem_cache_destroy(srb_cachep);
3895 fc_release_transport(qla2xxx_transport_template);
1da177e4 3896 return -ENODEV;
2c3dfe3f 3897 }
1da177e4 3898
fd9a29f0
AV
3899 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
3900 qla2x00_version_str);
7ee61397 3901 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV
3902 if (ret) {
3903 kmem_cache_destroy(srb_cachep);
3904 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 3905 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV
3906 }
3907 return ret;
1da177e4
LT
3908}
3909
3910/**
3911 * qla2x00_module_exit - Module cleanup.
3912 **/
3913static void __exit
3914qla2x00_module_exit(void)
3915{
6a03b4cd 3916 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 3917 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 3918 qla2x00_release_firmware();
354d6b21 3919 kmem_cache_destroy(srb_cachep);
a9083016
GM
3920 if (ctx_cachep)
3921 kmem_cache_destroy(ctx_cachep);
1da177e4 3922 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 3923 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT
3924}
3925
3926module_init(qla2x00_module_init);
3927module_exit(qla2x00_module_exit);
3928
3929MODULE_AUTHOR("QLogic Corporation");
3930MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
3931MODULE_LICENSE("GPL");
3932MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV
3933MODULE_FIRMWARE(FW_FILE_ISP21XX);
3934MODULE_FIRMWARE(FW_FILE_ISP22XX);
3935MODULE_FIRMWARE(FW_FILE_ISP2300);
3936MODULE_FIRMWARE(FW_FILE_ISP2322);
3937MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 3938MODULE_FIRMWARE(FW_FILE_ISP25XX);