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[SCSI] qla2xxx: Disable adapter when we encounter a PCI disconnect.
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_mr.c
CommitLineData
8ae6d9c7
GM		 1/*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7#include "qla_def.h"
8#include <linux/delay.h>
9#include <linux/pci.h>
10#include <linux/ratelimit.h>
11#include <linux/vmalloc.h>
12#include <scsi/scsi_tcq.h>
13#include <linux/utsname.h>
14
15
16/* QLAFX00 specific Mailbox implementation functions */
17
18/*
19 * qlafx00_mailbox_command
20 * Issue mailbox command and waits for completion.
21 *
22 * Input:
23 * ha = adapter block pointer.
24 * mcp = driver internal mbx struct pointer.
25 *
26 * Output:
27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
28 *
29 * Returns:
30 * 0 : QLA_SUCCESS = cmd performed success
31 * 1 : QLA_FUNCTION_FAILED (error encountered)
32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
33 *
34 * Context:
35 * Kernel context.
36 */
37static int
38qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
39
40{
41 int rval;
42 unsigned long flags = 0;
43 device_reg_t __iomem *reg;
44 uint8_t abort_active;
45 uint8_t io_lock_on;
46 uint16_t command = 0;
47 uint32_t *iptr;
48 uint32_t __iomem *optr;
49 uint32_t cnt;
50 uint32_t mboxes;
51 unsigned long wait_time;
52 struct qla_hw_data *ha = vha->hw;
53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
54
55 if (ha->pdev->error_state > pci_channel_io_frozen) {
56 ql_log(ql_log_warn, vha, 0x115c,
57 "error_state is greater than pci_channel_io_frozen, "
58 "exiting.\n");
59 return QLA_FUNCTION_TIMEOUT;
60 }
61
62 if (vha->device_flags & DFLG_DEV_FAILED) {
63 ql_log(ql_log_warn, vha, 0x115f,
64 "Device in failed state, exiting.\n");
65 return QLA_FUNCTION_TIMEOUT;
66 }
67
68 reg = ha->iobase;
69 io_lock_on = base_vha->flags.init_done;
70
71 rval = QLA_SUCCESS;
72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
73
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1175,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
78 }
79
80 if (ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1176,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 rval = QLA_FUNCTION_FAILED;
86 goto premature_exit;
87 }
88
89 /*
90 * Wait for active mailbox commands to finish by waiting at most tov
91 * seconds. This is to serialize actual issuing of mailbox cmds during
92 * non ISP abort time.
93 */
94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
95 /* Timeout occurred. Return error. */
96 ql_log(ql_log_warn, vha, 0x1177,
97 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 mcp->mb[0]);
99 return QLA_FUNCTION_TIMEOUT;
100 }
101
102 ha->flags.mbox_busy = 1;
103 /* Save mailbox command for debug */
104 ha->mcp32 = mcp;
105
106 ql_dbg(ql_dbg_mbx, vha, 0x1178,
107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108
109 spin_lock_irqsave(&ha->hardware_lock, flags);
110
111 /* Load mailbox registers. */
112 optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
113
114 iptr = mcp->mb;
115 command = mcp->mb[0];
116 mboxes = mcp->out_mb;
117
118 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
119 if (mboxes & BIT_0)
120 WRT_REG_DWORD(optr, *iptr);
121
122 mboxes >>= 1;
123 optr++;
124 iptr++;
125 }
126
127 /* Issue set host interrupt command to send cmd out. */
128 ha->flags.mbox_int = 0;
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
130
131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
132 (uint8_t *)mcp->mb, 16);
133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
134 ((uint8_t *)mcp->mb + 0x10), 16);
135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
136 ((uint8_t *)mcp->mb + 0x20), 8);
137
138 /* Unlock mbx registers and wait for interrupt */
139 ql_dbg(ql_dbg_mbx, vha, 0x1179,
140 "Going to unlock irq & waiting for interrupts. "
141 "jiffies=%lx.\n", jiffies);
142
143 /* Wait for mbx cmd completion until timeout */
144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
146
147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
148 spin_unlock_irqrestore(&ha->hardware_lock, flags);
149
150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
8ae6d9c7
GM		 151 } else {
152 ql_dbg(ql_dbg_mbx, vha, 0x112c,
153 "Cmd=%x Polling Mode.\n", command);
154
155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
156 spin_unlock_irqrestore(&ha->hardware_lock, flags);
157
158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
159 while (!ha->flags.mbox_int) {
160 if (time_after(jiffies, wait_time))
161 break;
162
163 /* Check for pending interrupts. */
164 qla2x00_poll(ha->rsp_q_map[0]);
165
166 if (!ha->flags.mbox_int &&
167 !(IS_QLA2200(ha) &&
168 command == MBC_LOAD_RISC_RAM_EXTENDED))
169 usleep_range(10000, 11000);
170 } /* while */
171 ql_dbg(ql_dbg_mbx, vha, 0x112d,
172 "Waited %d sec.\n",
173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
174 }
175
176 /* Check whether we timed out */
177 if (ha->flags.mbox_int) {
178 uint32_t *iptr2;
179
180 ql_dbg(ql_dbg_mbx, vha, 0x112e,
181 "Cmd=%x completed.\n", command);
182
183 /* Got interrupt. Clear the flag. */
184 ha->flags.mbox_int = 0;
185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
186
187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
188 rval = QLA_FUNCTION_FAILED;
189
190 /* Load return mailbox registers. */
191 iptr2 = mcp->mb;
192 iptr = (uint32_t *)&ha->mailbox_out32[0];
193 mboxes = mcp->in_mb;
194 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
195 if (mboxes & BIT_0)
196 *iptr2 = *iptr;
197
198 mboxes >>= 1;
199 iptr2++;
200 iptr++;
201 }
202 } else {
203
204 rval = QLA_FUNCTION_TIMEOUT;
205 }
206
207 ha->flags.mbox_busy = 0;
208
209 /* Clean up */
210 ha->mcp32 = NULL;
211
212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
213 ql_dbg(ql_dbg_mbx, vha, 0x113a,
214 "checking for additional resp interrupt.\n");
215
216 /* polling mode for non isp_abort commands. */
217 qla2x00_poll(ha->rsp_q_map[0]);
218 }
219
220 if (rval == QLA_FUNCTION_TIMEOUT &&
221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
223 ha->flags.eeh_busy) {
224 /* not in dpc. schedule it for dpc to take over. */
225 ql_dbg(ql_dbg_mbx, vha, 0x115d,
226 "Timeout, schedule isp_abort_needed.\n");
227
228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
231
232 ql_log(ql_log_info, base_vha, 0x115e,
233 "Mailbox cmd timeout occurred, cmd=0x%x, "
234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
235 "abort.\n", command, mcp->mb[0],
236 ha->flags.eeh_busy);
237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
238 qla2xxx_wake_dpc(vha);
239 }
240 } else if (!abort_active) {
241 /* call abort directly since we are in the DPC thread */
242 ql_dbg(ql_dbg_mbx, vha, 0x1160,
243 "Timeout, calling abort_isp.\n");
244
245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
248
249 ql_log(ql_log_info, base_vha, 0x1161,
250 "Mailbox cmd timeout occurred, cmd=0x%x, "
251 "mb[0]=0x%x. Scheduling ISP abort ",
252 command, mcp->mb[0]);
253
254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
256 if (ha->isp_ops->abort_isp(vha)) {
257 /* Failed. retry later. */
258 set_bit(ISP_ABORT_NEEDED,
259 &vha->dpc_flags);
260 }
261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
262 ql_dbg(ql_dbg_mbx, vha, 0x1162,
263 "Finished abort_isp.\n");
264 }
265 }
266 }
267
268premature_exit:
269 /* Allow next mbx cmd to come in. */
270 complete(&ha->mbx_cmd_comp);
271
272 if (rval) {
273 ql_log(ql_log_warn, base_vha, 0x1163,
274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
275 "mb[3]=%x, cmd=%x ****.\n",
276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
277 } else {
278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
279 }
280
281 return rval;
282}
283
284/*
285 * qlafx00_driver_shutdown
286 * Indicate a driver shutdown to firmware.
287 *
288 * Input:
289 * ha = adapter block pointer.
290 *
291 * Returns:
292 * local function return status code.
293 *
294 * Context:
295 * Kernel context.
296 */
42479343 297int
8ae6d9c7
GM		 298qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
299{
300 int rval;
301 struct mbx_cmd_32 mc;
302 struct mbx_cmd_32 *mcp = &mc;
303
304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
305 "Entered %s.\n", __func__);
306
307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
308 mcp->out_mb = MBX_0;
309 mcp->in_mb = MBX_0;
310 if (tmo)
311 mcp->tov = tmo;
312 else
313 mcp->tov = MBX_TOV_SECONDS;
314 mcp->flags = 0;
315 rval = qlafx00_mailbox_command(vha, mcp);
316
317 if (rval != QLA_SUCCESS) {
318 ql_dbg(ql_dbg_mbx, vha, 0x1167,
319 "Failed=%x.\n", rval);
320 } else {
321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
322 "Done %s.\n", __func__);
323 }
324
325 return rval;
326}
327
328/*
329 * qlafx00_get_firmware_state
330 * Get adapter firmware state.
331 *
332 * Input:
333 * ha = adapter block pointer.
334 * TARGET_QUEUE_LOCK must be released.
335 * ADAPTER_STATE_LOCK must be released.
336 *
337 * Returns:
338 * qla7xxx local function return status code.
339 *
340 * Context:
341 * Kernel context.
342 */
343static int
344qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
345{
346 int rval;
347 struct mbx_cmd_32 mc;
348 struct mbx_cmd_32 *mcp = &mc;
349
350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
351 "Entered %s.\n", __func__);
352
353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
354 mcp->out_mb = MBX_0;
355 mcp->in_mb = MBX_1|MBX_0;
356 mcp->tov = MBX_TOV_SECONDS;
357 mcp->flags = 0;
358 rval = qlafx00_mailbox_command(vha, mcp);
359
360 /* Return firmware states. */
361 states[0] = mcp->mb[1];
362
363 if (rval != QLA_SUCCESS) {
364 ql_dbg(ql_dbg_mbx, vha, 0x116a,
365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
366 } else {
367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
368 "Done %s.\n", __func__);
369 }
370 return rval;
371}
372
373/*
374 * qlafx00_init_firmware
375 * Initialize adapter firmware.
376 *
377 * Input:
378 * ha = adapter block pointer.
379 * dptr = Initialization control block pointer.
380 * size = size of initialization control block.
381 * TARGET_QUEUE_LOCK must be released.
382 * ADAPTER_STATE_LOCK must be released.
383 *
384 * Returns:
385 * qlafx00 local function return status code.
386 *
387 * Context:
388 * Kernel context.
389 */
390int
391qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
392{
393 int rval;
394 struct mbx_cmd_32 mc;
395 struct mbx_cmd_32 *mcp = &mc;
396 struct qla_hw_data *ha = vha->hw;
397
398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
399 "Entered %s.\n", __func__);
400
401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
402
403 mcp->mb[1] = 0;
404 mcp->mb[2] = MSD(ha->init_cb_dma);
405 mcp->mb[3] = LSD(ha->init_cb_dma);
406
407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
408 mcp->in_mb = MBX_0;
409 mcp->buf_size = size;
410 mcp->flags = MBX_DMA_OUT;
411 mcp->tov = MBX_TOV_SECONDS;
412 rval = qlafx00_mailbox_command(vha, mcp);
413
414 if (rval != QLA_SUCCESS) {
415 ql_dbg(ql_dbg_mbx, vha, 0x116d,
416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
417 } else {
418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
419 "Done %s.\n", __func__);
420 }
421 return rval;
422}
423
424/*
425 * qlafx00_mbx_reg_test
426 */
427static int
428qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
429{
430 int rval;
431 struct mbx_cmd_32 mc;
432 struct mbx_cmd_32 *mcp = &mc;
433
434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
435 "Entered %s.\n", __func__);
436
437
438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
439 mcp->mb[1] = 0xAAAA;
440 mcp->mb[2] = 0x5555;
441 mcp->mb[3] = 0xAA55;
442 mcp->mb[4] = 0x55AA;
443 mcp->mb[5] = 0xA5A5;
444 mcp->mb[6] = 0x5A5A;
445 mcp->mb[7] = 0x2525;
446 mcp->mb[8] = 0xBBBB;
447 mcp->mb[9] = 0x6666;
448 mcp->mb[10] = 0xBB66;
449 mcp->mb[11] = 0x66BB;
450 mcp->mb[12] = 0xB6B6;
451 mcp->mb[13] = 0x6B6B;
452 mcp->mb[14] = 0x3636;
453 mcp->mb[15] = 0xCCCC;
454
455
456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
460 mcp->buf_size = 0;
461 mcp->flags = MBX_DMA_OUT;
462 mcp->tov = MBX_TOV_SECONDS;
463 rval = qlafx00_mailbox_command(vha, mcp);
464 if (rval == QLA_SUCCESS) {
465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
467 rval = QLA_FUNCTION_FAILED;
468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
470 rval = QLA_FUNCTION_FAILED;
471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
473 rval = QLA_FUNCTION_FAILED;
474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
475 mcp->mb[31] != 0xCCCC)
476 rval = QLA_FUNCTION_FAILED;
477 }
478
479 if (rval != QLA_SUCCESS) {
480 ql_dbg(ql_dbg_mbx, vha, 0x1170,
481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
482 } else {
483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
484 "Done %s.\n", __func__);
485 }
486 return rval;
487}
488
489/**
490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
491 * @ha: HA context
492 *
493 * Returns 0 on success.
494 */
495int
496qlafx00_pci_config(scsi_qla_host_t *vha)
497{
498 uint16_t w;
499 struct qla_hw_data *ha = vha->hw;
500
501 pci_set_master(ha->pdev);
502 pci_try_set_mwi(ha->pdev);
503
504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
506 w &= ~PCI_COMMAND_INTX_DISABLE;
507 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
508
509 /* PCIe -- adjust Maximum Read Request Size (2048). */
ce9f7ed9 510 if (pci_is_pcie(ha->pdev))
8ae6d9c7
GM		 511 pcie_set_readrq(ha->pdev, 2048);
512
513 ha->chip_revision = ha->pdev->revision;
514
515 return QLA_SUCCESS;
516}
517
518/**
519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
520 * @ha: HA context
521 *
522 */
523static inline void
524qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
525{
526 unsigned long flags = 0;
527 struct qla_hw_data *ha = vha->hw;
528 int i, core;
529 uint32_t cnt;
530
531 /* Set all 4 cores in reset */
532 for (i = 0; i < 4; i++) {
533 QLAFX00_SET_HBA_SOC_REG(ha,
534 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
535 }
536
537 /* Set all 4 core Clock gating control */
538 for (i = 0; i < 4; i++) {
539 QLAFX00_SET_HBA_SOC_REG(ha,
540 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
541 }
542
543 /* Reset all units in Fabric */
544 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101));
545
546 /* Reset all interrupt control registers */
547 for (i = 0; i < 115; i++) {
548 QLAFX00_SET_HBA_SOC_REG(ha,
549 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
550 }
551
552 /* Reset Timers control registers. per core */
553 for (core = 0; core < 4; core++)
554 for (i = 0; i < 8; i++)
555 QLAFX00_SET_HBA_SOC_REG(ha,
556 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
557
558 /* Reset per core IRQ ack register */
559 for (core = 0; core < 4; core++)
560 QLAFX00_SET_HBA_SOC_REG(ha,
561 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
562
563 /* Set Fabric control and config to defaults */
564 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
565 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
566
567 spin_lock_irqsave(&ha->hardware_lock, flags);
568
569 /* Kick in Fabric units */
570 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
571
572 /* Kick in Core0 to start boot process */
573 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
574
575 /* Wait 10secs for soft-reset to complete. */
576 for (cnt = 10; cnt; cnt--) {
577 msleep(1000);
578 barrier();
579 }
580 spin_unlock_irqrestore(&ha->hardware_lock, flags);
581}
582
583/**
584 * qlafx00_soft_reset() - Soft Reset ISPFx00.
585 * @ha: HA context
586 *
587 * Returns 0 on success.
588 */
589void
590qlafx00_soft_reset(scsi_qla_host_t *vha)
591{
592 struct qla_hw_data *ha = vha->hw;
593
594 if (unlikely(pci_channel_offline(ha->pdev) &&
595 ha->flags.pci_channel_io_perm_failure))
596 return;
597
598 ha->isp_ops->disable_intrs(ha);
599 qlafx00_soc_cpu_reset(vha);
600 ha->isp_ops->enable_intrs(ha);
601}
602
603/**
604 * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
605 * @ha: HA context
606 *
607 * Returns 0 on success.
608 */
609int
610qlafx00_chip_diag(scsi_qla_host_t *vha)
611{
612 int rval = 0;
613 struct qla_hw_data *ha = vha->hw;
614 struct req_que *req = ha->req_q_map[0];
615
616 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
617
618 rval = qlafx00_mbx_reg_test(vha);
619 if (rval) {
620 ql_log(ql_log_warn, vha, 0x1165,
621 "Failed mailbox send register test\n");
622 } else {
623 /* Flag a successful rval */
624 rval = QLA_SUCCESS;
625 }
626 return rval;
627}
628
629void
630qlafx00_config_rings(struct scsi_qla_host *vha)
631{
632 struct qla_hw_data *ha = vha->hw;
633 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
634 struct init_cb_fx *icb;
635 struct req_que *req = ha->req_q_map[0];
636 struct rsp_que *rsp = ha->rsp_q_map[0];
637
638 /* Setup ring parameters in initialization control block. */
639 icb = (struct init_cb_fx *)ha->init_cb;
640 icb->request_q_outpointer = __constant_cpu_to_le16(0);
641 icb->response_q_inpointer = __constant_cpu_to_le16(0);
642 icb->request_q_length = cpu_to_le16(req->length);
643 icb->response_q_length = cpu_to_le16(rsp->length);
644 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
645 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
646 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
647 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
648
649 WRT_REG_DWORD(&reg->req_q_in, 0);
650 WRT_REG_DWORD(&reg->req_q_out, 0);
651
652 WRT_REG_DWORD(&reg->rsp_q_in, 0);
653 WRT_REG_DWORD(&reg->rsp_q_out, 0);
654
655 /* PCI posting */
656 RD_REG_DWORD(&reg->rsp_q_out);
657}
658
659char *
660qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
661{
662 struct qla_hw_data *ha = vha->hw;
8ae6d9c7 663
ce9f7ed9 664 if (pci_is_pcie(ha->pdev)) {
8ae6d9c7
GM		 665 strcpy(str, "PCIe iSA");
666 return str;
667 }
668 return str;
669}
670
671char *
672qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str)
673{
674 struct qla_hw_data *ha = vha->hw;
675
676 sprintf(str, "%s", ha->mr.fw_version);
677 return str;
678}
679
680void
681qlafx00_enable_intrs(struct qla_hw_data *ha)
682{
683 unsigned long flags = 0;
684
685 spin_lock_irqsave(&ha->hardware_lock, flags);
686 ha->interrupts_on = 1;
687 QLAFX00_ENABLE_ICNTRL_REG(ha);
688 spin_unlock_irqrestore(&ha->hardware_lock, flags);
689}
690
691void
692qlafx00_disable_intrs(struct qla_hw_data *ha)
693{
694 unsigned long flags = 0;
695
696 spin_lock_irqsave(&ha->hardware_lock, flags);
697 ha->interrupts_on = 0;
698 QLAFX00_DISABLE_ICNTRL_REG(ha);
699 spin_unlock_irqrestore(&ha->hardware_lock, flags);
700}
701
702static void
703qlafx00_tmf_iocb_timeout(void *data)
704{
705 srb_t *sp = (srb_t *)data;
706 struct srb_iocb *tmf = &sp->u.iocb_cmd;
707
1f8deefe 708 tmf->u.tmf.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT);
8ae6d9c7
GM		 709 complete(&tmf->u.tmf.comp);
710}
711
712static void
713qlafx00_tmf_sp_done(void *data, void *ptr, int res)
714{
715 srb_t *sp = (srb_t *)ptr;
716 struct srb_iocb *tmf = &sp->u.iocb_cmd;
717
718 complete(&tmf->u.tmf.comp);
719}
720
721static int
722qlafx00_async_tm_cmd(fc_port_t *fcport, uint32_t flags,
723 uint32_t lun, uint32_t tag)
724{
725 scsi_qla_host_t *vha = fcport->vha;
726 struct srb_iocb *tm_iocb;
727 srb_t *sp;
728 int rval = QLA_FUNCTION_FAILED;
729
730 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
731 if (!sp)
732 goto done;
733
734 tm_iocb = &sp->u.iocb_cmd;
735 sp->type = SRB_TM_CMD;
736 sp->name = "tmf";
737 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
738 tm_iocb->u.tmf.flags = flags;
739 tm_iocb->u.tmf.lun = lun;
740 tm_iocb->u.tmf.data = tag;
741 sp->done = qlafx00_tmf_sp_done;
742 tm_iocb->timeout = qlafx00_tmf_iocb_timeout;
743 init_completion(&tm_iocb->u.tmf.comp);
744
745 rval = qla2x00_start_sp(sp);
746 if (rval != QLA_SUCCESS)
747 goto done_free_sp;
748
749 ql_dbg(ql_dbg_async, vha, 0x507b,
750 "Task management command issued target_id=%x\n",
751 fcport->tgt_id);
752
753 wait_for_completion(&tm_iocb->u.tmf.comp);
754
755 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
756 QLA_SUCCESS : QLA_FUNCTION_FAILED;
757
758done_free_sp:
759 sp->free(vha, sp);
760done:
761 return rval;
762}
763
764int
765qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag)
766{
767 return qlafx00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
768}
769
770int
771qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag)
772{
773 return qlafx00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
774}
775
5854771e
AB		 776int
777qlafx00_loop_reset(scsi_qla_host_t *vha)
778{
779 int ret;
780 struct fc_port *fcport;
781 struct qla_hw_data *ha = vha->hw;
782
783 if (ql2xtargetreset) {
784 list_for_each_entry(fcport, &vha->vp_fcports, list) {
785 if (fcport->port_type != FCT_TARGET)
786 continue;
787
788 ret = ha->isp_ops->target_reset(fcport, 0, 0);
789 if (ret != QLA_SUCCESS) {
790 ql_dbg(ql_dbg_taskm, vha, 0x803d,
791 "Bus Reset failed: Reset=%d "
792 "d_id=%x.\n", ret, fcport->d_id.b24);
793 }
794 }
795 }
796 return QLA_SUCCESS;
797}
798
8ae6d9c7
GM		 799int
800qlafx00_iospace_config(struct qla_hw_data *ha)
801{
802 if (pci_request_selected_regions(ha->pdev, ha->bars,
803 QLA2XXX_DRIVER_NAME)) {
804 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
805 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
806 pci_name(ha->pdev));
807 goto iospace_error_exit;
808 }
809
810 /* Use MMIO operations for all accesses. */
811 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
812 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
813 "Invalid pci I/O region size (%s).\n",
814 pci_name(ha->pdev));
815 goto iospace_error_exit;
816 }
817 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
818 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
819 "Invalid PCI mem BAR0 region size (%s), aborting\n",
820 pci_name(ha->pdev));
821 goto iospace_error_exit;
822 }
823
824 ha->cregbase =
825 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
826 if (!ha->cregbase) {
827 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
828 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
829 goto iospace_error_exit;
830 }
831
832 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
833 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
834 "region #2 not an MMIO resource (%s), aborting\n",
835 pci_name(ha->pdev));
836 goto iospace_error_exit;
837 }
838 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
839 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
840 "Invalid PCI mem BAR2 region size (%s), aborting\n",
841 pci_name(ha->pdev));
842 goto iospace_error_exit;
843 }
844
845 ha->iobase =
846 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
847 if (!ha->iobase) {
848 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
849 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
850 goto iospace_error_exit;
851 }
852
853 /* Determine queue resources */
854 ha->max_req_queues = ha->max_rsp_queues = 1;
855
856 ql_log_pci(ql_log_info, ha->pdev, 0x012c,
857 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
858 ha->bars, ha->cregbase, ha->iobase);
859
860 return 0;
861
862iospace_error_exit:
863 return -ENOMEM;
864}
865
866static void
867qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
868{
869 struct qla_hw_data *ha = vha->hw;
870 struct req_que *req = ha->req_q_map[0];
871 struct rsp_que *rsp = ha->rsp_q_map[0];
872
873 req->length_fx00 = req->length;
874 req->ring_fx00 = req->ring;
875 req->dma_fx00 = req->dma;
876
877 rsp->length_fx00 = rsp->length;
878 rsp->ring_fx00 = rsp->ring;
879 rsp->dma_fx00 = rsp->dma;
880
881 ql_dbg(ql_dbg_init, vha, 0x012d,
882 "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
883 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
884 req->length_fx00, (u64)req->dma_fx00);
885
886 ql_dbg(ql_dbg_init, vha, 0x012e,
887 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
888 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
889 rsp->length_fx00, (u64)rsp->dma_fx00);
890}
891
892static int
893qlafx00_config_queues(struct scsi_qla_host *vha)
894{
895 struct qla_hw_data *ha = vha->hw;
896 struct req_que *req = ha->req_q_map[0];
897 struct rsp_que *rsp = ha->rsp_q_map[0];
898 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
899
900 req->length = ha->req_que_len;
901 req->ring = (void *)ha->iobase + ha->req_que_off;
902 req->dma = bar2_hdl + ha->req_que_off;
903 if ((!req->ring) || (req->length == 0)) {
904 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
905 "Unable to allocate memory for req_ring\n");
906 return QLA_FUNCTION_FAILED;
907 }
908
909 ql_dbg(ql_dbg_init, vha, 0x0130,
910 "req: %p req_ring pointer %p req len 0x%x "
911 "req off 0x%x\n, req->dma: 0x%llx",
912 req, req->ring, req->length,
913 ha->req_que_off, (u64)req->dma);
914
915 rsp->length = ha->rsp_que_len;
916 rsp->ring = (void *)ha->iobase + ha->rsp_que_off;
917 rsp->dma = bar2_hdl + ha->rsp_que_off;
918 if ((!rsp->ring) || (rsp->length == 0)) {
919 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
920 "Unable to allocate memory for rsp_ring\n");
921 return QLA_FUNCTION_FAILED;
922 }
923
924 ql_dbg(ql_dbg_init, vha, 0x0132,
925 "rsp: %p rsp_ring pointer %p rsp len 0x%x "
926 "rsp off 0x%x, rsp->dma: 0x%llx\n",
927 rsp, rsp->ring, rsp->length,
928 ha->rsp_que_off, (u64)rsp->dma);
929
930 return QLA_SUCCESS;
931}
932
933static int
934qlafx00_init_fw_ready(scsi_qla_host_t *vha)
935{
936 int rval = 0;
937 unsigned long wtime;
938 uint16_t wait_time; /* Wait time */
939 struct qla_hw_data *ha = vha->hw;
940 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
941 uint32_t aenmbx, aenmbx7 = 0;
f9a2a543 942 uint32_t pseudo_aen;
8ae6d9c7
GM		 943 uint32_t state[5];
944 bool done = false;
945
946 /* 30 seconds wait - Adjust if required */
947 wait_time = 30;
948
f9a2a543
AB		 949 pseudo_aen = RD_REG_DWORD(&reg->pseudoaen);
950 if (pseudo_aen == 1) {
951 aenmbx7 = RD_REG_DWORD(&reg->initval7);
952 ha->mbx_intr_code = MSW(aenmbx7);
953 ha->rqstq_intr_code = LSW(aenmbx7);
954 rval = qlafx00_driver_shutdown(vha, 10);
955 if (rval != QLA_SUCCESS)
956 qlafx00_soft_reset(vha);
957 }
958
8ae6d9c7
GM		 959 /* wait time before firmware ready */
960 wtime = jiffies + (wait_time * HZ);
961 do {
962 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
963 barrier();
964 ql_dbg(ql_dbg_mbx, vha, 0x0133,
965 "aenmbx: 0x%x\n", aenmbx);
966
967 switch (aenmbx) {
968 case MBA_FW_NOT_STARTED:
969 case MBA_FW_STARTING:
970 break;
971
972 case MBA_SYSTEM_ERR:
973 case MBA_REQ_TRANSFER_ERR:
974 case MBA_RSP_TRANSFER_ERR:
975 case MBA_FW_INIT_FAILURE:
976 qlafx00_soft_reset(vha);
977 break;
978
979 case MBA_FW_RESTART_CMPLT:
980 /* Set the mbx and rqstq intr code */
981 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
982 ha->mbx_intr_code = MSW(aenmbx7);
983 ha->rqstq_intr_code = LSW(aenmbx7);
984 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
985 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
986 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
987 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
988 WRT_REG_DWORD(&reg->aenmailbox0, 0);
989 RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
990 ql_dbg(ql_dbg_init, vha, 0x0134,
991 "f/w returned mbx_intr_code: 0x%x, "
992 "rqstq_intr_code: 0x%x\n",
993 ha->mbx_intr_code, ha->rqstq_intr_code);
994 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
995 rval = QLA_SUCCESS;
996 done = true;
997 break;
998
999 default:
1000 /* If fw is apparently not ready. In order to continue,
1001 * we might need to issue Mbox cmd, but the problem is
1002 * that the DoorBell vector values that come with the
1003 * 8060 AEN are most likely gone by now (and thus no
1004 * bell would be rung on the fw side when mbox cmd is
1005 * issued). We have to therefore grab the 8060 AEN
1006 * shadow regs (filled in by FW when the last 8060
1007 * AEN was being posted).
1008 * Do the following to determine what is needed in
1009 * order to get the FW ready:
1010 * 1. reload the 8060 AEN values from the shadow regs
1011 * 2. clear int status to get rid of possible pending
1012 * interrupts
1013 * 3. issue Get FW State Mbox cmd to determine fw state
1014 * Set the mbx and rqstq intr code from Shadow Regs
1015 */
1016 aenmbx7 = RD_REG_DWORD(&reg->initval7);
1017 ha->mbx_intr_code = MSW(aenmbx7);
1018 ha->rqstq_intr_code = LSW(aenmbx7);
1019 ha->req_que_off = RD_REG_DWORD(&reg->initval1);
1020 ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
1021 ha->req_que_len = RD_REG_DWORD(&reg->initval5);
1022 ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
1023 ql_dbg(ql_dbg_init, vha, 0x0135,
1024 "f/w returned mbx_intr_code: 0x%x, "
1025 "rqstq_intr_code: 0x%x\n",
1026 ha->mbx_intr_code, ha->rqstq_intr_code);
1027 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1028
1029 /* Get the FW state */
1030 rval = qlafx00_get_firmware_state(vha, state);
1031 if (rval != QLA_SUCCESS) {
1032 /* Retry if timer has not expired */
1033 break;
1034 }
1035
1036 if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
1037 /* Firmware is waiting to be
1038 * initialized by driver
1039 */
1040 rval = QLA_SUCCESS;
1041 done = true;
1042 break;
1043 }
1044
1045 /* Issue driver shutdown and wait until f/w recovers.
1046 * Driver should continue to poll until 8060 AEN is
1047 * received indicating firmware recovery.
1048 */
1049 ql_dbg(ql_dbg_init, vha, 0x0136,
1050 "Sending Driver shutdown fw_state 0x%x\n",
1051 state[0]);
1052
1053 rval = qlafx00_driver_shutdown(vha, 10);
1054 if (rval != QLA_SUCCESS) {
1055 rval = QLA_FUNCTION_FAILED;
1056 break;
1057 }
1058 msleep(500);
1059
1060 wtime = jiffies + (wait_time * HZ);
1061 break;
1062 }
1063
1064 if (!done) {
1065 if (time_after_eq(jiffies, wtime)) {
1066 ql_dbg(ql_dbg_init, vha, 0x0137,
1067 "Init f/w failed: aen[7]: 0x%x\n",
1068 RD_REG_DWORD(&reg->aenmailbox7));
1069 rval = QLA_FUNCTION_FAILED;
1070 done = true;
1071 break;
1072 }
1073 /* Delay for a while */
1074 msleep(500);
1075 }
1076 } while (!done);
1077
1078 if (rval)
1079 ql_dbg(ql_dbg_init, vha, 0x0138,
1080 "%s **** FAILED ****.\n", __func__);
1081 else
1082 ql_dbg(ql_dbg_init, vha, 0x0139,
1083 "%s **** SUCCESS ****.\n", __func__);
1084
1085 return rval;
1086}
1087
1088/*
1089 * qlafx00_fw_ready() - Waits for firmware ready.
1090 * @ha: HA context
1091 *
1092 * Returns 0 on success.
1093 */
1094int
1095qlafx00_fw_ready(scsi_qla_host_t *vha)
1096{
1097 int rval;
1098 unsigned long wtime;
1099 uint16_t wait_time; /* Wait time if loop is coming ready */
1100 uint32_t state[5];
1101
1102 rval = QLA_SUCCESS;
1103
1104 wait_time = 10;
1105
1106 /* wait time before firmware ready */
1107 wtime = jiffies + (wait_time * HZ);
1108
1109 /* Wait for ISP to finish init */
1110 if (!vha->flags.init_done)
1111 ql_dbg(ql_dbg_init, vha, 0x013a,
1112 "Waiting for init to complete...\n");
1113
1114 do {
1115 rval = qlafx00_get_firmware_state(vha, state);
1116
1117 if (rval == QLA_SUCCESS) {
1118 if (state[0] == FSTATE_FX00_INITIALIZED) {
1119 ql_dbg(ql_dbg_init, vha, 0x013b,
1120 "fw_state=%x\n", state[0]);
1121 rval = QLA_SUCCESS;
1122 break;
1123 }
1124 }
1125 rval = QLA_FUNCTION_FAILED;
1126
1127 if (time_after_eq(jiffies, wtime))
1128 break;
1129
1130 /* Delay for a while */
1131 msleep(500);
1132
1133 ql_dbg(ql_dbg_init, vha, 0x013c,
1134 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1135 } while (1);
1136
1137
1138 if (rval)
1139 ql_dbg(ql_dbg_init, vha, 0x013d,
1140 "Firmware ready **** FAILED ****.\n");
1141 else
1142 ql_dbg(ql_dbg_init, vha, 0x013e,
1143 "Firmware ready **** SUCCESS ****.\n");
1144
1145 return rval;
1146}
1147
1148static int
1149qlafx00_find_all_targets(scsi_qla_host_t *vha,
1150 struct list_head *new_fcports)
1151{
1152 int rval;
1153 uint16_t tgt_id;
1154 fc_port_t *fcport, *new_fcport;
1155 int found;
1156 struct qla_hw_data *ha = vha->hw;
1157
1158 rval = QLA_SUCCESS;
1159
1160 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1161 return QLA_FUNCTION_FAILED;
1162
1163 if ((atomic_read(&vha->loop_down_timer) ||
1164 STATE_TRANSITION(vha))) {
1165 atomic_set(&vha->loop_down_timer, 0);
1166 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1167 return QLA_FUNCTION_FAILED;
1168 }
1169
1170 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1171 "Listing Target bit map...\n");
1172 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha,
1173 0x2089, (uint8_t *)ha->gid_list, 32);
1174
1175 /* Allocate temporary rmtport for any new rmtports discovered. */
1176 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1177 if (new_fcport == NULL)
1178 return QLA_MEMORY_ALLOC_FAILED;
1179
1180 for_each_set_bit(tgt_id, (void *)ha->gid_list,
1181 QLAFX00_TGT_NODE_LIST_SIZE) {
1182
1183 /* Send get target node info */
1184 new_fcport->tgt_id = tgt_id;
1185 rval = qlafx00_fx_disc(vha, new_fcport,
1186 FXDISC_GET_TGT_NODE_INFO);
1187 if (rval != QLA_SUCCESS) {
1188 ql_log(ql_log_warn, vha, 0x208a,
1189 "Target info scan failed -- assuming zero-entry "
1190 "result...\n");
1191 continue;
1192 }
1193
1194 /* Locate matching device in database. */
1195 found = 0;
1196 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1197 if (memcmp(new_fcport->port_name,
1198 fcport->port_name, WWN_SIZE))
1199 continue;
1200
1201 found++;
1202
1203 /*
1204 * If tgt_id is same and state FCS_ONLINE, nothing
1205 * changed.
1206 */
1207 if (fcport->tgt_id == new_fcport->tgt_id &&
1208 atomic_read(&fcport->state) == FCS_ONLINE)
1209 break;
1210
1211 /*
1212 * Tgt ID changed or device was marked to be updated.
1213 */
1214 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1215 "TGT-ID Change(%s): Present tgt id: "
1216 "0x%x state: 0x%x "
1217 "wwnn = %llx wwpn = %llx.\n",
1218 __func__, fcport->tgt_id,
1219 atomic_read(&fcport->state),
1220 (unsigned long long)wwn_to_u64(fcport->node_name),
1221 (unsigned long long)wwn_to_u64(fcport->port_name));
1222
1223 ql_log(ql_log_info, vha, 0x208c,
1224 "TGT-ID Announce(%s): Discovered tgt "
1225 "id 0x%x wwnn = %llx "
1226 "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1227 (unsigned long long)
1228 wwn_to_u64(new_fcport->node_name),
1229 (unsigned long long)
1230 wwn_to_u64(new_fcport->port_name));
1231
1232 if (atomic_read(&fcport->state) != FCS_ONLINE) {
1233 fcport->old_tgt_id = fcport->tgt_id;
1234 fcport->tgt_id = new_fcport->tgt_id;
1235 ql_log(ql_log_info, vha, 0x208d,
1236 "TGT-ID: New fcport Added: %p\n", fcport);
1237 qla2x00_update_fcport(vha, fcport);
1238 } else {
1239 ql_log(ql_log_info, vha, 0x208e,
1240 " Existing TGT-ID %x did not get "
1241 " offline event from firmware.\n",
1242 fcport->old_tgt_id);
1243 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1244 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1245 kfree(new_fcport);
1246 return rval;
1247 }
1248 break;
1249 }
1250
1251 if (found)
1252 continue;
1253
1254 /* If device was not in our fcports list, then add it. */
1255 list_add_tail(&new_fcport->list, new_fcports);
1256
1257 /* Allocate a new replacement fcport. */
1258 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1259 if (new_fcport == NULL)
1260 return QLA_MEMORY_ALLOC_FAILED;
1261 }
1262
1263 kfree(new_fcport);
1264 return rval;
1265}
1266
1267/*
1268 * qlafx00_configure_all_targets
1269 * Setup target devices with node ID's.
1270 *
1271 * Input:
1272 * ha = adapter block pointer.
1273 *
1274 * Returns:
1275 * 0 = success.
1276 * BIT_0 = error
1277 */
1278static int
1279qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1280{
1281 int rval;
1282 fc_port_t *fcport, *rmptemp;
1283 LIST_HEAD(new_fcports);
1284
1285 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1286 FXDISC_GET_TGT_NODE_LIST);
1287 if (rval != QLA_SUCCESS) {
1288 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1289 return rval;
1290 }
1291
1292 rval = qlafx00_find_all_targets(vha, &new_fcports);
1293 if (rval != QLA_SUCCESS) {
1294 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1295 return rval;
1296 }
1297
1298 /*
1299 * Delete all previous devices marked lost.
1300 */
1301 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1302 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1303 break;
1304
1305 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1306 if (fcport->port_type != FCT_INITIATOR)
1307 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1308 }
1309 }
1310
1311 /*
1312 * Add the new devices to our devices list.
1313 */
1314 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1315 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1316 break;
1317
1318 qla2x00_update_fcport(vha, fcport);
1319 list_move_tail(&fcport->list, &vha->vp_fcports);
1320 ql_log(ql_log_info, vha, 0x208f,
1321 "Attach new target id 0x%x wwnn = %llx "
1322 "wwpn = %llx.\n",
1323 fcport->tgt_id,
1324 (unsigned long long)wwn_to_u64(fcport->node_name),
1325 (unsigned long long)wwn_to_u64(fcport->port_name));
1326 }
1327
1328 /* Free all new device structures not processed. */
1329 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1330 list_del(&fcport->list);
1331 kfree(fcport);
1332 }
1333
1334 return rval;
1335}
1336
1337/*
1338 * qlafx00_configure_devices
1339 * Updates Fibre Channel Device Database with what is actually on loop.
1340 *
1341 * Input:
1342 * ha = adapter block pointer.
1343 *
1344 * Returns:
1345 * 0 = success.
1346 * 1 = error.
1347 * 2 = database was full and device was not configured.
1348 */
1349int
1350qlafx00_configure_devices(scsi_qla_host_t *vha)
1351{
1352 int rval;
1353 unsigned long flags, save_flags;
1354 rval = QLA_SUCCESS;
1355
1356 save_flags = flags = vha->dpc_flags;
1357
1358 ql_dbg(ql_dbg_disc, vha, 0x2090,
1359 "Configure devices -- dpc flags =0x%lx\n", flags);
1360
1361 rval = qlafx00_configure_all_targets(vha);
1362
1363 if (rval == QLA_SUCCESS) {
1364 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1365 rval = QLA_FUNCTION_FAILED;
1366 } else {
1367 atomic_set(&vha->loop_state, LOOP_READY);
1368 ql_log(ql_log_info, vha, 0x2091,
1369 "Device Ready\n");
1370 }
1371 }
1372
1373 if (rval) {
1374 ql_dbg(ql_dbg_disc, vha, 0x2092,
1375 "%s *** FAILED ***.\n", __func__);
1376 } else {
1377 ql_dbg(ql_dbg_disc, vha, 0x2093,
1378 "%s: exiting normally.\n", __func__);
1379 }
1380 return rval;
1381}
1382
1383static void
71e56003 1384qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
8ae6d9c7
GM		 1385{
1386 struct qla_hw_data *ha = vha->hw;
1387 fc_port_t *fcport;
1388
1389 vha->flags.online = 0;
8ae6d9c7 1390 ha->mr.fw_hbt_en = 0;
8ae6d9c7 1391
71e56003
AB		 1392 if (!critemp) {
1393 ha->flags.chip_reset_done = 0;
1394 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1395 vha->qla_stats.total_isp_aborts++;
1396 ql_log(ql_log_info, vha, 0x013f,
1397 "Performing ISP error recovery - ha = %p.\n", ha);
1398 ha->isp_ops->reset_chip(vha);
1399 }
8ae6d9c7
GM		 1400
1401 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1402 atomic_set(&vha->loop_state, LOOP_DOWN);
1403 atomic_set(&vha->loop_down_timer,
1404 QLAFX00_LOOP_DOWN_TIME);
1405 } else {
1406 if (!atomic_read(&vha->loop_down_timer))
1407 atomic_set(&vha->loop_down_timer,
1408 QLAFX00_LOOP_DOWN_TIME);
1409 }
1410
1411 /* Clear all async request states across all VPs. */
1412 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1413 fcport->flags = 0;
1414 if (atomic_read(&fcport->state) == FCS_ONLINE)
1415 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1416 }
1417
1418 if (!ha->flags.eeh_busy) {
71e56003
AB		 1419 if (critemp) {
1420 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1421 } else {
1422 /* Requeue all commands in outstanding command list. */
1423 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1424 }
8ae6d9c7
GM		 1425 }
1426
1427 qla2x00_free_irqs(vha);
71e56003
AB		 1428 if (critemp)
1429 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1430 else
1431 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
8ae6d9c7
GM		 1432
1433 /* Clear the Interrupts */
1434 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1435
1436 ql_log(ql_log_info, vha, 0x0140,
1437 "%s Done done - ha=%p.\n", __func__, ha);
1438}
1439
1440/**
1441 * qlafx00_init_response_q_entries() - Initializes response queue entries.
1442 * @ha: HA context
1443 *
1444 * Beginning of request ring has initialization control block already built
1445 * by nvram config routine.
1446 *
1447 * Returns 0 on success.
1448 */
1449void
1450qlafx00_init_response_q_entries(struct rsp_que *rsp)
1451{
1452 uint16_t cnt;
1453 response_t *pkt;
1454
1455 rsp->ring_ptr = rsp->ring;
1456 rsp->ring_index = 0;
1457 rsp->status_srb = NULL;
1458 pkt = rsp->ring_ptr;
1459 for (cnt = 0; cnt < rsp->length; cnt++) {
1460 pkt->signature = RESPONSE_PROCESSED;
1f8deefe
SK		 1461 WRT_REG_DWORD((void __iomem *)&pkt->signature,
1462 RESPONSE_PROCESSED);
8ae6d9c7
GM		 1463 pkt++;
1464 }
1465}
1466
1467int
1468qlafx00_rescan_isp(scsi_qla_host_t *vha)
1469{
1470 uint32_t status = QLA_FUNCTION_FAILED;
1471 struct qla_hw_data *ha = vha->hw;
1472 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1473 uint32_t aenmbx7;
1474
1475 qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1476
1477 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1478 ha->mbx_intr_code = MSW(aenmbx7);
1479 ha->rqstq_intr_code = LSW(aenmbx7);
1480 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1481 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1482 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1483 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1484
1485 ql_dbg(ql_dbg_disc, vha, 0x2094,
1486 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1487 " Req que offset 0x%x Rsp que offset 0x%x\n",
1488 ha->mbx_intr_code, ha->rqstq_intr_code,
1489 ha->req_que_off, ha->rsp_que_len);
1490
1491 /* Clear the Interrupts */
1492 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1493
1494 status = qla2x00_init_rings(vha);
1495 if (!status) {
1496 vha->flags.online = 1;
1497
1498 /* if no cable then assume it's good */
1499 if ((vha->device_flags & DFLG_NO_CABLE))
1500 status = 0;
1501 /* Register system information */
1502 if (qlafx00_fx_disc(vha,
1503 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1504 ql_dbg(ql_dbg_disc, vha, 0x2095,
1505 "failed to register host info\n");
1506 }
1507 scsi_unblock_requests(vha->host);
1508 return status;
1509}
1510
1511void
1512qlafx00_timer_routine(scsi_qla_host_t *vha)
1513{
1514 struct qla_hw_data *ha = vha->hw;
1515 uint32_t fw_heart_beat;
1516 uint32_t aenmbx0;
1517 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
71e56003 1518 uint32_t tempc;
8ae6d9c7
GM		 1519
1520 /* Check firmware health */
1521 if (ha->mr.fw_hbt_cnt)
1522 ha->mr.fw_hbt_cnt--;
1523 else {
1524 if ((!ha->flags.mr_reset_hdlr_active) &&
1525 (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1526 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1527 (ha->mr.fw_hbt_en)) {
1528 fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1529 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1530 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1531 ha->mr.fw_hbt_miss_cnt = 0;
1532 } else {
1533 ha->mr.fw_hbt_miss_cnt++;
1534 if (ha->mr.fw_hbt_miss_cnt ==
1535 QLAFX00_HEARTBEAT_MISS_CNT) {
1536 set_bit(ISP_ABORT_NEEDED,
1537 &vha->dpc_flags);
1538 qla2xxx_wake_dpc(vha);
1539 ha->mr.fw_hbt_miss_cnt = 0;
1540 }
1541 }
1542 }
1543 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1544 }
1545
1546 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1547 /* Reset recovery to be performed in timer routine */
1548 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1549 if (ha->mr.fw_reset_timer_exp) {
1550 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1551 qla2xxx_wake_dpc(vha);
1552 ha->mr.fw_reset_timer_exp = 0;
1553 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1554 /* Wake up DPC to rescan the targets */
1555 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1556 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1557 qla2xxx_wake_dpc(vha);
1558 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1559 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1560 (!ha->mr.fw_hbt_en)) {
1561 ha->mr.fw_hbt_en = 1;
1562 } else if (!ha->mr.fw_reset_timer_tick) {
1563 if (aenmbx0 == ha->mr.old_aenmbx0_state)
1564 ha->mr.fw_reset_timer_exp = 1;
1565 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1566 } else if (aenmbx0 == 0xFFFFFFFF) {
1567 uint32_t data0, data1;
1568
1569 data0 = QLAFX00_RD_REG(ha,
1570 QLAFX00_BAR1_BASE_ADDR_REG);
1571 data1 = QLAFX00_RD_REG(ha,
1572 QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1573
1574 data0 &= 0xffff0000;
1575 data1 &= 0x0000ffff;
1576
1577 QLAFX00_WR_REG(ha,
1578 QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1579 (data0 | data1));
1580 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1581 ha->mr.fw_reset_timer_tick =
1582 QLAFX00_MAX_RESET_INTERVAL;
b6511d99
AB		 1583 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1584 ha->mr.fw_reset_timer_tick =
1585 QLAFX00_MAX_RESET_INTERVAL;
8ae6d9c7
GM		 1586 }
1587 ha->mr.old_aenmbx0_state = aenmbx0;
1588 ha->mr.fw_reset_timer_tick--;
1589 }
71e56003
AB		 1590 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1591 /*
1592 * Critical temperature recovery to be
1593 * performed in timer routine
1594 */
1595 if (ha->mr.fw_critemp_timer_tick == 0) {
1596 tempc = QLAFX00_GET_TEMPERATURE(ha);
6ddcfef7 1597 ql_dbg(ql_dbg_timer, vha, 0x6012,
71e56003
AB		 1598 "ISPFx00(%s): Critical temp timer, "
1599 "current SOC temperature: %d\n",
1600 __func__, tempc);
1601 if (tempc < ha->mr.critical_temperature) {
1602 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1603 clear_bit(FX00_CRITEMP_RECOVERY,
1604 &vha->dpc_flags);
1605 qla2xxx_wake_dpc(vha);
1606 }
1607 ha->mr.fw_critemp_timer_tick =
1608 QLAFX00_CRITEMP_INTERVAL;
1609 } else {
1610 ha->mr.fw_critemp_timer_tick--;
1611 }
1612 }
8ae6d9c7
GM		 1613}
1614
1615/*
1616 * qlfx00a_reset_initialize
1617 * Re-initialize after a iSA device reset.
1618 *
1619 * Input:
1620 * ha = adapter block pointer.
1621 *
1622 * Returns:
1623 * 0 = success
1624 */
1625int
1626qlafx00_reset_initialize(scsi_qla_host_t *vha)
1627{
1628 struct qla_hw_data *ha = vha->hw;
1629
1630 if (vha->device_flags & DFLG_DEV_FAILED) {
1631 ql_dbg(ql_dbg_init, vha, 0x0142,
1632 "Device in failed state\n");
1633 return QLA_SUCCESS;
1634 }
1635
1636 ha->flags.mr_reset_hdlr_active = 1;
1637
1638 if (vha->flags.online) {
1639 scsi_block_requests(vha->host);
71e56003 1640 qlafx00_abort_isp_cleanup(vha, false);
8ae6d9c7
GM		 1641 }
1642
1643 ql_log(ql_log_info, vha, 0x0143,
1644 "(%s): succeeded.\n", __func__);
1645 ha->flags.mr_reset_hdlr_active = 0;
1646 return QLA_SUCCESS;
1647}
1648
1649/*
1650 * qlafx00_abort_isp
1651 * Resets ISP and aborts all outstanding commands.
1652 *
1653 * Input:
1654 * ha = adapter block pointer.
1655 *
1656 * Returns:
1657 * 0 = success
1658 */
1659int
1660qlafx00_abort_isp(scsi_qla_host_t *vha)
1661{
1662 struct qla_hw_data *ha = vha->hw;
1663
1664 if (vha->flags.online) {
1665 if (unlikely(pci_channel_offline(ha->pdev) &&
1666 ha->flags.pci_channel_io_perm_failure)) {
1667 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1668 return QLA_SUCCESS;
1669 }
1670
1671 scsi_block_requests(vha->host);
71e56003 1672 qlafx00_abort_isp_cleanup(vha, false);
e601d778
AB		 1673 } else {
1674 scsi_block_requests(vha->host);
1675 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1676 vha->qla_stats.total_isp_aborts++;
1677 ha->isp_ops->reset_chip(vha);
1678 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1679 /* Clear the Interrupts */
1680 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
8ae6d9c7
GM		 1681 }
1682
1683 ql_log(ql_log_info, vha, 0x0145,
1684 "(%s): succeeded.\n", __func__);
1685
1686 return QLA_SUCCESS;
1687}
1688
1689static inline fc_port_t*
1690qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1691{
1692 fc_port_t *fcport;
1693
1694 /* Check for matching device in remote port list. */
1695 fcport = NULL;
1696 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1697 if (fcport->tgt_id == tgt_id) {
1698 ql_dbg(ql_dbg_async, vha, 0x5072,
1699 "Matching fcport(%p) found with TGT-ID: 0x%x "
1700 "and Remote TGT_ID: 0x%x\n",
1701 fcport, fcport->tgt_id, tgt_id);
1702 break;
1703 }
1704 }
1705 return fcport;
1706}
1707
1708static void
1709qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1710{
1711 fc_port_t *fcport;
1712
1713 ql_log(ql_log_info, vha, 0x5073,
1714 "Detach TGT-ID: 0x%x\n", tgt_id);
1715
1716 fcport = qlafx00_get_fcport(vha, tgt_id);
1717 if (!fcport)
1718 return;
1719
1720 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1721
1722 return;
1723}
1724
1725int
1726qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1727{
1728 int rval = 0;
1729 uint32_t aen_code, aen_data;
1730
1731 aen_code = FCH_EVT_VENDOR_UNIQUE;
1732 aen_data = evt->u.aenfx.evtcode;
1733
1734 switch (evt->u.aenfx.evtcode) {
1735 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
1736 if (evt->u.aenfx.mbx[1] == 0) {
1737 if (evt->u.aenfx.mbx[2] == 1) {
1738 if (!vha->flags.fw_tgt_reported)
1739 vha->flags.fw_tgt_reported = 1;
1740 atomic_set(&vha->loop_down_timer, 0);
1741 atomic_set(&vha->loop_state, LOOP_UP);
1742 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1743 qla2xxx_wake_dpc(vha);
1744 } else if (evt->u.aenfx.mbx[2] == 2) {
1745 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1746 }
1747 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1748 if (evt->u.aenfx.mbx[2] == 1) {
1749 if (!vha->flags.fw_tgt_reported)
1750 vha->flags.fw_tgt_reported = 1;
1751 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1752 } else if (evt->u.aenfx.mbx[2] == 2) {
1753 vha->device_flags |= DFLG_NO_CABLE;
1754 qla2x00_mark_all_devices_lost(vha, 1);
1755 }
1756 }
1757 break;
1758 case QLAFX00_MBA_LINK_UP:
1759 aen_code = FCH_EVT_LINKUP;
1760 aen_data = 0;
1761 break;
1762 case QLAFX00_MBA_LINK_DOWN:
1763 aen_code = FCH_EVT_LINKDOWN;
1764 aen_data = 0;
1765 break;
71e56003
AB		 1766 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
1767 ql_log(ql_log_info, vha, 0x5082,
1768 "Process critical temperature event "
1769 "aenmb[0]: %x\n",
1770 evt->u.aenfx.evtcode);
1771 scsi_block_requests(vha->host);
1772 qlafx00_abort_isp_cleanup(vha, true);
1773 scsi_unblock_requests(vha->host);
1774 break;
8ae6d9c7
GM		 1775 }
1776
1777 fc_host_post_event(vha->host, fc_get_event_number(),
1778 aen_code, aen_data);
1779
1780 return rval;
1781}
1782
1783static void
1784qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1785{
1786 u64 port_name = 0, node_name = 0;
1787
1788 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1789 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1790
1791 fc_host_node_name(vha->host) = node_name;
1792 fc_host_port_name(vha->host) = port_name;
1793 if (!pinfo->port_type)
1794 vha->hw->current_topology = ISP_CFG_F;
1795 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1796 atomic_set(&vha->loop_state, LOOP_READY);
1797 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1798 atomic_set(&vha->loop_state, LOOP_DOWN);
1799 vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1800}
1801
1802static void
1803qla2x00_fxdisc_iocb_timeout(void *data)
1804{
1805 srb_t *sp = (srb_t *)data;
1806 struct srb_iocb *lio = &sp->u.iocb_cmd;
1807
1808 complete(&lio->u.fxiocb.fxiocb_comp);
1809}
1810
1811static void
1812qla2x00_fxdisc_sp_done(void *data, void *ptr, int res)
1813{
1814 srb_t *sp = (srb_t *)ptr;
1815 struct srb_iocb *lio = &sp->u.iocb_cmd;
1816
1817 complete(&lio->u.fxiocb.fxiocb_comp);
1818}
1819
1820int
1f8deefe 1821qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
8ae6d9c7
GM		 1822{
1823 srb_t *sp;
1824 struct srb_iocb *fdisc;
1825 int rval = QLA_FUNCTION_FAILED;
1826 struct qla_hw_data *ha = vha->hw;
1827 struct host_system_info *phost_info;
1828 struct register_host_info *preg_hsi;
1829 struct new_utsname *p_sysid = NULL;
1830 struct timeval tv;
1831
1832 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1833 if (!sp)
1834 goto done;
1835
1836 fdisc = &sp->u.iocb_cmd;
1837 switch (fx_type) {
1838 case FXDISC_GET_CONFIG_INFO:
1839 fdisc->u.fxiocb.flags =
1840 SRB_FXDISC_RESP_DMA_VALID;
1841 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1842 break;
1843 case FXDISC_GET_PORT_INFO:
1844 fdisc->u.fxiocb.flags =
1845 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1846 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1f8deefe 1847 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
8ae6d9c7
GM		 1848 break;
1849 case FXDISC_GET_TGT_NODE_INFO:
1850 fdisc->u.fxiocb.flags =
1851 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1852 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1f8deefe 1853 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
8ae6d9c7
GM		 1854 break;
1855 case FXDISC_GET_TGT_NODE_LIST:
1856 fdisc->u.fxiocb.flags =
1857 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1858 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1859 break;
1860 case FXDISC_REG_HOST_INFO:
1861 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1862 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1863 p_sysid = utsname();
1864 if (!p_sysid) {
1865 ql_log(ql_log_warn, vha, 0x303c,
0b1587b1 1866 "Not able to get the system information\n");
8ae6d9c7
GM		 1867 goto done_free_sp;
1868 }
1869 break;
1870 default:
1871 break;
1872 }
1873
1874 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1875 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1876 fdisc->u.fxiocb.req_len,
1877 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1878 if (!fdisc->u.fxiocb.req_addr)
1879 goto done_free_sp;
1880
1881 if (fx_type == FXDISC_REG_HOST_INFO) {
1882 preg_hsi = (struct register_host_info *)
1883 fdisc->u.fxiocb.req_addr;
1884 phost_info = &preg_hsi->hsi;
1885 memset(preg_hsi, 0, sizeof(struct register_host_info));
1886 phost_info->os_type = OS_TYPE_LINUX;
1887 strncpy(phost_info->sysname,
1888 p_sysid->sysname, SYSNAME_LENGTH);
1889 strncpy(phost_info->nodename,
1890 p_sysid->nodename, NODENAME_LENGTH);
1891 strncpy(phost_info->release,
1892 p_sysid->release, RELEASE_LENGTH);
1893 strncpy(phost_info->version,
1894 p_sysid->version, VERSION_LENGTH);
1895 strncpy(phost_info->machine,
1896 p_sysid->machine, MACHINE_LENGTH);
1897 strncpy(phost_info->domainname,
1898 p_sysid->domainname, DOMNAME_LENGTH);
1899 strncpy(phost_info->hostdriver,
1900 QLA2XXX_VERSION, VERSION_LENGTH);
1901 do_gettimeofday(&tv);
1902 preg_hsi->utc = (uint64_t)tv.tv_sec;
1903 ql_dbg(ql_dbg_init, vha, 0x0149,
1904 "ISP%04X: Host registration with firmware\n",
1905 ha->pdev->device);
1906 ql_dbg(ql_dbg_init, vha, 0x014a,
1907 "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1908 phost_info->os_type,
1909 phost_info->sysname,
1910 phost_info->nodename);
1911 ql_dbg(ql_dbg_init, vha, 0x014b,
1912 "release = '%s', version = '%s'\n",
1913 phost_info->release,
1914 phost_info->version);
1915 ql_dbg(ql_dbg_init, vha, 0x014c,
1916 "machine = '%s' "
1917 "domainname = '%s', hostdriver = '%s'\n",
1918 phost_info->machine,
1919 phost_info->domainname,
1920 phost_info->hostdriver);
1921 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1922 (uint8_t *)phost_info,
1923 sizeof(struct host_system_info));
1924 }
1925 }
1926
1927 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1928 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1929 fdisc->u.fxiocb.rsp_len,
1930 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1931 if (!fdisc->u.fxiocb.rsp_addr)
1932 goto done_unmap_req;
1933 }
1934
1935 sp->type = SRB_FXIOCB_DCMD;
1936 sp->name = "fxdisc";
1937 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1938 fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1f8deefe 1939 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
8ae6d9c7
GM		 1940 sp->done = qla2x00_fxdisc_sp_done;
1941
1942 rval = qla2x00_start_sp(sp);
1943 if (rval != QLA_SUCCESS)
1944 goto done_unmap_dma;
1945
1946 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1947
1948 if (fx_type == FXDISC_GET_CONFIG_INFO) {
1949 struct config_info_data *pinfo =
1950 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1951 memcpy(&vha->hw->mr.product_name, pinfo->product_name,
1952 sizeof(vha->hw->mr.product_name));
1953 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1954 sizeof(vha->hw->mr.symbolic_name));
1955 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1956 sizeof(vha->hw->mr.serial_num));
1957 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1958 sizeof(vha->hw->mr.hw_version));
1959 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1960 sizeof(vha->hw->mr.fw_version));
1961 strim(vha->hw->mr.fw_version);
1962 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1963 sizeof(vha->hw->mr.uboot_version));
1964 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1965 sizeof(vha->hw->mr.fru_serial_num));
f875cd4c
AB		 1966 vha->hw->mr.critical_temperature =
1967 (pinfo->nominal_temp_value) ?
1968 pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
1fe19ee4
AB		 1969 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1970 QLAFX00_EXTENDED_IO_EN_MASK) != 0;
8ae6d9c7
GM		 1971 } else if (fx_type == FXDISC_GET_PORT_INFO) {
1972 struct port_info_data *pinfo =
1973 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1974 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1975 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1976 vha->d_id.b.domain = pinfo->port_id[0];
1977 vha->d_id.b.area = pinfo->port_id[1];
1978 vha->d_id.b.al_pa = pinfo->port_id[2];
1979 qlafx00_update_host_attr(vha, pinfo);
1980 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1981 (uint8_t *)pinfo, 16);
1982 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1983 struct qlafx00_tgt_node_info *pinfo =
1984 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1985 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1986 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1987 fcport->port_type = FCT_TARGET;
1988 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1989 (uint8_t *)pinfo, 16);
1990 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1991 struct qlafx00_tgt_node_info *pinfo =
1992 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1993 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1994 (uint8_t *)pinfo, 16);
1995 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1996 }
1f8deefe 1997 rval = le32_to_cpu(fdisc->u.fxiocb.result);
8ae6d9c7
GM		 1998
1999done_unmap_dma:
2000 if (fdisc->u.fxiocb.rsp_addr)
2001 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
2002 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
2003
2004done_unmap_req:
2005 if (fdisc->u.fxiocb.req_addr)
2006 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
2007 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
2008done_free_sp:
2009 sp->free(vha, sp);
2010done:
2011 return rval;
2012}
2013
2014static void
2015qlafx00_abort_iocb_timeout(void *data)
2016{
2017 srb_t *sp = (srb_t *)data;
2018 struct srb_iocb *abt = &sp->u.iocb_cmd;
2019
1f8deefe 2020 abt->u.abt.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT);
8ae6d9c7
GM		 2021 complete(&abt->u.abt.comp);
2022}
2023
2024static void
2025qlafx00_abort_sp_done(void *data, void *ptr, int res)
2026{
2027 srb_t *sp = (srb_t *)ptr;
2028 struct srb_iocb *abt = &sp->u.iocb_cmd;
2029
2030 complete(&abt->u.abt.comp);
2031}
2032
2033static int
2034qlafx00_async_abt_cmd(srb_t *cmd_sp)
2035{
2036 scsi_qla_host_t *vha = cmd_sp->fcport->vha;
2037 fc_port_t *fcport = cmd_sp->fcport;
2038 struct srb_iocb *abt_iocb;
2039 srb_t *sp;
2040 int rval = QLA_FUNCTION_FAILED;
2041
2042 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
2043 if (!sp)
2044 goto done;
2045
2046 abt_iocb = &sp->u.iocb_cmd;
2047 sp->type = SRB_ABT_CMD;
2048 sp->name = "abort";
2049 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
2050 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
2051 sp->done = qlafx00_abort_sp_done;
2052 abt_iocb->timeout = qlafx00_abort_iocb_timeout;
2053 init_completion(&abt_iocb->u.abt.comp);
2054
2055 rval = qla2x00_start_sp(sp);
2056 if (rval != QLA_SUCCESS)
2057 goto done_free_sp;
2058
2059 ql_dbg(ql_dbg_async, vha, 0x507c,
2060 "Abort command issued - hdl=%x, target_id=%x\n",
2061 cmd_sp->handle, fcport->tgt_id);
2062
2063 wait_for_completion(&abt_iocb->u.abt.comp);
2064
2065 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
2066 QLA_SUCCESS : QLA_FUNCTION_FAILED;
2067
2068done_free_sp:
2069 sp->free(vha, sp);
2070done:
2071 return rval;
2072}
2073
2074int
2075qlafx00_abort_command(srb_t *sp)
2076{
2077 unsigned long flags = 0;
2078
2079 uint32_t handle;
2080 fc_port_t *fcport = sp->fcport;
2081 struct scsi_qla_host *vha = fcport->vha;
2082 struct qla_hw_data *ha = vha->hw;
2083 struct req_que *req = vha->req;
2084
2085 spin_lock_irqsave(&ha->hardware_lock, flags);
2086 for (handle = 1; handle < DEFAULT_OUTSTANDING_COMMANDS; handle++) {
2087 if (req->outstanding_cmds[handle] == sp)
2088 break;
2089 }
2090 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2091 if (handle == DEFAULT_OUTSTANDING_COMMANDS) {
2092 /* Command not found. */
2093 return QLA_FUNCTION_FAILED;
2094 }
2095 return qlafx00_async_abt_cmd(sp);
2096}
2097
2098/*
2099 * qlafx00_initialize_adapter
2100 * Initialize board.
2101 *
2102 * Input:
2103 * ha = adapter block pointer.
2104 *
2105 * Returns:
2106 * 0 = success
2107 */
2108int
2109qlafx00_initialize_adapter(scsi_qla_host_t *vha)
2110{
2111 int rval;
2112 struct qla_hw_data *ha = vha->hw;
71e56003 2113 uint32_t tempc;
8ae6d9c7
GM		 2114
2115 /* Clear adapter flags. */
2116 vha->flags.online = 0;
2117 ha->flags.chip_reset_done = 0;
2118 vha->flags.reset_active = 0;
2119 ha->flags.pci_channel_io_perm_failure = 0;
2120 ha->flags.eeh_busy = 0;
8ae6d9c7
GM		 2121 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2122 atomic_set(&vha->loop_state, LOOP_DOWN);
2123 vha->device_flags = DFLG_NO_CABLE;
2124 vha->dpc_flags = 0;
2125 vha->flags.management_server_logged_in = 0;
2126 vha->marker_needed = 0;
2127 ha->isp_abort_cnt = 0;
2128 ha->beacon_blink_led = 0;
2129
2130 set_bit(0, ha->req_qid_map);
2131 set_bit(0, ha->rsp_qid_map);
2132
2133 ql_dbg(ql_dbg_init, vha, 0x0147,
2134 "Configuring PCI space...\n");
2135
2136 rval = ha->isp_ops->pci_config(vha);
2137 if (rval) {
2138 ql_log(ql_log_warn, vha, 0x0148,
2139 "Unable to configure PCI space.\n");
2140 return rval;
2141 }
2142
2143 rval = qlafx00_init_fw_ready(vha);
2144 if (rval != QLA_SUCCESS)
2145 return rval;
2146
2147 qlafx00_save_queue_ptrs(vha);
2148
2149 rval = qlafx00_config_queues(vha);
2150 if (rval != QLA_SUCCESS)
2151 return rval;
2152
2153 /*
2154 * Allocate the array of outstanding commands
2155 * now that we know the firmware resources.
2156 */
2157 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2158 if (rval != QLA_SUCCESS)
2159 return rval;
2160
2161 rval = qla2x00_init_rings(vha);
2162 ha->flags.chip_reset_done = 1;
2163
71e56003
AB		 2164 tempc = QLAFX00_GET_TEMPERATURE(ha);
2165 ql_dbg(ql_dbg_init, vha, 0x0152,
2166 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2167 __func__, tempc);
2168
8ae6d9c7
GM		 2169 return rval;
2170}
2171
2172uint32_t
2173qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2174 char *buf)
2175{
2176 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2177 int rval = QLA_FUNCTION_FAILED;
2178 uint32_t state[1];
2179
2180 if (qla2x00_reset_active(vha))
2181 ql_log(ql_log_warn, vha, 0x70ce,
2182 "ISP reset active.\n");
2183 else if (!vha->hw->flags.eeh_busy) {
2184 rval = qlafx00_get_firmware_state(vha, state);
2185 }
2186 if (rval != QLA_SUCCESS)
2187 memset(state, -1, sizeof(state));
2188
2189 return state[0];
2190}
2191
2192void
2193qlafx00_get_host_speed(struct Scsi_Host *shost)
2194{
2195 struct qla_hw_data *ha = ((struct scsi_qla_host *)
2196 (shost_priv(shost)))->hw;
2197 u32 speed = FC_PORTSPEED_UNKNOWN;
2198
2199 switch (ha->link_data_rate) {
2200 case QLAFX00_PORT_SPEED_2G:
2201 speed = FC_PORTSPEED_2GBIT;
2202 break;
2203 case QLAFX00_PORT_SPEED_4G:
2204 speed = FC_PORTSPEED_4GBIT;
2205 break;
2206 case QLAFX00_PORT_SPEED_8G:
2207 speed = FC_PORTSPEED_8GBIT;
2208 break;
2209 case QLAFX00_PORT_SPEED_10G:
2210 speed = FC_PORTSPEED_10GBIT;
2211 break;
2212 }
2213 fc_host_speed(shost) = speed;
2214}
2215
2216/** QLAFX00 specific ISR implementation functions */
2217
2218static inline void
2219qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2220 uint32_t sense_len, struct rsp_que *rsp, int res)
2221{
2222 struct scsi_qla_host *vha = sp->fcport->vha;
2223 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2224 uint32_t track_sense_len;
2225
2226 SET_FW_SENSE_LEN(sp, sense_len);
2227
2228 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2229 sense_len = SCSI_SENSE_BUFFERSIZE;
2230
2231 SET_CMD_SENSE_LEN(sp, sense_len);
2232 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2233 track_sense_len = sense_len;
2234
2235 if (sense_len > par_sense_len)
2236 sense_len = par_sense_len;
2237
2238 memcpy(cp->sense_buffer, sense_data, sense_len);
2239
2240 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2241
2242 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2243 track_sense_len -= sense_len;
2244 SET_CMD_SENSE_LEN(sp, track_sense_len);
2245
2246 ql_dbg(ql_dbg_io, vha, 0x304d,
2247 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2248 sense_len, par_sense_len, track_sense_len);
2249 if (GET_FW_SENSE_LEN(sp) > 0) {
2250 rsp->status_srb = sp;
2251 cp->result = res;
2252 }
2253
2254 if (sense_len) {
2255 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2256 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n",
2257 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
2258 cp);
2259 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2260 cp->sense_buffer, sense_len);
2261 }
2262}
2263
2264static void
2265qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2266 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
1f8deefe 2267 __le16 sstatus, __le16 cpstatus)
8ae6d9c7
GM		 2268{
2269 struct srb_iocb *tmf;
2270
2271 tmf = &sp->u.iocb_cmd;
1f8deefe
SK		 2272 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2273 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2274 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
8ae6d9c7
GM		 2275 tmf->u.tmf.comp_status = cpstatus;
2276 sp->done(vha, sp, 0);
2277}
2278
2279static void
2280qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2281 struct abort_iocb_entry_fx00 *pkt)
2282{
2283 const char func[] = "ABT_IOCB";
2284 srb_t *sp;
2285 struct srb_iocb *abt;
2286
2287 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2288 if (!sp)
2289 return;
2290
2291 abt = &sp->u.iocb_cmd;
1f8deefe 2292 abt->u.abt.comp_status = pkt->tgt_id_sts;
8ae6d9c7
GM		 2293 sp->done(vha, sp, 0);
2294}
2295
2296static void
2297qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2298 struct ioctl_iocb_entry_fx00 *pkt)
2299{
2300 const char func[] = "IOSB_IOCB";
2301 srb_t *sp;
2302 struct fc_bsg_job *bsg_job;
2303 struct srb_iocb *iocb_job;
2304 int res;
2305 struct qla_mt_iocb_rsp_fx00 fstatus;
2306 uint8_t *fw_sts_ptr;
2307
2308 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2309 if (!sp)
2310 return;
2311
2312 if (sp->type == SRB_FXIOCB_DCMD) {
2313 iocb_job = &sp->u.iocb_cmd;
1f8deefe
SK		 2314 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2315 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2316 iocb_job->u.fxiocb.result = pkt->status;
8ae6d9c7
GM		 2317 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2318 iocb_job->u.fxiocb.req_data =
1f8deefe 2319 pkt->dataword_r;
8ae6d9c7
GM		 2320 } else {
2321 bsg_job = sp->u.bsg_job;
2322
2323 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2324
2325 fstatus.reserved_1 = pkt->reserved_0;
2326 fstatus.func_type = pkt->comp_func_num;
2327 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2328 fstatus.ioctl_data = pkt->dataword_r;
2329 fstatus.adapid = pkt->adapid;
2330 fstatus.adapid_hi = pkt->adapid_hi;
2331 fstatus.reserved_2 = pkt->reserved_1;
2332 fstatus.res_count = pkt->residuallen;
2333 fstatus.status = pkt->status;
2334 fstatus.seq_number = pkt->seq_no;
2335 memcpy(fstatus.reserved_3,
2336 pkt->reserved_2, 20 * sizeof(uint8_t));
2337
2338 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) +
2339 sizeof(struct fc_bsg_reply);
2340
2341 memcpy(fw_sts_ptr, (uint8_t *)&fstatus,
2342 sizeof(struct qla_mt_iocb_rsp_fx00));
2343 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2344 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2345
2346 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2347 sp->fcport->vha, 0x5080,
2348 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00));
2349
2350 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2351 sp->fcport->vha, 0x5074,
2352 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00));
2353
2354 res = bsg_job->reply->result = DID_OK << 16;
2355 bsg_job->reply->reply_payload_rcv_len =
2356 bsg_job->reply_payload.payload_len;
2357 }
2358 sp->done(vha, sp, res);
2359}
2360
2361/**
2362 * qlafx00_status_entry() - Process a Status IOCB entry.
2363 * @ha: SCSI driver HA context
2364 * @pkt: Entry pointer
2365 */
2366static void
2367qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2368{
2369 srb_t *sp;
2370 fc_port_t *fcport;
2371 struct scsi_cmnd *cp;
2372 struct sts_entry_fx00 *sts;
1f8deefe
SK		 2373 __le16 comp_status;
2374 __le16 scsi_status;
8ae6d9c7 2375 uint16_t ox_id;
1f8deefe 2376 __le16 lscsi_status;
8ae6d9c7
GM		 2377 int32_t resid;
2378 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2379 fw_resid_len;
2380 uint8_t *rsp_info = NULL, *sense_data = NULL;
2381 struct qla_hw_data *ha = vha->hw;
2382 uint32_t hindex, handle;
2383 uint16_t que;
2384 struct req_que *req;
2385 int logit = 1;
2386 int res = 0;
2387
2388 sts = (struct sts_entry_fx00 *) pkt;
2389
1f8deefe
SK		 2390 comp_status = sts->comp_status;
2391 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
8ae6d9c7
GM		 2392 hindex = sts->handle;
2393 handle = LSW(hindex);
2394
2395 que = MSW(hindex);
2396 req = ha->req_q_map[que];
2397
2398 /* Validate handle. */
2399 if (handle < req->num_outstanding_cmds)
2400 sp = req->outstanding_cmds[handle];
2401 else
2402 sp = NULL;
2403
2404 if (sp == NULL) {
2405 ql_dbg(ql_dbg_io, vha, 0x3034,
2406 "Invalid status handle (0x%x).\n", handle);
2407
2408 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2409 qla2xxx_wake_dpc(vha);
2410 return;
2411 }
2412
2413 if (sp->type == SRB_TM_CMD) {
2414 req->outstanding_cmds[handle] = NULL;
2415 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2416 scsi_status, comp_status);
2417 return;
2418 }
2419
2420 /* Fast path completion. */
2421 if (comp_status == CS_COMPLETE && scsi_status == 0) {
8ae6d9c7
GM		 2422 qla2x00_process_completed_request(vha, req, handle);
2423 return;
2424 }
2425
2426 req->outstanding_cmds[handle] = NULL;
2427 cp = GET_CMD_SP(sp);
2428 if (cp == NULL) {
2429 ql_dbg(ql_dbg_io, vha, 0x3048,
2430 "Command already returned (0x%x/%p).\n",
2431 handle, sp);
2432
2433 return;
2434 }
2435
1f8deefe 2436 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
8ae6d9c7
GM		 2437
2438 fcport = sp->fcport;
2439
2440 ox_id = 0;
2441 sense_len = par_sense_len = rsp_info_len = resid_len =
2442 fw_resid_len = 0;
1f8deefe
SK		 2443 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2444 sense_len = sts->sense_len;
2445 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2446 | (uint16_t)SS_RESIDUAL_OVER)))
8ae6d9c7 2447 resid_len = le32_to_cpu(sts->residual_len);
1f8deefe 2448 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
8ae6d9c7
GM		 2449 fw_resid_len = le32_to_cpu(sts->residual_len);
2450 rsp_info = sense_data = sts->data;
2451 par_sense_len = sizeof(sts->data);
2452
2453 /* Check for overrun. */
2454 if (comp_status == CS_COMPLETE &&
1f8deefe
SK		 2455 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2456 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
8ae6d9c7
GM		 2457
2458 /*
2459 * Based on Host and scsi status generate status code for Linux
2460 */
1f8deefe 2461 switch (le16_to_cpu(comp_status)) {
8ae6d9c7
GM		 2462 case CS_COMPLETE:
2463 case CS_QUEUE_FULL:
2464 if (scsi_status == 0) {
2465 res = DID_OK << 16;
2466 break;
2467 }
1f8deefe
SK		 2468 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2469 | (uint16_t)SS_RESIDUAL_OVER))) {
8ae6d9c7
GM		 2470 resid = resid_len;
2471 scsi_set_resid(cp, resid);
2472
2473 if (!lscsi_status &&
2474 ((unsigned)(scsi_bufflen(cp) - resid) <
2475 cp->underflow)) {
2476 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2477 "Mid-layer underflow "
2478 "detected (0x%x of 0x%x bytes).\n",
2479 resid, scsi_bufflen(cp));
2480
2481 res = DID_ERROR << 16;
2482 break;
2483 }
2484 }
1f8deefe 2485 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
8ae6d9c7 2486
1f8deefe
SK		 2487 if (lscsi_status ==
2488 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
8ae6d9c7
GM		 2489 ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2490 "QUEUE FULL detected.\n");
2491 break;
2492 }
2493 logit = 0;
1f8deefe 2494 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
8ae6d9c7
GM		 2495 break;
2496
2497 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1f8deefe 2498 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
8ae6d9c7
GM		 2499 break;
2500
2501 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2502 rsp, res);
2503 break;
2504
2505 case CS_DATA_UNDERRUN:
2506 /* Use F/W calculated residual length. */
2507 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2508 resid = fw_resid_len;
2509 else
2510 resid = resid_len;
2511 scsi_set_resid(cp, resid);
1f8deefe 2512 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
8ae6d9c7
GM		 2513 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2514 && fw_resid_len != resid_len) {
2515 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2516 "Dropped frame(s) detected "
2517 "(0x%x of 0x%x bytes).\n",
2518 resid, scsi_bufflen(cp));
2519
1f8deefe
SK		 2520 res = DID_ERROR << 16 |
2521 le16_to_cpu(lscsi_status);
8ae6d9c7
GM		 2522 goto check_scsi_status;
2523 }
2524
2525 if (!lscsi_status &&
2526 ((unsigned)(scsi_bufflen(cp) - resid) <
2527 cp->underflow)) {
2528 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2529 "Mid-layer underflow "
2530 "detected (0x%x of 0x%x bytes, "
2531 "cp->underflow: 0x%x).\n",
2532 resid, scsi_bufflen(cp), cp->underflow);
2533
2534 res = DID_ERROR << 16;
2535 break;
2536 }
1f8deefe
SK		 2537 } else if (lscsi_status !=
2538 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2539 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
8ae6d9c7
GM		 2540 /*
2541 * scsi status of task set and busy are considered
2542 * to be task not completed.
2543 */
2544
2545 ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2546 "Dropped frame(s) detected (0x%x "
2547 "of 0x%x bytes).\n", resid,
2548 scsi_bufflen(cp));
2549
1f8deefe 2550 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
8ae6d9c7
GM		 2551 goto check_scsi_status;
2552 } else {
2553 ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2554 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2555 scsi_status, lscsi_status);
2556 }
2557
1f8deefe 2558 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
8ae6d9c7
GM		 2559 logit = 0;
2560
2561check_scsi_status:
2562 /*
2563 * Check to see if SCSI Status is non zero. If so report SCSI
2564 * Status.
2565 */
2566 if (lscsi_status != 0) {
1f8deefe
SK		 2567 if (lscsi_status ==
2568 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
8ae6d9c7
GM		 2569 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2570 "QUEUE FULL detected.\n");
2571 logit = 1;
2572 break;
2573 }
1f8deefe
SK		 2574 if (lscsi_status !=
2575 cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
8ae6d9c7
GM		 2576 break;
2577
2578 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1f8deefe
SK		 2579 if (!(scsi_status &
2580 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
8ae6d9c7
GM		 2581 break;
2582
2583 qlafx00_handle_sense(sp, sense_data, par_sense_len,
2584 sense_len, rsp, res);
2585 }
2586 break;
2587
2588 case CS_PORT_LOGGED_OUT:
2589 case CS_PORT_CONFIG_CHG:
2590 case CS_PORT_BUSY:
2591 case CS_INCOMPLETE:
2592 case CS_PORT_UNAVAILABLE:
2593 case CS_TIMEOUT:
2594 case CS_RESET:
2595
2596 /*
2597 * We are going to have the fc class block the rport
2598 * while we try to recover so instruct the mid layer
2599 * to requeue until the class decides how to handle this.
2600 */
2601 res = DID_TRANSPORT_DISRUPTED << 16;
2602
2603 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2604 "Port down status: port-state=0x%x.\n",
2605 atomic_read(&fcport->state));
2606
2607 if (atomic_read(&fcport->state) == FCS_ONLINE)
2608 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2609 break;
2610
2611 case CS_ABORTED:
2612 res = DID_RESET << 16;
2613 break;
2614
2615 default:
2616 res = DID_ERROR << 16;
2617 break;
2618 }
2619
2620 if (logit)
2621 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
7b833558
OK		 2622 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d "
2623 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2624 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2625 "par_sense_len=0x%x, rsp_info_len=0x%x\n",
8ae6d9c7
GM		 2626 comp_status, scsi_status, res, vha->host_no,
2627 cp->device->id, cp->device->lun, fcport->tgt_id,
7b833558 2628 lscsi_status, cp->cmnd, scsi_bufflen(cp),
8ae6d9c7
GM		 2629 rsp_info_len, resid_len, fw_resid_len, sense_len,
2630 par_sense_len, rsp_info_len);
2631
8ae6d9c7
GM		 2632 if (rsp->status_srb == NULL)
2633 sp->done(ha, sp, res);
2634}
2635
2636/**
2637 * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2638 * @ha: SCSI driver HA context
2639 * @pkt: Entry pointer
2640 *
2641 * Extended sense data.
2642 */
2643static void
2644qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2645{
2646 uint8_t sense_sz = 0;
2647 struct qla_hw_data *ha = rsp->hw;
2648 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2649 srb_t *sp = rsp->status_srb;
2650 struct scsi_cmnd *cp;
2651 uint32_t sense_len;
2652 uint8_t *sense_ptr;
2653
2654 if (!sp) {
2655 ql_dbg(ql_dbg_io, vha, 0x3037,
2656 "no SP, sp = %p\n", sp);
2657 return;
2658 }
2659
2660 if (!GET_FW_SENSE_LEN(sp)) {
2661 ql_dbg(ql_dbg_io, vha, 0x304b,
2662 "no fw sense data, sp = %p\n", sp);
2663 return;
2664 }
2665 cp = GET_CMD_SP(sp);
2666 if (cp == NULL) {
2667 ql_log(ql_log_warn, vha, 0x303b,
2668 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2669
2670 rsp->status_srb = NULL;
2671 return;
2672 }
2673
2674 if (!GET_CMD_SENSE_LEN(sp)) {
2675 ql_dbg(ql_dbg_io, vha, 0x304c,
2676 "no sense data, sp = %p\n", sp);
2677 } else {
2678 sense_len = GET_CMD_SENSE_LEN(sp);
2679 sense_ptr = GET_CMD_SENSE_PTR(sp);
2680 ql_dbg(ql_dbg_io, vha, 0x304f,
2681 "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2682 sp, sense_len, sense_ptr);
2683
2684 if (sense_len > sizeof(pkt->data))
2685 sense_sz = sizeof(pkt->data);
2686 else
2687 sense_sz = sense_len;
2688
2689 /* Move sense data. */
2690 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2691 (uint8_t *)pkt, sizeof(sts_cont_entry_t));
2692 memcpy(sense_ptr, pkt->data, sense_sz);
2693 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2694 sense_ptr, sense_sz);
2695
2696 sense_len -= sense_sz;
2697 sense_ptr += sense_sz;
2698
2699 SET_CMD_SENSE_PTR(sp, sense_ptr);
2700 SET_CMD_SENSE_LEN(sp, sense_len);
2701 }
2702 sense_len = GET_FW_SENSE_LEN(sp);
2703 sense_len = (sense_len > sizeof(pkt->data)) ?
2704 (sense_len - sizeof(pkt->data)) : 0;
2705 SET_FW_SENSE_LEN(sp, sense_len);
2706
2707 /* Place command on done queue. */
2708 if (sense_len == 0) {
2709 rsp->status_srb = NULL;
2710 sp->done(ha, sp, cp->result);
2711 }
2712}
2713
2714/**
2715 * qlafx00_multistatus_entry() - Process Multi response queue entries.
2716 * @ha: SCSI driver HA context
2717 */
2718static void
2719qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2720 struct rsp_que *rsp, void *pkt)
2721{
2722 srb_t *sp;
2723 struct multi_sts_entry_fx00 *stsmfx;
2724 struct qla_hw_data *ha = vha->hw;
2725 uint32_t handle, hindex, handle_count, i;
2726 uint16_t que;
2727 struct req_que *req;
1f8deefe 2728 __le32 *handle_ptr;
8ae6d9c7
GM		 2729
2730 stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2731
2732 handle_count = stsmfx->handle_count;
2733
2734 if (handle_count > MAX_HANDLE_COUNT) {
2735 ql_dbg(ql_dbg_io, vha, 0x3035,
2736 "Invalid handle count (0x%x).\n", handle_count);
2737 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2738 qla2xxx_wake_dpc(vha);
2739 return;
2740 }
2741
1f8deefe 2742 handle_ptr = &stsmfx->handles[0];
8ae6d9c7
GM		 2743
2744 for (i = 0; i < handle_count; i++) {
2745 hindex = le32_to_cpu(*handle_ptr);
2746 handle = LSW(hindex);
2747 que = MSW(hindex);
2748 req = ha->req_q_map[que];
2749
2750 /* Validate handle. */
2751 if (handle < req->num_outstanding_cmds)
2752 sp = req->outstanding_cmds[handle];
2753 else
2754 sp = NULL;
2755
2756 if (sp == NULL) {
2757 ql_dbg(ql_dbg_io, vha, 0x3044,
2758 "Invalid status handle (0x%x).\n", handle);
2759 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2760 qla2xxx_wake_dpc(vha);
2761 return;
2762 }
2763 qla2x00_process_completed_request(vha, req, handle);
2764 handle_ptr++;
2765 }
2766}
2767
2768/**
2769 * qlafx00_error_entry() - Process an error entry.
2770 * @ha: SCSI driver HA context
2771 * @pkt: Entry pointer
2772 */
2773static void
2774qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2775 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype)
2776{
2777 srb_t *sp;
2778 struct qla_hw_data *ha = vha->hw;
2779 const char func[] = "ERROR-IOCB";
2780 uint16_t que = MSW(pkt->handle);
2781 struct req_que *req = NULL;
2782 int res = DID_ERROR << 16;
2783
2784 ql_dbg(ql_dbg_async, vha, 0x507f,
2785 "type of error status in response: 0x%x\n", estatus);
2786
2787 req = ha->req_q_map[que];
2788
2789 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2790 if (sp) {
2791 sp->done(ha, sp, res);
2792 return;
2793 }
2794
2795 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2796 qla2xxx_wake_dpc(vha);
2797}
2798
2799/**
2800 * qlafx00_process_response_queue() - Process response queue entries.
2801 * @ha: SCSI driver HA context
2802 */
2803static void
2804qlafx00_process_response_queue(struct scsi_qla_host *vha,
2805 struct rsp_que *rsp)
2806{
2807 struct sts_entry_fx00 *pkt;
2808 response_t *lptr;
2809
1f8deefe 2810 while (RD_REG_DWORD((void __iomem *)&(rsp->ring_ptr->signature)) !=
8ae6d9c7
GM		 2811 RESPONSE_PROCESSED) {
2812 lptr = rsp->ring_ptr;
1f8deefe
SK		 2813 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2814 sizeof(rsp->rsp_pkt));
8ae6d9c7
GM		 2815 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2816
2817 rsp->ring_index++;
2818 if (rsp->ring_index == rsp->length) {
2819 rsp->ring_index = 0;
2820 rsp->ring_ptr = rsp->ring;
2821 } else {
2822 rsp->ring_ptr++;
2823 }
2824
2825 if (pkt->entry_status != 0 &&
2826 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2827 qlafx00_error_entry(vha, rsp,
2828 (struct sts_entry_fx00 *)pkt, pkt->entry_status,
2829 pkt->entry_type);
2830 goto next_iter;
2831 continue;
2832 }
2833
2834 switch (pkt->entry_type) {
2835 case STATUS_TYPE_FX00:
2836 qlafx00_status_entry(vha, rsp, pkt);
2837 break;
2838
2839 case STATUS_CONT_TYPE_FX00:
2840 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2841 break;
2842
2843 case MULTI_STATUS_TYPE_FX00:
2844 qlafx00_multistatus_entry(vha, rsp, pkt);
2845 break;
2846
2847 case ABORT_IOCB_TYPE_FX00:
2848 qlafx00_abort_iocb_entry(vha, rsp->req,
2849 (struct abort_iocb_entry_fx00 *)pkt);
2850 break;
2851
2852 case IOCTL_IOSB_TYPE_FX00:
2853 qlafx00_ioctl_iosb_entry(vha, rsp->req,
2854 (struct ioctl_iocb_entry_fx00 *)pkt);
2855 break;
2856 default:
2857 /* Type Not Supported. */
2858 ql_dbg(ql_dbg_async, vha, 0x5081,
2859 "Received unknown response pkt type %x "
2860 "entry status=%x.\n",
2861 pkt->entry_type, pkt->entry_status);
2862 break;
2863 }
2864next_iter:
1f8deefe
SK		 2865 WRT_REG_DWORD((void __iomem *)&lptr->signature,
2866 RESPONSE_PROCESSED);
8ae6d9c7
GM		 2867 wmb();
2868 }
2869
2870 /* Adjust ring index */
2871 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2872}
2873
2874/**
2875 * qlafx00_async_event() - Process aynchronous events.
2876 * @ha: SCSI driver HA context
2877 */
2878static void
2879qlafx00_async_event(scsi_qla_host_t *vha)
2880{
2881 struct qla_hw_data *ha = vha->hw;
2882 struct device_reg_fx00 __iomem *reg;
2883 int data_size = 1;
2884
2885 reg = &ha->iobase->ispfx00;
2886 /* Setup to process RIO completion. */
2887 switch (ha->aenmb[0]) {
2888 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */
2889 ql_log(ql_log_warn, vha, 0x5079,
2890 "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2891 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2892 break;
2893
2894 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */
2895 ql_dbg(ql_dbg_async, vha, 0x5076,
2896 "Asynchronous FW shutdown requested.\n");
2897 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2898 qla2xxx_wake_dpc(vha);
2899 break;
2900
2901 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
2902 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2903 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2904 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2905 ql_dbg(ql_dbg_async, vha, 0x5077,
2906 "Asynchronous port Update received "
2907 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2908 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2909 data_size = 4;
2910 break;
71e56003
AB		 2911
2912 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */
4881d095
AB		 2913 ql_log(ql_log_info, vha, 0x5085,
2914 "Asynchronous over temperature event received "
2915 "aenmb[0]: %x\n",
2916 ha->aenmb[0]);
2917 break;
2918
2919 case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */
2920 ql_log(ql_log_info, vha, 0x5086,
2921 "Asynchronous normal temperature event received "
2922 "aenmb[0]: %x\n",
2923 ha->aenmb[0]);
2924 break;
2925
71e56003
AB		 2926 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
2927 ql_log(ql_log_info, vha, 0x5083,
2928 "Asynchronous critical temperature event received "
2929 "aenmb[0]: %x\n",
2930 ha->aenmb[0]);
71e56003
AB		 2931 break;
2932
8ae6d9c7
GM		 2933 default:
2934 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2935 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2936 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2937 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2938 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2939 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2940 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2941 ql_dbg(ql_dbg_async, vha, 0x5078,
2942 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2943 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2944 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2945 break;
2946 }
2947 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2948 (uint32_t *)ha->aenmb, data_size);
2949}
2950
2951/**
2952 *
2953 * qlafx00x_mbx_completion() - Process mailbox command completions.
2954 * @ha: SCSI driver HA context
2955 * @mb16: Mailbox16 register
2956 */
2957static void
2958qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2959{
2960 uint16_t cnt;
2961 uint16_t __iomem *wptr;
2962 struct qla_hw_data *ha = vha->hw;
2963 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2964
2965 if (!ha->mcp32)
2966 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2967
2968 /* Load return mailbox registers. */
2969 ha->flags.mbox_int = 1;
2970 ha->mailbox_out32[0] = mb0;
2971 wptr = (uint16_t __iomem *)&reg->mailbox17;
2972
2973 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2974 ha->mailbox_out32[cnt] = RD_REG_WORD(wptr);
2975 wptr++;
2976 }
2977}
2978
2979/**
2980 * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2981 * @irq:
2982 * @dev_id: SCSI driver HA context
2983 *
2984 * Called by system whenever the host adapter generates an interrupt.
2985 *
2986 * Returns handled flag.
2987 */
2988irqreturn_t
2989qlafx00_intr_handler(int irq, void *dev_id)
2990{
2991 scsi_qla_host_t *vha;
2992 struct qla_hw_data *ha;
2993 struct device_reg_fx00 __iomem *reg;
2994 int status;
2995 unsigned long iter;
2996 uint32_t stat;
2997 uint32_t mb[8];
2998 struct rsp_que *rsp;
2999 unsigned long flags;
3000 uint32_t clr_intr = 0;
3001
3002 rsp = (struct rsp_que *) dev_id;
3003 if (!rsp) {
3004 ql_log(ql_log_info, NULL, 0x507d,
3005 "%s: NULL response queue pointer.\n", __func__);
3006 return IRQ_NONE;
3007 }
3008
3009 ha = rsp->hw;
3010 reg = &ha->iobase->ispfx00;
3011 status = 0;
3012
3013 if (unlikely(pci_channel_offline(ha->pdev)))
3014 return IRQ_HANDLED;
3015
3016 spin_lock_irqsave(&ha->hardware_lock, flags);
3017 vha = pci_get_drvdata(ha->pdev);
3018 for (iter = 50; iter--; clr_intr = 0) {
3019 stat = QLAFX00_RD_INTR_REG(ha);
f3ddac19
CD		 3020 if (qla2x00_check_reg_for_disconnect(vha, stat))
3021 break;
8ae6d9c7
GM		 3022 if ((stat & QLAFX00_HST_INT_STS_BITS) == 0)
3023 break;
3024
3025 switch (stat & QLAFX00_HST_INT_STS_BITS) {
3026 case QLAFX00_INTR_MB_CMPLT:
3027 case QLAFX00_INTR_MB_RSP_CMPLT:
3028 case QLAFX00_INTR_MB_ASYNC_CMPLT:
3029 case QLAFX00_INTR_ALL_CMPLT:
3030 mb[0] = RD_REG_WORD(&reg->mailbox16);
3031 qlafx00_mbx_completion(vha, mb[0]);
3032 status |= MBX_INTERRUPT;
3033 clr_intr |= QLAFX00_INTR_MB_CMPLT;
3034 break;
3035 case QLAFX00_INTR_ASYNC_CMPLT:
3036 case QLAFX00_INTR_RSP_ASYNC_CMPLT:
3037 ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
3038 qlafx00_async_event(vha);
3039 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
3040 break;
3041 case QLAFX00_INTR_RSP_CMPLT:
3042 qlafx00_process_response_queue(vha, rsp);
3043 clr_intr |= QLAFX00_INTR_RSP_CMPLT;
3044 break;
3045 default:
3046 ql_dbg(ql_dbg_async, vha, 0x507a,
3047 "Unrecognized interrupt type (%d).\n", stat);
3048 break;
3049 }
3050 QLAFX00_CLR_INTR_REG(ha, clr_intr);
3051 QLAFX00_RD_INTR_REG(ha);
3052 }
36439832 3053
3054 qla2x00_handle_mbx_completion(ha, status);
8ae6d9c7
GM		 3055 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3056
8ae6d9c7
GM		 3057 return IRQ_HANDLED;
3058}
3059
3060/** QLAFX00 specific IOCB implementation functions */
3061
3062static inline cont_a64_entry_t *
3063qlafx00_prep_cont_type1_iocb(struct req_que *req,
3064 cont_a64_entry_t *lcont_pkt)
3065{
3066 cont_a64_entry_t *cont_pkt;
3067
3068 /* Adjust ring index. */
3069 req->ring_index++;
3070 if (req->ring_index == req->length) {
3071 req->ring_index = 0;
3072 req->ring_ptr = req->ring;
3073 } else {
3074 req->ring_ptr++;
3075 }
3076
3077 cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
3078
3079 /* Load packet defaults. */
1f8deefe 3080 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
8ae6d9c7
GM		 3081
3082 return cont_pkt;
3083}
3084
3085static inline void
3086qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
3087 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
3088{
3089 uint16_t avail_dsds;
1f8deefe 3090 __le32 *cur_dsd;
8ae6d9c7
GM		 3091 scsi_qla_host_t *vha;
3092 struct scsi_cmnd *cmd;
3093 struct scatterlist *sg;
3094 int i, cont;
3095 struct req_que *req;
3096 cont_a64_entry_t lcont_pkt;
3097 cont_a64_entry_t *cont_pkt;
3098
3099 vha = sp->fcport->vha;
3100 req = vha->req;
3101
3102 cmd = GET_CMD_SP(sp);
3103 cont = 0;
3104 cont_pkt = NULL;
3105
3106 /* Update entry type to indicate Command Type 3 IOCB */
1f8deefe 3107 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
8ae6d9c7
GM		 3108
3109 /* No data transfer */
3110 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
3111 lcmd_pkt->byte_count = __constant_cpu_to_le32(0);
3112 return;
3113 }
3114
3115 /* Set transfer direction */
3116 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
378c538d 3117 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
8ae6d9c7
GM		 3118 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3119 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
378c538d 3120 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
8ae6d9c7
GM		 3121 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3122 }
3123
3124 /* One DSD is available in the Command Type 3 IOCB */
3125 avail_dsds = 1;
1f8deefe 3126 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
8ae6d9c7
GM		 3127
3128 /* Load data segments */
3129 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3130 dma_addr_t sle_dma;
3131
3132 /* Allocate additional continuation packets? */
3133 if (avail_dsds == 0) {
3134 /*
3135 * Five DSDs are available in the Continuation
3136 * Type 1 IOCB.
3137 */
3138 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3139 cont_pkt =
3140 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
1f8deefe 3141 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
8ae6d9c7
GM		 3142 avail_dsds = 5;
3143 cont = 1;
3144 }
3145
3146 sle_dma = sg_dma_address(sg);
3147 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3148 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3149 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3150 avail_dsds--;
3151 if (avail_dsds == 0 && cont == 1) {
3152 cont = 0;
3153 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3154 REQUEST_ENTRY_SIZE);
3155 }
3156
3157 }
3158 if (avail_dsds != 0 && cont == 1) {
3159 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3160 REQUEST_ENTRY_SIZE);
3161 }
3162}
3163
3164/**
3165 * qlafx00_start_scsi() - Send a SCSI command to the ISP
3166 * @sp: command to send to the ISP
3167 *
3168 * Returns non-zero if a failure occurred, else zero.
3169 */
3170int
3171qlafx00_start_scsi(srb_t *sp)
3172{
3173 int ret, nseg;
3174 unsigned long flags;
3175 uint32_t index;
3176 uint32_t handle;
3177 uint16_t cnt;
3178 uint16_t req_cnt;
3179 uint16_t tot_dsds;
3180 struct req_que *req = NULL;
3181 struct rsp_que *rsp = NULL;
3182 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3183 struct scsi_qla_host *vha = sp->fcport->vha;
3184 struct qla_hw_data *ha = vha->hw;
3185 struct cmd_type_7_fx00 *cmd_pkt;
3186 struct cmd_type_7_fx00 lcmd_pkt;
3187 struct scsi_lun llun;
3188 char tag[2];
3189
3190 /* Setup device pointers. */
3191 ret = 0;
3192
3193 rsp = ha->rsp_q_map[0];
3194 req = vha->req;
3195
3196 /* So we know we haven't pci_map'ed anything yet */
3197 tot_dsds = 0;
3198
3199 /* Forcing marker needed for now */
3200 vha->marker_needed = 0;
3201
3202 /* Send marker if required */
3203 if (vha->marker_needed != 0) {
3204 if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
3205 QLA_SUCCESS)
3206 return QLA_FUNCTION_FAILED;
3207 vha->marker_needed = 0;
3208 }
3209
3210 /* Acquire ring specific lock */
3211 spin_lock_irqsave(&ha->hardware_lock, flags);
3212
3213 /* Check for room in outstanding command list. */
3214 handle = req->current_outstanding_cmd;
3215 for (index = 1; index < req->num_outstanding_cmds; index++) {
3216 handle++;
3217 if (handle == req->num_outstanding_cmds)
3218 handle = 1;
3219 if (!req->outstanding_cmds[handle])
3220 break;
3221 }
3222 if (index == req->num_outstanding_cmds)
3223 goto queuing_error;
3224
3225 /* Map the sg table so we have an accurate count of sg entries needed */
3226 if (scsi_sg_count(cmd)) {
3227 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3228 scsi_sg_count(cmd), cmd->sc_data_direction);
3229 if (unlikely(!nseg))
3230 goto queuing_error;
3231 } else
3232 nseg = 0;
3233
3234 tot_dsds = nseg;
3235 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3236 if (req->cnt < (req_cnt + 2)) {
3237 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3238
3239 if (req->ring_index < cnt)
3240 req->cnt = cnt - req->ring_index;
3241 else
3242 req->cnt = req->length -
3243 (req->ring_index - cnt);
3244 if (req->cnt < (req_cnt + 2))
3245 goto queuing_error;
3246 }
3247
3248 /* Build command packet. */
3249 req->current_outstanding_cmd = handle;
3250 req->outstanding_cmds[handle] = sp;
3251 sp->handle = handle;
3252 cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3253 req->cnt -= req_cnt;
3254
3255 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3256
3257 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3258
3259 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3260 lcmd_pkt.handle_hi = 0;
3261 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3262 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3263
3264 int_to_scsilun(cmd->device->lun, &llun);
3265 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3266 sizeof(lcmd_pkt.lun));
3267
3268 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
3269 if (scsi_populate_tag_msg(cmd, tag)) {
3270 switch (tag[0]) {
3271 case HEAD_OF_QUEUE_TAG:
3272 lcmd_pkt.task = TSK_HEAD_OF_QUEUE;
3273 break;
3274 case ORDERED_QUEUE_TAG:
3275 lcmd_pkt.task = TSK_ORDERED;
3276 break;
3277 }
3278 }
3279
3280 /* Load SCSI command packet. */
3281 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3282 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3283
3284 /* Build IOCB segments */
3285 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3286
3287 /* Set total data segment count. */
3288 lcmd_pkt.entry_count = (uint8_t)req_cnt;
3289
3290 /* Specify response queue number where completion should happen */
3291 lcmd_pkt.entry_status = (uint8_t) rsp->id;
3292
3293 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3294 (uint8_t *)cmd->cmnd, cmd->cmd_len);
3295 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3296 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE);
3297
3298 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3299 wmb();
3300
3301 /* Adjust ring index. */
3302 req->ring_index++;
3303 if (req->ring_index == req->length) {
3304 req->ring_index = 0;
3305 req->ring_ptr = req->ring;
3306 } else
3307 req->ring_ptr++;
3308
3309 sp->flags |= SRB_DMA_VALID;
3310
3311 /* Set chip new ring index. */
3312 WRT_REG_DWORD(req->req_q_in, req->ring_index);
3313 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3314
3315 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3316 return QLA_SUCCESS;
3317
3318queuing_error:
3319 if (tot_dsds)
3320 scsi_dma_unmap(cmd);
3321
3322 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3323
3324 return QLA_FUNCTION_FAILED;
3325}
3326
3327void
3328qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3329{
3330 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3331 scsi_qla_host_t *vha = sp->fcport->vha;
3332 struct req_que *req = vha->req;
3333 struct tsk_mgmt_entry_fx00 tm_iocb;
3334 struct scsi_lun llun;
3335
3336 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3337 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3338 tm_iocb.entry_count = 1;
3339 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3340 tm_iocb.handle_hi = 0;
3341 tm_iocb.timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
3342 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3343 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
1f8deefe 3344 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
8ae6d9c7
GM		 3345 int_to_scsilun(fxio->u.tmf.lun, &llun);
3346 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3347 sizeof(struct scsi_lun));
3348 }
3349
1f8deefe 3350 memcpy((void *)ptm_iocb, &tm_iocb,
8ae6d9c7
GM		 3351 sizeof(struct tsk_mgmt_entry_fx00));
3352 wmb();
3353}
3354
3355void
3356qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3357{
3358 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3359 scsi_qla_host_t *vha = sp->fcport->vha;
3360 struct req_que *req = vha->req;
3361 struct abort_iocb_entry_fx00 abt_iocb;
3362
3363 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3364 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3365 abt_iocb.entry_count = 1;
3366 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3367 abt_iocb.abort_handle =
3368 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3369 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3370 abt_iocb.req_que_no = cpu_to_le16(req->id);
3371
1f8deefe 3372 memcpy((void *)pabt_iocb, &abt_iocb,
8ae6d9c7
GM		 3373 sizeof(struct abort_iocb_entry_fx00));
3374 wmb();
3375}
3376
3377void
3378qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3379{
3380 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3381 struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3382 struct fc_bsg_job *bsg_job;
3383 struct fxdisc_entry_fx00 fx_iocb;
3384 uint8_t entry_cnt = 1;
3385
3386 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3387 fx_iocb.entry_type = FX00_IOCB_TYPE;
3388 fx_iocb.handle = cpu_to_le32(sp->handle);
3389 fx_iocb.entry_count = entry_cnt;
3390
3391 if (sp->type == SRB_FXIOCB_DCMD) {
3392 fx_iocb.func_num =
1f8deefe
SK		 3393 sp->u.iocb_cmd.u.fxiocb.req_func_type;
3394 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3395 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3396 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3397 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3398 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
8ae6d9c7
GM		 3399
3400 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3401 fx_iocb.req_dsdcnt = cpu_to_le16(1);
3402 fx_iocb.req_xfrcnt =
3403 cpu_to_le16(fxio->u.fxiocb.req_len);
3404 fx_iocb.dseg_rq_address[0] =
3405 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3406 fx_iocb.dseg_rq_address[1] =
3407 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3408 fx_iocb.dseg_rq_len =
3409 cpu_to_le32(fxio->u.fxiocb.req_len);
3410 }
3411
3412 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3413 fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3414 fx_iocb.rsp_xfrcnt =
3415 cpu_to_le16(fxio->u.fxiocb.rsp_len);
3416 fx_iocb.dseg_rsp_address[0] =
3417 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3418 fx_iocb.dseg_rsp_address[1] =
3419 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3420 fx_iocb.dseg_rsp_len =
3421 cpu_to_le32(fxio->u.fxiocb.rsp_len);
3422 }
3423
3424 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
1f8deefe 3425 fx_iocb.dataword = fxio->u.fxiocb.req_data;
8ae6d9c7
GM		 3426 }
3427 fx_iocb.flags = fxio->u.fxiocb.flags;
3428 } else {
3429 struct scatterlist *sg;
3430 bsg_job = sp->u.bsg_job;
3431 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3432 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
3433
3434 fx_iocb.func_num = piocb_rqst->func_type;
3435 fx_iocb.adapid = piocb_rqst->adapid;
3436 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3437 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3438 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3439 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3440 fx_iocb.dataword = piocb_rqst->dataword;
1f8deefe
SK		 3441 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3442 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
8ae6d9c7
GM		 3443
3444 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3445 int avail_dsds, tot_dsds;
3446 cont_a64_entry_t lcont_pkt;
3447 cont_a64_entry_t *cont_pkt = NULL;
1f8deefe 3448 __le32 *cur_dsd;
8ae6d9c7
GM		 3449 int index = 0, cont = 0;
3450
3451 fx_iocb.req_dsdcnt =
3452 cpu_to_le16(bsg_job->request_payload.sg_cnt);
3453 tot_dsds =
1f8deefe
SK		 3454 bsg_job->request_payload.sg_cnt;
3455 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
8ae6d9c7
GM		 3456 avail_dsds = 1;
3457 for_each_sg(bsg_job->request_payload.sg_list, sg,
3458 tot_dsds, index) {
3459 dma_addr_t sle_dma;
3460
3461 /* Allocate additional continuation packets? */
3462 if (avail_dsds == 0) {
3463 /*
3464 * Five DSDs are available in the Cont.
3465 * Type 1 IOCB.
3466 */
3467 memset(&lcont_pkt, 0,
3468 REQUEST_ENTRY_SIZE);
3469 cont_pkt =
3470 qlafx00_prep_cont_type1_iocb(
3471 sp->fcport->vha->req,
3472 &lcont_pkt);
1f8deefe 3473 cur_dsd = (__le32 *)
8ae6d9c7
GM		 3474 lcont_pkt.dseg_0_address;
3475 avail_dsds = 5;
3476 cont = 1;
3477 entry_cnt++;
3478 }
3479
3480 sle_dma = sg_dma_address(sg);
3481 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3482 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3483 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3484 avail_dsds--;
3485
3486 if (avail_dsds == 0 && cont == 1) {
3487 cont = 0;
3488 memcpy_toio(
3489 (void __iomem *)cont_pkt,
3490 &lcont_pkt, REQUEST_ENTRY_SIZE);
3491 ql_dump_buffer(
3492 ql_dbg_user + ql_dbg_verbose,
3493 sp->fcport->vha, 0x3042,
3494 (uint8_t *)&lcont_pkt,
3495 REQUEST_ENTRY_SIZE);
3496 }
3497 }
3498 if (avail_dsds != 0 && cont == 1) {
3499 memcpy_toio((void __iomem *)cont_pkt,
3500 &lcont_pkt, REQUEST_ENTRY_SIZE);
3501 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3502 sp->fcport->vha, 0x3043,
3503 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3504 }
3505 }
3506
3507 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3508 int avail_dsds, tot_dsds;
3509 cont_a64_entry_t lcont_pkt;
3510 cont_a64_entry_t *cont_pkt = NULL;
1f8deefe 3511 __le32 *cur_dsd;
8ae6d9c7
GM		 3512 int index = 0, cont = 0;
3513
3514 fx_iocb.rsp_dsdcnt =
3515 cpu_to_le16(bsg_job->reply_payload.sg_cnt);
1f8deefe
SK		 3516 tot_dsds = bsg_job->reply_payload.sg_cnt;
3517 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
8ae6d9c7
GM		 3518 avail_dsds = 1;
3519
3520 for_each_sg(bsg_job->reply_payload.sg_list, sg,
3521 tot_dsds, index) {
3522 dma_addr_t sle_dma;
3523
3524 /* Allocate additional continuation packets? */
3525 if (avail_dsds == 0) {
3526 /*
3527 * Five DSDs are available in the Cont.
3528 * Type 1 IOCB.
3529 */
3530 memset(&lcont_pkt, 0,
3531 REQUEST_ENTRY_SIZE);
3532 cont_pkt =
3533 qlafx00_prep_cont_type1_iocb(
3534 sp->fcport->vha->req,
3535 &lcont_pkt);
1f8deefe 3536 cur_dsd = (__le32 *)
8ae6d9c7
GM		 3537 lcont_pkt.dseg_0_address;
3538 avail_dsds = 5;
3539 cont = 1;
3540 entry_cnt++;
3541 }
3542
3543 sle_dma = sg_dma_address(sg);
3544 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3545 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3546 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3547 avail_dsds--;
3548
3549 if (avail_dsds == 0 && cont == 1) {
3550 cont = 0;
3551 memcpy_toio((void __iomem *)cont_pkt,
3552 &lcont_pkt,
3553 REQUEST_ENTRY_SIZE);
3554 ql_dump_buffer(
3555 ql_dbg_user + ql_dbg_verbose,
3556 sp->fcport->vha, 0x3045,
3557 (uint8_t *)&lcont_pkt,
3558 REQUEST_ENTRY_SIZE);
3559 }
3560 }
3561 if (avail_dsds != 0 && cont == 1) {
3562 memcpy_toio((void __iomem *)cont_pkt,
3563 &lcont_pkt, REQUEST_ENTRY_SIZE);
3564 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3565 sp->fcport->vha, 0x3046,
3566 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3567 }
3568 }
3569
3570 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
1f8deefe 3571 fx_iocb.dataword = piocb_rqst->dataword;
8ae6d9c7
GM		 3572 fx_iocb.flags = piocb_rqst->flags;
3573 fx_iocb.entry_count = entry_cnt;
3574 }
3575
3576 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3577 sp->fcport->vha, 0x3047,
3578 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00));
3579
1f8deefe 3580 memcpy((void *)pfxiocb, &fx_iocb,
8ae6d9c7
GM		 3581 sizeof(struct fxdisc_entry_fx00));
3582 wmb();
3583}
Linux 6.x block layer and io_uring tree(s)