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[SCSI] qla2xxx: Add handling for boot indication progress AENs for ISPFX00.
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_mr.c
CommitLineData
8ae6d9c7
GM		 1/*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7#include "qla_def.h"
8#include <linux/delay.h>
9#include <linux/pci.h>
10#include <linux/ratelimit.h>
11#include <linux/vmalloc.h>
12#include <scsi/scsi_tcq.h>
13#include <linux/utsname.h>
14
15
16/* QLAFX00 specific Mailbox implementation functions */
17
18/*
19 * qlafx00_mailbox_command
20 * Issue mailbox command and waits for completion.
21 *
22 * Input:
23 * ha = adapter block pointer.
24 * mcp = driver internal mbx struct pointer.
25 *
26 * Output:
27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
28 *
29 * Returns:
30 * 0 : QLA_SUCCESS = cmd performed success
31 * 1 : QLA_FUNCTION_FAILED (error encountered)
32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
33 *
34 * Context:
35 * Kernel context.
36 */
37static int
38qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
39
40{
41 int rval;
42 unsigned long flags = 0;
43 device_reg_t __iomem *reg;
44 uint8_t abort_active;
45 uint8_t io_lock_on;
46 uint16_t command = 0;
47 uint32_t *iptr;
48 uint32_t __iomem *optr;
49 uint32_t cnt;
50 uint32_t mboxes;
51 unsigned long wait_time;
52 struct qla_hw_data *ha = vha->hw;
53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
54
55 if (ha->pdev->error_state > pci_channel_io_frozen) {
56 ql_log(ql_log_warn, vha, 0x115c,
57 "error_state is greater than pci_channel_io_frozen, "
58 "exiting.\n");
59 return QLA_FUNCTION_TIMEOUT;
60 }
61
62 if (vha->device_flags & DFLG_DEV_FAILED) {
63 ql_log(ql_log_warn, vha, 0x115f,
64 "Device in failed state, exiting.\n");
65 return QLA_FUNCTION_TIMEOUT;
66 }
67
68 reg = ha->iobase;
69 io_lock_on = base_vha->flags.init_done;
70
71 rval = QLA_SUCCESS;
72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
73
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1175,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
78 }
79
80 if (ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1176,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 rval = QLA_FUNCTION_FAILED;
86 goto premature_exit;
87 }
88
89 /*
90 * Wait for active mailbox commands to finish by waiting at most tov
91 * seconds. This is to serialize actual issuing of mailbox cmds during
92 * non ISP abort time.
93 */
94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
95 /* Timeout occurred. Return error. */
96 ql_log(ql_log_warn, vha, 0x1177,
97 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 mcp->mb[0]);
99 return QLA_FUNCTION_TIMEOUT;
100 }
101
102 ha->flags.mbox_busy = 1;
103 /* Save mailbox command for debug */
104 ha->mcp32 = mcp;
105
106 ql_dbg(ql_dbg_mbx, vha, 0x1178,
107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108
109 spin_lock_irqsave(&ha->hardware_lock, flags);
110
111 /* Load mailbox registers. */
112 optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
113
114 iptr = mcp->mb;
115 command = mcp->mb[0];
116 mboxes = mcp->out_mb;
117
118 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
119 if (mboxes & BIT_0)
120 WRT_REG_DWORD(optr, *iptr);
121
122 mboxes >>= 1;
123 optr++;
124 iptr++;
125 }
126
127 /* Issue set host interrupt command to send cmd out. */
128 ha->flags.mbox_int = 0;
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
130
131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
132 (uint8_t *)mcp->mb, 16);
133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
134 ((uint8_t *)mcp->mb + 0x10), 16);
135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
136 ((uint8_t *)mcp->mb + 0x20), 8);
137
138 /* Unlock mbx registers and wait for interrupt */
139 ql_dbg(ql_dbg_mbx, vha, 0x1179,
140 "Going to unlock irq & waiting for interrupts. "
141 "jiffies=%lx.\n", jiffies);
142
143 /* Wait for mbx cmd completion until timeout */
144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
146
147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
148 spin_unlock_irqrestore(&ha->hardware_lock, flags);
149
150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
8ae6d9c7
GM		 151 } else {
152 ql_dbg(ql_dbg_mbx, vha, 0x112c,
153 "Cmd=%x Polling Mode.\n", command);
154
155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
156 spin_unlock_irqrestore(&ha->hardware_lock, flags);
157
158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
159 while (!ha->flags.mbox_int) {
160 if (time_after(jiffies, wait_time))
161 break;
162
163 /* Check for pending interrupts. */
164 qla2x00_poll(ha->rsp_q_map[0]);
165
166 if (!ha->flags.mbox_int &&
167 !(IS_QLA2200(ha) &&
168 command == MBC_LOAD_RISC_RAM_EXTENDED))
169 usleep_range(10000, 11000);
170 } /* while */
171 ql_dbg(ql_dbg_mbx, vha, 0x112d,
172 "Waited %d sec.\n",
173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
174 }
175
176 /* Check whether we timed out */
177 if (ha->flags.mbox_int) {
178 uint32_t *iptr2;
179
180 ql_dbg(ql_dbg_mbx, vha, 0x112e,
181 "Cmd=%x completed.\n", command);
182
183 /* Got interrupt. Clear the flag. */
184 ha->flags.mbox_int = 0;
185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
186
187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
188 rval = QLA_FUNCTION_FAILED;
189
190 /* Load return mailbox registers. */
191 iptr2 = mcp->mb;
192 iptr = (uint32_t *)&ha->mailbox_out32[0];
193 mboxes = mcp->in_mb;
194 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
195 if (mboxes & BIT_0)
196 *iptr2 = *iptr;
197
198 mboxes >>= 1;
199 iptr2++;
200 iptr++;
201 }
202 } else {
203
204 rval = QLA_FUNCTION_TIMEOUT;
205 }
206
207 ha->flags.mbox_busy = 0;
208
209 /* Clean up */
210 ha->mcp32 = NULL;
211
212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
213 ql_dbg(ql_dbg_mbx, vha, 0x113a,
214 "checking for additional resp interrupt.\n");
215
216 /* polling mode for non isp_abort commands. */
217 qla2x00_poll(ha->rsp_q_map[0]);
218 }
219
220 if (rval == QLA_FUNCTION_TIMEOUT &&
221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
223 ha->flags.eeh_busy) {
224 /* not in dpc. schedule it for dpc to take over. */
225 ql_dbg(ql_dbg_mbx, vha, 0x115d,
226 "Timeout, schedule isp_abort_needed.\n");
227
228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
231
232 ql_log(ql_log_info, base_vha, 0x115e,
233 "Mailbox cmd timeout occurred, cmd=0x%x, "
234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
235 "abort.\n", command, mcp->mb[0],
236 ha->flags.eeh_busy);
237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
238 qla2xxx_wake_dpc(vha);
239 }
240 } else if (!abort_active) {
241 /* call abort directly since we are in the DPC thread */
242 ql_dbg(ql_dbg_mbx, vha, 0x1160,
243 "Timeout, calling abort_isp.\n");
244
245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
248
249 ql_log(ql_log_info, base_vha, 0x1161,
250 "Mailbox cmd timeout occurred, cmd=0x%x, "
251 "mb[0]=0x%x. Scheduling ISP abort ",
252 command, mcp->mb[0]);
253
254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
256 if (ha->isp_ops->abort_isp(vha)) {
257 /* Failed. retry later. */
258 set_bit(ISP_ABORT_NEEDED,
259 &vha->dpc_flags);
260 }
261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
262 ql_dbg(ql_dbg_mbx, vha, 0x1162,
263 "Finished abort_isp.\n");
264 }
265 }
266 }
267
268premature_exit:
269 /* Allow next mbx cmd to come in. */
270 complete(&ha->mbx_cmd_comp);
271
272 if (rval) {
273 ql_log(ql_log_warn, base_vha, 0x1163,
274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
275 "mb[3]=%x, cmd=%x ****.\n",
276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
277 } else {
278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
279 }
280
281 return rval;
282}
283
284/*
285 * qlafx00_driver_shutdown
286 * Indicate a driver shutdown to firmware.
287 *
288 * Input:
289 * ha = adapter block pointer.
290 *
291 * Returns:
292 * local function return status code.
293 *
294 * Context:
295 * Kernel context.
296 */
42479343 297int
8ae6d9c7
GM		 298qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
299{
300 int rval;
301 struct mbx_cmd_32 mc;
302 struct mbx_cmd_32 *mcp = &mc;
303
304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
305 "Entered %s.\n", __func__);
306
307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
308 mcp->out_mb = MBX_0;
309 mcp->in_mb = MBX_0;
310 if (tmo)
311 mcp->tov = tmo;
312 else
313 mcp->tov = MBX_TOV_SECONDS;
314 mcp->flags = 0;
315 rval = qlafx00_mailbox_command(vha, mcp);
316
317 if (rval != QLA_SUCCESS) {
318 ql_dbg(ql_dbg_mbx, vha, 0x1167,
319 "Failed=%x.\n", rval);
320 } else {
321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
322 "Done %s.\n", __func__);
323 }
324
325 return rval;
326}
327
328/*
329 * qlafx00_get_firmware_state
330 * Get adapter firmware state.
331 *
332 * Input:
333 * ha = adapter block pointer.
334 * TARGET_QUEUE_LOCK must be released.
335 * ADAPTER_STATE_LOCK must be released.
336 *
337 * Returns:
338 * qla7xxx local function return status code.
339 *
340 * Context:
341 * Kernel context.
342 */
343static int
344qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
345{
346 int rval;
347 struct mbx_cmd_32 mc;
348 struct mbx_cmd_32 *mcp = &mc;
349
350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
351 "Entered %s.\n", __func__);
352
353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
354 mcp->out_mb = MBX_0;
355 mcp->in_mb = MBX_1|MBX_0;
356 mcp->tov = MBX_TOV_SECONDS;
357 mcp->flags = 0;
358 rval = qlafx00_mailbox_command(vha, mcp);
359
360 /* Return firmware states. */
361 states[0] = mcp->mb[1];
362
363 if (rval != QLA_SUCCESS) {
364 ql_dbg(ql_dbg_mbx, vha, 0x116a,
365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
366 } else {
367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
368 "Done %s.\n", __func__);
369 }
370 return rval;
371}
372
373/*
374 * qlafx00_init_firmware
375 * Initialize adapter firmware.
376 *
377 * Input:
378 * ha = adapter block pointer.
379 * dptr = Initialization control block pointer.
380 * size = size of initialization control block.
381 * TARGET_QUEUE_LOCK must be released.
382 * ADAPTER_STATE_LOCK must be released.
383 *
384 * Returns:
385 * qlafx00 local function return status code.
386 *
387 * Context:
388 * Kernel context.
389 */
390int
391qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
392{
393 int rval;
394 struct mbx_cmd_32 mc;
395 struct mbx_cmd_32 *mcp = &mc;
396 struct qla_hw_data *ha = vha->hw;
397
398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
399 "Entered %s.\n", __func__);
400
401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
402
403 mcp->mb[1] = 0;
404 mcp->mb[2] = MSD(ha->init_cb_dma);
405 mcp->mb[3] = LSD(ha->init_cb_dma);
406
407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
408 mcp->in_mb = MBX_0;
409 mcp->buf_size = size;
410 mcp->flags = MBX_DMA_OUT;
411 mcp->tov = MBX_TOV_SECONDS;
412 rval = qlafx00_mailbox_command(vha, mcp);
413
414 if (rval != QLA_SUCCESS) {
415 ql_dbg(ql_dbg_mbx, vha, 0x116d,
416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
417 } else {
418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
419 "Done %s.\n", __func__);
420 }
421 return rval;
422}
423
424/*
425 * qlafx00_mbx_reg_test
426 */
427static int
428qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
429{
430 int rval;
431 struct mbx_cmd_32 mc;
432 struct mbx_cmd_32 *mcp = &mc;
433
434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
435 "Entered %s.\n", __func__);
436
437
438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
439 mcp->mb[1] = 0xAAAA;
440 mcp->mb[2] = 0x5555;
441 mcp->mb[3] = 0xAA55;
442 mcp->mb[4] = 0x55AA;
443 mcp->mb[5] = 0xA5A5;
444 mcp->mb[6] = 0x5A5A;
445 mcp->mb[7] = 0x2525;
446 mcp->mb[8] = 0xBBBB;
447 mcp->mb[9] = 0x6666;
448 mcp->mb[10] = 0xBB66;
449 mcp->mb[11] = 0x66BB;
450 mcp->mb[12] = 0xB6B6;
451 mcp->mb[13] = 0x6B6B;
452 mcp->mb[14] = 0x3636;
453 mcp->mb[15] = 0xCCCC;
454
455
456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
460 mcp->buf_size = 0;
461 mcp->flags = MBX_DMA_OUT;
462 mcp->tov = MBX_TOV_SECONDS;
463 rval = qlafx00_mailbox_command(vha, mcp);
464 if (rval == QLA_SUCCESS) {
465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
467 rval = QLA_FUNCTION_FAILED;
468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
470 rval = QLA_FUNCTION_FAILED;
471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
473 rval = QLA_FUNCTION_FAILED;
474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
475 mcp->mb[31] != 0xCCCC)
476 rval = QLA_FUNCTION_FAILED;
477 }
478
479 if (rval != QLA_SUCCESS) {
480 ql_dbg(ql_dbg_mbx, vha, 0x1170,
481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
482 } else {
483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
484 "Done %s.\n", __func__);
485 }
486 return rval;
487}
488
489/**
490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
491 * @ha: HA context
492 *
493 * Returns 0 on success.
494 */
495int
496qlafx00_pci_config(scsi_qla_host_t *vha)
497{
498 uint16_t w;
499 struct qla_hw_data *ha = vha->hw;
500
501 pci_set_master(ha->pdev);
502 pci_try_set_mwi(ha->pdev);
503
504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
506 w &= ~PCI_COMMAND_INTX_DISABLE;
507 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
508
509 /* PCIe -- adjust Maximum Read Request Size (2048). */
ce9f7ed9 510 if (pci_is_pcie(ha->pdev))
8ae6d9c7
GM		 511 pcie_set_readrq(ha->pdev, 2048);
512
513 ha->chip_revision = ha->pdev->revision;
514
515 return QLA_SUCCESS;
516}
517
518/**
519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
520 * @ha: HA context
521 *
522 */
523static inline void
524qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
525{
526 unsigned long flags = 0;
527 struct qla_hw_data *ha = vha->hw;
528 int i, core;
529 uint32_t cnt;
530
531 /* Set all 4 cores in reset */
532 for (i = 0; i < 4; i++) {
533 QLAFX00_SET_HBA_SOC_REG(ha,
534 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
535 }
536
537 /* Set all 4 core Clock gating control */
538 for (i = 0; i < 4; i++) {
539 QLAFX00_SET_HBA_SOC_REG(ha,
540 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
541 }
542
543 /* Reset all units in Fabric */
544 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101));
545
546 /* Reset all interrupt control registers */
547 for (i = 0; i < 115; i++) {
548 QLAFX00_SET_HBA_SOC_REG(ha,
549 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
550 }
551
552 /* Reset Timers control registers. per core */
553 for (core = 0; core < 4; core++)
554 for (i = 0; i < 8; i++)
555 QLAFX00_SET_HBA_SOC_REG(ha,
556 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
557
558 /* Reset per core IRQ ack register */
559 for (core = 0; core < 4; core++)
560 QLAFX00_SET_HBA_SOC_REG(ha,
561 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
562
563 /* Set Fabric control and config to defaults */
564 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
565 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
566
567 spin_lock_irqsave(&ha->hardware_lock, flags);
568
569 /* Kick in Fabric units */
570 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
571
572 /* Kick in Core0 to start boot process */
573 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
574
575 /* Wait 10secs for soft-reset to complete. */
576 for (cnt = 10; cnt; cnt--) {
577 msleep(1000);
578 barrier();
579 }
580 spin_unlock_irqrestore(&ha->hardware_lock, flags);
581}
582
583/**
584 * qlafx00_soft_reset() - Soft Reset ISPFx00.
585 * @ha: HA context
586 *
587 * Returns 0 on success.
588 */
589void
590qlafx00_soft_reset(scsi_qla_host_t *vha)
591{
592 struct qla_hw_data *ha = vha->hw;
593
594 if (unlikely(pci_channel_offline(ha->pdev) &&
595 ha->flags.pci_channel_io_perm_failure))
596 return;
597
598 ha->isp_ops->disable_intrs(ha);
599 qlafx00_soc_cpu_reset(vha);
600 ha->isp_ops->enable_intrs(ha);
601}
602
603/**
604 * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
605 * @ha: HA context
606 *
607 * Returns 0 on success.
608 */
609int
610qlafx00_chip_diag(scsi_qla_host_t *vha)
611{
612 int rval = 0;
613 struct qla_hw_data *ha = vha->hw;
614 struct req_que *req = ha->req_q_map[0];
615
616 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
617
618 rval = qlafx00_mbx_reg_test(vha);
619 if (rval) {
620 ql_log(ql_log_warn, vha, 0x1165,
621 "Failed mailbox send register test\n");
622 } else {
623 /* Flag a successful rval */
624 rval = QLA_SUCCESS;
625 }
626 return rval;
627}
628
629void
630qlafx00_config_rings(struct scsi_qla_host *vha)
631{
632 struct qla_hw_data *ha = vha->hw;
633 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
634 struct init_cb_fx *icb;
635 struct req_que *req = ha->req_q_map[0];
636 struct rsp_que *rsp = ha->rsp_q_map[0];
637
638 /* Setup ring parameters in initialization control block. */
639 icb = (struct init_cb_fx *)ha->init_cb;
640 icb->request_q_outpointer = __constant_cpu_to_le16(0);
641 icb->response_q_inpointer = __constant_cpu_to_le16(0);
642 icb->request_q_length = cpu_to_le16(req->length);
643 icb->response_q_length = cpu_to_le16(rsp->length);
644 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
645 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
646 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
647 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
648
649 WRT_REG_DWORD(&reg->req_q_in, 0);
650 WRT_REG_DWORD(&reg->req_q_out, 0);
651
652 WRT_REG_DWORD(&reg->rsp_q_in, 0);
653 WRT_REG_DWORD(&reg->rsp_q_out, 0);
654
655 /* PCI posting */
656 RD_REG_DWORD(&reg->rsp_q_out);
657}
658
659char *
660qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
661{
662 struct qla_hw_data *ha = vha->hw;
8ae6d9c7 663
ce9f7ed9 664 if (pci_is_pcie(ha->pdev)) {
8ae6d9c7
GM		 665 strcpy(str, "PCIe iSA");
666 return str;
667 }
668 return str;
669}
670
671char *
672qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str)
673{
674 struct qla_hw_data *ha = vha->hw;
675
676 sprintf(str, "%s", ha->mr.fw_version);
677 return str;
678}
679
680void
681qlafx00_enable_intrs(struct qla_hw_data *ha)
682{
683 unsigned long flags = 0;
684
685 spin_lock_irqsave(&ha->hardware_lock, flags);
686 ha->interrupts_on = 1;
687 QLAFX00_ENABLE_ICNTRL_REG(ha);
688 spin_unlock_irqrestore(&ha->hardware_lock, flags);
689}
690
691void
692qlafx00_disable_intrs(struct qla_hw_data *ha)
693{
694 unsigned long flags = 0;
695
696 spin_lock_irqsave(&ha->hardware_lock, flags);
697 ha->interrupts_on = 0;
698 QLAFX00_DISABLE_ICNTRL_REG(ha);
699 spin_unlock_irqrestore(&ha->hardware_lock, flags);
700}
701
702static void
703qlafx00_tmf_iocb_timeout(void *data)
704{
705 srb_t *sp = (srb_t *)data;
706 struct srb_iocb *tmf = &sp->u.iocb_cmd;
707
1f8deefe 708 tmf->u.tmf.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT);
8ae6d9c7
GM		 709 complete(&tmf->u.tmf.comp);
710}
711
712static void
713qlafx00_tmf_sp_done(void *data, void *ptr, int res)
714{
715 srb_t *sp = (srb_t *)ptr;
716 struct srb_iocb *tmf = &sp->u.iocb_cmd;
717
718 complete(&tmf->u.tmf.comp);
719}
720
721static int
722qlafx00_async_tm_cmd(fc_port_t *fcport, uint32_t flags,
723 uint32_t lun, uint32_t tag)
724{
725 scsi_qla_host_t *vha = fcport->vha;
726 struct srb_iocb *tm_iocb;
727 srb_t *sp;
728 int rval = QLA_FUNCTION_FAILED;
729
730 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
731 if (!sp)
732 goto done;
733
734 tm_iocb = &sp->u.iocb_cmd;
735 sp->type = SRB_TM_CMD;
736 sp->name = "tmf";
737 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
738 tm_iocb->u.tmf.flags = flags;
739 tm_iocb->u.tmf.lun = lun;
740 tm_iocb->u.tmf.data = tag;
741 sp->done = qlafx00_tmf_sp_done;
742 tm_iocb->timeout = qlafx00_tmf_iocb_timeout;
743 init_completion(&tm_iocb->u.tmf.comp);
744
745 rval = qla2x00_start_sp(sp);
746 if (rval != QLA_SUCCESS)
747 goto done_free_sp;
748
749 ql_dbg(ql_dbg_async, vha, 0x507b,
750 "Task management command issued target_id=%x\n",
751 fcport->tgt_id);
752
753 wait_for_completion(&tm_iocb->u.tmf.comp);
754
755 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
756 QLA_SUCCESS : QLA_FUNCTION_FAILED;
757
758done_free_sp:
759 sp->free(vha, sp);
760done:
761 return rval;
762}
763
764int
765qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag)
766{
767 return qlafx00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
768}
769
770int
771qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag)
772{
773 return qlafx00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
774}
775
5854771e
AB		 776int
777qlafx00_loop_reset(scsi_qla_host_t *vha)
778{
779 int ret;
780 struct fc_port *fcport;
781 struct qla_hw_data *ha = vha->hw;
782
783 if (ql2xtargetreset) {
784 list_for_each_entry(fcport, &vha->vp_fcports, list) {
785 if (fcport->port_type != FCT_TARGET)
786 continue;
787
788 ret = ha->isp_ops->target_reset(fcport, 0, 0);
789 if (ret != QLA_SUCCESS) {
790 ql_dbg(ql_dbg_taskm, vha, 0x803d,
791 "Bus Reset failed: Reset=%d "
792 "d_id=%x.\n", ret, fcport->d_id.b24);
793 }
794 }
795 }
796 return QLA_SUCCESS;
797}
798
8ae6d9c7
GM		 799int
800qlafx00_iospace_config(struct qla_hw_data *ha)
801{
802 if (pci_request_selected_regions(ha->pdev, ha->bars,
803 QLA2XXX_DRIVER_NAME)) {
804 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
805 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
806 pci_name(ha->pdev));
807 goto iospace_error_exit;
808 }
809
810 /* Use MMIO operations for all accesses. */
811 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
812 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
813 "Invalid pci I/O region size (%s).\n",
814 pci_name(ha->pdev));
815 goto iospace_error_exit;
816 }
817 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
818 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
819 "Invalid PCI mem BAR0 region size (%s), aborting\n",
820 pci_name(ha->pdev));
821 goto iospace_error_exit;
822 }
823
824 ha->cregbase =
825 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
826 if (!ha->cregbase) {
827 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
828 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
829 goto iospace_error_exit;
830 }
831
832 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
833 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
834 "region #2 not an MMIO resource (%s), aborting\n",
835 pci_name(ha->pdev));
836 goto iospace_error_exit;
837 }
838 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
839 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
840 "Invalid PCI mem BAR2 region size (%s), aborting\n",
841 pci_name(ha->pdev));
842 goto iospace_error_exit;
843 }
844
845 ha->iobase =
846 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
847 if (!ha->iobase) {
848 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
849 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
850 goto iospace_error_exit;
851 }
852
853 /* Determine queue resources */
854 ha->max_req_queues = ha->max_rsp_queues = 1;
855
856 ql_log_pci(ql_log_info, ha->pdev, 0x012c,
857 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
858 ha->bars, ha->cregbase, ha->iobase);
859
860 return 0;
861
862iospace_error_exit:
863 return -ENOMEM;
864}
865
866static void
867qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
868{
869 struct qla_hw_data *ha = vha->hw;
870 struct req_que *req = ha->req_q_map[0];
871 struct rsp_que *rsp = ha->rsp_q_map[0];
872
873 req->length_fx00 = req->length;
874 req->ring_fx00 = req->ring;
875 req->dma_fx00 = req->dma;
876
877 rsp->length_fx00 = rsp->length;
878 rsp->ring_fx00 = rsp->ring;
879 rsp->dma_fx00 = rsp->dma;
880
881 ql_dbg(ql_dbg_init, vha, 0x012d,
882 "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
883 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
884 req->length_fx00, (u64)req->dma_fx00);
885
886 ql_dbg(ql_dbg_init, vha, 0x012e,
887 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
888 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
889 rsp->length_fx00, (u64)rsp->dma_fx00);
890}
891
892static int
893qlafx00_config_queues(struct scsi_qla_host *vha)
894{
895 struct qla_hw_data *ha = vha->hw;
896 struct req_que *req = ha->req_q_map[0];
897 struct rsp_que *rsp = ha->rsp_q_map[0];
898 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
899
900 req->length = ha->req_que_len;
901 req->ring = (void *)ha->iobase + ha->req_que_off;
902 req->dma = bar2_hdl + ha->req_que_off;
903 if ((!req->ring) || (req->length == 0)) {
904 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
905 "Unable to allocate memory for req_ring\n");
906 return QLA_FUNCTION_FAILED;
907 }
908
909 ql_dbg(ql_dbg_init, vha, 0x0130,
910 "req: %p req_ring pointer %p req len 0x%x "
911 "req off 0x%x\n, req->dma: 0x%llx",
912 req, req->ring, req->length,
913 ha->req_que_off, (u64)req->dma);
914
915 rsp->length = ha->rsp_que_len;
916 rsp->ring = (void *)ha->iobase + ha->rsp_que_off;
917 rsp->dma = bar2_hdl + ha->rsp_que_off;
918 if ((!rsp->ring) || (rsp->length == 0)) {
919 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
920 "Unable to allocate memory for rsp_ring\n");
921 return QLA_FUNCTION_FAILED;
922 }
923
924 ql_dbg(ql_dbg_init, vha, 0x0132,
925 "rsp: %p rsp_ring pointer %p rsp len 0x%x "
926 "rsp off 0x%x, rsp->dma: 0x%llx\n",
927 rsp, rsp->ring, rsp->length,
928 ha->rsp_que_off, (u64)rsp->dma);
929
930 return QLA_SUCCESS;
931}
932
933static int
934qlafx00_init_fw_ready(scsi_qla_host_t *vha)
935{
936 int rval = 0;
937 unsigned long wtime;
938 uint16_t wait_time; /* Wait time */
939 struct qla_hw_data *ha = vha->hw;
940 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
941 uint32_t aenmbx, aenmbx7 = 0;
f9a2a543 942 uint32_t pseudo_aen;
8ae6d9c7
GM		 943 uint32_t state[5];
944 bool done = false;
945
946 /* 30 seconds wait - Adjust if required */
947 wait_time = 30;
948
f9a2a543
AB		 949 pseudo_aen = RD_REG_DWORD(&reg->pseudoaen);
950 if (pseudo_aen == 1) {
951 aenmbx7 = RD_REG_DWORD(&reg->initval7);
952 ha->mbx_intr_code = MSW(aenmbx7);
953 ha->rqstq_intr_code = LSW(aenmbx7);
954 rval = qlafx00_driver_shutdown(vha, 10);
955 if (rval != QLA_SUCCESS)
956 qlafx00_soft_reset(vha);
957 }
958
8ae6d9c7
GM		 959 /* wait time before firmware ready */
960 wtime = jiffies + (wait_time * HZ);
961 do {
962 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
963 barrier();
964 ql_dbg(ql_dbg_mbx, vha, 0x0133,
965 "aenmbx: 0x%x\n", aenmbx);
966
967 switch (aenmbx) {
968 case MBA_FW_NOT_STARTED:
969 case MBA_FW_STARTING:
970 break;
971
972 case MBA_SYSTEM_ERR:
973 case MBA_REQ_TRANSFER_ERR:
974 case MBA_RSP_TRANSFER_ERR:
975 case MBA_FW_INIT_FAILURE:
976 qlafx00_soft_reset(vha);
977 break;
978
979 case MBA_FW_RESTART_CMPLT:
980 /* Set the mbx and rqstq intr code */
981 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
982 ha->mbx_intr_code = MSW(aenmbx7);
983 ha->rqstq_intr_code = LSW(aenmbx7);
984 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
985 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
986 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
987 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
988 WRT_REG_DWORD(&reg->aenmailbox0, 0);
989 RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
990 ql_dbg(ql_dbg_init, vha, 0x0134,
991 "f/w returned mbx_intr_code: 0x%x, "
992 "rqstq_intr_code: 0x%x\n",
993 ha->mbx_intr_code, ha->rqstq_intr_code);
994 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
995 rval = QLA_SUCCESS;
996 done = true;
997 break;
998
999 default:
0f8cdff5
AB		 1000 if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS)
1001 break;
1002
8ae6d9c7
GM		 1003 /* If fw is apparently not ready. In order to continue,
1004 * we might need to issue Mbox cmd, but the problem is
1005 * that the DoorBell vector values that come with the
1006 * 8060 AEN are most likely gone by now (and thus no
1007 * bell would be rung on the fw side when mbox cmd is
1008 * issued). We have to therefore grab the 8060 AEN
1009 * shadow regs (filled in by FW when the last 8060
1010 * AEN was being posted).
1011 * Do the following to determine what is needed in
1012 * order to get the FW ready:
1013 * 1. reload the 8060 AEN values from the shadow regs
1014 * 2. clear int status to get rid of possible pending
1015 * interrupts
1016 * 3. issue Get FW State Mbox cmd to determine fw state
1017 * Set the mbx and rqstq intr code from Shadow Regs
1018 */
1019 aenmbx7 = RD_REG_DWORD(&reg->initval7);
1020 ha->mbx_intr_code = MSW(aenmbx7);
1021 ha->rqstq_intr_code = LSW(aenmbx7);
1022 ha->req_que_off = RD_REG_DWORD(&reg->initval1);
1023 ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
1024 ha->req_que_len = RD_REG_DWORD(&reg->initval5);
1025 ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
1026 ql_dbg(ql_dbg_init, vha, 0x0135,
1027 "f/w returned mbx_intr_code: 0x%x, "
1028 "rqstq_intr_code: 0x%x\n",
1029 ha->mbx_intr_code, ha->rqstq_intr_code);
1030 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1031
1032 /* Get the FW state */
1033 rval = qlafx00_get_firmware_state(vha, state);
1034 if (rval != QLA_SUCCESS) {
1035 /* Retry if timer has not expired */
1036 break;
1037 }
1038
1039 if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
1040 /* Firmware is waiting to be
1041 * initialized by driver
1042 */
1043 rval = QLA_SUCCESS;
1044 done = true;
1045 break;
1046 }
1047
1048 /* Issue driver shutdown and wait until f/w recovers.
1049 * Driver should continue to poll until 8060 AEN is
1050 * received indicating firmware recovery.
1051 */
1052 ql_dbg(ql_dbg_init, vha, 0x0136,
1053 "Sending Driver shutdown fw_state 0x%x\n",
1054 state[0]);
1055
1056 rval = qlafx00_driver_shutdown(vha, 10);
1057 if (rval != QLA_SUCCESS) {
1058 rval = QLA_FUNCTION_FAILED;
1059 break;
1060 }
1061 msleep(500);
1062
1063 wtime = jiffies + (wait_time * HZ);
1064 break;
1065 }
1066
1067 if (!done) {
1068 if (time_after_eq(jiffies, wtime)) {
1069 ql_dbg(ql_dbg_init, vha, 0x0137,
1070 "Init f/w failed: aen[7]: 0x%x\n",
1071 RD_REG_DWORD(&reg->aenmailbox7));
1072 rval = QLA_FUNCTION_FAILED;
1073 done = true;
1074 break;
1075 }
1076 /* Delay for a while */
1077 msleep(500);
1078 }
1079 } while (!done);
1080
1081 if (rval)
1082 ql_dbg(ql_dbg_init, vha, 0x0138,
1083 "%s **** FAILED ****.\n", __func__);
1084 else
1085 ql_dbg(ql_dbg_init, vha, 0x0139,
1086 "%s **** SUCCESS ****.\n", __func__);
1087
1088 return rval;
1089}
1090
1091/*
1092 * qlafx00_fw_ready() - Waits for firmware ready.
1093 * @ha: HA context
1094 *
1095 * Returns 0 on success.
1096 */
1097int
1098qlafx00_fw_ready(scsi_qla_host_t *vha)
1099{
1100 int rval;
1101 unsigned long wtime;
1102 uint16_t wait_time; /* Wait time if loop is coming ready */
1103 uint32_t state[5];
1104
1105 rval = QLA_SUCCESS;
1106
1107 wait_time = 10;
1108
1109 /* wait time before firmware ready */
1110 wtime = jiffies + (wait_time * HZ);
1111
1112 /* Wait for ISP to finish init */
1113 if (!vha->flags.init_done)
1114 ql_dbg(ql_dbg_init, vha, 0x013a,
1115 "Waiting for init to complete...\n");
1116
1117 do {
1118 rval = qlafx00_get_firmware_state(vha, state);
1119
1120 if (rval == QLA_SUCCESS) {
1121 if (state[0] == FSTATE_FX00_INITIALIZED) {
1122 ql_dbg(ql_dbg_init, vha, 0x013b,
1123 "fw_state=%x\n", state[0]);
1124 rval = QLA_SUCCESS;
1125 break;
1126 }
1127 }
1128 rval = QLA_FUNCTION_FAILED;
1129
1130 if (time_after_eq(jiffies, wtime))
1131 break;
1132
1133 /* Delay for a while */
1134 msleep(500);
1135
1136 ql_dbg(ql_dbg_init, vha, 0x013c,
1137 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1138 } while (1);
1139
1140
1141 if (rval)
1142 ql_dbg(ql_dbg_init, vha, 0x013d,
1143 "Firmware ready **** FAILED ****.\n");
1144 else
1145 ql_dbg(ql_dbg_init, vha, 0x013e,
1146 "Firmware ready **** SUCCESS ****.\n");
1147
1148 return rval;
1149}
1150
1151static int
1152qlafx00_find_all_targets(scsi_qla_host_t *vha,
1153 struct list_head *new_fcports)
1154{
1155 int rval;
1156 uint16_t tgt_id;
1157 fc_port_t *fcport, *new_fcport;
1158 int found;
1159 struct qla_hw_data *ha = vha->hw;
1160
1161 rval = QLA_SUCCESS;
1162
1163 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1164 return QLA_FUNCTION_FAILED;
1165
1166 if ((atomic_read(&vha->loop_down_timer) ||
1167 STATE_TRANSITION(vha))) {
1168 atomic_set(&vha->loop_down_timer, 0);
1169 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1170 return QLA_FUNCTION_FAILED;
1171 }
1172
1173 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1174 "Listing Target bit map...\n");
1175 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha,
1176 0x2089, (uint8_t *)ha->gid_list, 32);
1177
1178 /* Allocate temporary rmtport for any new rmtports discovered. */
1179 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1180 if (new_fcport == NULL)
1181 return QLA_MEMORY_ALLOC_FAILED;
1182
1183 for_each_set_bit(tgt_id, (void *)ha->gid_list,
1184 QLAFX00_TGT_NODE_LIST_SIZE) {
1185
1186 /* Send get target node info */
1187 new_fcport->tgt_id = tgt_id;
1188 rval = qlafx00_fx_disc(vha, new_fcport,
1189 FXDISC_GET_TGT_NODE_INFO);
1190 if (rval != QLA_SUCCESS) {
1191 ql_log(ql_log_warn, vha, 0x208a,
1192 "Target info scan failed -- assuming zero-entry "
1193 "result...\n");
1194 continue;
1195 }
1196
1197 /* Locate matching device in database. */
1198 found = 0;
1199 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1200 if (memcmp(new_fcport->port_name,
1201 fcport->port_name, WWN_SIZE))
1202 continue;
1203
1204 found++;
1205
1206 /*
1207 * If tgt_id is same and state FCS_ONLINE, nothing
1208 * changed.
1209 */
1210 if (fcport->tgt_id == new_fcport->tgt_id &&
1211 atomic_read(&fcport->state) == FCS_ONLINE)
1212 break;
1213
1214 /*
1215 * Tgt ID changed or device was marked to be updated.
1216 */
1217 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1218 "TGT-ID Change(%s): Present tgt id: "
1219 "0x%x state: 0x%x "
1220 "wwnn = %llx wwpn = %llx.\n",
1221 __func__, fcport->tgt_id,
1222 atomic_read(&fcport->state),
1223 (unsigned long long)wwn_to_u64(fcport->node_name),
1224 (unsigned long long)wwn_to_u64(fcport->port_name));
1225
1226 ql_log(ql_log_info, vha, 0x208c,
1227 "TGT-ID Announce(%s): Discovered tgt "
1228 "id 0x%x wwnn = %llx "
1229 "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1230 (unsigned long long)
1231 wwn_to_u64(new_fcport->node_name),
1232 (unsigned long long)
1233 wwn_to_u64(new_fcport->port_name));
1234
1235 if (atomic_read(&fcport->state) != FCS_ONLINE) {
1236 fcport->old_tgt_id = fcport->tgt_id;
1237 fcport->tgt_id = new_fcport->tgt_id;
1238 ql_log(ql_log_info, vha, 0x208d,
1239 "TGT-ID: New fcport Added: %p\n", fcport);
1240 qla2x00_update_fcport(vha, fcport);
1241 } else {
1242 ql_log(ql_log_info, vha, 0x208e,
1243 " Existing TGT-ID %x did not get "
1244 " offline event from firmware.\n",
1245 fcport->old_tgt_id);
1246 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1247 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1248 kfree(new_fcport);
1249 return rval;
1250 }
1251 break;
1252 }
1253
1254 if (found)
1255 continue;
1256
1257 /* If device was not in our fcports list, then add it. */
1258 list_add_tail(&new_fcport->list, new_fcports);
1259
1260 /* Allocate a new replacement fcport. */
1261 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1262 if (new_fcport == NULL)
1263 return QLA_MEMORY_ALLOC_FAILED;
1264 }
1265
1266 kfree(new_fcport);
1267 return rval;
1268}
1269
1270/*
1271 * qlafx00_configure_all_targets
1272 * Setup target devices with node ID's.
1273 *
1274 * Input:
1275 * ha = adapter block pointer.
1276 *
1277 * Returns:
1278 * 0 = success.
1279 * BIT_0 = error
1280 */
1281static int
1282qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1283{
1284 int rval;
1285 fc_port_t *fcport, *rmptemp;
1286 LIST_HEAD(new_fcports);
1287
1288 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1289 FXDISC_GET_TGT_NODE_LIST);
1290 if (rval != QLA_SUCCESS) {
1291 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1292 return rval;
1293 }
1294
1295 rval = qlafx00_find_all_targets(vha, &new_fcports);
1296 if (rval != QLA_SUCCESS) {
1297 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1298 return rval;
1299 }
1300
1301 /*
1302 * Delete all previous devices marked lost.
1303 */
1304 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1305 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1306 break;
1307
1308 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1309 if (fcport->port_type != FCT_INITIATOR)
1310 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1311 }
1312 }
1313
1314 /*
1315 * Add the new devices to our devices list.
1316 */
1317 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1318 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1319 break;
1320
1321 qla2x00_update_fcport(vha, fcport);
1322 list_move_tail(&fcport->list, &vha->vp_fcports);
1323 ql_log(ql_log_info, vha, 0x208f,
1324 "Attach new target id 0x%x wwnn = %llx "
1325 "wwpn = %llx.\n",
1326 fcport->tgt_id,
1327 (unsigned long long)wwn_to_u64(fcport->node_name),
1328 (unsigned long long)wwn_to_u64(fcport->port_name));
1329 }
1330
1331 /* Free all new device structures not processed. */
1332 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1333 list_del(&fcport->list);
1334 kfree(fcport);
1335 }
1336
1337 return rval;
1338}
1339
1340/*
1341 * qlafx00_configure_devices
1342 * Updates Fibre Channel Device Database with what is actually on loop.
1343 *
1344 * Input:
1345 * ha = adapter block pointer.
1346 *
1347 * Returns:
1348 * 0 = success.
1349 * 1 = error.
1350 * 2 = database was full and device was not configured.
1351 */
1352int
1353qlafx00_configure_devices(scsi_qla_host_t *vha)
1354{
1355 int rval;
1356 unsigned long flags, save_flags;
1357 rval = QLA_SUCCESS;
1358
1359 save_flags = flags = vha->dpc_flags;
1360
1361 ql_dbg(ql_dbg_disc, vha, 0x2090,
1362 "Configure devices -- dpc flags =0x%lx\n", flags);
1363
1364 rval = qlafx00_configure_all_targets(vha);
1365
1366 if (rval == QLA_SUCCESS) {
1367 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1368 rval = QLA_FUNCTION_FAILED;
1369 } else {
1370 atomic_set(&vha->loop_state, LOOP_READY);
1371 ql_log(ql_log_info, vha, 0x2091,
1372 "Device Ready\n");
1373 }
1374 }
1375
1376 if (rval) {
1377 ql_dbg(ql_dbg_disc, vha, 0x2092,
1378 "%s *** FAILED ***.\n", __func__);
1379 } else {
1380 ql_dbg(ql_dbg_disc, vha, 0x2093,
1381 "%s: exiting normally.\n", __func__);
1382 }
1383 return rval;
1384}
1385
1386static void
71e56003 1387qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
8ae6d9c7
GM		 1388{
1389 struct qla_hw_data *ha = vha->hw;
1390 fc_port_t *fcport;
1391
1392 vha->flags.online = 0;
8ae6d9c7 1393 ha->mr.fw_hbt_en = 0;
8ae6d9c7 1394
71e56003
AB		 1395 if (!critemp) {
1396 ha->flags.chip_reset_done = 0;
1397 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1398 vha->qla_stats.total_isp_aborts++;
1399 ql_log(ql_log_info, vha, 0x013f,
1400 "Performing ISP error recovery - ha = %p.\n", ha);
1401 ha->isp_ops->reset_chip(vha);
1402 }
8ae6d9c7
GM		 1403
1404 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1405 atomic_set(&vha->loop_state, LOOP_DOWN);
1406 atomic_set(&vha->loop_down_timer,
1407 QLAFX00_LOOP_DOWN_TIME);
1408 } else {
1409 if (!atomic_read(&vha->loop_down_timer))
1410 atomic_set(&vha->loop_down_timer,
1411 QLAFX00_LOOP_DOWN_TIME);
1412 }
1413
1414 /* Clear all async request states across all VPs. */
1415 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1416 fcport->flags = 0;
1417 if (atomic_read(&fcport->state) == FCS_ONLINE)
1418 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1419 }
1420
1421 if (!ha->flags.eeh_busy) {
71e56003
AB		 1422 if (critemp) {
1423 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1424 } else {
1425 /* Requeue all commands in outstanding command list. */
1426 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1427 }
8ae6d9c7
GM		 1428 }
1429
1430 qla2x00_free_irqs(vha);
71e56003
AB		 1431 if (critemp)
1432 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1433 else
1434 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
8ae6d9c7
GM		 1435
1436 /* Clear the Interrupts */
1437 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1438
1439 ql_log(ql_log_info, vha, 0x0140,
1440 "%s Done done - ha=%p.\n", __func__, ha);
1441}
1442
1443/**
1444 * qlafx00_init_response_q_entries() - Initializes response queue entries.
1445 * @ha: HA context
1446 *
1447 * Beginning of request ring has initialization control block already built
1448 * by nvram config routine.
1449 *
1450 * Returns 0 on success.
1451 */
1452void
1453qlafx00_init_response_q_entries(struct rsp_que *rsp)
1454{
1455 uint16_t cnt;
1456 response_t *pkt;
1457
1458 rsp->ring_ptr = rsp->ring;
1459 rsp->ring_index = 0;
1460 rsp->status_srb = NULL;
1461 pkt = rsp->ring_ptr;
1462 for (cnt = 0; cnt < rsp->length; cnt++) {
1463 pkt->signature = RESPONSE_PROCESSED;
1f8deefe
SK		 1464 WRT_REG_DWORD((void __iomem *)&pkt->signature,
1465 RESPONSE_PROCESSED);
8ae6d9c7
GM		 1466 pkt++;
1467 }
1468}
1469
1470int
1471qlafx00_rescan_isp(scsi_qla_host_t *vha)
1472{
1473 uint32_t status = QLA_FUNCTION_FAILED;
1474 struct qla_hw_data *ha = vha->hw;
1475 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1476 uint32_t aenmbx7;
1477
1478 qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1479
1480 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1481 ha->mbx_intr_code = MSW(aenmbx7);
1482 ha->rqstq_intr_code = LSW(aenmbx7);
1483 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1484 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1485 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1486 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1487
1488 ql_dbg(ql_dbg_disc, vha, 0x2094,
1489 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1490 " Req que offset 0x%x Rsp que offset 0x%x\n",
1491 ha->mbx_intr_code, ha->rqstq_intr_code,
1492 ha->req_que_off, ha->rsp_que_len);
1493
1494 /* Clear the Interrupts */
1495 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1496
1497 status = qla2x00_init_rings(vha);
1498 if (!status) {
1499 vha->flags.online = 1;
1500
1501 /* if no cable then assume it's good */
1502 if ((vha->device_flags & DFLG_NO_CABLE))
1503 status = 0;
1504 /* Register system information */
1505 if (qlafx00_fx_disc(vha,
1506 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1507 ql_dbg(ql_dbg_disc, vha, 0x2095,
1508 "failed to register host info\n");
1509 }
1510 scsi_unblock_requests(vha->host);
1511 return status;
1512}
1513
1514void
1515qlafx00_timer_routine(scsi_qla_host_t *vha)
1516{
1517 struct qla_hw_data *ha = vha->hw;
1518 uint32_t fw_heart_beat;
1519 uint32_t aenmbx0;
1520 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
71e56003 1521 uint32_t tempc;
8ae6d9c7
GM		 1522
1523 /* Check firmware health */
1524 if (ha->mr.fw_hbt_cnt)
1525 ha->mr.fw_hbt_cnt--;
1526 else {
1527 if ((!ha->flags.mr_reset_hdlr_active) &&
1528 (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1529 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1530 (ha->mr.fw_hbt_en)) {
1531 fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1532 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1533 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1534 ha->mr.fw_hbt_miss_cnt = 0;
1535 } else {
1536 ha->mr.fw_hbt_miss_cnt++;
1537 if (ha->mr.fw_hbt_miss_cnt ==
1538 QLAFX00_HEARTBEAT_MISS_CNT) {
1539 set_bit(ISP_ABORT_NEEDED,
1540 &vha->dpc_flags);
1541 qla2xxx_wake_dpc(vha);
1542 ha->mr.fw_hbt_miss_cnt = 0;
1543 }
1544 }
1545 }
1546 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1547 }
1548
1549 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1550 /* Reset recovery to be performed in timer routine */
1551 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1552 if (ha->mr.fw_reset_timer_exp) {
1553 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1554 qla2xxx_wake_dpc(vha);
1555 ha->mr.fw_reset_timer_exp = 0;
1556 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1557 /* Wake up DPC to rescan the targets */
1558 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1559 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1560 qla2xxx_wake_dpc(vha);
1561 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1562 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1563 (!ha->mr.fw_hbt_en)) {
1564 ha->mr.fw_hbt_en = 1;
1565 } else if (!ha->mr.fw_reset_timer_tick) {
1566 if (aenmbx0 == ha->mr.old_aenmbx0_state)
1567 ha->mr.fw_reset_timer_exp = 1;
1568 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1569 } else if (aenmbx0 == 0xFFFFFFFF) {
1570 uint32_t data0, data1;
1571
1572 data0 = QLAFX00_RD_REG(ha,
1573 QLAFX00_BAR1_BASE_ADDR_REG);
1574 data1 = QLAFX00_RD_REG(ha,
1575 QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1576
1577 data0 &= 0xffff0000;
1578 data1 &= 0x0000ffff;
1579
1580 QLAFX00_WR_REG(ha,
1581 QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1582 (data0 | data1));
1583 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1584 ha->mr.fw_reset_timer_tick =
1585 QLAFX00_MAX_RESET_INTERVAL;
b6511d99
AB		 1586 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1587 ha->mr.fw_reset_timer_tick =
1588 QLAFX00_MAX_RESET_INTERVAL;
8ae6d9c7
GM		 1589 }
1590 ha->mr.old_aenmbx0_state = aenmbx0;
1591 ha->mr.fw_reset_timer_tick--;
1592 }
71e56003
AB		 1593 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1594 /*
1595 * Critical temperature recovery to be
1596 * performed in timer routine
1597 */
1598 if (ha->mr.fw_critemp_timer_tick == 0) {
1599 tempc = QLAFX00_GET_TEMPERATURE(ha);
6ddcfef7 1600 ql_dbg(ql_dbg_timer, vha, 0x6012,
71e56003
AB		 1601 "ISPFx00(%s): Critical temp timer, "
1602 "current SOC temperature: %d\n",
1603 __func__, tempc);
1604 if (tempc < ha->mr.critical_temperature) {
1605 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1606 clear_bit(FX00_CRITEMP_RECOVERY,
1607 &vha->dpc_flags);
1608 qla2xxx_wake_dpc(vha);
1609 }
1610 ha->mr.fw_critemp_timer_tick =
1611 QLAFX00_CRITEMP_INTERVAL;
1612 } else {
1613 ha->mr.fw_critemp_timer_tick--;
1614 }
1615 }
e8f5e95d
AB		 1616 if (ha->mr.host_info_resend) {
1617 /*
1618 * Incomplete host info might be sent to firmware
1619 * durinng system boot - info should be resend
1620 */
1621 if (ha->mr.hinfo_resend_timer_tick == 0) {
1622 ha->mr.host_info_resend = false;
1623 set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags);
1624 ha->mr.hinfo_resend_timer_tick =
1625 QLAFX00_HINFO_RESEND_INTERVAL;
1626 qla2xxx_wake_dpc(vha);
1627 } else {
1628 ha->mr.hinfo_resend_timer_tick--;
1629 }
1630 }
1631
8ae6d9c7
GM		 1632}
1633
1634/*
1635 * qlfx00a_reset_initialize
1636 * Re-initialize after a iSA device reset.
1637 *
1638 * Input:
1639 * ha = adapter block pointer.
1640 *
1641 * Returns:
1642 * 0 = success
1643 */
1644int
1645qlafx00_reset_initialize(scsi_qla_host_t *vha)
1646{
1647 struct qla_hw_data *ha = vha->hw;
1648
1649 if (vha->device_flags & DFLG_DEV_FAILED) {
1650 ql_dbg(ql_dbg_init, vha, 0x0142,
1651 "Device in failed state\n");
1652 return QLA_SUCCESS;
1653 }
1654
1655 ha->flags.mr_reset_hdlr_active = 1;
1656
1657 if (vha->flags.online) {
1658 scsi_block_requests(vha->host);
71e56003 1659 qlafx00_abort_isp_cleanup(vha, false);
8ae6d9c7
GM		 1660 }
1661
1662 ql_log(ql_log_info, vha, 0x0143,
1663 "(%s): succeeded.\n", __func__);
1664 ha->flags.mr_reset_hdlr_active = 0;
1665 return QLA_SUCCESS;
1666}
1667
1668/*
1669 * qlafx00_abort_isp
1670 * Resets ISP and aborts all outstanding commands.
1671 *
1672 * Input:
1673 * ha = adapter block pointer.
1674 *
1675 * Returns:
1676 * 0 = success
1677 */
1678int
1679qlafx00_abort_isp(scsi_qla_host_t *vha)
1680{
1681 struct qla_hw_data *ha = vha->hw;
1682
1683 if (vha->flags.online) {
1684 if (unlikely(pci_channel_offline(ha->pdev) &&
1685 ha->flags.pci_channel_io_perm_failure)) {
1686 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1687 return QLA_SUCCESS;
1688 }
1689
1690 scsi_block_requests(vha->host);
71e56003 1691 qlafx00_abort_isp_cleanup(vha, false);
e601d778
AB		 1692 } else {
1693 scsi_block_requests(vha->host);
1694 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1695 vha->qla_stats.total_isp_aborts++;
1696 ha->isp_ops->reset_chip(vha);
1697 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1698 /* Clear the Interrupts */
1699 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
8ae6d9c7
GM		 1700 }
1701
1702 ql_log(ql_log_info, vha, 0x0145,
1703 "(%s): succeeded.\n", __func__);
1704
1705 return QLA_SUCCESS;
1706}
1707
1708static inline fc_port_t*
1709qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1710{
1711 fc_port_t *fcport;
1712
1713 /* Check for matching device in remote port list. */
1714 fcport = NULL;
1715 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1716 if (fcport->tgt_id == tgt_id) {
1717 ql_dbg(ql_dbg_async, vha, 0x5072,
1718 "Matching fcport(%p) found with TGT-ID: 0x%x "
1719 "and Remote TGT_ID: 0x%x\n",
1720 fcport, fcport->tgt_id, tgt_id);
1721 break;
1722 }
1723 }
1724 return fcport;
1725}
1726
1727static void
1728qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1729{
1730 fc_port_t *fcport;
1731
1732 ql_log(ql_log_info, vha, 0x5073,
1733 "Detach TGT-ID: 0x%x\n", tgt_id);
1734
1735 fcport = qlafx00_get_fcport(vha, tgt_id);
1736 if (!fcport)
1737 return;
1738
1739 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1740
1741 return;
1742}
1743
1744int
1745qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1746{
1747 int rval = 0;
1748 uint32_t aen_code, aen_data;
1749
1750 aen_code = FCH_EVT_VENDOR_UNIQUE;
1751 aen_data = evt->u.aenfx.evtcode;
1752
1753 switch (evt->u.aenfx.evtcode) {
1754 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
1755 if (evt->u.aenfx.mbx[1] == 0) {
1756 if (evt->u.aenfx.mbx[2] == 1) {
1757 if (!vha->flags.fw_tgt_reported)
1758 vha->flags.fw_tgt_reported = 1;
1759 atomic_set(&vha->loop_down_timer, 0);
1760 atomic_set(&vha->loop_state, LOOP_UP);
1761 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1762 qla2xxx_wake_dpc(vha);
1763 } else if (evt->u.aenfx.mbx[2] == 2) {
1764 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1765 }
1766 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1767 if (evt->u.aenfx.mbx[2] == 1) {
1768 if (!vha->flags.fw_tgt_reported)
1769 vha->flags.fw_tgt_reported = 1;
1770 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1771 } else if (evt->u.aenfx.mbx[2] == 2) {
1772 vha->device_flags |= DFLG_NO_CABLE;
1773 qla2x00_mark_all_devices_lost(vha, 1);
1774 }
1775 }
1776 break;
1777 case QLAFX00_MBA_LINK_UP:
1778 aen_code = FCH_EVT_LINKUP;
1779 aen_data = 0;
1780 break;
1781 case QLAFX00_MBA_LINK_DOWN:
1782 aen_code = FCH_EVT_LINKDOWN;
1783 aen_data = 0;
1784 break;
71e56003
AB		 1785 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
1786 ql_log(ql_log_info, vha, 0x5082,
1787 "Process critical temperature event "
1788 "aenmb[0]: %x\n",
1789 evt->u.aenfx.evtcode);
1790 scsi_block_requests(vha->host);
1791 qlafx00_abort_isp_cleanup(vha, true);
1792 scsi_unblock_requests(vha->host);
1793 break;
8ae6d9c7
GM		 1794 }
1795
1796 fc_host_post_event(vha->host, fc_get_event_number(),
1797 aen_code, aen_data);
1798
1799 return rval;
1800}
1801
1802static void
1803qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1804{
1805 u64 port_name = 0, node_name = 0;
1806
1807 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1808 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1809
1810 fc_host_node_name(vha->host) = node_name;
1811 fc_host_port_name(vha->host) = port_name;
1812 if (!pinfo->port_type)
1813 vha->hw->current_topology = ISP_CFG_F;
1814 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1815 atomic_set(&vha->loop_state, LOOP_READY);
1816 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1817 atomic_set(&vha->loop_state, LOOP_DOWN);
1818 vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1819}
1820
1821static void
1822qla2x00_fxdisc_iocb_timeout(void *data)
1823{
1824 srb_t *sp = (srb_t *)data;
1825 struct srb_iocb *lio = &sp->u.iocb_cmd;
1826
1827 complete(&lio->u.fxiocb.fxiocb_comp);
1828}
1829
1830static void
1831qla2x00_fxdisc_sp_done(void *data, void *ptr, int res)
1832{
1833 srb_t *sp = (srb_t *)ptr;
1834 struct srb_iocb *lio = &sp->u.iocb_cmd;
1835
1836 complete(&lio->u.fxiocb.fxiocb_comp);
1837}
1838
1839int
1f8deefe 1840qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
8ae6d9c7
GM		 1841{
1842 srb_t *sp;
1843 struct srb_iocb *fdisc;
1844 int rval = QLA_FUNCTION_FAILED;
1845 struct qla_hw_data *ha = vha->hw;
1846 struct host_system_info *phost_info;
1847 struct register_host_info *preg_hsi;
1848 struct new_utsname *p_sysid = NULL;
1849 struct timeval tv;
1850
1851 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1852 if (!sp)
1853 goto done;
1854
1855 fdisc = &sp->u.iocb_cmd;
1856 switch (fx_type) {
1857 case FXDISC_GET_CONFIG_INFO:
1858 fdisc->u.fxiocb.flags =
1859 SRB_FXDISC_RESP_DMA_VALID;
1860 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1861 break;
1862 case FXDISC_GET_PORT_INFO:
1863 fdisc->u.fxiocb.flags =
1864 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1865 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1f8deefe 1866 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
8ae6d9c7
GM		 1867 break;
1868 case FXDISC_GET_TGT_NODE_INFO:
1869 fdisc->u.fxiocb.flags =
1870 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1871 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1f8deefe 1872 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
8ae6d9c7
GM		 1873 break;
1874 case FXDISC_GET_TGT_NODE_LIST:
1875 fdisc->u.fxiocb.flags =
1876 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1877 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1878 break;
1879 case FXDISC_REG_HOST_INFO:
1880 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1881 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1882 p_sysid = utsname();
1883 if (!p_sysid) {
1884 ql_log(ql_log_warn, vha, 0x303c,
0b1587b1 1885 "Not able to get the system information\n");
8ae6d9c7
GM		 1886 goto done_free_sp;
1887 }
1888 break;
767157c5 1889 case FXDISC_ABORT_IOCTL:
8ae6d9c7
GM		 1890 default:
1891 break;
1892 }
1893
1894 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1895 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1896 fdisc->u.fxiocb.req_len,
1897 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1898 if (!fdisc->u.fxiocb.req_addr)
1899 goto done_free_sp;
1900
1901 if (fx_type == FXDISC_REG_HOST_INFO) {
1902 preg_hsi = (struct register_host_info *)
1903 fdisc->u.fxiocb.req_addr;
1904 phost_info = &preg_hsi->hsi;
1905 memset(preg_hsi, 0, sizeof(struct register_host_info));
1906 phost_info->os_type = OS_TYPE_LINUX;
1907 strncpy(phost_info->sysname,
1908 p_sysid->sysname, SYSNAME_LENGTH);
1909 strncpy(phost_info->nodename,
1910 p_sysid->nodename, NODENAME_LENGTH);
e8f5e95d
AB		 1911 if (!strcmp(phost_info->nodename, "(none)"))
1912 ha->mr.host_info_resend = true;
8ae6d9c7
GM		 1913 strncpy(phost_info->release,
1914 p_sysid->release, RELEASE_LENGTH);
1915 strncpy(phost_info->version,
1916 p_sysid->version, VERSION_LENGTH);
1917 strncpy(phost_info->machine,
1918 p_sysid->machine, MACHINE_LENGTH);
1919 strncpy(phost_info->domainname,
1920 p_sysid->domainname, DOMNAME_LENGTH);
1921 strncpy(phost_info->hostdriver,
1922 QLA2XXX_VERSION, VERSION_LENGTH);
1923 do_gettimeofday(&tv);
1924 preg_hsi->utc = (uint64_t)tv.tv_sec;
1925 ql_dbg(ql_dbg_init, vha, 0x0149,
1926 "ISP%04X: Host registration with firmware\n",
1927 ha->pdev->device);
1928 ql_dbg(ql_dbg_init, vha, 0x014a,
1929 "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1930 phost_info->os_type,
1931 phost_info->sysname,
1932 phost_info->nodename);
1933 ql_dbg(ql_dbg_init, vha, 0x014b,
1934 "release = '%s', version = '%s'\n",
1935 phost_info->release,
1936 phost_info->version);
1937 ql_dbg(ql_dbg_init, vha, 0x014c,
1938 "machine = '%s' "
1939 "domainname = '%s', hostdriver = '%s'\n",
1940 phost_info->machine,
1941 phost_info->domainname,
1942 phost_info->hostdriver);
1943 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1944 (uint8_t *)phost_info,
1945 sizeof(struct host_system_info));
1946 }
1947 }
1948
1949 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1950 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1951 fdisc->u.fxiocb.rsp_len,
1952 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1953 if (!fdisc->u.fxiocb.rsp_addr)
1954 goto done_unmap_req;
1955 }
1956
1957 sp->type = SRB_FXIOCB_DCMD;
1958 sp->name = "fxdisc";
1959 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1960 fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1f8deefe 1961 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
8ae6d9c7
GM		 1962 sp->done = qla2x00_fxdisc_sp_done;
1963
1964 rval = qla2x00_start_sp(sp);
1965 if (rval != QLA_SUCCESS)
1966 goto done_unmap_dma;
1967
1968 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1969
1970 if (fx_type == FXDISC_GET_CONFIG_INFO) {
1971 struct config_info_data *pinfo =
1972 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
03eb912a
AB		 1973 strcpy(vha->hw->model_number, pinfo->model_num);
1974 strcpy(vha->hw->model_desc, pinfo->model_description);
8ae6d9c7
GM		 1975 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1976 sizeof(vha->hw->mr.symbolic_name));
1977 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1978 sizeof(vha->hw->mr.serial_num));
1979 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1980 sizeof(vha->hw->mr.hw_version));
1981 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1982 sizeof(vha->hw->mr.fw_version));
1983 strim(vha->hw->mr.fw_version);
1984 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1985 sizeof(vha->hw->mr.uboot_version));
1986 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1987 sizeof(vha->hw->mr.fru_serial_num));
f875cd4c
AB		 1988 vha->hw->mr.critical_temperature =
1989 (pinfo->nominal_temp_value) ?
1990 pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
1fe19ee4
AB		 1991 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1992 QLAFX00_EXTENDED_IO_EN_MASK) != 0;
8ae6d9c7
GM		 1993 } else if (fx_type == FXDISC_GET_PORT_INFO) {
1994 struct port_info_data *pinfo =
1995 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1996 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1997 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1998 vha->d_id.b.domain = pinfo->port_id[0];
1999 vha->d_id.b.area = pinfo->port_id[1];
2000 vha->d_id.b.al_pa = pinfo->port_id[2];
2001 qlafx00_update_host_attr(vha, pinfo);
2002 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
2003 (uint8_t *)pinfo, 16);
2004 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
2005 struct qlafx00_tgt_node_info *pinfo =
2006 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
2007 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
2008 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
2009 fcport->port_type = FCT_TARGET;
2010 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
2011 (uint8_t *)pinfo, 16);
2012 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
2013 struct qlafx00_tgt_node_info *pinfo =
2014 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
2015 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
2016 (uint8_t *)pinfo, 16);
2017 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
767157c5
AB		 2018 } else if (fx_type == FXDISC_ABORT_IOCTL)
2019 fdisc->u.fxiocb.result =
2020 (fdisc->u.fxiocb.result == cpu_to_le32(0x68)) ?
2021 cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED);
2022
1f8deefe 2023 rval = le32_to_cpu(fdisc->u.fxiocb.result);
8ae6d9c7
GM		 2024
2025done_unmap_dma:
2026 if (fdisc->u.fxiocb.rsp_addr)
2027 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
2028 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
2029
2030done_unmap_req:
2031 if (fdisc->u.fxiocb.req_addr)
2032 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
2033 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
2034done_free_sp:
2035 sp->free(vha, sp);
2036done:
2037 return rval;
2038}
2039
2040static void
2041qlafx00_abort_iocb_timeout(void *data)
2042{
2043 srb_t *sp = (srb_t *)data;
2044 struct srb_iocb *abt = &sp->u.iocb_cmd;
2045
1f8deefe 2046 abt->u.abt.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT);
8ae6d9c7
GM		 2047 complete(&abt->u.abt.comp);
2048}
2049
2050static void
2051qlafx00_abort_sp_done(void *data, void *ptr, int res)
2052{
2053 srb_t *sp = (srb_t *)ptr;
2054 struct srb_iocb *abt = &sp->u.iocb_cmd;
2055
2056 complete(&abt->u.abt.comp);
2057}
2058
2059static int
2060qlafx00_async_abt_cmd(srb_t *cmd_sp)
2061{
2062 scsi_qla_host_t *vha = cmd_sp->fcport->vha;
2063 fc_port_t *fcport = cmd_sp->fcport;
2064 struct srb_iocb *abt_iocb;
2065 srb_t *sp;
2066 int rval = QLA_FUNCTION_FAILED;
2067
2068 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
2069 if (!sp)
2070 goto done;
2071
2072 abt_iocb = &sp->u.iocb_cmd;
2073 sp->type = SRB_ABT_CMD;
2074 sp->name = "abort";
2075 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
2076 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
2077 sp->done = qlafx00_abort_sp_done;
2078 abt_iocb->timeout = qlafx00_abort_iocb_timeout;
2079 init_completion(&abt_iocb->u.abt.comp);
2080
2081 rval = qla2x00_start_sp(sp);
2082 if (rval != QLA_SUCCESS)
2083 goto done_free_sp;
2084
2085 ql_dbg(ql_dbg_async, vha, 0x507c,
2086 "Abort command issued - hdl=%x, target_id=%x\n",
2087 cmd_sp->handle, fcport->tgt_id);
2088
2089 wait_for_completion(&abt_iocb->u.abt.comp);
2090
2091 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
2092 QLA_SUCCESS : QLA_FUNCTION_FAILED;
2093
2094done_free_sp:
2095 sp->free(vha, sp);
2096done:
2097 return rval;
2098}
2099
2100int
2101qlafx00_abort_command(srb_t *sp)
2102{
2103 unsigned long flags = 0;
2104
2105 uint32_t handle;
2106 fc_port_t *fcport = sp->fcport;
2107 struct scsi_qla_host *vha = fcport->vha;
2108 struct qla_hw_data *ha = vha->hw;
2109 struct req_que *req = vha->req;
2110
2111 spin_lock_irqsave(&ha->hardware_lock, flags);
2112 for (handle = 1; handle < DEFAULT_OUTSTANDING_COMMANDS; handle++) {
2113 if (req->outstanding_cmds[handle] == sp)
2114 break;
2115 }
2116 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2117 if (handle == DEFAULT_OUTSTANDING_COMMANDS) {
2118 /* Command not found. */
2119 return QLA_FUNCTION_FAILED;
2120 }
767157c5
AB		 2121 if (sp->type == SRB_FXIOCB_DCMD)
2122 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
2123 FXDISC_ABORT_IOCTL);
2124
8ae6d9c7
GM		 2125 return qlafx00_async_abt_cmd(sp);
2126}
2127
2128/*
2129 * qlafx00_initialize_adapter
2130 * Initialize board.
2131 *
2132 * Input:
2133 * ha = adapter block pointer.
2134 *
2135 * Returns:
2136 * 0 = success
2137 */
2138int
2139qlafx00_initialize_adapter(scsi_qla_host_t *vha)
2140{
2141 int rval;
2142 struct qla_hw_data *ha = vha->hw;
71e56003 2143 uint32_t tempc;
8ae6d9c7
GM		 2144
2145 /* Clear adapter flags. */
2146 vha->flags.online = 0;
2147 ha->flags.chip_reset_done = 0;
2148 vha->flags.reset_active = 0;
2149 ha->flags.pci_channel_io_perm_failure = 0;
2150 ha->flags.eeh_busy = 0;
8ae6d9c7
GM		 2151 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2152 atomic_set(&vha->loop_state, LOOP_DOWN);
2153 vha->device_flags = DFLG_NO_CABLE;
2154 vha->dpc_flags = 0;
2155 vha->flags.management_server_logged_in = 0;
2156 vha->marker_needed = 0;
2157 ha->isp_abort_cnt = 0;
2158 ha->beacon_blink_led = 0;
2159
2160 set_bit(0, ha->req_qid_map);
2161 set_bit(0, ha->rsp_qid_map);
2162
2163 ql_dbg(ql_dbg_init, vha, 0x0147,
2164 "Configuring PCI space...\n");
2165
2166 rval = ha->isp_ops->pci_config(vha);
2167 if (rval) {
2168 ql_log(ql_log_warn, vha, 0x0148,
2169 "Unable to configure PCI space.\n");
2170 return rval;
2171 }
2172
2173 rval = qlafx00_init_fw_ready(vha);
2174 if (rval != QLA_SUCCESS)
2175 return rval;
2176
2177 qlafx00_save_queue_ptrs(vha);
2178
2179 rval = qlafx00_config_queues(vha);
2180 if (rval != QLA_SUCCESS)
2181 return rval;
2182
2183 /*
2184 * Allocate the array of outstanding commands
2185 * now that we know the firmware resources.
2186 */
2187 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2188 if (rval != QLA_SUCCESS)
2189 return rval;
2190
2191 rval = qla2x00_init_rings(vha);
2192 ha->flags.chip_reset_done = 1;
2193
71e56003
AB		 2194 tempc = QLAFX00_GET_TEMPERATURE(ha);
2195 ql_dbg(ql_dbg_init, vha, 0x0152,
2196 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2197 __func__, tempc);
2198
8ae6d9c7
GM		 2199 return rval;
2200}
2201
2202uint32_t
2203qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2204 char *buf)
2205{
2206 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2207 int rval = QLA_FUNCTION_FAILED;
2208 uint32_t state[1];
2209
2210 if (qla2x00_reset_active(vha))
2211 ql_log(ql_log_warn, vha, 0x70ce,
2212 "ISP reset active.\n");
2213 else if (!vha->hw->flags.eeh_busy) {
2214 rval = qlafx00_get_firmware_state(vha, state);
2215 }
2216 if (rval != QLA_SUCCESS)
2217 memset(state, -1, sizeof(state));
2218
2219 return state[0];
2220}
2221
2222void
2223qlafx00_get_host_speed(struct Scsi_Host *shost)
2224{
2225 struct qla_hw_data *ha = ((struct scsi_qla_host *)
2226 (shost_priv(shost)))->hw;
2227 u32 speed = FC_PORTSPEED_UNKNOWN;
2228
2229 switch (ha->link_data_rate) {
2230 case QLAFX00_PORT_SPEED_2G:
2231 speed = FC_PORTSPEED_2GBIT;
2232 break;
2233 case QLAFX00_PORT_SPEED_4G:
2234 speed = FC_PORTSPEED_4GBIT;
2235 break;
2236 case QLAFX00_PORT_SPEED_8G:
2237 speed = FC_PORTSPEED_8GBIT;
2238 break;
2239 case QLAFX00_PORT_SPEED_10G:
2240 speed = FC_PORTSPEED_10GBIT;
2241 break;
2242 }
2243 fc_host_speed(shost) = speed;
2244}
2245
2246/** QLAFX00 specific ISR implementation functions */
2247
2248static inline void
2249qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2250 uint32_t sense_len, struct rsp_que *rsp, int res)
2251{
2252 struct scsi_qla_host *vha = sp->fcport->vha;
2253 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2254 uint32_t track_sense_len;
2255
2256 SET_FW_SENSE_LEN(sp, sense_len);
2257
2258 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2259 sense_len = SCSI_SENSE_BUFFERSIZE;
2260
2261 SET_CMD_SENSE_LEN(sp, sense_len);
2262 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2263 track_sense_len = sense_len;
2264
2265 if (sense_len > par_sense_len)
2266 sense_len = par_sense_len;
2267
2268 memcpy(cp->sense_buffer, sense_data, sense_len);
2269
2270 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2271
2272 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2273 track_sense_len -= sense_len;
2274 SET_CMD_SENSE_LEN(sp, track_sense_len);
2275
2276 ql_dbg(ql_dbg_io, vha, 0x304d,
2277 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2278 sense_len, par_sense_len, track_sense_len);
2279 if (GET_FW_SENSE_LEN(sp) > 0) {
2280 rsp->status_srb = sp;
2281 cp->result = res;
2282 }
2283
2284 if (sense_len) {
2285 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2286 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n",
2287 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
2288 cp);
2289 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2290 cp->sense_buffer, sense_len);
2291 }
2292}
2293
2294static void
2295qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2296 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
1f8deefe 2297 __le16 sstatus, __le16 cpstatus)
8ae6d9c7
GM		 2298{
2299 struct srb_iocb *tmf;
2300
2301 tmf = &sp->u.iocb_cmd;
1f8deefe
SK		 2302 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2303 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2304 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
8ae6d9c7
GM		 2305 tmf->u.tmf.comp_status = cpstatus;
2306 sp->done(vha, sp, 0);
2307}
2308
2309static void
2310qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2311 struct abort_iocb_entry_fx00 *pkt)
2312{
2313 const char func[] = "ABT_IOCB";
2314 srb_t *sp;
2315 struct srb_iocb *abt;
2316
2317 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2318 if (!sp)
2319 return;
2320
2321 abt = &sp->u.iocb_cmd;
1f8deefe 2322 abt->u.abt.comp_status = pkt->tgt_id_sts;
8ae6d9c7
GM		 2323 sp->done(vha, sp, 0);
2324}
2325
2326static void
2327qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2328 struct ioctl_iocb_entry_fx00 *pkt)
2329{
2330 const char func[] = "IOSB_IOCB";
2331 srb_t *sp;
2332 struct fc_bsg_job *bsg_job;
2333 struct srb_iocb *iocb_job;
2334 int res;
2335 struct qla_mt_iocb_rsp_fx00 fstatus;
2336 uint8_t *fw_sts_ptr;
2337
2338 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2339 if (!sp)
2340 return;
2341
2342 if (sp->type == SRB_FXIOCB_DCMD) {
2343 iocb_job = &sp->u.iocb_cmd;
1f8deefe
SK		 2344 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2345 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2346 iocb_job->u.fxiocb.result = pkt->status;
8ae6d9c7
GM		 2347 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2348 iocb_job->u.fxiocb.req_data =
1f8deefe 2349 pkt->dataword_r;
8ae6d9c7
GM		 2350 } else {
2351 bsg_job = sp->u.bsg_job;
2352
2353 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2354
2355 fstatus.reserved_1 = pkt->reserved_0;
2356 fstatus.func_type = pkt->comp_func_num;
2357 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2358 fstatus.ioctl_data = pkt->dataword_r;
2359 fstatus.adapid = pkt->adapid;
2360 fstatus.adapid_hi = pkt->adapid_hi;
2361 fstatus.reserved_2 = pkt->reserved_1;
2362 fstatus.res_count = pkt->residuallen;
2363 fstatus.status = pkt->status;
2364 fstatus.seq_number = pkt->seq_no;
2365 memcpy(fstatus.reserved_3,
2366 pkt->reserved_2, 20 * sizeof(uint8_t));
2367
2368 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) +
2369 sizeof(struct fc_bsg_reply);
2370
2371 memcpy(fw_sts_ptr, (uint8_t *)&fstatus,
2372 sizeof(struct qla_mt_iocb_rsp_fx00));
2373 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2374 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2375
2376 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2377 sp->fcport->vha, 0x5080,
2378 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00));
2379
2380 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2381 sp->fcport->vha, 0x5074,
2382 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00));
2383
2384 res = bsg_job->reply->result = DID_OK << 16;
2385 bsg_job->reply->reply_payload_rcv_len =
2386 bsg_job->reply_payload.payload_len;
2387 }
2388 sp->done(vha, sp, res);
2389}
2390
2391/**
2392 * qlafx00_status_entry() - Process a Status IOCB entry.
2393 * @ha: SCSI driver HA context
2394 * @pkt: Entry pointer
2395 */
2396static void
2397qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2398{
2399 srb_t *sp;
2400 fc_port_t *fcport;
2401 struct scsi_cmnd *cp;
2402 struct sts_entry_fx00 *sts;
1f8deefe
SK		 2403 __le16 comp_status;
2404 __le16 scsi_status;
8ae6d9c7 2405 uint16_t ox_id;
1f8deefe 2406 __le16 lscsi_status;
8ae6d9c7
GM		 2407 int32_t resid;
2408 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2409 fw_resid_len;
2410 uint8_t *rsp_info = NULL, *sense_data = NULL;
2411 struct qla_hw_data *ha = vha->hw;
2412 uint32_t hindex, handle;
2413 uint16_t que;
2414 struct req_que *req;
2415 int logit = 1;
2416 int res = 0;
2417
2418 sts = (struct sts_entry_fx00 *) pkt;
2419
1f8deefe
SK		 2420 comp_status = sts->comp_status;
2421 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
8ae6d9c7
GM		 2422 hindex = sts->handle;
2423 handle = LSW(hindex);
2424
2425 que = MSW(hindex);
2426 req = ha->req_q_map[que];
2427
2428 /* Validate handle. */
2429 if (handle < req->num_outstanding_cmds)
2430 sp = req->outstanding_cmds[handle];
2431 else
2432 sp = NULL;
2433
2434 if (sp == NULL) {
2435 ql_dbg(ql_dbg_io, vha, 0x3034,
2436 "Invalid status handle (0x%x).\n", handle);
2437
2438 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2439 qla2xxx_wake_dpc(vha);
2440 return;
2441 }
2442
2443 if (sp->type == SRB_TM_CMD) {
2444 req->outstanding_cmds[handle] = NULL;
2445 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2446 scsi_status, comp_status);
2447 return;
2448 }
2449
2450 /* Fast path completion. */
2451 if (comp_status == CS_COMPLETE && scsi_status == 0) {
8ae6d9c7
GM		 2452 qla2x00_process_completed_request(vha, req, handle);
2453 return;
2454 }
2455
2456 req->outstanding_cmds[handle] = NULL;
2457 cp = GET_CMD_SP(sp);
2458 if (cp == NULL) {
2459 ql_dbg(ql_dbg_io, vha, 0x3048,
2460 "Command already returned (0x%x/%p).\n",
2461 handle, sp);
2462
2463 return;
2464 }
2465
1f8deefe 2466 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
8ae6d9c7
GM		 2467
2468 fcport = sp->fcport;
2469
2470 ox_id = 0;
2471 sense_len = par_sense_len = rsp_info_len = resid_len =
2472 fw_resid_len = 0;
1f8deefe
SK		 2473 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2474 sense_len = sts->sense_len;
2475 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2476 | (uint16_t)SS_RESIDUAL_OVER)))
8ae6d9c7 2477 resid_len = le32_to_cpu(sts->residual_len);
1f8deefe 2478 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
8ae6d9c7
GM		 2479 fw_resid_len = le32_to_cpu(sts->residual_len);
2480 rsp_info = sense_data = sts->data;
2481 par_sense_len = sizeof(sts->data);
2482
2483 /* Check for overrun. */
2484 if (comp_status == CS_COMPLETE &&
1f8deefe
SK		 2485 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2486 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
8ae6d9c7
GM		 2487
2488 /*
2489 * Based on Host and scsi status generate status code for Linux
2490 */
1f8deefe 2491 switch (le16_to_cpu(comp_status)) {
8ae6d9c7
GM		 2492 case CS_COMPLETE:
2493 case CS_QUEUE_FULL:
2494 if (scsi_status == 0) {
2495 res = DID_OK << 16;
2496 break;
2497 }
1f8deefe
SK		 2498 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2499 | (uint16_t)SS_RESIDUAL_OVER))) {
8ae6d9c7
GM		 2500 resid = resid_len;
2501 scsi_set_resid(cp, resid);
2502
2503 if (!lscsi_status &&
2504 ((unsigned)(scsi_bufflen(cp) - resid) <
2505 cp->underflow)) {
2506 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2507 "Mid-layer underflow "
2508 "detected (0x%x of 0x%x bytes).\n",
2509 resid, scsi_bufflen(cp));
2510
2511 res = DID_ERROR << 16;
2512 break;
2513 }
2514 }
1f8deefe 2515 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
8ae6d9c7 2516
1f8deefe
SK		 2517 if (lscsi_status ==
2518 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
8ae6d9c7
GM		 2519 ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2520 "QUEUE FULL detected.\n");
2521 break;
2522 }
2523 logit = 0;
1f8deefe 2524 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
8ae6d9c7
GM		 2525 break;
2526
2527 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1f8deefe 2528 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
8ae6d9c7
GM		 2529 break;
2530
2531 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2532 rsp, res);
2533 break;
2534
2535 case CS_DATA_UNDERRUN:
2536 /* Use F/W calculated residual length. */
2537 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2538 resid = fw_resid_len;
2539 else
2540 resid = resid_len;
2541 scsi_set_resid(cp, resid);
1f8deefe 2542 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
8ae6d9c7
GM		 2543 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2544 && fw_resid_len != resid_len) {
2545 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2546 "Dropped frame(s) detected "
2547 "(0x%x of 0x%x bytes).\n",
2548 resid, scsi_bufflen(cp));
2549
1f8deefe
SK		 2550 res = DID_ERROR << 16 |
2551 le16_to_cpu(lscsi_status);
8ae6d9c7
GM		 2552 goto check_scsi_status;
2553 }
2554
2555 if (!lscsi_status &&
2556 ((unsigned)(scsi_bufflen(cp) - resid) <
2557 cp->underflow)) {
2558 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2559 "Mid-layer underflow "
2560 "detected (0x%x of 0x%x bytes, "
2561 "cp->underflow: 0x%x).\n",
2562 resid, scsi_bufflen(cp), cp->underflow);
2563
2564 res = DID_ERROR << 16;
2565 break;
2566 }
1f8deefe
SK		 2567 } else if (lscsi_status !=
2568 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2569 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
8ae6d9c7
GM		 2570 /*
2571 * scsi status of task set and busy are considered
2572 * to be task not completed.
2573 */
2574
2575 ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2576 "Dropped frame(s) detected (0x%x "
2577 "of 0x%x bytes).\n", resid,
2578 scsi_bufflen(cp));
2579
1f8deefe 2580 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
8ae6d9c7
GM		 2581 goto check_scsi_status;
2582 } else {
2583 ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2584 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2585 scsi_status, lscsi_status);
2586 }
2587
1f8deefe 2588 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
8ae6d9c7
GM		 2589 logit = 0;
2590
2591check_scsi_status:
2592 /*
2593 * Check to see if SCSI Status is non zero. If so report SCSI
2594 * Status.
2595 */
2596 if (lscsi_status != 0) {
1f8deefe
SK		 2597 if (lscsi_status ==
2598 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
8ae6d9c7
GM		 2599 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2600 "QUEUE FULL detected.\n");
2601 logit = 1;
2602 break;
2603 }
1f8deefe
SK		 2604 if (lscsi_status !=
2605 cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
8ae6d9c7
GM		 2606 break;
2607
2608 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1f8deefe
SK		 2609 if (!(scsi_status &
2610 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
8ae6d9c7
GM		 2611 break;
2612
2613 qlafx00_handle_sense(sp, sense_data, par_sense_len,
2614 sense_len, rsp, res);
2615 }
2616 break;
2617
2618 case CS_PORT_LOGGED_OUT:
2619 case CS_PORT_CONFIG_CHG:
2620 case CS_PORT_BUSY:
2621 case CS_INCOMPLETE:
2622 case CS_PORT_UNAVAILABLE:
2623 case CS_TIMEOUT:
2624 case CS_RESET:
2625
2626 /*
2627 * We are going to have the fc class block the rport
2628 * while we try to recover so instruct the mid layer
2629 * to requeue until the class decides how to handle this.
2630 */
2631 res = DID_TRANSPORT_DISRUPTED << 16;
2632
2633 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2634 "Port down status: port-state=0x%x.\n",
2635 atomic_read(&fcport->state));
2636
2637 if (atomic_read(&fcport->state) == FCS_ONLINE)
2638 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2639 break;
2640
2641 case CS_ABORTED:
2642 res = DID_RESET << 16;
2643 break;
2644
2645 default:
2646 res = DID_ERROR << 16;
2647 break;
2648 }
2649
2650 if (logit)
2651 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
7b833558
OK		 2652 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d "
2653 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2654 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2655 "par_sense_len=0x%x, rsp_info_len=0x%x\n",
8ae6d9c7
GM		 2656 comp_status, scsi_status, res, vha->host_no,
2657 cp->device->id, cp->device->lun, fcport->tgt_id,
7b833558 2658 lscsi_status, cp->cmnd, scsi_bufflen(cp),
8ae6d9c7
GM		 2659 rsp_info_len, resid_len, fw_resid_len, sense_len,
2660 par_sense_len, rsp_info_len);
2661
8ae6d9c7
GM		 2662 if (rsp->status_srb == NULL)
2663 sp->done(ha, sp, res);
2664}
2665
2666/**
2667 * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2668 * @ha: SCSI driver HA context
2669 * @pkt: Entry pointer
2670 *
2671 * Extended sense data.
2672 */
2673static void
2674qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2675{
2676 uint8_t sense_sz = 0;
2677 struct qla_hw_data *ha = rsp->hw;
2678 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2679 srb_t *sp = rsp->status_srb;
2680 struct scsi_cmnd *cp;
2681 uint32_t sense_len;
2682 uint8_t *sense_ptr;
2683
2684 if (!sp) {
2685 ql_dbg(ql_dbg_io, vha, 0x3037,
2686 "no SP, sp = %p\n", sp);
2687 return;
2688 }
2689
2690 if (!GET_FW_SENSE_LEN(sp)) {
2691 ql_dbg(ql_dbg_io, vha, 0x304b,
2692 "no fw sense data, sp = %p\n", sp);
2693 return;
2694 }
2695 cp = GET_CMD_SP(sp);
2696 if (cp == NULL) {
2697 ql_log(ql_log_warn, vha, 0x303b,
2698 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2699
2700 rsp->status_srb = NULL;
2701 return;
2702 }
2703
2704 if (!GET_CMD_SENSE_LEN(sp)) {
2705 ql_dbg(ql_dbg_io, vha, 0x304c,
2706 "no sense data, sp = %p\n", sp);
2707 } else {
2708 sense_len = GET_CMD_SENSE_LEN(sp);
2709 sense_ptr = GET_CMD_SENSE_PTR(sp);
2710 ql_dbg(ql_dbg_io, vha, 0x304f,
2711 "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2712 sp, sense_len, sense_ptr);
2713
2714 if (sense_len > sizeof(pkt->data))
2715 sense_sz = sizeof(pkt->data);
2716 else
2717 sense_sz = sense_len;
2718
2719 /* Move sense data. */
2720 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2721 (uint8_t *)pkt, sizeof(sts_cont_entry_t));
2722 memcpy(sense_ptr, pkt->data, sense_sz);
2723 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2724 sense_ptr, sense_sz);
2725
2726 sense_len -= sense_sz;
2727 sense_ptr += sense_sz;
2728
2729 SET_CMD_SENSE_PTR(sp, sense_ptr);
2730 SET_CMD_SENSE_LEN(sp, sense_len);
2731 }
2732 sense_len = GET_FW_SENSE_LEN(sp);
2733 sense_len = (sense_len > sizeof(pkt->data)) ?
2734 (sense_len - sizeof(pkt->data)) : 0;
2735 SET_FW_SENSE_LEN(sp, sense_len);
2736
2737 /* Place command on done queue. */
2738 if (sense_len == 0) {
2739 rsp->status_srb = NULL;
2740 sp->done(ha, sp, cp->result);
2741 }
2742}
2743
2744/**
2745 * qlafx00_multistatus_entry() - Process Multi response queue entries.
2746 * @ha: SCSI driver HA context
2747 */
2748static void
2749qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2750 struct rsp_que *rsp, void *pkt)
2751{
2752 srb_t *sp;
2753 struct multi_sts_entry_fx00 *stsmfx;
2754 struct qla_hw_data *ha = vha->hw;
2755 uint32_t handle, hindex, handle_count, i;
2756 uint16_t que;
2757 struct req_que *req;
1f8deefe 2758 __le32 *handle_ptr;
8ae6d9c7
GM		 2759
2760 stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2761
2762 handle_count = stsmfx->handle_count;
2763
2764 if (handle_count > MAX_HANDLE_COUNT) {
2765 ql_dbg(ql_dbg_io, vha, 0x3035,
2766 "Invalid handle count (0x%x).\n", handle_count);
2767 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2768 qla2xxx_wake_dpc(vha);
2769 return;
2770 }
2771
1f8deefe 2772 handle_ptr = &stsmfx->handles[0];
8ae6d9c7
GM		 2773
2774 for (i = 0; i < handle_count; i++) {
2775 hindex = le32_to_cpu(*handle_ptr);
2776 handle = LSW(hindex);
2777 que = MSW(hindex);
2778 req = ha->req_q_map[que];
2779
2780 /* Validate handle. */
2781 if (handle < req->num_outstanding_cmds)
2782 sp = req->outstanding_cmds[handle];
2783 else
2784 sp = NULL;
2785
2786 if (sp == NULL) {
2787 ql_dbg(ql_dbg_io, vha, 0x3044,
2788 "Invalid status handle (0x%x).\n", handle);
2789 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2790 qla2xxx_wake_dpc(vha);
2791 return;
2792 }
2793 qla2x00_process_completed_request(vha, req, handle);
2794 handle_ptr++;
2795 }
2796}
2797
2798/**
2799 * qlafx00_error_entry() - Process an error entry.
2800 * @ha: SCSI driver HA context
2801 * @pkt: Entry pointer
2802 */
2803static void
2804qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2805 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype)
2806{
2807 srb_t *sp;
2808 struct qla_hw_data *ha = vha->hw;
2809 const char func[] = "ERROR-IOCB";
2810 uint16_t que = MSW(pkt->handle);
2811 struct req_que *req = NULL;
2812 int res = DID_ERROR << 16;
2813
2814 ql_dbg(ql_dbg_async, vha, 0x507f,
2815 "type of error status in response: 0x%x\n", estatus);
2816
2817 req = ha->req_q_map[que];
2818
2819 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2820 if (sp) {
2821 sp->done(ha, sp, res);
2822 return;
2823 }
2824
2825 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2826 qla2xxx_wake_dpc(vha);
2827}
2828
2829/**
2830 * qlafx00_process_response_queue() - Process response queue entries.
2831 * @ha: SCSI driver HA context
2832 */
2833static void
2834qlafx00_process_response_queue(struct scsi_qla_host *vha,
2835 struct rsp_que *rsp)
2836{
2837 struct sts_entry_fx00 *pkt;
2838 response_t *lptr;
2839
1f8deefe 2840 while (RD_REG_DWORD((void __iomem *)&(rsp->ring_ptr->signature)) !=
8ae6d9c7
GM		 2841 RESPONSE_PROCESSED) {
2842 lptr = rsp->ring_ptr;
1f8deefe
SK		 2843 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2844 sizeof(rsp->rsp_pkt));
8ae6d9c7
GM		 2845 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2846
2847 rsp->ring_index++;
2848 if (rsp->ring_index == rsp->length) {
2849 rsp->ring_index = 0;
2850 rsp->ring_ptr = rsp->ring;
2851 } else {
2852 rsp->ring_ptr++;
2853 }
2854
2855 if (pkt->entry_status != 0 &&
2856 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2857 qlafx00_error_entry(vha, rsp,
2858 (struct sts_entry_fx00 *)pkt, pkt->entry_status,
2859 pkt->entry_type);
2860 goto next_iter;
2861 continue;
2862 }
2863
2864 switch (pkt->entry_type) {
2865 case STATUS_TYPE_FX00:
2866 qlafx00_status_entry(vha, rsp, pkt);
2867 break;
2868
2869 case STATUS_CONT_TYPE_FX00:
2870 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2871 break;
2872
2873 case MULTI_STATUS_TYPE_FX00:
2874 qlafx00_multistatus_entry(vha, rsp, pkt);
2875 break;
2876
2877 case ABORT_IOCB_TYPE_FX00:
2878 qlafx00_abort_iocb_entry(vha, rsp->req,
2879 (struct abort_iocb_entry_fx00 *)pkt);
2880 break;
2881
2882 case IOCTL_IOSB_TYPE_FX00:
2883 qlafx00_ioctl_iosb_entry(vha, rsp->req,
2884 (struct ioctl_iocb_entry_fx00 *)pkt);
2885 break;
2886 default:
2887 /* Type Not Supported. */
2888 ql_dbg(ql_dbg_async, vha, 0x5081,
2889 "Received unknown response pkt type %x "
2890 "entry status=%x.\n",
2891 pkt->entry_type, pkt->entry_status);
2892 break;
2893 }
2894next_iter:
1f8deefe
SK		 2895 WRT_REG_DWORD((void __iomem *)&lptr->signature,
2896 RESPONSE_PROCESSED);
8ae6d9c7
GM		 2897 wmb();
2898 }
2899
2900 /* Adjust ring index */
2901 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2902}
2903
2904/**
2905 * qlafx00_async_event() - Process aynchronous events.
2906 * @ha: SCSI driver HA context
2907 */
2908static void
2909qlafx00_async_event(scsi_qla_host_t *vha)
2910{
2911 struct qla_hw_data *ha = vha->hw;
2912 struct device_reg_fx00 __iomem *reg;
2913 int data_size = 1;
2914
2915 reg = &ha->iobase->ispfx00;
2916 /* Setup to process RIO completion. */
2917 switch (ha->aenmb[0]) {
2918 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */
2919 ql_log(ql_log_warn, vha, 0x5079,
2920 "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2921 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2922 break;
2923
2924 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */
2925 ql_dbg(ql_dbg_async, vha, 0x5076,
2926 "Asynchronous FW shutdown requested.\n");
2927 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2928 qla2xxx_wake_dpc(vha);
2929 break;
2930
2931 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
2932 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2933 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2934 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2935 ql_dbg(ql_dbg_async, vha, 0x5077,
2936 "Asynchronous port Update received "
2937 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2938 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2939 data_size = 4;
2940 break;
71e56003
AB		 2941
2942 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */
4881d095
AB		 2943 ql_log(ql_log_info, vha, 0x5085,
2944 "Asynchronous over temperature event received "
2945 "aenmb[0]: %x\n",
2946 ha->aenmb[0]);
2947 break;
2948
2949 case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */
2950 ql_log(ql_log_info, vha, 0x5086,
2951 "Asynchronous normal temperature event received "
2952 "aenmb[0]: %x\n",
2953 ha->aenmb[0]);
2954 break;
2955
71e56003
AB		 2956 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
2957 ql_log(ql_log_info, vha, 0x5083,
2958 "Asynchronous critical temperature event received "
2959 "aenmb[0]: %x\n",
2960 ha->aenmb[0]);
71e56003
AB		 2961 break;
2962
8ae6d9c7
GM		 2963 default:
2964 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2965 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2966 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2967 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2968 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2969 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2970 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2971 ql_dbg(ql_dbg_async, vha, 0x5078,
2972 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2973 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2974 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2975 break;
2976 }
2977 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2978 (uint32_t *)ha->aenmb, data_size);
2979}
2980
2981/**
2982 *
2983 * qlafx00x_mbx_completion() - Process mailbox command completions.
2984 * @ha: SCSI driver HA context
2985 * @mb16: Mailbox16 register
2986 */
2987static void
2988qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2989{
2990 uint16_t cnt;
2991 uint16_t __iomem *wptr;
2992 struct qla_hw_data *ha = vha->hw;
2993 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2994
2995 if (!ha->mcp32)
2996 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2997
2998 /* Load return mailbox registers. */
2999 ha->flags.mbox_int = 1;
3000 ha->mailbox_out32[0] = mb0;
3001 wptr = (uint16_t __iomem *)&reg->mailbox17;
3002
3003 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
3004 ha->mailbox_out32[cnt] = RD_REG_WORD(wptr);
3005 wptr++;
3006 }
3007}
3008
3009/**
3010 * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
3011 * @irq:
3012 * @dev_id: SCSI driver HA context
3013 *
3014 * Called by system whenever the host adapter generates an interrupt.
3015 *
3016 * Returns handled flag.
3017 */
3018irqreturn_t
3019qlafx00_intr_handler(int irq, void *dev_id)
3020{
3021 scsi_qla_host_t *vha;
3022 struct qla_hw_data *ha;
3023 struct device_reg_fx00 __iomem *reg;
3024 int status;
3025 unsigned long iter;
3026 uint32_t stat;
3027 uint32_t mb[8];
3028 struct rsp_que *rsp;
3029 unsigned long flags;
3030 uint32_t clr_intr = 0;
3031
3032 rsp = (struct rsp_que *) dev_id;
3033 if (!rsp) {
3034 ql_log(ql_log_info, NULL, 0x507d,
3035 "%s: NULL response queue pointer.\n", __func__);
3036 return IRQ_NONE;
3037 }
3038
3039 ha = rsp->hw;
3040 reg = &ha->iobase->ispfx00;
3041 status = 0;
3042
3043 if (unlikely(pci_channel_offline(ha->pdev)))
3044 return IRQ_HANDLED;
3045
3046 spin_lock_irqsave(&ha->hardware_lock, flags);
3047 vha = pci_get_drvdata(ha->pdev);
3048 for (iter = 50; iter--; clr_intr = 0) {
3049 stat = QLAFX00_RD_INTR_REG(ha);
f3ddac19
CD		 3050 if (qla2x00_check_reg_for_disconnect(vha, stat))
3051 break;
8ae6d9c7
GM		 3052 if ((stat & QLAFX00_HST_INT_STS_BITS) == 0)
3053 break;
3054
3055 switch (stat & QLAFX00_HST_INT_STS_BITS) {
3056 case QLAFX00_INTR_MB_CMPLT:
3057 case QLAFX00_INTR_MB_RSP_CMPLT:
3058 case QLAFX00_INTR_MB_ASYNC_CMPLT:
3059 case QLAFX00_INTR_ALL_CMPLT:
3060 mb[0] = RD_REG_WORD(&reg->mailbox16);
3061 qlafx00_mbx_completion(vha, mb[0]);
3062 status |= MBX_INTERRUPT;
3063 clr_intr |= QLAFX00_INTR_MB_CMPLT;
3064 break;
3065 case QLAFX00_INTR_ASYNC_CMPLT:
3066 case QLAFX00_INTR_RSP_ASYNC_CMPLT:
3067 ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
3068 qlafx00_async_event(vha);
3069 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
3070 break;
3071 case QLAFX00_INTR_RSP_CMPLT:
3072 qlafx00_process_response_queue(vha, rsp);
3073 clr_intr |= QLAFX00_INTR_RSP_CMPLT;
3074 break;
3075 default:
3076 ql_dbg(ql_dbg_async, vha, 0x507a,
3077 "Unrecognized interrupt type (%d).\n", stat);
3078 break;
3079 }
3080 QLAFX00_CLR_INTR_REG(ha, clr_intr);
3081 QLAFX00_RD_INTR_REG(ha);
3082 }
36439832 3083
3084 qla2x00_handle_mbx_completion(ha, status);
8ae6d9c7
GM		 3085 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3086
8ae6d9c7
GM		 3087 return IRQ_HANDLED;
3088}
3089
3090/** QLAFX00 specific IOCB implementation functions */
3091
3092static inline cont_a64_entry_t *
3093qlafx00_prep_cont_type1_iocb(struct req_que *req,
3094 cont_a64_entry_t *lcont_pkt)
3095{
3096 cont_a64_entry_t *cont_pkt;
3097
3098 /* Adjust ring index. */
3099 req->ring_index++;
3100 if (req->ring_index == req->length) {
3101 req->ring_index = 0;
3102 req->ring_ptr = req->ring;
3103 } else {
3104 req->ring_ptr++;
3105 }
3106
3107 cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
3108
3109 /* Load packet defaults. */
1f8deefe 3110 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
8ae6d9c7
GM		 3111
3112 return cont_pkt;
3113}
3114
3115static inline void
3116qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
3117 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
3118{
3119 uint16_t avail_dsds;
1f8deefe 3120 __le32 *cur_dsd;
8ae6d9c7
GM		 3121 scsi_qla_host_t *vha;
3122 struct scsi_cmnd *cmd;
3123 struct scatterlist *sg;
3124 int i, cont;
3125 struct req_que *req;
3126 cont_a64_entry_t lcont_pkt;
3127 cont_a64_entry_t *cont_pkt;
3128
3129 vha = sp->fcport->vha;
3130 req = vha->req;
3131
3132 cmd = GET_CMD_SP(sp);
3133 cont = 0;
3134 cont_pkt = NULL;
3135
3136 /* Update entry type to indicate Command Type 3 IOCB */
1f8deefe 3137 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
8ae6d9c7
GM		 3138
3139 /* No data transfer */
3140 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
3141 lcmd_pkt->byte_count = __constant_cpu_to_le32(0);
3142 return;
3143 }
3144
3145 /* Set transfer direction */
3146 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
378c538d 3147 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
8ae6d9c7
GM		 3148 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3149 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
378c538d 3150 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
8ae6d9c7
GM		 3151 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3152 }
3153
3154 /* One DSD is available in the Command Type 3 IOCB */
3155 avail_dsds = 1;
1f8deefe 3156 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
8ae6d9c7
GM		 3157
3158 /* Load data segments */
3159 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3160 dma_addr_t sle_dma;
3161
3162 /* Allocate additional continuation packets? */
3163 if (avail_dsds == 0) {
3164 /*
3165 * Five DSDs are available in the Continuation
3166 * Type 1 IOCB.
3167 */
3168 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3169 cont_pkt =
3170 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
1f8deefe 3171 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
8ae6d9c7
GM		 3172 avail_dsds = 5;
3173 cont = 1;
3174 }
3175
3176 sle_dma = sg_dma_address(sg);
3177 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3178 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3179 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3180 avail_dsds--;
3181 if (avail_dsds == 0 && cont == 1) {
3182 cont = 0;
3183 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3184 REQUEST_ENTRY_SIZE);
3185 }
3186
3187 }
3188 if (avail_dsds != 0 && cont == 1) {
3189 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3190 REQUEST_ENTRY_SIZE);
3191 }
3192}
3193
3194/**
3195 * qlafx00_start_scsi() - Send a SCSI command to the ISP
3196 * @sp: command to send to the ISP
3197 *
3198 * Returns non-zero if a failure occurred, else zero.
3199 */
3200int
3201qlafx00_start_scsi(srb_t *sp)
3202{
3203 int ret, nseg;
3204 unsigned long flags;
3205 uint32_t index;
3206 uint32_t handle;
3207 uint16_t cnt;
3208 uint16_t req_cnt;
3209 uint16_t tot_dsds;
3210 struct req_que *req = NULL;
3211 struct rsp_que *rsp = NULL;
3212 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3213 struct scsi_qla_host *vha = sp->fcport->vha;
3214 struct qla_hw_data *ha = vha->hw;
3215 struct cmd_type_7_fx00 *cmd_pkt;
3216 struct cmd_type_7_fx00 lcmd_pkt;
3217 struct scsi_lun llun;
3218 char tag[2];
3219
3220 /* Setup device pointers. */
3221 ret = 0;
3222
3223 rsp = ha->rsp_q_map[0];
3224 req = vha->req;
3225
3226 /* So we know we haven't pci_map'ed anything yet */
3227 tot_dsds = 0;
3228
3229 /* Forcing marker needed for now */
3230 vha->marker_needed = 0;
3231
3232 /* Send marker if required */
3233 if (vha->marker_needed != 0) {
3234 if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
3235 QLA_SUCCESS)
3236 return QLA_FUNCTION_FAILED;
3237 vha->marker_needed = 0;
3238 }
3239
3240 /* Acquire ring specific lock */
3241 spin_lock_irqsave(&ha->hardware_lock, flags);
3242
3243 /* Check for room in outstanding command list. */
3244 handle = req->current_outstanding_cmd;
3245 for (index = 1; index < req->num_outstanding_cmds; index++) {
3246 handle++;
3247 if (handle == req->num_outstanding_cmds)
3248 handle = 1;
3249 if (!req->outstanding_cmds[handle])
3250 break;
3251 }
3252 if (index == req->num_outstanding_cmds)
3253 goto queuing_error;
3254
3255 /* Map the sg table so we have an accurate count of sg entries needed */
3256 if (scsi_sg_count(cmd)) {
3257 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3258 scsi_sg_count(cmd), cmd->sc_data_direction);
3259 if (unlikely(!nseg))
3260 goto queuing_error;
3261 } else
3262 nseg = 0;
3263
3264 tot_dsds = nseg;
3265 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3266 if (req->cnt < (req_cnt + 2)) {
3267 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3268
3269 if (req->ring_index < cnt)
3270 req->cnt = cnt - req->ring_index;
3271 else
3272 req->cnt = req->length -
3273 (req->ring_index - cnt);
3274 if (req->cnt < (req_cnt + 2))
3275 goto queuing_error;
3276 }
3277
3278 /* Build command packet. */
3279 req->current_outstanding_cmd = handle;
3280 req->outstanding_cmds[handle] = sp;
3281 sp->handle = handle;
3282 cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3283 req->cnt -= req_cnt;
3284
3285 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3286
3287 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3288
3289 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3290 lcmd_pkt.handle_hi = 0;
3291 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3292 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3293
3294 int_to_scsilun(cmd->device->lun, &llun);
3295 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3296 sizeof(lcmd_pkt.lun));
3297
3298 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
3299 if (scsi_populate_tag_msg(cmd, tag)) {
3300 switch (tag[0]) {
3301 case HEAD_OF_QUEUE_TAG:
3302 lcmd_pkt.task = TSK_HEAD_OF_QUEUE;
3303 break;
3304 case ORDERED_QUEUE_TAG:
3305 lcmd_pkt.task = TSK_ORDERED;
3306 break;
3307 }
3308 }
3309
3310 /* Load SCSI command packet. */
3311 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3312 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3313
3314 /* Build IOCB segments */
3315 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3316
3317 /* Set total data segment count. */
3318 lcmd_pkt.entry_count = (uint8_t)req_cnt;
3319
3320 /* Specify response queue number where completion should happen */
3321 lcmd_pkt.entry_status = (uint8_t) rsp->id;
3322
3323 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3324 (uint8_t *)cmd->cmnd, cmd->cmd_len);
3325 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3326 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE);
3327
3328 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3329 wmb();
3330
3331 /* Adjust ring index. */
3332 req->ring_index++;
3333 if (req->ring_index == req->length) {
3334 req->ring_index = 0;
3335 req->ring_ptr = req->ring;
3336 } else
3337 req->ring_ptr++;
3338
3339 sp->flags |= SRB_DMA_VALID;
3340
3341 /* Set chip new ring index. */
3342 WRT_REG_DWORD(req->req_q_in, req->ring_index);
3343 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3344
3345 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3346 return QLA_SUCCESS;
3347
3348queuing_error:
3349 if (tot_dsds)
3350 scsi_dma_unmap(cmd);
3351
3352 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3353
3354 return QLA_FUNCTION_FAILED;
3355}
3356
3357void
3358qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3359{
3360 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3361 scsi_qla_host_t *vha = sp->fcport->vha;
3362 struct req_que *req = vha->req;
3363 struct tsk_mgmt_entry_fx00 tm_iocb;
3364 struct scsi_lun llun;
3365
3366 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3367 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3368 tm_iocb.entry_count = 1;
3369 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3370 tm_iocb.handle_hi = 0;
3371 tm_iocb.timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
3372 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3373 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
1f8deefe 3374 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
8ae6d9c7
GM		 3375 int_to_scsilun(fxio->u.tmf.lun, &llun);
3376 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3377 sizeof(struct scsi_lun));
3378 }
3379
1f8deefe 3380 memcpy((void *)ptm_iocb, &tm_iocb,
8ae6d9c7
GM		 3381 sizeof(struct tsk_mgmt_entry_fx00));
3382 wmb();
3383}
3384
3385void
3386qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3387{
3388 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3389 scsi_qla_host_t *vha = sp->fcport->vha;
3390 struct req_que *req = vha->req;
3391 struct abort_iocb_entry_fx00 abt_iocb;
3392
3393 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3394 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3395 abt_iocb.entry_count = 1;
3396 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3397 abt_iocb.abort_handle =
3398 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3399 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3400 abt_iocb.req_que_no = cpu_to_le16(req->id);
3401
1f8deefe 3402 memcpy((void *)pabt_iocb, &abt_iocb,
8ae6d9c7
GM		 3403 sizeof(struct abort_iocb_entry_fx00));
3404 wmb();
3405}
3406
3407void
3408qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3409{
3410 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3411 struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3412 struct fc_bsg_job *bsg_job;
3413 struct fxdisc_entry_fx00 fx_iocb;
3414 uint8_t entry_cnt = 1;
3415
3416 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3417 fx_iocb.entry_type = FX00_IOCB_TYPE;
3418 fx_iocb.handle = cpu_to_le32(sp->handle);
3419 fx_iocb.entry_count = entry_cnt;
3420
3421 if (sp->type == SRB_FXIOCB_DCMD) {
3422 fx_iocb.func_num =
1f8deefe
SK		 3423 sp->u.iocb_cmd.u.fxiocb.req_func_type;
3424 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3425 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3426 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3427 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3428 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
8ae6d9c7
GM		 3429
3430 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3431 fx_iocb.req_dsdcnt = cpu_to_le16(1);
3432 fx_iocb.req_xfrcnt =
3433 cpu_to_le16(fxio->u.fxiocb.req_len);
3434 fx_iocb.dseg_rq_address[0] =
3435 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3436 fx_iocb.dseg_rq_address[1] =
3437 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3438 fx_iocb.dseg_rq_len =
3439 cpu_to_le32(fxio->u.fxiocb.req_len);
3440 }
3441
3442 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3443 fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3444 fx_iocb.rsp_xfrcnt =
3445 cpu_to_le16(fxio->u.fxiocb.rsp_len);
3446 fx_iocb.dseg_rsp_address[0] =
3447 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3448 fx_iocb.dseg_rsp_address[1] =
3449 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3450 fx_iocb.dseg_rsp_len =
3451 cpu_to_le32(fxio->u.fxiocb.rsp_len);
3452 }
3453
3454 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
1f8deefe 3455 fx_iocb.dataword = fxio->u.fxiocb.req_data;
8ae6d9c7
GM		 3456 }
3457 fx_iocb.flags = fxio->u.fxiocb.flags;
3458 } else {
3459 struct scatterlist *sg;
3460 bsg_job = sp->u.bsg_job;
3461 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3462 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
3463
3464 fx_iocb.func_num = piocb_rqst->func_type;
3465 fx_iocb.adapid = piocb_rqst->adapid;
3466 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3467 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3468 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3469 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3470 fx_iocb.dataword = piocb_rqst->dataword;
1f8deefe
SK		 3471 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3472 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
8ae6d9c7
GM		 3473
3474 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3475 int avail_dsds, tot_dsds;
3476 cont_a64_entry_t lcont_pkt;
3477 cont_a64_entry_t *cont_pkt = NULL;
1f8deefe 3478 __le32 *cur_dsd;
8ae6d9c7
GM		 3479 int index = 0, cont = 0;
3480
3481 fx_iocb.req_dsdcnt =
3482 cpu_to_le16(bsg_job->request_payload.sg_cnt);
3483 tot_dsds =
1f8deefe
SK		 3484 bsg_job->request_payload.sg_cnt;
3485 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
8ae6d9c7
GM		 3486 avail_dsds = 1;
3487 for_each_sg(bsg_job->request_payload.sg_list, sg,
3488 tot_dsds, index) {
3489 dma_addr_t sle_dma;
3490
3491 /* Allocate additional continuation packets? */
3492 if (avail_dsds == 0) {
3493 /*
3494 * Five DSDs are available in the Cont.
3495 * Type 1 IOCB.
3496 */
3497 memset(&lcont_pkt, 0,
3498 REQUEST_ENTRY_SIZE);
3499 cont_pkt =
3500 qlafx00_prep_cont_type1_iocb(
3501 sp->fcport->vha->req,
3502 &lcont_pkt);
1f8deefe 3503 cur_dsd = (__le32 *)
8ae6d9c7
GM		 3504 lcont_pkt.dseg_0_address;
3505 avail_dsds = 5;
3506 cont = 1;
3507 entry_cnt++;
3508 }
3509
3510 sle_dma = sg_dma_address(sg);
3511 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3512 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3513 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3514 avail_dsds--;
3515
3516 if (avail_dsds == 0 && cont == 1) {
3517 cont = 0;
3518 memcpy_toio(
3519 (void __iomem *)cont_pkt,
3520 &lcont_pkt, REQUEST_ENTRY_SIZE);
3521 ql_dump_buffer(
3522 ql_dbg_user + ql_dbg_verbose,
3523 sp->fcport->vha, 0x3042,
3524 (uint8_t *)&lcont_pkt,
3525 REQUEST_ENTRY_SIZE);
3526 }
3527 }
3528 if (avail_dsds != 0 && cont == 1) {
3529 memcpy_toio((void __iomem *)cont_pkt,
3530 &lcont_pkt, REQUEST_ENTRY_SIZE);
3531 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3532 sp->fcport->vha, 0x3043,
3533 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3534 }
3535 }
3536
3537 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3538 int avail_dsds, tot_dsds;
3539 cont_a64_entry_t lcont_pkt;
3540 cont_a64_entry_t *cont_pkt = NULL;
1f8deefe 3541 __le32 *cur_dsd;
8ae6d9c7
GM		 3542 int index = 0, cont = 0;
3543
3544 fx_iocb.rsp_dsdcnt =
3545 cpu_to_le16(bsg_job->reply_payload.sg_cnt);
1f8deefe
SK		 3546 tot_dsds = bsg_job->reply_payload.sg_cnt;
3547 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
8ae6d9c7
GM		 3548 avail_dsds = 1;
3549
3550 for_each_sg(bsg_job->reply_payload.sg_list, sg,
3551 tot_dsds, index) {
3552 dma_addr_t sle_dma;
3553
3554 /* Allocate additional continuation packets? */
3555 if (avail_dsds == 0) {
3556 /*
3557 * Five DSDs are available in the Cont.
3558 * Type 1 IOCB.
3559 */
3560 memset(&lcont_pkt, 0,
3561 REQUEST_ENTRY_SIZE);
3562 cont_pkt =
3563 qlafx00_prep_cont_type1_iocb(
3564 sp->fcport->vha->req,
3565 &lcont_pkt);
1f8deefe 3566 cur_dsd = (__le32 *)
8ae6d9c7
GM		 3567 lcont_pkt.dseg_0_address;
3568 avail_dsds = 5;
3569 cont = 1;
3570 entry_cnt++;
3571 }
3572
3573 sle_dma = sg_dma_address(sg);
3574 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3575 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3576 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3577 avail_dsds--;
3578
3579 if (avail_dsds == 0 && cont == 1) {
3580 cont = 0;
3581 memcpy_toio((void __iomem *)cont_pkt,
3582 &lcont_pkt,
3583 REQUEST_ENTRY_SIZE);
3584 ql_dump_buffer(
3585 ql_dbg_user + ql_dbg_verbose,
3586 sp->fcport->vha, 0x3045,
3587 (uint8_t *)&lcont_pkt,
3588 REQUEST_ENTRY_SIZE);
3589 }
3590 }
3591 if (avail_dsds != 0 && cont == 1) {
3592 memcpy_toio((void __iomem *)cont_pkt,
3593 &lcont_pkt, REQUEST_ENTRY_SIZE);
3594 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3595 sp->fcport->vha, 0x3046,
3596 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3597 }
3598 }
3599
3600 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
1f8deefe 3601 fx_iocb.dataword = piocb_rqst->dataword;
8ae6d9c7
GM		 3602 fx_iocb.flags = piocb_rqst->flags;
3603 fx_iocb.entry_count = entry_cnt;
3604 }
3605
3606 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3607 sp->fcport->vha, 0x3047,
3608 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00));
3609
1f8deefe 3610 memcpy((void *)pfxiocb, &fx_iocb,
8ae6d9c7
GM		 3611 sizeof(struct fxdisc_entry_fx00));
3612 wmb();
3613}
Linux 6.x block layer and io_uring tree(s)