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[SCSI] qla2xxx: Add FW DUMP SIZE sysfs attribute.
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_mbx.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
07e264b7 3 * Copyright (c) 2003-2011 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/gfp.h>
1da177e4 12
1da177e4
LT		 13
14/*
15 * qla2x00_mailbox_command
16 * Issue mailbox command and waits for completion.
17 *
18 * Input:
19 * ha = adapter block pointer.
20 * mcp = driver internal mbx struct pointer.
21 *
22 * Output:
23 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
24 *
25 * Returns:
26 * 0 : QLA_SUCCESS = cmd performed success
27 * 1 : QLA_FUNCTION_FAILED (error encountered)
28 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
29 *
30 * Context:
31 * Kernel context.
32 */
33static int
7b867cf7 34qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
1da177e4
LT		 35{
36 int rval;
37 unsigned long flags = 0;
2c3dfe3f 38 device_reg_t __iomem *reg;
1c7c6357 39 uint8_t abort_active;
2c3dfe3f 40 uint8_t io_lock_on;
cdbb0a4f 41 uint16_t command = 0;
1da177e4
LT		 42 uint16_t *iptr;
43 uint16_t __iomem *optr;
44 uint32_t cnt;
45 uint32_t mboxes;
1da177e4 46 unsigned long wait_time;
7b867cf7
AC		 47 struct qla_hw_data *ha = vha->hw;
48 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
2c3dfe3f 49
5e19ed90 50 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
7c3df132
SK		 51
52 if (ha->pdev->error_state > pci_channel_io_frozen) {
5e19ed90 53 ql_log(ql_log_warn, vha, 0x1001,
7c3df132
SK		 54 "error_state is greater than pci_channel_io_frozen, "
55 "exiting.\n");
b9b12f73 56 return QLA_FUNCTION_TIMEOUT;
7c3df132 57 }
b9b12f73 58
a9083016 59 if (vha->device_flags & DFLG_DEV_FAILED) {
5e19ed90 60 ql_log(ql_log_warn, vha, 0x1002,
7c3df132 61 "Device in failed state, exiting.\n");
a9083016
GM		 62 return QLA_FUNCTION_TIMEOUT;
63 }
64
2c3dfe3f 65 reg = ha->iobase;
7b867cf7 66 io_lock_on = base_vha->flags.init_done;
1da177e4
LT		 67
68 rval = QLA_SUCCESS;
7b867cf7 69 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1c7c6357 70
1da177e4 71
85880801 72 if (ha->flags.pci_channel_io_perm_failure) {
5e19ed90 73 ql_log(ql_log_warn, vha, 0x1003,
7c3df132 74 "Perm failure on EEH timeout MBX, exiting.\n");
85880801
AV		 75 return QLA_FUNCTION_TIMEOUT;
76 }
77
862cd01e
GM		 78 if (ha->flags.isp82xx_fw_hung) {
79 /* Setting Link-Down error */
80 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
5e19ed90 81 ql_log(ql_log_warn, vha, 0x1004,
7c3df132 82 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
1806fcd5 83 return QLA_FUNCTION_TIMEOUT;
862cd01e
GM		 84 }
85
1da177e4 86 /*
1c7c6357
AV		 87 * Wait for active mailbox commands to finish by waiting at most tov
88 * seconds. This is to serialize actual issuing of mailbox cmds during
89 * non ISP abort time.
1da177e4 90 */
8eca3f39
AV		 91 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
92 /* Timeout occurred. Return error. */
5e19ed90 93 ql_log(ql_log_warn, vha, 0x1005,
d8c0d546
CD		 94 "Cmd access timeout, cmd=0x%x, Exiting.\n",
95 mcp->mb[0]);
8eca3f39 96 return QLA_FUNCTION_TIMEOUT;
1da177e4
LT		 97 }
98
99 ha->flags.mbox_busy = 1;
100 /* Save mailbox command for debug */
101 ha->mcp = mcp;
102
5e19ed90 103 ql_dbg(ql_dbg_mbx, vha, 0x1006,
7c3df132 104 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
1da177e4
LT		 105
106 spin_lock_irqsave(&ha->hardware_lock, flags);
107
108 /* Load mailbox registers. */
a9083016
GM		 109 if (IS_QLA82XX(ha))
110 optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
111 else if (IS_FWI2_CAPABLE(ha) && !IS_QLA82XX(ha))
1c7c6357
AV		 112 optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
113 else
114 optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
1da177e4
LT		 115
116 iptr = mcp->mb;
117 command = mcp->mb[0];
118 mboxes = mcp->out_mb;
119
120 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
121 if (IS_QLA2200(ha) && cnt == 8)
1c7c6357
AV		 122 optr =
123 (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
1da177e4
LT		 124 if (mboxes & BIT_0)
125 WRT_REG_WORD(optr, *iptr);
126
127 mboxes >>= 1;
128 optr++;
129 iptr++;
130 }
131
5e19ed90 132 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1111,
7c3df132 133 "Loaded MBX registers (displayed in bytes) =.\n");
5e19ed90 134 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1112,
7c3df132 135 (uint8_t *)mcp->mb, 16);
5e19ed90 136 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1113,
7c3df132 137 ".\n");
5e19ed90 138 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1114,
7c3df132 139 ((uint8_t *)mcp->mb + 0x10), 16);
5e19ed90 140 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1115,
7c3df132 141 ".\n");
5e19ed90 142 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1116,
7c3df132 143 ((uint8_t *)mcp->mb + 0x20), 8);
5e19ed90 144 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
7c3df132 145 "I/O Address = %p.\n", optr);
5e19ed90 146 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x100e);
1da177e4
LT		 147
148 /* Issue set host interrupt command to send cmd out. */
149 ha->flags.mbox_int = 0;
150 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
151
152 /* Unlock mbx registers and wait for interrupt */
5e19ed90 153 ql_dbg(ql_dbg_mbx, vha, 0x100f,
7c3df132
SK		 154 "Going to unlock irq & waiting for interrupts. "
155 "jiffies=%lx.\n", jiffies);
1da177e4
LT		 156
157 /* Wait for mbx cmd completion until timeout */
158
124f85e6 159 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
1da177e4
LT		 160 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
161
a9083016
GM		 162 if (IS_QLA82XX(ha)) {
163 if (RD_REG_DWORD(&reg->isp82.hint) &
164 HINT_MBX_INT_PENDING) {
165 spin_unlock_irqrestore(&ha->hardware_lock,
166 flags);
8937f2f1 167 ha->flags.mbox_busy = 0;
5e19ed90 168 ql_dbg(ql_dbg_mbx, vha, 0x1010,
7c3df132 169 "Pending mailbox timeout, exiting.\n");
cdbb0a4f
SV		 170 rval = QLA_FUNCTION_TIMEOUT;
171 goto premature_exit;
a9083016
GM		 172 }
173 WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
174 } else if (IS_FWI2_CAPABLE(ha))
1c7c6357
AV		 175 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
176 else
177 WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
1da177e4
LT		 178 spin_unlock_irqrestore(&ha->hardware_lock, flags);
179
0b05a1f0 180 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
1da177e4 181
1da177e4
LT		 182 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
183
1da177e4 184 } else {
5e19ed90 185 ql_dbg(ql_dbg_mbx, vha, 0x1011,
7c3df132 186 "Cmd=%x Polling Mode.\n", command);
1da177e4 187
a9083016
GM		 188 if (IS_QLA82XX(ha)) {
189 if (RD_REG_DWORD(&reg->isp82.hint) &
190 HINT_MBX_INT_PENDING) {
191 spin_unlock_irqrestore(&ha->hardware_lock,
192 flags);
8937f2f1 193 ha->flags.mbox_busy = 0;
5e19ed90 194 ql_dbg(ql_dbg_mbx, vha, 0x1012,
7c3df132 195 "Pending mailbox timeout, exiting.\n");
cdbb0a4f
SV		 196 rval = QLA_FUNCTION_TIMEOUT;
197 goto premature_exit;
a9083016
GM		 198 }
199 WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
200 } else if (IS_FWI2_CAPABLE(ha))
1c7c6357
AV		 201 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
202 else
203 WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
1da177e4 204 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4
LT		 205
206 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
207 while (!ha->flags.mbox_int) {
208 if (time_after(jiffies, wait_time))
209 break;
210
211 /* Check for pending interrupts. */
73208dfd 212 qla2x00_poll(ha->rsp_q_map[0]);
1da177e4 213
85880801
AV		 214 if (!ha->flags.mbox_int &&
215 !(IS_QLA2200(ha) &&
216 command == MBC_LOAD_RISC_RAM_EXTENDED))
59989831 217 msleep(10);
1da177e4 218 } /* while */
5e19ed90 219 ql_dbg(ql_dbg_mbx, vha, 0x1013,
7c3df132
SK		 220 "Waited %d sec.\n",
221 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
1da177e4
LT		 222 }
223
1da177e4
LT		 224 /* Check whether we timed out */
225 if (ha->flags.mbox_int) {
226 uint16_t *iptr2;
227
5e19ed90 228 ql_dbg(ql_dbg_mbx, vha, 0x1014,
7c3df132 229 "Cmd=%x completed.\n", command);
1da177e4
LT		 230
231 /* Got interrupt. Clear the flag. */
232 ha->flags.mbox_int = 0;
233 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
234
7190575f 235 if (ha->flags.isp82xx_fw_hung) {
cdbb0a4f
SV		 236 ha->flags.mbox_busy = 0;
237 /* Setting Link-Down error */
238 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
239 ha->mcp = NULL;
240 rval = QLA_FUNCTION_FAILED;
5e19ed90 241 ql_log(ql_log_warn, vha, 0x1015,
7c3df132 242 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
cdbb0a4f
SV		 243 goto premature_exit;
244 }
245
354d6b21 246 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
1da177e4 247 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 248
249 /* Load return mailbox registers. */
250 iptr2 = mcp->mb;
251 iptr = (uint16_t *)&ha->mailbox_out[0];
252 mboxes = mcp->in_mb;
253 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
254 if (mboxes & BIT_0)
255 *iptr2 = *iptr;
256
257 mboxes >>= 1;
258 iptr2++;
259 iptr++;
260 }
261 } else {
262
1c7c6357
AV		 263 uint16_t mb0;
264 uint32_t ictrl;
265
e428924c 266 if (IS_FWI2_CAPABLE(ha)) {
1c7c6357
AV		 267 mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
268 ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
269 } else {
cca5335c 270 mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
1c7c6357
AV		 271 ictrl = RD_REG_WORD(&reg->isp.ictrl);
272 }
5e19ed90 273 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
5f28d2d7
SK		 274 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
275 "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
5e19ed90 276 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
1da177e4 277
f55bfc88
CD		 278 /*
279 * Attempt to capture a firmware dump for further analysis
280 * of the current firmware state
281 */
282 ha->isp_ops->fw_dump(vha, 0);
283
1da177e4
LT		 284 rval = QLA_FUNCTION_TIMEOUT;
285 }
286
1da177e4
LT		 287 ha->flags.mbox_busy = 0;
288
289 /* Clean up */
290 ha->mcp = NULL;
291
124f85e6 292 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
5e19ed90 293 ql_dbg(ql_dbg_mbx, vha, 0x101a,
7c3df132 294 "Checking for additional resp interrupt.\n");
1da177e4
LT		 295
296 /* polling mode for non isp_abort commands. */
73208dfd 297 qla2x00_poll(ha->rsp_q_map[0]);
1da177e4
LT		 298 }
299
1c7c6357
AV		 300 if (rval == QLA_FUNCTION_TIMEOUT &&
301 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
85880801
AV		 302 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
303 ha->flags.eeh_busy) {
1da177e4 304 /* not in dpc. schedule it for dpc to take over. */
5e19ed90 305 ql_dbg(ql_dbg_mbx, vha, 0x101b,
7c3df132 306 "Timeout, schedule isp_abort_needed.\n");
cdbb0a4f
SV		 307
308 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
309 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
310 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
63154916
GM		 311 if (IS_QLA82XX(ha)) {
312 ql_dbg(ql_dbg_mbx, vha, 0x112a,
313 "disabling pause transmit on port "
314 "0 & 1.\n");
315 qla82xx_wr_32(ha,
316 QLA82XX_CRB_NIU + 0x98,
317 CRB_NIU_XG_PAUSE_CTL_P0|
318 CRB_NIU_XG_PAUSE_CTL_P1);
319 }
7c3df132 320 ql_log(ql_log_info, base_vha, 0x101c,
24d9ee85 321 "Mailbox cmd timeout occurred, cmd=0x%x, "
d8c0d546
CD		 322 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
323 "abort.\n", command, mcp->mb[0],
324 ha->flags.eeh_busy);
cdbb0a4f
SV		 325 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
326 qla2xxx_wake_dpc(vha);
327 }
1da177e4 328 } else if (!abort_active) {
1da177e4 329 /* call abort directly since we are in the DPC thread */
5e19ed90 330 ql_dbg(ql_dbg_mbx, vha, 0x101d,
7c3df132 331 "Timeout, calling abort_isp.\n");
cdbb0a4f
SV		 332
333 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
334 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
335 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
63154916
GM		 336 if (IS_QLA82XX(ha)) {
337 ql_dbg(ql_dbg_mbx, vha, 0x112b,
338 "disabling pause transmit on port "
339 "0 & 1.\n");
340 qla82xx_wr_32(ha,
341 QLA82XX_CRB_NIU + 0x98,
342 CRB_NIU_XG_PAUSE_CTL_P0|
343 CRB_NIU_XG_PAUSE_CTL_P1);
344 }
7c3df132 345 ql_log(ql_log_info, base_vha, 0x101e,
24d9ee85 346 "Mailbox cmd timeout occurred, cmd=0x%x, "
d8c0d546
CD		 347 "mb[0]=0x%x. Scheduling ISP abort ",
348 command, mcp->mb[0]);
cdbb0a4f
SV		 349 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
350 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
d3360960
GM		 351 /* Allow next mbx cmd to come in. */
352 complete(&ha->mbx_cmd_comp);
cdbb0a4f
SV		 353 if (ha->isp_ops->abort_isp(vha)) {
354 /* Failed. retry later. */
355 set_bit(ISP_ABORT_NEEDED,
356 &vha->dpc_flags);
357 }
358 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
5e19ed90 359 ql_dbg(ql_dbg_mbx, vha, 0x101f,
7c3df132 360 "Finished abort_isp.\n");
d3360960 361 goto mbx_done;
1da177e4 362 }
1da177e4
LT		 363 }
364 }
365
cdbb0a4f 366premature_exit:
1da177e4 367 /* Allow next mbx cmd to come in. */
8eca3f39 368 complete(&ha->mbx_cmd_comp);
1da177e4 369
d3360960 370mbx_done:
1da177e4 371 if (rval) {
09543c09 372 ql_log(ql_log_warn, base_vha, 0x1020,
6246b8a1
GM		 373 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
374 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
1da177e4 375 } else {
7c3df132 376 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
1da177e4
LT		 377 }
378
1da177e4
LT		 379 return rval;
380}
381
1da177e4 382int
7b867cf7 383qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
590f98e5 384 uint32_t risc_code_size)
1da177e4
LT		 385{
386 int rval;
7b867cf7 387 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 388 mbx_cmd_t mc;
389 mbx_cmd_t *mcp = &mc;
1da177e4 390
5f28d2d7
SK		 391 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
392 "Entered %s.\n", __func__);
1da177e4 393
e428924c 394 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
590f98e5 395 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
396 mcp->mb[8] = MSW(risc_addr);
397 mcp->out_mb = MBX_8|MBX_0;
1da177e4 398 } else {
590f98e5 399 mcp->mb[0] = MBC_LOAD_RISC_RAM;
400 mcp->out_mb = MBX_0;
1da177e4 401 }
1da177e4
LT		 402 mcp->mb[1] = LSW(risc_addr);
403 mcp->mb[2] = MSW(req_dma);
404 mcp->mb[3] = LSW(req_dma);
1da177e4
LT		 405 mcp->mb[6] = MSW(MSD(req_dma));
406 mcp->mb[7] = LSW(MSD(req_dma));
590f98e5 407 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
e428924c 408 if (IS_FWI2_CAPABLE(ha)) {
1c7c6357
AV		 409 mcp->mb[4] = MSW(risc_code_size);
410 mcp->mb[5] = LSW(risc_code_size);
411 mcp->out_mb |= MBX_5|MBX_4;
412 } else {
413 mcp->mb[4] = LSW(risc_code_size);
414 mcp->out_mb |= MBX_4;
415 }
416
1da177e4 417 mcp->in_mb = MBX_0;
b93480e3 418 mcp->tov = MBX_TOV_SECONDS;
1da177e4 419 mcp->flags = 0;
7b867cf7 420 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4 421
1da177e4 422 if (rval != QLA_SUCCESS) {
7c3df132
SK		 423 ql_dbg(ql_dbg_mbx, vha, 0x1023,
424 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1da177e4 425 } else {
5f28d2d7
SK		 426 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
427 "Done %s.\n", __func__);
1da177e4
LT		 428 }
429
430 return rval;
431}
432
cad454b1 433#define EXTENDED_BB_CREDITS BIT_0
1da177e4
LT		 434/*
435 * qla2x00_execute_fw
1c7c6357 436 * Start adapter firmware.
1da177e4
LT		 437 *
438 * Input:
1c7c6357
AV		 439 * ha = adapter block pointer.
440 * TARGET_QUEUE_LOCK must be released.
441 * ADAPTER_STATE_LOCK must be released.
1da177e4
LT		 442 *
443 * Returns:
1c7c6357 444 * qla2x00 local function return status code.
1da177e4
LT		 445 *
446 * Context:
1c7c6357 447 * Kernel context.
1da177e4
LT		 448 */
449int
7b867cf7 450qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
1da177e4
LT		 451{
452 int rval;
7b867cf7 453 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 454 mbx_cmd_t mc;
455 mbx_cmd_t *mcp = &mc;
456
5f28d2d7
SK		 457 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
458 "Entered %s.\n", __func__);
1da177e4
LT		 459
460 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
1c7c6357
AV		 461 mcp->out_mb = MBX_0;
462 mcp->in_mb = MBX_0;
e428924c 463 if (IS_FWI2_CAPABLE(ha)) {
1c7c6357
AV		 464 mcp->mb[1] = MSW(risc_addr);
465 mcp->mb[2] = LSW(risc_addr);
466 mcp->mb[3] = 0;
6246b8a1 467 if (IS_QLA81XX(ha) || IS_QLA83XX(ha)) {
cad454b1
SV		 468 struct nvram_81xx *nv = ha->nvram;
469 mcp->mb[4] = (nv->enhanced_features &
470 EXTENDED_BB_CREDITS);
471 } else
472 mcp->mb[4] = 0;
8b3253d1 473 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
1c7c6357
AV		 474 mcp->in_mb |= MBX_1;
475 } else {
476 mcp->mb[1] = LSW(risc_addr);
477 mcp->out_mb |= MBX_1;
478 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
479 mcp->mb[2] = 0;
480 mcp->out_mb |= MBX_2;
481 }
1da177e4
LT		 482 }
483
b93480e3 484 mcp->tov = MBX_TOV_SECONDS;
1da177e4 485 mcp->flags = 0;
7b867cf7 486 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4 487
1c7c6357 488 if (rval != QLA_SUCCESS) {
7c3df132
SK		 489 ql_dbg(ql_dbg_mbx, vha, 0x1026,
490 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1c7c6357 491 } else {
e428924c 492 if (IS_FWI2_CAPABLE(ha)) {
5f28d2d7 493 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
7c3df132 494 "Done exchanges=%x.\n", mcp->mb[1]);
1c7c6357 495 } else {
5f28d2d7
SK		 496 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
497 "Done %s.\n", __func__);
1c7c6357
AV		 498 }
499 }
1da177e4
LT		 500
501 return rval;
502}
503
504/*
505 * qla2x00_get_fw_version
506 * Get firmware version.
507 *
508 * Input:
509 * ha: adapter state pointer.
510 * major: pointer for major number.
511 * minor: pointer for minor number.
512 * subminor: pointer for subminor number.
513 *
514 * Returns:
515 * qla2x00 local function return status code.
516 *
517 * Context:
518 * Kernel context.
519 */
ca9e9c3e 520int
6246b8a1 521qla2x00_get_fw_version(scsi_qla_host_t *vha)
1da177e4
LT		 522{
523 int rval;
524 mbx_cmd_t mc;
525 mbx_cmd_t *mcp = &mc;
6246b8a1 526 struct qla_hw_data *ha = vha->hw;
1da177e4 527
5f28d2d7
SK		 528 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
529 "Entered %s.\n", __func__);
1da177e4
LT		 530
531 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
532 mcp->out_mb = MBX_0;
533 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
6246b8a1 534 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha))
55a96158 535 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
6246b8a1
GM		 536 if (IS_QLA83XX(vha->hw))
537 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
1da177e4 538 mcp->flags = 0;
b93480e3 539 mcp->tov = MBX_TOV_SECONDS;
7b867cf7 540 rval = qla2x00_mailbox_command(vha, mcp);
ca9e9c3e
AV		 541 if (rval != QLA_SUCCESS)
542 goto failed;
1da177e4
LT		 543
544 /* Return mailbox data. */
6246b8a1
GM		 545 ha->fw_major_version = mcp->mb[1];
546 ha->fw_minor_version = mcp->mb[2];
547 ha->fw_subminor_version = mcp->mb[3];
548 ha->fw_attributes = mcp->mb[6];
7b867cf7 549 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
6246b8a1 550 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
1da177e4 551 else
6246b8a1
GM		 552 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
553 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw)) {
554 ha->mpi_version[0] = mcp->mb[10] & 0xff;
555 ha->mpi_version[1] = mcp->mb[11] >> 8;
556 ha->mpi_version[2] = mcp->mb[11] & 0xff;
557 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
558 ha->phy_version[0] = mcp->mb[8] & 0xff;
559 ha->phy_version[1] = mcp->mb[9] >> 8;
560 ha->phy_version[2] = mcp->mb[9] & 0xff;
561 }
562 if (IS_QLA83XX(ha)) {
563 if (mcp->mb[6] & BIT_15) {
564 ha->fw_attributes_h = mcp->mb[15];
565 ha->fw_attributes_ext[0] = mcp->mb[16];
566 ha->fw_attributes_ext[1] = mcp->mb[17];
5f28d2d7 567 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
6246b8a1
GM		 568 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
569 __func__, mcp->mb[15], mcp->mb[6]);
570 } else
5f28d2d7 571 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
6246b8a1
GM		 572 "%s: FwAttributes [Upper] invalid, MB6:%04x\n",
573 __func__, mcp->mb[6]);
3a03eb79 574 }
6246b8a1 575
ca9e9c3e 576failed:
1da177e4
LT		 577 if (rval != QLA_SUCCESS) {
578 /*EMPTY*/
7c3df132 579 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
1da177e4
LT		 580 } else {
581 /*EMPTY*/
5f28d2d7
SK		 582 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
583 "Done %s.\n", __func__);
1da177e4 584 }
ca9e9c3e 585 return rval;
1da177e4
LT		 586}
587
588/*
589 * qla2x00_get_fw_options
590 * Set firmware options.
591 *
592 * Input:
593 * ha = adapter block pointer.
594 * fwopt = pointer for firmware options.
595 *
596 * Returns:
597 * qla2x00 local function return status code.
598 *
599 * Context:
600 * Kernel context.
601 */
602int
7b867cf7 603qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1da177e4
LT		 604{
605 int rval;
606 mbx_cmd_t mc;
607 mbx_cmd_t *mcp = &mc;
608
5f28d2d7
SK		 609 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
610 "Entered %s.\n", __func__);
1da177e4
LT		 611
612 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
613 mcp->out_mb = MBX_0;
614 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
b93480e3 615 mcp->tov = MBX_TOV_SECONDS;
1da177e4 616 mcp->flags = 0;
7b867cf7 617 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 618
619 if (rval != QLA_SUCCESS) {
620 /*EMPTY*/
7c3df132 621 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
1da177e4 622 } else {
1c7c6357 623 fwopts[0] = mcp->mb[0];
1da177e4
LT		 624 fwopts[1] = mcp->mb[1];
625 fwopts[2] = mcp->mb[2];
626 fwopts[3] = mcp->mb[3];
627
5f28d2d7
SK		 628 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
629 "Done %s.\n", __func__);
1da177e4
LT		 630 }
631
632 return rval;
633}
634
635
636/*
637 * qla2x00_set_fw_options
638 * Set firmware options.
639 *
640 * Input:
641 * ha = adapter block pointer.
642 * fwopt = pointer for firmware options.
643 *
644 * Returns:
645 * qla2x00 local function return status code.
646 *
647 * Context:
648 * Kernel context.
649 */
650int
7b867cf7 651qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1da177e4
LT		 652{
653 int rval;
654 mbx_cmd_t mc;
655 mbx_cmd_t *mcp = &mc;
656
5f28d2d7
SK		 657 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
658 "Entered %s.\n", __func__);
1da177e4
LT		 659
660 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
661 mcp->mb[1] = fwopts[1];
662 mcp->mb[2] = fwopts[2];
663 mcp->mb[3] = fwopts[3];
1c7c6357 664 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1da177e4 665 mcp->in_mb = MBX_0;
7b867cf7 666 if (IS_FWI2_CAPABLE(vha->hw)) {
1c7c6357
AV		 667 mcp->in_mb |= MBX_1;
668 } else {
669 mcp->mb[10] = fwopts[10];
670 mcp->mb[11] = fwopts[11];
671 mcp->mb[12] = 0; /* Undocumented, but used */
672 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
673 }
b93480e3 674 mcp->tov = MBX_TOV_SECONDS;
1da177e4 675 mcp->flags = 0;
7b867cf7 676 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4 677
1c7c6357
AV		 678 fwopts[0] = mcp->mb[0];
679
1da177e4
LT		 680 if (rval != QLA_SUCCESS) {
681 /*EMPTY*/
7c3df132
SK		 682 ql_dbg(ql_dbg_mbx, vha, 0x1030,
683 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
1da177e4
LT		 684 } else {
685 /*EMPTY*/
5f28d2d7
SK		 686 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
687 "Done %s.\n", __func__);
1da177e4
LT		 688 }
689
690 return rval;
691}
692
693/*
694 * qla2x00_mbx_reg_test
695 * Mailbox register wrap test.
696 *
697 * Input:
698 * ha = adapter block pointer.
699 * TARGET_QUEUE_LOCK must be released.
700 * ADAPTER_STATE_LOCK must be released.
701 *
702 * Returns:
703 * qla2x00 local function return status code.
704 *
705 * Context:
706 * Kernel context.
707 */
708int
7b867cf7 709qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
1da177e4
LT		 710{
711 int rval;
712 mbx_cmd_t mc;
713 mbx_cmd_t *mcp = &mc;
714
5f28d2d7
SK		 715 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
716 "Entered %s.\n", __func__);
1da177e4
LT		 717
718 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
719 mcp->mb[1] = 0xAAAA;
720 mcp->mb[2] = 0x5555;
721 mcp->mb[3] = 0xAA55;
722 mcp->mb[4] = 0x55AA;
723 mcp->mb[5] = 0xA5A5;
724 mcp->mb[6] = 0x5A5A;
725 mcp->mb[7] = 0x2525;
726 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
727 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
b93480e3 728 mcp->tov = MBX_TOV_SECONDS;
1da177e4 729 mcp->flags = 0;
7b867cf7 730 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 731
732 if (rval == QLA_SUCCESS) {
733 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
734 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
735 rval = QLA_FUNCTION_FAILED;
736 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
737 mcp->mb[7] != 0x2525)
738 rval = QLA_FUNCTION_FAILED;
739 }
740
741 if (rval != QLA_SUCCESS) {
742 /*EMPTY*/
7c3df132 743 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1da177e4
LT		 744 } else {
745 /*EMPTY*/
5f28d2d7
SK		 746 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
747 "Done %s.\n", __func__);
1da177e4
LT		 748 }
749
750 return rval;
751}
752
753/*
754 * qla2x00_verify_checksum
755 * Verify firmware checksum.
756 *
757 * Input:
758 * ha = adapter block pointer.
759 * TARGET_QUEUE_LOCK must be released.
760 * ADAPTER_STATE_LOCK must be released.
761 *
762 * Returns:
763 * qla2x00 local function return status code.
764 *
765 * Context:
766 * Kernel context.
767 */
768int
7b867cf7 769qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
1da177e4
LT		 770{
771 int rval;
772 mbx_cmd_t mc;
773 mbx_cmd_t *mcp = &mc;
774
5f28d2d7
SK		 775 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
776 "Entered %s.\n", __func__);
1da177e4
LT		 777
778 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1c7c6357
AV		 779 mcp->out_mb = MBX_0;
780 mcp->in_mb = MBX_0;
7b867cf7 781 if (IS_FWI2_CAPABLE(vha->hw)) {
1c7c6357
AV		 782 mcp->mb[1] = MSW(risc_addr);
783 mcp->mb[2] = LSW(risc_addr);
784 mcp->out_mb |= MBX_2|MBX_1;
785 mcp->in_mb |= MBX_2|MBX_1;
786 } else {
787 mcp->mb[1] = LSW(risc_addr);
788 mcp->out_mb |= MBX_1;
789 mcp->in_mb |= MBX_1;
790 }
791
b93480e3 792 mcp->tov = MBX_TOV_SECONDS;
1da177e4 793 mcp->flags = 0;
7b867cf7 794 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 795
796 if (rval != QLA_SUCCESS) {
7c3df132
SK		 797 ql_dbg(ql_dbg_mbx, vha, 0x1036,
798 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
799 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
1da177e4 800 } else {
5f28d2d7
SK		 801 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
802 "Done %s.\n", __func__);
1da177e4
LT		 803 }
804
805 return rval;
806}
807
808/*
809 * qla2x00_issue_iocb
810 * Issue IOCB using mailbox command
811 *
812 * Input:
813 * ha = adapter state pointer.
814 * buffer = buffer pointer.
815 * phys_addr = physical address of buffer.
816 * size = size of buffer.
817 * TARGET_QUEUE_LOCK must be released.
818 * ADAPTER_STATE_LOCK must be released.
819 *
820 * Returns:
821 * qla2x00 local function return status code.
822 *
823 * Context:
824 * Kernel context.
825 */
6e98016c 826int
7b867cf7 827qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
4d4df193 828 dma_addr_t phys_addr, size_t size, uint32_t tov)
1da177e4
LT		 829{
830 int rval;
831 mbx_cmd_t mc;
832 mbx_cmd_t *mcp = &mc;
833
5f28d2d7
SK		 834 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
835 "Entered %s.\n", __func__);
7c3df132 836
1da177e4
LT		 837 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
838 mcp->mb[1] = 0;
839 mcp->mb[2] = MSW(phys_addr);
840 mcp->mb[3] = LSW(phys_addr);
841 mcp->mb[6] = MSW(MSD(phys_addr));
842 mcp->mb[7] = LSW(MSD(phys_addr));
843 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
844 mcp->in_mb = MBX_2|MBX_0;
4d4df193 845 mcp->tov = tov;
1da177e4 846 mcp->flags = 0;
7b867cf7 847 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 848
849 if (rval != QLA_SUCCESS) {
850 /*EMPTY*/
7c3df132 851 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
1da177e4 852 } else {
8c958a99
AV		 853 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
854
855 /* Mask reserved bits. */
856 sts_entry->entry_status &=
7b867cf7 857 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
5f28d2d7
SK		 858 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
859 "Done %s.\n", __func__);
1da177e4
LT		 860 }
861
862 return rval;
863}
864
4d4df193 865int
7b867cf7 866qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
4d4df193
HK		 867 size_t size)
868{
7b867cf7 869 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
4d4df193
HK		 870 MBX_TOV_SECONDS);
871}
872
1da177e4
LT		 873/*
874 * qla2x00_abort_command
875 * Abort command aborts a specified IOCB.
876 *
877 * Input:
878 * ha = adapter block pointer.
879 * sp = SB structure pointer.
880 *
881 * Returns:
882 * qla2x00 local function return status code.
883 *
884 * Context:
885 * Kernel context.
886 */
887int
2afa19a9 888qla2x00_abort_command(srb_t *sp)
1da177e4
LT		 889{
890 unsigned long flags = 0;
1da177e4 891 int rval;
73208dfd 892 uint32_t handle = 0;
1da177e4
LT		 893 mbx_cmd_t mc;
894 mbx_cmd_t *mcp = &mc;
2afa19a9
AC		 895 fc_port_t *fcport = sp->fcport;
896 scsi_qla_host_t *vha = fcport->vha;
7b867cf7 897 struct qla_hw_data *ha = vha->hw;
2afa19a9 898 struct req_que *req = vha->req;
9ba56b95 899 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1da177e4 900
5f28d2d7
SK		 901 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
902 "Entered %s.\n", __func__);
1da177e4 903
c9c5ced9 904 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 905 for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
7b867cf7 906 if (req->outstanding_cmds[handle] == sp)
1da177e4
LT		 907 break;
908 }
c9c5ced9 909 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4
LT		 910
911 if (handle == MAX_OUTSTANDING_COMMANDS) {
912 /* command not found */
913 return QLA_FUNCTION_FAILED;
914 }
915
916 mcp->mb[0] = MBC_ABORT_COMMAND;
917 if (HAS_EXTENDED_IDS(ha))
918 mcp->mb[1] = fcport->loop_id;
919 else
920 mcp->mb[1] = fcport->loop_id << 8;
921 mcp->mb[2] = (uint16_t)handle;
922 mcp->mb[3] = (uint16_t)(handle >> 16);
9ba56b95 923 mcp->mb[6] = (uint16_t)cmd->device->lun;
1da177e4
LT		 924 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
925 mcp->in_mb = MBX_0;
b93480e3 926 mcp->tov = MBX_TOV_SECONDS;
1da177e4 927 mcp->flags = 0;
7b867cf7 928 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 929
930 if (rval != QLA_SUCCESS) {
7c3df132 931 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
1da177e4 932 } else {
5f28d2d7
SK		 933 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
934 "Done %s.\n", __func__);
1da177e4
LT		 935 }
936
937 return rval;
938}
939
1da177e4 940int
2afa19a9 941qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
1da177e4 942{
523ec773 943 int rval, rval2;
1da177e4
LT		 944 mbx_cmd_t mc;
945 mbx_cmd_t *mcp = &mc;
7b867cf7 946 scsi_qla_host_t *vha;
73208dfd
AC		 947 struct req_que *req;
948 struct rsp_que *rsp;
1da177e4 949
523ec773 950 l = l;
7b867cf7 951 vha = fcport->vha;
7c3df132 952
5f28d2d7
SK		 953 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
954 "Entered %s.\n", __func__);
7c3df132 955
7e2b895b
GM		 956 req = vha->hw->req_q_map[0];
957 rsp = req->rsp;
1da177e4 958 mcp->mb[0] = MBC_ABORT_TARGET;
523ec773 959 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
7b867cf7 960 if (HAS_EXTENDED_IDS(vha->hw)) {
1da177e4
LT		 961 mcp->mb[1] = fcport->loop_id;
962 mcp->mb[10] = 0;
963 mcp->out_mb |= MBX_10;
964 } else {
965 mcp->mb[1] = fcport->loop_id << 8;
966 }
7b867cf7
AC		 967 mcp->mb[2] = vha->hw->loop_reset_delay;
968 mcp->mb[9] = vha->vp_idx;
1da177e4
LT		 969
970 mcp->in_mb = MBX_0;
b93480e3 971 mcp->tov = MBX_TOV_SECONDS;
1da177e4 972 mcp->flags = 0;
7b867cf7 973 rval = qla2x00_mailbox_command(vha, mcp);
523ec773 974 if (rval != QLA_SUCCESS) {
5f28d2d7
SK		 975 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
976 "Failed=%x.\n", rval);
523ec773
AV		 977 }
978
979 /* Issue marker IOCB. */
73208dfd
AC		 980 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
981 MK_SYNC_ID);
523ec773 982 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 983 ql_dbg(ql_dbg_mbx, vha, 0x1040,
984 "Failed to issue marker IOCB (%x).\n", rval2);
523ec773 985 } else {
5f28d2d7
SK		 986 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
987 "Done %s.\n", __func__);
523ec773
AV		 988 }
989
990 return rval;
991}
992
993int
2afa19a9 994qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
523ec773
AV		 995{
996 int rval, rval2;
997 mbx_cmd_t mc;
998 mbx_cmd_t *mcp = &mc;
7b867cf7 999 scsi_qla_host_t *vha;
73208dfd
AC		 1000 struct req_que *req;
1001 struct rsp_que *rsp;
523ec773 1002
7b867cf7 1003 vha = fcport->vha;
7c3df132 1004
5f28d2d7
SK		 1005 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1006 "Entered %s.\n", __func__);
7c3df132 1007
7e2b895b
GM		 1008 req = vha->hw->req_q_map[0];
1009 rsp = req->rsp;
523ec773
AV		 1010 mcp->mb[0] = MBC_LUN_RESET;
1011 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
7b867cf7 1012 if (HAS_EXTENDED_IDS(vha->hw))
523ec773
AV		 1013 mcp->mb[1] = fcport->loop_id;
1014 else
1015 mcp->mb[1] = fcport->loop_id << 8;
1016 mcp->mb[2] = l;
1017 mcp->mb[3] = 0;
7b867cf7 1018 mcp->mb[9] = vha->vp_idx;
1da177e4 1019
523ec773 1020 mcp->in_mb = MBX_0;
b93480e3 1021 mcp->tov = MBX_TOV_SECONDS;
523ec773 1022 mcp->flags = 0;
7b867cf7 1023 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4 1024 if (rval != QLA_SUCCESS) {
7c3df132 1025 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
523ec773
AV		 1026 }
1027
1028 /* Issue marker IOCB. */
73208dfd
AC		 1029 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1030 MK_SYNC_ID_LUN);
523ec773 1031 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 1032 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1033 "Failed to issue marker IOCB (%x).\n", rval2);
1da177e4 1034 } else {
5f28d2d7
SK		 1035 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1036 "Done %s.\n", __func__);
1da177e4
LT		 1037 }
1038
1039 return rval;
1040}
1da177e4 1041
1da177e4
LT		 1042/*
1043 * qla2x00_get_adapter_id
1044 * Get adapter ID and topology.
1045 *
1046 * Input:
1047 * ha = adapter block pointer.
1048 * id = pointer for loop ID.
1049 * al_pa = pointer for AL_PA.
1050 * area = pointer for area.
1051 * domain = pointer for domain.
1052 * top = pointer for topology.
1053 * TARGET_QUEUE_LOCK must be released.
1054 * ADAPTER_STATE_LOCK must be released.
1055 *
1056 * Returns:
1057 * qla2x00 local function return status code.
1058 *
1059 * Context:
1060 * Kernel context.
1061 */
1062int
7b867cf7 1063qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
2c3dfe3f 1064 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1da177e4
LT		 1065{
1066 int rval;
1067 mbx_cmd_t mc;
1068 mbx_cmd_t *mcp = &mc;
1069
5f28d2d7
SK		 1070 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1071 "Entered %s.\n", __func__);
1da177e4
LT		 1072
1073 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
7b867cf7 1074 mcp->mb[9] = vha->vp_idx;
eb66dc60 1075 mcp->out_mb = MBX_9|MBX_0;
2c3dfe3f 1076 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
6246b8a1 1077 if (IS_CNA_CAPABLE(vha->hw))
bad7001c 1078 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
b93480e3 1079 mcp->tov = MBX_TOV_SECONDS;
1da177e4 1080 mcp->flags = 0;
7b867cf7 1081 rval = qla2x00_mailbox_command(vha, mcp);
33135aa2
RA		 1082 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1083 rval = QLA_COMMAND_ERROR;
42e421b1
AV		 1084 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1085 rval = QLA_INVALID_COMMAND;
1da177e4
LT		 1086
1087 /* Return data. */
1088 *id = mcp->mb[1];
1089 *al_pa = LSB(mcp->mb[2]);
1090 *area = MSB(mcp->mb[2]);
1091 *domain = LSB(mcp->mb[3]);
1092 *top = mcp->mb[6];
2c3dfe3f 1093 *sw_cap = mcp->mb[7];
1da177e4
LT		 1094
1095 if (rval != QLA_SUCCESS) {
1096 /*EMPTY*/
7c3df132 1097 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1da177e4 1098 } else {
5f28d2d7
SK		 1099 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1100 "Done %s.\n", __func__);
bad7001c 1101
6246b8a1 1102 if (IS_CNA_CAPABLE(vha->hw)) {
bad7001c
AV		 1103 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1104 vha->fcoe_fcf_idx = mcp->mb[10];
1105 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1106 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1107 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1108 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1109 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1110 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1111 }
1da177e4
LT		 1112 }
1113
1114 return rval;
1115}
1116
1117/*
1118 * qla2x00_get_retry_cnt
1119 * Get current firmware login retry count and delay.
1120 *
1121 * Input:
1122 * ha = adapter block pointer.
1123 * retry_cnt = pointer to login retry count.
1124 * tov = pointer to login timeout value.
1125 *
1126 * Returns:
1127 * qla2x00 local function return status code.
1128 *
1129 * Context:
1130 * Kernel context.
1131 */
1132int
7b867cf7 1133qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1da177e4
LT		 1134 uint16_t *r_a_tov)
1135{
1136 int rval;
1137 uint16_t ratov;
1138 mbx_cmd_t mc;
1139 mbx_cmd_t *mcp = &mc;
1140
5f28d2d7
SK		 1141 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1142 "Entered %s.\n", __func__);
1da177e4
LT		 1143
1144 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1145 mcp->out_mb = MBX_0;
1146 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
b93480e3 1147 mcp->tov = MBX_TOV_SECONDS;
1da177e4 1148 mcp->flags = 0;
7b867cf7 1149 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 1150
1151 if (rval != QLA_SUCCESS) {
1152 /*EMPTY*/
7c3df132
SK		 1153 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1154 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1da177e4
LT		 1155 } else {
1156 /* Convert returned data and check our values. */
1157 *r_a_tov = mcp->mb[3] / 2;
1158 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1159 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1160 /* Update to the larger values */
1161 *retry_cnt = (uint8_t)mcp->mb[1];
1162 *tov = ratov;
1163 }
1164
5f28d2d7 1165 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
7c3df132 1166 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1da177e4
LT		 1167 }
1168
1169 return rval;
1170}
1171
1172/*
1173 * qla2x00_init_firmware
1174 * Initialize adapter firmware.
1175 *
1176 * Input:
1177 * ha = adapter block pointer.
1178 * dptr = Initialization control block pointer.
1179 * size = size of initialization control block.
1180 * TARGET_QUEUE_LOCK must be released.
1181 * ADAPTER_STATE_LOCK must be released.
1182 *
1183 * Returns:
1184 * qla2x00 local function return status code.
1185 *
1186 * Context:
1187 * Kernel context.
1188 */
1189int
7b867cf7 1190qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1da177e4
LT		 1191{
1192 int rval;
1193 mbx_cmd_t mc;
1194 mbx_cmd_t *mcp = &mc;
7b867cf7 1195 struct qla_hw_data *ha = vha->hw;
1da177e4 1196
5f28d2d7
SK		 1197 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1198 "Entered %s.\n", __func__);
1da177e4 1199
a9083016
GM		 1200 if (IS_QLA82XX(ha) && ql2xdbwr)
1201 qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
1202 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1203
e6e074f1 1204 if (ha->flags.npiv_supported)
2c3dfe3f
SJ		 1205 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1206 else
1207 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1208
b64b0e8f 1209 mcp->mb[1] = 0;
1da177e4
LT		 1210 mcp->mb[2] = MSW(ha->init_cb_dma);
1211 mcp->mb[3] = LSW(ha->init_cb_dma);
1da177e4
LT		 1212 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1213 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
b64b0e8f 1214 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
6246b8a1 1215 if ((IS_QLA81XX(ha) || IS_QLA83XX(ha)) && ha->ex_init_cb->ex_version) {
b64b0e8f
AV		 1216 mcp->mb[1] = BIT_0;
1217 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1218 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1219 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1220 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1221 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1222 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1223 }
6246b8a1
GM		 1224 /* 1 and 2 should normally be captured. */
1225 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1226 if (IS_QLA83XX(ha))
1227 /* mb3 is additional info about the installed SFP. */
1228 mcp->in_mb |= MBX_3;
1da177e4
LT		 1229 mcp->buf_size = size;
1230 mcp->flags = MBX_DMA_OUT;
b93480e3 1231 mcp->tov = MBX_TOV_SECONDS;
7b867cf7 1232 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 1233
1234 if (rval != QLA_SUCCESS) {
1235 /*EMPTY*/
7c3df132 1236 ql_dbg(ql_dbg_mbx, vha, 0x104d,
6246b8a1
GM		 1237 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1238 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1da177e4
LT		 1239 } else {
1240 /*EMPTY*/
5f28d2d7
SK		 1241 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1242 "Done %s.\n", __func__);
1da177e4
LT		 1243 }
1244
1245 return rval;
1246}
1247
2d70c103
NB		 1248/*
1249 * qla2x00_get_node_name_list
1250 * Issue get node name list mailbox command, kmalloc()
1251 * and return the resulting list. Caller must kfree() it!
1252 *
1253 * Input:
1254 * ha = adapter state pointer.
1255 * out_data = resulting list
1256 * out_len = length of the resulting list
1257 *
1258 * Returns:
1259 * qla2x00 local function return status code.
1260 *
1261 * Context:
1262 * Kernel context.
1263 */
1264int
1265qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1266{
1267 struct qla_hw_data *ha = vha->hw;
1268 struct qla_port_24xx_data *list = NULL;
1269 void *pmap;
1270 mbx_cmd_t mc;
1271 dma_addr_t pmap_dma;
1272 ulong dma_size;
1273 int rval, left;
1274
1275 left = 1;
1276 while (left > 0) {
1277 dma_size = left * sizeof(*list);
1278 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1279 &pmap_dma, GFP_KERNEL);
1280 if (!pmap) {
1281 ql_log(ql_log_warn, vha, 0x113f,
1282 "%s(%ld): DMA Alloc failed of %ld\n",
1283 __func__, vha->host_no, dma_size);
1284 rval = QLA_MEMORY_ALLOC_FAILED;
1285 goto out;
1286 }
1287
1288 mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1289 mc.mb[1] = BIT_1 | BIT_3;
1290 mc.mb[2] = MSW(pmap_dma);
1291 mc.mb[3] = LSW(pmap_dma);
1292 mc.mb[6] = MSW(MSD(pmap_dma));
1293 mc.mb[7] = LSW(MSD(pmap_dma));
1294 mc.mb[8] = dma_size;
1295 mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1296 mc.in_mb = MBX_0|MBX_1;
1297 mc.tov = 30;
1298 mc.flags = MBX_DMA_IN;
1299
1300 rval = qla2x00_mailbox_command(vha, &mc);
1301 if (rval != QLA_SUCCESS) {
1302 if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1303 (mc.mb[1] == 0xA)) {
1304 left += le16_to_cpu(mc.mb[2]) /
1305 sizeof(struct qla_port_24xx_data);
1306 goto restart;
1307 }
1308 goto out_free;
1309 }
1310
1311 left = 0;
1312
1313 list = kzalloc(dma_size, GFP_KERNEL);
1314 if (!list) {
1315 ql_log(ql_log_warn, vha, 0x1140,
1316 "%s(%ld): failed to allocate node names list "
1317 "structure.\n", __func__, vha->host_no);
1318 rval = QLA_MEMORY_ALLOC_FAILED;
1319 goto out_free;
1320 }
1321
1322 memcpy(list, pmap, dma_size);
1323restart:
1324 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1325 }
1326
1327 *out_data = list;
1328 *out_len = dma_size;
1329
1330out:
1331 return rval;
1332
1333out_free:
1334 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1335 return rval;
1336}
1337
1da177e4
LT		 1338/*
1339 * qla2x00_get_port_database
1340 * Issue normal/enhanced get port database mailbox command
1341 * and copy device name as necessary.
1342 *
1343 * Input:
1344 * ha = adapter state pointer.
1345 * dev = structure pointer.
1346 * opt = enhanced cmd option byte.
1347 *
1348 * Returns:
1349 * qla2x00 local function return status code.
1350 *
1351 * Context:
1352 * Kernel context.
1353 */
1354int
7b867cf7 1355qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1da177e4
LT		 1356{
1357 int rval;
1358 mbx_cmd_t mc;
1359 mbx_cmd_t *mcp = &mc;
1360 port_database_t *pd;
1c7c6357 1361 struct port_database_24xx *pd24;
1da177e4 1362 dma_addr_t pd_dma;
7b867cf7 1363 struct qla_hw_data *ha = vha->hw;
1da177e4 1364
5f28d2d7
SK		 1365 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1366 "Entered %s.\n", __func__);
1da177e4 1367
1c7c6357
AV		 1368 pd24 = NULL;
1369 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1da177e4 1370 if (pd == NULL) {
7c3df132
SK		 1371 ql_log(ql_log_warn, vha, 0x1050,
1372 "Failed to allocate port database structure.\n");
1da177e4
LT		 1373 return QLA_MEMORY_ALLOC_FAILED;
1374 }
1c7c6357 1375 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1da177e4 1376
1c7c6357 1377 mcp->mb[0] = MBC_GET_PORT_DATABASE;
e428924c 1378 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1da177e4 1379 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1da177e4
LT		 1380 mcp->mb[2] = MSW(pd_dma);
1381 mcp->mb[3] = LSW(pd_dma);
1382 mcp->mb[6] = MSW(MSD(pd_dma));
1383 mcp->mb[7] = LSW(MSD(pd_dma));
7b867cf7 1384 mcp->mb[9] = vha->vp_idx;
2c3dfe3f 1385 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1da177e4 1386 mcp->in_mb = MBX_0;
e428924c 1387 if (IS_FWI2_CAPABLE(ha)) {
1c7c6357
AV		 1388 mcp->mb[1] = fcport->loop_id;
1389 mcp->mb[10] = opt;
1390 mcp->out_mb |= MBX_10|MBX_1;
1391 mcp->in_mb |= MBX_1;
1392 } else if (HAS_EXTENDED_IDS(ha)) {
1393 mcp->mb[1] = fcport->loop_id;
1394 mcp->mb[10] = opt;
1395 mcp->out_mb |= MBX_10|MBX_1;
1396 } else {
1397 mcp->mb[1] = fcport->loop_id << 8 | opt;
1398 mcp->out_mb |= MBX_1;
1399 }
e428924c
AV		 1400 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1401 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1da177e4
LT		 1402 mcp->flags = MBX_DMA_IN;
1403 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
7b867cf7 1404 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 1405 if (rval != QLA_SUCCESS)
1406 goto gpd_error_out;
1407
e428924c 1408 if (IS_FWI2_CAPABLE(ha)) {
0eba25df 1409 uint64_t zero = 0;
1c7c6357
AV		 1410 pd24 = (struct port_database_24xx *) pd;
1411
1412 /* Check for logged in state. */
1413 if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1414 pd24->last_login_state != PDS_PRLI_COMPLETE) {
7c3df132
SK		 1415 ql_dbg(ql_dbg_mbx, vha, 0x1051,
1416 "Unable to verify login-state (%x/%x) for "
1417 "loop_id %x.\n", pd24->current_login_state,
1418 pd24->last_login_state, fcport->loop_id);
1c7c6357
AV		 1419 rval = QLA_FUNCTION_FAILED;
1420 goto gpd_error_out;
1421 }
1da177e4 1422
0eba25df
AE		 1423 if (fcport->loop_id == FC_NO_LOOP_ID ||
1424 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1425 memcmp(fcport->port_name, pd24->port_name, 8))) {
1426 /* We lost the device mid way. */
1427 rval = QLA_NOT_LOGGED_IN;
1428 goto gpd_error_out;
1429 }
1430
1c7c6357
AV		 1431 /* Names are little-endian. */
1432 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1433 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1434
1435 /* Get port_id of device. */
1436 fcport->d_id.b.domain = pd24->port_id[0];
1437 fcport->d_id.b.area = pd24->port_id[1];
1438 fcport->d_id.b.al_pa = pd24->port_id[2];
1439 fcport->d_id.b.rsvd_1 = 0;
1440
1441 /* If not target must be initiator or unknown type. */
1442 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1443 fcport->port_type = FCT_INITIATOR;
1444 else
1445 fcport->port_type = FCT_TARGET;
2d70c103
NB		 1446
1447 /* Passback COS information. */
1448 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1449 FC_COS_CLASS2 : FC_COS_CLASS3;
1450
1451 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1452 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1c7c6357 1453 } else {
0eba25df
AE		 1454 uint64_t zero = 0;
1455
1c7c6357
AV		 1456 /* Check for logged in state. */
1457 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1458 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
7c3df132
SK		 1459 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1460 "Unable to verify login-state (%x/%x) - "
1461 "portid=%02x%02x%02x.\n", pd->master_state,
1462 pd->slave_state, fcport->d_id.b.domain,
1463 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1c7c6357
AV		 1464 rval = QLA_FUNCTION_FAILED;
1465 goto gpd_error_out;
1466 }
1da177e4 1467
0eba25df
AE		 1468 if (fcport->loop_id == FC_NO_LOOP_ID ||
1469 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1470 memcmp(fcport->port_name, pd->port_name, 8))) {
1471 /* We lost the device mid way. */
1472 rval = QLA_NOT_LOGGED_IN;
1473 goto gpd_error_out;
1474 }
1475
1c7c6357
AV		 1476 /* Names are little-endian. */
1477 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1478 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1479
1480 /* Get port_id of device. */
1481 fcport->d_id.b.domain = pd->port_id[0];
1482 fcport->d_id.b.area = pd->port_id[3];
1483 fcport->d_id.b.al_pa = pd->port_id[2];
1484 fcport->d_id.b.rsvd_1 = 0;
1485
1c7c6357
AV		 1486 /* If not target must be initiator or unknown type. */
1487 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1488 fcport->port_type = FCT_INITIATOR;
1489 else
1490 fcport->port_type = FCT_TARGET;
ad3e0eda
AV		 1491
1492 /* Passback COS information. */
1493 fcport->supported_classes = (pd->options & BIT_4) ?
1494 FC_COS_CLASS2: FC_COS_CLASS3;
1c7c6357 1495 }
1da177e4
LT		 1496
1497gpd_error_out:
1498 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1499
1500 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1501 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1502 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1503 mcp->mb[0], mcp->mb[1]);
1da177e4 1504 } else {
5f28d2d7
SK		 1505 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1506 "Done %s.\n", __func__);
1da177e4
LT		 1507 }
1508
1509 return rval;
1510}
1511
1512/*
1513 * qla2x00_get_firmware_state
1514 * Get adapter firmware state.
1515 *
1516 * Input:
1517 * ha = adapter block pointer.
1518 * dptr = pointer for firmware state.
1519 * TARGET_QUEUE_LOCK must be released.
1520 * ADAPTER_STATE_LOCK must be released.
1521 *
1522 * Returns:
1523 * qla2x00 local function return status code.
1524 *
1525 * Context:
1526 * Kernel context.
1527 */
1528int
7b867cf7 1529qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1da177e4
LT		 1530{
1531 int rval;
1532 mbx_cmd_t mc;
1533 mbx_cmd_t *mcp = &mc;
1534
5f28d2d7
SK		 1535 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1536 "Entered %s.\n", __func__);
1da177e4
LT		 1537
1538 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1539 mcp->out_mb = MBX_0;
9d2683c0
AV		 1540 if (IS_FWI2_CAPABLE(vha->hw))
1541 mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1542 else
1543 mcp->in_mb = MBX_1|MBX_0;
b93480e3 1544 mcp->tov = MBX_TOV_SECONDS;
1da177e4 1545 mcp->flags = 0;
7b867cf7 1546 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4 1547
4d4df193
HK		 1548 /* Return firmware states. */
1549 states[0] = mcp->mb[1];
9d2683c0
AV		 1550 if (IS_FWI2_CAPABLE(vha->hw)) {
1551 states[1] = mcp->mb[2];
1552 states[2] = mcp->mb[3];
1553 states[3] = mcp->mb[4];
1554 states[4] = mcp->mb[5];
1555 }
1da177e4
LT		 1556
1557 if (rval != QLA_SUCCESS) {
1558 /*EMPTY*/
7c3df132 1559 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1da177e4
LT		 1560 } else {
1561 /*EMPTY*/
5f28d2d7
SK		 1562 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1563 "Done %s.\n", __func__);
1da177e4
LT		 1564 }
1565
1566 return rval;
1567}
1568
1569/*
1570 * qla2x00_get_port_name
1571 * Issue get port name mailbox command.
1572 * Returned name is in big endian format.
1573 *
1574 * Input:
1575 * ha = adapter block pointer.
1576 * loop_id = loop ID of device.
1577 * name = pointer for name.
1578 * TARGET_QUEUE_LOCK must be released.
1579 * ADAPTER_STATE_LOCK must be released.
1580 *
1581 * Returns:
1582 * qla2x00 local function return status code.
1583 *
1584 * Context:
1585 * Kernel context.
1586 */
1587int
7b867cf7 1588qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1da177e4
LT		 1589 uint8_t opt)
1590{
1591 int rval;
1592 mbx_cmd_t mc;
1593 mbx_cmd_t *mcp = &mc;
1594
5f28d2d7
SK		 1595 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1596 "Entered %s.\n", __func__);
1da177e4
LT		 1597
1598 mcp->mb[0] = MBC_GET_PORT_NAME;
7b867cf7 1599 mcp->mb[9] = vha->vp_idx;
2c3dfe3f 1600 mcp->out_mb = MBX_9|MBX_1|MBX_0;
7b867cf7 1601 if (HAS_EXTENDED_IDS(vha->hw)) {
1da177e4
LT		 1602 mcp->mb[1] = loop_id;
1603 mcp->mb[10] = opt;
1604 mcp->out_mb |= MBX_10;
1605 } else {
1606 mcp->mb[1] = loop_id << 8 | opt;
1607 }
1608
1609 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
b93480e3 1610 mcp->tov = MBX_TOV_SECONDS;
1da177e4 1611 mcp->flags = 0;
7b867cf7 1612 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 1613
1614 if (rval != QLA_SUCCESS) {
1615 /*EMPTY*/
7c3df132 1616 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1da177e4
LT		 1617 } else {
1618 if (name != NULL) {
1619 /* This function returns name in big endian. */
1196ae02
RL		 1620 name[0] = MSB(mcp->mb[2]);
1621 name[1] = LSB(mcp->mb[2]);
1622 name[2] = MSB(mcp->mb[3]);
1623 name[3] = LSB(mcp->mb[3]);
1624 name[4] = MSB(mcp->mb[6]);
1625 name[5] = LSB(mcp->mb[6]);
1626 name[6] = MSB(mcp->mb[7]);
1627 name[7] = LSB(mcp->mb[7]);
1da177e4
LT		 1628 }
1629
5f28d2d7
SK		 1630 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1631 "Done %s.\n", __func__);
1da177e4
LT		 1632 }
1633
1634 return rval;
1635}
1636
1637/*
1638 * qla2x00_lip_reset
1639 * Issue LIP reset mailbox command.
1640 *
1641 * Input:
1642 * ha = adapter block pointer.
1643 * TARGET_QUEUE_LOCK must be released.
1644 * ADAPTER_STATE_LOCK must be released.
1645 *
1646 * Returns:
1647 * qla2x00 local function return status code.
1648 *
1649 * Context:
1650 * Kernel context.
1651 */
1652int
7b867cf7 1653qla2x00_lip_reset(scsi_qla_host_t *vha)
1da177e4
LT		 1654{
1655 int rval;
1656 mbx_cmd_t mc;
1657 mbx_cmd_t *mcp = &mc;
1658
5f28d2d7
SK		 1659 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
1660 "Entered %s.\n", __func__);
1da177e4 1661
6246b8a1 1662 if (IS_CNA_CAPABLE(vha->hw)) {
3a03eb79
AV		 1663 /* Logout across all FCFs. */
1664 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1665 mcp->mb[1] = BIT_1;
1666 mcp->mb[2] = 0;
1667 mcp->out_mb = MBX_2|MBX_1|MBX_0;
1668 } else if (IS_FWI2_CAPABLE(vha->hw)) {
1c7c6357 1669 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
0c8c39af
AV		 1670 mcp->mb[1] = BIT_6;
1671 mcp->mb[2] = 0;
7b867cf7 1672 mcp->mb[3] = vha->hw->loop_reset_delay;
1c7c6357 1673 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1da177e4 1674 } else {
1c7c6357
AV		 1675 mcp->mb[0] = MBC_LIP_RESET;
1676 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
7b867cf7 1677 if (HAS_EXTENDED_IDS(vha->hw)) {
1c7c6357
AV		 1678 mcp->mb[1] = 0x00ff;
1679 mcp->mb[10] = 0;
1680 mcp->out_mb |= MBX_10;
1681 } else {
1682 mcp->mb[1] = 0xff00;
1683 }
7b867cf7 1684 mcp->mb[2] = vha->hw->loop_reset_delay;
1c7c6357 1685 mcp->mb[3] = 0;
1da177e4 1686 }
1da177e4 1687 mcp->in_mb = MBX_0;
b93480e3 1688 mcp->tov = MBX_TOV_SECONDS;
1da177e4 1689 mcp->flags = 0;
7b867cf7 1690 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 1691
1692 if (rval != QLA_SUCCESS) {
1693 /*EMPTY*/
7c3df132 1694 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
1da177e4
LT		 1695 } else {
1696 /*EMPTY*/
5f28d2d7
SK		 1697 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
1698 "Done %s.\n", __func__);
1da177e4
LT		 1699 }
1700
1701 return rval;
1702}
1703
1704/*
1705 * qla2x00_send_sns
1706 * Send SNS command.
1707 *
1708 * Input:
1709 * ha = adapter block pointer.
1710 * sns = pointer for command.
1711 * cmd_size = command size.
1712 * buf_size = response/command size.
1713 * TARGET_QUEUE_LOCK must be released.
1714 * ADAPTER_STATE_LOCK must be released.
1715 *
1716 * Returns:
1717 * qla2x00 local function return status code.
1718 *
1719 * Context:
1720 * Kernel context.
1721 */
1722int
7b867cf7 1723qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
1da177e4
LT		 1724 uint16_t cmd_size, size_t buf_size)
1725{
1726 int rval;
1727 mbx_cmd_t mc;
1728 mbx_cmd_t *mcp = &mc;
1729
5f28d2d7
SK		 1730 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
1731 "Entered %s.\n", __func__);
1da177e4 1732
5f28d2d7 1733 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
7c3df132
SK		 1734 "Retry cnt=%d ratov=%d total tov=%d.\n",
1735 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
1da177e4
LT		 1736
1737 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
1738 mcp->mb[1] = cmd_size;
1739 mcp->mb[2] = MSW(sns_phys_address);
1740 mcp->mb[3] = LSW(sns_phys_address);
1741 mcp->mb[6] = MSW(MSD(sns_phys_address));
1742 mcp->mb[7] = LSW(MSD(sns_phys_address));
1743 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1744 mcp->in_mb = MBX_0|MBX_1;
1745 mcp->buf_size = buf_size;
1746 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
7b867cf7
AC		 1747 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
1748 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 1749
1750 if (rval != QLA_SUCCESS) {
1751 /*EMPTY*/
7c3df132
SK		 1752 ql_dbg(ql_dbg_mbx, vha, 0x105f,
1753 "Failed=%x mb[0]=%x mb[1]=%x.\n",
1754 rval, mcp->mb[0], mcp->mb[1]);
1da177e4
LT		 1755 } else {
1756 /*EMPTY*/
5f28d2d7
SK		 1757 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
1758 "Done %s.\n", __func__);
1da177e4
LT		 1759 }
1760
1761 return rval;
1762}
1763
1c7c6357 1764int
7b867cf7 1765qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1c7c6357
AV		 1766 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1767{
1768 int rval;
1769
1770 struct logio_entry_24xx *lg;
1771 dma_addr_t lg_dma;
1772 uint32_t iop[2];
7b867cf7 1773 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC		 1774 struct req_que *req;
1775 struct rsp_que *rsp;
1c7c6357 1776
5f28d2d7
SK		 1777 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
1778 "Entered %s.\n", __func__);
1c7c6357 1779
7163ea81 1780 if (ha->flags.cpu_affinity_enabled)
68ca949c
AC		 1781 req = ha->req_q_map[0];
1782 else
1783 req = vha->req;
2afa19a9
AC		 1784 rsp = req->rsp;
1785
1c7c6357
AV		 1786 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
1787 if (lg == NULL) {
7c3df132
SK		 1788 ql_log(ql_log_warn, vha, 0x1062,
1789 "Failed to allocate login IOCB.\n");
1c7c6357
AV		 1790 return QLA_MEMORY_ALLOC_FAILED;
1791 }
1792 memset(lg, 0, sizeof(struct logio_entry_24xx));
1793
1794 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
1795 lg->entry_count = 1;
2afa19a9 1796 lg->handle = MAKE_HANDLE(req->id, lg->handle);
1c7c6357
AV		 1797 lg->nport_handle = cpu_to_le16(loop_id);
1798 lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
1799 if (opt & BIT_0)
1800 lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
8baa51a6
AV		 1801 if (opt & BIT_1)
1802 lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
1c7c6357
AV		 1803 lg->port_id[0] = al_pa;
1804 lg->port_id[1] = area;
1805 lg->port_id[2] = domain;
7b867cf7 1806 lg->vp_index = vha->vp_idx;
7f45dd0b
AV		 1807 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
1808 (ha->r_a_tov / 10 * 2) + 2);
1c7c6357 1809 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1810 ql_dbg(ql_dbg_mbx, vha, 0x1063,
1811 "Failed to issue login IOCB (%x).\n", rval);
1c7c6357 1812 } else if (lg->entry_status != 0) {
7c3df132
SK		 1813 ql_dbg(ql_dbg_mbx, vha, 0x1064,
1814 "Failed to complete IOCB -- error status (%x).\n",
1815 lg->entry_status);
1c7c6357
AV		 1816 rval = QLA_FUNCTION_FAILED;
1817 } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
1818 iop[0] = le32_to_cpu(lg->io_parameter[0]);
1819 iop[1] = le32_to_cpu(lg->io_parameter[1]);
1820
7c3df132
SK		 1821 ql_dbg(ql_dbg_mbx, vha, 0x1065,
1822 "Failed to complete IOCB -- completion status (%x) "
1823 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
1824 iop[0], iop[1]);
1c7c6357
AV		 1825
1826 switch (iop[0]) {
1827 case LSC_SCODE_PORTID_USED:
1828 mb[0] = MBS_PORT_ID_USED;
1829 mb[1] = LSW(iop[1]);
1830 break;
1831 case LSC_SCODE_NPORT_USED:
1832 mb[0] = MBS_LOOP_ID_USED;
1833 break;
1834 case LSC_SCODE_NOLINK:
1835 case LSC_SCODE_NOIOCB:
1836 case LSC_SCODE_NOXCB:
1837 case LSC_SCODE_CMD_FAILED:
1838 case LSC_SCODE_NOFABRIC:
1839 case LSC_SCODE_FW_NOT_READY:
1840 case LSC_SCODE_NOT_LOGGED_IN:
1841 case LSC_SCODE_NOPCB:
1842 case LSC_SCODE_ELS_REJECT:
1843 case LSC_SCODE_CMD_PARAM_ERR:
1844 case LSC_SCODE_NONPORT:
1845 case LSC_SCODE_LOGGED_IN:
1846 case LSC_SCODE_NOFLOGI_ACC:
1847 default:
1848 mb[0] = MBS_COMMAND_ERROR;
1849 break;
1850 }
1851 } else {
5f28d2d7
SK		 1852 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
1853 "Done %s.\n", __func__);
1c7c6357
AV		 1854
1855 iop[0] = le32_to_cpu(lg->io_parameter[0]);
1856
1857 mb[0] = MBS_COMMAND_COMPLETE;
1858 mb[1] = 0;
1859 if (iop[0] & BIT_4) {
1860 if (iop[0] & BIT_8)
1861 mb[1] |= BIT_1;
1862 } else
1863 mb[1] = BIT_0;
ad3e0eda
AV		 1864
1865 /* Passback COS information. */
1866 mb[10] = 0;
1867 if (lg->io_parameter[7] || lg->io_parameter[8])
1868 mb[10] |= BIT_0; /* Class 2. */
1869 if (lg->io_parameter[9] || lg->io_parameter[10])
1870 mb[10] |= BIT_1; /* Class 3. */
2d70c103
NB		 1871 if (lg->io_parameter[0] & __constant_cpu_to_le32(BIT_7))
1872 mb[10] |= BIT_7; /* Confirmed Completion
1873 * Allowed
1874 */
1c7c6357
AV		 1875 }
1876
1877 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
1878
1879 return rval;
1880}
1881
1da177e4
LT		 1882/*
1883 * qla2x00_login_fabric
1884 * Issue login fabric port mailbox command.
1885 *
1886 * Input:
1887 * ha = adapter block pointer.
1888 * loop_id = device loop ID.
1889 * domain = device domain.
1890 * area = device area.
1891 * al_pa = device AL_PA.
1892 * status = pointer for return status.
1893 * opt = command options.
1894 * TARGET_QUEUE_LOCK must be released.
1895 * ADAPTER_STATE_LOCK must be released.
1896 *
1897 * Returns:
1898 * qla2x00 local function return status code.
1899 *
1900 * Context:
1901 * Kernel context.
1902 */
1903int
7b867cf7 1904qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1da177e4
LT		 1905 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1906{
1907 int rval;
1908 mbx_cmd_t mc;
1909 mbx_cmd_t *mcp = &mc;
7b867cf7 1910 struct qla_hw_data *ha = vha->hw;
1da177e4 1911
5f28d2d7
SK		 1912 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
1913 "Entered %s.\n", __func__);
1da177e4
LT		 1914
1915 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
1916 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1917 if (HAS_EXTENDED_IDS(ha)) {
1918 mcp->mb[1] = loop_id;
1919 mcp->mb[10] = opt;
1920 mcp->out_mb |= MBX_10;
1921 } else {
1922 mcp->mb[1] = (loop_id << 8) | opt;
1923 }
1924 mcp->mb[2] = domain;
1925 mcp->mb[3] = area << 8 | al_pa;
1926
1927 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
1928 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1929 mcp->flags = 0;
7b867cf7 1930 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 1931
1932 /* Return mailbox statuses. */
1933 if (mb != NULL) {
1934 mb[0] = mcp->mb[0];
1935 mb[1] = mcp->mb[1];
1936 mb[2] = mcp->mb[2];
1937 mb[6] = mcp->mb[6];
1938 mb[7] = mcp->mb[7];
ad3e0eda
AV		 1939 /* COS retrieved from Get-Port-Database mailbox command. */
1940 mb[10] = 0;
1da177e4
LT		 1941 }
1942
1943 if (rval != QLA_SUCCESS) {
1944 /* RLU tmp code: need to change main mailbox_command function to
1945 * return ok even when the mailbox completion value is not
1946 * SUCCESS. The caller needs to be responsible to interpret
1947 * the return values of this mailbox command if we're not
1948 * to change too much of the existing code.
1949 */
1950 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
1951 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
1952 mcp->mb[0] == 0x4006)
1953 rval = QLA_SUCCESS;
1954
1955 /*EMPTY*/
7c3df132
SK		 1956 ql_dbg(ql_dbg_mbx, vha, 0x1068,
1957 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
1958 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
1da177e4
LT		 1959 } else {
1960 /*EMPTY*/
5f28d2d7
SK		 1961 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
1962 "Done %s.\n", __func__);
1da177e4
LT		 1963 }
1964
1965 return rval;
1966}
1967
1968/*
1969 * qla2x00_login_local_device
1970 * Issue login loop port mailbox command.
fa2a1ce5 1971 *
1da177e4
LT		 1972 * Input:
1973 * ha = adapter block pointer.
1974 * loop_id = device loop ID.
1975 * opt = command options.
fa2a1ce5 1976 *
1da177e4
LT		 1977 * Returns:
1978 * Return status code.
fa2a1ce5 1979 *
1da177e4
LT		 1980 * Context:
1981 * Kernel context.
fa2a1ce5 1982 *
1da177e4
LT		 1983 */
1984int
7b867cf7 1985qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 1986 uint16_t *mb_ret, uint8_t opt)
1987{
1988 int rval;
1989 mbx_cmd_t mc;
1990 mbx_cmd_t *mcp = &mc;
7b867cf7 1991 struct qla_hw_data *ha = vha->hw;
1da177e4 1992
5f28d2d7
SK		 1993 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
1994 "Entered %s.\n", __func__);
7c3df132 1995
e428924c 1996 if (IS_FWI2_CAPABLE(ha))
7b867cf7 1997 return qla24xx_login_fabric(vha, fcport->loop_id,
9a52a57c 1998 fcport->d_id.b.domain, fcport->d_id.b.area,
1999 fcport->d_id.b.al_pa, mb_ret, opt);
2000
1da177e4
LT		 2001 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2002 if (HAS_EXTENDED_IDS(ha))
9a52a57c 2003 mcp->mb[1] = fcport->loop_id;
1da177e4 2004 else
9a52a57c 2005 mcp->mb[1] = fcport->loop_id << 8;
1da177e4
LT		 2006 mcp->mb[2] = opt;
2007 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2008 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2009 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2010 mcp->flags = 0;
7b867cf7 2011 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 2012
2013 /* Return mailbox statuses. */
2014 if (mb_ret != NULL) {
2015 mb_ret[0] = mcp->mb[0];
2016 mb_ret[1] = mcp->mb[1];
2017 mb_ret[6] = mcp->mb[6];
2018 mb_ret[7] = mcp->mb[7];
2019 }
2020
2021 if (rval != QLA_SUCCESS) {
2022 /* AV tmp code: need to change main mailbox_command function to
2023 * return ok even when the mailbox completion value is not
2024 * SUCCESS. The caller needs to be responsible to interpret
2025 * the return values of this mailbox command if we're not
2026 * to change too much of the existing code.
2027 */
2028 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2029 rval = QLA_SUCCESS;
2030
7c3df132
SK		 2031 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2032 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2033 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
1da177e4
LT		 2034 } else {
2035 /*EMPTY*/
5f28d2d7
SK		 2036 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2037 "Done %s.\n", __func__);
1da177e4
LT		 2038 }
2039
2040 return (rval);
2041}
2042
1c7c6357 2043int
7b867cf7 2044qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1c7c6357
AV		 2045 uint8_t area, uint8_t al_pa)
2046{
2047 int rval;
2048 struct logio_entry_24xx *lg;
2049 dma_addr_t lg_dma;
7b867cf7 2050 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC		 2051 struct req_que *req;
2052 struct rsp_que *rsp;
1c7c6357 2053
5f28d2d7
SK		 2054 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2055 "Entered %s.\n", __func__);
1c7c6357
AV		 2056
2057 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2058 if (lg == NULL) {
7c3df132
SK		 2059 ql_log(ql_log_warn, vha, 0x106e,
2060 "Failed to allocate logout IOCB.\n");
1c7c6357
AV		 2061 return QLA_MEMORY_ALLOC_FAILED;
2062 }
2063 memset(lg, 0, sizeof(struct logio_entry_24xx));
2064
2afa19a9
AC		 2065 if (ql2xmaxqueues > 1)
2066 req = ha->req_q_map[0];
2067 else
2068 req = vha->req;
2069 rsp = req->rsp;
1c7c6357
AV		 2070 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2071 lg->entry_count = 1;
2afa19a9 2072 lg->handle = MAKE_HANDLE(req->id, lg->handle);
1c7c6357
AV		 2073 lg->nport_handle = cpu_to_le16(loop_id);
2074 lg->control_flags =
c8d6691b
AV		 2075 __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2076 LCF_FREE_NPORT);
1c7c6357
AV		 2077 lg->port_id[0] = al_pa;
2078 lg->port_id[1] = area;
2079 lg->port_id[2] = domain;
7b867cf7 2080 lg->vp_index = vha->vp_idx;
7f45dd0b
AV		 2081 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2082 (ha->r_a_tov / 10 * 2) + 2);
1c7c6357 2083 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2084 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2085 "Failed to issue logout IOCB (%x).\n", rval);
1c7c6357 2086 } else if (lg->entry_status != 0) {
7c3df132
SK		 2087 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2088 "Failed to complete IOCB -- error status (%x).\n",
2089 lg->entry_status);
1c7c6357
AV		 2090 rval = QLA_FUNCTION_FAILED;
2091 } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
7c3df132
SK		 2092 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2093 "Failed to complete IOCB -- completion status (%x) "
2094 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
1c7c6357 2095 le32_to_cpu(lg->io_parameter[0]),
7c3df132 2096 le32_to_cpu(lg->io_parameter[1]));
1c7c6357
AV		 2097 } else {
2098 /*EMPTY*/
5f28d2d7
SK		 2099 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2100 "Done %s.\n", __func__);
1c7c6357
AV		 2101 }
2102
2103 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2104
2105 return rval;
2106}
2107
1da177e4
LT		 2108/*
2109 * qla2x00_fabric_logout
2110 * Issue logout fabric port mailbox command.
2111 *
2112 * Input:
2113 * ha = adapter block pointer.
2114 * loop_id = device loop ID.
2115 * TARGET_QUEUE_LOCK must be released.
2116 * ADAPTER_STATE_LOCK must be released.
2117 *
2118 * Returns:
2119 * qla2x00 local function return status code.
2120 *
2121 * Context:
2122 * Kernel context.
2123 */
2124int
7b867cf7 2125qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1c7c6357 2126 uint8_t area, uint8_t al_pa)
1da177e4
LT		 2127{
2128 int rval;
2129 mbx_cmd_t mc;
2130 mbx_cmd_t *mcp = &mc;
2131
5f28d2d7
SK		 2132 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2133 "Entered %s.\n", __func__);
1da177e4
LT		 2134
2135 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2136 mcp->out_mb = MBX_1|MBX_0;
7b867cf7 2137 if (HAS_EXTENDED_IDS(vha->hw)) {
1da177e4
LT		 2138 mcp->mb[1] = loop_id;
2139 mcp->mb[10] = 0;
2140 mcp->out_mb |= MBX_10;
2141 } else {
2142 mcp->mb[1] = loop_id << 8;
2143 }
2144
2145 mcp->in_mb = MBX_1|MBX_0;
b93480e3 2146 mcp->tov = MBX_TOV_SECONDS;
1da177e4 2147 mcp->flags = 0;
7b867cf7 2148 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 2149
2150 if (rval != QLA_SUCCESS) {
2151 /*EMPTY*/
7c3df132
SK		 2152 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2153 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
1da177e4
LT		 2154 } else {
2155 /*EMPTY*/
5f28d2d7
SK		 2156 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2157 "Done %s.\n", __func__);
1da177e4
LT		 2158 }
2159
2160 return rval;
2161}
2162
2163/*
2164 * qla2x00_full_login_lip
2165 * Issue full login LIP mailbox command.
2166 *
2167 * Input:
2168 * ha = adapter block pointer.
2169 * TARGET_QUEUE_LOCK must be released.
2170 * ADAPTER_STATE_LOCK must be released.
2171 *
2172 * Returns:
2173 * qla2x00 local function return status code.
2174 *
2175 * Context:
2176 * Kernel context.
2177 */
2178int
7b867cf7 2179qla2x00_full_login_lip(scsi_qla_host_t *vha)
1da177e4
LT		 2180{
2181 int rval;
2182 mbx_cmd_t mc;
2183 mbx_cmd_t *mcp = &mc;
2184
5f28d2d7
SK		 2185 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2186 "Entered %s.\n", __func__);
1da177e4
LT		 2187
2188 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
7b867cf7 2189 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
0c8c39af 2190 mcp->mb[2] = 0;
1da177e4
LT		 2191 mcp->mb[3] = 0;
2192 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2193 mcp->in_mb = MBX_0;
b93480e3 2194 mcp->tov = MBX_TOV_SECONDS;
1da177e4 2195 mcp->flags = 0;
7b867cf7 2196 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 2197
2198 if (rval != QLA_SUCCESS) {
2199 /*EMPTY*/
7c3df132 2200 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
1da177e4
LT		 2201 } else {
2202 /*EMPTY*/
5f28d2d7
SK		 2203 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2204 "Done %s.\n", __func__);
1da177e4
LT		 2205 }
2206
2207 return rval;
2208}
2209
2210/*
2211 * qla2x00_get_id_list
2212 *
2213 * Input:
2214 * ha = adapter block pointer.
2215 *
2216 * Returns:
2217 * qla2x00 local function return status code.
2218 *
2219 * Context:
2220 * Kernel context.
2221 */
2222int
7b867cf7 2223qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
1da177e4
LT		 2224 uint16_t *entries)
2225{
2226 int rval;
2227 mbx_cmd_t mc;
2228 mbx_cmd_t *mcp = &mc;
2229
5f28d2d7
SK		 2230 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2231 "Entered %s.\n", __func__);
1da177e4
LT		 2232
2233 if (id_list == NULL)
2234 return QLA_FUNCTION_FAILED;
2235
2236 mcp->mb[0] = MBC_GET_ID_LIST;
1c7c6357 2237 mcp->out_mb = MBX_0;
7b867cf7 2238 if (IS_FWI2_CAPABLE(vha->hw)) {
1c7c6357
AV		 2239 mcp->mb[2] = MSW(id_list_dma);
2240 mcp->mb[3] = LSW(id_list_dma);
2241 mcp->mb[6] = MSW(MSD(id_list_dma));
2242 mcp->mb[7] = LSW(MSD(id_list_dma));
247ec457 2243 mcp->mb[8] = 0;
7b867cf7 2244 mcp->mb[9] = vha->vp_idx;
2c3dfe3f 2245 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
1c7c6357
AV		 2246 } else {
2247 mcp->mb[1] = MSW(id_list_dma);
2248 mcp->mb[2] = LSW(id_list_dma);
2249 mcp->mb[3] = MSW(MSD(id_list_dma));
2250 mcp->mb[6] = LSW(MSD(id_list_dma));
2251 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2252 }
1da177e4 2253 mcp->in_mb = MBX_1|MBX_0;
b93480e3 2254 mcp->tov = MBX_TOV_SECONDS;
1da177e4 2255 mcp->flags = 0;
7b867cf7 2256 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 2257
2258 if (rval != QLA_SUCCESS) {
2259 /*EMPTY*/
7c3df132 2260 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
1da177e4
LT		 2261 } else {
2262 *entries = mcp->mb[1];
5f28d2d7
SK		 2263 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2264 "Done %s.\n", __func__);
1da177e4
LT		 2265 }
2266
2267 return rval;
2268}
2269
2270/*
2271 * qla2x00_get_resource_cnts
2272 * Get current firmware resource counts.
2273 *
2274 * Input:
2275 * ha = adapter block pointer.
2276 *
2277 * Returns:
2278 * qla2x00 local function return status code.
2279 *
2280 * Context:
2281 * Kernel context.
2282 */
2283int
7b867cf7 2284qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
4d0ea247 2285 uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
f3a0a77e 2286 uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
1da177e4
LT		 2287{
2288 int rval;
2289 mbx_cmd_t mc;
2290 mbx_cmd_t *mcp = &mc;
2291
5f28d2d7
SK		 2292 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2293 "Entered %s.\n", __func__);
1da177e4
LT		 2294
2295 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2296 mcp->out_mb = MBX_0;
4d0ea247 2297 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
6246b8a1 2298 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
f3a0a77e 2299 mcp->in_mb |= MBX_12;
b93480e3 2300 mcp->tov = MBX_TOV_SECONDS;
1da177e4 2301 mcp->flags = 0;
7b867cf7 2302 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 2303
2304 if (rval != QLA_SUCCESS) {
2305 /*EMPTY*/
7c3df132
SK		 2306 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2307 "Failed mb[0]=%x.\n", mcp->mb[0]);
1da177e4 2308 } else {
5f28d2d7 2309 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
7c3df132
SK		 2310 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2311 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2312 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2313 mcp->mb[11], mcp->mb[12]);
1da177e4
LT		 2314
2315 if (cur_xchg_cnt)
2316 *cur_xchg_cnt = mcp->mb[3];
2317 if (orig_xchg_cnt)
2318 *orig_xchg_cnt = mcp->mb[6];
2319 if (cur_iocb_cnt)
2320 *cur_iocb_cnt = mcp->mb[7];
2321 if (orig_iocb_cnt)
2322 *orig_iocb_cnt = mcp->mb[10];
7b867cf7 2323 if (vha->hw->flags.npiv_supported && max_npiv_vports)
4d0ea247 2324 *max_npiv_vports = mcp->mb[11];
6246b8a1 2325 if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
f3a0a77e 2326 *max_fcfs = mcp->mb[12];
1da177e4
LT		 2327 }
2328
2329 return (rval);
2330}
2331
1da177e4
LT		 2332/*
2333 * qla2x00_get_fcal_position_map
2334 * Get FCAL (LILP) position map using mailbox command
2335 *
2336 * Input:
2337 * ha = adapter state pointer.
2338 * pos_map = buffer pointer (can be NULL).
2339 *
2340 * Returns:
2341 * qla2x00 local function return status code.
2342 *
2343 * Context:
2344 * Kernel context.
2345 */
2346int
7b867cf7 2347qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
1da177e4
LT		 2348{
2349 int rval;
2350 mbx_cmd_t mc;
2351 mbx_cmd_t *mcp = &mc;
2352 char *pmap;
2353 dma_addr_t pmap_dma;
7b867cf7 2354 struct qla_hw_data *ha = vha->hw;
1da177e4 2355
5f28d2d7
SK		 2356 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2357 "Entered %s.\n", __func__);
7c3df132 2358
4b89258c 2359 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
1da177e4 2360 if (pmap == NULL) {
7c3df132
SK		 2361 ql_log(ql_log_warn, vha, 0x1080,
2362 "Memory alloc failed.\n");
1da177e4
LT		 2363 return QLA_MEMORY_ALLOC_FAILED;
2364 }
2365 memset(pmap, 0, FCAL_MAP_SIZE);
2366
2367 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2368 mcp->mb[2] = MSW(pmap_dma);
2369 mcp->mb[3] = LSW(pmap_dma);
2370 mcp->mb[6] = MSW(MSD(pmap_dma));
2371 mcp->mb[7] = LSW(MSD(pmap_dma));
2372 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2373 mcp->in_mb = MBX_1|MBX_0;
2374 mcp->buf_size = FCAL_MAP_SIZE;
2375 mcp->flags = MBX_DMA_IN;
2376 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
7b867cf7 2377 rval = qla2x00_mailbox_command(vha, mcp);
1da177e4
LT		 2378
2379 if (rval == QLA_SUCCESS) {
5f28d2d7 2380 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
7c3df132
SK		 2381 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2382 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2383 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2384 pmap, pmap[0] + 1);
1da177e4
LT		 2385
2386 if (pos_map)
2387 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2388 }
2389 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2390
2391 if (rval != QLA_SUCCESS) {
7c3df132 2392 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
1da177e4 2393 } else {
5f28d2d7
SK		 2394 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2395 "Done %s.\n", __func__);
1da177e4
LT		 2396 }
2397
2398 return rval;
2399}
392e2f65 2400
2401/*
2402 * qla2x00_get_link_status
2403 *
2404 * Input:
2405 * ha = adapter block pointer.
2406 * loop_id = device loop ID.
2407 * ret_buf = pointer to link status return buffer.
2408 *
2409 * Returns:
2410 * 0 = success.
2411 * BIT_0 = mem alloc error.
2412 * BIT_1 = mailbox error.
2413 */
2414int
7b867cf7 2415qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
43ef0580 2416 struct link_statistics *stats, dma_addr_t stats_dma)
392e2f65 2417{
2418 int rval;
2419 mbx_cmd_t mc;
2420 mbx_cmd_t *mcp = &mc;
43ef0580 2421 uint32_t *siter, *diter, dwords;
7b867cf7 2422 struct qla_hw_data *ha = vha->hw;
392e2f65 2423
5f28d2d7
SK		 2424 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2425 "Entered %s.\n", __func__);
392e2f65 2426
392e2f65 2427 mcp->mb[0] = MBC_GET_LINK_STATUS;
43ef0580
AV		 2428 mcp->mb[2] = MSW(stats_dma);
2429 mcp->mb[3] = LSW(stats_dma);
2430 mcp->mb[6] = MSW(MSD(stats_dma));
2431 mcp->mb[7] = LSW(MSD(stats_dma));
392e2f65 2432 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2433 mcp->in_mb = MBX_0;
e428924c 2434 if (IS_FWI2_CAPABLE(ha)) {
392e2f65 2435 mcp->mb[1] = loop_id;
2436 mcp->mb[4] = 0;
2437 mcp->mb[10] = 0;
2438 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2439 mcp->in_mb |= MBX_1;
2440 } else if (HAS_EXTENDED_IDS(ha)) {
2441 mcp->mb[1] = loop_id;
2442 mcp->mb[10] = 0;
2443 mcp->out_mb |= MBX_10|MBX_1;
2444 } else {
2445 mcp->mb[1] = loop_id << 8;
2446 mcp->out_mb |= MBX_1;
2447 }
b93480e3 2448 mcp->tov = MBX_TOV_SECONDS;
392e2f65 2449 mcp->flags = IOCTL_CMD;
7b867cf7 2450 rval = qla2x00_mailbox_command(vha, mcp);
392e2f65 2451
2452 if (rval == QLA_SUCCESS) {
2453 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 2454 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2455 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
43ef0580 2456 rval = QLA_FUNCTION_FAILED;
392e2f65 2457 } else {
43ef0580 2458 /* Copy over data -- firmware data is LE. */
5f28d2d7
SK		 2459 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2460 "Done %s.\n", __func__);
43ef0580
AV		 2461 dwords = offsetof(struct link_statistics, unused1) / 4;
2462 siter = diter = &stats->link_fail_cnt;
2463 while (dwords--)
2464 *diter++ = le32_to_cpu(*siter++);
392e2f65 2465 }
2466 } else {
2467 /* Failed. */
7c3df132 2468 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
392e2f65 2469 }
2470
392e2f65 2471 return rval;
2472}
2473
2474int
7b867cf7 2475qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
43ef0580 2476 dma_addr_t stats_dma)
1c7c6357
AV		 2477{
2478 int rval;
2479 mbx_cmd_t mc;
2480 mbx_cmd_t *mcp = &mc;
43ef0580 2481 uint32_t *siter, *diter, dwords;
1c7c6357 2482
5f28d2d7
SK		 2483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2484 "Entered %s.\n", __func__);
1c7c6357 2485
1c7c6357 2486 mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
43ef0580
AV		 2487 mcp->mb[2] = MSW(stats_dma);
2488 mcp->mb[3] = LSW(stats_dma);
2489 mcp->mb[6] = MSW(MSD(stats_dma));
2490 mcp->mb[7] = LSW(MSD(stats_dma));
2491 mcp->mb[8] = sizeof(struct link_statistics) / 4;
7b867cf7 2492 mcp->mb[9] = vha->vp_idx;
1c7c6357 2493 mcp->mb[10] = 0;
43ef0580 2494 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1c7c6357 2495 mcp->in_mb = MBX_2|MBX_1|MBX_0;
b93480e3 2496 mcp->tov = MBX_TOV_SECONDS;
1c7c6357 2497 mcp->flags = IOCTL_CMD;
7b867cf7 2498 rval = qla2x00_mailbox_command(vha, mcp);
1c7c6357
AV		 2499
2500 if (rval == QLA_SUCCESS) {
2501 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 2502 ql_dbg(ql_dbg_mbx, vha, 0x1089,
2503 "Failed mb[0]=%x.\n", mcp->mb[0]);
43ef0580 2504 rval = QLA_FUNCTION_FAILED;
1c7c6357 2505 } else {
5f28d2d7
SK		 2506 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2507 "Done %s.\n", __func__);
1c7c6357 2508 /* Copy over data -- firmware data is LE. */
43ef0580
AV		 2509 dwords = sizeof(struct link_statistics) / 4;
2510 siter = diter = &stats->link_fail_cnt;
1c7c6357 2511 while (dwords--)
43ef0580 2512 *diter++ = le32_to_cpu(*siter++);
1c7c6357
AV		 2513 }
2514 } else {
2515 /* Failed. */
7c3df132 2516 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
1c7c6357
AV		 2517 }
2518
1c7c6357
AV		 2519 return rval;
2520}
1c7c6357
AV		 2521
2522int
2afa19a9 2523qla24xx_abort_command(srb_t *sp)
1c7c6357
AV		 2524{
2525 int rval;
1c7c6357
AV		 2526 unsigned long flags = 0;
2527
2528 struct abort_entry_24xx *abt;
2529 dma_addr_t abt_dma;
2530 uint32_t handle;
2afa19a9
AC		 2531 fc_port_t *fcport = sp->fcport;
2532 struct scsi_qla_host *vha = fcport->vha;
7b867cf7 2533 struct qla_hw_data *ha = vha->hw;
67c2e93a 2534 struct req_que *req = vha->req;
1c7c6357 2535
5f28d2d7
SK		 2536 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2537 "Entered %s.\n", __func__);
1c7c6357 2538
7b867cf7 2539 spin_lock_irqsave(&ha->hardware_lock, flags);
1c7c6357 2540 for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
7b867cf7 2541 if (req->outstanding_cmds[handle] == sp)
1c7c6357
AV		 2542 break;
2543 }
7b867cf7 2544 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1c7c6357
AV		 2545 if (handle == MAX_OUTSTANDING_COMMANDS) {
2546 /* Command not found. */
2547 return QLA_FUNCTION_FAILED;
2548 }
2549
2550 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2551 if (abt == NULL) {
7c3df132
SK		 2552 ql_log(ql_log_warn, vha, 0x108d,
2553 "Failed to allocate abort IOCB.\n");
1c7c6357
AV		 2554 return QLA_MEMORY_ALLOC_FAILED;
2555 }
2556 memset(abt, 0, sizeof(struct abort_entry_24xx));
2557
2558 abt->entry_type = ABORT_IOCB_TYPE;
2559 abt->entry_count = 1;
2afa19a9 2560 abt->handle = MAKE_HANDLE(req->id, abt->handle);
1c7c6357 2561 abt->nport_handle = cpu_to_le16(fcport->loop_id);
a74ec14f 2562 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
1c7c6357
AV		 2563 abt->port_id[0] = fcport->d_id.b.al_pa;
2564 abt->port_id[1] = fcport->d_id.b.area;
2565 abt->port_id[2] = fcport->d_id.b.domain;
c6d39e23 2566 abt->vp_index = fcport->vha->vp_idx;
73208dfd
AC		 2567
2568 abt->req_que_no = cpu_to_le16(req->id);
2569
7b867cf7 2570 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
1c7c6357 2571 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2572 ql_dbg(ql_dbg_mbx, vha, 0x108e,
2573 "Failed to issue IOCB (%x).\n", rval);
1c7c6357 2574 } else if (abt->entry_status != 0) {
7c3df132
SK		 2575 ql_dbg(ql_dbg_mbx, vha, 0x108f,
2576 "Failed to complete IOCB -- error status (%x).\n",
2577 abt->entry_status);
1c7c6357
AV		 2578 rval = QLA_FUNCTION_FAILED;
2579 } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
7c3df132
SK		 2580 ql_dbg(ql_dbg_mbx, vha, 0x1090,
2581 "Failed to complete IOCB -- completion status (%x).\n",
2582 le16_to_cpu(abt->nport_handle));
1c7c6357
AV		 2583 rval = QLA_FUNCTION_FAILED;
2584 } else {
5f28d2d7
SK		 2585 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2586 "Done %s.\n", __func__);
1c7c6357
AV		 2587 }
2588
2589 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2590
2591 return rval;
2592}
2593
2594struct tsk_mgmt_cmd {
2595 union {
2596 struct tsk_mgmt_entry tsk;
2597 struct sts_entry_24xx sts;
2598 } p;
2599};
2600
523ec773
AV		 2601static int
2602__qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2afa19a9 2603 unsigned int l, int tag)
1c7c6357 2604{
523ec773 2605 int rval, rval2;
1c7c6357 2606 struct tsk_mgmt_cmd *tsk;
9ca1d01f 2607 struct sts_entry_24xx *sts;
1c7c6357 2608 dma_addr_t tsk_dma;
7b867cf7
AC		 2609 scsi_qla_host_t *vha;
2610 struct qla_hw_data *ha;
73208dfd
AC		 2611 struct req_que *req;
2612 struct rsp_que *rsp;
1c7c6357 2613
7b867cf7
AC		 2614 vha = fcport->vha;
2615 ha = vha->hw;
2afa19a9 2616 req = vha->req;
7c3df132 2617
5f28d2d7
SK		 2618 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2619 "Entered %s.\n", __func__);
7c3df132 2620
7163ea81 2621 if (ha->flags.cpu_affinity_enabled)
68ca949c
AC		 2622 rsp = ha->rsp_q_map[tag + 1];
2623 else
2624 rsp = req->rsp;
7b867cf7 2625 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
1c7c6357 2626 if (tsk == NULL) {
7c3df132
SK		 2627 ql_log(ql_log_warn, vha, 0x1093,
2628 "Failed to allocate task management IOCB.\n");
1c7c6357
AV		 2629 return QLA_MEMORY_ALLOC_FAILED;
2630 }
2631 memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
2632
2633 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
2634 tsk->p.tsk.entry_count = 1;
2afa19a9 2635 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
1c7c6357 2636 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
00a537b8 2637 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
523ec773 2638 tsk->p.tsk.control_flags = cpu_to_le32(type);
1c7c6357
AV		 2639 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
2640 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
2641 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
c6d39e23 2642 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
523ec773
AV		 2643 if (type == TCF_LUN_RESET) {
2644 int_to_scsilun(l, &tsk->p.tsk.lun);
2645 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
2646 sizeof(tsk->p.tsk.lun));
2647 }
2c3dfe3f 2648
9ca1d01f 2649 sts = &tsk->p.sts;
7b867cf7 2650 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
1c7c6357 2651 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2652 ql_dbg(ql_dbg_mbx, vha, 0x1094,
2653 "Failed to issue %s reset IOCB (%x).\n", name, rval);
9ca1d01f 2654 } else if (sts->entry_status != 0) {
7c3df132
SK		 2655 ql_dbg(ql_dbg_mbx, vha, 0x1095,
2656 "Failed to complete IOCB -- error status (%x).\n",
2657 sts->entry_status);
1c7c6357 2658 rval = QLA_FUNCTION_FAILED;
9ca1d01f 2659 } else if (sts->comp_status !=
1c7c6357 2660 __constant_cpu_to_le16(CS_COMPLETE)) {
7c3df132
SK		 2661 ql_dbg(ql_dbg_mbx, vha, 0x1096,
2662 "Failed to complete IOCB -- completion status (%x).\n",
2663 le16_to_cpu(sts->comp_status));
9ca1d01f 2664 rval = QLA_FUNCTION_FAILED;
97dec564
AV		 2665 } else if (le16_to_cpu(sts->scsi_status) &
2666 SS_RESPONSE_INFO_LEN_VALID) {
2667 if (le32_to_cpu(sts->rsp_data_len) < 4) {
5f28d2d7 2668 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
7c3df132
SK		 2669 "Ignoring inconsistent data length -- not enough "
2670 "response info (%d).\n",
2671 le32_to_cpu(sts->rsp_data_len));
97dec564 2672 } else if (sts->data[3]) {
7c3df132
SK		 2673 ql_dbg(ql_dbg_mbx, vha, 0x1098,
2674 "Failed to complete IOCB -- response (%x).\n",
2675 sts->data[3]);
97dec564
AV		 2676 rval = QLA_FUNCTION_FAILED;
2677 }
1c7c6357
AV		 2678 }
2679
2680 /* Issue marker IOCB. */
73208dfd 2681 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
523ec773
AV		 2682 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
2683 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 2684 ql_dbg(ql_dbg_mbx, vha, 0x1099,
2685 "Failed to issue marker IOCB (%x).\n", rval2);
1c7c6357 2686 } else {
5f28d2d7
SK		 2687 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
2688 "Done %s.\n", __func__);
1c7c6357
AV		 2689 }
2690
7b867cf7 2691 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
1c7c6357
AV		 2692
2693 return rval;
2694}
2695
523ec773 2696int
2afa19a9 2697qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
523ec773 2698{
3822263e
MI		 2699 struct qla_hw_data *ha = fcport->vha->hw;
2700
2701 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2702 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
2703
2afa19a9 2704 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
523ec773
AV		 2705}
2706
2707int
2afa19a9 2708qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
523ec773 2709{
3822263e
MI		 2710 struct qla_hw_data *ha = fcport->vha->hw;
2711
2712 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2713 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
2714
2afa19a9 2715 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
523ec773
AV		 2716}
2717
1c7c6357 2718int
7b867cf7 2719qla2x00_system_error(scsi_qla_host_t *vha)
1c7c6357
AV		 2720{
2721 int rval;
2722 mbx_cmd_t mc;
2723 mbx_cmd_t *mcp = &mc;
7b867cf7 2724 struct qla_hw_data *ha = vha->hw;
1c7c6357 2725
68af0811 2726 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
1c7c6357
AV		 2727 return QLA_FUNCTION_FAILED;
2728
5f28d2d7
SK		 2729 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
2730 "Entered %s.\n", __func__);
1c7c6357
AV		 2731
2732 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
2733 mcp->out_mb = MBX_0;
2734 mcp->in_mb = MBX_0;
2735 mcp->tov = 5;
2736 mcp->flags = 0;
7b867cf7 2737 rval = qla2x00_mailbox_command(vha, mcp);
1c7c6357
AV		 2738
2739 if (rval != QLA_SUCCESS) {
7c3df132 2740 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
1c7c6357 2741 } else {
5f28d2d7
SK		 2742 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
2743 "Done %s.\n", __func__);
1c7c6357
AV		 2744 }
2745
2746 return rval;
2747}
2748
1c7c6357
AV		 2749/**
2750 * qla2x00_set_serdes_params() -
2751 * @ha: HA context
2752 *
2753 * Returns
2754 */
2755int
7b867cf7 2756qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
1c7c6357
AV		 2757 uint16_t sw_em_2g, uint16_t sw_em_4g)
2758{
2759 int rval;
2760 mbx_cmd_t mc;
2761 mbx_cmd_t *mcp = &mc;
2762
5f28d2d7
SK		 2763 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
2764 "Entered %s.\n", __func__);
1c7c6357
AV		 2765
2766 mcp->mb[0] = MBC_SERDES_PARAMS;
2767 mcp->mb[1] = BIT_0;
fdbc6833 2768 mcp->mb[2] = sw_em_1g | BIT_15;
2769 mcp->mb[3] = sw_em_2g | BIT_15;
2770 mcp->mb[4] = sw_em_4g | BIT_15;
1c7c6357
AV		 2771 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2772 mcp->in_mb = MBX_0;
b93480e3 2773 mcp->tov = MBX_TOV_SECONDS;
1c7c6357 2774 mcp->flags = 0;
7b867cf7 2775 rval = qla2x00_mailbox_command(vha, mcp);
1c7c6357
AV		 2776
2777 if (rval != QLA_SUCCESS) {
2778 /*EMPTY*/
7c3df132
SK		 2779 ql_dbg(ql_dbg_mbx, vha, 0x109f,
2780 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1c7c6357
AV		 2781 } else {
2782 /*EMPTY*/
5f28d2d7
SK		 2783 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
2784 "Done %s.\n", __func__);
1c7c6357
AV		 2785 }
2786
2787 return rval;
2788}
f6ef3b18
AV		 2789
2790int
7b867cf7 2791qla2x00_stop_firmware(scsi_qla_host_t *vha)
f6ef3b18
AV		 2792{
2793 int rval;
2794 mbx_cmd_t mc;
2795 mbx_cmd_t *mcp = &mc;
2796
7b867cf7 2797 if (!IS_FWI2_CAPABLE(vha->hw))
f6ef3b18
AV		 2798 return QLA_FUNCTION_FAILED;
2799
5f28d2d7
SK		 2800 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
2801 "Entered %s.\n", __func__);
f6ef3b18
AV		 2802
2803 mcp->mb[0] = MBC_STOP_FIRMWARE;
4ba988db
AV		 2804 mcp->mb[1] = 0;
2805 mcp->out_mb = MBX_1|MBX_0;
f6ef3b18
AV		 2806 mcp->in_mb = MBX_0;
2807 mcp->tov = 5;
2808 mcp->flags = 0;
7b867cf7 2809 rval = qla2x00_mailbox_command(vha, mcp);
f6ef3b18
AV		 2810
2811 if (rval != QLA_SUCCESS) {
7c3df132 2812 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
b469a7cb
AV		 2813 if (mcp->mb[0] == MBS_INVALID_COMMAND)
2814 rval = QLA_INVALID_COMMAND;
f6ef3b18 2815 } else {
5f28d2d7
SK		 2816 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
2817 "Done %s.\n", __func__);
f6ef3b18
AV		 2818 }
2819
2820 return rval;
2821}
a7a167bf
AV		 2822
2823int
7b867cf7 2824qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
a7a167bf
AV		 2825 uint16_t buffers)
2826{
2827 int rval;
2828 mbx_cmd_t mc;
2829 mbx_cmd_t *mcp = &mc;
2830
5f28d2d7
SK		 2831 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
2832 "Entered %s.\n", __func__);
7c3df132 2833
7b867cf7 2834 if (!IS_FWI2_CAPABLE(vha->hw))
a7a167bf
AV		 2835 return QLA_FUNCTION_FAILED;
2836
85880801
AV		 2837 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2838 return QLA_FUNCTION_FAILED;
2839
a7a167bf 2840 mcp->mb[0] = MBC_TRACE_CONTROL;
00b6bd25
AV		 2841 mcp->mb[1] = TC_EFT_ENABLE;
2842 mcp->mb[2] = LSW(eft_dma);
2843 mcp->mb[3] = MSW(eft_dma);
2844 mcp->mb[4] = LSW(MSD(eft_dma));
2845 mcp->mb[5] = MSW(MSD(eft_dma));
2846 mcp->mb[6] = buffers;
2847 mcp->mb[7] = TC_AEN_DISABLE;
2848 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
a7a167bf 2849 mcp->in_mb = MBX_1|MBX_0;
b93480e3 2850 mcp->tov = MBX_TOV_SECONDS;
a7a167bf 2851 mcp->flags = 0;
7b867cf7 2852 rval = qla2x00_mailbox_command(vha, mcp);
00b6bd25 2853 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2854 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
2855 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2856 rval, mcp->mb[0], mcp->mb[1]);
00b6bd25 2857 } else {
5f28d2d7
SK		 2858 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
2859 "Done %s.\n", __func__);
00b6bd25
AV		 2860 }
2861
2862 return rval;
2863}
a7a167bf 2864
00b6bd25 2865int
7b867cf7 2866qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
00b6bd25
AV		 2867{
2868 int rval;
2869 mbx_cmd_t mc;
2870 mbx_cmd_t *mcp = &mc;
2871
5f28d2d7
SK		 2872 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
2873 "Entered %s.\n", __func__);
7c3df132 2874
7b867cf7 2875 if (!IS_FWI2_CAPABLE(vha->hw))
00b6bd25
AV		 2876 return QLA_FUNCTION_FAILED;
2877
85880801
AV		 2878 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2879 return QLA_FUNCTION_FAILED;
2880
00b6bd25
AV		 2881 mcp->mb[0] = MBC_TRACE_CONTROL;
2882 mcp->mb[1] = TC_EFT_DISABLE;
2883 mcp->out_mb = MBX_1|MBX_0;
2884 mcp->in_mb = MBX_1|MBX_0;
b93480e3 2885 mcp->tov = MBX_TOV_SECONDS;
00b6bd25 2886 mcp->flags = 0;
7b867cf7 2887 rval = qla2x00_mailbox_command(vha, mcp);
a7a167bf 2888 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2889 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
2890 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2891 rval, mcp->mb[0], mcp->mb[1]);
a7a167bf 2892 } else {
5f28d2d7
SK		 2893 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
2894 "Done %s.\n", __func__);
a7a167bf
AV		 2895 }
2896
2897 return rval;
2898}
2899
df613b96 2900int
7b867cf7 2901qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
df613b96
AV		 2902 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
2903{
2904 int rval;
2905 mbx_cmd_t mc;
2906 mbx_cmd_t *mcp = &mc;
2907
5f28d2d7
SK		 2908 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
2909 "Entered %s.\n", __func__);
7c3df132 2910
6246b8a1
GM		 2911 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
2912 !IS_QLA83XX(vha->hw))
df613b96
AV		 2913 return QLA_FUNCTION_FAILED;
2914
85880801
AV		 2915 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2916 return QLA_FUNCTION_FAILED;
2917
df613b96
AV		 2918 mcp->mb[0] = MBC_TRACE_CONTROL;
2919 mcp->mb[1] = TC_FCE_ENABLE;
2920 mcp->mb[2] = LSW(fce_dma);
2921 mcp->mb[3] = MSW(fce_dma);
2922 mcp->mb[4] = LSW(MSD(fce_dma));
2923 mcp->mb[5] = MSW(MSD(fce_dma));
2924 mcp->mb[6] = buffers;
2925 mcp->mb[7] = TC_AEN_DISABLE;
2926 mcp->mb[8] = 0;
2927 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
2928 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
2929 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
2930 MBX_1|MBX_0;
2931 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
b93480e3 2932 mcp->tov = MBX_TOV_SECONDS;
df613b96 2933 mcp->flags = 0;
7b867cf7 2934 rval = qla2x00_mailbox_command(vha, mcp);
df613b96 2935 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2936 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
2937 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2938 rval, mcp->mb[0], mcp->mb[1]);
df613b96 2939 } else {
5f28d2d7
SK		 2940 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
2941 "Done %s.\n", __func__);
df613b96
AV		 2942
2943 if (mb)
2944 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
2945 if (dwords)
fa0926df 2946 *dwords = buffers;
df613b96
AV		 2947 }
2948
2949 return rval;
2950}
2951
2952int
7b867cf7 2953qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
df613b96
AV		 2954{
2955 int rval;
2956 mbx_cmd_t mc;
2957 mbx_cmd_t *mcp = &mc;
2958
5f28d2d7
SK		 2959 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
2960 "Entered %s.\n", __func__);
7c3df132 2961
7b867cf7 2962 if (!IS_FWI2_CAPABLE(vha->hw))
df613b96
AV		 2963 return QLA_FUNCTION_FAILED;
2964
85880801
AV		 2965 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2966 return QLA_FUNCTION_FAILED;
2967
df613b96
AV		 2968 mcp->mb[0] = MBC_TRACE_CONTROL;
2969 mcp->mb[1] = TC_FCE_DISABLE;
2970 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
2971 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2972 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
2973 MBX_1|MBX_0;
b93480e3 2974 mcp->tov = MBX_TOV_SECONDS;
df613b96 2975 mcp->flags = 0;
7b867cf7 2976 rval = qla2x00_mailbox_command(vha, mcp);
df613b96 2977 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2978 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
2979 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2980 rval, mcp->mb[0], mcp->mb[1]);
df613b96 2981 } else {
5f28d2d7
SK		 2982 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
2983 "Done %s.\n", __func__);
df613b96
AV		 2984
2985 if (wr)
2986 *wr = (uint64_t) mcp->mb[5] << 48 |
2987 (uint64_t) mcp->mb[4] << 32 |
2988 (uint64_t) mcp->mb[3] << 16 |
2989 (uint64_t) mcp->mb[2];
2990 if (rd)
2991 *rd = (uint64_t) mcp->mb[9] << 48 |
2992 (uint64_t) mcp->mb[8] << 32 |
2993 (uint64_t) mcp->mb[7] << 16 |
2994 (uint64_t) mcp->mb[6];
2995 }
2996
2997 return rval;
2998}
2999
6e98016c
GM		 3000int
3001qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3002 uint16_t *port_speed, uint16_t *mb)
3003{
3004 int rval;
3005 mbx_cmd_t mc;
3006 mbx_cmd_t *mcp = &mc;
3007
5f28d2d7
SK		 3008 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3009 "Entered %s.\n", __func__);
7c3df132 3010
6e98016c
GM		 3011 if (!IS_IIDMA_CAPABLE(vha->hw))
3012 return QLA_FUNCTION_FAILED;
3013
6e98016c
GM		 3014 mcp->mb[0] = MBC_PORT_PARAMS;
3015 mcp->mb[1] = loop_id;
3016 mcp->mb[2] = mcp->mb[3] = 0;
3017 mcp->mb[9] = vha->vp_idx;
3018 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3019 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3020 mcp->tov = MBX_TOV_SECONDS;
3021 mcp->flags = 0;
3022 rval = qla2x00_mailbox_command(vha, mcp);
3023
3024 /* Return mailbox statuses. */
3025 if (mb != NULL) {
3026 mb[0] = mcp->mb[0];
3027 mb[1] = mcp->mb[1];
3028 mb[3] = mcp->mb[3];
3029 }
3030
3031 if (rval != QLA_SUCCESS) {
7c3df132 3032 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
6e98016c 3033 } else {
5f28d2d7
SK		 3034 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3035 "Done %s.\n", __func__);
6e98016c
GM		 3036 if (port_speed)
3037 *port_speed = mcp->mb[3];
3038 }
3039
3040 return rval;
3041}
3042
d8b45213 3043int
7b867cf7 3044qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
d8b45213
AV		 3045 uint16_t port_speed, uint16_t *mb)
3046{
3047 int rval;
3048 mbx_cmd_t mc;
3049 mbx_cmd_t *mcp = &mc;
3050
5f28d2d7
SK		 3051 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3052 "Entered %s.\n", __func__);
7c3df132 3053
7b867cf7 3054 if (!IS_IIDMA_CAPABLE(vha->hw))
d8b45213
AV		 3055 return QLA_FUNCTION_FAILED;
3056
d8b45213
AV		 3057 mcp->mb[0] = MBC_PORT_PARAMS;
3058 mcp->mb[1] = loop_id;
3059 mcp->mb[2] = BIT_0;
6246b8a1 3060 if (IS_CNA_CAPABLE(vha->hw))
1bb39548
HZ		 3061 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3062 else
3063 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3064 mcp->mb[9] = vha->vp_idx;
3065 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3066 mcp->in_mb = MBX_3|MBX_1|MBX_0;
b93480e3 3067 mcp->tov = MBX_TOV_SECONDS;
d8b45213 3068 mcp->flags = 0;
7b867cf7 3069 rval = qla2x00_mailbox_command(vha, mcp);
d8b45213
AV		 3070
3071 /* Return mailbox statuses. */
3072 if (mb != NULL) {
3073 mb[0] = mcp->mb[0];
3074 mb[1] = mcp->mb[1];
3075 mb[3] = mcp->mb[3];
d8b45213
AV		 3076 }
3077
3078 if (rval != QLA_SUCCESS) {
5f28d2d7
SK		 3079 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3080 "Failed=%x.\n", rval);
d8b45213 3081 } else {
5f28d2d7
SK		 3082 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3083 "Done %s.\n", __func__);
d8b45213
AV		 3084 }
3085
3086 return rval;
3087}
2c3dfe3f 3088
2c3dfe3f 3089void
7b867cf7 3090qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
2c3dfe3f
SJ		 3091 struct vp_rpt_id_entry_24xx *rptid_entry)
3092{
3093 uint8_t vp_idx;
c6852c4c 3094 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
7b867cf7
AC		 3095 struct qla_hw_data *ha = vha->hw;
3096 scsi_qla_host_t *vp;
feafb7b1 3097 unsigned long flags;
2c3dfe3f 3098
5f28d2d7
SK		 3099 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3100 "Entered %s.\n", __func__);
7c3df132 3101
2c3dfe3f
SJ		 3102 if (rptid_entry->entry_status != 0)
3103 return;
2c3dfe3f
SJ		 3104
3105 if (rptid_entry->format == 0) {
5f28d2d7 3106 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
7c3df132
SK		 3107 "Format 0 : Number of VPs setup %d, number of "
3108 "VPs acquired %d.\n",
3109 MSB(le16_to_cpu(rptid_entry->vp_count)),
3110 LSB(le16_to_cpu(rptid_entry->vp_count)));
5f28d2d7 3111 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
7c3df132
SK		 3112 "Primary port id %02x%02x%02x.\n",
3113 rptid_entry->port_id[2], rptid_entry->port_id[1],
3114 rptid_entry->port_id[0]);
2c3dfe3f 3115 } else if (rptid_entry->format == 1) {
c6852c4c 3116 vp_idx = LSB(stat);
5f28d2d7 3117 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
7c3df132
SK		 3118 "Format 1: VP[%d] enabled - status %d - with "
3119 "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
2c3dfe3f 3120 rptid_entry->port_id[2], rptid_entry->port_id[1],
7c3df132 3121 rptid_entry->port_id[0]);
531a82d1
AV		 3122
3123 vp = vha;
3124 if (vp_idx == 0 && (MSB(stat) != 1))
3125 goto reg_needed;
2c3dfe3f 3126
882a917b 3127 if (MSB(stat) != 0) {
7c3df132
SK		 3128 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3129 "Could not acquire ID for VP[%d].\n", vp_idx);
2c3dfe3f 3130 return;
81eb9b49 3131 }
2c3dfe3f 3132
feafb7b1
AE		 3133 spin_lock_irqsave(&ha->vport_slock, flags);
3134 list_for_each_entry(vp, &ha->vp_list, list)
7b867cf7 3135 if (vp_idx == vp->vp_idx)
2c3dfe3f 3136 break;
feafb7b1
AE		 3137 spin_unlock_irqrestore(&ha->vport_slock, flags);
3138
7b867cf7 3139 if (!vp)
2c3dfe3f
SJ		 3140 return;
3141
7b867cf7
AC		 3142 vp->d_id.b.domain = rptid_entry->port_id[2];
3143 vp->d_id.b.area = rptid_entry->port_id[1];
3144 vp->d_id.b.al_pa = rptid_entry->port_id[0];
2c3dfe3f
SJ		 3145
3146 /*
3147 * Cannot configure here as we are still sitting on the
3148 * response queue. Handle it in dpc context.
3149 */
7b867cf7 3150 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
2c3dfe3f 3151
531a82d1
AV		 3152reg_needed:
3153 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3154 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3155 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
7b867cf7 3156 qla2xxx_wake_dpc(vha);
2c3dfe3f
SJ		 3157 }
3158}
3159
3160/*
3161 * qla24xx_modify_vp_config
3162 * Change VP configuration for vha
3163 *
3164 * Input:
3165 * vha = adapter block pointer.
3166 *
3167 * Returns:
3168 * qla2xxx local function return status code.
3169 *
3170 * Context:
3171 * Kernel context.
3172 */
3173int
3174qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3175{
3176 int rval;
3177 struct vp_config_entry_24xx *vpmod;
3178 dma_addr_t vpmod_dma;
7b867cf7
AC		 3179 struct qla_hw_data *ha = vha->hw;
3180 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2c3dfe3f
SJ		 3181
3182 /* This can be called by the parent */
2c3dfe3f 3183
5f28d2d7
SK		 3184 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3185 "Entered %s.\n", __func__);
7c3df132 3186
7b867cf7 3187 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
2c3dfe3f 3188 if (!vpmod) {
7c3df132
SK		 3189 ql_log(ql_log_warn, vha, 0x10bc,
3190 "Failed to allocate modify VP IOCB.\n");
2c3dfe3f
SJ		 3191 return QLA_MEMORY_ALLOC_FAILED;
3192 }
3193
3194 memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3195 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3196 vpmod->entry_count = 1;
3197 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3198 vpmod->vp_count = 1;
3199 vpmod->vp_index1 = vha->vp_idx;
3200 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
2d70c103
NB		 3201
3202 qlt_modify_vp_config(vha, vpmod);
3203
2c3dfe3f
SJ		 3204 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3205 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3206 vpmod->entry_count = 1;
3207
7b867cf7 3208 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
2c3dfe3f 3209 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3210 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3211 "Failed to issue VP config IOCB (%x).\n", rval);
2c3dfe3f 3212 } else if (vpmod->comp_status != 0) {
7c3df132
SK		 3213 ql_dbg(ql_dbg_mbx, vha, 0x10be,
3214 "Failed to complete IOCB -- error status (%x).\n",
3215 vpmod->comp_status);
2c3dfe3f
SJ		 3216 rval = QLA_FUNCTION_FAILED;
3217 } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
7c3df132
SK		 3218 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3219 "Failed to complete IOCB -- completion status (%x).\n",
3220 le16_to_cpu(vpmod->comp_status));
2c3dfe3f
SJ		 3221 rval = QLA_FUNCTION_FAILED;
3222 } else {
3223 /* EMPTY */
5f28d2d7
SK		 3224 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3225 "Done %s.\n", __func__);
2c3dfe3f
SJ		 3226 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3227 }
7b867cf7 3228 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
2c3dfe3f
SJ		 3229
3230 return rval;
3231}
3232
3233/*
3234 * qla24xx_control_vp
3235 * Enable a virtual port for given host
3236 *
3237 * Input:
3238 * ha = adapter block pointer.
3239 * vhba = virtual adapter (unused)
3240 * index = index number for enabled VP
3241 *
3242 * Returns:
3243 * qla2xxx local function return status code.
3244 *
3245 * Context:
3246 * Kernel context.
3247 */
3248int
3249qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3250{
3251 int rval;
3252 int map, pos;
3253 struct vp_ctrl_entry_24xx *vce;
3254 dma_addr_t vce_dma;
7b867cf7 3255 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 3256 int vp_index = vha->vp_idx;
7b867cf7 3257 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2c3dfe3f 3258
5f28d2d7 3259 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
7c3df132 3260 "Entered %s enabling index %d.\n", __func__, vp_index);
2c3dfe3f 3261
eb66dc60 3262 if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
2c3dfe3f
SJ		 3263 return QLA_PARAMETER_ERROR;
3264
3265 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3266 if (!vce) {
7c3df132
SK		 3267 ql_log(ql_log_warn, vha, 0x10c2,
3268 "Failed to allocate VP control IOCB.\n");
2c3dfe3f
SJ		 3269 return QLA_MEMORY_ALLOC_FAILED;
3270 }
3271 memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3272
3273 vce->entry_type = VP_CTRL_IOCB_TYPE;
3274 vce->entry_count = 1;
3275 vce->command = cpu_to_le16(cmd);
3276 vce->vp_count = __constant_cpu_to_le16(1);
3277
3278 /* index map in firmware starts with 1; decrement index
3279 * this is ok as we never use index 0
3280 */
3281 map = (vp_index - 1) / 8;
3282 pos = (vp_index - 1) & 7;
6c2f527c 3283 mutex_lock(&ha->vport_lock);
2c3dfe3f 3284 vce->vp_idx_map[map] |= 1 << pos;
6c2f527c 3285 mutex_unlock(&ha->vport_lock);
2c3dfe3f 3286
7b867cf7 3287 rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
2c3dfe3f 3288 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3289 ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3290 "Failed to issue VP control IOCB (%x).\n", rval);
2c3dfe3f 3291 } else if (vce->entry_status != 0) {
7c3df132
SK		 3292 ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3293 "Failed to complete IOCB -- error status (%x).\n",
2c3dfe3f
SJ		 3294 vce->entry_status);
3295 rval = QLA_FUNCTION_FAILED;
3296 } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
7c3df132
SK		 3297 ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3298 "Failed to complet IOCB -- completion status (%x).\n",
2c3dfe3f
SJ		 3299 le16_to_cpu(vce->comp_status));
3300 rval = QLA_FUNCTION_FAILED;
3301 } else {
5f28d2d7
SK		 3302 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3303 "Done %s.\n", __func__);
2c3dfe3f
SJ		 3304 }
3305
3306 dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3307
3308 return rval;
3309}
3310
3311/*
3312 * qla2x00_send_change_request
3313 * Receive or disable RSCN request from fabric controller
3314 *
3315 * Input:
3316 * ha = adapter block pointer
3317 * format = registration format:
3318 * 0 - Reserved
3319 * 1 - Fabric detected registration
3320 * 2 - N_port detected registration
3321 * 3 - Full registration
3322 * FF - clear registration
3323 * vp_idx = Virtual port index
3324 *
3325 * Returns:
3326 * qla2x00 local function return status code.
3327 *
3328 * Context:
3329 * Kernel Context
3330 */
3331
3332int
7b867cf7 3333qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
2c3dfe3f
SJ		 3334 uint16_t vp_idx)
3335{
3336 int rval;
3337 mbx_cmd_t mc;
3338 mbx_cmd_t *mcp = &mc;
3339
5f28d2d7
SK		 3340 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3341 "Entered %s.\n", __func__);
7c3df132 3342
2c3dfe3f
SJ		 3343 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3344 mcp->mb[1] = format;
3345 mcp->mb[9] = vp_idx;
3346 mcp->out_mb = MBX_9|MBX_1|MBX_0;
3347 mcp->in_mb = MBX_0|MBX_1;
3348 mcp->tov = MBX_TOV_SECONDS;
3349 mcp->flags = 0;
7b867cf7 3350 rval = qla2x00_mailbox_command(vha, mcp);
2c3dfe3f
SJ		 3351
3352 if (rval == QLA_SUCCESS) {
3353 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3354 rval = BIT_1;
3355 }
3356 } else
3357 rval = BIT_1;
3358
3359 return rval;
3360}
338c9161
AV		 3361
3362int
7b867cf7 3363qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
338c9161
AV		 3364 uint32_t size)
3365{
3366 int rval;
3367 mbx_cmd_t mc;
3368 mbx_cmd_t *mcp = &mc;
3369
5f28d2d7
SK		 3370 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3371 "Entered %s.\n", __func__);
338c9161 3372
7b867cf7 3373 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
338c9161
AV		 3374 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3375 mcp->mb[8] = MSW(addr);
3376 mcp->out_mb = MBX_8|MBX_0;
3377 } else {
3378 mcp->mb[0] = MBC_DUMP_RISC_RAM;
3379 mcp->out_mb = MBX_0;
3380 }
3381 mcp->mb[1] = LSW(addr);
3382 mcp->mb[2] = MSW(req_dma);
3383 mcp->mb[3] = LSW(req_dma);
3384 mcp->mb[6] = MSW(MSD(req_dma));
3385 mcp->mb[7] = LSW(MSD(req_dma));
3386 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
7b867cf7 3387 if (IS_FWI2_CAPABLE(vha->hw)) {
338c9161
AV		 3388 mcp->mb[4] = MSW(size);
3389 mcp->mb[5] = LSW(size);
3390 mcp->out_mb |= MBX_5|MBX_4;
3391 } else {
3392 mcp->mb[4] = LSW(size);
3393 mcp->out_mb |= MBX_4;
3394 }
3395
3396 mcp->in_mb = MBX_0;
b93480e3 3397 mcp->tov = MBX_TOV_SECONDS;
338c9161 3398 mcp->flags = 0;
7b867cf7 3399 rval = qla2x00_mailbox_command(vha, mcp);
338c9161
AV		 3400
3401 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3402 ql_dbg(ql_dbg_mbx, vha, 0x1008,
3403 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
338c9161 3404 } else {
5f28d2d7
SK		 3405 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3406 "Done %s.\n", __func__);
338c9161
AV		 3407 }
3408
3409 return rval;
3410}
4d4df193
HK		 3411
3412/* 84XX Support **************************************************************/
3413
3414struct cs84xx_mgmt_cmd {
3415 union {
3416 struct verify_chip_entry_84xx req;
3417 struct verify_chip_rsp_84xx rsp;
3418 } p;
3419};
3420
3421int
7b867cf7 3422qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
4d4df193
HK		 3423{
3424 int rval, retry;
3425 struct cs84xx_mgmt_cmd *mn;
3426 dma_addr_t mn_dma;
3427 uint16_t options;
3428 unsigned long flags;
7b867cf7 3429 struct qla_hw_data *ha = vha->hw;
4d4df193 3430
5f28d2d7
SK		 3431 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3432 "Entered %s.\n", __func__);
4d4df193
HK		 3433
3434 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3435 if (mn == NULL) {
4d4df193
HK		 3436 return QLA_MEMORY_ALLOC_FAILED;
3437 }
3438
3439 /* Force Update? */
3440 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3441 /* Diagnostic firmware? */
3442 /* options |= MENLO_DIAG_FW; */
3443 /* We update the firmware with only one data sequence. */
3444 options |= VCO_END_OF_DATA;
3445
4d4df193 3446 do {
c1ec1f1b 3447 retry = 0;
4d4df193
HK		 3448 memset(mn, 0, sizeof(*mn));
3449 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3450 mn->p.req.entry_count = 1;
3451 mn->p.req.options = cpu_to_le16(options);
3452
7c3df132
SK		 3453 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3454 "Dump of Verify Request.\n");
3455 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3456 (uint8_t *)mn, sizeof(*mn));
4d4df193 3457
7b867cf7 3458 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
4d4df193 3459 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3460 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
3461 "Failed to issue verify IOCB (%x).\n", rval);
4d4df193
HK		 3462 goto verify_done;
3463 }
3464
7c3df132
SK		 3465 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
3466 "Dump of Verify Response.\n");
3467 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
3468 (uint8_t *)mn, sizeof(*mn));
4d4df193
HK		 3469
3470 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
3471 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
3472 le16_to_cpu(mn->p.rsp.failure_code) : 0;
5f28d2d7 3473 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
7c3df132 3474 "cs=%x fc=%x.\n", status[0], status[1]);
4d4df193
HK		 3475
3476 if (status[0] != CS_COMPLETE) {
3477 rval = QLA_FUNCTION_FAILED;
3478 if (!(options & VCO_DONT_UPDATE_FW)) {
7c3df132
SK		 3479 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
3480 "Firmware update failed. Retrying "
3481 "without update firmware.\n");
4d4df193
HK		 3482 options |= VCO_DONT_UPDATE_FW;
3483 options &= ~VCO_FORCE_UPDATE;
3484 retry = 1;
3485 }
3486 } else {
5f28d2d7 3487 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
7c3df132
SK		 3488 "Firmware updated to %x.\n",
3489 le32_to_cpu(mn->p.rsp.fw_ver));
4d4df193
HK		 3490
3491 /* NOTE: we only update OP firmware. */
3492 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
3493 ha->cs84xx->op_fw_version =
3494 le32_to_cpu(mn->p.rsp.fw_ver);
3495 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
3496 flags);
3497 }
3498 } while (retry);
3499
3500verify_done:
3501 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
3502
3503 if (rval != QLA_SUCCESS) {
5f28d2d7
SK		 3504 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
3505 "Failed=%x.\n", rval);
4d4df193 3506 } else {
5f28d2d7
SK		 3507 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
3508 "Done %s.\n", __func__);
4d4df193
HK		 3509 }
3510
3511 return rval;
3512}
73208dfd
AC		 3513
3514int
618a7523 3515qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
73208dfd
AC		 3516{
3517 int rval;
3518 unsigned long flags;
3519 mbx_cmd_t mc;
3520 mbx_cmd_t *mcp = &mc;
3521 struct device_reg_25xxmq __iomem *reg;
3522 struct qla_hw_data *ha = vha->hw;
3523
5f28d2d7
SK		 3524 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
3525 "Entered %s.\n", __func__);
7c3df132 3526
73208dfd 3527 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
618a7523 3528 mcp->mb[1] = req->options;
73208dfd
AC		 3529 mcp->mb[2] = MSW(LSD(req->dma));
3530 mcp->mb[3] = LSW(LSD(req->dma));
3531 mcp->mb[6] = MSW(MSD(req->dma));
3532 mcp->mb[7] = LSW(MSD(req->dma));
3533 mcp->mb[5] = req->length;
3534 if (req->rsp)
3535 mcp->mb[10] = req->rsp->id;
3536 mcp->mb[12] = req->qos;
3537 mcp->mb[11] = req->vp_idx;
3538 mcp->mb[13] = req->rid;
6246b8a1
GM		 3539 if (IS_QLA83XX(ha))
3540 mcp->mb[15] = 0;
73208dfd
AC		 3541
3542 reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
3543 QLA_QUE_PAGE * req->id);
3544
3545 mcp->mb[4] = req->id;
3546 /* que in ptr index */
3547 mcp->mb[8] = 0;
3548 /* que out ptr index */
3549 mcp->mb[9] = 0;
3550 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
3551 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3552 mcp->in_mb = MBX_0;
3553 mcp->flags = MBX_DMA_OUT;
6246b8a1
GM		 3554 mcp->tov = MBX_TOV_SECONDS * 2;
3555
3556 if (IS_QLA81XX(ha) || IS_QLA83XX(ha))
3557 mcp->in_mb |= MBX_1;
3558 if (IS_QLA83XX(ha)) {
3559 mcp->out_mb |= MBX_15;
3560 /* debug q create issue in SR-IOV */
3561 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3562 }
73208dfd
AC		 3563
3564 spin_lock_irqsave(&ha->hardware_lock, flags);
618a7523 3565 if (!(req->options & BIT_0)) {
73208dfd 3566 WRT_REG_DWORD(&reg->req_q_in, 0);
6246b8a1
GM		 3567 if (!IS_QLA83XX(ha))
3568 WRT_REG_DWORD(&reg->req_q_out, 0);
73208dfd 3569 }
2afa19a9
AC		 3570 req->req_q_in = &reg->req_q_in;
3571 req->req_q_out = &reg->req_q_out;
73208dfd
AC		 3572 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3573
17d98630 3574 rval = qla2x00_mailbox_command(vha, mcp);
7c3df132
SK		 3575 if (rval != QLA_SUCCESS) {
3576 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
3577 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3578 } else {
5f28d2d7
SK		 3579 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
3580 "Done %s.\n", __func__);
7c3df132
SK		 3581 }
3582
73208dfd
AC		 3583 return rval;
3584}
3585
3586int
618a7523 3587qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
73208dfd
AC		 3588{
3589 int rval;
3590 unsigned long flags;
3591 mbx_cmd_t mc;
3592 mbx_cmd_t *mcp = &mc;
3593 struct device_reg_25xxmq __iomem *reg;
3594 struct qla_hw_data *ha = vha->hw;
3595
5f28d2d7
SK		 3596 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
3597 "Entered %s.\n", __func__);
7c3df132 3598
73208dfd 3599 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
618a7523 3600 mcp->mb[1] = rsp->options;
73208dfd
AC		 3601 mcp->mb[2] = MSW(LSD(rsp->dma));
3602 mcp->mb[3] = LSW(LSD(rsp->dma));
3603 mcp->mb[6] = MSW(MSD(rsp->dma));
3604 mcp->mb[7] = LSW(MSD(rsp->dma));
3605 mcp->mb[5] = rsp->length;
444786d7 3606 mcp->mb[14] = rsp->msix->entry;
73208dfd 3607 mcp->mb[13] = rsp->rid;
6246b8a1
GM		 3608 if (IS_QLA83XX(ha))
3609 mcp->mb[15] = 0;
73208dfd
AC		 3610
3611 reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
3612 QLA_QUE_PAGE * rsp->id);
3613
3614 mcp->mb[4] = rsp->id;
3615 /* que in ptr index */
3616 mcp->mb[8] = 0;
3617 /* que out ptr index */
3618 mcp->mb[9] = 0;
2afa19a9 3619 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
73208dfd
AC		 3620 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3621 mcp->in_mb = MBX_0;
3622 mcp->flags = MBX_DMA_OUT;
6246b8a1
GM		 3623 mcp->tov = MBX_TOV_SECONDS * 2;
3624
3625 if (IS_QLA81XX(ha)) {
3626 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
3627 mcp->in_mb |= MBX_1;
3628 } else if (IS_QLA83XX(ha)) {
3629 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
3630 mcp->in_mb |= MBX_1;
3631 /* debug q create issue in SR-IOV */
3632 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3633 }
73208dfd
AC		 3634
3635 spin_lock_irqsave(&ha->hardware_lock, flags);
618a7523 3636 if (!(rsp->options & BIT_0)) {
73208dfd 3637 WRT_REG_DWORD(&reg->rsp_q_out, 0);
6246b8a1
GM		 3638 if (!IS_QLA83XX(ha))
3639 WRT_REG_DWORD(&reg->rsp_q_in, 0);
73208dfd
AC		 3640 }
3641
3642 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3643
17d98630 3644 rval = qla2x00_mailbox_command(vha, mcp);
7c3df132
SK		 3645 if (rval != QLA_SUCCESS) {
3646 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
3647 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3648 } else {
5f28d2d7
SK		 3649 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
3650 "Done %s.\n", __func__);
7c3df132
SK		 3651 }
3652
73208dfd
AC		 3653 return rval;
3654}
3655
8a659571
AV		 3656int
3657qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
3658{
3659 int rval;
3660 mbx_cmd_t mc;
3661 mbx_cmd_t *mcp = &mc;
3662
5f28d2d7
SK		 3663 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
3664 "Entered %s.\n", __func__);
8a659571
AV		 3665
3666 mcp->mb[0] = MBC_IDC_ACK;
3667 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3668 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3669 mcp->in_mb = MBX_0;
3670 mcp->tov = MBX_TOV_SECONDS;
3671 mcp->flags = 0;
3672 rval = qla2x00_mailbox_command(vha, mcp);
3673
3674 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3675 ql_dbg(ql_dbg_mbx, vha, 0x10da,
3676 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
8a659571 3677 } else {
5f28d2d7
SK		 3678 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
3679 "Done %s.\n", __func__);
8a659571
AV		 3680 }
3681
3682 return rval;
3683}
1d2874de
JC		 3684
3685int
3686qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
3687{
3688 int rval;
3689 mbx_cmd_t mc;
3690 mbx_cmd_t *mcp = &mc;
3691
5f28d2d7
SK		 3692 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
3693 "Entered %s.\n", __func__);
7c3df132 3694
6246b8a1 3695 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
1d2874de
JC		 3696 return QLA_FUNCTION_FAILED;
3697
1d2874de
JC		 3698 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3699 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
3700 mcp->out_mb = MBX_1|MBX_0;
3701 mcp->in_mb = MBX_1|MBX_0;
3702 mcp->tov = MBX_TOV_SECONDS;
3703 mcp->flags = 0;
3704 rval = qla2x00_mailbox_command(vha, mcp);
3705
3706 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3707 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
3708 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3709 rval, mcp->mb[0], mcp->mb[1]);
1d2874de 3710 } else {
5f28d2d7
SK		 3711 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
3712 "Done %s.\n", __func__);
1d2874de
JC		 3713 *sector_size = mcp->mb[1];
3714 }
3715
3716 return rval;
3717}
3718
3719int
3720qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
3721{
3722 int rval;
3723 mbx_cmd_t mc;
3724 mbx_cmd_t *mcp = &mc;
3725
6246b8a1 3726 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
1d2874de
JC		 3727 return QLA_FUNCTION_FAILED;
3728
5f28d2d7
SK		 3729 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
3730 "Entered %s.\n", __func__);
1d2874de
JC		 3731
3732 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3733 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
3734 FAC_OPT_CMD_WRITE_PROTECT;
3735 mcp->out_mb = MBX_1|MBX_0;
3736 mcp->in_mb = MBX_1|MBX_0;
3737 mcp->tov = MBX_TOV_SECONDS;
3738 mcp->flags = 0;
3739 rval = qla2x00_mailbox_command(vha, mcp);
3740
3741 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3742 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
3743 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3744 rval, mcp->mb[0], mcp->mb[1]);
1d2874de 3745 } else {
5f28d2d7
SK		 3746 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
3747 "Done %s.\n", __func__);
1d2874de
JC		 3748 }
3749
3750 return rval;
3751}
3752
3753int
3754qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
3755{
3756 int rval;
3757 mbx_cmd_t mc;
3758 mbx_cmd_t *mcp = &mc;
3759
6246b8a1 3760 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
1d2874de
JC		 3761 return QLA_FUNCTION_FAILED;
3762
5f28d2d7
SK		 3763 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
3764 "Entered %s.\n", __func__);
1d2874de
JC		 3765
3766 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3767 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
3768 mcp->mb[2] = LSW(start);
3769 mcp->mb[3] = MSW(start);
3770 mcp->mb[4] = LSW(finish);
3771 mcp->mb[5] = MSW(finish);
3772 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3773 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3774 mcp->tov = MBX_TOV_SECONDS;
3775 mcp->flags = 0;
3776 rval = qla2x00_mailbox_command(vha, mcp);
3777
3778 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3779 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
3780 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
3781 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
1d2874de 3782 } else {
5f28d2d7
SK		 3783 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
3784 "Done %s.\n", __func__);
1d2874de
JC		 3785 }
3786
3787 return rval;
3788}
6e181be5
LC		 3789
3790int
3791qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
3792{
3793 int rval = 0;
3794 mbx_cmd_t mc;
3795 mbx_cmd_t *mcp = &mc;
3796
5f28d2d7
SK		 3797 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
3798 "Entered %s.\n", __func__);
6e181be5
LC		 3799
3800 mcp->mb[0] = MBC_RESTART_MPI_FW;
3801 mcp->out_mb = MBX_0;
3802 mcp->in_mb = MBX_0|MBX_1;
3803 mcp->tov = MBX_TOV_SECONDS;
3804 mcp->flags = 0;
3805 rval = qla2x00_mailbox_command(vha, mcp);
3806
3807 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3808 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
3809 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3810 rval, mcp->mb[0], mcp->mb[1]);
6e181be5 3811 } else {
5f28d2d7
SK		 3812 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
3813 "Done %s.\n", __func__);
6e181be5
LC		 3814 }
3815
3816 return rval;
3817}
ad0ecd61
JC		 3818
3819int
6766df9e
JC		 3820qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
3821 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
ad0ecd61
JC		 3822{
3823 int rval;
3824 mbx_cmd_t mc;
3825 mbx_cmd_t *mcp = &mc;
6766df9e
JC		 3826 struct qla_hw_data *ha = vha->hw;
3827
5f28d2d7
SK		 3828 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
3829 "Entered %s.\n", __func__);
7c3df132 3830
6766df9e
JC		 3831 if (!IS_FWI2_CAPABLE(ha))
3832 return QLA_FUNCTION_FAILED;
ad0ecd61 3833
6766df9e
JC		 3834 if (len == 1)
3835 opt |= BIT_0;
3836
ad0ecd61
JC		 3837 mcp->mb[0] = MBC_READ_SFP;
3838 mcp->mb[1] = dev;
3839 mcp->mb[2] = MSW(sfp_dma);
3840 mcp->mb[3] = LSW(sfp_dma);
3841 mcp->mb[6] = MSW(MSD(sfp_dma));
3842 mcp->mb[7] = LSW(MSD(sfp_dma));
3843 mcp->mb[8] = len;
6766df9e 3844 mcp->mb[9] = off;
ad0ecd61
JC		 3845 mcp->mb[10] = opt;
3846 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1bff6cc8 3847 mcp->in_mb = MBX_1|MBX_0;
ad0ecd61
JC		 3848 mcp->tov = MBX_TOV_SECONDS;
3849 mcp->flags = 0;
3850 rval = qla2x00_mailbox_command(vha, mcp);
3851
3852 if (opt & BIT_0)
6766df9e 3853 *sfp = mcp->mb[1];
ad0ecd61
JC		 3854
3855 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3856 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
3857 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
ad0ecd61 3858 } else {
5f28d2d7
SK		 3859 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
3860 "Done %s.\n", __func__);
ad0ecd61
JC		 3861 }
3862
3863 return rval;
3864}
3865
3866int
6766df9e
JC		 3867qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
3868 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
ad0ecd61
JC		 3869{
3870 int rval;
3871 mbx_cmd_t mc;
3872 mbx_cmd_t *mcp = &mc;
6766df9e
JC		 3873 struct qla_hw_data *ha = vha->hw;
3874
5f28d2d7
SK		 3875 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
3876 "Entered %s.\n", __func__);
7c3df132 3877
6766df9e
JC		 3878 if (!IS_FWI2_CAPABLE(ha))
3879 return QLA_FUNCTION_FAILED;
ad0ecd61 3880
6766df9e
JC		 3881 if (len == 1)
3882 opt |= BIT_0;
3883
ad0ecd61 3884 if (opt & BIT_0)
6766df9e 3885 len = *sfp;
ad0ecd61
JC		 3886
3887 mcp->mb[0] = MBC_WRITE_SFP;
3888 mcp->mb[1] = dev;
3889 mcp->mb[2] = MSW(sfp_dma);
3890 mcp->mb[3] = LSW(sfp_dma);
3891 mcp->mb[6] = MSW(MSD(sfp_dma));
3892 mcp->mb[7] = LSW(MSD(sfp_dma));
3893 mcp->mb[8] = len;
6766df9e 3894 mcp->mb[9] = off;
ad0ecd61
JC		 3895 mcp->mb[10] = opt;
3896 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
6766df9e 3897 mcp->in_mb = MBX_1|MBX_0;
ad0ecd61
JC		 3898 mcp->tov = MBX_TOV_SECONDS;
3899 mcp->flags = 0;
3900 rval = qla2x00_mailbox_command(vha, mcp);
3901
3902 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3903 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
3904 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
ad0ecd61 3905 } else {
5f28d2d7
SK		 3906 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
3907 "Done %s.\n", __func__);
ad0ecd61
JC		 3908 }
3909
3910 return rval;
3911}
ce0423f4
AV		 3912
3913int
3914qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
3915 uint16_t size_in_bytes, uint16_t *actual_size)
3916{
3917 int rval;
3918 mbx_cmd_t mc;
3919 mbx_cmd_t *mcp = &mc;
3920
5f28d2d7
SK		 3921 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
3922 "Entered %s.\n", __func__);
7c3df132 3923
6246b8a1 3924 if (!IS_CNA_CAPABLE(vha->hw))
ce0423f4
AV		 3925 return QLA_FUNCTION_FAILED;
3926
ce0423f4
AV		 3927 mcp->mb[0] = MBC_GET_XGMAC_STATS;
3928 mcp->mb[2] = MSW(stats_dma);
3929 mcp->mb[3] = LSW(stats_dma);
3930 mcp->mb[6] = MSW(MSD(stats_dma));
3931 mcp->mb[7] = LSW(MSD(stats_dma));
3932 mcp->mb[8] = size_in_bytes >> 2;
3933 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
3934 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3935 mcp->tov = MBX_TOV_SECONDS;
3936 mcp->flags = 0;
3937 rval = qla2x00_mailbox_command(vha, mcp);
3938
3939 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3940 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
3941 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
3942 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
ce0423f4 3943 } else {
5f28d2d7
SK		 3944 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
3945 "Done %s.\n", __func__);
7c3df132 3946
ce0423f4
AV		 3947
3948 *actual_size = mcp->mb[2] << 2;
3949 }
3950
3951 return rval;
3952}
11bbc1d8
AV		 3953
3954int
3955qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
3956 uint16_t size)
3957{
3958 int rval;
3959 mbx_cmd_t mc;
3960 mbx_cmd_t *mcp = &mc;
3961
5f28d2d7
SK		 3962 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
3963 "Entered %s.\n", __func__);
7c3df132 3964
6246b8a1 3965 if (!IS_CNA_CAPABLE(vha->hw))
11bbc1d8
AV		 3966 return QLA_FUNCTION_FAILED;
3967
11bbc1d8
AV		 3968 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
3969 mcp->mb[1] = 0;
3970 mcp->mb[2] = MSW(tlv_dma);
3971 mcp->mb[3] = LSW(tlv_dma);
3972 mcp->mb[6] = MSW(MSD(tlv_dma));
3973 mcp->mb[7] = LSW(MSD(tlv_dma));
3974 mcp->mb[8] = size;
3975 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
3976 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3977 mcp->tov = MBX_TOV_SECONDS;
3978 mcp->flags = 0;
3979 rval = qla2x00_mailbox_command(vha, mcp);
3980
3981 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3982 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
3983 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
3984 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
11bbc1d8 3985 } else {
5f28d2d7
SK		 3986 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
3987 "Done %s.\n", __func__);
11bbc1d8
AV		 3988 }
3989
3990 return rval;
3991}
18e7555a
AV		 3992
3993int
3994qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
3995{
3996 int rval;
3997 mbx_cmd_t mc;
3998 mbx_cmd_t *mcp = &mc;
3999
5f28d2d7
SK		 4000 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4001 "Entered %s.\n", __func__);
7c3df132 4002
18e7555a
AV		 4003 if (!IS_FWI2_CAPABLE(vha->hw))
4004 return QLA_FUNCTION_FAILED;
4005
18e7555a
AV		 4006 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4007 mcp->mb[1] = LSW(risc_addr);
4008 mcp->mb[8] = MSW(risc_addr);
4009 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4010 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4011 mcp->tov = 30;
4012 mcp->flags = 0;
4013 rval = qla2x00_mailbox_command(vha, mcp);
4014 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4015 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4016 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
18e7555a 4017 } else {
5f28d2d7
SK		 4018 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4019 "Done %s.\n", __func__);
18e7555a
AV		 4020 *data = mcp->mb[3] << 16 | mcp->mb[2];
4021 }
4022
4023 return rval;
4024}
4025
9a069e19 4026int
a9083016
GM		 4027qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4028 uint16_t *mresp)
9a069e19
GM		 4029{
4030 int rval;
4031 mbx_cmd_t mc;
4032 mbx_cmd_t *mcp = &mc;
4033 uint32_t iter_cnt = 0x1;
4034
5f28d2d7
SK		 4035 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4036 "Entered %s.\n", __func__);
9a069e19
GM		 4037
4038 memset(mcp->mb, 0 , sizeof(mcp->mb));
4039 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4040 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4041
4042 /* transfer count */
4043 mcp->mb[10] = LSW(mreq->transfer_size);
4044 mcp->mb[11] = MSW(mreq->transfer_size);
4045
4046 /* send data address */
4047 mcp->mb[14] = LSW(mreq->send_dma);
4048 mcp->mb[15] = MSW(mreq->send_dma);
4049 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4050 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4051
25985edc 4052 /* receive data address */
9a069e19
GM		 4053 mcp->mb[16] = LSW(mreq->rcv_dma);
4054 mcp->mb[17] = MSW(mreq->rcv_dma);
4055 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4056 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4057
4058 /* Iteration count */
4059 mcp->mb[18] = LSW(iter_cnt);
4060 mcp->mb[19] = MSW(iter_cnt);
4061
4062 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4063 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
6246b8a1 4064 if (IS_CNA_CAPABLE(vha->hw))
9a069e19
GM		 4065 mcp->out_mb |= MBX_2;
4066 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4067
4068 mcp->buf_size = mreq->transfer_size;
4069 mcp->tov = MBX_TOV_SECONDS;
4070 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4071
4072 rval = qla2x00_mailbox_command(vha, mcp);
4073
4074 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4075 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4076 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4077 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4078 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
9a069e19 4079 } else {
5f28d2d7
SK		 4080 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4081 "Done %s.\n", __func__);
9a069e19
GM		 4082 }
4083
4084 /* Copy mailbox information */
4085 memcpy( mresp, mcp->mb, 64);
9a069e19
GM		 4086 return rval;
4087}
4088
4089int
a9083016
GM		 4090qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4091 uint16_t *mresp)
9a069e19
GM		 4092{
4093 int rval;
4094 mbx_cmd_t mc;
4095 mbx_cmd_t *mcp = &mc;
4096 struct qla_hw_data *ha = vha->hw;
4097
5f28d2d7
SK		 4098 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4099 "Entered %s.\n", __func__);
9a069e19
GM		 4100
4101 memset(mcp->mb, 0 , sizeof(mcp->mb));
4102 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4103 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
6246b8a1 4104 if (IS_CNA_CAPABLE(ha)) {
9a069e19 4105 mcp->mb[1] |= BIT_15;
a9083016
GM		 4106 mcp->mb[2] = vha->fcoe_fcf_idx;
4107 }
9a069e19
GM		 4108 mcp->mb[16] = LSW(mreq->rcv_dma);
4109 mcp->mb[17] = MSW(mreq->rcv_dma);
4110 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4111 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4112
4113 mcp->mb[10] = LSW(mreq->transfer_size);
4114
4115 mcp->mb[14] = LSW(mreq->send_dma);
4116 mcp->mb[15] = MSW(mreq->send_dma);
4117 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4118 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4119
4120 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4121 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
6246b8a1 4122 if (IS_CNA_CAPABLE(ha))
9a069e19
GM		 4123 mcp->out_mb |= MBX_2;
4124
4125 mcp->in_mb = MBX_0;
6246b8a1
GM		 4126 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4127 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
9a069e19 4128 mcp->in_mb |= MBX_1;
6246b8a1 4129 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
9a069e19
GM		 4130 mcp->in_mb |= MBX_3;
4131
4132 mcp->tov = MBX_TOV_SECONDS;
4133 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4134 mcp->buf_size = mreq->transfer_size;
4135
4136 rval = qla2x00_mailbox_command(vha, mcp);
4137
4138 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4139 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4140 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4141 rval, mcp->mb[0], mcp->mb[1]);
9a069e19 4142 } else {
5f28d2d7
SK		 4143 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4144 "Done %s.\n", __func__);
9a069e19
GM		 4145 }
4146
4147 /* Copy mailbox information */
6dbdda4d 4148 memcpy(mresp, mcp->mb, 64);
9a069e19
GM		 4149 return rval;
4150}
6dbdda4d 4151
9a069e19 4152int
7c3df132 4153qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
9a069e19
GM		 4154{
4155 int rval;
4156 mbx_cmd_t mc;
4157 mbx_cmd_t *mcp = &mc;
4158
5f28d2d7 4159 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
7c3df132 4160 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
9a069e19
GM		 4161
4162 mcp->mb[0] = MBC_ISP84XX_RESET;
4163 mcp->mb[1] = enable_diagnostic;
4164 mcp->out_mb = MBX_1|MBX_0;
4165 mcp->in_mb = MBX_1|MBX_0;
4166 mcp->tov = MBX_TOV_SECONDS;
4167 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
7c3df132 4168 rval = qla2x00_mailbox_command(vha, mcp);
9a069e19 4169
9a069e19 4170 if (rval != QLA_SUCCESS)
7c3df132 4171 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
9a069e19 4172 else
5f28d2d7
SK		 4173 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4174 "Done %s.\n", __func__);
9a069e19
GM		 4175
4176 return rval;
4177}
4178
18e7555a
AV		 4179int
4180qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4181{
4182 int rval;
4183 mbx_cmd_t mc;
4184 mbx_cmd_t *mcp = &mc;
4185
5f28d2d7
SK		 4186 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4187 "Entered %s.\n", __func__);
7c3df132 4188
18e7555a 4189 if (!IS_FWI2_CAPABLE(vha->hw))
6c452a45 4190 return QLA_FUNCTION_FAILED;
18e7555a 4191
18e7555a
AV		 4192 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4193 mcp->mb[1] = LSW(risc_addr);
4194 mcp->mb[2] = LSW(data);
4195 mcp->mb[3] = MSW(data);
4196 mcp->mb[8] = MSW(risc_addr);
4197 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4198 mcp->in_mb = MBX_0;
4199 mcp->tov = 30;
4200 mcp->flags = 0;
4201 rval = qla2x00_mailbox_command(vha, mcp);
4202 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4203 ql_dbg(ql_dbg_mbx, vha, 0x1101,
4204 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
18e7555a 4205 } else {
5f28d2d7
SK		 4206 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4207 "Done %s.\n", __func__);
18e7555a
AV		 4208 }
4209
4210 return rval;
4211}
3064ff39 4212
b1d46989
MI		 4213int
4214qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4215{
4216 int rval;
4217 uint32_t stat, timer;
4218 uint16_t mb0 = 0;
4219 struct qla_hw_data *ha = vha->hw;
4220 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4221
4222 rval = QLA_SUCCESS;
4223
5f28d2d7
SK		 4224 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4225 "Entered %s.\n", __func__);
b1d46989
MI		 4226
4227 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4228
4229 /* Write the MBC data to the registers */
4230 WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
4231 WRT_REG_WORD(&reg->mailbox1, mb[0]);
4232 WRT_REG_WORD(&reg->mailbox2, mb[1]);
4233 WRT_REG_WORD(&reg->mailbox3, mb[2]);
4234 WRT_REG_WORD(&reg->mailbox4, mb[3]);
4235
4236 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
4237
4238 /* Poll for MBC interrupt */
4239 for (timer = 6000000; timer; timer--) {
4240 /* Check for pending interrupts. */
4241 stat = RD_REG_DWORD(&reg->host_status);
4242 if (stat & HSRX_RISC_INT) {
4243 stat &= 0xff;
4244
4245 if (stat == 0x1 || stat == 0x2 ||
4246 stat == 0x10 || stat == 0x11) {
4247 set_bit(MBX_INTERRUPT,
4248 &ha->mbx_cmd_flags);
4249 mb0 = RD_REG_WORD(&reg->mailbox0);
4250 WRT_REG_DWORD(&reg->hccr,
4251 HCCRX_CLR_RISC_INT);
4252 RD_REG_DWORD(&reg->hccr);
4253 break;
4254 }
4255 }
4256 udelay(5);
4257 }
4258
4259 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4260 rval = mb0 & MBS_MASK;
4261 else
4262 rval = QLA_FUNCTION_FAILED;
4263
4264 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4265 ql_dbg(ql_dbg_mbx, vha, 0x1104,
4266 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
b1d46989 4267 } else {
5f28d2d7
SK		 4268 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4269 "Done %s.\n", __func__);
b1d46989
MI		 4270 }
4271
4272 return rval;
4273}
6246b8a1 4274
3064ff39
MH		 4275int
4276qla2x00_get_data_rate(scsi_qla_host_t *vha)
4277{
4278 int rval;
4279 mbx_cmd_t mc;
4280 mbx_cmd_t *mcp = &mc;
4281 struct qla_hw_data *ha = vha->hw;
4282
5f28d2d7
SK		 4283 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4284 "Entered %s.\n", __func__);
7c3df132 4285
3064ff39
MH		 4286 if (!IS_FWI2_CAPABLE(ha))
4287 return QLA_FUNCTION_FAILED;
4288
3064ff39
MH		 4289 mcp->mb[0] = MBC_DATA_RATE;
4290 mcp->mb[1] = 0;
4291 mcp->out_mb = MBX_1|MBX_0;
4292 mcp->in_mb = MBX_2|MBX_1|MBX_0;
6246b8a1
GM		 4293 if (IS_QLA83XX(ha))
4294 mcp->in_mb |= MBX_3;
3064ff39
MH		 4295 mcp->tov = MBX_TOV_SECONDS;
4296 mcp->flags = 0;
4297 rval = qla2x00_mailbox_command(vha, mcp);
4298 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4299 ql_dbg(ql_dbg_mbx, vha, 0x1107,
4300 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3064ff39 4301 } else {
5f28d2d7
SK		 4302 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4303 "Done %s.\n", __func__);
3064ff39
MH		 4304 if (mcp->mb[1] != 0x7)
4305 ha->link_data_rate = mcp->mb[1];
4306 }
4307
4308 return rval;
4309}
09ff701a 4310
23f2ebd1
SR		 4311int
4312qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4313{
4314 int rval;
4315 mbx_cmd_t mc;
4316 mbx_cmd_t *mcp = &mc;
4317 struct qla_hw_data *ha = vha->hw;
4318
5f28d2d7
SK		 4319 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
4320 "Entered %s.\n", __func__);
23f2ebd1 4321
6246b8a1 4322 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha))
23f2ebd1
SR		 4323 return QLA_FUNCTION_FAILED;
4324 mcp->mb[0] = MBC_GET_PORT_CONFIG;
4325 mcp->out_mb = MBX_0;
4326 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4327 mcp->tov = MBX_TOV_SECONDS;
4328 mcp->flags = 0;
4329
4330 rval = qla2x00_mailbox_command(vha, mcp);
4331
4332 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4333 ql_dbg(ql_dbg_mbx, vha, 0x110a,
4334 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
23f2ebd1
SR		 4335 } else {
4336 /* Copy all bits to preserve original value */
4337 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
4338
5f28d2d7
SK		 4339 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
4340 "Done %s.\n", __func__);
23f2ebd1
SR		 4341 }
4342 return rval;
4343}
4344
4345int
4346qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4347{
4348 int rval;
4349 mbx_cmd_t mc;
4350 mbx_cmd_t *mcp = &mc;
4351
5f28d2d7
SK		 4352 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
4353 "Entered %s.\n", __func__);
23f2ebd1
SR		 4354
4355 mcp->mb[0] = MBC_SET_PORT_CONFIG;
4356 /* Copy all bits to preserve original setting */
4357 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
4358 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4359 mcp->in_mb = MBX_0;
4360 mcp->tov = MBX_TOV_SECONDS;
4361 mcp->flags = 0;
4362 rval = qla2x00_mailbox_command(vha, mcp);
4363
4364 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4365 ql_dbg(ql_dbg_mbx, vha, 0x110d,
4366 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
23f2ebd1 4367 } else
5f28d2d7
SK		 4368 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
4369 "Done %s.\n", __func__);
23f2ebd1
SR		 4370
4371 return rval;
4372}
4373
4374
09ff701a
SR		 4375int
4376qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
4377 uint16_t *mb)
4378{
4379 int rval;
4380 mbx_cmd_t mc;
4381 mbx_cmd_t *mcp = &mc;
4382 struct qla_hw_data *ha = vha->hw;
4383
5f28d2d7
SK		 4384 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
4385 "Entered %s.\n", __func__);
7c3df132 4386
09ff701a
SR		 4387 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
4388 return QLA_FUNCTION_FAILED;
4389
09ff701a
SR		 4390 mcp->mb[0] = MBC_PORT_PARAMS;
4391 mcp->mb[1] = loop_id;
4392 if (ha->flags.fcp_prio_enabled)
4393 mcp->mb[2] = BIT_1;
4394 else
4395 mcp->mb[2] = BIT_2;
4396 mcp->mb[4] = priority & 0xf;
4397 mcp->mb[9] = vha->vp_idx;
4398 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4399 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
4400 mcp->tov = 30;
4401 mcp->flags = 0;
4402 rval = qla2x00_mailbox_command(vha, mcp);
4403 if (mb != NULL) {
4404 mb[0] = mcp->mb[0];
4405 mb[1] = mcp->mb[1];
4406 mb[3] = mcp->mb[3];
4407 mb[4] = mcp->mb[4];
4408 }
4409
4410 if (rval != QLA_SUCCESS) {
7c3df132 4411 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
09ff701a 4412 } else {
5f28d2d7
SK		 4413 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
4414 "Done %s.\n", __func__);
09ff701a
SR		 4415 }
4416
4417 return rval;
4418}
a9083016 4419
794a5691
AV		 4420int
4421qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp, uint16_t *frac)
4422{
4423 int rval;
6ad11eaa 4424 uint8_t byte;
794a5691
AV		 4425 struct qla_hw_data *ha = vha->hw;
4426
5f28d2d7
SK		 4427 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ca,
4428 "Entered %s.\n", __func__);
794a5691 4429
6ad11eaa
JC		 4430 /* Integer part */
4431 rval = qla2x00_read_sfp(vha, 0, &byte, 0x98, 0x01, 1, BIT_13|BIT_0);
794a5691 4432 if (rval != QLA_SUCCESS) {
7c3df132 4433 ql_dbg(ql_dbg_mbx, vha, 0x10c9, "Failed=%x.\n", rval);
794a5691
AV		 4434 ha->flags.thermal_supported = 0;
4435 goto fail;
4436 }
6ad11eaa 4437 *temp = byte;
794a5691 4438
6ad11eaa
JC		 4439 /* Fraction part */
4440 rval = qla2x00_read_sfp(vha, 0, &byte, 0x98, 0x10, 1, BIT_13|BIT_0);
794a5691 4441 if (rval != QLA_SUCCESS) {
7c3df132 4442 ql_dbg(ql_dbg_mbx, vha, 0x1019, "Failed=%x.\n", rval);
794a5691
AV		 4443 ha->flags.thermal_supported = 0;
4444 goto fail;
4445 }
6ad11eaa 4446 *frac = (byte >> 6) * 25;
794a5691 4447
5f28d2d7
SK		 4448 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1018,
4449 "Done %s.\n", __func__);
794a5691
AV		 4450fail:
4451 return rval;
4452}
4453
a9083016
GM		 4454int
4455qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
4456{
4457 int rval;
4458 struct qla_hw_data *ha = vha->hw;
4459 mbx_cmd_t mc;
4460 mbx_cmd_t *mcp = &mc;
4461
5f28d2d7
SK		 4462 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
4463 "Entered %s.\n", __func__);
7c3df132 4464
a9083016
GM		 4465 if (!IS_FWI2_CAPABLE(ha))
4466 return QLA_FUNCTION_FAILED;
4467
a9083016 4468 memset(mcp, 0, sizeof(mbx_cmd_t));
3711333d 4469 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
a9083016
GM		 4470 mcp->mb[1] = 1;
4471
4472 mcp->out_mb = MBX_1|MBX_0;
4473 mcp->in_mb = MBX_0;
4474 mcp->tov = 30;
4475 mcp->flags = 0;
4476
4477 rval = qla2x00_mailbox_command(vha, mcp);
4478 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4479 ql_dbg(ql_dbg_mbx, vha, 0x1016,
4480 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
a9083016 4481 } else {
5f28d2d7
SK		 4482 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
4483 "Done %s.\n", __func__);
a9083016
GM		 4484 }
4485
4486 return rval;
4487}
4488
4489int
4490qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
4491{
4492 int rval;
4493 struct qla_hw_data *ha = vha->hw;
4494 mbx_cmd_t mc;
4495 mbx_cmd_t *mcp = &mc;
4496
5f28d2d7
SK		 4497 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
4498 "Entered %s.\n", __func__);
7c3df132 4499
a9083016
GM		 4500 if (!IS_QLA82XX(ha))
4501 return QLA_FUNCTION_FAILED;
4502
a9083016 4503 memset(mcp, 0, sizeof(mbx_cmd_t));
3711333d 4504 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
a9083016
GM		 4505 mcp->mb[1] = 0;
4506
4507 mcp->out_mb = MBX_1|MBX_0;
4508 mcp->in_mb = MBX_0;
4509 mcp->tov = 30;
4510 mcp->flags = 0;
4511
4512 rval = qla2x00_mailbox_command(vha, mcp);
4513 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4514 ql_dbg(ql_dbg_mbx, vha, 0x100c,
4515 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
a9083016 4516 } else {
5f28d2d7
SK		 4517 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
4518 "Done %s.\n", __func__);
a9083016
GM		 4519 }
4520
4521 return rval;
4522}
08de2844
GM		 4523
4524int
4525qla82xx_md_get_template_size(scsi_qla_host_t *vha)
4526{
4527 struct qla_hw_data *ha = vha->hw;
4528 mbx_cmd_t mc;
4529 mbx_cmd_t *mcp = &mc;
4530 int rval = QLA_FUNCTION_FAILED;
4531
5f28d2d7
SK		 4532 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
4533 "Entered %s.\n", __func__);
08de2844
GM		 4534
4535 memset(mcp->mb, 0 , sizeof(mcp->mb));
4536 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4537 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4538 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
4539 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
4540
4541 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4542 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
4543 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4544
4545 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4546 mcp->tov = MBX_TOV_SECONDS;
4547 rval = qla2x00_mailbox_command(vha, mcp);
4548
4549 /* Always copy back return mailbox values. */
4550 if (rval != QLA_SUCCESS) {
4551 ql_dbg(ql_dbg_mbx, vha, 0x1120,
4552 "mailbox command FAILED=0x%x, subcode=%x.\n",
4553 (mcp->mb[1] << 16) | mcp->mb[0],
4554 (mcp->mb[3] << 16) | mcp->mb[2]);
4555 } else {
5f28d2d7
SK		 4556 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
4557 "Done %s.\n", __func__);
08de2844
GM		 4558 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
4559 if (!ha->md_template_size) {
4560 ql_dbg(ql_dbg_mbx, vha, 0x1122,
4561 "Null template size obtained.\n");
4562 rval = QLA_FUNCTION_FAILED;
4563 }
4564 }
4565 return rval;
4566}
4567
4568int
4569qla82xx_md_get_template(scsi_qla_host_t *vha)
4570{
4571 struct qla_hw_data *ha = vha->hw;
4572 mbx_cmd_t mc;
4573 mbx_cmd_t *mcp = &mc;
4574 int rval = QLA_FUNCTION_FAILED;
4575
5f28d2d7
SK		 4576 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
4577 "Entered %s.\n", __func__);
08de2844
GM		 4578
4579 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
4580 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
4581 if (!ha->md_tmplt_hdr) {
4582 ql_log(ql_log_warn, vha, 0x1124,
4583 "Unable to allocate memory for Minidump template.\n");
4584 return rval;
4585 }
4586
4587 memset(mcp->mb, 0 , sizeof(mcp->mb));
4588 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4589 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4590 mcp->mb[2] = LSW(RQST_TMPLT);
4591 mcp->mb[3] = MSW(RQST_TMPLT);
4592 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
4593 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
4594 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
4595 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
4596 mcp->mb[8] = LSW(ha->md_template_size);
4597 mcp->mb[9] = MSW(ha->md_template_size);
4598
4599 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4600 mcp->tov = MBX_TOV_SECONDS;
4601 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
4602 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4603 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4604 rval = qla2x00_mailbox_command(vha, mcp);
4605
4606 if (rval != QLA_SUCCESS) {
4607 ql_dbg(ql_dbg_mbx, vha, 0x1125,
4608 "mailbox command FAILED=0x%x, subcode=%x.\n",
4609 ((mcp->mb[1] << 16) | mcp->mb[0]),
4610 ((mcp->mb[3] << 16) | mcp->mb[2]));
4611 } else
5f28d2d7
SK		 4612 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
4613 "Done %s.\n", __func__);
08de2844
GM		 4614 return rval;
4615}
999916dc 4616
6246b8a1
GM		 4617int
4618qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4619{
4620 int rval;
4621 struct qla_hw_data *ha = vha->hw;
4622 mbx_cmd_t mc;
4623 mbx_cmd_t *mcp = &mc;
4624
4625 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4626 return QLA_FUNCTION_FAILED;
4627
5f28d2d7
SK		 4628 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
4629 "Entered %s.\n", __func__);
6246b8a1
GM		 4630
4631 memset(mcp, 0, sizeof(mbx_cmd_t));
4632 mcp->mb[0] = MBC_SET_LED_CONFIG;
4633 mcp->mb[1] = led_cfg[0];
4634 mcp->mb[2] = led_cfg[1];
4635 if (IS_QLA8031(ha)) {
4636 mcp->mb[3] = led_cfg[2];
4637 mcp->mb[4] = led_cfg[3];
4638 mcp->mb[5] = led_cfg[4];
4639 mcp->mb[6] = led_cfg[5];
4640 }
4641
4642 mcp->out_mb = MBX_2|MBX_1|MBX_0;
4643 if (IS_QLA8031(ha))
4644 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4645 mcp->in_mb = MBX_0;
4646 mcp->tov = 30;
4647 mcp->flags = 0;
4648
4649 rval = qla2x00_mailbox_command(vha, mcp);
4650 if (rval != QLA_SUCCESS) {
4651 ql_dbg(ql_dbg_mbx, vha, 0x1134,
4652 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4653 } else {
5f28d2d7
SK		 4654 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
4655 "Done %s.\n", __func__);
6246b8a1
GM		 4656 }
4657
4658 return rval;
4659}
4660
4661int
4662qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4663{
4664 int rval;
4665 struct qla_hw_data *ha = vha->hw;
4666 mbx_cmd_t mc;
4667 mbx_cmd_t *mcp = &mc;
4668
4669 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4670 return QLA_FUNCTION_FAILED;
4671
5f28d2d7
SK		 4672 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
4673 "Entered %s.\n", __func__);
6246b8a1
GM		 4674
4675 memset(mcp, 0, sizeof(mbx_cmd_t));
4676 mcp->mb[0] = MBC_GET_LED_CONFIG;
4677
4678 mcp->out_mb = MBX_0;
4679 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4680 if (IS_QLA8031(ha))
4681 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4682 mcp->tov = 30;
4683 mcp->flags = 0;
4684
4685 rval = qla2x00_mailbox_command(vha, mcp);
4686 if (rval != QLA_SUCCESS) {
4687 ql_dbg(ql_dbg_mbx, vha, 0x1137,
4688 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4689 } else {
4690 led_cfg[0] = mcp->mb[1];
4691 led_cfg[1] = mcp->mb[2];
4692 if (IS_QLA8031(ha)) {
4693 led_cfg[2] = mcp->mb[3];
4694 led_cfg[3] = mcp->mb[4];
4695 led_cfg[4] = mcp->mb[5];
4696 led_cfg[5] = mcp->mb[6];
4697 }
5f28d2d7
SK		 4698 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
4699 "Done %s.\n", __func__);
6246b8a1
GM		 4700 }
4701
4702 return rval;
4703}
4704
999916dc
SK		 4705int
4706qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
4707{
4708 int rval;
4709 struct qla_hw_data *ha = vha->hw;
4710 mbx_cmd_t mc;
4711 mbx_cmd_t *mcp = &mc;
4712
4713 if (!IS_QLA82XX(ha))
4714 return QLA_FUNCTION_FAILED;
4715
5f28d2d7 4716 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
999916dc
SK		 4717 "Entered %s.\n", __func__);
4718
4719 memset(mcp, 0, sizeof(mbx_cmd_t));
4720 mcp->mb[0] = MBC_SET_LED_CONFIG;
4721 if (enable)
4722 mcp->mb[7] = 0xE;
4723 else
4724 mcp->mb[7] = 0xD;
4725
4726 mcp->out_mb = MBX_7|MBX_0;
4727 mcp->in_mb = MBX_0;
6246b8a1 4728 mcp->tov = MBX_TOV_SECONDS;
999916dc
SK		 4729 mcp->flags = 0;
4730
4731 rval = qla2x00_mailbox_command(vha, mcp);
4732 if (rval != QLA_SUCCESS) {
4733 ql_dbg(ql_dbg_mbx, vha, 0x1128,
4734 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4735 } else {
5f28d2d7 4736 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
999916dc
SK		 4737 "Done %s.\n", __func__);
4738 }
4739
4740 return rval;
4741}
6246b8a1
GM		 4742
4743int
4744qla83xx_write_remote_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
4745{
4746 int rval;
4747 struct qla_hw_data *ha = vha->hw;
4748 mbx_cmd_t mc;
4749 mbx_cmd_t *mcp = &mc;
4750
4751 if (!IS_QLA83XX(ha))
4752 return QLA_FUNCTION_FAILED;
4753
5f28d2d7
SK		 4754 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
4755 "Entered %s.\n", __func__);
6246b8a1
GM		 4756
4757 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
4758 mcp->mb[1] = LSW(reg);
4759 mcp->mb[2] = MSW(reg);
4760 mcp->mb[3] = LSW(data);
4761 mcp->mb[4] = MSW(data);
4762 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4763
4764 mcp->in_mb = MBX_1|MBX_0;
4765 mcp->tov = MBX_TOV_SECONDS;
4766 mcp->flags = 0;
4767 rval = qla2x00_mailbox_command(vha, mcp);
4768
4769 if (rval != QLA_SUCCESS) {
4770 ql_dbg(ql_dbg_mbx, vha, 0x1131,
4771 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4772 } else {
5f28d2d7 4773 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
6246b8a1
GM		 4774 "Done %s.\n", __func__);
4775 }
af11f64d 4776
6246b8a1
GM		 4777 return rval;
4778}
af11f64d
AV		 4779
4780int
4781qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
4782{
4783 int rval;
4784 struct qla_hw_data *ha = vha->hw;
4785 mbx_cmd_t mc;
4786 mbx_cmd_t *mcp = &mc;
4787
4788 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5f28d2d7 4789 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
af11f64d
AV		 4790 "Implicit LOGO Unsupported.\n");
4791 return QLA_FUNCTION_FAILED;
4792 }
4793
4794
5f28d2d7
SK		 4795 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
4796 "Entering %s.\n", __func__);
af11f64d
AV		 4797
4798 /* Perform Implicit LOGO. */
4799 mcp->mb[0] = MBC_PORT_LOGOUT;
4800 mcp->mb[1] = fcport->loop_id;
4801 mcp->mb[10] = BIT_15;
4802 mcp->out_mb = MBX_10|MBX_1|MBX_0;
4803 mcp->in_mb = MBX_0;
4804 mcp->tov = MBX_TOV_SECONDS;
4805 mcp->flags = 0;
4806 rval = qla2x00_mailbox_command(vha, mcp);
4807 if (rval != QLA_SUCCESS)
4808 ql_dbg(ql_dbg_mbx, vha, 0x113d,
4809 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4810 else
5f28d2d7
SK		 4811 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
4812 "Done %s.\n", __func__);
af11f64d
AV		 4813
4814 return rval;
4815}
4816
Linux 6.x block layer and io_uring tree(s)